2 * Copyright (c) 1996, 2003 VIA Networking Technologies, Inc.
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
17 * Purpose: driver entry for initial, open, close, tx and rx.
25 * vt6655_probe - module initial (insmod) driver entry
26 * vt6655_remove - module remove entry
27 * device_free_info - device structure resource free function
28 * device_print_info - print out resource
29 * device_rx_srv - rx service function
30 * device_alloc_rx_buf - rx buffer pre-allocated function
31 * device_free_tx_buf - free tx buffer function
32 * device_init_rd0_ring- initial rd dma0 ring
33 * device_init_rd1_ring- initial rd dma1 ring
34 * device_init_td0_ring- initial tx dma0 ring buffer
35 * device_init_td1_ring- initial tx dma1 ring buffer
36 * device_init_registers- initial MAC & BBP & RF internal registers.
37 * device_init_rings- initial tx/rx ring buffer
38 * device_free_rings- free all allocated ring buffer
39 * device_tx_srv- tx interrupt service function
45 #include <linux/file.h>
55 #include <linux/delay.h>
56 #include <linux/kthread.h>
57 #include <linux/slab.h>
59 /*--------------------- Static Definitions -------------------------*/
61 * Define module options
63 MODULE_AUTHOR("VIA Networking Technologies, Inc., <lyndonchen@vntek.com.tw>");
64 MODULE_LICENSE("GPL");
65 MODULE_DESCRIPTION("VIA Networking Solomon-A/B/G Wireless LAN Adapter Driver");
67 #define DEVICE_PARAM(N, D)
69 #define RX_DESC_MIN0 16
70 #define RX_DESC_MAX0 128
71 #define RX_DESC_DEF0 32
72 DEVICE_PARAM(RxDescriptors0, "Number of receive descriptors0");
74 #define RX_DESC_MIN1 16
75 #define RX_DESC_MAX1 128
76 #define RX_DESC_DEF1 32
77 DEVICE_PARAM(RxDescriptors1, "Number of receive descriptors1");
79 #define TX_DESC_MIN0 16
80 #define TX_DESC_MAX0 128
81 #define TX_DESC_DEF0 32
82 DEVICE_PARAM(TxDescriptors0, "Number of transmit descriptors0");
84 #define TX_DESC_MIN1 16
85 #define TX_DESC_MAX1 128
86 #define TX_DESC_DEF1 64
87 DEVICE_PARAM(TxDescriptors1, "Number of transmit descriptors1");
89 #define INT_WORKS_DEF 20
90 #define INT_WORKS_MIN 10
91 #define INT_WORKS_MAX 64
93 DEVICE_PARAM(int_works, "Number of packets per interrupt services");
95 #define RTS_THRESH_DEF 2347
97 #define FRAG_THRESH_DEF 2346
99 #define SHORT_RETRY_MIN 0
100 #define SHORT_RETRY_MAX 31
101 #define SHORT_RETRY_DEF 8
103 DEVICE_PARAM(ShortRetryLimit, "Short frame retry limits");
105 #define LONG_RETRY_MIN 0
106 #define LONG_RETRY_MAX 15
107 #define LONG_RETRY_DEF 4
109 DEVICE_PARAM(LongRetryLimit, "long frame retry limits");
111 /* BasebandType[] baseband type selected
112 * 0: indicate 802.11a type
113 * 1: indicate 802.11b type
114 * 2: indicate 802.11g type
116 #define BBP_TYPE_MIN 0
117 #define BBP_TYPE_MAX 2
118 #define BBP_TYPE_DEF 2
120 DEVICE_PARAM(BasebandType, "baseband type");
123 * Static vars definitions
125 static const struct pci_device_id vt6655_pci_id_table[] = {
126 { PCI_VDEVICE(VIA, 0x3253) },
130 /*--------------------- Static Functions --------------------------*/
132 static int vt6655_probe(struct pci_dev *pcid, const struct pci_device_id *ent);
133 static void device_free_info(struct vnt_private *priv);
134 static void device_print_info(struct vnt_private *priv);
136 static void device_init_rd0_ring(struct vnt_private *priv);
137 static void device_init_rd1_ring(struct vnt_private *priv);
138 static void device_init_td0_ring(struct vnt_private *priv);
139 static void device_init_td1_ring(struct vnt_private *priv);
141 static int device_rx_srv(struct vnt_private *priv, unsigned int idx);
142 static int device_tx_srv(struct vnt_private *priv, unsigned int idx);
143 static bool device_alloc_rx_buf(struct vnt_private *, struct vnt_rx_desc *);
144 static void device_init_registers(struct vnt_private *priv);
145 static void device_free_tx_buf(struct vnt_private *, struct vnt_tx_desc *);
146 static void device_free_td0_ring(struct vnt_private *priv);
147 static void device_free_td1_ring(struct vnt_private *priv);
148 static void device_free_rd0_ring(struct vnt_private *priv);
149 static void device_free_rd1_ring(struct vnt_private *priv);
150 static void device_free_rings(struct vnt_private *priv);
152 /*--------------------- Export Variables --------------------------*/
154 /*--------------------- Export Functions --------------------------*/
156 static void vt6655_remove(struct pci_dev *pcid)
158 struct vnt_private *priv = pci_get_drvdata(pcid);
162 device_free_info(priv);
165 static void device_get_options(struct vnt_private *priv)
167 struct vnt_options *opts = &priv->opts;
169 opts->rx_descs0 = RX_DESC_DEF0;
170 opts->rx_descs1 = RX_DESC_DEF1;
171 opts->tx_descs[0] = TX_DESC_DEF0;
172 opts->tx_descs[1] = TX_DESC_DEF1;
173 opts->int_works = INT_WORKS_DEF;
175 opts->short_retry = SHORT_RETRY_DEF;
176 opts->long_retry = LONG_RETRY_DEF;
177 opts->bbp_type = BBP_TYPE_DEF;
181 device_set_options(struct vnt_private *priv)
183 priv->byShortRetryLimit = priv->opts.short_retry;
184 priv->byLongRetryLimit = priv->opts.long_retry;
185 priv->byBBType = priv->opts.bbp_type;
186 priv->byPacketType = priv->byBBType;
187 priv->byAutoFBCtrl = AUTO_FB_0;
188 priv->bUpdateBBVGA = true;
189 priv->byPreambleType = 0;
191 pr_debug(" byShortRetryLimit= %d\n", (int)priv->byShortRetryLimit);
192 pr_debug(" byLongRetryLimit= %d\n", (int)priv->byLongRetryLimit);
193 pr_debug(" byPreambleType= %d\n", (int)priv->byPreambleType);
194 pr_debug(" byShortPreamble= %d\n", (int)priv->byShortPreamble);
195 pr_debug(" byBBType= %d\n", (int)priv->byBBType);
199 * Initialisation of MAC & BBP registers
202 static void device_init_registers(struct vnt_private *priv)
206 unsigned char byValue;
207 unsigned char byCCKPwrdBm = 0;
208 unsigned char byOFDMPwrdBm = 0;
211 BBvSoftwareReset(priv);
213 /* Do MACbSoftwareReset in MACvInitialize */
214 MACbSoftwareReset(priv);
218 /* Only used in 11g type, sync with ERP IE */
219 priv->bProtectMode = false;
221 priv->bNonERPPresent = false;
222 priv->bBarkerPreambleMd = false;
223 priv->wCurrentRate = RATE_1M;
224 priv->byTopOFDMBasicRate = RATE_24M;
225 priv->byTopCCKBasicRate = RATE_1M;
228 MACvInitialize(priv);
231 VNSvInPortB(priv->PortOffset + MAC_REG_LOCALID, &priv->byLocalID);
233 spin_lock_irqsave(&priv->lock, flags);
235 SROMvReadAllContents(priv->PortOffset, priv->abyEEPROM);
237 spin_unlock_irqrestore(&priv->lock, flags);
239 /* Get Channel range */
240 priv->byMinChannel = 1;
241 priv->byMaxChannel = CB_MAX_CHANNEL;
244 byValue = SROMbyReadEmbedded(priv->PortOffset, EEP_OFS_ANTENNA);
245 if (byValue & EEP_ANTINV)
246 priv->bTxRxAntInv = true;
248 priv->bTxRxAntInv = false;
250 byValue &= (EEP_ANTENNA_AUX | EEP_ANTENNA_MAIN);
251 /* if not set default is All */
253 byValue = (EEP_ANTENNA_AUX | EEP_ANTENNA_MAIN);
255 if (byValue == (EEP_ANTENNA_AUX | EEP_ANTENNA_MAIN)) {
256 priv->byAntennaCount = 2;
257 priv->byTxAntennaMode = ANT_B;
258 priv->dwTxAntennaSel = 1;
259 priv->dwRxAntennaSel = 1;
261 if (priv->bTxRxAntInv)
262 priv->byRxAntennaMode = ANT_A;
264 priv->byRxAntennaMode = ANT_B;
266 priv->byAntennaCount = 1;
267 priv->dwTxAntennaSel = 0;
268 priv->dwRxAntennaSel = 0;
270 if (byValue & EEP_ANTENNA_AUX) {
271 priv->byTxAntennaMode = ANT_A;
273 if (priv->bTxRxAntInv)
274 priv->byRxAntennaMode = ANT_B;
276 priv->byRxAntennaMode = ANT_A;
278 priv->byTxAntennaMode = ANT_B;
280 if (priv->bTxRxAntInv)
281 priv->byRxAntennaMode = ANT_A;
283 priv->byRxAntennaMode = ANT_B;
287 /* Set initial antenna mode */
288 BBvSetTxAntennaMode(priv, priv->byTxAntennaMode);
289 BBvSetRxAntennaMode(priv, priv->byRxAntennaMode);
291 /* zonetype initial */
292 priv->byOriginalZonetype = priv->abyEEPROM[EEP_OFS_ZONETYPE];
294 if (!priv->bZoneRegExist)
295 priv->byZoneType = priv->abyEEPROM[EEP_OFS_ZONETYPE];
297 pr_debug("priv->byZoneType = %x\n", priv->byZoneType);
302 /* Get Desire Power Value */
303 priv->byCurPwr = 0xFF;
304 priv->byCCKPwr = SROMbyReadEmbedded(priv->PortOffset, EEP_OFS_PWR_CCK);
305 priv->byOFDMPwrG = SROMbyReadEmbedded(priv->PortOffset, EEP_OFS_PWR_OFDMG);
307 /* Load power Table */
308 for (ii = 0; ii < CB_MAX_CHANNEL_24G; ii++) {
309 priv->abyCCKPwrTbl[ii + 1] =
310 SROMbyReadEmbedded(priv->PortOffset,
311 (unsigned char)(ii + EEP_OFS_CCK_PWR_TBL));
312 if (priv->abyCCKPwrTbl[ii + 1] == 0)
313 priv->abyCCKPwrTbl[ii + 1] = priv->byCCKPwr;
315 priv->abyOFDMPwrTbl[ii + 1] =
316 SROMbyReadEmbedded(priv->PortOffset,
317 (unsigned char)(ii + EEP_OFS_OFDM_PWR_TBL));
318 if (priv->abyOFDMPwrTbl[ii + 1] == 0)
319 priv->abyOFDMPwrTbl[ii + 1] = priv->byOFDMPwrG;
321 priv->abyCCKDefaultPwr[ii + 1] = byCCKPwrdBm;
322 priv->abyOFDMDefaultPwr[ii + 1] = byOFDMPwrdBm;
325 /* recover 12,13 ,14channel for EUROPE by 11 channel */
326 for (ii = 11; ii < 14; ii++) {
327 priv->abyCCKPwrTbl[ii] = priv->abyCCKPwrTbl[10];
328 priv->abyOFDMPwrTbl[ii] = priv->abyOFDMPwrTbl[10];
331 /* Load OFDM A Power Table */
332 for (ii = 0; ii < CB_MAX_CHANNEL_5G; ii++) {
333 priv->abyOFDMPwrTbl[ii + CB_MAX_CHANNEL_24G + 1] =
334 SROMbyReadEmbedded(priv->PortOffset,
335 (unsigned char)(ii + EEP_OFS_OFDMA_PWR_TBL));
337 priv->abyOFDMDefaultPwr[ii + CB_MAX_CHANNEL_24G + 1] =
338 SROMbyReadEmbedded(priv->PortOffset,
339 (unsigned char)(ii + EEP_OFS_OFDMA_PWR_dBm));
342 if (priv->byLocalID > REV_ID_VT3253_B1) {
343 MACvSelectPage1(priv->PortOffset);
345 VNSvOutPortB(priv->PortOffset + MAC_REG_MSRCTL + 1,
346 (MSRCTL1_TXPWR | MSRCTL1_CSAPAREN));
348 MACvSelectPage0(priv->PortOffset);
351 /* use relative tx timeout and 802.11i D4 */
352 MACvWordRegBitsOn(priv->PortOffset,
353 MAC_REG_CFG, (CFG_TKIPOPT | CFG_NOTXTIMEOUT));
355 /* set performance parameter by registry */
356 MACvSetShortRetryLimit(priv, priv->byShortRetryLimit);
357 MACvSetLongRetryLimit(priv, priv->byLongRetryLimit);
359 /* reset TSF counter */
360 VNSvOutPortB(priv->PortOffset + MAC_REG_TFTCTL, TFTCTL_TSFCNTRST);
361 /* enable TSF counter */
362 VNSvOutPortB(priv->PortOffset + MAC_REG_TFTCTL, TFTCTL_TSFCNTREN);
364 /* initialize BBP registers */
367 if (priv->bUpdateBBVGA) {
368 priv->byBBVGACurrent = priv->abyBBVGA[0];
369 priv->byBBVGANew = priv->byBBVGACurrent;
370 BBvSetVGAGainOffset(priv, priv->abyBBVGA[0]);
373 BBvSetRxAntennaMode(priv, priv->byRxAntennaMode);
374 BBvSetTxAntennaMode(priv, priv->byTxAntennaMode);
376 /* Set BB and packet type at the same time. */
377 /* Set Short Slot Time, xIFS, and RSPINF. */
378 priv->wCurrentRate = RATE_54M;
380 priv->bRadioOff = false;
382 priv->byRadioCtl = SROMbyReadEmbedded(priv->PortOffset,
384 priv->bHWRadioOff = false;
386 if (priv->byRadioCtl & EEP_RADIOCTL_ENABLE) {
388 MACvGPIOIn(priv->PortOffset, &priv->byGPIO);
390 if (((priv->byGPIO & GPIO0_DATA) &&
391 !(priv->byRadioCtl & EEP_RADIOCTL_INV)) ||
392 (!(priv->byGPIO & GPIO0_DATA) &&
393 (priv->byRadioCtl & EEP_RADIOCTL_INV)))
394 priv->bHWRadioOff = true;
397 if (priv->bHWRadioOff || priv->bRadioControlOff)
398 CARDbRadioPowerOff(priv);
400 /* get Permanent network address */
401 SROMvReadEtherAddress(priv->PortOffset, priv->abyCurrentNetAddr);
402 pr_debug("Network address = %pM\n", priv->abyCurrentNetAddr);
404 /* reset Tx pointer */
405 CARDvSafeResetRx(priv);
406 /* reset Rx pointer */
407 CARDvSafeResetTx(priv);
409 if (priv->byLocalID <= REV_ID_VT3253_A1)
410 MACvRegBitsOn(priv->PortOffset, MAC_REG_RCR, RCR_WPAERR);
413 MACvReceive0(priv->PortOffset);
414 MACvReceive1(priv->PortOffset);
416 /* start the adapter */
417 MACvStart(priv->PortOffset);
420 static void device_print_info(struct vnt_private *priv)
422 dev_info(&priv->pcid->dev, "MAC=%pM IO=0x%lx Mem=0x%lx IRQ=%d\n",
423 priv->abyCurrentNetAddr, (unsigned long)priv->ioaddr,
424 (unsigned long)priv->PortOffset, priv->pcid->irq);
427 static void device_free_info(struct vnt_private *priv)
433 ieee80211_unregister_hw(priv->hw);
435 if (priv->PortOffset)
436 iounmap(priv->PortOffset);
439 pci_release_regions(priv->pcid);
442 ieee80211_free_hw(priv->hw);
445 static bool device_init_rings(struct vnt_private *priv)
449 /*allocate all RD/TD rings a single pool*/
450 vir_pool = dma_zalloc_coherent(&priv->pcid->dev,
451 priv->opts.rx_descs0 * sizeof(struct vnt_rx_desc) +
452 priv->opts.rx_descs1 * sizeof(struct vnt_rx_desc) +
453 priv->opts.tx_descs[0] * sizeof(struct vnt_tx_desc) +
454 priv->opts.tx_descs[1] * sizeof(struct vnt_tx_desc),
455 &priv->pool_dma, GFP_ATOMIC);
457 dev_err(&priv->pcid->dev, "allocate desc dma memory failed\n");
461 priv->aRD0Ring = vir_pool;
462 priv->aRD1Ring = vir_pool +
463 priv->opts.rx_descs0 * sizeof(struct vnt_rx_desc);
465 priv->rd0_pool_dma = priv->pool_dma;
466 priv->rd1_pool_dma = priv->rd0_pool_dma +
467 priv->opts.rx_descs0 * sizeof(struct vnt_rx_desc);
469 priv->tx0_bufs = dma_zalloc_coherent(&priv->pcid->dev,
470 priv->opts.tx_descs[0] * PKT_BUF_SZ +
471 priv->opts.tx_descs[1] * PKT_BUF_SZ +
476 if (!priv->tx0_bufs) {
477 dev_err(&priv->pcid->dev, "allocate buf dma memory failed\n");
479 dma_free_coherent(&priv->pcid->dev,
480 priv->opts.rx_descs0 * sizeof(struct vnt_rx_desc) +
481 priv->opts.rx_descs1 * sizeof(struct vnt_rx_desc) +
482 priv->opts.tx_descs[0] * sizeof(struct vnt_tx_desc) +
483 priv->opts.tx_descs[1] * sizeof(struct vnt_tx_desc),
484 vir_pool, priv->pool_dma);
488 priv->td0_pool_dma = priv->rd1_pool_dma +
489 priv->opts.rx_descs1 * sizeof(struct vnt_rx_desc);
491 priv->td1_pool_dma = priv->td0_pool_dma +
492 priv->opts.tx_descs[0] * sizeof(struct vnt_tx_desc);
494 /* vir_pool: pvoid type */
495 priv->apTD0Rings = vir_pool
496 + priv->opts.rx_descs0 * sizeof(struct vnt_rx_desc)
497 + priv->opts.rx_descs1 * sizeof(struct vnt_rx_desc);
499 priv->apTD1Rings = vir_pool
500 + priv->opts.rx_descs0 * sizeof(struct vnt_rx_desc)
501 + priv->opts.rx_descs1 * sizeof(struct vnt_rx_desc)
502 + priv->opts.tx_descs[0] * sizeof(struct vnt_tx_desc);
504 priv->tx1_bufs = priv->tx0_bufs +
505 priv->opts.tx_descs[0] * PKT_BUF_SZ;
507 priv->tx_beacon_bufs = priv->tx1_bufs +
508 priv->opts.tx_descs[1] * PKT_BUF_SZ;
510 priv->pbyTmpBuff = priv->tx_beacon_bufs +
513 priv->tx_bufs_dma1 = priv->tx_bufs_dma0 +
514 priv->opts.tx_descs[0] * PKT_BUF_SZ;
516 priv->tx_beacon_dma = priv->tx_bufs_dma1 +
517 priv->opts.tx_descs[1] * PKT_BUF_SZ;
522 static void device_free_rings(struct vnt_private *priv)
524 dma_free_coherent(&priv->pcid->dev,
525 priv->opts.rx_descs0 * sizeof(struct vnt_rx_desc) +
526 priv->opts.rx_descs1 * sizeof(struct vnt_rx_desc) +
527 priv->opts.tx_descs[0] * sizeof(struct vnt_tx_desc) +
528 priv->opts.tx_descs[1] * sizeof(struct vnt_tx_desc),
529 priv->aRD0Ring, priv->pool_dma);
532 dma_free_coherent(&priv->pcid->dev,
533 priv->opts.tx_descs[0] * PKT_BUF_SZ +
534 priv->opts.tx_descs[1] * PKT_BUF_SZ +
537 priv->tx0_bufs, priv->tx_bufs_dma0);
540 static void device_init_rd0_ring(struct vnt_private *priv)
543 dma_addr_t curr = priv->rd0_pool_dma;
544 struct vnt_rx_desc *desc;
546 /* Init the RD0 ring entries */
547 for (i = 0; i < priv->opts.rx_descs0;
548 i ++, curr += sizeof(struct vnt_rx_desc)) {
549 desc = &priv->aRD0Ring[i];
550 desc->rd_info = kzalloc(sizeof(*desc->rd_info), GFP_ATOMIC);
552 if (!device_alloc_rx_buf(priv, desc))
553 dev_err(&priv->pcid->dev, "can not alloc rx bufs\n");
555 desc->next = &(priv->aRD0Ring[(i + 1) % priv->opts.rx_descs0]);
556 desc->next_desc = cpu_to_le32(curr + sizeof(struct vnt_rx_desc));
560 priv->aRD0Ring[i-1].next_desc = cpu_to_le32(priv->rd0_pool_dma);
561 priv->pCurrRD[0] = &priv->aRD0Ring[0];
564 static void device_init_rd1_ring(struct vnt_private *priv)
567 dma_addr_t curr = priv->rd1_pool_dma;
568 struct vnt_rx_desc *desc;
570 /* Init the RD1 ring entries */
571 for (i = 0; i < priv->opts.rx_descs1;
572 i ++, curr += sizeof(struct vnt_rx_desc)) {
573 desc = &priv->aRD1Ring[i];
574 desc->rd_info = kzalloc(sizeof(*desc->rd_info), GFP_ATOMIC);
576 if (!device_alloc_rx_buf(priv, desc))
577 dev_err(&priv->pcid->dev, "can not alloc rx bufs\n");
579 desc->next = &(priv->aRD1Ring[(i+1) % priv->opts.rx_descs1]);
580 desc->next_desc = cpu_to_le32(curr + sizeof(struct vnt_rx_desc));
584 priv->aRD1Ring[i-1].next_desc = cpu_to_le32(priv->rd1_pool_dma);
585 priv->pCurrRD[1] = &priv->aRD1Ring[0];
588 static void device_free_rd0_ring(struct vnt_private *priv)
592 for (i = 0; i < priv->opts.rx_descs0; i++) {
593 struct vnt_rx_desc *desc = &(priv->aRD0Ring[i]);
594 struct vnt_rd_info *rd_info = desc->rd_info;
596 dma_unmap_single(&priv->pcid->dev, rd_info->skb_dma,
597 priv->rx_buf_sz, DMA_FROM_DEVICE);
599 dev_kfree_skb(rd_info->skb);
601 kfree(desc->rd_info);
605 static void device_free_rd1_ring(struct vnt_private *priv)
609 for (i = 0; i < priv->opts.rx_descs1; i++) {
610 struct vnt_rx_desc *desc = &priv->aRD1Ring[i];
611 struct vnt_rd_info *rd_info = desc->rd_info;
613 dma_unmap_single(&priv->pcid->dev, rd_info->skb_dma,
614 priv->rx_buf_sz, DMA_FROM_DEVICE);
616 dev_kfree_skb(rd_info->skb);
618 kfree(desc->rd_info);
622 static void device_init_td0_ring(struct vnt_private *priv)
626 struct vnt_tx_desc *desc;
628 curr = priv->td0_pool_dma;
629 for (i = 0; i < priv->opts.tx_descs[0];
630 i++, curr += sizeof(struct vnt_tx_desc)) {
631 desc = &priv->apTD0Rings[i];
632 desc->td_info = kzalloc(sizeof(*desc->td_info), GFP_ATOMIC);
634 desc->td_info->buf = priv->tx0_bufs + i * PKT_BUF_SZ;
635 desc->td_info->buf_dma = priv->tx_bufs_dma0 + i * PKT_BUF_SZ;
637 desc->next = &(priv->apTD0Rings[(i+1) % priv->opts.tx_descs[0]]);
638 desc->next_desc = cpu_to_le32(curr + sizeof(struct vnt_tx_desc));
642 priv->apTD0Rings[i-1].next_desc = cpu_to_le32(priv->td0_pool_dma);
643 priv->apTailTD[0] = priv->apCurrTD[0] = &priv->apTD0Rings[0];
646 static void device_init_td1_ring(struct vnt_private *priv)
650 struct vnt_tx_desc *desc;
652 /* Init the TD ring entries */
653 curr = priv->td1_pool_dma;
654 for (i = 0; i < priv->opts.tx_descs[1];
655 i++, curr += sizeof(struct vnt_tx_desc)) {
656 desc = &priv->apTD1Rings[i];
657 desc->td_info = kzalloc(sizeof(*desc->td_info), GFP_ATOMIC);
659 desc->td_info->buf = priv->tx1_bufs + i * PKT_BUF_SZ;
660 desc->td_info->buf_dma = priv->tx_bufs_dma1 + i * PKT_BUF_SZ;
662 desc->next = &(priv->apTD1Rings[(i + 1) % priv->opts.tx_descs[1]]);
663 desc->next_desc = cpu_to_le32(curr + sizeof(struct vnt_tx_desc));
667 priv->apTD1Rings[i-1].next_desc = cpu_to_le32(priv->td1_pool_dma);
668 priv->apTailTD[1] = priv->apCurrTD[1] = &priv->apTD1Rings[0];
671 static void device_free_td0_ring(struct vnt_private *priv)
675 for (i = 0; i < priv->opts.tx_descs[0]; i++) {
676 struct vnt_tx_desc *desc = &priv->apTD0Rings[i];
677 struct vnt_td_info *td_info = desc->td_info;
679 dev_kfree_skb(td_info->skb);
680 kfree(desc->td_info);
684 static void device_free_td1_ring(struct vnt_private *priv)
688 for (i = 0; i < priv->opts.tx_descs[1]; i++) {
689 struct vnt_tx_desc *desc = &priv->apTD1Rings[i];
690 struct vnt_td_info *td_info = desc->td_info;
692 dev_kfree_skb(td_info->skb);
693 kfree(desc->td_info);
697 /*-----------------------------------------------------------------*/
699 static int device_rx_srv(struct vnt_private *priv, unsigned int idx)
701 struct vnt_rx_desc *rd;
704 for (rd = priv->pCurrRD[idx];
705 rd->rd0.owner == OWNED_BY_HOST;
710 if (!rd->rd_info->skb)
713 if (vnt_receive_frame(priv, rd)) {
714 if (!device_alloc_rx_buf(priv, rd)) {
715 dev_err(&priv->pcid->dev,
716 "can not allocate rx buf\n");
720 rd->rd0.owner = OWNED_BY_NIC;
723 priv->pCurrRD[idx] = rd;
728 static bool device_alloc_rx_buf(struct vnt_private *priv,
729 struct vnt_rx_desc *rd)
731 struct vnt_rd_info *rd_info = rd->rd_info;
733 rd_info->skb = dev_alloc_skb((int)priv->rx_buf_sz);
738 dma_map_single(&priv->pcid->dev,
739 skb_put(rd_info->skb, skb_tailroom(rd_info->skb)),
740 priv->rx_buf_sz, DMA_FROM_DEVICE);
741 if (dma_mapping_error(&priv->pcid->dev, rd_info->skb_dma)) {
742 dev_kfree_skb(rd_info->skb);
747 *((unsigned int *)&rd->rd0) = 0; /* FIX cast */
749 rd->rd0.res_count = cpu_to_le16(priv->rx_buf_sz);
750 rd->rd0.owner = OWNED_BY_NIC;
751 rd->rd1.req_count = cpu_to_le16(priv->rx_buf_sz);
752 rd->buff_addr = cpu_to_le32(rd_info->skb_dma);
757 static const u8 fallback_rate0[5][5] = {
758 {RATE_18M, RATE_18M, RATE_12M, RATE_12M, RATE_12M},
759 {RATE_24M, RATE_24M, RATE_18M, RATE_12M, RATE_12M},
760 {RATE_36M, RATE_36M, RATE_24M, RATE_18M, RATE_18M},
761 {RATE_48M, RATE_48M, RATE_36M, RATE_24M, RATE_24M},
762 {RATE_54M, RATE_54M, RATE_48M, RATE_36M, RATE_36M}
765 static const u8 fallback_rate1[5][5] = {
766 {RATE_18M, RATE_18M, RATE_12M, RATE_6M, RATE_6M},
767 {RATE_24M, RATE_24M, RATE_18M, RATE_6M, RATE_6M},
768 {RATE_36M, RATE_36M, RATE_24M, RATE_12M, RATE_12M},
769 {RATE_48M, RATE_48M, RATE_24M, RATE_12M, RATE_12M},
770 {RATE_54M, RATE_54M, RATE_36M, RATE_18M, RATE_18M}
773 static int vnt_int_report_rate(struct vnt_private *priv,
774 struct vnt_td_info *context, u8 tsr0, u8 tsr1)
776 struct vnt_tx_fifo_head *fifo_head;
777 struct ieee80211_tx_info *info;
778 struct ieee80211_rate *rate;
780 u8 tx_retry = (tsr0 & TSR0_NCR);
789 fifo_head = (struct vnt_tx_fifo_head *)context->buf;
790 fb_option = (le16_to_cpu(fifo_head->fifo_ctl) &
791 (FIFOCTL_AUTO_FB_0 | FIFOCTL_AUTO_FB_1));
793 info = IEEE80211_SKB_CB(context->skb);
794 idx = info->control.rates[0].idx;
796 if (fb_option && !(tsr1 & TSR1_TERR)) {
800 rate = ieee80211_get_tx_rate(priv->hw, info);
801 tx_rate = rate->hw_value - RATE_18M;
806 if (fb_option & FIFOCTL_AUTO_FB_0)
807 tx_rate = fallback_rate0[tx_rate][retry];
808 else if (fb_option & FIFOCTL_AUTO_FB_1)
809 tx_rate = fallback_rate1[tx_rate][retry];
811 if (info->band == NL80211_BAND_5GHZ)
812 idx = tx_rate - RATE_6M;
817 ieee80211_tx_info_clear_status(info);
819 info->status.rates[0].count = tx_retry;
821 if (!(tsr1 & TSR1_TERR)) {
822 info->status.rates[0].idx = idx;
824 if (info->flags & IEEE80211_TX_CTL_NO_ACK)
825 info->flags |= IEEE80211_TX_STAT_NOACK_TRANSMITTED;
827 info->flags |= IEEE80211_TX_STAT_ACK;
833 static int device_tx_srv(struct vnt_private *priv, unsigned int idx)
835 struct vnt_tx_desc *desc;
837 unsigned char byTsr0;
838 unsigned char byTsr1;
840 for (desc = priv->apTailTD[idx]; priv->iTDUsed[idx] > 0; desc = desc->next) {
841 if (desc->td0.owner == OWNED_BY_NIC)
846 byTsr0 = desc->td0.tsr0;
847 byTsr1 = desc->td0.tsr1;
849 /* Only the status of first TD in the chain is correct */
850 if (desc->td1.tcr & TCR_STP) {
851 if ((desc->td_info->flags & TD_FLAGS_NETIF_SKB) != 0) {
852 if (!(byTsr1 & TSR1_TERR)) {
854 pr_debug(" Tx[%d] OK but has error. tsr1[%02X] tsr0[%02X]\n",
859 pr_debug(" Tx[%d] dropped & tsr1[%02X] tsr0[%02X]\n",
860 (int)idx, byTsr1, byTsr0);
864 if (byTsr1 & TSR1_TERR) {
865 if ((desc->td_info->flags & TD_FLAGS_PRIV_SKB) != 0) {
866 pr_debug(" Tx[%d] fail has error. tsr1[%02X] tsr0[%02X]\n",
867 (int)idx, byTsr1, byTsr0);
871 vnt_int_report_rate(priv, desc->td_info, byTsr0, byTsr1);
873 device_free_tx_buf(priv, desc);
874 priv->iTDUsed[idx]--;
878 priv->apTailTD[idx] = desc;
883 static void device_error(struct vnt_private *priv, unsigned short status)
885 if (status & ISR_FETALERR) {
886 dev_err(&priv->pcid->dev, "Hardware fatal error\n");
893 static void device_free_tx_buf(struct vnt_private *priv,
894 struct vnt_tx_desc *desc)
896 struct vnt_td_info *td_info = desc->td_info;
897 struct sk_buff *skb = td_info->skb;
900 ieee80211_tx_status_irqsafe(priv->hw, skb);
906 static void vnt_check_bb_vga(struct vnt_private *priv)
911 if (!priv->bUpdateBBVGA)
914 if (priv->hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
917 if (!(priv->vif->bss_conf.assoc && priv->uCurrRSSI))
920 RFvRSSITodBm(priv, (u8)priv->uCurrRSSI, &dbm);
922 for (i = 0; i < BB_VGA_LEVEL; i++) {
923 if (dbm < priv->ldBmThreshold[i]) {
924 priv->byBBVGANew = priv->abyBBVGA[i];
929 if (priv->byBBVGANew == priv->byBBVGACurrent) {
930 priv->uBBVGADiffCount = 1;
934 priv->uBBVGADiffCount++;
936 if (priv->uBBVGADiffCount == 1) {
937 /* first VGA diff gain */
938 BBvSetVGAGainOffset(priv, priv->byBBVGANew);
940 dev_dbg(&priv->pcid->dev,
941 "First RSSI[%d] NewGain[%d] OldGain[%d] Count[%d]\n",
942 (int)dbm, priv->byBBVGANew,
943 priv->byBBVGACurrent,
944 (int)priv->uBBVGADiffCount);
947 if (priv->uBBVGADiffCount >= BB_VGA_CHANGE_THRESHOLD) {
948 dev_dbg(&priv->pcid->dev,
949 "RSSI[%d] NewGain[%d] OldGain[%d] Count[%d]\n",
950 (int)dbm, priv->byBBVGANew,
951 priv->byBBVGACurrent,
952 (int)priv->uBBVGADiffCount);
954 BBvSetVGAGainOffset(priv, priv->byBBVGANew);
958 static void vnt_interrupt_process(struct vnt_private *priv)
960 struct ieee80211_low_level_stats *low_stats = &priv->low_stats;
966 MACvReadISR(priv->PortOffset, &isr);
971 if (isr == 0xffffffff) {
972 pr_debug("isr = 0xffff\n");
976 spin_lock_irqsave(&priv->lock, flags);
978 /* Read low level stats */
979 MACvReadMIBCounter(priv->PortOffset, &mib_counter);
981 low_stats->dot11RTSSuccessCount += mib_counter & 0xff;
982 low_stats->dot11RTSFailureCount += (mib_counter >> 8) & 0xff;
983 low_stats->dot11ACKFailureCount += (mib_counter >> 16) & 0xff;
984 low_stats->dot11FCSErrorCount += (mib_counter >> 24) & 0xff;
988 * Must do this after doing rx/tx, cause ISR bit is slow
989 * than RD/TD write back
992 while (isr && priv->vif) {
993 MACvWriteISR(priv->PortOffset, isr);
995 if (isr & ISR_FETALERR) {
996 pr_debug(" ISR_FETALERR\n");
997 VNSvOutPortB(priv->PortOffset + MAC_REG_SOFTPWRCTL, 0);
998 VNSvOutPortW(priv->PortOffset +
999 MAC_REG_SOFTPWRCTL, SOFTPWRCTL_SWPECTI);
1000 device_error(priv, isr);
1003 if (isr & ISR_TBTT) {
1004 if (priv->op_mode != NL80211_IFTYPE_ADHOC)
1005 vnt_check_bb_vga(priv);
1007 priv->bBeaconSent = false;
1008 if (priv->bEnablePSMode)
1009 PSbIsNextTBTTWakeUp((void *)priv);
1011 if ((priv->op_mode == NL80211_IFTYPE_AP ||
1012 priv->op_mode == NL80211_IFTYPE_ADHOC) &&
1013 priv->vif->bss_conf.enable_beacon) {
1014 MACvOneShotTimer1MicroSec(priv,
1015 (priv->vif->bss_conf.beacon_int - MAKE_BEACON_RESERVED) << 10);
1018 /* TODO: adhoc PS mode */
1021 if (isr & ISR_BNTX) {
1022 if (priv->op_mode == NL80211_IFTYPE_ADHOC) {
1023 priv->bIsBeaconBufReadySet = false;
1024 priv->cbBeaconBufReadySetCnt = 0;
1027 priv->bBeaconSent = true;
1030 if (isr & ISR_RXDMA0)
1031 max_count += device_rx_srv(priv, TYPE_RXDMA0);
1033 if (isr & ISR_RXDMA1)
1034 max_count += device_rx_srv(priv, TYPE_RXDMA1);
1036 if (isr & ISR_TXDMA0)
1037 max_count += device_tx_srv(priv, TYPE_TXDMA0);
1039 if (isr & ISR_AC0DMA)
1040 max_count += device_tx_srv(priv, TYPE_AC0DMA);
1042 if (isr & ISR_SOFTTIMER1) {
1043 if (priv->vif->bss_conf.enable_beacon)
1044 vnt_beacon_make(priv, priv->vif);
1047 /* If both buffers available wake the queue */
1048 if (AVAIL_TD(priv, TYPE_TXDMA0) &&
1049 AVAIL_TD(priv, TYPE_AC0DMA) &&
1050 ieee80211_queue_stopped(priv->hw, 0))
1051 ieee80211_wake_queues(priv->hw);
1053 MACvReadISR(priv->PortOffset, &isr);
1055 MACvReceive0(priv->PortOffset);
1056 MACvReceive1(priv->PortOffset);
1058 if (max_count > priv->opts.int_works)
1062 spin_unlock_irqrestore(&priv->lock, flags);
1065 static void vnt_interrupt_work(struct work_struct *work)
1067 struct vnt_private *priv =
1068 container_of(work, struct vnt_private, interrupt_work);
1071 vnt_interrupt_process(priv);
1073 MACvIntEnable(priv->PortOffset, IMR_MASK_VALUE);
1076 static irqreturn_t vnt_interrupt(int irq, void *arg)
1078 struct vnt_private *priv = arg;
1080 schedule_work(&priv->interrupt_work);
1082 MACvIntDisable(priv->PortOffset);
1087 static int vnt_tx_packet(struct vnt_private *priv, struct sk_buff *skb)
1089 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
1090 struct vnt_tx_desc *head_td;
1092 unsigned long flags;
1094 spin_lock_irqsave(&priv->lock, flags);
1096 if (ieee80211_is_data(hdr->frame_control))
1097 dma_idx = TYPE_AC0DMA;
1099 dma_idx = TYPE_TXDMA0;
1101 if (AVAIL_TD(priv, dma_idx) < 1) {
1102 spin_unlock_irqrestore(&priv->lock, flags);
1103 ieee80211_stop_queues(priv->hw);
1107 head_td = priv->apCurrTD[dma_idx];
1109 head_td->td1.tcr = 0;
1111 head_td->td_info->skb = skb;
1113 if (dma_idx == TYPE_AC0DMA)
1114 head_td->td_info->flags = TD_FLAGS_NETIF_SKB;
1116 priv->apCurrTD[dma_idx] = head_td->next;
1118 spin_unlock_irqrestore(&priv->lock, flags);
1120 vnt_generate_fifo_header(priv, dma_idx, head_td, skb);
1122 spin_lock_irqsave(&priv->lock, flags);
1124 priv->bPWBitOn = false;
1126 /* Set TSR1 & ReqCount in TxDescHead */
1127 head_td->td1.tcr |= (TCR_STP | TCR_EDP | EDMSDU);
1128 head_td->td1.req_count = cpu_to_le16(head_td->td_info->req_count);
1130 head_td->buff_addr = cpu_to_le32(head_td->td_info->buf_dma);
1132 /* Poll Transmit the adapter */
1134 head_td->td0.owner = OWNED_BY_NIC;
1135 wmb(); /* second memory barrier */
1137 if (head_td->td_info->flags & TD_FLAGS_NETIF_SKB)
1138 MACvTransmitAC0(priv->PortOffset);
1140 MACvTransmit0(priv->PortOffset);
1142 priv->iTDUsed[dma_idx]++;
1144 spin_unlock_irqrestore(&priv->lock, flags);
1149 static void vnt_tx_80211(struct ieee80211_hw *hw,
1150 struct ieee80211_tx_control *control,
1151 struct sk_buff *skb)
1153 struct vnt_private *priv = hw->priv;
1155 if (vnt_tx_packet(priv, skb))
1156 ieee80211_free_txskb(hw, skb);
1159 static int vnt_start(struct ieee80211_hw *hw)
1161 struct vnt_private *priv = hw->priv;
1164 priv->rx_buf_sz = PKT_BUF_SZ;
1165 if (!device_init_rings(priv))
1168 ret = request_irq(priv->pcid->irq, vnt_interrupt,
1169 IRQF_SHARED, "vt6655", priv);
1171 dev_dbg(&priv->pcid->dev, "failed to start irq\n");
1175 dev_dbg(&priv->pcid->dev, "call device init rd0 ring\n");
1176 device_init_rd0_ring(priv);
1177 device_init_rd1_ring(priv);
1178 device_init_td0_ring(priv);
1179 device_init_td1_ring(priv);
1181 device_init_registers(priv);
1183 dev_dbg(&priv->pcid->dev, "call MACvIntEnable\n");
1184 MACvIntEnable(priv->PortOffset, IMR_MASK_VALUE);
1186 ieee80211_wake_queues(hw);
1191 static void vnt_stop(struct ieee80211_hw *hw)
1193 struct vnt_private *priv = hw->priv;
1195 ieee80211_stop_queues(hw);
1197 cancel_work_sync(&priv->interrupt_work);
1200 MACbSoftwareReset(priv);
1201 CARDbRadioPowerOff(priv);
1203 device_free_td0_ring(priv);
1204 device_free_td1_ring(priv);
1205 device_free_rd0_ring(priv);
1206 device_free_rd1_ring(priv);
1207 device_free_rings(priv);
1209 free_irq(priv->pcid->irq, priv);
1212 static int vnt_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
1214 struct vnt_private *priv = hw->priv;
1218 switch (vif->type) {
1219 case NL80211_IFTYPE_STATION:
1221 case NL80211_IFTYPE_ADHOC:
1222 MACvRegBitsOff(priv->PortOffset, MAC_REG_RCR, RCR_UNICAST);
1224 MACvRegBitsOn(priv->PortOffset, MAC_REG_HOSTCR, HOSTCR_ADHOC);
1227 case NL80211_IFTYPE_AP:
1228 MACvRegBitsOff(priv->PortOffset, MAC_REG_RCR, RCR_UNICAST);
1230 MACvRegBitsOn(priv->PortOffset, MAC_REG_HOSTCR, HOSTCR_AP);
1237 priv->op_mode = vif->type;
1242 static void vnt_remove_interface(struct ieee80211_hw *hw,
1243 struct ieee80211_vif *vif)
1245 struct vnt_private *priv = hw->priv;
1247 switch (vif->type) {
1248 case NL80211_IFTYPE_STATION:
1250 case NL80211_IFTYPE_ADHOC:
1251 MACvRegBitsOff(priv->PortOffset, MAC_REG_TCR, TCR_AUTOBCNTX);
1252 MACvRegBitsOff(priv->PortOffset,
1253 MAC_REG_TFTCTL, TFTCTL_TSFCNTREN);
1254 MACvRegBitsOff(priv->PortOffset, MAC_REG_HOSTCR, HOSTCR_ADHOC);
1256 case NL80211_IFTYPE_AP:
1257 MACvRegBitsOff(priv->PortOffset, MAC_REG_TCR, TCR_AUTOBCNTX);
1258 MACvRegBitsOff(priv->PortOffset,
1259 MAC_REG_TFTCTL, TFTCTL_TSFCNTREN);
1260 MACvRegBitsOff(priv->PortOffset, MAC_REG_HOSTCR, HOSTCR_AP);
1266 priv->op_mode = NL80211_IFTYPE_UNSPECIFIED;
1269 static int vnt_config(struct ieee80211_hw *hw, u32 changed)
1271 struct vnt_private *priv = hw->priv;
1272 struct ieee80211_conf *conf = &hw->conf;
1275 if (changed & IEEE80211_CONF_CHANGE_PS) {
1276 if (conf->flags & IEEE80211_CONF_PS)
1277 PSvEnablePowerSaving(priv, conf->listen_interval);
1279 PSvDisablePowerSaving(priv);
1282 if ((changed & IEEE80211_CONF_CHANGE_CHANNEL) ||
1283 (conf->flags & IEEE80211_CONF_OFFCHANNEL)) {
1284 set_channel(priv, conf->chandef.chan);
1286 if (conf->chandef.chan->band == NL80211_BAND_5GHZ)
1287 bb_type = BB_TYPE_11A;
1289 bb_type = BB_TYPE_11G;
1291 if (priv->byBBType != bb_type) {
1292 priv->byBBType = bb_type;
1294 CARDbSetPhyParameter(priv, priv->byBBType);
1298 if (changed & IEEE80211_CONF_CHANGE_POWER) {
1299 if (priv->byBBType == BB_TYPE_11B)
1300 priv->wCurrentRate = RATE_1M;
1302 priv->wCurrentRate = RATE_54M;
1304 RFbSetPower(priv, priv->wCurrentRate,
1305 conf->chandef.chan->hw_value);
1311 static void vnt_bss_info_changed(struct ieee80211_hw *hw,
1312 struct ieee80211_vif *vif,
1313 struct ieee80211_bss_conf *conf, u32 changed)
1315 struct vnt_private *priv = hw->priv;
1317 priv->current_aid = conf->aid;
1319 if (changed & BSS_CHANGED_BSSID && conf->bssid) {
1320 unsigned long flags;
1322 spin_lock_irqsave(&priv->lock, flags);
1324 MACvWriteBSSIDAddress(priv->PortOffset, (u8 *)conf->bssid);
1326 spin_unlock_irqrestore(&priv->lock, flags);
1329 if (changed & BSS_CHANGED_BASIC_RATES) {
1330 priv->basic_rates = conf->basic_rates;
1332 CARDvUpdateBasicTopRate(priv);
1334 dev_dbg(&priv->pcid->dev,
1335 "basic rates %x\n", conf->basic_rates);
1338 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
1339 if (conf->use_short_preamble) {
1340 MACvEnableBarkerPreambleMd(priv->PortOffset);
1341 priv->byPreambleType = true;
1343 MACvDisableBarkerPreambleMd(priv->PortOffset);
1344 priv->byPreambleType = false;
1348 if (changed & BSS_CHANGED_ERP_CTS_PROT) {
1349 if (conf->use_cts_prot)
1350 MACvEnableProtectMD(priv->PortOffset);
1352 MACvDisableProtectMD(priv->PortOffset);
1355 if (changed & BSS_CHANGED_ERP_SLOT) {
1356 if (conf->use_short_slot)
1357 priv->bShortSlotTime = true;
1359 priv->bShortSlotTime = false;
1361 CARDbSetPhyParameter(priv, priv->byBBType);
1362 BBvSetVGAGainOffset(priv, priv->abyBBVGA[0]);
1365 if (changed & BSS_CHANGED_TXPOWER)
1366 RFbSetPower(priv, priv->wCurrentRate,
1367 conf->chandef.chan->hw_value);
1369 if (changed & BSS_CHANGED_BEACON_ENABLED) {
1370 dev_dbg(&priv->pcid->dev,
1371 "Beacon enable %d\n", conf->enable_beacon);
1373 if (conf->enable_beacon) {
1374 vnt_beacon_enable(priv, vif, conf);
1376 MACvRegBitsOn(priv->PortOffset, MAC_REG_TCR,
1379 MACvRegBitsOff(priv->PortOffset, MAC_REG_TCR,
1384 if (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_BEACON_INFO) &&
1385 priv->op_mode != NL80211_IFTYPE_AP) {
1386 if (conf->assoc && conf->beacon_rate) {
1387 CARDbUpdateTSF(priv, conf->beacon_rate->hw_value,
1390 CARDbSetBeaconPeriod(priv, conf->beacon_int);
1392 CARDvSetFirstNextTBTT(priv, conf->beacon_int);
1394 VNSvOutPortB(priv->PortOffset + MAC_REG_TFTCTL,
1396 VNSvOutPortB(priv->PortOffset + MAC_REG_TFTCTL,
1402 static u64 vnt_prepare_multicast(struct ieee80211_hw *hw,
1403 struct netdev_hw_addr_list *mc_list)
1405 struct vnt_private *priv = hw->priv;
1406 struct netdev_hw_addr *ha;
1410 netdev_hw_addr_list_for_each(ha, mc_list) {
1411 bit_nr = ether_crc(ETH_ALEN, ha->addr) >> 26;
1413 mc_filter |= 1ULL << (bit_nr & 0x3f);
1416 priv->mc_list_count = mc_list->count;
1421 static void vnt_configure(struct ieee80211_hw *hw,
1422 unsigned int changed_flags,
1423 unsigned int *total_flags, u64 multicast)
1425 struct vnt_private *priv = hw->priv;
1428 *total_flags &= FIF_ALLMULTI | FIF_OTHER_BSS | FIF_BCN_PRBRESP_PROMISC;
1430 VNSvInPortB(priv->PortOffset + MAC_REG_RCR, &rx_mode);
1432 dev_dbg(&priv->pcid->dev, "rx mode in = %x\n", rx_mode);
1434 if (changed_flags & FIF_ALLMULTI) {
1435 if (*total_flags & FIF_ALLMULTI) {
1436 unsigned long flags;
1438 spin_lock_irqsave(&priv->lock, flags);
1440 if (priv->mc_list_count > 2) {
1441 MACvSelectPage1(priv->PortOffset);
1443 VNSvOutPortD(priv->PortOffset +
1444 MAC_REG_MAR0, 0xffffffff);
1445 VNSvOutPortD(priv->PortOffset +
1446 MAC_REG_MAR0 + 4, 0xffffffff);
1448 MACvSelectPage0(priv->PortOffset);
1450 MACvSelectPage1(priv->PortOffset);
1452 VNSvOutPortD(priv->PortOffset +
1453 MAC_REG_MAR0, (u32)multicast);
1454 VNSvOutPortD(priv->PortOffset +
1456 (u32)(multicast >> 32));
1458 MACvSelectPage0(priv->PortOffset);
1461 spin_unlock_irqrestore(&priv->lock, flags);
1463 rx_mode |= RCR_MULTICAST | RCR_BROADCAST;
1465 rx_mode &= ~(RCR_MULTICAST | RCR_BROADCAST);
1469 if (changed_flags & (FIF_OTHER_BSS | FIF_BCN_PRBRESP_PROMISC)) {
1470 rx_mode |= RCR_MULTICAST | RCR_BROADCAST;
1472 if (*total_flags & (FIF_OTHER_BSS | FIF_BCN_PRBRESP_PROMISC))
1473 rx_mode &= ~RCR_BSSID;
1475 rx_mode |= RCR_BSSID;
1478 VNSvOutPortB(priv->PortOffset + MAC_REG_RCR, rx_mode);
1480 dev_dbg(&priv->pcid->dev, "rx mode out= %x\n", rx_mode);
1483 static int vnt_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
1484 struct ieee80211_vif *vif, struct ieee80211_sta *sta,
1485 struct ieee80211_key_conf *key)
1487 struct vnt_private *priv = hw->priv;
1491 if (vnt_set_keys(hw, sta, vif, key))
1495 if (test_bit(key->hw_key_idx, &priv->key_entry_inuse))
1496 clear_bit(key->hw_key_idx, &priv->key_entry_inuse);
1504 static int vnt_get_stats(struct ieee80211_hw *hw,
1505 struct ieee80211_low_level_stats *stats)
1507 struct vnt_private *priv = hw->priv;
1509 memcpy(stats, &priv->low_stats, sizeof(*stats));
1514 static u64 vnt_get_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
1516 struct vnt_private *priv = hw->priv;
1519 CARDbGetCurrentTSF(priv, &tsf);
1524 static void vnt_set_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
1527 struct vnt_private *priv = hw->priv;
1529 CARDvUpdateNextTBTT(priv, tsf, vif->bss_conf.beacon_int);
1532 static void vnt_reset_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
1534 struct vnt_private *priv = hw->priv;
1536 /* reset TSF counter */
1537 VNSvOutPortB(priv->PortOffset + MAC_REG_TFTCTL, TFTCTL_TSFCNTRST);
1540 static const struct ieee80211_ops vnt_mac_ops = {
1544 .add_interface = vnt_add_interface,
1545 .remove_interface = vnt_remove_interface,
1546 .config = vnt_config,
1547 .bss_info_changed = vnt_bss_info_changed,
1548 .prepare_multicast = vnt_prepare_multicast,
1549 .configure_filter = vnt_configure,
1550 .set_key = vnt_set_key,
1551 .get_stats = vnt_get_stats,
1552 .get_tsf = vnt_get_tsf,
1553 .set_tsf = vnt_set_tsf,
1554 .reset_tsf = vnt_reset_tsf,
1557 static int vnt_init(struct vnt_private *priv)
1559 SET_IEEE80211_PERM_ADDR(priv->hw, priv->abyCurrentNetAddr);
1561 vnt_init_bands(priv);
1563 if (ieee80211_register_hw(priv->hw))
1566 priv->mac_hw = true;
1568 CARDbRadioPowerOff(priv);
1574 vt6655_probe(struct pci_dev *pcid, const struct pci_device_id *ent)
1576 struct vnt_private *priv;
1577 struct ieee80211_hw *hw;
1578 struct wiphy *wiphy;
1581 dev_notice(&pcid->dev,
1582 "%s Ver. %s\n", DEVICE_FULL_DRV_NAM, DEVICE_VERSION);
1584 dev_notice(&pcid->dev,
1585 "Copyright (c) 2003 VIA Networking Technologies, Inc.\n");
1587 hw = ieee80211_alloc_hw(sizeof(*priv), &vnt_mac_ops);
1589 dev_err(&pcid->dev, "could not register ieee80211_hw\n");
1596 spin_lock_init(&priv->lock);
1600 SET_IEEE80211_DEV(priv->hw, &pcid->dev);
1602 if (pci_enable_device(pcid)) {
1603 device_free_info(priv);
1608 "Before get pci_info memaddr is %x\n", priv->memaddr);
1610 pci_set_master(pcid);
1612 priv->memaddr = pci_resource_start(pcid, 0);
1613 priv->ioaddr = pci_resource_start(pcid, 1);
1614 priv->PortOffset = ioremap(priv->memaddr & PCI_BASE_ADDRESS_MEM_MASK,
1616 if (!priv->PortOffset) {
1617 dev_err(&pcid->dev, ": Failed to IO remapping ..\n");
1618 device_free_info(priv);
1622 rc = pci_request_regions(pcid, DEVICE_NAME);
1624 dev_err(&pcid->dev, ": Failed to find PCI device\n");
1625 device_free_info(priv);
1629 if (dma_set_mask(&pcid->dev, DMA_BIT_MASK(32))) {
1630 dev_err(&pcid->dev, ": Failed to set dma 32 bit mask\n");
1631 device_free_info(priv);
1635 INIT_WORK(&priv->interrupt_work, vnt_interrupt_work);
1638 if (!MACbSoftwareReset(priv)) {
1639 dev_err(&pcid->dev, ": Failed to access MAC hardware..\n");
1640 device_free_info(priv);
1643 /* initial to reload eeprom */
1644 MACvInitialize(priv);
1645 MACvReadEtherAddress(priv->PortOffset, priv->abyCurrentNetAddr);
1648 priv->byRFType = SROMbyReadEmbedded(priv->PortOffset, EEP_OFS_RFTYPE);
1649 priv->byRFType &= RF_MASK;
1651 dev_dbg(&pcid->dev, "RF Type = %x\n", priv->byRFType);
1653 device_get_options(priv);
1654 device_set_options(priv);
1656 wiphy = priv->hw->wiphy;
1658 wiphy->frag_threshold = FRAG_THRESH_DEF;
1659 wiphy->rts_threshold = RTS_THRESH_DEF;
1660 wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION) |
1661 BIT(NL80211_IFTYPE_ADHOC) | BIT(NL80211_IFTYPE_AP);
1663 ieee80211_hw_set(priv->hw, TIMING_BEACON_ONLY);
1664 ieee80211_hw_set(priv->hw, SIGNAL_DBM);
1665 ieee80211_hw_set(priv->hw, RX_INCLUDES_FCS);
1666 ieee80211_hw_set(priv->hw, REPORTS_TX_ACK_STATUS);
1667 ieee80211_hw_set(priv->hw, SUPPORTS_PS);
1669 priv->hw->max_signal = 100;
1671 if (vnt_init(priv)) {
1672 device_free_info(priv);
1676 device_print_info(priv);
1677 pci_set_drvdata(pcid, priv);
1682 /*------------------------------------------------------------------*/
1685 static int vt6655_suspend(struct pci_dev *pcid, pm_message_t state)
1687 struct vnt_private *priv = pci_get_drvdata(pcid);
1688 unsigned long flags;
1690 spin_lock_irqsave(&priv->lock, flags);
1692 pci_save_state(pcid);
1696 pci_disable_device(pcid);
1698 spin_unlock_irqrestore(&priv->lock, flags);
1700 pci_set_power_state(pcid, pci_choose_state(pcid, state));
1705 static int vt6655_resume(struct pci_dev *pcid)
1707 pci_set_power_state(pcid, PCI_D0);
1708 pci_enable_wake(pcid, PCI_D0, 0);
1709 pci_restore_state(pcid);
1715 MODULE_DEVICE_TABLE(pci, vt6655_pci_id_table);
1717 static struct pci_driver device_driver = {
1718 .name = DEVICE_NAME,
1719 .id_table = vt6655_pci_id_table,
1720 .probe = vt6655_probe,
1721 .remove = vt6655_remove,
1723 .suspend = vt6655_suspend,
1724 .resume = vt6655_resume,
1728 module_pci_driver(device_driver);