2 * This file is based on code from OCTEON SDK by Cavium Networks.
4 * Copyright (c) 2003-2010 Cavium Networks
6 * This file is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License, Version 2, as
8 * published by the Free Software Foundation.
11 #include <linux/module.h>
12 #include <linux/kernel.h>
13 #include <linux/cache.h>
14 #include <linux/cpumask.h>
15 #include <linux/netdevice.h>
16 #include <linux/etherdevice.h>
18 #include <linux/string.h>
19 #include <linux/prefetch.h>
20 #include <linux/ratelimit.h>
21 #include <linux/smp.h>
22 #include <linux/interrupt.h>
25 #include <linux/xfrm.h>
27 #endif /* CONFIG_XFRM */
29 #include <asm/octeon/octeon.h>
31 #include "ethernet-defines.h"
32 #include "ethernet-mem.h"
33 #include "ethernet-rx.h"
34 #include "octeon-ethernet.h"
35 #include "ethernet-util.h"
37 #include <asm/octeon/cvmx-helper.h>
38 #include <asm/octeon/cvmx-wqe.h>
39 #include <asm/octeon/cvmx-fau.h>
40 #include <asm/octeon/cvmx-pow.h>
41 #include <asm/octeon/cvmx-pip.h>
42 #include <asm/octeon/cvmx-scratch.h>
44 #include <asm/octeon/cvmx-gmxx-defs.h>
46 static atomic_t oct_rx_ready = ATOMIC_INIT(0);
48 static struct oct_rx_group {
51 struct napi_struct napi;
55 * cvm_oct_do_interrupt - interrupt handler.
56 * @irq: Interrupt number.
57 * @napi_id: Cookie to identify the NAPI instance.
59 * The interrupt occurs whenever the POW has packets in our group.
62 static irqreturn_t cvm_oct_do_interrupt(int irq, void *napi_id)
64 /* Disable the IRQ and start napi_poll. */
65 disable_irq_nosync(irq);
66 napi_schedule(napi_id);
72 * cvm_oct_check_rcv_error - process receive errors
73 * @work: Work queue entry pointing to the packet.
75 * Returns Non-zero if the packet can be dropped, zero otherwise.
77 static inline int cvm_oct_check_rcv_error(cvmx_wqe_t *work)
81 if (octeon_has_feature(OCTEON_FEATURE_PKND))
82 port = work->word0.pip.cn68xx.pknd;
84 port = work->word1.cn38xx.ipprt;
86 if ((work->word2.snoip.err_code == 10) && (work->word1.len <= 64))
88 * Ignore length errors on min size packets. Some
89 * equipment incorrectly pads packets to 64+4FCS
90 * instead of 60+4FCS. Note these packets still get
91 * counted as frame errors.
95 if (work->word2.snoip.err_code == 5 ||
96 work->word2.snoip.err_code == 7) {
98 * We received a packet with either an alignment error
99 * or a FCS error. This may be signalling that we are
100 * running 10Mbps with GMXX_RXX_FRM_CTL[PRE_CHK]
101 * off. If this is the case we need to parse the
102 * packet to determine if we can remove a non spec
103 * preamble and generate a correct packet.
105 int interface = cvmx_helper_get_interface_num(port);
106 int index = cvmx_helper_get_interface_index_num(port);
107 union cvmx_gmxx_rxx_frm_ctl gmxx_rxx_frm_ctl;
109 gmxx_rxx_frm_ctl.u64 =
110 cvmx_read_csr(CVMX_GMXX_RXX_FRM_CTL(index, interface));
111 if (gmxx_rxx_frm_ctl.s.pre_chk == 0) {
113 cvmx_phys_to_ptr(work->packet_ptr.s.addr);
116 while (i < work->word1.len - 1) {
124 /* Port received 0xd5 preamble */
125 work->packet_ptr.s.addr += i + 1;
126 work->word1.len -= i + 5;
130 if ((*ptr & 0xf) == 0xd) {
131 /* Port received 0xd preamble */
132 work->packet_ptr.s.addr += i;
133 work->word1.len -= i + 4;
134 for (i = 0; i < work->word1.len; i++) {
136 ((*ptr & 0xf0) >> 4) |
137 ((*(ptr + 1) & 0xf) << 4);
143 printk_ratelimited("Port %d unknown preamble, packet dropped\n",
145 cvm_oct_free_work(work);
150 printk_ratelimited("Port %d receive error code %d, packet dropped\n",
151 port, work->word2.snoip.err_code);
152 cvm_oct_free_work(work);
156 static void copy_segments_to_skb(cvmx_wqe_t *work, struct sk_buff *skb)
158 int segments = work->word2.s.bufs;
159 union cvmx_buf_ptr segment_ptr = work->packet_ptr;
160 int len = work->word1.len;
164 union cvmx_buf_ptr next_ptr;
166 next_ptr = *(union cvmx_buf_ptr *)
167 cvmx_phys_to_ptr(segment_ptr.s.addr - 8);
170 * Octeon Errata PKI-100: The segment size is wrong.
172 * Until it is fixed, calculate the segment size based on
173 * the packet pool buffer size.
174 * When it is fixed, the following line should be replaced
176 * int segment_size = segment_ptr.s.size;
179 CVMX_FPA_PACKET_POOL_SIZE -
180 (segment_ptr.s.addr -
181 (((segment_ptr.s.addr >> 7) -
182 segment_ptr.s.back) << 7));
184 /* Don't copy more than what is left in the packet */
185 if (segment_size > len)
188 /* Copy the data into the packet */
189 skb_put_data(skb, cvmx_phys_to_ptr(segment_ptr.s.addr),
192 segment_ptr = next_ptr;
196 static int cvm_oct_poll(struct oct_rx_group *rx_group, int budget)
198 const int coreid = cvmx_get_core_num();
202 int did_work_request = 0;
203 int packet_not_copied;
205 /* Prefetch cvm_oct_device since we know we need it soon */
206 prefetch(cvm_oct_device);
208 if (USE_ASYNC_IOBDMA) {
209 /* Save scratch in case userspace is using it */
211 old_scratch = cvmx_scratch_read64(CVMX_SCR_SCRATCH);
214 /* Only allow work for our group (and preserve priorities) */
215 if (OCTEON_IS_MODEL(OCTEON_CN68XX)) {
216 old_group_mask = cvmx_read_csr(CVMX_SSO_PPX_GRP_MSK(coreid));
217 cvmx_write_csr(CVMX_SSO_PPX_GRP_MSK(coreid),
218 BIT(rx_group->group));
219 cvmx_read_csr(CVMX_SSO_PPX_GRP_MSK(coreid)); /* Flush */
221 old_group_mask = cvmx_read_csr(CVMX_POW_PP_GRP_MSKX(coreid));
222 cvmx_write_csr(CVMX_POW_PP_GRP_MSKX(coreid),
223 (old_group_mask & ~0xFFFFull) |
224 BIT(rx_group->group));
227 if (USE_ASYNC_IOBDMA) {
228 cvmx_pow_work_request_async(CVMX_SCR_SCRATCH, CVMX_POW_NO_WAIT);
229 did_work_request = 1;
232 while (rx_count < budget) {
233 struct sk_buff *skb = NULL;
234 struct sk_buff **pskb = NULL;
239 if (USE_ASYNC_IOBDMA && did_work_request)
240 work = cvmx_pow_work_response_async(CVMX_SCR_SCRATCH);
242 work = cvmx_pow_work_request_sync(CVMX_POW_NO_WAIT);
245 did_work_request = 0;
247 if (OCTEON_IS_MODEL(OCTEON_CN68XX)) {
248 cvmx_write_csr(CVMX_SSO_WQ_IQ_DIS,
249 BIT(rx_group->group));
250 cvmx_write_csr(CVMX_SSO_WQ_INT,
251 BIT(rx_group->group));
253 union cvmx_pow_wq_int wq_int;
256 wq_int.s.iq_dis = BIT(rx_group->group);
257 wq_int.s.wq_int = BIT(rx_group->group);
258 cvmx_write_csr(CVMX_POW_WQ_INT, wq_int.u64);
262 pskb = (struct sk_buff **)
263 (cvm_oct_get_buffer_ptr(work->packet_ptr) -
267 if (USE_ASYNC_IOBDMA && rx_count < (budget - 1)) {
268 cvmx_pow_work_request_async_nocheck(CVMX_SCR_SCRATCH,
270 did_work_request = 1;
274 skb_in_hw = work->word2.s.bufs == 1;
275 if (likely(skb_in_hw)) {
277 prefetch(&skb->head);
281 if (octeon_has_feature(OCTEON_FEATURE_PKND))
282 port = work->word0.pip.cn68xx.pknd;
284 port = work->word1.cn38xx.ipprt;
286 prefetch(cvm_oct_device[port]);
288 /* Immediately throw away all packets with receive errors */
289 if (unlikely(work->word2.snoip.rcv_error)) {
290 if (cvm_oct_check_rcv_error(work))
295 * We can only use the zero copy path if skbuffs are
296 * in the FPA pool and the packet fits in a single
299 if (likely(skb_in_hw)) {
300 skb->data = skb->head + work->packet_ptr.s.addr -
301 cvmx_ptr_to_phys(skb->head);
303 skb->len = work->word1.len;
304 skb_set_tail_pointer(skb, skb->len);
305 packet_not_copied = 1;
308 * We have to copy the packet. First allocate
311 skb = dev_alloc_skb(work->word1.len);
313 cvm_oct_free_work(work);
318 * Check if we've received a packet that was
319 * entirely stored in the work entry.
321 if (unlikely(work->word2.s.bufs == 0)) {
322 u8 *ptr = work->packet_data;
324 if (likely(!work->word2.s.not_IP)) {
326 * The beginning of the packet
327 * moves for IP packets.
329 if (work->word2.s.is_v6)
334 skb_put_data(skb, ptr, work->word1.len);
335 /* No packet buffers to free */
337 copy_segments_to_skb(work, skb);
339 packet_not_copied = 0;
341 if (likely((port < TOTAL_NUMBER_OF_PORTS) &&
342 cvm_oct_device[port])) {
343 struct net_device *dev = cvm_oct_device[port];
346 * Only accept packets for devices that are
349 if (likely(dev->flags & IFF_UP)) {
350 skb->protocol = eth_type_trans(skb, dev);
353 if (unlikely(work->word2.s.not_IP ||
354 work->word2.s.IP_exc ||
355 work->word2.s.L4_error ||
356 !work->word2.s.tcp_or_udp))
357 skb->ip_summed = CHECKSUM_NONE;
359 skb->ip_summed = CHECKSUM_UNNECESSARY;
361 /* Increment RX stats for virtual ports */
362 if (port >= CVMX_PIP_NUM_INPUT_PORTS) {
363 dev->stats.rx_packets++;
364 dev->stats.rx_bytes += skb->len;
366 netif_receive_skb(skb);
369 * Drop any packet received for a device that
372 dev->stats.rx_dropped++;
373 dev_kfree_skb_irq(skb);
377 * Drop any packet received for a device that
380 printk_ratelimited("Port %d not controlled by Linux, packet dropped\n",
382 dev_kfree_skb_irq(skb);
385 * Check to see if the skbuff and work share the same
388 if (likely(packet_not_copied)) {
390 * This buffer needs to be replaced, increment
391 * the number of buffers we need to free by
394 cvmx_fau_atomic_add32(FAU_NUM_PACKET_BUFFERS_TO_FREE,
397 cvmx_fpa_free(work, CVMX_FPA_WQE_POOL, 1);
399 cvm_oct_free_work(work);
402 /* Restore the original POW group mask */
403 if (OCTEON_IS_MODEL(OCTEON_CN68XX)) {
404 cvmx_write_csr(CVMX_SSO_PPX_GRP_MSK(coreid), old_group_mask);
405 cvmx_read_csr(CVMX_SSO_PPX_GRP_MSK(coreid)); /* Flush */
407 cvmx_write_csr(CVMX_POW_PP_GRP_MSKX(coreid), old_group_mask);
410 if (USE_ASYNC_IOBDMA) {
411 /* Restore the scratch area */
412 cvmx_scratch_write64(CVMX_SCR_SCRATCH, old_scratch);
414 cvm_oct_rx_refill_pool(0);
420 * cvm_oct_napi_poll - the NAPI poll function.
421 * @napi: The NAPI instance.
422 * @budget: Maximum number of packets to receive.
424 * Returns the number of packets processed.
426 static int cvm_oct_napi_poll(struct napi_struct *napi, int budget)
428 struct oct_rx_group *rx_group = container_of(napi, struct oct_rx_group,
432 rx_count = cvm_oct_poll(rx_group, budget);
434 if (rx_count < budget) {
436 napi_complete_done(napi, rx_count);
437 enable_irq(rx_group->irq);
442 #ifdef CONFIG_NET_POLL_CONTROLLER
444 * cvm_oct_poll_controller - poll for receive packets
447 * @dev: Device to poll. Unused
449 void cvm_oct_poll_controller(struct net_device *dev)
453 if (!atomic_read(&oct_rx_ready))
456 for (i = 0; i < ARRAY_SIZE(oct_rx_group); i++) {
457 if (!(pow_receive_groups & BIT(i)))
460 cvm_oct_poll(&oct_rx_group[i], 16);
465 void cvm_oct_rx_initialize(void)
468 struct net_device *dev_for_napi = NULL;
470 for (i = 0; i < TOTAL_NUMBER_OF_PORTS; i++) {
471 if (cvm_oct_device[i]) {
472 dev_for_napi = cvm_oct_device[i];
478 panic("No net_devices were allocated.");
480 for (i = 0; i < ARRAY_SIZE(oct_rx_group); i++) {
483 if (!(pow_receive_groups & BIT(i)))
486 netif_napi_add(dev_for_napi, &oct_rx_group[i].napi,
487 cvm_oct_napi_poll, rx_napi_weight);
488 napi_enable(&oct_rx_group[i].napi);
490 oct_rx_group[i].irq = OCTEON_IRQ_WORKQ0 + i;
491 oct_rx_group[i].group = i;
493 /* Register an IRQ handler to receive POW interrupts */
494 ret = request_irq(oct_rx_group[i].irq, cvm_oct_do_interrupt, 0,
495 "Ethernet", &oct_rx_group[i].napi);
497 panic("Could not acquire Ethernet IRQ %d\n",
498 oct_rx_group[i].irq);
500 disable_irq_nosync(oct_rx_group[i].irq);
502 /* Enable POW interrupt when our port has at least one packet */
503 if (OCTEON_IS_MODEL(OCTEON_CN68XX)) {
504 union cvmx_sso_wq_int_thrx int_thr;
505 union cvmx_pow_wq_int_pc int_pc;
509 int_thr.s.tc_thr = 1;
510 cvmx_write_csr(CVMX_SSO_WQ_INT_THRX(i), int_thr.u64);
514 cvmx_write_csr(CVMX_SSO_WQ_INT_PC, int_pc.u64);
516 union cvmx_pow_wq_int_thrx int_thr;
517 union cvmx_pow_wq_int_pc int_pc;
521 int_thr.s.tc_thr = 1;
522 cvmx_write_csr(CVMX_POW_WQ_INT_THRX(i), int_thr.u64);
526 cvmx_write_csr(CVMX_POW_WQ_INT_PC, int_pc.u64);
529 /* Schedule NAPI now. This will indirectly enable the
532 napi_schedule(&oct_rx_group[i].napi);
534 atomic_inc(&oct_rx_ready);
537 void cvm_oct_rx_shutdown(void)
541 for (i = 0; i < ARRAY_SIZE(oct_rx_group); i++) {
542 if (!(pow_receive_groups & BIT(i)))
545 /* Disable POW interrupt */
546 if (OCTEON_IS_MODEL(OCTEON_CN68XX))
547 cvmx_write_csr(CVMX_SSO_WQ_INT_THRX(i), 0);
549 cvmx_write_csr(CVMX_POW_WQ_INT_THRX(i), 0);
551 /* Free the interrupt handler */
552 free_irq(oct_rx_group[i].irq, cvm_oct_device);
554 netif_napi_del(&oct_rx_group[i].napi);