1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/mtd/st,stm32-fmc2-nand.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: STMicroelectronics Flexible Memory Controller 2 (FMC2)
10 - Christophe Kerello <christophe.kerello@foss.st.com>
16 - st,stm32mp1-fmc2-nfc
27 - description: tx DMA channel
28 - description: rx DMA channel
29 - description: ecc DMA channel
40 $ref: raw-nand-chip.yaml
48 unevaluatedProperties: false
51 - $ref: nand-controller.yaml#
57 const: st,stm32mp15-fmc2
62 - description: Registers
63 - description: Chip select 0 data
64 - description: Chip select 0 command
65 - description: Chip select 0 address space
66 - description: Chip select 1 data
67 - description: Chip select 1 command
68 - description: Chip select 1 address space
83 const: st,stm32mp1-fmc2-nfc
88 - description: Chip select 0 data
89 - description: Chip select 0 command
90 - description: Chip select 0 address space
91 - description: Chip select 1 data
92 - description: Chip select 1 command
93 - description: Chip select 1 address space
100 unevaluatedProperties: false
104 #include <dt-bindings/interrupt-controller/arm-gic.h>
105 #include <dt-bindings/clock/stm32mp1-clks.h>
106 #include <dt-bindings/reset/stm32mp1-resets.h>
108 nand-controller@58002000 {
109 compatible = "st,stm32mp15-fmc2";
110 reg = <0x58002000 0x1000>,
117 interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
118 dmas = <&mdma1 20 0x2 0x12000a02 0x0 0x0>,
119 <&mdma1 20 0x2 0x12000a08 0x0 0x0>,
120 <&mdma1 21 0x2 0x12000a0a 0x0 0x0>;
121 dma-names = "tx", "rx", "ecc";
122 clocks = <&rcc FMC_K>;
123 resets = <&rcc FMC_R>;
124 #address-cells = <1>;
130 #address-cells = <1>;