1 // SPDX-License-Identifier: GPL-2.0
3 // Socionext UniPhier AIO ALSA driver for LD11/LD20.
5 // Copyright (c) 2016-2018 Socionext Inc.
7 #include <linux/module.h>
11 static const struct uniphier_aio_spec uniphier_aio_ld11[] = {
12 /* for HDMI PCM In, Pin:AI1Dx */
14 .name = AUD_NAME_PCMIN1,
15 .gname = AUD_GNAME_HDMI,
17 .type = PORT_TYPE_I2S,
18 .dir = PORT_DIR_INPUT,
22 .iport = { 0, AUD_HW_PCMIN1, },
26 /* for SIF In, Pin:AI2Dx */
28 .name = AUD_NAME_PCMIN2,
30 .type = PORT_TYPE_I2S,
31 .dir = PORT_DIR_INPUT,
35 .iport = { 1, AUD_HW_PCMIN2, },
39 /* for Line In, Pin:AI3Dx */
41 .name = AUD_NAME_PCMIN3,
42 .gname = AUD_GNAME_LINE,
44 .type = PORT_TYPE_EVE,
45 .dir = PORT_DIR_INPUT,
49 .iport = { 2, AUD_HW_PCMIN3, },
53 /* for S/PDIF In, Pin:AI1IEC */
55 .name = AUD_NAME_IECIN1,
56 .gname = AUD_GNAME_IEC,
58 .type = PORT_TYPE_SPDIF,
59 .dir = PORT_DIR_INPUT,
63 .iport = { 3, AUD_HW_IECIN1, },
67 /* for Speaker, Pin:AO1Dx */
69 .name = AUD_NAME_HPCMOUT1,
71 .type = PORT_TYPE_I2S,
72 .dir = PORT_DIR_OUTPUT,
76 .oport = { 0, AUD_HW_HPCMOUT1, },
80 /* for HDMI PCM, Pin:AO2Dx */
82 .name = AUD_NAME_PCMOUT1,
83 .gname = AUD_GNAME_HDMI,
85 .type = PORT_TYPE_I2S,
86 .dir = PORT_DIR_OUTPUT,
90 .oport = { 3, AUD_HW_PCMOUT1, },
94 /* for Line Out, Pin:LO2_x */
96 .name = AUD_NAME_PCMOUT2,
97 .gname = AUD_GNAME_LINE,
99 .type = PORT_TYPE_EVE,
100 .dir = PORT_DIR_OUTPUT,
104 .oport = { 1, AUD_HW_PCMOUT2, },
108 /* for Headphone, Pin:HP1_x */
110 .name = AUD_NAME_PCMOUT3,
112 .type = PORT_TYPE_EVE,
113 .dir = PORT_DIR_OUTPUT,
117 .oport = { 2, AUD_HW_PCMOUT3, },
121 /* for HW Sampling Rate Converter */
123 .name = AUD_NAME_EPCMOUT2,
125 .type = PORT_TYPE_CONV,
126 .dir = PORT_DIR_OUTPUT,
130 .oport = { 6, AUD_HW_EPCMOUT2, },
136 /* for HW Sampling Rate Converter 2 */
138 .name = AUD_NAME_EPCMOUT3,
140 .type = PORT_TYPE_CONV,
141 .dir = PORT_DIR_OUTPUT,
145 .oport = { 7, AUD_HW_EPCMOUT3, },
151 /* for S/PDIF Out, Pin:AO1IEC */
153 .name = AUD_NAME_HIECOUT1,
154 .gname = AUD_GNAME_IEC,
156 .type = PORT_TYPE_SPDIF,
157 .dir = PORT_DIR_OUTPUT,
161 .oport = { 12, AUD_HW_HIECOUT1, },
165 /* for S/PDIF Out, Pin:AO1IEC, Compress */
167 .name = AUD_NAME_HIECCOMPOUT1,
168 .gname = AUD_GNAME_IEC,
170 .type = PORT_TYPE_SPDIF,
171 .dir = PORT_DIR_OUTPUT,
175 .oport = { 12, AUD_HW_HIECOUT1, },
180 static const struct uniphier_aio_pll uniphier_aio_pll_ld11[] = {
181 [AUD_PLL_A1] = { .enable = true, },
182 [AUD_PLL_F1] = { .enable = true, },
183 [AUD_PLL_A2] = { .enable = true, },
184 [AUD_PLL_F2] = { .enable = true, },
185 [AUD_PLL_APLL] = { .enable = true, },
186 [AUD_PLL_RX0] = { .enable = true, },
187 [AUD_PLL_USB0] = { .enable = true, },
188 [AUD_PLL_HSC0] = { .enable = true, },
191 static struct snd_soc_dai_driver uniphier_aio_dai_ld11[] = {
193 .name = AUD_GNAME_HDMI,
195 .stream_name = AUD_NAME_PCMOUT1,
196 .formats = SNDRV_PCM_FMTBIT_S32_LE,
197 .rates = SNDRV_PCM_RATE_48000,
202 .stream_name = AUD_NAME_PCMIN1,
203 .formats = SNDRV_PCM_FMTBIT_S32_LE,
204 .rates = SNDRV_PCM_RATE_48000 |
205 SNDRV_PCM_RATE_44100 |
206 SNDRV_PCM_RATE_32000,
210 .ops = &uniphier_aio_i2s_ld11_ops,
213 .name = AUD_NAME_PCMIN2,
215 .stream_name = AUD_NAME_PCMIN2,
216 .formats = SNDRV_PCM_FMTBIT_S32_LE,
217 .rates = SNDRV_PCM_RATE_48000,
221 .ops = &uniphier_aio_i2s_ld11_ops,
224 .name = AUD_GNAME_LINE,
226 .stream_name = AUD_NAME_PCMOUT2,
227 .formats = SNDRV_PCM_FMTBIT_S32_LE,
228 .rates = SNDRV_PCM_RATE_48000,
233 .stream_name = AUD_NAME_PCMIN3,
234 .formats = SNDRV_PCM_FMTBIT_S32_LE,
235 .rates = SNDRV_PCM_RATE_48000,
239 .ops = &uniphier_aio_i2s_ld11_ops,
242 .name = AUD_NAME_HPCMOUT1,
244 .stream_name = AUD_NAME_HPCMOUT1,
245 .formats = SNDRV_PCM_FMTBIT_S32_LE,
246 .rates = SNDRV_PCM_RATE_48000,
250 .ops = &uniphier_aio_i2s_ld11_ops,
253 .name = AUD_NAME_PCMOUT3,
255 .stream_name = AUD_NAME_PCMOUT3,
256 .formats = SNDRV_PCM_FMTBIT_S32_LE,
257 .rates = SNDRV_PCM_RATE_48000,
261 .ops = &uniphier_aio_i2s_ld11_ops,
264 .name = AUD_NAME_HIECOUT1,
266 .stream_name = AUD_NAME_HIECOUT1,
267 .formats = SNDRV_PCM_FMTBIT_S32_LE,
268 .rates = SNDRV_PCM_RATE_48000,
272 .ops = &uniphier_aio_spdif_ld11_ops,
275 .name = AUD_NAME_EPCMOUT2,
277 .stream_name = AUD_NAME_EPCMOUT2,
278 .formats = SNDRV_PCM_FMTBIT_S32_LE,
279 .rates = SNDRV_PCM_RATE_48000 |
280 SNDRV_PCM_RATE_44100 |
281 SNDRV_PCM_RATE_32000,
285 .ops = &uniphier_aio_i2s_ld11_ops,
288 .name = AUD_NAME_EPCMOUT3,
290 .stream_name = AUD_NAME_EPCMOUT3,
291 .formats = SNDRV_PCM_FMTBIT_S32_LE,
292 .rates = SNDRV_PCM_RATE_48000 |
293 SNDRV_PCM_RATE_44100 |
294 SNDRV_PCM_RATE_32000,
298 .ops = &uniphier_aio_i2s_ld11_ops,
301 .name = AUD_NAME_HIECCOMPOUT1,
303 .stream_name = AUD_NAME_HIECCOMPOUT1,
307 .ops = &uniphier_aio_spdif_ld11_ops2,
311 static const struct uniphier_aio_chip_spec uniphier_aio_ld11_spec = {
312 .specs = uniphier_aio_ld11,
313 .num_specs = ARRAY_SIZE(uniphier_aio_ld11),
314 .dais = uniphier_aio_dai_ld11,
315 .num_dais = ARRAY_SIZE(uniphier_aio_dai_ld11),
316 .plls = uniphier_aio_pll_ld11,
317 .num_plls = ARRAY_SIZE(uniphier_aio_pll_ld11),
321 static const struct uniphier_aio_chip_spec uniphier_aio_ld20_spec = {
322 .specs = uniphier_aio_ld11,
323 .num_specs = ARRAY_SIZE(uniphier_aio_ld11),
324 .dais = uniphier_aio_dai_ld11,
325 .num_dais = ARRAY_SIZE(uniphier_aio_dai_ld11),
326 .plls = uniphier_aio_pll_ld11,
327 .num_plls = ARRAY_SIZE(uniphier_aio_pll_ld11),
331 static const struct of_device_id uniphier_aio_of_match[] __maybe_unused = {
333 .compatible = "socionext,uniphier-ld11-aio",
334 .data = &uniphier_aio_ld11_spec,
337 .compatible = "socionext,uniphier-ld20-aio",
338 .data = &uniphier_aio_ld20_spec,
342 MODULE_DEVICE_TABLE(of, uniphier_aio_of_match);
344 static struct platform_driver uniphier_aio_driver = {
346 .name = "snd-uniphier-aio-ld11",
347 .of_match_table = of_match_ptr(uniphier_aio_of_match),
349 .probe = uniphier_aio_probe,
350 .remove_new = uniphier_aio_remove,
352 module_platform_driver(uniphier_aio_driver);
354 MODULE_AUTHOR("Katsuhiro Suzuki <suzuki.katsuhiro@socionext.com>");
355 MODULE_DESCRIPTION("UniPhier LD11/LD20 AIO driver.");
356 MODULE_LICENSE("GPL v2");