1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
3 // This file is provided under a dual BSD/GPLv2 license. When using or
4 // redistributing this file, you may do so under either license.
6 // Copyright(c) 2022 Intel Corporation. All rights reserved.
8 // Authors: Rander Wang <rander.wang@linux.intel.com>
9 // Peter Ujfalusi <peter.ujfalusi@linux.intel.com>
11 #include <linux/firmware.h>
12 #include <sound/sof/header.h>
13 #include <sound/sof/ipc4/header.h>
15 #include "sof-audio.h"
16 #include "ipc4-fw-reg.h"
17 #include "ipc4-priv.h"
18 #include "ipc4-telemetry.h"
21 static const struct sof_ipc4_fw_status {
25 {0, "The operation was successful"},
26 {1, "Invalid parameter specified"},
27 {2, "Unknown message type specified"},
28 {3, "Not enough space in the IPC reply buffer to complete the request"},
29 {4, "The system or resource is busy"},
30 {5, "Replaced ADSP IPC PENDING (unused)"},
31 {6, "Unknown error while processing the request"},
32 {7, "Unsupported operation requested"},
33 {8, "Reserved (ADSP_STAGE_UNINITIALIZED removed)"},
34 {9, "Specified resource not found"},
35 {10, "A resource's ID requested to be created is already assigned"},
36 {11, "Reserved (ADSP_IPC_OUT_OF_MIPS removed)"},
37 {12, "Required resource is in invalid state"},
38 {13, "Requested power transition failed to complete"},
39 {14, "Manifest of the library being loaded is invalid"},
40 {15, "Requested service or data is unavailable on the target platform"},
41 {42, "Library target address is out of storage memory range"},
43 {44, "Image verification by CSE failed"},
44 {100, "General module management error"},
45 {101, "Module loading failed"},
46 {102, "Integrity check of the loaded module content failed"},
47 {103, "Attempt to unload code of the module in use"},
48 {104, "Other failure of module instance initialization request"},
49 {105, "Reserved (ADSP_IPC_OUT_OF_MIPS removed)"},
50 {106, "Reserved (ADSP_IPC_CONFIG_GET_ERROR removed)"},
51 {107, "Reserved (ADSP_IPC_CONFIG_SET_ERROR removed)"},
52 {108, "Reserved (ADSP_IPC_LARGE_CONFIG_GET_ERROR removed)"},
53 {109, "Reserved (ADSP_IPC_LARGE_CONFIG_SET_ERROR removed)"},
54 {110, "Invalid (out of range) module ID provided"},
55 {111, "Invalid module instance ID provided"},
56 {112, "Invalid queue (pin) ID provided"},
57 {113, "Invalid destination queue (pin) ID provided"},
58 {114, "Reserved (ADSP_IPC_BIND_UNBIND_DST_SINK_UNSUPPORTED removed)"},
59 {115, "Reserved (ADSP_IPC_UNLOAD_INST_EXISTS removed)"},
60 {116, "Invalid target code ID provided"},
61 {117, "Injection DMA buffer is too small for probing the input pin"},
62 {118, "Extraction DMA buffer is too small for probing the output pin"},
63 {120, "Invalid ID of configuration item provided in TLV list"},
64 {121, "Invalid length of configuration item provided in TLV list"},
65 {122, "Invalid structure of configuration item provided"},
66 {140, "Initialization of DMA Gateway failed"},
67 {141, "Invalid ID of gateway provided"},
68 {142, "Setting state of DMA Gateway failed"},
69 {143, "DMA_CONTROL message targeting gateway not allocated yet"},
70 {150, "Attempt to configure SCLK while I2S port is running"},
71 {151, "Attempt to configure MCLK while I2S port is running"},
72 {152, "Attempt to stop SCLK that is not running"},
73 {153, "Attempt to stop MCLK that is not running"},
74 {160, "Reserved (ADSP_IPC_PIPELINE_NOT_INITIALIZED removed)"},
75 {161, "Reserved (ADSP_IPC_PIPELINE_NOT_EXIST removed)"},
76 {162, "Reserved (ADSP_IPC_PIPELINE_SAVE_FAILED removed)"},
77 {163, "Reserved (ADSP_IPC_PIPELINE_RESTORE_FAILED removed)"},
78 {165, "Reserved (ADSP_IPC_PIPELINE_ALREADY_EXISTS removed)"},
81 static int sof_ipc4_check_reply_status(struct snd_sof_dev *sdev, u32 status)
85 status &= SOF_IPC4_REPLY_STATUS;
90 for (i = 0; i < ARRAY_SIZE(ipc4_status); i++) {
91 if (ipc4_status[i].status == status) {
92 dev_err(sdev->dev, "FW reported error: %u - %s\n",
93 status, ipc4_status[i].msg);
98 if (i == ARRAY_SIZE(ipc4_status))
99 dev_err(sdev->dev, "FW reported error: %u - Unknown\n", status);
128 #if IS_ENABLED(CONFIG_SND_SOC_SOF_DEBUG_VERBOSE_IPC)
129 #define DBG_IPC4_MSG_TYPE_ENTRY(type) [SOF_IPC4_##type] = #type
130 static const char * const ipc4_dbg_mod_msg_type[] = {
131 DBG_IPC4_MSG_TYPE_ENTRY(MOD_INIT_INSTANCE),
132 DBG_IPC4_MSG_TYPE_ENTRY(MOD_CONFIG_GET),
133 DBG_IPC4_MSG_TYPE_ENTRY(MOD_CONFIG_SET),
134 DBG_IPC4_MSG_TYPE_ENTRY(MOD_LARGE_CONFIG_GET),
135 DBG_IPC4_MSG_TYPE_ENTRY(MOD_LARGE_CONFIG_SET),
136 DBG_IPC4_MSG_TYPE_ENTRY(MOD_BIND),
137 DBG_IPC4_MSG_TYPE_ENTRY(MOD_UNBIND),
138 DBG_IPC4_MSG_TYPE_ENTRY(MOD_SET_DX),
139 DBG_IPC4_MSG_TYPE_ENTRY(MOD_SET_D0IX),
140 DBG_IPC4_MSG_TYPE_ENTRY(MOD_ENTER_MODULE_RESTORE),
141 DBG_IPC4_MSG_TYPE_ENTRY(MOD_EXIT_MODULE_RESTORE),
142 DBG_IPC4_MSG_TYPE_ENTRY(MOD_DELETE_INSTANCE),
145 static const char * const ipc4_dbg_glb_msg_type[] = {
146 DBG_IPC4_MSG_TYPE_ENTRY(GLB_BOOT_CONFIG),
147 DBG_IPC4_MSG_TYPE_ENTRY(GLB_ROM_CONTROL),
148 DBG_IPC4_MSG_TYPE_ENTRY(GLB_IPCGATEWAY_CMD),
149 DBG_IPC4_MSG_TYPE_ENTRY(GLB_PERF_MEASUREMENTS_CMD),
150 DBG_IPC4_MSG_TYPE_ENTRY(GLB_CHAIN_DMA),
151 DBG_IPC4_MSG_TYPE_ENTRY(GLB_LOAD_MULTIPLE_MODULES),
152 DBG_IPC4_MSG_TYPE_ENTRY(GLB_UNLOAD_MULTIPLE_MODULES),
153 DBG_IPC4_MSG_TYPE_ENTRY(GLB_CREATE_PIPELINE),
154 DBG_IPC4_MSG_TYPE_ENTRY(GLB_DELETE_PIPELINE),
155 DBG_IPC4_MSG_TYPE_ENTRY(GLB_SET_PIPELINE_STATE),
156 DBG_IPC4_MSG_TYPE_ENTRY(GLB_GET_PIPELINE_STATE),
157 DBG_IPC4_MSG_TYPE_ENTRY(GLB_GET_PIPELINE_CONTEXT_SIZE),
158 DBG_IPC4_MSG_TYPE_ENTRY(GLB_SAVE_PIPELINE),
159 DBG_IPC4_MSG_TYPE_ENTRY(GLB_RESTORE_PIPELINE),
160 DBG_IPC4_MSG_TYPE_ENTRY(GLB_LOAD_LIBRARY),
161 DBG_IPC4_MSG_TYPE_ENTRY(GLB_LOAD_LIBRARY_PREPARE),
162 DBG_IPC4_MSG_TYPE_ENTRY(GLB_INTERNAL_MESSAGE),
163 DBG_IPC4_MSG_TYPE_ENTRY(GLB_NOTIFICATION),
166 #define DBG_IPC4_NOTIFICATION_TYPE_ENTRY(type) [SOF_IPC4_NOTIFY_##type] = #type
167 static const char * const ipc4_dbg_notification_type[] = {
168 DBG_IPC4_NOTIFICATION_TYPE_ENTRY(PHRASE_DETECTED),
169 DBG_IPC4_NOTIFICATION_TYPE_ENTRY(RESOURCE_EVENT),
170 DBG_IPC4_NOTIFICATION_TYPE_ENTRY(LOG_BUFFER_STATUS),
171 DBG_IPC4_NOTIFICATION_TYPE_ENTRY(TIMESTAMP_CAPTURED),
172 DBG_IPC4_NOTIFICATION_TYPE_ENTRY(FW_READY),
173 DBG_IPC4_NOTIFICATION_TYPE_ENTRY(FW_AUD_CLASS_RESULT),
174 DBG_IPC4_NOTIFICATION_TYPE_ENTRY(EXCEPTION_CAUGHT),
175 DBG_IPC4_NOTIFICATION_TYPE_ENTRY(MODULE_NOTIFICATION),
176 DBG_IPC4_NOTIFICATION_TYPE_ENTRY(PROBE_DATA_AVAILABLE),
177 DBG_IPC4_NOTIFICATION_TYPE_ENTRY(ASYNC_MSG_SRVC_MESSAGE),
180 static void sof_ipc4_log_header(struct device *dev, u8 *text, struct sof_ipc4_msg *msg,
181 bool data_size_valid)
184 const u8 *str2 = NULL;
185 const u8 *str = NULL;
187 val = msg->primary & SOF_IPC4_MSG_TARGET_MASK;
188 type = SOF_IPC4_MSG_TYPE_GET(msg->primary);
190 if (val == SOF_IPC4_MSG_TARGET(SOF_IPC4_MODULE_MSG)) {
192 if (type < SOF_IPC4_MOD_TYPE_LAST)
193 str = ipc4_dbg_mod_msg_type[type];
195 str = "Unknown Module message type";
197 /* Global FW message */
198 if (type < SOF_IPC4_GLB_TYPE_LAST)
199 str = ipc4_dbg_glb_msg_type[type];
201 str = "Unknown Global message type";
203 if (type == SOF_IPC4_GLB_NOTIFICATION) {
204 /* Notification message */
205 u32 notif = SOF_IPC4_NOTIFICATION_TYPE_GET(msg->primary);
207 /* Do not print log buffer notification if not desired */
208 if (notif == SOF_IPC4_NOTIFY_LOG_BUFFER_STATUS &&
209 !sof_debug_check_flag(SOF_DBG_PRINT_DMA_POSITION_UPDATE_LOGS))
212 if (notif < SOF_IPC4_NOTIFY_TYPE_LAST)
213 str2 = ipc4_dbg_notification_type[notif];
215 str2 = "Unknown Global notification";
220 if (data_size_valid && msg->data_size)
221 dev_dbg(dev, "%s: %#x|%#x: %s|%s [data size: %zu]\n",
222 text, msg->primary, msg->extension, str, str2,
225 dev_dbg(dev, "%s: %#x|%#x: %s|%s\n", text, msg->primary,
226 msg->extension, str, str2);
228 if (data_size_valid && msg->data_size)
229 dev_dbg(dev, "%s: %#x|%#x: %s [data size: %zu]\n",
230 text, msg->primary, msg->extension, str,
233 dev_dbg(dev, "%s: %#x|%#x: %s\n", text, msg->primary,
234 msg->extension, str);
237 #else /* CONFIG_SND_SOC_SOF_DEBUG_VERBOSE_IPC */
238 static void sof_ipc4_log_header(struct device *dev, u8 *text, struct sof_ipc4_msg *msg,
239 bool data_size_valid)
241 /* Do not print log buffer notification if not desired */
242 if (!sof_debug_check_flag(SOF_DBG_PRINT_DMA_POSITION_UPDATE_LOGS) &&
243 !SOF_IPC4_MSG_IS_MODULE_MSG(msg->primary) &&
244 SOF_IPC4_MSG_TYPE_GET(msg->primary) == SOF_IPC4_GLB_NOTIFICATION &&
245 SOF_IPC4_NOTIFICATION_TYPE_GET(msg->primary) == SOF_IPC4_NOTIFY_LOG_BUFFER_STATUS)
248 if (data_size_valid && msg->data_size)
249 dev_dbg(dev, "%s: %#x|%#x [data size: %zu]\n", text,
250 msg->primary, msg->extension, msg->data_size);
252 dev_dbg(dev, "%s: %#x|%#x\n", text, msg->primary, msg->extension);
256 static void sof_ipc4_dump_payload(struct snd_sof_dev *sdev,
257 void *ipc_data, size_t size)
259 print_hex_dump_debug("Message payload: ", DUMP_PREFIX_OFFSET,
260 16, 4, ipc_data, size, false);
263 static int sof_ipc4_get_reply(struct snd_sof_dev *sdev)
265 struct snd_sof_ipc_msg *msg = sdev->msg;
266 struct sof_ipc4_msg *ipc4_reply;
269 /* get the generic reply */
270 ipc4_reply = msg->reply_data;
272 sof_ipc4_log_header(sdev->dev, "ipc tx reply", ipc4_reply, false);
274 ret = sof_ipc4_check_reply_status(sdev, ipc4_reply->primary);
278 /* No other information is expected for non large config get replies */
279 if (!msg->reply_size || !SOF_IPC4_MSG_IS_MODULE_MSG(ipc4_reply->primary) ||
280 (SOF_IPC4_MSG_TYPE_GET(ipc4_reply->primary) != SOF_IPC4_MOD_LARGE_CONFIG_GET))
283 /* Read the requested payload */
284 snd_sof_dsp_mailbox_read(sdev, sdev->dsp_box.offset, ipc4_reply->data_ptr,
290 /* wait for IPC message reply */
291 static int ipc4_wait_tx_done(struct snd_sof_ipc *ipc, void *reply_data)
293 struct snd_sof_ipc_msg *msg = &ipc->msg;
294 struct sof_ipc4_msg *ipc4_msg = msg->msg_data;
295 struct snd_sof_dev *sdev = ipc->sdev;
298 /* wait for DSP IPC completion */
299 ret = wait_event_timeout(msg->waitq, msg->ipc_complete,
300 msecs_to_jiffies(sdev->ipc_timeout));
302 dev_err(sdev->dev, "ipc timed out for %#x|%#x\n",
303 ipc4_msg->primary, ipc4_msg->extension);
304 snd_sof_handle_fw_exception(ipc->sdev, "IPC timeout");
308 if (msg->reply_error) {
309 dev_err(sdev->dev, "ipc error for msg %#x|%#x\n",
310 ipc4_msg->primary, ipc4_msg->extension);
311 ret = msg->reply_error;
314 struct sof_ipc4_msg *ipc4_reply = msg->reply_data;
315 struct sof_ipc4_msg *ipc4_reply_data = reply_data;
317 /* Copy the header */
318 ipc4_reply_data->header_u64 = ipc4_reply->header_u64;
319 if (msg->reply_size && ipc4_reply_data->data_ptr) {
320 /* copy the payload returned from DSP */
321 memcpy(ipc4_reply_data->data_ptr, ipc4_reply->data_ptr,
323 ipc4_reply_data->data_size = msg->reply_size;
328 sof_ipc4_log_header(sdev->dev, "ipc tx done ", ipc4_msg, true);
331 /* re-enable dumps after successful IPC tx */
332 if (sdev->ipc_dump_printed) {
333 sdev->dbg_dump_printed = false;
334 sdev->ipc_dump_printed = false;
340 static int ipc4_tx_msg_unlocked(struct snd_sof_ipc *ipc,
341 void *msg_data, size_t msg_bytes,
342 void *reply_data, size_t reply_bytes)
344 struct sof_ipc4_msg *ipc4_msg = msg_data;
345 struct snd_sof_dev *sdev = ipc->sdev;
348 if (msg_bytes > ipc->max_payload_size || reply_bytes > ipc->max_payload_size)
351 sof_ipc4_log_header(sdev->dev, "ipc tx ", msg_data, true);
353 ret = sof_ipc_send_msg(sdev, msg_data, msg_bytes, reply_bytes);
355 dev_err_ratelimited(sdev->dev,
356 "%s: ipc message send for %#x|%#x failed: %d\n",
357 __func__, ipc4_msg->primary, ipc4_msg->extension, ret);
361 /* now wait for completion */
362 return ipc4_wait_tx_done(ipc, reply_data);
365 static int sof_ipc4_tx_msg(struct snd_sof_dev *sdev, void *msg_data, size_t msg_bytes,
366 void *reply_data, size_t reply_bytes, bool no_pm)
368 struct snd_sof_ipc *ipc = sdev->ipc;
375 const struct sof_dsp_power_state target_state = {
376 .state = SOF_DSP_PM_D0,
379 /* ensure the DSP is in D0i0 before sending a new IPC */
380 ret = snd_sof_dsp_set_power_state(sdev, &target_state);
385 /* Serialise IPC TX */
386 mutex_lock(&ipc->tx_mutex);
388 ret = ipc4_tx_msg_unlocked(ipc, msg_data, msg_bytes, reply_data, reply_bytes);
390 if (sof_debug_check_flag(SOF_DBG_DUMP_IPC_MESSAGE_PAYLOAD)) {
391 struct sof_ipc4_msg *msg = NULL;
393 /* payload is indicated by non zero msg/reply_bytes */
396 else if (reply_bytes)
400 sof_ipc4_dump_payload(sdev, msg->data_ptr, msg->data_size);
403 mutex_unlock(&ipc->tx_mutex);
408 static int sof_ipc4_set_get_data(struct snd_sof_dev *sdev, void *data,
409 size_t payload_bytes, bool set)
411 const struct sof_dsp_power_state target_state = {
412 .state = SOF_DSP_PM_D0,
414 size_t payload_limit = sdev->ipc->max_payload_size;
415 struct sof_ipc4_msg *ipc4_msg = data;
416 struct sof_ipc4_msg tx = {{ 0 }};
417 struct sof_ipc4_msg rx = {{ 0 }};
418 size_t remaining = payload_bytes;
426 if ((ipc4_msg->primary & SOF_IPC4_MSG_TARGET_MASK) !=
427 SOF_IPC4_MSG_TARGET(SOF_IPC4_MODULE_MSG))
430 ipc4_msg->primary &= ~SOF_IPC4_MSG_TYPE_MASK;
431 tx.primary = ipc4_msg->primary;
432 tx.extension = ipc4_msg->extension;
435 tx.primary |= SOF_IPC4_MSG_TYPE_SET(SOF_IPC4_MOD_LARGE_CONFIG_SET);
437 tx.primary |= SOF_IPC4_MSG_TYPE_SET(SOF_IPC4_MOD_LARGE_CONFIG_GET);
439 tx.extension &= ~SOF_IPC4_MOD_EXT_MSG_SIZE_MASK;
440 tx.extension |= SOF_IPC4_MOD_EXT_MSG_SIZE(payload_bytes);
442 tx.extension |= SOF_IPC4_MOD_EXT_MSG_FIRST_BLOCK(1);
444 /* ensure the DSP is in D0i0 before sending IPC */
445 ret = snd_sof_dsp_set_power_state(sdev, &target_state);
449 /* Serialise IPC TX */
450 mutex_lock(&sdev->ipc->tx_mutex);
453 size_t tx_size, rx_size;
455 if (remaining > payload_limit) {
456 chunk_size = payload_limit;
458 chunk_size = remaining;
460 tx.extension |= SOF_IPC4_MOD_EXT_MSG_LAST_BLOCK(1);
464 tx.extension &= ~SOF_IPC4_MOD_EXT_MSG_FIRST_BLOCK_MASK;
465 tx.extension &= ~SOF_IPC4_MOD_EXT_MSG_SIZE_MASK;
466 tx.extension |= SOF_IPC4_MOD_EXT_MSG_SIZE(offset);
470 tx.data_size = chunk_size;
471 tx.data_ptr = ipc4_msg->data_ptr + offset;
473 tx_size = chunk_size;
478 rx.data_size = chunk_size;
479 rx.data_ptr = ipc4_msg->data_ptr + offset;
482 rx_size = chunk_size;
485 /* Send the message for the current chunk */
486 ret = ipc4_tx_msg_unlocked(sdev->ipc, &tx, tx_size, &rx, rx_size);
489 "%s: large config %s failed at offset %zu: %d\n",
490 __func__, set ? "set" : "get", offset, ret);
494 if (!set && rx.extension & SOF_IPC4_MOD_EXT_MSG_FIRST_BLOCK_MASK) {
495 /* Verify the firmware reported total payload size */
496 rx_size = rx.extension & SOF_IPC4_MOD_EXT_MSG_SIZE_MASK;
498 if (rx_size > payload_bytes) {
500 "%s: Receive buffer (%zu) is too small for %zu\n",
501 __func__, payload_bytes, rx_size);
506 if (rx_size < chunk_size) {
507 chunk_size = rx_size;
509 } else if (rx_size < payload_bytes) {
514 offset += chunk_size;
515 remaining -= chunk_size;
518 /* Adjust the received data size if needed */
519 if (!set && payload_bytes != offset)
520 ipc4_msg->data_size = offset;
523 if (sof_debug_check_flag(SOF_DBG_DUMP_IPC_MESSAGE_PAYLOAD))
524 sof_ipc4_dump_payload(sdev, ipc4_msg->data_ptr, ipc4_msg->data_size);
526 mutex_unlock(&sdev->ipc->tx_mutex);
531 static int sof_ipc4_init_msg_memory(struct snd_sof_dev *sdev)
533 struct sof_ipc4_msg *ipc4_msg;
534 struct snd_sof_ipc_msg *msg = &sdev->ipc->msg;
536 /* TODO: get max_payload_size from firmware */
537 sdev->ipc->max_payload_size = SOF_IPC4_MSG_MAX_SIZE;
539 /* Allocate memory for the ipc4 container and the maximum payload */
540 msg->reply_data = devm_kzalloc(sdev->dev, sdev->ipc->max_payload_size +
541 sizeof(struct sof_ipc4_msg), GFP_KERNEL);
542 if (!msg->reply_data)
545 ipc4_msg = msg->reply_data;
546 ipc4_msg->data_ptr = msg->reply_data + sizeof(struct sof_ipc4_msg);
551 size_t sof_ipc4_find_debug_slot_offset_by_type(struct snd_sof_dev *sdev,
554 size_t slot_desc_type_offset;
558 /* The type is the second u32 in the slot descriptor */
559 slot_desc_type_offset = sdev->debug_box.offset + sizeof(u32);
560 for (i = 0; i < SOF_IPC4_MAX_DEBUG_SLOTS; i++) {
561 sof_mailbox_read(sdev, slot_desc_type_offset, &type, sizeof(type));
563 if (type == slot_type)
564 return sdev->debug_box.offset + (i + 1) * SOF_IPC4_DEBUG_SLOT_SIZE;
566 slot_desc_type_offset += SOF_IPC4_DEBUG_DESCRIPTOR_SIZE;
569 dev_dbg(sdev->dev, "Slot type %#x is not available in debug window\n", slot_type);
572 EXPORT_SYMBOL(sof_ipc4_find_debug_slot_offset_by_type);
574 static int ipc4_fw_ready(struct snd_sof_dev *sdev, struct sof_ipc4_msg *ipc4_msg)
576 int inbox_offset, inbox_size, outbox_offset, outbox_size;
578 /* no need to re-check version/ABI for subsequent boots */
579 if (!sdev->first_boot)
582 /* Set up the windows for IPC communication */
583 inbox_offset = snd_sof_dsp_get_mailbox_offset(sdev);
584 if (inbox_offset < 0) {
585 dev_err(sdev->dev, "%s: No mailbox offset\n", __func__);
588 inbox_size = SOF_IPC4_MSG_MAX_SIZE;
589 outbox_offset = snd_sof_dsp_get_window_offset(sdev, SOF_IPC4_OUTBOX_WINDOW_IDX);
590 outbox_size = SOF_IPC4_MSG_MAX_SIZE;
592 sdev->fw_info_box.offset = snd_sof_dsp_get_window_offset(sdev, SOF_IPC4_INBOX_WINDOW_IDX);
593 sdev->fw_info_box.size = sizeof(struct sof_ipc4_fw_registers);
594 sdev->dsp_box.offset = inbox_offset;
595 sdev->dsp_box.size = inbox_size;
596 sdev->host_box.offset = outbox_offset;
597 sdev->host_box.size = outbox_size;
599 sdev->debug_box.offset = snd_sof_dsp_get_window_offset(sdev,
600 SOF_IPC4_DEBUG_WINDOW_IDX);
602 sof_ipc4_create_exception_debugfs_node(sdev);
604 dev_dbg(sdev->dev, "mailbox upstream 0x%x - size 0x%x\n",
605 inbox_offset, inbox_size);
606 dev_dbg(sdev->dev, "mailbox downstream 0x%x - size 0x%x\n",
607 outbox_offset, outbox_size);
608 dev_dbg(sdev->dev, "debug box 0x%x\n", sdev->debug_box.offset);
610 return sof_ipc4_init_msg_memory(sdev);
613 static void sof_ipc4_rx_msg(struct snd_sof_dev *sdev)
615 struct sof_ipc4_msg *ipc4_msg = sdev->ipc->msg.rx_data;
616 size_t data_size = 0;
619 if (!ipc4_msg || !SOF_IPC4_MSG_IS_NOTIFICATION(ipc4_msg->primary))
622 ipc4_msg->data_ptr = NULL;
623 ipc4_msg->data_size = 0;
625 sof_ipc4_log_header(sdev->dev, "ipc rx ", ipc4_msg, false);
627 switch (SOF_IPC4_NOTIFICATION_TYPE_GET(ipc4_msg->primary)) {
628 case SOF_IPC4_NOTIFY_FW_READY:
629 /* check for FW boot completion */
630 if (sdev->fw_state == SOF_FW_BOOT_IN_PROGRESS) {
631 err = ipc4_fw_ready(sdev, ipc4_msg);
633 sof_set_fw_state(sdev, SOF_FW_BOOT_READY_FAILED);
635 sof_set_fw_state(sdev, SOF_FW_BOOT_READY_OK);
637 /* wake up firmware loader */
638 wake_up(&sdev->boot_wait);
642 case SOF_IPC4_NOTIFY_RESOURCE_EVENT:
643 data_size = sizeof(struct sof_ipc4_notify_resource_data);
645 case SOF_IPC4_NOTIFY_LOG_BUFFER_STATUS:
646 sof_ipc4_mtrace_update_pos(sdev, SOF_IPC4_LOG_CORE_GET(ipc4_msg->primary));
648 case SOF_IPC4_NOTIFY_EXCEPTION_CAUGHT:
649 snd_sof_dsp_panic(sdev, 0, true);
652 dev_dbg(sdev->dev, "Unhandled DSP message: %#x|%#x\n",
653 ipc4_msg->primary, ipc4_msg->extension);
658 ipc4_msg->data_ptr = kmalloc(data_size, GFP_KERNEL);
659 if (!ipc4_msg->data_ptr)
662 ipc4_msg->data_size = data_size;
663 snd_sof_ipc_msg_data(sdev, NULL, ipc4_msg->data_ptr, ipc4_msg->data_size);
666 sof_ipc4_log_header(sdev->dev, "ipc rx done ", ipc4_msg, true);
669 if (sof_debug_check_flag(SOF_DBG_DUMP_IPC_MESSAGE_PAYLOAD))
670 sof_ipc4_dump_payload(sdev, ipc4_msg->data_ptr,
671 ipc4_msg->data_size);
673 kfree(ipc4_msg->data_ptr);
674 ipc4_msg->data_ptr = NULL;
675 ipc4_msg->data_size = 0;
679 static int sof_ipc4_set_core_state(struct snd_sof_dev *sdev, int core_idx, bool on)
681 struct sof_ipc4_dx_state_info dx_state;
682 struct sof_ipc4_msg msg;
684 dx_state.core_mask = BIT(core_idx);
686 dx_state.dx_mask = BIT(core_idx);
688 dx_state.dx_mask = 0;
690 msg.primary = SOF_IPC4_MSG_TYPE_SET(SOF_IPC4_MOD_SET_DX);
691 msg.primary |= SOF_IPC4_MSG_DIR(SOF_IPC4_MSG_REQUEST);
692 msg.primary |= SOF_IPC4_MSG_TARGET(SOF_IPC4_MODULE_MSG);
694 msg.data_ptr = &dx_state;
695 msg.data_size = sizeof(dx_state);
697 return sof_ipc4_tx_msg(sdev, &msg, msg.data_size, NULL, 0, false);
701 * The context save callback is used to send a message to the firmware notifying
702 * it that the primary core is going to be turned off, which is used as an
703 * indication to prepare for a full power down, thus preparing for IMR boot
706 * Note: in IPC4 there is no message used to restore context, thus no context
707 * restore callback is implemented
709 static int sof_ipc4_ctx_save(struct snd_sof_dev *sdev)
711 return sof_ipc4_set_core_state(sdev, SOF_DSP_PRIMARY_CORE, false);
714 static int sof_ipc4_set_pm_gate(struct snd_sof_dev *sdev, u32 flags)
716 struct sof_ipc4_msg msg = {{0}};
718 msg.primary = SOF_IPC4_MSG_TYPE_SET(SOF_IPC4_MOD_SET_D0IX);
719 msg.primary |= SOF_IPC4_MSG_DIR(SOF_IPC4_MSG_REQUEST);
720 msg.primary |= SOF_IPC4_MSG_TARGET(SOF_IPC4_MODULE_MSG);
721 msg.extension = flags;
723 return sof_ipc4_tx_msg(sdev, &msg, 0, NULL, 0, true);
726 static const struct sof_ipc_pm_ops ipc4_pm_ops = {
727 .ctx_save = sof_ipc4_ctx_save,
728 .set_core_state = sof_ipc4_set_core_state,
729 .set_pm_gate = sof_ipc4_set_pm_gate,
732 static int sof_ipc4_init(struct snd_sof_dev *sdev)
734 struct sof_ipc4_fw_data *ipc4_data = sdev->private;
736 mutex_init(&ipc4_data->pipeline_state_mutex);
738 xa_init_flags(&ipc4_data->fw_lib_xa, XA_FLAGS_ALLOC);
743 static void sof_ipc4_exit(struct snd_sof_dev *sdev)
745 struct sof_ipc4_fw_data *ipc4_data = sdev->private;
746 struct sof_ipc4_fw_library *fw_lib;
747 unsigned long lib_id;
749 xa_for_each(&ipc4_data->fw_lib_xa, lib_id, fw_lib) {
751 * The basefw (ID == 0) is handled by generic code, it is not
752 * loaded by IPC4 code.
755 release_firmware(fw_lib->sof_fw.fw);
757 fw_lib->sof_fw.fw = NULL;
760 xa_destroy(&ipc4_data->fw_lib_xa);
763 static int sof_ipc4_post_boot(struct snd_sof_dev *sdev)
765 if (sdev->first_boot)
766 return sof_ipc4_query_fw_configuration(sdev);
768 return sof_ipc4_reload_fw_libraries(sdev);
771 const struct sof_ipc_ops ipc4_ops = {
772 .init = sof_ipc4_init,
773 .exit = sof_ipc4_exit,
774 .post_fw_boot = sof_ipc4_post_boot,
775 .tx_msg = sof_ipc4_tx_msg,
776 .rx_msg = sof_ipc4_rx_msg,
777 .set_get_data = sof_ipc4_set_get_data,
778 .get_reply = sof_ipc4_get_reply,
780 .fw_loader = &ipc4_loader_ops,
781 .tplg = &ipc4_tplg_ops,
782 .pcm = &ipc4_pcm_ops,
783 .fw_tracing = &ipc4_mtrace_ops,