1 /* sound/soc/samsung/i2s.c
3 * ALSA SoC Audio Layer - Samsung I2S Controller driver
5 * Copyright (c) 2010 Samsung Electronics Co. Ltd.
6 * Jaswinder Singh <jassisinghbrar@gmail.com>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
13 #include <dt-bindings/sound/samsung-i2s.h>
14 #include <linux/delay.h>
15 #include <linux/slab.h>
16 #include <linux/clk.h>
17 #include <linux/clk-provider.h>
19 #include <linux/module.h>
21 #include <linux/of_gpio.h>
22 #include <linux/pm_runtime.h>
24 #include <sound/soc.h>
25 #include <sound/pcm_params.h>
27 #include <linux/platform_data/asoc-s3c.h>
34 #define msecs_to_loops(t) (loops_per_jiffy / 1000 * HZ * t)
36 enum samsung_dai_type {
41 struct samsung_i2s_variant_regs {
46 unsigned int rclksrc_off;
48 unsigned int cdclkcon_off;
50 unsigned int bfs_mask;
51 unsigned int rfs_mask;
52 unsigned int ftx0cnt_off;
55 struct samsung_i2s_dai_data {
58 const struct samsung_i2s_variant_regs *i2s_variant_regs;
62 /* Platform device for this DAI */
63 struct platform_device *pdev;
64 /* Memory mapped SFR region */
66 /* Rate of RCLK source clock */
67 unsigned long rclk_srcrate;
71 * Specifically requested RCLK,BCLK by MACHINE Driver.
72 * 0 indicates CPU driver is free to choose any value.
75 /* I2S Controller's core clock */
77 /* Clock for generating I2S signals */
79 /* Pointer to the Primary_Fifo if this is Sec_Fifo, NULL otherwise */
80 struct i2s_dai *pri_dai;
81 /* Pointer to the Secondary_Fifo if it has one, NULL otherwise */
82 struct i2s_dai *sec_dai;
83 #define DAI_OPENED (1 << 0) /* Dai is opened */
84 #define DAI_MANAGER (1 << 1) /* Dai is the manager */
86 /* Driver for this DAI */
87 struct snd_soc_dai_driver i2s_dai_drv;
89 struct s3c_dma_params dma_playback;
90 struct s3c_dma_params dma_capture;
91 struct s3c_dma_params idma_playback;
96 const struct samsung_i2s_variant_regs *variant_regs;
98 /* Spinlock protecting access to the device's registers */
102 /* Below fields are only valid if this is the primary FIFO */
103 struct clk *clk_table[3];
104 struct clk_onecell_data clk_data;
107 /* Lock for cross i/f checks */
108 static DEFINE_SPINLOCK(lock);
110 /* If this is the 'overlay' stereo DAI */
111 static inline bool is_secondary(struct i2s_dai *i2s)
113 return i2s->pri_dai ? true : false;
116 /* If operating in SoC-Slave mode */
117 static inline bool is_slave(struct i2s_dai *i2s)
119 u32 mod = readl(i2s->addr + I2SMOD);
120 return (mod & (1 << i2s->variant_regs->mss_off)) ? true : false;
123 /* If this interface of the controller is transmitting data */
124 static inline bool tx_active(struct i2s_dai *i2s)
131 active = readl(i2s->addr + I2SCON);
133 if (is_secondary(i2s))
134 active &= CON_TXSDMA_ACTIVE;
136 active &= CON_TXDMA_ACTIVE;
138 return active ? true : false;
141 /* Return pointer to the other DAI */
142 static inline struct i2s_dai *get_other_dai(struct i2s_dai *i2s)
144 return i2s->pri_dai ? : i2s->sec_dai;
147 /* If the other interface of the controller is transmitting data */
148 static inline bool other_tx_active(struct i2s_dai *i2s)
150 struct i2s_dai *other = get_other_dai(i2s);
152 return tx_active(other);
155 /* If any interface of the controller is transmitting data */
156 static inline bool any_tx_active(struct i2s_dai *i2s)
158 return tx_active(i2s) || other_tx_active(i2s);
161 /* If this interface of the controller is receiving data */
162 static inline bool rx_active(struct i2s_dai *i2s)
169 active = readl(i2s->addr + I2SCON) & CON_RXDMA_ACTIVE;
171 return active ? true : false;
174 /* If the other interface of the controller is receiving data */
175 static inline bool other_rx_active(struct i2s_dai *i2s)
177 struct i2s_dai *other = get_other_dai(i2s);
179 return rx_active(other);
182 /* If any interface of the controller is receiving data */
183 static inline bool any_rx_active(struct i2s_dai *i2s)
185 return rx_active(i2s) || other_rx_active(i2s);
188 /* If the other DAI is transmitting or receiving data */
189 static inline bool other_active(struct i2s_dai *i2s)
191 return other_rx_active(i2s) || other_tx_active(i2s);
194 /* If this DAI is transmitting or receiving data */
195 static inline bool this_active(struct i2s_dai *i2s)
197 return tx_active(i2s) || rx_active(i2s);
200 /* If the controller is active anyway */
201 static inline bool any_active(struct i2s_dai *i2s)
203 return this_active(i2s) || other_active(i2s);
206 static inline struct i2s_dai *to_info(struct snd_soc_dai *dai)
208 return snd_soc_dai_get_drvdata(dai);
211 static inline bool is_opened(struct i2s_dai *i2s)
213 if (i2s && (i2s->mode & DAI_OPENED))
219 static inline bool is_manager(struct i2s_dai *i2s)
221 if (is_opened(i2s) && (i2s->mode & DAI_MANAGER))
227 /* Read RCLK of I2S (in multiples of LRCLK) */
228 static inline unsigned get_rfs(struct i2s_dai *i2s)
231 rfs = readl(i2s->addr + I2SMOD) >> i2s->variant_regs->rfs_off;
232 rfs &= i2s->variant_regs->rfs_mask;
246 /* Write RCLK of I2S (in multiples of LRCLK) */
247 static inline void set_rfs(struct i2s_dai *i2s, unsigned rfs)
249 u32 mod = readl(i2s->addr + I2SMOD);
250 int rfs_shift = i2s->variant_regs->rfs_off;
252 mod &= ~(i2s->variant_regs->rfs_mask << rfs_shift);
256 mod |= (EXYNOS7_MOD_RCLK_192FS << rfs_shift);
259 mod |= (EXYNOS7_MOD_RCLK_96FS << rfs_shift);
262 mod |= (EXYNOS7_MOD_RCLK_128FS << rfs_shift);
265 mod |= (EXYNOS7_MOD_RCLK_64FS << rfs_shift);
268 mod |= (MOD_RCLK_768FS << rfs_shift);
271 mod |= (MOD_RCLK_512FS << rfs_shift);
274 mod |= (MOD_RCLK_384FS << rfs_shift);
277 mod |= (MOD_RCLK_256FS << rfs_shift);
281 writel(mod, i2s->addr + I2SMOD);
284 /* Read Bit-Clock of I2S (in multiples of LRCLK) */
285 static inline unsigned get_bfs(struct i2s_dai *i2s)
288 bfs = readl(i2s->addr + I2SMOD) >> i2s->variant_regs->bfs_off;
289 bfs &= i2s->variant_regs->bfs_mask;
304 /* Write Bit-Clock of I2S (in multiples of LRCLK) */
305 static inline void set_bfs(struct i2s_dai *i2s, unsigned bfs)
307 u32 mod = readl(i2s->addr + I2SMOD);
308 int tdm = i2s->quirks & QUIRK_SUPPORTS_TDM;
309 int bfs_shift = i2s->variant_regs->bfs_off;
311 /* Non-TDM I2S controllers do not support BCLK > 48 * FS */
312 if (!tdm && bfs > 48) {
313 dev_err(&i2s->pdev->dev, "Unsupported BCLK divider\n");
317 mod &= ~(i2s->variant_regs->bfs_mask << bfs_shift);
321 mod |= (MOD_BCLK_48FS << bfs_shift);
324 mod |= (MOD_BCLK_32FS << bfs_shift);
327 mod |= (MOD_BCLK_24FS << bfs_shift);
330 mod |= (MOD_BCLK_16FS << bfs_shift);
333 mod |= (EXYNOS5420_MOD_BCLK_64FS << bfs_shift);
336 mod |= (EXYNOS5420_MOD_BCLK_96FS << bfs_shift);
339 mod |= (EXYNOS5420_MOD_BCLK_128FS << bfs_shift);
342 mod |= (EXYNOS5420_MOD_BCLK_192FS << bfs_shift);
345 mod |= (EXYNOS5420_MOD_BCLK_256FS << bfs_shift);
348 dev_err(&i2s->pdev->dev, "Wrong BCLK Divider!\n");
352 writel(mod, i2s->addr + I2SMOD);
356 static inline int get_blc(struct i2s_dai *i2s)
358 int blc = readl(i2s->addr + I2SMOD);
360 blc = (blc >> 13) & 0x3;
369 /* TX Channel Control */
370 static void i2s_txctrl(struct i2s_dai *i2s, int on)
372 void __iomem *addr = i2s->addr;
373 int txr_off = i2s->variant_regs->txr_off;
374 u32 con = readl(addr + I2SCON);
375 u32 mod = readl(addr + I2SMOD) & ~(3 << txr_off);
379 con &= ~CON_TXCH_PAUSE;
381 if (is_secondary(i2s)) {
382 con |= CON_TXSDMA_ACTIVE;
383 con &= ~CON_TXSDMA_PAUSE;
385 con |= CON_TXDMA_ACTIVE;
386 con &= ~CON_TXDMA_PAUSE;
389 if (any_rx_active(i2s))
394 if (is_secondary(i2s)) {
395 con |= CON_TXSDMA_PAUSE;
396 con &= ~CON_TXSDMA_ACTIVE;
398 con |= CON_TXDMA_PAUSE;
399 con &= ~CON_TXDMA_ACTIVE;
402 if (other_tx_active(i2s)) {
403 writel(con, addr + I2SCON);
407 con |= CON_TXCH_PAUSE;
409 if (any_rx_active(i2s))
415 writel(mod, addr + I2SMOD);
416 writel(con, addr + I2SCON);
419 /* RX Channel Control */
420 static void i2s_rxctrl(struct i2s_dai *i2s, int on)
422 void __iomem *addr = i2s->addr;
423 int txr_off = i2s->variant_regs->txr_off;
424 u32 con = readl(addr + I2SCON);
425 u32 mod = readl(addr + I2SMOD) & ~(3 << txr_off);
428 con |= CON_RXDMA_ACTIVE | CON_ACTIVE;
429 con &= ~(CON_RXDMA_PAUSE | CON_RXCH_PAUSE);
431 if (any_tx_active(i2s))
436 con |= CON_RXDMA_PAUSE | CON_RXCH_PAUSE;
437 con &= ~CON_RXDMA_ACTIVE;
439 if (any_tx_active(i2s))
445 writel(mod, addr + I2SMOD);
446 writel(con, addr + I2SCON);
449 /* Flush FIFO of an interface */
450 static inline void i2s_fifo(struct i2s_dai *i2s, u32 flush)
458 if (is_secondary(i2s))
459 fic = i2s->addr + I2SFICS;
461 fic = i2s->addr + I2SFIC;
464 writel(readl(fic) | flush, fic);
467 val = msecs_to_loops(1) / 1000; /* 1 usec */
471 writel(readl(fic) & ~flush, fic);
474 static int i2s_set_sysclk(struct snd_soc_dai *dai,
475 int clk_id, unsigned int rfs, int dir)
477 struct i2s_dai *i2s = to_info(dai);
478 struct i2s_dai *other = get_other_dai(i2s);
479 const struct samsung_i2s_variant_regs *i2s_regs = i2s->variant_regs;
480 unsigned int cdcon_mask = 1 << i2s_regs->cdclkcon_off;
481 unsigned int rsrc_mask = 1 << i2s_regs->rclksrc_off;
482 u32 mod, mask, val = 0;
485 spin_lock_irqsave(i2s->lock, flags);
486 mod = readl(i2s->addr + I2SMOD);
487 spin_unlock_irqrestore(i2s->lock, flags);
490 case SAMSUNG_I2S_OPCLK:
491 mask = MOD_OPCLK_MASK;
494 case SAMSUNG_I2S_CDCLK:
495 mask = 1 << i2s_regs->cdclkcon_off;
496 /* Shouldn't matter in GATING(CLOCK_IN) mode */
497 if (dir == SND_SOC_CLOCK_IN)
500 if ((rfs && other && other->rfs && (other->rfs != rfs)) ||
502 (((dir == SND_SOC_CLOCK_IN)
503 && !(mod & cdcon_mask)) ||
504 ((dir == SND_SOC_CLOCK_OUT)
505 && (mod & cdcon_mask))))) {
506 dev_err(&i2s->pdev->dev,
507 "%s:%d Other DAI busy\n", __func__, __LINE__);
511 if (dir == SND_SOC_CLOCK_IN)
512 val = 1 << i2s_regs->cdclkcon_off;
517 case SAMSUNG_I2S_RCLKSRC_0: /* clock corrsponding to IISMOD[10] := 0 */
518 case SAMSUNG_I2S_RCLKSRC_1: /* clock corrsponding to IISMOD[10] := 1 */
519 mask = 1 << i2s_regs->rclksrc_off;
521 if ((i2s->quirks & QUIRK_NO_MUXPSR)
522 || (clk_id == SAMSUNG_I2S_RCLKSRC_0))
527 if (!any_active(i2s)) {
528 if (i2s->op_clk && !IS_ERR(i2s->op_clk)) {
529 if ((clk_id && !(mod & rsrc_mask)) ||
530 (!clk_id && (mod & rsrc_mask))) {
531 clk_disable_unprepare(i2s->op_clk);
532 clk_put(i2s->op_clk);
535 clk_get_rate(i2s->op_clk);
541 i2s->op_clk = clk_get(&i2s->pdev->dev,
544 i2s->op_clk = clk_get(&i2s->pdev->dev,
547 if (WARN_ON(IS_ERR(i2s->op_clk)))
548 return PTR_ERR(i2s->op_clk);
550 clk_prepare_enable(i2s->op_clk);
551 i2s->rclk_srcrate = clk_get_rate(i2s->op_clk);
553 /* Over-ride the other's */
555 other->op_clk = i2s->op_clk;
556 other->rclk_srcrate = i2s->rclk_srcrate;
558 } else if ((!clk_id && (mod & rsrc_mask))
559 || (clk_id && !(mod & rsrc_mask))) {
560 dev_err(&i2s->pdev->dev,
561 "%s:%d Other DAI busy\n", __func__, __LINE__);
564 /* Call can't be on the active DAI */
565 i2s->op_clk = other->op_clk;
566 i2s->rclk_srcrate = other->rclk_srcrate;
571 val = 1 << i2s_regs->rclksrc_off;
574 dev_err(&i2s->pdev->dev, "We don't serve that!\n");
578 spin_lock_irqsave(i2s->lock, flags);
579 mod = readl(i2s->addr + I2SMOD);
580 mod = (mod & ~mask) | val;
581 writel(mod, i2s->addr + I2SMOD);
582 spin_unlock_irqrestore(i2s->lock, flags);
587 static int i2s_set_fmt(struct snd_soc_dai *dai,
590 struct i2s_dai *i2s = to_info(dai);
591 int lrp_shift, sdf_shift, sdf_mask, lrp_rlow, mod_slave;
595 lrp_shift = i2s->variant_regs->lrp_off;
596 sdf_shift = i2s->variant_regs->sdf_off;
597 mod_slave = 1 << i2s->variant_regs->mss_off;
599 sdf_mask = MOD_SDF_MASK << sdf_shift;
600 lrp_rlow = MOD_LR_RLOW << lrp_shift;
602 /* Format is priority */
603 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
604 case SND_SOC_DAIFMT_RIGHT_J:
606 tmp |= (MOD_SDF_MSB << sdf_shift);
608 case SND_SOC_DAIFMT_LEFT_J:
610 tmp |= (MOD_SDF_LSB << sdf_shift);
612 case SND_SOC_DAIFMT_I2S:
613 tmp |= (MOD_SDF_IIS << sdf_shift);
616 dev_err(&i2s->pdev->dev, "Format not supported\n");
621 * INV flag is relative to the FORMAT flag - if set it simply
622 * flips the polarity specified by the Standard
624 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
625 case SND_SOC_DAIFMT_NB_NF:
627 case SND_SOC_DAIFMT_NB_IF:
634 dev_err(&i2s->pdev->dev, "Polarity not supported\n");
638 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
639 case SND_SOC_DAIFMT_CBM_CFM:
642 case SND_SOC_DAIFMT_CBS_CFS:
644 * Set default source clock in Master mode, only when the
645 * CLK_I2S_RCLK_SRC clock is not exposed so we ensure any
646 * clock configuration assigned in DT is not overwritten.
648 if (i2s->rclk_srcrate == 0 && i2s->clk_data.clks == NULL)
649 i2s_set_sysclk(dai, SAMSUNG_I2S_RCLKSRC_0,
650 0, SND_SOC_CLOCK_IN);
653 dev_err(&i2s->pdev->dev, "master/slave format not supported\n");
657 spin_lock_irqsave(i2s->lock, flags);
658 mod = readl(i2s->addr + I2SMOD);
660 * Don't change the I2S mode if any controller is active on this
663 if (any_active(i2s) &&
664 ((mod & (sdf_mask | lrp_rlow | mod_slave)) != tmp)) {
665 spin_unlock_irqrestore(i2s->lock, flags);
666 dev_err(&i2s->pdev->dev,
667 "%s:%d Other DAI busy\n", __func__, __LINE__);
671 mod &= ~(sdf_mask | lrp_rlow | mod_slave);
673 writel(mod, i2s->addr + I2SMOD);
674 spin_unlock_irqrestore(i2s->lock, flags);
679 static int i2s_hw_params(struct snd_pcm_substream *substream,
680 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
682 struct i2s_dai *i2s = to_info(dai);
683 u32 mod, mask = 0, val = 0;
686 if (!is_secondary(i2s))
687 mask |= (MOD_DC2_EN | MOD_DC1_EN);
689 switch (params_channels(params)) {
696 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
697 i2s->dma_playback.dma_size = 4;
699 i2s->dma_capture.dma_size = 4;
702 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
703 i2s->dma_playback.dma_size = 2;
705 i2s->dma_capture.dma_size = 2;
709 dev_err(&i2s->pdev->dev, "%d channels not supported\n",
710 params_channels(params));
714 if (is_secondary(i2s))
715 mask |= MOD_BLCS_MASK;
717 mask |= MOD_BLCP_MASK;
720 mask |= MOD_BLC_MASK;
722 switch (params_width(params)) {
724 if (is_secondary(i2s))
725 val |= MOD_BLCS_8BIT;
727 val |= MOD_BLCP_8BIT;
732 if (is_secondary(i2s))
733 val |= MOD_BLCS_16BIT;
735 val |= MOD_BLCP_16BIT;
737 val |= MOD_BLC_16BIT;
740 if (is_secondary(i2s))
741 val |= MOD_BLCS_24BIT;
743 val |= MOD_BLCP_24BIT;
745 val |= MOD_BLC_24BIT;
748 dev_err(&i2s->pdev->dev, "Format(%d) not supported\n",
749 params_format(params));
753 spin_lock_irqsave(i2s->lock, flags);
754 mod = readl(i2s->addr + I2SMOD);
755 mod = (mod & ~mask) | val;
756 writel(mod, i2s->addr + I2SMOD);
757 spin_unlock_irqrestore(i2s->lock, flags);
759 samsung_asoc_init_dma_data(dai, &i2s->dma_playback, &i2s->dma_capture);
761 i2s->frmclk = params_rate(params);
766 /* We set constraints on the substream acc to the version of I2S */
767 static int i2s_startup(struct snd_pcm_substream *substream,
768 struct snd_soc_dai *dai)
770 struct i2s_dai *i2s = to_info(dai);
771 struct i2s_dai *other = get_other_dai(i2s);
774 spin_lock_irqsave(&lock, flags);
776 i2s->mode |= DAI_OPENED;
778 if (is_manager(other))
779 i2s->mode &= ~DAI_MANAGER;
781 i2s->mode |= DAI_MANAGER;
783 if (!any_active(i2s) && (i2s->quirks & QUIRK_NEED_RSTCLR))
784 writel(CON_RSTCLR, i2s->addr + I2SCON);
786 spin_unlock_irqrestore(&lock, flags);
791 static void i2s_shutdown(struct snd_pcm_substream *substream,
792 struct snd_soc_dai *dai)
794 struct i2s_dai *i2s = to_info(dai);
795 struct i2s_dai *other = get_other_dai(i2s);
798 spin_lock_irqsave(&lock, flags);
800 i2s->mode &= ~DAI_OPENED;
801 i2s->mode &= ~DAI_MANAGER;
803 if (is_opened(other))
804 other->mode |= DAI_MANAGER;
806 /* Reset any constraint on RFS and BFS */
810 spin_unlock_irqrestore(&lock, flags);
813 static int config_setup(struct i2s_dai *i2s)
815 struct i2s_dai *other = get_other_dai(i2s);
816 unsigned rfs, bfs, blc;
826 /* Select least possible multiple(2) if no constraint set */
835 if ((rfs == 256 || rfs == 512) && (blc == 24)) {
836 dev_err(&i2s->pdev->dev,
837 "%d-RFS not supported for 24-blc\n", rfs);
842 if (bfs == 16 || bfs == 32)
848 /* If already setup and running */
849 if (any_active(i2s) && (get_rfs(i2s) != rfs || get_bfs(i2s) != bfs)) {
850 dev_err(&i2s->pdev->dev,
851 "%s:%d Other DAI busy\n", __func__, __LINE__);
858 /* Don't bother with PSR in Slave mode */
862 if (!(i2s->quirks & QUIRK_NO_MUXPSR)) {
863 struct clk *rclksrc = i2s->clk_table[CLK_I2S_RCLK_SRC];
865 if (i2s->rclk_srcrate == 0 && rclksrc && !IS_ERR(rclksrc))
866 i2s->rclk_srcrate = clk_get_rate(rclksrc);
868 psr = i2s->rclk_srcrate / i2s->frmclk / rfs;
869 writel(((psr - 1) << 8) | PSR_PSREN, i2s->addr + I2SPSR);
870 dev_dbg(&i2s->pdev->dev,
871 "RCLK_SRC=%luHz PSR=%u, RCLK=%dfs, BCLK=%dfs\n",
872 i2s->rclk_srcrate, psr, rfs, bfs);
878 static int i2s_trigger(struct snd_pcm_substream *substream,
879 int cmd, struct snd_soc_dai *dai)
881 int capture = (substream->stream == SNDRV_PCM_STREAM_CAPTURE);
882 struct snd_soc_pcm_runtime *rtd = substream->private_data;
883 struct i2s_dai *i2s = to_info(rtd->cpu_dai);
887 case SNDRV_PCM_TRIGGER_START:
888 case SNDRV_PCM_TRIGGER_RESUME:
889 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
890 spin_lock_irqsave(i2s->lock, flags);
892 if (config_setup(i2s)) {
893 spin_unlock_irqrestore(i2s->lock, flags);
902 spin_unlock_irqrestore(i2s->lock, flags);
904 case SNDRV_PCM_TRIGGER_STOP:
905 case SNDRV_PCM_TRIGGER_SUSPEND:
906 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
907 spin_lock_irqsave(i2s->lock, flags);
911 i2s_fifo(i2s, FIC_RXFLUSH);
914 i2s_fifo(i2s, FIC_TXFLUSH);
917 spin_unlock_irqrestore(i2s->lock, flags);
924 static int i2s_set_clkdiv(struct snd_soc_dai *dai,
927 struct i2s_dai *i2s = to_info(dai);
928 struct i2s_dai *other = get_other_dai(i2s);
931 case SAMSUNG_I2S_DIV_BCLK:
932 if ((any_active(i2s) && div && (get_bfs(i2s) != div))
933 || (other && other->bfs && (other->bfs != div))) {
934 dev_err(&i2s->pdev->dev,
935 "%s:%d Other DAI busy\n", __func__, __LINE__);
941 dev_err(&i2s->pdev->dev,
942 "Invalid clock divider(%d)\n", div_id);
949 static snd_pcm_sframes_t
950 i2s_delay(struct snd_pcm_substream *substream, struct snd_soc_dai *dai)
952 struct i2s_dai *i2s = to_info(dai);
953 u32 reg = readl(i2s->addr + I2SFIC);
954 snd_pcm_sframes_t delay;
955 const struct samsung_i2s_variant_regs *i2s_regs = i2s->variant_regs;
957 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
958 delay = FIC_RXCOUNT(reg);
959 else if (is_secondary(i2s))
960 delay = FICS_TXCOUNT(readl(i2s->addr + I2SFICS));
962 delay = (reg >> i2s_regs->ftx0cnt_off) & 0x7f;
968 static int i2s_suspend(struct snd_soc_dai *dai)
970 struct i2s_dai *i2s = to_info(dai);
972 i2s->suspend_i2smod = readl(i2s->addr + I2SMOD);
973 i2s->suspend_i2scon = readl(i2s->addr + I2SCON);
974 i2s->suspend_i2spsr = readl(i2s->addr + I2SPSR);
979 static int i2s_resume(struct snd_soc_dai *dai)
981 struct i2s_dai *i2s = to_info(dai);
983 writel(i2s->suspend_i2scon, i2s->addr + I2SCON);
984 writel(i2s->suspend_i2smod, i2s->addr + I2SMOD);
985 writel(i2s->suspend_i2spsr, i2s->addr + I2SPSR);
990 #define i2s_suspend NULL
991 #define i2s_resume NULL
994 static int samsung_i2s_dai_probe(struct snd_soc_dai *dai)
996 struct i2s_dai *i2s = to_info(dai);
997 struct i2s_dai *other = get_other_dai(i2s);
1000 if (is_secondary(i2s)) { /* If this is probe on the secondary DAI */
1001 samsung_asoc_init_dma_data(dai, &other->sec_dai->dma_playback,
1004 samsung_asoc_init_dma_data(dai, &i2s->dma_playback,
1007 if (i2s->quirks & QUIRK_NEED_RSTCLR)
1008 writel(CON_RSTCLR, i2s->addr + I2SCON);
1010 if (i2s->quirks & QUIRK_SUPPORTS_IDMA)
1011 idma_reg_addr_init(i2s->addr,
1012 i2s->sec_dai->idma_playback.dma_addr);
1015 /* Reset any constraint on RFS and BFS */
1018 i2s->rclk_srcrate = 0;
1020 spin_lock_irqsave(i2s->lock, flags);
1023 i2s_fifo(i2s, FIC_TXFLUSH);
1024 i2s_fifo(other, FIC_TXFLUSH);
1025 i2s_fifo(i2s, FIC_RXFLUSH);
1026 spin_unlock_irqrestore(i2s->lock, flags);
1028 /* Gate CDCLK by default */
1029 if (!is_opened(other))
1030 i2s_set_sysclk(dai, SAMSUNG_I2S_CDCLK,
1031 0, SND_SOC_CLOCK_IN);
1036 static int samsung_i2s_dai_remove(struct snd_soc_dai *dai)
1038 struct i2s_dai *i2s = snd_soc_dai_get_drvdata(dai);
1039 unsigned long flags;
1041 if (!is_secondary(i2s)) {
1042 if (i2s->quirks & QUIRK_NEED_RSTCLR) {
1043 spin_lock_irqsave(i2s->lock, flags);
1044 writel(0, i2s->addr + I2SCON);
1045 spin_unlock_irqrestore(i2s->lock, flags);
1052 static const struct snd_soc_dai_ops samsung_i2s_dai_ops = {
1053 .trigger = i2s_trigger,
1054 .hw_params = i2s_hw_params,
1055 .set_fmt = i2s_set_fmt,
1056 .set_clkdiv = i2s_set_clkdiv,
1057 .set_sysclk = i2s_set_sysclk,
1058 .startup = i2s_startup,
1059 .shutdown = i2s_shutdown,
1063 static const struct snd_soc_component_driver samsung_i2s_component = {
1064 .name = "samsung-i2s",
1067 #define SAMSUNG_I2S_RATES SNDRV_PCM_RATE_8000_96000
1069 #define SAMSUNG_I2S_FMTS (SNDRV_PCM_FMTBIT_S8 | \
1070 SNDRV_PCM_FMTBIT_S16_LE | \
1071 SNDRV_PCM_FMTBIT_S24_LE)
1073 static struct i2s_dai *i2s_alloc_dai(struct platform_device *pdev, bool sec)
1075 struct i2s_dai *i2s;
1078 i2s = devm_kzalloc(&pdev->dev, sizeof(struct i2s_dai), GFP_KERNEL);
1083 i2s->pri_dai = NULL;
1084 i2s->sec_dai = NULL;
1085 i2s->i2s_dai_drv.symmetric_rates = 1;
1086 i2s->i2s_dai_drv.probe = samsung_i2s_dai_probe;
1087 i2s->i2s_dai_drv.remove = samsung_i2s_dai_remove;
1088 i2s->i2s_dai_drv.ops = &samsung_i2s_dai_ops;
1089 i2s->i2s_dai_drv.suspend = i2s_suspend;
1090 i2s->i2s_dai_drv.resume = i2s_resume;
1091 i2s->i2s_dai_drv.playback.channels_min = 1;
1092 i2s->i2s_dai_drv.playback.channels_max = 2;
1093 i2s->i2s_dai_drv.playback.rates = SAMSUNG_I2S_RATES;
1094 i2s->i2s_dai_drv.playback.formats = SAMSUNG_I2S_FMTS;
1097 i2s->i2s_dai_drv.capture.channels_min = 1;
1098 i2s->i2s_dai_drv.capture.channels_max = 2;
1099 i2s->i2s_dai_drv.capture.rates = SAMSUNG_I2S_RATES;
1100 i2s->i2s_dai_drv.capture.formats = SAMSUNG_I2S_FMTS;
1101 dev_set_drvdata(&i2s->pdev->dev, i2s);
1102 } else { /* Create a new platform_device for Secondary */
1103 i2s->pdev = platform_device_alloc("samsung-i2s-sec", -1);
1107 i2s->pdev->dev.parent = &pdev->dev;
1109 platform_set_drvdata(i2s->pdev, i2s);
1110 ret = platform_device_add(i2s->pdev);
1118 static const struct of_device_id exynos_i2s_match[];
1120 static inline const struct samsung_i2s_dai_data *samsung_i2s_get_driver_data(
1121 struct platform_device *pdev)
1123 if (IS_ENABLED(CONFIG_OF) && pdev->dev.of_node) {
1124 const struct of_device_id *match;
1125 match = of_match_node(exynos_i2s_match, pdev->dev.of_node);
1126 return match ? match->data : NULL;
1128 return (struct samsung_i2s_dai_data *)
1129 platform_get_device_id(pdev)->driver_data;
1134 static int i2s_runtime_suspend(struct device *dev)
1136 struct i2s_dai *i2s = dev_get_drvdata(dev);
1138 clk_disable_unprepare(i2s->clk);
1143 static int i2s_runtime_resume(struct device *dev)
1145 struct i2s_dai *i2s = dev_get_drvdata(dev);
1147 clk_prepare_enable(i2s->clk);
1151 #endif /* CONFIG_PM */
1153 static void i2s_unregister_clocks(struct i2s_dai *i2s)
1157 for (i = 0; i < i2s->clk_data.clk_num; i++) {
1158 if (!IS_ERR(i2s->clk_table[i]))
1159 clk_unregister(i2s->clk_table[i]);
1163 static void i2s_unregister_clock_provider(struct platform_device *pdev)
1165 struct i2s_dai *i2s = dev_get_drvdata(&pdev->dev);
1167 of_clk_del_provider(pdev->dev.of_node);
1168 i2s_unregister_clocks(i2s);
1171 static int i2s_register_clock_provider(struct platform_device *pdev)
1173 struct device *dev = &pdev->dev;
1174 struct i2s_dai *i2s = dev_get_drvdata(dev);
1175 const char *clk_name[2] = { "i2s_opclk0", "i2s_opclk1" };
1176 const char *p_names[2] = { NULL };
1177 const struct samsung_i2s_variant_regs *reg_info = i2s->variant_regs;
1178 struct clk *rclksrc;
1181 /* Register the clock provider only if it's expected in the DTB */
1182 if (!of_find_property(dev->of_node, "#clock-cells", NULL))
1185 /* Get the RCLKSRC mux clock parent clock names */
1186 for (i = 0; i < ARRAY_SIZE(p_names); i++) {
1187 rclksrc = clk_get(dev, clk_name[i]);
1188 if (IS_ERR(rclksrc))
1190 p_names[i] = __clk_get_name(rclksrc);
1194 if (!(i2s->quirks & QUIRK_NO_MUXPSR)) {
1195 /* Activate the prescaler */
1196 u32 val = readl(i2s->addr + I2SPSR);
1197 writel(val | PSR_PSREN, i2s->addr + I2SPSR);
1199 i2s->clk_table[CLK_I2S_RCLK_SRC] = clk_register_mux(NULL,
1200 "i2s_rclksrc", p_names, ARRAY_SIZE(p_names),
1201 CLK_SET_RATE_NO_REPARENT | CLK_SET_RATE_PARENT,
1202 i2s->addr + I2SMOD, reg_info->rclksrc_off,
1205 i2s->clk_table[CLK_I2S_RCLK_PSR] = clk_register_divider(NULL,
1206 "i2s_presc", "i2s_rclksrc",
1207 CLK_SET_RATE_PARENT,
1208 i2s->addr + I2SPSR, 8, 6, 0, i2s->lock);
1210 p_names[0] = "i2s_presc";
1211 i2s->clk_data.clk_num = 2;
1213 of_property_read_string_index(dev->of_node,
1214 "clock-output-names", 0, &clk_name[0]);
1216 i2s->clk_table[CLK_I2S_CDCLK] = clk_register_gate(NULL, clk_name[0],
1217 p_names[0], CLK_SET_RATE_PARENT,
1218 i2s->addr + I2SMOD, reg_info->cdclkcon_off,
1219 CLK_GATE_SET_TO_DISABLE, i2s->lock);
1221 i2s->clk_data.clk_num += 1;
1222 i2s->clk_data.clks = i2s->clk_table;
1224 ret = of_clk_add_provider(dev->of_node, of_clk_src_onecell_get,
1227 dev_err(dev, "failed to add clock provider: %d\n", ret);
1228 i2s_unregister_clocks(i2s);
1234 static int samsung_i2s_probe(struct platform_device *pdev)
1236 struct i2s_dai *pri_dai, *sec_dai = NULL;
1237 struct s3c_audio_pdata *i2s_pdata = pdev->dev.platform_data;
1238 struct samsung_i2s *i2s_cfg = NULL;
1239 struct resource *res;
1240 u32 regs_base, quirks = 0, idma_addr = 0;
1241 struct device_node *np = pdev->dev.of_node;
1242 const struct samsung_i2s_dai_data *i2s_dai_data;
1245 /* Call during Seconday interface registration */
1246 i2s_dai_data = samsung_i2s_get_driver_data(pdev);
1248 if (i2s_dai_data->dai_type == TYPE_SEC) {
1249 sec_dai = dev_get_drvdata(&pdev->dev);
1251 dev_err(&pdev->dev, "Unable to get drvdata\n");
1254 ret = devm_snd_soc_register_component(&sec_dai->pdev->dev,
1255 &samsung_i2s_component,
1256 &sec_dai->i2s_dai_drv, 1);
1260 return samsung_asoc_dma_platform_register(&pdev->dev);
1263 pri_dai = i2s_alloc_dai(pdev, false);
1265 dev_err(&pdev->dev, "Unable to alloc I2S_pri\n");
1269 spin_lock_init(&pri_dai->spinlock);
1270 pri_dai->lock = &pri_dai->spinlock;
1273 if (i2s_pdata == NULL) {
1274 dev_err(&pdev->dev, "Can't work without s3c_audio_pdata\n");
1278 pri_dai->dma_playback.slave = i2s_pdata->dma_playback;
1279 pri_dai->dma_capture.slave = i2s_pdata->dma_capture;
1281 if (&i2s_pdata->type)
1282 i2s_cfg = &i2s_pdata->type.i2s;
1285 quirks = i2s_cfg->quirks;
1286 idma_addr = i2s_cfg->idma_addr;
1289 quirks = i2s_dai_data->quirks;
1290 if (of_property_read_u32(np, "samsung,idma-addr",
1292 if (quirks & QUIRK_SUPPORTS_IDMA) {
1293 dev_info(&pdev->dev, "idma address is not"\
1299 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1300 pri_dai->addr = devm_ioremap_resource(&pdev->dev, res);
1301 if (IS_ERR(pri_dai->addr))
1302 return PTR_ERR(pri_dai->addr);
1304 regs_base = res->start;
1306 pri_dai->clk = devm_clk_get(&pdev->dev, "iis");
1307 if (IS_ERR(pri_dai->clk)) {
1308 dev_err(&pdev->dev, "Failed to get iis clock\n");
1309 return PTR_ERR(pri_dai->clk);
1312 ret = clk_prepare_enable(pri_dai->clk);
1314 dev_err(&pdev->dev, "failed to enable clock: %d\n", ret);
1317 pri_dai->dma_playback.dma_addr = regs_base + I2STXD;
1318 pri_dai->dma_capture.dma_addr = regs_base + I2SRXD;
1319 pri_dai->dma_playback.ch_name = "tx";
1320 pri_dai->dma_capture.ch_name = "rx";
1321 pri_dai->dma_playback.dma_size = 4;
1322 pri_dai->dma_capture.dma_size = 4;
1323 pri_dai->quirks = quirks;
1324 pri_dai->variant_regs = i2s_dai_data->i2s_variant_regs;
1326 if (quirks & QUIRK_PRI_6CHAN)
1327 pri_dai->i2s_dai_drv.playback.channels_max = 6;
1329 if (quirks & QUIRK_SEC_DAI) {
1330 sec_dai = i2s_alloc_dai(pdev, true);
1332 dev_err(&pdev->dev, "Unable to alloc I2S_sec\n");
1336 sec_dai->lock = &pri_dai->spinlock;
1337 sec_dai->variant_regs = pri_dai->variant_regs;
1338 sec_dai->dma_playback.dma_addr = regs_base + I2STXDS;
1339 sec_dai->dma_playback.ch_name = "tx-sec";
1342 sec_dai->dma_playback.slave = i2s_pdata->dma_play_sec;
1344 sec_dai->dma_playback.dma_size = 4;
1345 sec_dai->addr = pri_dai->addr;
1346 sec_dai->clk = pri_dai->clk;
1347 sec_dai->quirks = quirks;
1348 sec_dai->idma_playback.dma_addr = idma_addr;
1349 sec_dai->pri_dai = pri_dai;
1350 pri_dai->sec_dai = sec_dai;
1353 if (i2s_pdata && i2s_pdata->cfg_gpio && i2s_pdata->cfg_gpio(pdev)) {
1354 dev_err(&pdev->dev, "Unable to configure gpio\n");
1358 devm_snd_soc_register_component(&pri_dai->pdev->dev,
1359 &samsung_i2s_component,
1360 &pri_dai->i2s_dai_drv, 1);
1362 pm_runtime_enable(&pdev->dev);
1364 ret = samsung_asoc_dma_platform_register(&pdev->dev);
1368 return i2s_register_clock_provider(pdev);
1371 static int samsung_i2s_remove(struct platform_device *pdev)
1373 struct i2s_dai *i2s, *other;
1375 i2s = dev_get_drvdata(&pdev->dev);
1376 other = get_other_dai(i2s);
1379 other->pri_dai = NULL;
1380 other->sec_dai = NULL;
1382 pm_runtime_disable(&pdev->dev);
1385 if (!is_secondary(i2s)) {
1386 i2s_unregister_clock_provider(pdev);
1387 clk_disable_unprepare(i2s->clk);
1390 i2s->pri_dai = NULL;
1391 i2s->sec_dai = NULL;
1396 static const struct samsung_i2s_variant_regs i2sv3_regs = {
1410 static const struct samsung_i2s_variant_regs i2sv6_regs = {
1424 static const struct samsung_i2s_variant_regs i2sv7_regs = {
1438 static const struct samsung_i2s_variant_regs i2sv5_i2s1_regs = {
1452 static const struct samsung_i2s_dai_data i2sv3_dai_type = {
1453 .dai_type = TYPE_PRI,
1454 .quirks = QUIRK_NO_MUXPSR,
1455 .i2s_variant_regs = &i2sv3_regs,
1458 static const struct samsung_i2s_dai_data i2sv5_dai_type = {
1459 .dai_type = TYPE_PRI,
1460 .quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI | QUIRK_NEED_RSTCLR |
1461 QUIRK_SUPPORTS_IDMA,
1462 .i2s_variant_regs = &i2sv3_regs,
1465 static const struct samsung_i2s_dai_data i2sv6_dai_type = {
1466 .dai_type = TYPE_PRI,
1467 .quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI | QUIRK_NEED_RSTCLR |
1468 QUIRK_SUPPORTS_TDM | QUIRK_SUPPORTS_IDMA,
1469 .i2s_variant_regs = &i2sv6_regs,
1472 static const struct samsung_i2s_dai_data i2sv7_dai_type = {
1473 .dai_type = TYPE_PRI,
1474 .quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI | QUIRK_NEED_RSTCLR |
1476 .i2s_variant_regs = &i2sv7_regs,
1479 static const struct samsung_i2s_dai_data i2sv5_dai_type_i2s1 = {
1480 .dai_type = TYPE_PRI,
1481 .quirks = QUIRK_PRI_6CHAN | QUIRK_NEED_RSTCLR,
1482 .i2s_variant_regs = &i2sv5_i2s1_regs,
1485 static const struct samsung_i2s_dai_data samsung_dai_type_pri = {
1486 .dai_type = TYPE_PRI,
1489 static const struct samsung_i2s_dai_data samsung_dai_type_sec = {
1490 .dai_type = TYPE_SEC,
1493 static const struct platform_device_id samsung_i2s_driver_ids[] = {
1495 .name = "samsung-i2s",
1496 .driver_data = (kernel_ulong_t)&i2sv3_dai_type,
1498 .name = "samsung-i2s-sec",
1499 .driver_data = (kernel_ulong_t)&samsung_dai_type_sec,
1501 .name = "samsung-i2sv4",
1502 .driver_data = (kernel_ulong_t)&i2sv5_dai_type,
1506 MODULE_DEVICE_TABLE(platform, samsung_i2s_driver_ids);
1509 static const struct of_device_id exynos_i2s_match[] = {
1511 .compatible = "samsung,s3c6410-i2s",
1512 .data = &i2sv3_dai_type,
1514 .compatible = "samsung,s5pv210-i2s",
1515 .data = &i2sv5_dai_type,
1517 .compatible = "samsung,exynos5420-i2s",
1518 .data = &i2sv6_dai_type,
1520 .compatible = "samsung,exynos7-i2s",
1521 .data = &i2sv7_dai_type,
1523 .compatible = "samsung,exynos7-i2s1",
1524 .data = &i2sv5_dai_type_i2s1,
1528 MODULE_DEVICE_TABLE(of, exynos_i2s_match);
1531 static const struct dev_pm_ops samsung_i2s_pm = {
1532 SET_RUNTIME_PM_OPS(i2s_runtime_suspend,
1533 i2s_runtime_resume, NULL)
1536 static struct platform_driver samsung_i2s_driver = {
1537 .probe = samsung_i2s_probe,
1538 .remove = samsung_i2s_remove,
1539 .id_table = samsung_i2s_driver_ids,
1541 .name = "samsung-i2s",
1542 .of_match_table = of_match_ptr(exynos_i2s_match),
1543 .pm = &samsung_i2s_pm,
1547 module_platform_driver(samsung_i2s_driver);
1549 /* Module information */
1550 MODULE_AUTHOR("Jaswinder Singh, <jassisinghbrar@gmail.com>");
1551 MODULE_DESCRIPTION("Samsung I2S Interface");
1552 MODULE_ALIAS("platform:samsung-i2s");
1553 MODULE_LICENSE("GPL");