sound/soc/qcom/qdsp6/q6afe-clocks.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 // Copyright (c) 2020, Linaro Limited
   3
   4 #include <dt-bindings/sound/qcom,q6afe.h>
   5 #include <linux/err.h>
   6 #include <linux/init.h>
   7 #include <linux/clk-provider.h>
   8 #include <linux/module.h>
   9 #include <linux/device.h>
  10 #include <linux/platform_device.h>
  11 #include "q6dsp-lpass-clocks.h"
  12 #include "q6afe.h"
  13
  14 #define Q6AFE_CLK(id) {                                 \
  15                 .clk_id = id,                           \
  16                 .q6dsp_clk_id   = Q6AFE_##id,           \
  17                 .name = #id,                            \
  18                 .rate = 19200000,                       \
  19         }
  20
  21
  22 static const struct q6dsp_clk_init q6afe_clks[] = {
  23         Q6AFE_CLK(LPASS_CLK_ID_PRI_MI2S_IBIT),
  24         Q6AFE_CLK(LPASS_CLK_ID_PRI_MI2S_EBIT),
  25         Q6AFE_CLK(LPASS_CLK_ID_SEC_MI2S_IBIT),
  26         Q6AFE_CLK(LPASS_CLK_ID_SEC_MI2S_EBIT),
  27         Q6AFE_CLK(LPASS_CLK_ID_TER_MI2S_IBIT),
  28         Q6AFE_CLK(LPASS_CLK_ID_TER_MI2S_EBIT),
  29         Q6AFE_CLK(LPASS_CLK_ID_QUAD_MI2S_IBIT),
  30         Q6AFE_CLK(LPASS_CLK_ID_QUAD_MI2S_EBIT),
  31         Q6AFE_CLK(LPASS_CLK_ID_SPEAKER_I2S_IBIT),
  32         Q6AFE_CLK(LPASS_CLK_ID_SPEAKER_I2S_EBIT),
  33         Q6AFE_CLK(LPASS_CLK_ID_SPEAKER_I2S_OSR),
  34         Q6AFE_CLK(LPASS_CLK_ID_QUI_MI2S_IBIT),
  35         Q6AFE_CLK(LPASS_CLK_ID_QUI_MI2S_EBIT),
  36         Q6AFE_CLK(LPASS_CLK_ID_SEN_MI2S_IBIT),
  37         Q6AFE_CLK(LPASS_CLK_ID_SEN_MI2S_EBIT),
  38         Q6AFE_CLK(LPASS_CLK_ID_INT0_MI2S_IBIT),
  39         Q6AFE_CLK(LPASS_CLK_ID_INT1_MI2S_IBIT),
  40         Q6AFE_CLK(LPASS_CLK_ID_INT2_MI2S_IBIT),
  41         Q6AFE_CLK(LPASS_CLK_ID_INT3_MI2S_IBIT),
  42         Q6AFE_CLK(LPASS_CLK_ID_INT4_MI2S_IBIT),
  43         Q6AFE_CLK(LPASS_CLK_ID_INT5_MI2S_IBIT),
  44         Q6AFE_CLK(LPASS_CLK_ID_INT6_MI2S_IBIT),
  45         Q6AFE_CLK(LPASS_CLK_ID_QUI_MI2S_OSR),
  46         Q6AFE_CLK(LPASS_CLK_ID_PRI_PCM_IBIT),
  47         Q6AFE_CLK(LPASS_CLK_ID_PRI_PCM_EBIT),
  48         Q6AFE_CLK(LPASS_CLK_ID_SEC_PCM_IBIT),
  49         Q6AFE_CLK(LPASS_CLK_ID_SEC_PCM_EBIT),
  50         Q6AFE_CLK(LPASS_CLK_ID_TER_PCM_IBIT),
  51         Q6AFE_CLK(LPASS_CLK_ID_TER_PCM_EBIT),
  52         Q6AFE_CLK(LPASS_CLK_ID_QUAD_PCM_IBIT),
  53         Q6AFE_CLK(LPASS_CLK_ID_QUAD_PCM_EBIT),
  54         Q6AFE_CLK(LPASS_CLK_ID_QUIN_PCM_IBIT),
  55         Q6AFE_CLK(LPASS_CLK_ID_QUIN_PCM_EBIT),
  56         Q6AFE_CLK(LPASS_CLK_ID_QUI_PCM_OSR),
  57         Q6AFE_CLK(LPASS_CLK_ID_PRI_TDM_IBIT),
  58         Q6AFE_CLK(LPASS_CLK_ID_PRI_TDM_EBIT),
  59         Q6AFE_CLK(LPASS_CLK_ID_SEC_TDM_IBIT),
  60         Q6AFE_CLK(LPASS_CLK_ID_SEC_TDM_EBIT),
  61         Q6AFE_CLK(LPASS_CLK_ID_TER_TDM_IBIT),
  62         Q6AFE_CLK(LPASS_CLK_ID_TER_TDM_EBIT),
  63         Q6AFE_CLK(LPASS_CLK_ID_QUAD_TDM_IBIT),
  64         Q6AFE_CLK(LPASS_CLK_ID_QUAD_TDM_EBIT),
  65         Q6AFE_CLK(LPASS_CLK_ID_QUIN_TDM_IBIT),
  66         Q6AFE_CLK(LPASS_CLK_ID_QUIN_TDM_EBIT),
  67         Q6AFE_CLK(LPASS_CLK_ID_QUIN_TDM_OSR),
  68         Q6AFE_CLK(LPASS_CLK_ID_MCLK_1),
  69         Q6AFE_CLK(LPASS_CLK_ID_MCLK_2),
  70         Q6AFE_CLK(LPASS_CLK_ID_MCLK_3),
  71         Q6AFE_CLK(LPASS_CLK_ID_MCLK_4),
  72         Q6AFE_CLK(LPASS_CLK_ID_INTERNAL_DIGITAL_CODEC_CORE),
  73         Q6AFE_CLK(LPASS_CLK_ID_INT_MCLK_0),
  74         Q6AFE_CLK(LPASS_CLK_ID_INT_MCLK_1),
  75         Q6AFE_CLK(LPASS_CLK_ID_WSA_CORE_MCLK),
  76         Q6AFE_CLK(LPASS_CLK_ID_WSA_CORE_NPL_MCLK),
  77         Q6AFE_CLK(LPASS_CLK_ID_VA_CORE_MCLK),
  78         Q6AFE_CLK(LPASS_CLK_ID_TX_CORE_MCLK),
  79         Q6AFE_CLK(LPASS_CLK_ID_TX_CORE_NPL_MCLK),
  80         Q6AFE_CLK(LPASS_CLK_ID_RX_CORE_MCLK),
  81         Q6AFE_CLK(LPASS_CLK_ID_RX_CORE_NPL_MCLK),
  82         Q6AFE_CLK(LPASS_CLK_ID_VA_CORE_2X_MCLK),
  83         Q6DSP_VOTE_CLK(LPASS_HW_AVTIMER_VOTE,
  84                        Q6AFE_LPASS_CORE_AVTIMER_BLOCK,
  85                        "LPASS_AVTIMER_MACRO"),
  86         Q6DSP_VOTE_CLK(LPASS_HW_MACRO_VOTE,
  87                        Q6AFE_LPASS_CORE_HW_MACRO_BLOCK,
  88                        "LPASS_HW_MACRO"),
  89         Q6DSP_VOTE_CLK(LPASS_HW_DCODEC_VOTE,
  90                        Q6AFE_LPASS_CORE_HW_DCODEC_BLOCK,
  91                        "LPASS_HW_DCODEC"),
  92 };
  93
  94 static const struct q6dsp_clk_desc q6dsp_clk_q6afe __maybe_unused = {
  95         .clks = q6afe_clks,
  96         .num_clks = ARRAY_SIZE(q6afe_clks),
  97         .lpass_set_clk = q6afe_set_lpass_clock,
  98         .lpass_vote_clk = q6afe_vote_lpass_core_hw,
  99         .lpass_unvote_clk = q6afe_unvote_lpass_core_hw,
 100 };
 101
 102 #ifdef CONFIG_OF
 103 static const struct of_device_id q6afe_clock_device_id[] = {
 104         { .compatible = "qcom,q6afe-clocks", .data = &q6dsp_clk_q6afe },
 105         {},
 106 };
 107 MODULE_DEVICE_TABLE(of, q6afe_clock_device_id);
 108 #endif
 109
 110 static struct platform_driver q6afe_clock_platform_driver = {
 111         .driver = {
 112                 .name = "q6afe-clock",
 113                 .of_match_table = of_match_ptr(q6afe_clock_device_id),
 114         },
 115         .probe = q6dsp_clock_dev_probe,
 116 };
 117 module_platform_driver(q6afe_clock_platform_driver);
 118
 119 MODULE_DESCRIPTION("Q6 Audio Frontend clock driver");
 120 MODULE_LICENSE("GPL v2");