sound/soc/qcom/lpass-platform.c

   1 /*
   2  * Copyright (c) 2010-2011,2013-2015 The Linux Foundation. All rights reserved.
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License version 2 and
   6  * only version 2 as published by the Free Software Foundation.
   7  *
   8  * This program is distributed in the hope that it will be useful,
   9  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  10  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  11  * GNU General Public License for more details.
  12  *
  13  * lpass-platform.c -- ALSA SoC platform driver for QTi LPASS
  14  */
  15
  16 #include <linux/dma-mapping.h>
  17 #include <linux/export.h>
  18 #include <linux/kernel.h>
  19 #include <linux/module.h>
  20 #include <linux/platform_device.h>
  21 #include <sound/pcm_params.h>
  22 #include <linux/regmap.h>
  23 #include <sound/soc.h>
  24 #include "lpass-lpaif-reg.h"
  25 #include "lpass.h"
  26
  27 struct lpass_pcm_data {
  28         int rdma_ch;
  29         int wrdma_ch;
  30         int i2s_port;
  31 };
  32
  33 #define LPASS_PLATFORM_BUFFER_SIZE      (16 * 1024)
  34 #define LPASS_PLATFORM_PERIODS          2
  35
  36 static struct snd_pcm_hardware lpass_platform_pcm_hardware = {
  37         .info                   =       SNDRV_PCM_INFO_MMAP |
  38                                         SNDRV_PCM_INFO_MMAP_VALID |
  39                                         SNDRV_PCM_INFO_INTERLEAVED |
  40                                         SNDRV_PCM_INFO_PAUSE |
  41                                         SNDRV_PCM_INFO_RESUME,
  42         .formats                =       SNDRV_PCM_FMTBIT_S16 |
  43                                         SNDRV_PCM_FMTBIT_S24 |
  44                                         SNDRV_PCM_FMTBIT_S32,
  45         .rates                  =       SNDRV_PCM_RATE_8000_192000,
  46         .rate_min               =       8000,
  47         .rate_max               =       192000,
  48         .channels_min           =       1,
  49         .channels_max           =       8,
  50         .buffer_bytes_max       =       LPASS_PLATFORM_BUFFER_SIZE,
  51         .period_bytes_max       =       LPASS_PLATFORM_BUFFER_SIZE /
  52                                                 LPASS_PLATFORM_PERIODS,
  53         .period_bytes_min       =       LPASS_PLATFORM_BUFFER_SIZE /
  54                                                 LPASS_PLATFORM_PERIODS,
  55         .periods_min            =       LPASS_PLATFORM_PERIODS,
  56         .periods_max            =       LPASS_PLATFORM_PERIODS,
  57         .fifo_size              =       0,
  58 };
  59
  60 static int lpass_platform_pcmops_open(struct snd_pcm_substream *substream)
  61 {
  62         struct snd_pcm_runtime *runtime = substream->runtime;
  63         struct snd_soc_pcm_runtime *soc_runtime = substream->private_data;
  64         struct snd_soc_dai *cpu_dai = soc_runtime->cpu_dai;
  65         struct lpass_data *drvdata =
  66                 snd_soc_platform_get_drvdata(soc_runtime->platform);
  67         struct lpass_variant *v = drvdata->variant;
  68         int ret, dma_ch, dir = substream->stream;
  69         struct lpass_pcm_data *data;
  70
  71         data = kzalloc(sizeof(*data), GFP_KERNEL);
  72         if (!data)
  73                 return -ENOMEM;
  74
  75         data->i2s_port = cpu_dai->driver->id;
  76         runtime->private_data = data;
  77
  78         dma_ch = 0;
  79         if (v->alloc_dma_channel)
  80                 dma_ch = v->alloc_dma_channel(drvdata, dir);
  81         else
  82                 dma_ch = 0;
  83
  84         if (dma_ch < 0)
  85                 return dma_ch;
  86
  87         drvdata->substream[dma_ch] = substream;
  88
  89         ret = regmap_write(drvdata->lpaif_map,
  90                         LPAIF_DMACTL_REG(v, dma_ch, dir), 0);
  91         if (ret) {
  92                 dev_err(soc_runtime->dev,
  93                         "%s() error writing to rdmactl reg: %d\n",
  94                         __func__, ret);
  95                         return ret;
  96         }
  97
  98         if (dir == SNDRV_PCM_STREAM_PLAYBACK)
  99                 data->rdma_ch = dma_ch;
 100         else
 101                 data->wrdma_ch = dma_ch;
 102
 103         snd_soc_set_runtime_hwparams(substream, &lpass_platform_pcm_hardware);
 104
 105         runtime->dma_bytes = lpass_platform_pcm_hardware.buffer_bytes_max;
 106
 107         ret = snd_pcm_hw_constraint_integer(runtime,
 108                         SNDRV_PCM_HW_PARAM_PERIODS);
 109         if (ret < 0) {
 110                 dev_err(soc_runtime->dev, "%s() setting constraints failed: %d\n",
 111                                 __func__, ret);
 112                 return -EINVAL;
 113         }
 114
 115         snd_pcm_set_runtime_buffer(substream, &substream->dma_buffer);
 116
 117         return 0;
 118 }
 119
 120 static int lpass_platform_pcmops_close(struct snd_pcm_substream *substream)
 121 {
 122         struct snd_pcm_runtime *runtime = substream->runtime;
 123         struct snd_soc_pcm_runtime *soc_runtime = substream->private_data;
 124         struct lpass_data *drvdata =
 125                 snd_soc_platform_get_drvdata(soc_runtime->platform);
 126         struct lpass_variant *v = drvdata->variant;
 127         struct lpass_pcm_data *data;
 128         int dma_ch, dir = substream->stream;
 129
 130         data = runtime->private_data;
 131         v = drvdata->variant;
 132
 133         if (dir == SNDRV_PCM_STREAM_PLAYBACK)
 134                 dma_ch = data->rdma_ch;
 135         else
 136                 dma_ch = data->wrdma_ch;
 137
 138         drvdata->substream[dma_ch] = NULL;
 139
 140         if (v->free_dma_channel)
 141                 v->free_dma_channel(drvdata, dma_ch);
 142
 143         kfree(data);
 144         return 0;
 145 }
 146
 147 static int lpass_platform_pcmops_hw_params(struct snd_pcm_substream *substream,
 148                 struct snd_pcm_hw_params *params)
 149 {
 150         struct snd_soc_pcm_runtime *soc_runtime = substream->private_data;
 151         struct lpass_data *drvdata =
 152                 snd_soc_platform_get_drvdata(soc_runtime->platform);
 153         struct snd_pcm_runtime *rt = substream->runtime;
 154         struct lpass_pcm_data *pcm_data = rt->private_data;
 155         struct lpass_variant *v = drvdata->variant;
 156         snd_pcm_format_t format = params_format(params);
 157         unsigned int channels = params_channels(params);
 158         unsigned int regval;
 159         int ch, dir = substream->stream;
 160         int bitwidth;
 161         int ret, dma_port = pcm_data->i2s_port + v->dmactl_audif_start;
 162
 163         if (dir ==  SNDRV_PCM_STREAM_PLAYBACK)
 164                 ch = pcm_data->rdma_ch;
 165         else
 166                 ch = pcm_data->wrdma_ch;
 167
 168         bitwidth = snd_pcm_format_width(format);
 169         if (bitwidth < 0) {
 170                 dev_err(soc_runtime->dev, "%s() invalid bit width given: %d\n",
 171                                 __func__, bitwidth);
 172                 return bitwidth;
 173         }
 174
 175         regval = LPAIF_DMACTL_BURSTEN_INCR4 |
 176                         LPAIF_DMACTL_AUDINTF(dma_port) |
 177                         LPAIF_DMACTL_FIFOWM_8;
 178
 179         switch (bitwidth) {
 180         case 16:
 181                 switch (channels) {
 182                 case 1:
 183                 case 2:
 184                         regval |= LPAIF_DMACTL_WPSCNT_ONE;
 185                         break;
 186                 case 4:
 187                         regval |= LPAIF_DMACTL_WPSCNT_TWO;
 188                         break;
 189                 case 6:
 190                         regval |= LPAIF_DMACTL_WPSCNT_THREE;
 191                         break;
 192                 case 8:
 193                         regval |= LPAIF_DMACTL_WPSCNT_FOUR;
 194                         break;
 195                 default:
 196                         dev_err(soc_runtime->dev, "%s() invalid PCM config given: bw=%d, ch=%u\n",
 197                                         __func__, bitwidth, channels);
 198                         return -EINVAL;
 199                 }
 200                 break;
 201         case 24:
 202         case 32:
 203                 switch (channels) {
 204                 case 1:
 205                         regval |= LPAIF_DMACTL_WPSCNT_ONE;
 206                         break;
 207                 case 2:
 208                         regval |= LPAIF_DMACTL_WPSCNT_TWO;
 209                         break;
 210                 case 4:
 211                         regval |= LPAIF_DMACTL_WPSCNT_FOUR;
 212                         break;
 213                 case 6:
 214                         regval |= LPAIF_DMACTL_WPSCNT_SIX;
 215                         break;
 216                 case 8:
 217                         regval |= LPAIF_DMACTL_WPSCNT_EIGHT;
 218                         break;
 219                 default:
 220                         dev_err(soc_runtime->dev, "%s() invalid PCM config given: bw=%d, ch=%u\n",
 221                                         __func__, bitwidth, channels);
 222                         return -EINVAL;
 223                 }
 224                 break;
 225         default:
 226                 dev_err(soc_runtime->dev, "%s() invalid PCM config given: bw=%d, ch=%u\n",
 227                                 __func__, bitwidth, channels);
 228                 return -EINVAL;
 229         }
 230
 231         ret = regmap_write(drvdata->lpaif_map,
 232                         LPAIF_DMACTL_REG(v, ch, dir), regval);
 233         if (ret) {
 234                 dev_err(soc_runtime->dev, "%s() error writing to rdmactl reg: %d\n",
 235                                 __func__, ret);
 236                 return ret;
 237         }
 238
 239         return 0;
 240 }
 241
 242 static int lpass_platform_pcmops_hw_free(struct snd_pcm_substream *substream)
 243 {
 244         struct snd_soc_pcm_runtime *soc_runtime = substream->private_data;
 245         struct lpass_data *drvdata =
 246                 snd_soc_platform_get_drvdata(soc_runtime->platform);
 247         struct snd_pcm_runtime *rt = substream->runtime;
 248         struct lpass_pcm_data *pcm_data = rt->private_data;
 249         struct lpass_variant *v = drvdata->variant;
 250         unsigned int reg;
 251         int ret;
 252
 253         if (substream->stream ==  SNDRV_PCM_STREAM_PLAYBACK)
 254                 reg = LPAIF_RDMACTL_REG(v, pcm_data->rdma_ch);
 255         else
 256                 reg = LPAIF_WRDMACTL_REG(v, pcm_data->wrdma_ch);
 257
 258         ret = regmap_write(drvdata->lpaif_map, reg, 0);
 259         if (ret)
 260                 dev_err(soc_runtime->dev, "%s() error writing to rdmactl reg: %d\n",
 261                                 __func__, ret);
 262
 263         return ret;
 264 }
 265
 266 static int lpass_platform_pcmops_prepare(struct snd_pcm_substream *substream)
 267 {
 268         struct snd_pcm_runtime *runtime = substream->runtime;
 269         struct snd_soc_pcm_runtime *soc_runtime = substream->private_data;
 270         struct lpass_data *drvdata =
 271                 snd_soc_platform_get_drvdata(soc_runtime->platform);
 272         struct snd_pcm_runtime *rt = substream->runtime;
 273         struct lpass_pcm_data *pcm_data = rt->private_data;
 274         struct lpass_variant *v = drvdata->variant;
 275         int ret, ch, dir = substream->stream;
 276
 277         if (dir ==  SNDRV_PCM_STREAM_PLAYBACK)
 278                 ch = pcm_data->rdma_ch;
 279         else
 280                 ch = pcm_data->wrdma_ch;
 281
 282         ret = regmap_write(drvdata->lpaif_map,
 283                         LPAIF_DMABASE_REG(v, ch, dir),
 284                         runtime->dma_addr);
 285         if (ret) {
 286                 dev_err(soc_runtime->dev, "%s() error writing to rdmabase reg: %d\n",
 287                                 __func__, ret);
 288                 return ret;
 289         }
 290
 291         ret = regmap_write(drvdata->lpaif_map,
 292                         LPAIF_DMABUFF_REG(v, ch, dir),
 293                         (snd_pcm_lib_buffer_bytes(substream) >> 2) - 1);
 294         if (ret) {
 295                 dev_err(soc_runtime->dev, "%s() error writing to rdmabuff reg: %d\n",
 296                                 __func__, ret);
 297                 return ret;
 298         }
 299
 300         ret = regmap_write(drvdata->lpaif_map,
 301                         LPAIF_DMAPER_REG(v, ch, dir),
 302                         (snd_pcm_lib_period_bytes(substream) >> 2) - 1);
 303         if (ret) {
 304                 dev_err(soc_runtime->dev, "%s() error writing to rdmaper reg: %d\n",
 305                                 __func__, ret);
 306                 return ret;
 307         }
 308
 309         ret = regmap_update_bits(drvdata->lpaif_map,
 310                         LPAIF_DMACTL_REG(v, ch, dir),
 311                         LPAIF_DMACTL_ENABLE_MASK, LPAIF_DMACTL_ENABLE_ON);
 312         if (ret) {
 313                 dev_err(soc_runtime->dev, "%s() error writing to rdmactl reg: %d\n",
 314                                 __func__, ret);
 315                 return ret;
 316         }
 317
 318         return 0;
 319 }
 320
 321 static int lpass_platform_pcmops_trigger(struct snd_pcm_substream *substream,
 322                 int cmd)
 323 {
 324         struct snd_soc_pcm_runtime *soc_runtime = substream->private_data;
 325         struct lpass_data *drvdata =
 326                 snd_soc_platform_get_drvdata(soc_runtime->platform);
 327         struct snd_pcm_runtime *rt = substream->runtime;
 328         struct lpass_pcm_data *pcm_data = rt->private_data;
 329         struct lpass_variant *v = drvdata->variant;
 330         int ret, ch, dir = substream->stream;
 331
 332         if (dir == SNDRV_PCM_STREAM_PLAYBACK)
 333                 ch = pcm_data->rdma_ch;
 334         else
 335                 ch = pcm_data->wrdma_ch;
 336
 337         switch (cmd) {
 338         case SNDRV_PCM_TRIGGER_START:
 339         case SNDRV_PCM_TRIGGER_RESUME:
 340         case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
 341                 /* clear status before enabling interrupts */
 342                 ret = regmap_write(drvdata->lpaif_map,
 343                                 LPAIF_IRQCLEAR_REG(v, LPAIF_IRQ_PORT_HOST),
 344                                 LPAIF_IRQ_ALL(ch));
 345                 if (ret) {
 346                         dev_err(soc_runtime->dev, "%s() error writing to irqclear reg: %d\n",
 347                                         __func__, ret);
 348                         return ret;
 349                 }
 350
 351                 ret = regmap_update_bits(drvdata->lpaif_map,
 352                                 LPAIF_IRQEN_REG(v, LPAIF_IRQ_PORT_HOST),
 353                                 LPAIF_IRQ_ALL(ch),
 354                                 LPAIF_IRQ_ALL(ch));
 355                 if (ret) {
 356                         dev_err(soc_runtime->dev, "%s() error writing to irqen reg: %d\n",
 357                                         __func__, ret);
 358                         return ret;
 359                 }
 360
 361                 ret = regmap_update_bits(drvdata->lpaif_map,
 362                                 LPAIF_DMACTL_REG(v, ch, dir),
 363                                 LPAIF_DMACTL_ENABLE_MASK,
 364                                 LPAIF_DMACTL_ENABLE_ON);
 365                 if (ret) {
 366                         dev_err(soc_runtime->dev, "%s() error writing to rdmactl reg: %d\n",
 367                                         __func__, ret);
 368                         return ret;
 369                 }
 370                 break;
 371         case SNDRV_PCM_TRIGGER_STOP:
 372         case SNDRV_PCM_TRIGGER_SUSPEND:
 373         case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
 374                 ret = regmap_update_bits(drvdata->lpaif_map,
 375                                 LPAIF_DMACTL_REG(v, ch, dir),
 376                                 LPAIF_DMACTL_ENABLE_MASK,
 377                                 LPAIF_DMACTL_ENABLE_OFF);
 378                 if (ret) {
 379                         dev_err(soc_runtime->dev, "%s() error writing to rdmactl reg: %d\n",
 380                                         __func__, ret);
 381                         return ret;
 382                 }
 383
 384                 ret = regmap_update_bits(drvdata->lpaif_map,
 385                                 LPAIF_IRQEN_REG(v, LPAIF_IRQ_PORT_HOST),
 386                                 LPAIF_IRQ_ALL(ch), 0);
 387                 if (ret) {
 388                         dev_err(soc_runtime->dev, "%s() error writing to irqen reg: %d\n",
 389                                         __func__, ret);
 390                         return ret;
 391                 }
 392                 break;
 393         }
 394
 395         return 0;
 396 }
 397
 398 static snd_pcm_uframes_t lpass_platform_pcmops_pointer(
 399                 struct snd_pcm_substream *substream)
 400 {
 401         struct snd_soc_pcm_runtime *soc_runtime = substream->private_data;
 402         struct lpass_data *drvdata =
 403                         snd_soc_platform_get_drvdata(soc_runtime->platform);
 404         struct snd_pcm_runtime *rt = substream->runtime;
 405         struct lpass_pcm_data *pcm_data = rt->private_data;
 406         struct lpass_variant *v = drvdata->variant;
 407         unsigned int base_addr, curr_addr;
 408         int ret, ch, dir = substream->stream;
 409
 410         if (dir == SNDRV_PCM_STREAM_PLAYBACK)
 411                 ch = pcm_data->rdma_ch;
 412         else
 413                 ch = pcm_data->wrdma_ch;
 414
 415         ret = regmap_read(drvdata->lpaif_map,
 416                         LPAIF_DMABASE_REG(v, ch, dir), &base_addr);
 417         if (ret) {
 418                 dev_err(soc_runtime->dev, "%s() error reading from rdmabase reg: %d\n",
 419                                 __func__, ret);
 420                 return ret;
 421         }
 422
 423         ret = regmap_read(drvdata->lpaif_map,
 424                         LPAIF_DMACURR_REG(v, ch, dir), &curr_addr);
 425         if (ret) {
 426                 dev_err(soc_runtime->dev, "%s() error reading from rdmacurr reg: %d\n",
 427                                 __func__, ret);
 428                 return ret;
 429         }
 430
 431         return bytes_to_frames(substream->runtime, curr_addr - base_addr);
 432 }
 433
 434 static int lpass_platform_pcmops_mmap(struct snd_pcm_substream *substream,
 435                 struct vm_area_struct *vma)
 436 {
 437         struct snd_pcm_runtime *runtime = substream->runtime;
 438
 439         return dma_mmap_coherent(substream->pcm->card->dev, vma,
 440                         runtime->dma_area, runtime->dma_addr,
 441                         runtime->dma_bytes);
 442 }
 443
 444 static const struct snd_pcm_ops lpass_platform_pcm_ops = {
 445         .open           = lpass_platform_pcmops_open,
 446         .close          = lpass_platform_pcmops_close,
 447         .ioctl          = snd_pcm_lib_ioctl,
 448         .hw_params      = lpass_platform_pcmops_hw_params,
 449         .hw_free        = lpass_platform_pcmops_hw_free,
 450         .prepare        = lpass_platform_pcmops_prepare,
 451         .trigger        = lpass_platform_pcmops_trigger,
 452         .pointer        = lpass_platform_pcmops_pointer,
 453         .mmap           = lpass_platform_pcmops_mmap,
 454 };
 455
 456 static irqreturn_t lpass_dma_interrupt_handler(
 457                         struct snd_pcm_substream *substream,
 458                         struct lpass_data *drvdata,
 459                         int chan, u32 interrupts)
 460 {
 461         struct snd_soc_pcm_runtime *soc_runtime = substream->private_data;
 462         struct lpass_variant *v = drvdata->variant;
 463         irqreturn_t ret = IRQ_NONE;
 464         int rv;
 465
 466         if (interrupts & LPAIF_IRQ_PER(chan)) {
 467                 rv = regmap_write(drvdata->lpaif_map,
 468                                 LPAIF_IRQCLEAR_REG(v, LPAIF_IRQ_PORT_HOST),
 469                                 LPAIF_IRQ_PER(chan));
 470                 if (rv) {
 471                         dev_err(soc_runtime->dev, "%s() error writing to irqclear reg: %d\n",
 472                                         __func__, rv);
 473                         return IRQ_NONE;
 474                 }
 475                 snd_pcm_period_elapsed(substream);
 476                 ret = IRQ_HANDLED;
 477         }
 478
 479         if (interrupts & LPAIF_IRQ_XRUN(chan)) {
 480                 rv = regmap_write(drvdata->lpaif_map,
 481                                 LPAIF_IRQCLEAR_REG(v, LPAIF_IRQ_PORT_HOST),
 482                                 LPAIF_IRQ_XRUN(chan));
 483                 if (rv) {
 484                         dev_err(soc_runtime->dev, "%s() error writing to irqclear reg: %d\n",
 485                                         __func__, rv);
 486                         return IRQ_NONE;
 487                 }
 488                 dev_warn(soc_runtime->dev, "%s() xrun warning\n", __func__);
 489                 snd_pcm_stop(substream, SNDRV_PCM_STATE_XRUN);
 490                 ret = IRQ_HANDLED;
 491         }
 492
 493         if (interrupts & LPAIF_IRQ_ERR(chan)) {
 494                 rv = regmap_write(drvdata->lpaif_map,
 495                                 LPAIF_IRQCLEAR_REG(v, LPAIF_IRQ_PORT_HOST),
 496                                 LPAIF_IRQ_ERR(chan));
 497                 if (rv) {
 498                         dev_err(soc_runtime->dev, "%s() error writing to irqclear reg: %d\n",
 499                                         __func__, rv);
 500                         return IRQ_NONE;
 501                 }
 502                 dev_err(soc_runtime->dev, "%s() bus access error\n", __func__);
 503                 snd_pcm_stop(substream, SNDRV_PCM_STATE_DISCONNECTED);
 504                 ret = IRQ_HANDLED;
 505         }
 506
 507         return ret;
 508 }
 509
 510 static irqreturn_t lpass_platform_lpaif_irq(int irq, void *data)
 511 {
 512         struct lpass_data *drvdata = data;
 513         struct lpass_variant *v = drvdata->variant;
 514         unsigned int irqs;
 515         int rv, chan;
 516
 517         rv = regmap_read(drvdata->lpaif_map,
 518                         LPAIF_IRQSTAT_REG(v, LPAIF_IRQ_PORT_HOST), &irqs);
 519         if (rv) {
 520                 pr_err("%s() error reading from irqstat reg: %d\n",
 521                                 __func__, rv);
 522                 return IRQ_NONE;
 523         }
 524
 525         /* Handle per channel interrupts */
 526         for (chan = 0; chan < LPASS_MAX_DMA_CHANNELS; chan++) {
 527                 if (irqs & LPAIF_IRQ_ALL(chan) && drvdata->substream[chan]) {
 528                         rv = lpass_dma_interrupt_handler(
 529                                                 drvdata->substream[chan],
 530                                                 drvdata, chan, irqs);
 531                         if (rv != IRQ_HANDLED)
 532                                 return rv;
 533                 }
 534         }
 535
 536         return IRQ_HANDLED;
 537 }
 538
 539 static int lpass_platform_pcm_new(struct snd_soc_pcm_runtime *soc_runtime)
 540 {
 541         struct snd_pcm *pcm = soc_runtime->pcm;
 542         struct snd_pcm_substream *psubstream, *csubstream;
 543         int ret = -EINVAL;
 544         size_t size = lpass_platform_pcm_hardware.buffer_bytes_max;
 545
 546         psubstream = pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream;
 547         if (psubstream) {
 548                 ret = snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV,
 549                                         soc_runtime->platform->dev,
 550                                         size, &psubstream->dma_buffer);
 551                 if (ret) {
 552                         dev_err(soc_runtime->dev, "Cannot allocate buffer(s)\n");
 553                         return ret;
 554                 }
 555         }
 556
 557         csubstream = pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream;
 558         if (csubstream) {
 559                 ret = snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV,
 560                                         soc_runtime->platform->dev,
 561                                         size, &csubstream->dma_buffer);
 562                 if (ret) {
 563                         dev_err(soc_runtime->dev, "Cannot allocate buffer(s)\n");
 564                         if (psubstream)
 565                                 snd_dma_free_pages(&psubstream->dma_buffer);
 566                         return ret;
 567                 }
 568
 569         }
 570
 571         return 0;
 572 }
 573
 574 static void lpass_platform_pcm_free(struct snd_pcm *pcm)
 575 {
 576         struct snd_pcm_substream *substream;
 577         int i;
 578
 579         for (i = 0; i < ARRAY_SIZE(pcm->streams); i++) {
 580                 substream = pcm->streams[i].substream;
 581                 if (substream) {
 582                         snd_dma_free_pages(&substream->dma_buffer);
 583                         substream->dma_buffer.area = NULL;
 584                         substream->dma_buffer.addr = 0;
 585                 }
 586         }
 587 }
 588
 589 static struct snd_soc_platform_driver lpass_platform_driver = {
 590         .pcm_new        = lpass_platform_pcm_new,
 591         .pcm_free       = lpass_platform_pcm_free,
 592         .ops            = &lpass_platform_pcm_ops,
 593 };
 594
 595 int asoc_qcom_lpass_platform_register(struct platform_device *pdev)
 596 {
 597         struct lpass_data *drvdata = platform_get_drvdata(pdev);
 598         struct lpass_variant *v = drvdata->variant;
 599         int ret;
 600
 601         drvdata->lpaif_irq = platform_get_irq_byname(pdev, "lpass-irq-lpaif");
 602         if (drvdata->lpaif_irq < 0) {
 603                 dev_err(&pdev->dev, "%s() error getting irq handle: %d\n",
 604                                 __func__, drvdata->lpaif_irq);
 605                 return -ENODEV;
 606         }
 607
 608         /* ensure audio hardware is disabled */
 609         ret = regmap_write(drvdata->lpaif_map,
 610                         LPAIF_IRQEN_REG(v, LPAIF_IRQ_PORT_HOST), 0);
 611         if (ret) {
 612                 dev_err(&pdev->dev, "%s() error writing to irqen reg: %d\n",
 613                                 __func__, ret);
 614                 return ret;
 615         }
 616
 617         ret = devm_request_irq(&pdev->dev, drvdata->lpaif_irq,
 618                         lpass_platform_lpaif_irq, IRQF_TRIGGER_RISING,
 619                         "lpass-irq-lpaif", drvdata);
 620         if (ret) {
 621                 dev_err(&pdev->dev, "%s() irq request failed: %d\n",
 622                                 __func__, ret);
 623                 return ret;
 624         }
 625
 626
 627         return devm_snd_soc_register_platform(&pdev->dev,
 628                         &lpass_platform_driver);
 629 }
 630 EXPORT_SYMBOL_GPL(asoc_qcom_lpass_platform_register);
 631
 632 MODULE_DESCRIPTION("QTi LPASS Platform Driver");
 633 MODULE_LICENSE("GPL v2");