1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 // Copyright (c) 2018 BayLibre, SAS.
4 // Author: Jerome Brunet <jbrunet@baylibre.com>
6 #include <linux/module.h>
7 #include <linux/of_platform.h>
8 #include <linux/regmap.h>
10 #include <sound/soc-dai.h>
12 #include "axg-tdm-formatter.h"
14 #define TDMIN_CTRL 0x00
15 #define TDMIN_CTRL_ENABLE BIT(31)
16 #define TDMIN_CTRL_I2S_MODE BIT(30)
17 #define TDMIN_CTRL_RST_OUT BIT(29)
18 #define TDMIN_CTRL_RST_IN BIT(28)
19 #define TDMIN_CTRL_WS_INV BIT(25)
20 #define TDMIN_CTRL_SEL_SHIFT 20
21 #define TDMIN_CTRL_IN_BIT_SKEW_MASK GENMASK(18, 16)
22 #define TDMIN_CTRL_IN_BIT_SKEW(x) ((x) << 16)
23 #define TDMIN_CTRL_LSB_FIRST BIT(5)
24 #define TDMIN_CTRL_BITNUM_MASK GENMASK(4, 0)
25 #define TDMIN_CTRL_BITNUM(x) ((x) << 0)
26 #define TDMIN_SWAP 0x04
27 #define TDMIN_MASK0 0x08
28 #define TDMIN_MASK1 0x0c
29 #define TDMIN_MASK2 0x10
30 #define TDMIN_MASK3 0x14
31 #define TDMIN_STAT 0x18
32 #define TDMIN_MUTE_VAL 0x1c
33 #define TDMIN_MUTE0 0x20
34 #define TDMIN_MUTE1 0x24
35 #define TDMIN_MUTE2 0x28
36 #define TDMIN_MUTE3 0x2c
38 static const struct regmap_config axg_tdmin_regmap_cfg = {
42 .max_register = TDMIN_MUTE3,
45 static const char * const axg_tdmin_sel_texts[] = {
46 "IN 0", "IN 1", "IN 2", "IN 3", "IN 4", "IN 5",
49 /* Change to special mux control to reset dapm */
50 static SOC_ENUM_SINGLE_DECL(axg_tdmin_sel_enum, TDMIN_CTRL,
51 TDMIN_CTRL_SEL_SHIFT, axg_tdmin_sel_texts);
53 static const struct snd_kcontrol_new axg_tdmin_in_mux =
54 SOC_DAPM_ENUM("Input Source", axg_tdmin_sel_enum);
56 static struct snd_soc_dai *
57 axg_tdmin_get_be(struct snd_soc_dapm_widget *w)
59 struct snd_soc_dapm_path *p = NULL;
60 struct snd_soc_dai *be;
62 snd_soc_dapm_widget_for_each_source_path(w, p) {
66 if (p->source->id == snd_soc_dapm_dai_out)
67 return (struct snd_soc_dai *)p->source->priv;
69 be = axg_tdmin_get_be(p->source);
77 static struct axg_tdm_stream *
78 axg_tdmin_get_tdm_stream(struct snd_soc_dapm_widget *w)
80 struct snd_soc_dai *be = axg_tdmin_get_be(w);
85 return be->capture_dma_data;
88 static void axg_tdmin_enable(struct regmap *map)
90 /* Apply both reset */
91 regmap_update_bits(map, TDMIN_CTRL,
92 TDMIN_CTRL_RST_OUT | TDMIN_CTRL_RST_IN, 0);
94 /* Clear out reset before in reset */
95 regmap_update_bits(map, TDMIN_CTRL,
96 TDMIN_CTRL_RST_OUT, TDMIN_CTRL_RST_OUT);
97 regmap_update_bits(map, TDMIN_CTRL,
98 TDMIN_CTRL_RST_IN, TDMIN_CTRL_RST_IN);
100 /* Actually enable tdmin */
101 regmap_update_bits(map, TDMIN_CTRL,
102 TDMIN_CTRL_ENABLE, TDMIN_CTRL_ENABLE);
105 static void axg_tdmin_disable(struct regmap *map)
107 regmap_update_bits(map, TDMIN_CTRL, TDMIN_CTRL_ENABLE, 0);
110 static int axg_tdmin_prepare(struct regmap *map, struct axg_tdm_stream *ts)
112 unsigned int val = 0;
114 /* Set stream skew */
115 switch (ts->iface->fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
116 case SND_SOC_DAIFMT_I2S:
117 case SND_SOC_DAIFMT_DSP_A:
118 val |= TDMIN_CTRL_IN_BIT_SKEW(3);
121 case SND_SOC_DAIFMT_LEFT_J:
122 case SND_SOC_DAIFMT_DSP_B:
123 val = TDMIN_CTRL_IN_BIT_SKEW(2);
127 pr_err("Unsupported format: %u\n",
128 ts->iface->fmt & SND_SOC_DAIFMT_FORMAT_MASK);
132 /* Set stream format mode */
133 switch (ts->iface->fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
134 case SND_SOC_DAIFMT_I2S:
135 case SND_SOC_DAIFMT_LEFT_J:
136 case SND_SOC_DAIFMT_RIGHT_J:
137 val |= TDMIN_CTRL_I2S_MODE;
141 /* If the sample clock is inverted, invert it back for the formatter */
142 if (axg_tdm_lrclk_invert(ts->iface->fmt))
143 val |= TDMIN_CTRL_WS_INV;
145 /* Set the slot width */
146 val |= TDMIN_CTRL_BITNUM(ts->iface->slot_width - 1);
149 * The following also reset LSB_FIRST which result in the formatter
150 * placing the first bit received at bit 31
152 regmap_update_bits(map, TDMIN_CTRL,
153 (TDMIN_CTRL_IN_BIT_SKEW_MASK | TDMIN_CTRL_WS_INV |
154 TDMIN_CTRL_I2S_MODE | TDMIN_CTRL_LSB_FIRST |
155 TDMIN_CTRL_BITNUM_MASK), val);
157 /* Set static swap mask configuration */
158 regmap_write(map, TDMIN_SWAP, 0x76543210);
160 return axg_tdm_formatter_set_channel_masks(map, ts, TDMIN_MASK0);
163 static const struct snd_soc_dapm_widget axg_tdmin_dapm_widgets[] = {
164 SND_SOC_DAPM_AIF_IN("IN 0", NULL, 0, SND_SOC_NOPM, 0, 0),
165 SND_SOC_DAPM_AIF_IN("IN 1", NULL, 0, SND_SOC_NOPM, 0, 0),
166 SND_SOC_DAPM_AIF_IN("IN 2", NULL, 0, SND_SOC_NOPM, 0, 0),
167 SND_SOC_DAPM_AIF_IN("IN 3", NULL, 0, SND_SOC_NOPM, 0, 0),
168 SND_SOC_DAPM_AIF_IN("IN 4", NULL, 0, SND_SOC_NOPM, 0, 0),
169 SND_SOC_DAPM_AIF_IN("IN 5", NULL, 0, SND_SOC_NOPM, 0, 0),
170 SND_SOC_DAPM_MUX("SRC SEL", SND_SOC_NOPM, 0, 0, &axg_tdmin_in_mux),
171 SND_SOC_DAPM_PGA_E("DEC", SND_SOC_NOPM, 0, 0, NULL, 0,
172 axg_tdm_formatter_event,
173 (SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_PRE_PMD)),
174 SND_SOC_DAPM_AIF_OUT("OUT", NULL, 0, SND_SOC_NOPM, 0, 0),
177 static const struct snd_soc_dapm_route axg_tdmin_dapm_routes[] = {
178 { "SRC SEL", "IN 0", "IN 0" },
179 { "SRC SEL", "IN 1", "IN 1" },
180 { "SRC SEL", "IN 2", "IN 2" },
181 { "SRC SEL", "IN 3", "IN 3" },
182 { "SRC SEL", "IN 4", "IN 4" },
183 { "SRC SEL", "IN 5", "IN 5" },
184 { "DEC", NULL, "SRC SEL" },
185 { "OUT", NULL, "DEC" },
188 static const struct snd_soc_component_driver axg_tdmin_component_drv = {
189 .dapm_widgets = axg_tdmin_dapm_widgets,
190 .num_dapm_widgets = ARRAY_SIZE(axg_tdmin_dapm_widgets),
191 .dapm_routes = axg_tdmin_dapm_routes,
192 .num_dapm_routes = ARRAY_SIZE(axg_tdmin_dapm_routes),
195 static const struct axg_tdm_formatter_ops axg_tdmin_ops = {
196 .get_stream = axg_tdmin_get_tdm_stream,
197 .prepare = axg_tdmin_prepare,
198 .enable = axg_tdmin_enable,
199 .disable = axg_tdmin_disable,
202 static const struct axg_tdm_formatter_driver axg_tdmin_drv = {
203 .component_drv = &axg_tdmin_component_drv,
204 .regmap_cfg = &axg_tdmin_regmap_cfg,
205 .ops = &axg_tdmin_ops,
206 .invert_sclk = false,
209 static const struct of_device_id axg_tdmin_of_match[] = {
211 .compatible = "amlogic,axg-tdmin",
212 .data = &axg_tdmin_drv,
215 MODULE_DEVICE_TABLE(of, axg_tdmin_of_match);
217 static struct platform_driver axg_tdmin_pdrv = {
218 .probe = axg_tdm_formatter_probe,
221 .of_match_table = axg_tdmin_of_match,
224 module_platform_driver(axg_tdmin_pdrv);
226 MODULE_DESCRIPTION("Amlogic AXG TDM input formatter driver");
227 MODULE_AUTHOR("Jerome Brunet <jbrunet@baylibre.com>");
228 MODULE_LICENSE("GPL v2");