1 /* SPDX-License-Identifier: GPL-2.0 */
3 * mt8192-afe-common.h -- Mediatek 8192 audio driver definitions
5 * Copyright (c) 2020 MediaTek Inc.
6 * Author: Shane Chien <shane.chien@mediatek.com>
9 #ifndef _MT_8192_AFE_COMMON_H_
10 #define _MT_8192_AFE_COMMON_H_
12 #include <linux/list.h>
13 #include <linux/regmap.h>
14 #include <sound/soc.h>
16 #include "../common/mtk-base-afe.h"
17 #include "mt8192-reg.h"
43 MT8192_DAI_ADDA = MT8192_MEMIF_NUM,
46 MT8192_DAI_AP_DMIC_CH34,
48 MT8192_DAI_CONNSYS_I2S,
96 MT8192_IRQ_31, /* used only for TDM */
101 MTKAIF_PROTOCOL_1 = 0,
103 MTKAIF_PROTOCOL_2_CLK_P2,
107 MTK_AFE_ADDA_DL_GAIN_MUTE = 0,
108 MTK_AFE_ADDA_DL_GAIN_NORMAL = 0xf74f,
109 /* SA suggest apply -0.3db to audio/speech path */
130 struct mt8192_afe_private {
132 struct regmap *topckgen;
133 struct regmap *apmixedsys;
134 struct regmap *infracfg;
135 int stf_positive_gain_db;
136 int pm_runtime_bypass_reg_ctl;
139 bool dai_on[MT8192_DAI_NUM];
140 void *dai_priv[MT8192_DAI_NUM];
144 int mtkaif_chosen_phase[4];
145 int mtkaif_phase_cycle[4];
146 int mtkaif_calibration_num_phase;
148 int mtkaif_dmic_ch34;
149 int mtkaif_adda6_only;
152 int mck_rate[MT8192_MCK_NUM];
155 int mt8192_dai_adda_register(struct mtk_base_afe *afe);
156 int mt8192_dai_i2s_register(struct mtk_base_afe *afe);
157 int mt8192_dai_hw_gain_register(struct mtk_base_afe *afe);
158 int mt8192_dai_src_register(struct mtk_base_afe *afe);
159 int mt8192_dai_pcm_register(struct mtk_base_afe *afe);
160 int mt8192_dai_tdm_register(struct mtk_base_afe *afe);
162 unsigned int mt8192_general_rate_transform(struct device *dev,
164 unsigned int mt8192_rate_transform(struct device *dev,
165 unsigned int rate, int aud_blk);
167 int mt8192_dai_set_priv(struct mtk_base_afe *afe, int id,
168 int priv_size, const void *priv_data);