1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * skl_topology.h - Intel HDA Platform topology header file
5 * Copyright (C) 2014-15 Intel Corp
6 * Author: Jeeja KP <jeeja.kp@intel.com>
7 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
9 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
12 #ifndef __SKL_TOPOLOGY_H__
13 #define __SKL_TOPOLOGY_H__
15 #include <linux/types.h>
17 #include <sound/hdaudio_ext.h>
18 #include <sound/soc.h>
19 #include <uapi/sound/skl-tplg-interface.h>
22 #define BITS_PER_BYTE 8
23 #define MAX_TS_GROUPS 8
24 #define MAX_DMIC_TS_GROUPS 4
25 #define MAX_FIXED_DMIC_PARAMS_SIZE 727
27 /* Maximum number of coefficients up down mixer module */
28 #define UP_DOWN_MIXER_MAX_COEFF 8
30 #define MODULE_MAX_IN_PINS 8
31 #define MODULE_MAX_OUT_PINS 8
33 #define SKL_MIC_CH_SUPPORT 4
34 #define SKL_MIC_MAX_CH_SUPPORT 8
35 #define SKL_DEFAULT_MIC_SEL_GAIN 0x3FF
36 #define SKL_MIC_SEL_SWITCH 0x3
38 #define SKL_OUTPUT_PIN 0
39 #define SKL_INPUT_PIN 1
40 #define SKL_MAX_PATH_CONFIGS 8
41 #define SKL_MAX_MODULES_IN_PIPE 8
42 #define SKL_MAX_MODULE_FORMATS 32
43 #define SKL_MAX_MODULE_RESOURCES 32
45 enum skl_channel_index {
47 SKL_CHANNEL_RIGHT = 1,
48 SKL_CHANNEL_CENTER = 2,
49 SKL_CHANNEL_LEFT_SURROUND = 3,
50 SKL_CHANNEL_CENTER_SURROUND = 3,
51 SKL_CHANNEL_RIGHT_SURROUND = 4,
53 SKL_CHANNEL_INVALID = 0xF,
78 SKL_FS_128000 = 128000,
79 SKL_FS_176400 = 176400,
80 SKL_FS_192000 = 192000,
84 enum skl_widget_type {
85 SKL_WIDGET_VMIXER = 1,
91 struct skl_audio_data_format {
92 enum skl_s_freq s_freq;
93 enum skl_bitdepth bit_depth;
95 enum skl_ch_cfg ch_cfg;
96 enum skl_interleaving interleaving;
97 u8 number_of_channels;
103 struct skl_base_cfg {
108 struct skl_audio_data_format audio_fmt;
111 struct skl_cpr_gtw_cfg {
115 /* not mandatory; required only for DMIC/I2S */
119 struct skl_dma_control {
126 struct skl_base_cfg base_cfg;
127 struct skl_audio_data_format out_fmt;
128 u32 cpr_feature_mask;
129 struct skl_cpr_gtw_cfg gtw_cfg;
132 struct skl_cpr_pin_fmt {
134 struct skl_audio_data_format src_fmt;
135 struct skl_audio_data_format dst_fmt;
138 struct skl_src_module_cfg {
139 struct skl_base_cfg base_cfg;
140 enum skl_s_freq src_cfg;
143 struct skl_up_down_mixer_cfg {
144 struct skl_base_cfg base_cfg;
145 enum skl_ch_cfg out_ch_cfg;
146 /* This should be set to 1 if user coefficients are required */
148 /* Pass the user coeff in this array */
149 s32 coeff[UP_DOWN_MIXER_MAX_COEFF];
153 struct skl_algo_cfg {
154 struct skl_base_cfg base_cfg;
158 struct skl_base_outfmt_cfg {
159 struct skl_base_cfg base_cfg;
160 struct skl_audio_data_format out_fmt;
164 SKL_DMA_HDA_HOST_OUTPUT_CLASS = 0,
165 SKL_DMA_HDA_HOST_INPUT_CLASS = 1,
166 SKL_DMA_HDA_HOST_INOUT_CLASS = 2,
167 SKL_DMA_HDA_LINK_OUTPUT_CLASS = 8,
168 SKL_DMA_HDA_LINK_INPUT_CLASS = 9,
169 SKL_DMA_HDA_LINK_INOUT_CLASS = 0xA,
170 SKL_DMA_DMIC_LINK_INPUT_CLASS = 0xB,
171 SKL_DMA_I2S_LINK_OUTPUT_CLASS = 0xC,
172 SKL_DMA_I2S_LINK_INPUT_CLASS = 0xD,
175 union skl_ssp_dma_node {
178 u8 time_slot_index:4;
183 union skl_connector_node_id {
192 struct skl_module_fmt {
198 u32 interleaving_style;
203 struct skl_module_cfg;
205 struct skl_mod_inst_map {
210 struct skl_uuid_inst_map {
216 struct skl_kpb_params {
219 struct skl_mod_inst_map map[0];
220 struct skl_uuid_inst_map map_uuid[0];
224 struct skl_module_inst_id {
231 enum skl_module_pin_state {
233 SKL_PIN_BIND_DONE = 1,
236 struct skl_module_pin {
237 struct skl_module_inst_id id;
240 enum skl_module_pin_state pin_state;
241 struct skl_module_cfg *tgt_mcfg;
244 struct skl_specific_cfg {
251 enum skl_pipe_state {
252 SKL_PIPE_INVALID = 0,
253 SKL_PIPE_CREATED = 1,
255 SKL_PIPE_STARTED = 3,
259 struct skl_pipe_module {
260 struct snd_soc_dapm_widget *w;
261 struct list_head node;
264 struct skl_pipe_params {
271 snd_pcm_format_t format;
274 unsigned int host_bps;
275 unsigned int link_bps;
278 struct skl_pipe_fmt {
284 struct skl_pipe_mcfg {
289 struct skl_path_config {
291 struct skl_pipe_fmt in_fmt;
292 struct skl_pipe_fmt out_fmt;
301 struct skl_pipe_params *p_params;
302 enum skl_pipe_state state;
306 struct skl_path_config configs[SKL_MAX_PATH_CONFIGS];
307 struct list_head w_list;
312 enum skl_module_state {
313 SKL_MODULE_UNINIT = 0,
314 SKL_MODULE_LOADED = 1,
315 SKL_MODULE_INIT_DONE = 2,
316 SKL_MODULE_BIND_DONE = 3,
317 SKL_MODULE_UNLOADED = 4,
320 enum d0i3_capability {
322 SKL_D0I3_STREAMING = 1,
323 SKL_D0I3_NON_STREAMING = 2,
326 struct skl_module_pin_fmt {
328 struct skl_module_fmt fmt;
331 struct skl_module_iface {
335 struct skl_module_pin_fmt inputs[MAX_IN_QUEUE];
336 struct skl_module_pin_fmt outputs[MAX_OUT_QUEUE];
339 struct skl_module_pin_resources {
344 struct skl_module_res {
353 struct skl_module_pin_resources input[MAX_IN_QUEUE];
354 struct skl_module_pin_resources output[MAX_OUT_QUEUE];
366 struct skl_module_res resources[SKL_MAX_MODULE_RESOURCES];
367 struct skl_module_iface formats[SKL_MAX_MODULE_FORMATS];
370 struct skl_module_cfg {
372 struct skl_module_inst_id id;
373 struct skl_module *module;
377 bool homogenous_inputs;
378 bool homogenous_outputs;
379 struct skl_module_fmt in_fmt[MODULE_MAX_IN_PINS];
380 struct skl_module_fmt out_fmt[MODULE_MAX_OUT_PINS];
392 u8 dmic_ch_combo_index;
398 enum d0i3_capability d0i3_caps;
399 u32 dma_buffer_size; /* in milli seconds */
400 struct skl_module_pin *m_in_pin;
401 struct skl_module_pin *m_out_pin;
402 enum skl_module_type m_type;
403 enum skl_hw_conn_type hw_conn_type;
404 enum skl_module_state m_state;
405 struct skl_pipe *pipe;
406 struct skl_specific_cfg formats_config;
407 struct skl_pipe_mcfg mod_cfg[SKL_MAX_MODULES_IN_PIPE];
410 struct skl_algo_data {
418 struct skl_pipeline {
419 struct skl_pipe *pipe;
420 struct list_head node;
423 struct skl_module_deferred_bind {
424 struct skl_module_cfg *src;
425 struct skl_module_cfg *dst;
426 struct list_head node;
429 struct skl_mic_sel_config {
432 u16 blob[SKL_MIC_MAX_CH_SUPPORT][SKL_MIC_MAX_CH_SUPPORT];
442 static inline struct skl_dev *get_skl_ctx(struct device *dev)
444 struct hdac_bus *bus = dev_get_drvdata(dev);
446 return bus_to_skl(bus);
449 int skl_tplg_be_update_params(struct snd_soc_dai *dai,
450 struct skl_pipe_params *params);
451 int skl_dsp_set_dma_control(struct skl_dev *skl, u32 *caps,
452 u32 caps_size, u32 node_id);
453 void skl_tplg_set_be_dmic_config(struct snd_soc_dai *dai,
454 struct skl_pipe_params *params, int stream);
455 int skl_tplg_init(struct snd_soc_component *component,
456 struct hdac_bus *bus);
457 void skl_tplg_exit(struct snd_soc_component *component,
458 struct hdac_bus *bus);
459 struct skl_module_cfg *skl_tplg_fe_get_cpr_module(
460 struct snd_soc_dai *dai, int stream);
461 int skl_tplg_update_pipe_params(struct device *dev,
462 struct skl_module_cfg *mconfig, struct skl_pipe_params *params);
464 void skl_tplg_d0i3_get(struct skl_dev *skl, enum d0i3_capability caps);
465 void skl_tplg_d0i3_put(struct skl_dev *skl, enum d0i3_capability caps);
467 int skl_create_pipeline(struct skl_dev *skl, struct skl_pipe *pipe);
469 int skl_run_pipe(struct skl_dev *skl, struct skl_pipe *pipe);
471 int skl_pause_pipe(struct skl_dev *skl, struct skl_pipe *pipe);
473 int skl_delete_pipe(struct skl_dev *skl, struct skl_pipe *pipe);
475 int skl_stop_pipe(struct skl_dev *skl, struct skl_pipe *pipe);
477 int skl_reset_pipe(struct skl_dev *skl, struct skl_pipe *pipe);
479 int skl_init_module(struct skl_dev *skl, struct skl_module_cfg *mconfig);
481 int skl_bind_modules(struct skl_dev *skl, struct skl_module_cfg
482 *src_mcfg, struct skl_module_cfg *dst_mcfg);
484 int skl_unbind_modules(struct skl_dev *skl, struct skl_module_cfg
485 *src_mcfg, struct skl_module_cfg *dst_mcfg);
487 int skl_set_module_params(struct skl_dev *skl, u32 *params, int size,
488 u32 param_id, struct skl_module_cfg *mcfg);
489 int skl_get_module_params(struct skl_dev *skl, u32 *params, int size,
490 u32 param_id, struct skl_module_cfg *mcfg);
492 struct skl_module_cfg *skl_tplg_be_get_cpr_module(struct snd_soc_dai *dai,
494 enum skl_bitdepth skl_get_bit_depth(int params);
495 int skl_pcm_host_dma_prepare(struct device *dev,
496 struct skl_pipe_params *params);
497 int skl_pcm_link_dma_prepare(struct device *dev,
498 struct skl_pipe_params *params);
500 int skl_dai_load(struct snd_soc_component *cmp, int index,
501 struct snd_soc_dai_driver *dai_drv,
502 struct snd_soc_tplg_pcm *pcm, struct snd_soc_dai *dai);
503 void skl_tplg_add_moduleid_in_bind_params(struct skl_dev *skl,
504 struct snd_soc_dapm_widget *w);