sound/soc/intel/skylake/skl-pcm.c

   1 /*
   2  *  skl-pcm.c -ASoC HDA Platform driver file implementing PCM functionality
   3  *
   4  *  Copyright (C) 2014-2015 Intel Corp
   5  *  Author:  Jeeja KP <jeeja.kp@intel.com>
   6  *
   7  *  ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   8  *
   9  *  This program is free software; you can redistribute it and/or modify
  10  *  it under the terms of the GNU General Public License as published by
  11  *  the Free Software Foundation; version 2 of the License.
  12  *
  13  *  This program is distributed in the hope that it will be useful, but
  14  *  WITHOUT ANY WARRANTY; without even the implied warranty of
  15  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  16  *  General Public License for more details.
  17  *
  18  * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  19  *
  20  */
  21
  22 #include <linux/pci.h>
  23 #include <linux/pm_runtime.h>
  24 #include <linux/delay.h>
  25 #include <sound/pcm_params.h>
  26 #include <sound/soc.h>
  27 #include "skl.h"
  28 #include "skl-topology.h"
  29 #include "skl-sst-dsp.h"
  30 #include "skl-sst-ipc.h"
  31
  32 #define HDA_MONO 1
  33 #define HDA_STEREO 2
  34 #define HDA_QUAD 4
  35
  36 static const struct snd_pcm_hardware azx_pcm_hw = {
  37         .info =                 (SNDRV_PCM_INFO_MMAP |
  38                                  SNDRV_PCM_INFO_INTERLEAVED |
  39                                  SNDRV_PCM_INFO_BLOCK_TRANSFER |
  40                                  SNDRV_PCM_INFO_MMAP_VALID |
  41                                  SNDRV_PCM_INFO_PAUSE |
  42                                  SNDRV_PCM_INFO_RESUME |
  43                                  SNDRV_PCM_INFO_SYNC_START |
  44                                  SNDRV_PCM_INFO_HAS_WALL_CLOCK | /* legacy */
  45                                  SNDRV_PCM_INFO_HAS_LINK_ATIME |
  46                                  SNDRV_PCM_INFO_NO_PERIOD_WAKEUP),
  47         .formats =              SNDRV_PCM_FMTBIT_S16_LE |
  48                                 SNDRV_PCM_FMTBIT_S32_LE |
  49                                 SNDRV_PCM_FMTBIT_S24_LE,
  50         .rates =                SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_16000 |
  51                                 SNDRV_PCM_RATE_8000,
  52         .rate_min =             8000,
  53         .rate_max =             48000,
  54         .channels_min =         1,
  55         .channels_max =         8,
  56         .buffer_bytes_max =     AZX_MAX_BUF_SIZE,
  57         .period_bytes_min =     128,
  58         .period_bytes_max =     AZX_MAX_BUF_SIZE / 2,
  59         .periods_min =          2,
  60         .periods_max =          AZX_MAX_FRAG,
  61         .fifo_size =            0,
  62 };
  63
  64 static inline
  65 struct hdac_ext_stream *get_hdac_ext_stream(struct snd_pcm_substream *substream)
  66 {
  67         return substream->runtime->private_data;
  68 }
  69
  70 static struct hdac_bus *get_bus_ctx(struct snd_pcm_substream *substream)
  71 {
  72         struct hdac_ext_stream *stream = get_hdac_ext_stream(substream);
  73         struct hdac_stream *hstream = hdac_stream(stream);
  74         struct hdac_bus *bus = hstream->bus;
  75         return bus;
  76 }
  77
  78 static int skl_substream_alloc_pages(struct hdac_bus *bus,
  79                                  struct snd_pcm_substream *substream,
  80                                  size_t size)
  81 {
  82         struct hdac_ext_stream *stream = get_hdac_ext_stream(substream);
  83
  84         hdac_stream(stream)->bufsize = 0;
  85         hdac_stream(stream)->period_bytes = 0;
  86         hdac_stream(stream)->format_val = 0;
  87
  88         return snd_pcm_lib_malloc_pages(substream, size);
  89 }
  90
  91 static int skl_substream_free_pages(struct hdac_bus *bus,
  92                                 struct snd_pcm_substream *substream)
  93 {
  94         return snd_pcm_lib_free_pages(substream);
  95 }
  96
  97 static void skl_set_pcm_constrains(struct hdac_bus *bus,
  98                                  struct snd_pcm_runtime *runtime)
  99 {
 100         snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS);
 101
 102         /* avoid wrap-around with wall-clock */
 103         snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_BUFFER_TIME,
 104                                      20, 178000000);
 105 }
 106
 107 static enum hdac_ext_stream_type skl_get_host_stream_type(struct hdac_bus *bus)
 108 {
 109         if (bus->ppcap)
 110                 return HDAC_EXT_STREAM_TYPE_HOST;
 111         else
 112                 return HDAC_EXT_STREAM_TYPE_COUPLED;
 113 }
 114
 115 /*
 116  * check if the stream opened is marked as ignore_suspend by machine, if so
 117  * then enable suspend_active refcount
 118  *
 119  * The count supend_active does not need lock as it is used in open/close
 120  * and suspend context
 121  */
 122 static void skl_set_suspend_active(struct snd_pcm_substream *substream,
 123                                          struct snd_soc_dai *dai, bool enable)
 124 {
 125         struct hdac_bus *bus = dev_get_drvdata(dai->dev);
 126         struct snd_soc_dapm_widget *w;
 127         struct skl *skl = bus_to_skl(bus);
 128
 129         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
 130                 w = dai->playback_widget;
 131         else
 132                 w = dai->capture_widget;
 133
 134         if (w->ignore_suspend && enable)
 135                 skl->supend_active++;
 136         else if (w->ignore_suspend && !enable)
 137                 skl->supend_active--;
 138 }
 139
 140 int skl_pcm_host_dma_prepare(struct device *dev, struct skl_pipe_params *params)
 141 {
 142         struct hdac_bus *bus = dev_get_drvdata(dev);
 143         unsigned int format_val;
 144         struct hdac_stream *hstream;
 145         struct hdac_ext_stream *stream;
 146         int err;
 147
 148         hstream = snd_hdac_get_stream(bus, params->stream,
 149                                         params->host_dma_id + 1);
 150         if (!hstream)
 151                 return -EINVAL;
 152
 153         stream = stream_to_hdac_ext_stream(hstream);
 154         snd_hdac_ext_stream_decouple(bus, stream, true);
 155
 156         format_val = snd_hdac_calc_stream_format(params->s_freq,
 157                         params->ch, params->format, params->host_bps, 0);
 158
 159         dev_dbg(dev, "format_val=%d, rate=%d, ch=%d, format=%d\n",
 160                 format_val, params->s_freq, params->ch, params->format);
 161
 162         snd_hdac_stream_reset(hdac_stream(stream));
 163         err = snd_hdac_stream_set_params(hdac_stream(stream), format_val);
 164         if (err < 0)
 165                 return err;
 166
 167         err = snd_hdac_stream_setup(hdac_stream(stream));
 168         if (err < 0)
 169                 return err;
 170
 171         hdac_stream(stream)->prepared = 1;
 172
 173         return 0;
 174 }
 175
 176 int skl_pcm_link_dma_prepare(struct device *dev, struct skl_pipe_params *params)
 177 {
 178         struct hdac_bus *bus = dev_get_drvdata(dev);
 179         unsigned int format_val;
 180         struct hdac_stream *hstream;
 181         struct hdac_ext_stream *stream;
 182         struct hdac_ext_link *link;
 183         unsigned char stream_tag;
 184
 185         hstream = snd_hdac_get_stream(bus, params->stream,
 186                                         params->link_dma_id + 1);
 187         if (!hstream)
 188                 return -EINVAL;
 189
 190         stream = stream_to_hdac_ext_stream(hstream);
 191         snd_hdac_ext_stream_decouple(bus, stream, true);
 192         format_val = snd_hdac_calc_stream_format(params->s_freq, params->ch,
 193                                         params->format, params->link_bps, 0);
 194
 195         dev_dbg(dev, "format_val=%d, rate=%d, ch=%d, format=%d\n",
 196                 format_val, params->s_freq, params->ch, params->format);
 197
 198         snd_hdac_ext_link_stream_reset(stream);
 199
 200         snd_hdac_ext_link_stream_setup(stream, format_val);
 201
 202         stream_tag = hstream->stream_tag;
 203         if (stream->hstream.direction == SNDRV_PCM_STREAM_PLAYBACK) {
 204                 list_for_each_entry(link, &bus->hlink_list, list) {
 205                         if (link->index == params->link_index)
 206                                 snd_hdac_ext_link_set_stream_id(link,
 207                                                                 stream_tag);
 208                 }
 209         }
 210
 211         stream->link_prepared = 1;
 212
 213         return 0;
 214 }
 215
 216 static int skl_pcm_open(struct snd_pcm_substream *substream,
 217                 struct snd_soc_dai *dai)
 218 {
 219         struct hdac_bus *bus = dev_get_drvdata(dai->dev);
 220         struct hdac_ext_stream *stream;
 221         struct snd_pcm_runtime *runtime = substream->runtime;
 222         struct skl_dma_params *dma_params;
 223         struct skl *skl = get_skl_ctx(dai->dev);
 224         struct skl_module_cfg *mconfig;
 225
 226         dev_dbg(dai->dev, "%s: %s\n", __func__, dai->name);
 227
 228         stream = snd_hdac_ext_stream_assign(bus, substream,
 229                                         skl_get_host_stream_type(bus));
 230         if (stream == NULL)
 231                 return -EBUSY;
 232
 233         skl_set_pcm_constrains(bus, runtime);
 234
 235         /*
 236          * disable WALLCLOCK timestamps for capture streams
 237          * until we figure out how to handle digital inputs
 238          */
 239         if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
 240                 runtime->hw.info &= ~SNDRV_PCM_INFO_HAS_WALL_CLOCK; /* legacy */
 241                 runtime->hw.info &= ~SNDRV_PCM_INFO_HAS_LINK_ATIME;
 242         }
 243
 244         runtime->private_data = stream;
 245
 246         dma_params = kzalloc(sizeof(*dma_params), GFP_KERNEL);
 247         if (!dma_params)
 248                 return -ENOMEM;
 249
 250         dma_params->stream_tag = hdac_stream(stream)->stream_tag;
 251         snd_soc_dai_set_dma_data(dai, substream, dma_params);
 252
 253         dev_dbg(dai->dev, "stream tag set in dma params=%d\n",
 254                                  dma_params->stream_tag);
 255         skl_set_suspend_active(substream, dai, true);
 256         snd_pcm_set_sync(substream);
 257
 258         mconfig = skl_tplg_fe_get_cpr_module(dai, substream->stream);
 259         if (!mconfig)
 260                 return -EINVAL;
 261
 262         skl_tplg_d0i3_get(skl, mconfig->d0i3_caps);
 263
 264         return 0;
 265 }
 266
 267 static int skl_pcm_prepare(struct snd_pcm_substream *substream,
 268                 struct snd_soc_dai *dai)
 269 {
 270         struct skl *skl = get_skl_ctx(dai->dev);
 271         struct skl_module_cfg *mconfig;
 272         int ret;
 273
 274         dev_dbg(dai->dev, "%s: %s\n", __func__, dai->name);
 275
 276         mconfig = skl_tplg_fe_get_cpr_module(dai, substream->stream);
 277
 278         /*
 279          * In case of XRUN recovery or in the case when the application
 280          * calls prepare another time, reset the FW pipe to clean state
 281          */
 282         if (mconfig &&
 283                 (substream->runtime->status->state == SNDRV_PCM_STATE_XRUN ||
 284                  mconfig->pipe->state == SKL_PIPE_CREATED ||
 285                  mconfig->pipe->state == SKL_PIPE_PAUSED)) {
 286
 287                 ret = skl_reset_pipe(skl->skl_sst, mconfig->pipe);
 288
 289                 if (ret < 0)
 290                         return ret;
 291
 292                 ret = skl_pcm_host_dma_prepare(dai->dev,
 293                                         mconfig->pipe->p_params);
 294                 if (ret < 0)
 295                         return ret;
 296         }
 297
 298         return 0;
 299 }
 300
 301 static int skl_pcm_hw_params(struct snd_pcm_substream *substream,
 302                                 struct snd_pcm_hw_params *params,
 303                                 struct snd_soc_dai *dai)
 304 {
 305         struct hdac_bus *bus = dev_get_drvdata(dai->dev);
 306         struct hdac_ext_stream *stream = get_hdac_ext_stream(substream);
 307         struct snd_pcm_runtime *runtime = substream->runtime;
 308         struct skl_pipe_params p_params = {0};
 309         struct skl_module_cfg *m_cfg;
 310         int ret, dma_id;
 311
 312         dev_dbg(dai->dev, "%s: %s\n", __func__, dai->name);
 313         ret = skl_substream_alloc_pages(bus, substream,
 314                                           params_buffer_bytes(params));
 315         if (ret < 0)
 316                 return ret;
 317
 318         dev_dbg(dai->dev, "format_val, rate=%d, ch=%d, format=%d\n",
 319                         runtime->rate, runtime->channels, runtime->format);
 320
 321         dma_id = hdac_stream(stream)->stream_tag - 1;
 322         dev_dbg(dai->dev, "dma_id=%d\n", dma_id);
 323
 324         p_params.s_fmt = snd_pcm_format_width(params_format(params));
 325         p_params.ch = params_channels(params);
 326         p_params.s_freq = params_rate(params);
 327         p_params.host_dma_id = dma_id;
 328         p_params.stream = substream->stream;
 329         p_params.format = params_format(params);
 330         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
 331                 p_params.host_bps = dai->driver->playback.sig_bits;
 332         else
 333                 p_params.host_bps = dai->driver->capture.sig_bits;
 334
 335
 336         m_cfg = skl_tplg_fe_get_cpr_module(dai, p_params.stream);
 337         if (m_cfg)
 338                 skl_tplg_update_pipe_params(dai->dev, m_cfg, &p_params);
 339
 340         return 0;
 341 }
 342
 343 static void skl_pcm_close(struct snd_pcm_substream *substream,
 344                 struct snd_soc_dai *dai)
 345 {
 346         struct hdac_ext_stream *stream = get_hdac_ext_stream(substream);
 347         struct hdac_bus *bus = dev_get_drvdata(dai->dev);
 348         struct skl_dma_params *dma_params = NULL;
 349         struct skl *skl = bus_to_skl(bus);
 350         struct skl_module_cfg *mconfig;
 351
 352         dev_dbg(dai->dev, "%s: %s\n", __func__, dai->name);
 353
 354         snd_hdac_ext_stream_release(stream, skl_get_host_stream_type(bus));
 355
 356         dma_params = snd_soc_dai_get_dma_data(dai, substream);
 357         /*
 358          * now we should set this to NULL as we are freeing by the
 359          * dma_params
 360          */
 361         snd_soc_dai_set_dma_data(dai, substream, NULL);
 362         skl_set_suspend_active(substream, dai, false);
 363
 364         /*
 365          * check if close is for "Reference Pin" and set back the
 366          * CGCTL.MISCBDCGE if disabled by driver
 367          */
 368         if (!strncmp(dai->name, "Reference Pin", 13) &&
 369                         skl->skl_sst->miscbdcg_disabled) {
 370                 skl->skl_sst->enable_miscbdcge(dai->dev, true);
 371                 skl->skl_sst->miscbdcg_disabled = false;
 372         }
 373
 374         mconfig = skl_tplg_fe_get_cpr_module(dai, substream->stream);
 375         if (mconfig)
 376                 skl_tplg_d0i3_put(skl, mconfig->d0i3_caps);
 377
 378         kfree(dma_params);
 379 }
 380
 381 static int skl_pcm_hw_free(struct snd_pcm_substream *substream,
 382                 struct snd_soc_dai *dai)
 383 {
 384         struct hdac_bus *bus = dev_get_drvdata(dai->dev);
 385         struct hdac_ext_stream *stream = get_hdac_ext_stream(substream);
 386         struct skl *skl = get_skl_ctx(dai->dev);
 387         struct skl_module_cfg *mconfig;
 388         int ret;
 389
 390         dev_dbg(dai->dev, "%s: %s\n", __func__, dai->name);
 391
 392         mconfig = skl_tplg_fe_get_cpr_module(dai, substream->stream);
 393
 394         if (mconfig) {
 395                 ret = skl_reset_pipe(skl->skl_sst, mconfig->pipe);
 396                 if (ret < 0)
 397                         dev_err(dai->dev, "%s:Reset failed ret =%d",
 398                                                 __func__, ret);
 399         }
 400
 401         snd_hdac_stream_cleanup(hdac_stream(stream));
 402         hdac_stream(stream)->prepared = 0;
 403
 404         return skl_substream_free_pages(bus, substream);
 405 }
 406
 407 static int skl_be_hw_params(struct snd_pcm_substream *substream,
 408                                 struct snd_pcm_hw_params *params,
 409                                 struct snd_soc_dai *dai)
 410 {
 411         struct skl_pipe_params p_params = {0};
 412
 413         p_params.s_fmt = snd_pcm_format_width(params_format(params));
 414         p_params.ch = params_channels(params);
 415         p_params.s_freq = params_rate(params);
 416         p_params.stream = substream->stream;
 417
 418         return skl_tplg_be_update_params(dai, &p_params);
 419 }
 420
 421 static int skl_decoupled_trigger(struct snd_pcm_substream *substream,
 422                 int cmd)
 423 {
 424         struct hdac_bus *bus = get_bus_ctx(substream);
 425         struct hdac_ext_stream *stream;
 426         int start;
 427         unsigned long cookie;
 428         struct hdac_stream *hstr;
 429
 430         stream = get_hdac_ext_stream(substream);
 431         hstr = hdac_stream(stream);
 432
 433         if (!hstr->prepared)
 434                 return -EPIPE;
 435
 436         switch (cmd) {
 437         case SNDRV_PCM_TRIGGER_START:
 438         case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
 439         case SNDRV_PCM_TRIGGER_RESUME:
 440                 start = 1;
 441                 break;
 442
 443         case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
 444         case SNDRV_PCM_TRIGGER_SUSPEND:
 445         case SNDRV_PCM_TRIGGER_STOP:
 446                 start = 0;
 447                 break;
 448
 449         default:
 450                 return -EINVAL;
 451         }
 452
 453         spin_lock_irqsave(&bus->reg_lock, cookie);
 454
 455         if (start) {
 456                 snd_hdac_stream_start(hdac_stream(stream), true);
 457                 snd_hdac_stream_timecounter_init(hstr, 0);
 458         } else {
 459                 snd_hdac_stream_stop(hdac_stream(stream));
 460         }
 461
 462         spin_unlock_irqrestore(&bus->reg_lock, cookie);
 463
 464         return 0;
 465 }
 466
 467 static int skl_pcm_trigger(struct snd_pcm_substream *substream, int cmd,
 468                 struct snd_soc_dai *dai)
 469 {
 470         struct skl *skl = get_skl_ctx(dai->dev);
 471         struct skl_sst *ctx = skl->skl_sst;
 472         struct skl_module_cfg *mconfig;
 473         struct hdac_bus *bus = get_bus_ctx(substream);
 474         struct hdac_ext_stream *stream = get_hdac_ext_stream(substream);
 475         struct snd_soc_dapm_widget *w;
 476         int ret;
 477
 478         mconfig = skl_tplg_fe_get_cpr_module(dai, substream->stream);
 479         if (!mconfig)
 480                 return -EIO;
 481
 482         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
 483                 w = dai->playback_widget;
 484         else
 485                 w = dai->capture_widget;
 486
 487         switch (cmd) {
 488         case SNDRV_PCM_TRIGGER_RESUME:
 489                 if (!w->ignore_suspend) {
 490                         /*
 491                          * enable DMA Resume enable bit for the stream, set the
 492                          * dpib & lpib position to resume before starting the
 493                          * DMA
 494                          */
 495                         snd_hdac_ext_stream_drsm_enable(bus, true,
 496                                                 hdac_stream(stream)->index);
 497                         snd_hdac_ext_stream_set_dpibr(bus, stream,
 498                                                         stream->lpib);
 499                         snd_hdac_ext_stream_set_lpib(stream, stream->lpib);
 500                 }
 501
 502         case SNDRV_PCM_TRIGGER_START:
 503         case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
 504                 /*
 505                  * Start HOST DMA and Start FE Pipe.This is to make sure that
 506                  * there are no underrun/overrun in the case when the FE
 507                  * pipeline is started but there is a delay in starting the
 508                  * DMA channel on the host.
 509                  */
 510                 ret = skl_decoupled_trigger(substream, cmd);
 511                 if (ret < 0)
 512                         return ret;
 513                 return skl_run_pipe(ctx, mconfig->pipe);
 514                 break;
 515
 516         case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
 517         case SNDRV_PCM_TRIGGER_SUSPEND:
 518         case SNDRV_PCM_TRIGGER_STOP:
 519                 /*
 520                  * Stop FE Pipe first and stop DMA. This is to make sure that
 521                  * there are no underrun/overrun in the case if there is a delay
 522                  * between the two operations.
 523                  */
 524                 ret = skl_stop_pipe(ctx, mconfig->pipe);
 525                 if (ret < 0)
 526                         return ret;
 527
 528                 ret = skl_decoupled_trigger(substream, cmd);
 529                 if ((cmd == SNDRV_PCM_TRIGGER_SUSPEND) && !w->ignore_suspend) {
 530                         /* save the dpib and lpib positions */
 531                         stream->dpib = readl(bus->remap_addr +
 532                                         AZX_REG_VS_SDXDPIB_XBASE +
 533                                         (AZX_REG_VS_SDXDPIB_XINTERVAL *
 534                                         hdac_stream(stream)->index));
 535
 536                         stream->lpib = snd_hdac_stream_get_pos_lpib(
 537                                                         hdac_stream(stream));
 538                         snd_hdac_ext_stream_decouple(bus, stream, false);
 539                 }
 540                 break;
 541
 542         default:
 543                 return -EINVAL;
 544         }
 545
 546         return 0;
 547 }
 548
 549
 550 static int skl_link_hw_params(struct snd_pcm_substream *substream,
 551                                 struct snd_pcm_hw_params *params,
 552                                 struct snd_soc_dai *dai)
 553 {
 554         struct hdac_bus *bus = dev_get_drvdata(dai->dev);
 555         struct hdac_ext_stream *link_dev;
 556         struct snd_soc_pcm_runtime *rtd = snd_pcm_substream_chip(substream);
 557         struct snd_soc_dai *codec_dai = rtd->codec_dai;
 558         struct skl_pipe_params p_params = {0};
 559         struct hdac_ext_link *link;
 560         int stream_tag;
 561
 562         link_dev = snd_hdac_ext_stream_assign(bus, substream,
 563                                         HDAC_EXT_STREAM_TYPE_LINK);
 564         if (!link_dev)
 565                 return -EBUSY;
 566
 567         snd_soc_dai_set_dma_data(dai, substream, (void *)link_dev);
 568
 569         link = snd_hdac_ext_bus_get_link(bus, codec_dai->component->name);
 570         if (!link)
 571                 return -EINVAL;
 572
 573         stream_tag = hdac_stream(link_dev)->stream_tag;
 574
 575         /* set the stream tag in the codec dai dma params  */
 576         snd_soc_dai_set_tdm_slot(codec_dai, stream_tag, 0, 0, 0);
 577
 578         p_params.s_fmt = snd_pcm_format_width(params_format(params));
 579         p_params.ch = params_channels(params);
 580         p_params.s_freq = params_rate(params);
 581         p_params.stream = substream->stream;
 582         p_params.link_dma_id = stream_tag - 1;
 583         p_params.link_index = link->index;
 584         p_params.format = params_format(params);
 585
 586         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
 587                 p_params.link_bps = codec_dai->driver->playback.sig_bits;
 588         else
 589                 p_params.link_bps = codec_dai->driver->capture.sig_bits;
 590
 591         return skl_tplg_be_update_params(dai, &p_params);
 592 }
 593
 594 static int skl_link_pcm_prepare(struct snd_pcm_substream *substream,
 595                 struct snd_soc_dai *dai)
 596 {
 597         struct skl *skl = get_skl_ctx(dai->dev);
 598         struct skl_module_cfg *mconfig = NULL;
 599
 600         /* In case of XRUN recovery, reset the FW pipe to clean state */
 601         mconfig = skl_tplg_be_get_cpr_module(dai, substream->stream);
 602         if (mconfig && !mconfig->pipe->passthru &&
 603                 (substream->runtime->status->state == SNDRV_PCM_STATE_XRUN))
 604                 skl_reset_pipe(skl->skl_sst, mconfig->pipe);
 605
 606         return 0;
 607 }
 608
 609 static int skl_link_pcm_trigger(struct snd_pcm_substream *substream,
 610         int cmd, struct snd_soc_dai *dai)
 611 {
 612         struct hdac_ext_stream *link_dev =
 613                                 snd_soc_dai_get_dma_data(dai, substream);
 614         struct hdac_bus *bus = get_bus_ctx(substream);
 615         struct hdac_ext_stream *stream = get_hdac_ext_stream(substream);
 616
 617         dev_dbg(dai->dev, "In %s cmd=%d\n", __func__, cmd);
 618         switch (cmd) {
 619         case SNDRV_PCM_TRIGGER_RESUME:
 620         case SNDRV_PCM_TRIGGER_START:
 621         case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
 622                 snd_hdac_ext_link_stream_start(link_dev);
 623                 break;
 624
 625         case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
 626         case SNDRV_PCM_TRIGGER_SUSPEND:
 627         case SNDRV_PCM_TRIGGER_STOP:
 628                 snd_hdac_ext_link_stream_clear(link_dev);
 629                 if (cmd == SNDRV_PCM_TRIGGER_SUSPEND)
 630                         snd_hdac_ext_stream_decouple(bus, stream, false);
 631                 break;
 632
 633         default:
 634                 return -EINVAL;
 635         }
 636         return 0;
 637 }
 638
 639 static int skl_link_hw_free(struct snd_pcm_substream *substream,
 640                 struct snd_soc_dai *dai)
 641 {
 642         struct hdac_bus *bus = dev_get_drvdata(dai->dev);
 643         struct snd_soc_pcm_runtime *rtd = snd_pcm_substream_chip(substream);
 644         struct hdac_ext_stream *link_dev =
 645                                 snd_soc_dai_get_dma_data(dai, substream);
 646         struct hdac_ext_link *link;
 647         unsigned char stream_tag;
 648
 649         dev_dbg(dai->dev, "%s: %s\n", __func__, dai->name);
 650
 651         link_dev->link_prepared = 0;
 652
 653         link = snd_hdac_ext_bus_get_link(bus, rtd->codec_dai->component->name);
 654         if (!link)
 655                 return -EINVAL;
 656
 657         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
 658                 stream_tag = hdac_stream(link_dev)->stream_tag;
 659                 snd_hdac_ext_link_clear_stream_id(link, stream_tag);
 660         }
 661
 662         snd_hdac_ext_stream_release(link_dev, HDAC_EXT_STREAM_TYPE_LINK);
 663         return 0;
 664 }
 665
 666 static const struct snd_soc_dai_ops skl_pcm_dai_ops = {
 667         .startup = skl_pcm_open,
 668         .shutdown = skl_pcm_close,
 669         .prepare = skl_pcm_prepare,
 670         .hw_params = skl_pcm_hw_params,
 671         .hw_free = skl_pcm_hw_free,
 672         .trigger = skl_pcm_trigger,
 673 };
 674
 675 static const struct snd_soc_dai_ops skl_dmic_dai_ops = {
 676         .hw_params = skl_be_hw_params,
 677 };
 678
 679 static const struct snd_soc_dai_ops skl_be_ssp_dai_ops = {
 680         .hw_params = skl_be_hw_params,
 681 };
 682
 683 static const struct snd_soc_dai_ops skl_link_dai_ops = {
 684         .prepare = skl_link_pcm_prepare,
 685         .hw_params = skl_link_hw_params,
 686         .hw_free = skl_link_hw_free,
 687         .trigger = skl_link_pcm_trigger,
 688 };
 689
 690 static struct snd_soc_dai_driver skl_fe_dai[] = {
 691 {
 692         .name = "System Pin",
 693         .ops = &skl_pcm_dai_ops,
 694         .playback = {
 695                 .stream_name = "System Playback",
 696                 .channels_min = HDA_MONO,
 697                 .channels_max = HDA_STEREO,
 698                 .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_8000,
 699                 .formats = SNDRV_PCM_FMTBIT_S16_LE |
 700                         SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE,
 701                 .sig_bits = 32,
 702         },
 703         .capture = {
 704                 .stream_name = "System Capture",
 705                 .channels_min = HDA_MONO,
 706                 .channels_max = HDA_STEREO,
 707                 .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_16000,
 708                 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE,
 709                 .sig_bits = 32,
 710         },
 711 },
 712 {
 713         .name = "System Pin2",
 714         .ops = &skl_pcm_dai_ops,
 715         .playback = {
 716                 .stream_name = "Headset Playback",
 717                 .channels_min = HDA_MONO,
 718                 .channels_max = HDA_STEREO,
 719                 .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_16000 |
 720                         SNDRV_PCM_RATE_8000,
 721                 .formats = SNDRV_PCM_FMTBIT_S16_LE |
 722                         SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE,
 723         },
 724 },
 725 {
 726         .name = "Echoref Pin",
 727         .ops = &skl_pcm_dai_ops,
 728         .capture = {
 729                 .stream_name = "Echoreference Capture",
 730                 .channels_min = HDA_STEREO,
 731                 .channels_max = HDA_STEREO,
 732                 .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_16000 |
 733                         SNDRV_PCM_RATE_8000,
 734                 .formats = SNDRV_PCM_FMTBIT_S16_LE |
 735                         SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE,
 736         },
 737 },
 738 {
 739         .name = "Reference Pin",
 740         .ops = &skl_pcm_dai_ops,
 741         .capture = {
 742                 .stream_name = "Reference Capture",
 743                 .channels_min = HDA_MONO,
 744                 .channels_max = HDA_QUAD,
 745                 .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_16000,
 746                 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE,
 747                 .sig_bits = 32,
 748         },
 749 },
 750 {
 751         .name = "Deepbuffer Pin",
 752         .ops = &skl_pcm_dai_ops,
 753         .playback = {
 754                 .stream_name = "Deepbuffer Playback",
 755                 .channels_min = HDA_STEREO,
 756                 .channels_max = HDA_STEREO,
 757                 .rates = SNDRV_PCM_RATE_48000,
 758                 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE,
 759                 .sig_bits = 32,
 760         },
 761 },
 762 {
 763         .name = "LowLatency Pin",
 764         .ops = &skl_pcm_dai_ops,
 765         .playback = {
 766                 .stream_name = "Low Latency Playback",
 767                 .channels_min = HDA_STEREO,
 768                 .channels_max = HDA_STEREO,
 769                 .rates = SNDRV_PCM_RATE_48000,
 770                 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE,
 771                 .sig_bits = 32,
 772         },
 773 },
 774 {
 775         .name = "DMIC Pin",
 776         .ops = &skl_pcm_dai_ops,
 777         .capture = {
 778                 .stream_name = "DMIC Capture",
 779                 .channels_min = HDA_MONO,
 780                 .channels_max = HDA_QUAD,
 781                 .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_16000,
 782                 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE,
 783                 .sig_bits = 32,
 784         },
 785 },
 786 {
 787         .name = "HDMI1 Pin",
 788         .ops = &skl_pcm_dai_ops,
 789         .playback = {
 790                 .stream_name = "HDMI1 Playback",
 791                 .channels_min = HDA_STEREO,
 792                 .channels_max = 8,
 793                 .rates = SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 |
 794                         SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 |
 795                         SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |
 796                         SNDRV_PCM_RATE_192000,
 797                 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE |
 798                         SNDRV_PCM_FMTBIT_S32_LE,
 799                 .sig_bits = 32,
 800         },
 801 },
 802 {
 803         .name = "HDMI2 Pin",
 804         .ops = &skl_pcm_dai_ops,
 805         .playback = {
 806                 .stream_name = "HDMI2 Playback",
 807                 .channels_min = HDA_STEREO,
 808                 .channels_max = 8,
 809                 .rates = SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 |
 810                         SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 |
 811                         SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |
 812                         SNDRV_PCM_RATE_192000,
 813                 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE |
 814                         SNDRV_PCM_FMTBIT_S32_LE,
 815                 .sig_bits = 32,
 816         },
 817 },
 818 {
 819         .name = "HDMI3 Pin",
 820         .ops = &skl_pcm_dai_ops,
 821         .playback = {
 822                 .stream_name = "HDMI3 Playback",
 823                 .channels_min = HDA_STEREO,
 824                 .channels_max = 8,
 825                 .rates = SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 |
 826                         SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 |
 827                         SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |
 828                         SNDRV_PCM_RATE_192000,
 829                 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE |
 830                         SNDRV_PCM_FMTBIT_S32_LE,
 831                 .sig_bits = 32,
 832         },
 833 },
 834 };
 835
 836 /* BE CPU  Dais */
 837 static struct snd_soc_dai_driver skl_platform_dai[] = {
 838 {
 839         .name = "SSP0 Pin",
 840         .ops = &skl_be_ssp_dai_ops,
 841         .playback = {
 842                 .stream_name = "ssp0 Tx",
 843                 .channels_min = HDA_STEREO,
 844                 .channels_max = HDA_STEREO,
 845                 .rates = SNDRV_PCM_RATE_48000,
 846                 .formats = SNDRV_PCM_FMTBIT_S16_LE,
 847         },
 848         .capture = {
 849                 .stream_name = "ssp0 Rx",
 850                 .channels_min = HDA_STEREO,
 851                 .channels_max = HDA_STEREO,
 852                 .rates = SNDRV_PCM_RATE_48000,
 853                 .formats = SNDRV_PCM_FMTBIT_S16_LE,
 854         },
 855 },
 856 {
 857         .name = "SSP1 Pin",
 858         .ops = &skl_be_ssp_dai_ops,
 859         .playback = {
 860                 .stream_name = "ssp1 Tx",
 861                 .channels_min = HDA_STEREO,
 862                 .channels_max = HDA_STEREO,
 863                 .rates = SNDRV_PCM_RATE_48000,
 864                 .formats = SNDRV_PCM_FMTBIT_S16_LE,
 865         },
 866         .capture = {
 867                 .stream_name = "ssp1 Rx",
 868                 .channels_min = HDA_STEREO,
 869                 .channels_max = HDA_STEREO,
 870                 .rates = SNDRV_PCM_RATE_48000,
 871                 .formats = SNDRV_PCM_FMTBIT_S16_LE,
 872         },
 873 },
 874 {
 875         .name = "SSP2 Pin",
 876         .ops = &skl_be_ssp_dai_ops,
 877         .playback = {
 878                 .stream_name = "ssp2 Tx",
 879                 .channels_min = HDA_STEREO,
 880                 .channels_max = HDA_STEREO,
 881                 .rates = SNDRV_PCM_RATE_48000,
 882                 .formats = SNDRV_PCM_FMTBIT_S16_LE,
 883         },
 884         .capture = {
 885                 .stream_name = "ssp2 Rx",
 886                 .channels_min = HDA_STEREO,
 887                 .channels_max = HDA_STEREO,
 888                 .rates = SNDRV_PCM_RATE_48000,
 889                 .formats = SNDRV_PCM_FMTBIT_S16_LE,
 890         },
 891 },
 892 {
 893         .name = "SSP3 Pin",
 894         .ops = &skl_be_ssp_dai_ops,
 895         .playback = {
 896                 .stream_name = "ssp3 Tx",
 897                 .channels_min = HDA_STEREO,
 898                 .channels_max = HDA_STEREO,
 899                 .rates = SNDRV_PCM_RATE_48000,
 900                 .formats = SNDRV_PCM_FMTBIT_S16_LE,
 901         },
 902         .capture = {
 903                 .stream_name = "ssp3 Rx",
 904                 .channels_min = HDA_STEREO,
 905                 .channels_max = HDA_STEREO,
 906                 .rates = SNDRV_PCM_RATE_48000,
 907                 .formats = SNDRV_PCM_FMTBIT_S16_LE,
 908         },
 909 },
 910 {
 911         .name = "SSP4 Pin",
 912         .ops = &skl_be_ssp_dai_ops,
 913         .playback = {
 914                 .stream_name = "ssp4 Tx",
 915                 .channels_min = HDA_STEREO,
 916                 .channels_max = HDA_STEREO,
 917                 .rates = SNDRV_PCM_RATE_48000,
 918                 .formats = SNDRV_PCM_FMTBIT_S16_LE,
 919         },
 920         .capture = {
 921                 .stream_name = "ssp4 Rx",
 922                 .channels_min = HDA_STEREO,
 923                 .channels_max = HDA_STEREO,
 924                 .rates = SNDRV_PCM_RATE_48000,
 925                 .formats = SNDRV_PCM_FMTBIT_S16_LE,
 926         },
 927 },
 928 {
 929         .name = "SSP5 Pin",
 930         .ops = &skl_be_ssp_dai_ops,
 931         .playback = {
 932                 .stream_name = "ssp5 Tx",
 933                 .channels_min = HDA_STEREO,
 934                 .channels_max = HDA_STEREO,
 935                 .rates = SNDRV_PCM_RATE_48000,
 936                 .formats = SNDRV_PCM_FMTBIT_S16_LE,
 937         },
 938         .capture = {
 939                 .stream_name = "ssp5 Rx",
 940                 .channels_min = HDA_STEREO,
 941                 .channels_max = HDA_STEREO,
 942                 .rates = SNDRV_PCM_RATE_48000,
 943                 .formats = SNDRV_PCM_FMTBIT_S16_LE,
 944         },
 945 },
 946 {
 947         .name = "iDisp1 Pin",
 948         .ops = &skl_link_dai_ops,
 949         .playback = {
 950                 .stream_name = "iDisp1 Tx",
 951                 .channels_min = HDA_STEREO,
 952                 .channels_max = 8,
 953                 .rates = SNDRV_PCM_RATE_8000|SNDRV_PCM_RATE_16000|SNDRV_PCM_RATE_48000,
 954                 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE |
 955                         SNDRV_PCM_FMTBIT_S24_LE,
 956         },
 957 },
 958 {
 959         .name = "iDisp2 Pin",
 960         .ops = &skl_link_dai_ops,
 961         .playback = {
 962                 .stream_name = "iDisp2 Tx",
 963                 .channels_min = HDA_STEREO,
 964                 .channels_max = 8,
 965                 .rates = SNDRV_PCM_RATE_8000|SNDRV_PCM_RATE_16000|
 966                         SNDRV_PCM_RATE_48000,
 967                 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE |
 968                         SNDRV_PCM_FMTBIT_S24_LE,
 969         },
 970 },
 971 {
 972         .name = "iDisp3 Pin",
 973         .ops = &skl_link_dai_ops,
 974         .playback = {
 975                 .stream_name = "iDisp3 Tx",
 976                 .channels_min = HDA_STEREO,
 977                 .channels_max = 8,
 978                 .rates = SNDRV_PCM_RATE_8000|SNDRV_PCM_RATE_16000|
 979                         SNDRV_PCM_RATE_48000,
 980                 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE |
 981                         SNDRV_PCM_FMTBIT_S24_LE,
 982         },
 983 },
 984 {
 985         .name = "DMIC01 Pin",
 986         .ops = &skl_dmic_dai_ops,
 987         .capture = {
 988                 .stream_name = "DMIC01 Rx",
 989                 .channels_min = HDA_MONO,
 990                 .channels_max = HDA_QUAD,
 991                 .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_16000,
 992                 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE,
 993         },
 994 },
 995 {
 996         .name = "DMIC16k Pin",
 997         .ops = &skl_dmic_dai_ops,
 998         .capture = {
 999                 .stream_name = "DMIC16k Rx",
1000                 .channels_min = HDA_MONO,
1001                 .channels_max = HDA_QUAD,
1002                 .rates = SNDRV_PCM_RATE_16000,
1003                 .formats = SNDRV_PCM_FMTBIT_S16_LE,
1004         },
1005 },
1006 {
1007         .name = "HD-Codec Pin",
1008         .ops = &skl_link_dai_ops,
1009         .playback = {
1010                 .stream_name = "HD-Codec Tx",
1011                 .channels_min = HDA_STEREO,
1012                 .channels_max = HDA_STEREO,
1013                 .rates = SNDRV_PCM_RATE_48000,
1014                 .formats = SNDRV_PCM_FMTBIT_S16_LE,
1015         },
1016         .capture = {
1017                 .stream_name = "HD-Codec Rx",
1018                 .channels_min = HDA_STEREO,
1019                 .channels_max = HDA_STEREO,
1020                 .rates = SNDRV_PCM_RATE_48000,
1021                 .formats = SNDRV_PCM_FMTBIT_S16_LE,
1022         },
1023 },
1024 };
1025
1026 int skl_dai_load(struct snd_soc_component *cmp, int index,
1027                         struct snd_soc_dai_driver *dai_drv,
1028                         struct snd_soc_tplg_pcm *pcm, struct snd_soc_dai *dai)
1029 {
1030         dai_drv->ops = &skl_pcm_dai_ops;
1031
1032         return 0;
1033 }
1034
1035 static int skl_platform_open(struct snd_pcm_substream *substream)
1036 {
1037         struct snd_soc_pcm_runtime *rtd = substream->private_data;
1038         struct snd_soc_dai_link *dai_link = rtd->dai_link;
1039
1040         dev_dbg(rtd->cpu_dai->dev, "In %s:%s\n", __func__,
1041                                         dai_link->cpu_dai_name);
1042
1043         snd_soc_set_runtime_hwparams(substream, &azx_pcm_hw);
1044
1045         return 0;
1046 }
1047
1048 static int skl_coupled_trigger(struct snd_pcm_substream *substream,
1049                                         int cmd)
1050 {
1051         struct hdac_bus *bus = get_bus_ctx(substream);
1052         struct hdac_ext_stream *stream;
1053         struct snd_pcm_substream *s;
1054         bool start;
1055         int sbits = 0;
1056         unsigned long cookie;
1057         struct hdac_stream *hstr;
1058
1059         stream = get_hdac_ext_stream(substream);
1060         hstr = hdac_stream(stream);
1061
1062         dev_dbg(bus->dev, "In %s cmd=%d\n", __func__, cmd);
1063
1064         if (!hstr->prepared)
1065                 return -EPIPE;
1066
1067         switch (cmd) {
1068         case SNDRV_PCM_TRIGGER_START:
1069         case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
1070         case SNDRV_PCM_TRIGGER_RESUME:
1071                 start = true;
1072                 break;
1073
1074         case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
1075         case SNDRV_PCM_TRIGGER_SUSPEND:
1076         case SNDRV_PCM_TRIGGER_STOP:
1077                 start = false;
1078                 break;
1079
1080         default:
1081                 return -EINVAL;
1082         }
1083
1084         snd_pcm_group_for_each_entry(s, substream) {
1085                 if (s->pcm->card != substream->pcm->card)
1086                         continue;
1087                 stream = get_hdac_ext_stream(s);
1088                 sbits |= 1 << hdac_stream(stream)->index;
1089                 snd_pcm_trigger_done(s, substream);
1090         }
1091
1092         spin_lock_irqsave(&bus->reg_lock, cookie);
1093
1094         /* first, set SYNC bits of corresponding streams */
1095         snd_hdac_stream_sync_trigger(hstr, true, sbits, AZX_REG_SSYNC);
1096
1097         snd_pcm_group_for_each_entry(s, substream) {
1098                 if (s->pcm->card != substream->pcm->card)
1099                         continue;
1100                 stream = get_hdac_ext_stream(s);
1101                 if (start)
1102                         snd_hdac_stream_start(hdac_stream(stream), true);
1103                 else
1104                         snd_hdac_stream_stop(hdac_stream(stream));
1105         }
1106         spin_unlock_irqrestore(&bus->reg_lock, cookie);
1107
1108         snd_hdac_stream_sync(hstr, start, sbits);
1109
1110         spin_lock_irqsave(&bus->reg_lock, cookie);
1111
1112         /* reset SYNC bits */
1113         snd_hdac_stream_sync_trigger(hstr, false, sbits, AZX_REG_SSYNC);
1114         if (start)
1115                 snd_hdac_stream_timecounter_init(hstr, sbits);
1116         spin_unlock_irqrestore(&bus->reg_lock, cookie);
1117
1118         return 0;
1119 }
1120
1121 static int skl_platform_pcm_trigger(struct snd_pcm_substream *substream,
1122                                         int cmd)
1123 {
1124         struct hdac_bus *bus = get_bus_ctx(substream);
1125
1126         if (!bus->ppcap)
1127                 return skl_coupled_trigger(substream, cmd);
1128
1129         return 0;
1130 }
1131
1132 static snd_pcm_uframes_t skl_platform_pcm_pointer
1133                         (struct snd_pcm_substream *substream)
1134 {
1135         struct hdac_ext_stream *hstream = get_hdac_ext_stream(substream);
1136         struct hdac_bus *bus = get_bus_ctx(substream);
1137         unsigned int pos;
1138
1139         /*
1140          * Use DPIB for Playback stream as the periodic DMA Position-in-
1141          * Buffer Writes may be scheduled at the same time or later than
1142          * the MSI and does not guarantee to reflect the Position of the
1143          * last buffer that was transferred. Whereas DPIB register in
1144          * HAD space reflects the actual data that is transferred.
1145          * Use the position buffer for capture, as DPIB write gets
1146          * completed earlier than the actual data written to the DDR.
1147          *
1148          * For capture stream following workaround is required to fix the
1149          * incorrect position reporting.
1150          *
1151          * 1. Wait for 20us before reading the DMA position in buffer once
1152          * the interrupt is generated for stream completion as update happens
1153          * on the HDA frame boundary i.e. 20.833uSec.
1154          * 2. Read DPIB register to flush the DMA position value. This dummy
1155          * read is required to flush DMA position value.
1156          * 3. Read the DMA Position-in-Buffer. This value now will be equal to
1157          * or greater than period boundary.
1158          */
1159
1160         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
1161                 pos = readl(bus->remap_addr + AZX_REG_VS_SDXDPIB_XBASE +
1162                                 (AZX_REG_VS_SDXDPIB_XINTERVAL *
1163                                 hdac_stream(hstream)->index));
1164         } else {
1165                 udelay(20);
1166                 readl(bus->remap_addr +
1167                                 AZX_REG_VS_SDXDPIB_XBASE +
1168                                 (AZX_REG_VS_SDXDPIB_XINTERVAL *
1169                                  hdac_stream(hstream)->index));
1170                 pos = snd_hdac_stream_get_pos_posbuf(hdac_stream(hstream));
1171         }
1172
1173         if (pos >= hdac_stream(hstream)->bufsize)
1174                 pos = 0;
1175
1176         return bytes_to_frames(substream->runtime, pos);
1177 }
1178
1179 static u64 skl_adjust_codec_delay(struct snd_pcm_substream *substream,
1180                                 u64 nsec)
1181 {
1182         struct snd_soc_pcm_runtime *rtd = snd_pcm_substream_chip(substream);
1183         struct snd_soc_dai *codec_dai = rtd->codec_dai;
1184         u64 codec_frames, codec_nsecs;
1185
1186         if (!codec_dai->driver->ops->delay)
1187                 return nsec;
1188
1189         codec_frames = codec_dai->driver->ops->delay(substream, codec_dai);
1190         codec_nsecs = div_u64(codec_frames * 1000000000LL,
1191                               substream->runtime->rate);
1192
1193         if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
1194                 return nsec + codec_nsecs;
1195
1196         return (nsec > codec_nsecs) ? nsec - codec_nsecs : 0;
1197 }
1198
1199 static int skl_get_time_info(struct snd_pcm_substream *substream,
1200                         struct timespec *system_ts, struct timespec *audio_ts,
1201                         struct snd_pcm_audio_tstamp_config *audio_tstamp_config,
1202                         struct snd_pcm_audio_tstamp_report *audio_tstamp_report)
1203 {
1204         struct hdac_ext_stream *sstream = get_hdac_ext_stream(substream);
1205         struct hdac_stream *hstr = hdac_stream(sstream);
1206         u64 nsec;
1207
1208         if ((substream->runtime->hw.info & SNDRV_PCM_INFO_HAS_LINK_ATIME) &&
1209                 (audio_tstamp_config->type_requested == SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK)) {
1210
1211                 snd_pcm_gettime(substream->runtime, system_ts);
1212
1213                 nsec = timecounter_read(&hstr->tc);
1214                 nsec = div_u64(nsec, 3); /* can be optimized */
1215                 if (audio_tstamp_config->report_delay)
1216                         nsec = skl_adjust_codec_delay(substream, nsec);
1217
1218                 *audio_ts = ns_to_timespec(nsec);
1219
1220                 audio_tstamp_report->actual_type = SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK;
1221                 audio_tstamp_report->accuracy_report = 1; /* rest of struct is valid */
1222                 audio_tstamp_report->accuracy = 42; /* 24MHzWallClk == 42ns resolution */
1223
1224         } else {
1225                 audio_tstamp_report->actual_type = SNDRV_PCM_AUDIO_TSTAMP_TYPE_DEFAULT;
1226         }
1227
1228         return 0;
1229 }
1230
1231 static const struct snd_pcm_ops skl_platform_ops = {
1232         .open = skl_platform_open,
1233         .ioctl = snd_pcm_lib_ioctl,
1234         .trigger = skl_platform_pcm_trigger,
1235         .pointer = skl_platform_pcm_pointer,
1236         .get_time_info =  skl_get_time_info,
1237         .mmap = snd_pcm_lib_default_mmap,
1238         .page = snd_pcm_sgbuf_ops_page,
1239 };
1240
1241 static void skl_pcm_free(struct snd_pcm *pcm)
1242 {
1243         snd_pcm_lib_preallocate_free_for_all(pcm);
1244 }
1245
1246 #define MAX_PREALLOC_SIZE       (32 * 1024 * 1024)
1247
1248 static int skl_pcm_new(struct snd_soc_pcm_runtime *rtd)
1249 {
1250         struct snd_soc_dai *dai = rtd->cpu_dai;
1251         struct hdac_bus *bus = dev_get_drvdata(dai->dev);
1252         struct snd_pcm *pcm = rtd->pcm;
1253         unsigned int size;
1254         int retval = 0;
1255         struct skl *skl = bus_to_skl(bus);
1256
1257         if (dai->driver->playback.channels_min ||
1258                 dai->driver->capture.channels_min) {
1259                 /* buffer pre-allocation */
1260                 size = CONFIG_SND_HDA_PREALLOC_SIZE * 1024;
1261                 if (size > MAX_PREALLOC_SIZE)
1262                         size = MAX_PREALLOC_SIZE;
1263                 retval = snd_pcm_lib_preallocate_pages_for_all(pcm,
1264                                                 SNDRV_DMA_TYPE_DEV_SG,
1265                                                 snd_dma_pci_data(skl->pci),
1266                                                 size, MAX_PREALLOC_SIZE);
1267                 if (retval) {
1268                         dev_err(dai->dev, "dma buffer allocation fail\n");
1269                         return retval;
1270                 }
1271         }
1272
1273         return retval;
1274 }
1275
1276 static int skl_get_module_info(struct skl *skl, struct skl_module_cfg *mconfig)
1277 {
1278         struct skl_sst *ctx = skl->skl_sst;
1279         struct skl_module_inst_id *pin_id;
1280         uuid_le *uuid_mod, *uuid_tplg;
1281         struct skl_module *skl_module;
1282         struct uuid_module *module;
1283         int i, ret = -EIO;
1284
1285         uuid_mod = (uuid_le *)mconfig->guid;
1286
1287         if (list_empty(&ctx->uuid_list)) {
1288                 dev_err(ctx->dev, "Module list is empty\n");
1289                 return -EIO;
1290         }
1291
1292         list_for_each_entry(module, &ctx->uuid_list, list) {
1293                 if (uuid_le_cmp(*uuid_mod, module->uuid) == 0) {
1294                         mconfig->id.module_id = module->id;
1295                         if (mconfig->module)
1296                                 mconfig->module->loadable = module->is_loadable;
1297                         ret = 0;
1298                         break;
1299                 }
1300         }
1301
1302         if (ret)
1303                 return ret;
1304
1305         uuid_mod = &module->uuid;
1306         ret = -EIO;
1307         for (i = 0; i < skl->nr_modules; i++) {
1308                 skl_module = skl->modules[i];
1309                 uuid_tplg = &skl_module->uuid;
1310                 if (!uuid_le_cmp(*uuid_mod, *uuid_tplg)) {
1311                         mconfig->module = skl_module;
1312                         ret = 0;
1313                         break;
1314                 }
1315         }
1316         if (skl->nr_modules && ret)
1317                 return ret;
1318
1319         list_for_each_entry(module, &ctx->uuid_list, list) {
1320                 for (i = 0; i < MAX_IN_QUEUE; i++) {
1321                         pin_id = &mconfig->m_in_pin[i].id;
1322                         if (!uuid_le_cmp(pin_id->mod_uuid, module->uuid))
1323                                 pin_id->module_id = module->id;
1324                 }
1325
1326                 for (i = 0; i < MAX_OUT_QUEUE; i++) {
1327                         pin_id = &mconfig->m_out_pin[i].id;
1328                         if (!uuid_le_cmp(pin_id->mod_uuid, module->uuid))
1329                                 pin_id->module_id = module->id;
1330                 }
1331         }
1332
1333         return 0;
1334 }
1335
1336 static int skl_populate_modules(struct skl *skl)
1337 {
1338         struct skl_pipeline *p;
1339         struct skl_pipe_module *m;
1340         struct snd_soc_dapm_widget *w;
1341         struct skl_module_cfg *mconfig;
1342         int ret = 0;
1343
1344         list_for_each_entry(p, &skl->ppl_list, node) {
1345                 list_for_each_entry(m, &p->pipe->w_list, node) {
1346                         w = m->w;
1347                         mconfig = w->priv;
1348
1349                         ret = skl_get_module_info(skl, mconfig);
1350                         if (ret < 0) {
1351                                 dev_err(skl->skl_sst->dev,
1352                                         "query module info failed\n");
1353                                 return ret;
1354                         }
1355
1356                         skl_tplg_add_moduleid_in_bind_params(skl, w);
1357                 }
1358         }
1359
1360         return ret;
1361 }
1362
1363 static int skl_platform_soc_probe(struct snd_soc_component *component)
1364 {
1365         struct hdac_bus *bus = dev_get_drvdata(component->dev);
1366         struct skl *skl = bus_to_skl(bus);
1367         const struct skl_dsp_ops *ops;
1368         int ret;
1369
1370         pm_runtime_get_sync(component->dev);
1371         if (bus->ppcap) {
1372                 skl->component = component;
1373
1374                 /* init debugfs */
1375                 skl->debugfs = skl_debugfs_init(skl);
1376
1377                 ret = skl_tplg_init(component, bus);
1378                 if (ret < 0) {
1379                         dev_err(component->dev, "Failed to init topology!\n");
1380                         return ret;
1381                 }
1382
1383                 /* load the firmwares, since all is set */
1384                 ops = skl_get_dsp_ops(skl->pci->device);
1385                 if (!ops)
1386                         return -EIO;
1387
1388                 if (skl->skl_sst->is_first_boot == false) {
1389                         dev_err(component->dev, "DSP reports first boot done!!!\n");
1390                         return -EIO;
1391                 }
1392
1393                 /*
1394                  * Disable dynamic clock and power gating during firmware
1395                  * and library download
1396                  */
1397                 skl->skl_sst->enable_miscbdcge(component->dev, false);
1398                 skl->skl_sst->clock_power_gating(component->dev, false);
1399
1400                 ret = ops->init_fw(component->dev, skl->skl_sst);
1401                 skl->skl_sst->enable_miscbdcge(component->dev, true);
1402                 skl->skl_sst->clock_power_gating(component->dev, true);
1403                 if (ret < 0) {
1404                         dev_err(component->dev, "Failed to boot first fw: %d\n", ret);
1405                         return ret;
1406                 }
1407                 skl_populate_modules(skl);
1408                 skl->skl_sst->update_d0i3c = skl_update_d0i3c;
1409                 skl_dsp_enable_notification(skl->skl_sst, false);
1410
1411                 if (skl->cfg.astate_cfg != NULL) {
1412                         skl_dsp_set_astate_cfg(skl->skl_sst,
1413                                         skl->cfg.astate_cfg->count,
1414                                         skl->cfg.astate_cfg);
1415                 }
1416         }
1417         pm_runtime_mark_last_busy(component->dev);
1418         pm_runtime_put_autosuspend(component->dev);
1419
1420         return 0;
1421 }
1422
1423 static const struct snd_soc_component_driver skl_component  = {
1424         .name           = "pcm",
1425         .probe          = skl_platform_soc_probe,
1426         .ops            = &skl_platform_ops,
1427         .pcm_new        = skl_pcm_new,
1428         .pcm_free       = skl_pcm_free,
1429 };
1430
1431 int skl_platform_register(struct device *dev)
1432 {
1433         int ret;
1434         struct snd_soc_dai_driver *dais;
1435         int num_dais = ARRAY_SIZE(skl_platform_dai);
1436         struct hdac_bus *bus = dev_get_drvdata(dev);
1437         struct skl *skl = bus_to_skl(bus);
1438
1439         INIT_LIST_HEAD(&skl->ppl_list);
1440         INIT_LIST_HEAD(&skl->bind_list);
1441
1442         skl->dais = kmemdup(skl_platform_dai, sizeof(skl_platform_dai),
1443                             GFP_KERNEL);
1444         if (!skl->dais) {
1445                 ret = -ENOMEM;
1446                 goto err;
1447         }
1448
1449         if (!skl->use_tplg_pcm) {
1450                 dais = krealloc(skl->dais, sizeof(skl_fe_dai) +
1451                                 sizeof(skl_platform_dai), GFP_KERNEL);
1452                 if (!dais) {
1453                         ret = -ENOMEM;
1454                         goto err;
1455                 }
1456
1457                 skl->dais = dais;
1458                 memcpy(&skl->dais[ARRAY_SIZE(skl_platform_dai)], skl_fe_dai,
1459                        sizeof(skl_fe_dai));
1460                 num_dais += ARRAY_SIZE(skl_fe_dai);
1461         }
1462
1463         ret = devm_snd_soc_register_component(dev, &skl_component,
1464                                          skl->dais, num_dais);
1465         if (ret)
1466                 dev_err(dev, "soc component registration failed %d\n", ret);
1467 err:
1468         return ret;
1469 }
1470
1471 int skl_platform_unregister(struct device *dev)
1472 {
1473         struct hdac_bus *bus = dev_get_drvdata(dev);
1474         struct skl *skl = bus_to_skl(bus);
1475         struct skl_module_deferred_bind *modules, *tmp;
1476
1477         if (!list_empty(&skl->bind_list)) {
1478                 list_for_each_entry_safe(modules, tmp, &skl->bind_list, node) {
1479                         list_del(&modules->node);
1480                         kfree(modules);
1481                 }
1482         }
1483
1484         kfree(skl->dais);
1485
1486         return 0;
1487 }