2 * skl-message.c - HDA DSP interface for FW registration, Pipe and Module
5 * Copyright (C) 2015 Intel Corp
6 * Author:Rafal Redzimski <rafal.f.redzimski@intel.com>
7 * Jeeja KP <jeeja.kp@intel.com>
8 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as version 2, as
12 * published by the Free Software Foundation.
14 * This program is distributed in the hope that it will be useful, but
15 * WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 * General Public License for more details.
20 #include <linux/slab.h>
21 #include <linux/pci.h>
22 #include <sound/core.h>
23 #include <sound/pcm.h>
24 #include "skl-sst-dsp.h"
25 #include "cnl-sst-dsp.h"
26 #include "skl-sst-ipc.h"
28 #include "../common/sst-dsp.h"
29 #include "../common/sst-dsp-priv.h"
30 #include "skl-topology.h"
31 #include "skl-tplg-interface.h"
33 static int skl_alloc_dma_buf(struct device *dev,
34 struct snd_dma_buffer *dmab, size_t size)
36 struct hdac_ext_bus *ebus = dev_get_drvdata(dev);
37 struct hdac_bus *bus = ebus_to_hbus(ebus);
42 return bus->io_ops->dma_alloc_pages(bus, SNDRV_DMA_TYPE_DEV, size, dmab);
45 static int skl_free_dma_buf(struct device *dev, struct snd_dma_buffer *dmab)
47 struct hdac_ext_bus *ebus = dev_get_drvdata(dev);
48 struct hdac_bus *bus = ebus_to_hbus(ebus);
53 bus->io_ops->dma_free_pages(bus, dmab);
58 #define NOTIFICATION_PARAM_ID 3
59 #define NOTIFICATION_MASK 0xf
61 /* disable notfication for underruns/overruns from firmware module */
62 void skl_dsp_enable_notification(struct skl_sst *ctx, bool enable)
64 struct notification_mask mask;
65 struct skl_ipc_large_config_msg msg = {0};
67 mask.notify = NOTIFICATION_MASK;
70 msg.large_param_id = NOTIFICATION_PARAM_ID;
71 msg.param_data_size = sizeof(mask);
73 skl_ipc_set_large_config(&ctx->ipc, &msg, (u32 *)&mask);
76 static int skl_dsp_setup_spib(struct device *dev, unsigned int size,
77 int stream_tag, int enable)
79 struct hdac_ext_bus *ebus = dev_get_drvdata(dev);
80 struct hdac_bus *bus = ebus_to_hbus(ebus);
81 struct hdac_stream *stream = snd_hdac_get_stream(bus,
82 SNDRV_PCM_STREAM_PLAYBACK, stream_tag);
83 struct hdac_ext_stream *estream;
88 estream = stream_to_hdac_ext_stream(stream);
89 /* enable/disable SPIB for this hdac stream */
90 snd_hdac_ext_stream_spbcap_enable(ebus, enable, stream->index);
92 /* set the spib value */
93 snd_hdac_ext_stream_set_spib(ebus, estream, size);
98 static int skl_dsp_prepare(struct device *dev, unsigned int format,
99 unsigned int size, struct snd_dma_buffer *dmab)
101 struct hdac_ext_bus *ebus = dev_get_drvdata(dev);
102 struct hdac_bus *bus = ebus_to_hbus(ebus);
103 struct hdac_ext_stream *estream;
104 struct hdac_stream *stream;
105 struct snd_pcm_substream substream;
111 memset(&substream, 0, sizeof(substream));
112 substream.stream = SNDRV_PCM_STREAM_PLAYBACK;
114 estream = snd_hdac_ext_stream_assign(ebus, &substream,
115 HDAC_EXT_STREAM_TYPE_HOST);
119 stream = hdac_stream(estream);
121 /* assign decouple host dma channel */
122 ret = snd_hdac_dsp_prepare(stream, format, size, dmab);
126 skl_dsp_setup_spib(dev, size, stream->stream_tag, true);
128 return stream->stream_tag;
131 static int skl_dsp_trigger(struct device *dev, bool start, int stream_tag)
133 struct hdac_ext_bus *ebus = dev_get_drvdata(dev);
134 struct hdac_stream *stream;
135 struct hdac_bus *bus = ebus_to_hbus(ebus);
140 stream = snd_hdac_get_stream(bus,
141 SNDRV_PCM_STREAM_PLAYBACK, stream_tag);
145 snd_hdac_dsp_trigger(stream, start);
150 static int skl_dsp_cleanup(struct device *dev,
151 struct snd_dma_buffer *dmab, int stream_tag)
153 struct hdac_ext_bus *ebus = dev_get_drvdata(dev);
154 struct hdac_stream *stream;
155 struct hdac_ext_stream *estream;
156 struct hdac_bus *bus = ebus_to_hbus(ebus);
161 stream = snd_hdac_get_stream(bus,
162 SNDRV_PCM_STREAM_PLAYBACK, stream_tag);
166 estream = stream_to_hdac_ext_stream(stream);
167 skl_dsp_setup_spib(dev, 0, stream_tag, false);
168 snd_hdac_ext_stream_release(estream, HDAC_EXT_STREAM_TYPE_HOST);
170 snd_hdac_dsp_cleanup(stream, dmab);
175 static struct skl_dsp_loader_ops skl_get_loader_ops(void)
177 struct skl_dsp_loader_ops loader_ops;
179 memset(&loader_ops, 0, sizeof(struct skl_dsp_loader_ops));
181 loader_ops.alloc_dma_buf = skl_alloc_dma_buf;
182 loader_ops.free_dma_buf = skl_free_dma_buf;
187 static struct skl_dsp_loader_ops bxt_get_loader_ops(void)
189 struct skl_dsp_loader_ops loader_ops;
191 memset(&loader_ops, 0, sizeof(loader_ops));
193 loader_ops.alloc_dma_buf = skl_alloc_dma_buf;
194 loader_ops.free_dma_buf = skl_free_dma_buf;
195 loader_ops.prepare = skl_dsp_prepare;
196 loader_ops.trigger = skl_dsp_trigger;
197 loader_ops.cleanup = skl_dsp_cleanup;
202 static const struct skl_dsp_ops dsp_ops[] = {
206 .loader_ops = skl_get_loader_ops,
207 .init = skl_sst_dsp_init,
208 .init_fw = skl_sst_init_fw,
209 .cleanup = skl_sst_dsp_cleanup
214 .loader_ops = skl_get_loader_ops,
215 .init = kbl_sst_dsp_init,
216 .init_fw = skl_sst_init_fw,
217 .cleanup = skl_sst_dsp_cleanup
222 .loader_ops = bxt_get_loader_ops,
223 .init = bxt_sst_dsp_init,
224 .init_fw = bxt_sst_init_fw,
225 .cleanup = bxt_sst_dsp_cleanup
230 .loader_ops = bxt_get_loader_ops,
231 .init = bxt_sst_dsp_init,
232 .init_fw = bxt_sst_init_fw,
233 .cleanup = bxt_sst_dsp_cleanup
238 .loader_ops = bxt_get_loader_ops,
239 .init = cnl_sst_dsp_init,
240 .init_fw = cnl_sst_init_fw,
241 .cleanup = cnl_sst_dsp_cleanup
245 const struct skl_dsp_ops *skl_get_dsp_ops(int pci_id)
249 for (i = 0; i < ARRAY_SIZE(dsp_ops); i++) {
250 if (dsp_ops[i].id == pci_id)
257 int skl_init_dsp(struct skl *skl)
259 void __iomem *mmio_base;
260 struct hdac_ext_bus *ebus = &skl->ebus;
261 struct hdac_bus *bus = ebus_to_hbus(ebus);
262 struct skl_dsp_loader_ops loader_ops;
264 const struct skl_dsp_ops *ops;
265 struct skl_dsp_cores *cores;
268 /* enable ppcap interrupt */
269 snd_hdac_ext_bus_ppcap_enable(&skl->ebus, true);
270 snd_hdac_ext_bus_ppcap_int_enable(&skl->ebus, true);
272 /* read the BAR of the ADSP MMIO */
273 mmio_base = pci_ioremap_bar(skl->pci, 4);
274 if (mmio_base == NULL) {
275 dev_err(bus->dev, "ioremap error\n");
279 ops = skl_get_dsp_ops(skl->pci->device);
285 loader_ops = ops->loader_ops();
286 ret = ops->init(bus->dev, mmio_base, irq,
287 skl->fw_name, loader_ops,
293 skl->skl_sst->dsp_ops = ops;
294 cores = &skl->skl_sst->cores;
295 cores->count = ops->num_cores;
297 cores->state = kcalloc(cores->count, sizeof(*cores->state), GFP_KERNEL);
303 cores->usage_count = kcalloc(cores->count, sizeof(*cores->usage_count),
305 if (!cores->usage_count) {
307 goto free_core_state;
310 dev_dbg(bus->dev, "dsp registration status=%d\n", ret);
323 int skl_free_dsp(struct skl *skl)
325 struct hdac_ext_bus *ebus = &skl->ebus;
326 struct hdac_bus *bus = ebus_to_hbus(ebus);
327 struct skl_sst *ctx = skl->skl_sst;
329 /* disable ppcap interrupt */
330 snd_hdac_ext_bus_ppcap_int_enable(&skl->ebus, false);
332 ctx->dsp_ops->cleanup(bus->dev, ctx);
334 kfree(ctx->cores.state);
335 kfree(ctx->cores.usage_count);
337 if (ctx->dsp->addr.lpe)
338 iounmap(ctx->dsp->addr.lpe);
344 * In the case of "suspend_active" i.e, the Audio IP being active
345 * during system suspend, immediately excecute any pending D0i3 work
346 * before suspending. This is needed for the IP to work in low power
347 * mode during system suspend. In the case of normal suspend, cancel
348 * any pending D0i3 work.
350 int skl_suspend_late_dsp(struct skl *skl)
352 struct skl_sst *ctx = skl->skl_sst;
353 struct delayed_work *dwork;
358 dwork = &ctx->d0i3.work;
360 if (dwork->work.func) {
361 if (skl->supend_active)
362 flush_delayed_work(dwork);
364 cancel_delayed_work_sync(dwork);
370 int skl_suspend_dsp(struct skl *skl)
372 struct skl_sst *ctx = skl->skl_sst;
375 /* if ppcap is not supported return 0 */
376 if (!skl->ebus.bus.ppcap)
379 ret = skl_dsp_sleep(ctx->dsp);
383 /* disable ppcap interrupt */
384 snd_hdac_ext_bus_ppcap_int_enable(&skl->ebus, false);
385 snd_hdac_ext_bus_ppcap_enable(&skl->ebus, false);
390 int skl_resume_dsp(struct skl *skl)
392 struct skl_sst *ctx = skl->skl_sst;
395 /* if ppcap is not supported return 0 */
396 if (!skl->ebus.bus.ppcap)
399 /* enable ppcap interrupt */
400 snd_hdac_ext_bus_ppcap_enable(&skl->ebus, true);
401 snd_hdac_ext_bus_ppcap_int_enable(&skl->ebus, true);
403 /* check if DSP 1st boot is done */
404 if (skl->skl_sst->is_first_boot == true)
407 /* disable dynamic clock gating during fw and lib download */
408 ctx->enable_miscbdcge(ctx->dev, false);
410 ret = skl_dsp_wake(ctx->dsp);
411 ctx->enable_miscbdcge(ctx->dev, true);
415 skl_dsp_enable_notification(skl->skl_sst, false);
419 enum skl_bitdepth skl_get_bit_depth(int params)
423 return SKL_DEPTH_8BIT;
426 return SKL_DEPTH_16BIT;
429 return SKL_DEPTH_24BIT;
432 return SKL_DEPTH_32BIT;
435 return SKL_DEPTH_INVALID;
441 * Each module in DSP expects a base module configuration, which consists of
442 * PCM format information, which we calculate in driver and resource values
443 * which are read from widget information passed through topology binary
444 * This is send when we create a module with INIT_INSTANCE IPC msg
446 static void skl_set_base_module_format(struct skl_sst *ctx,
447 struct skl_module_cfg *mconfig,
448 struct skl_base_cfg *base_cfg)
450 struct skl_module *module = mconfig->module;
451 struct skl_module_res *res = &module->resources[mconfig->res_idx];
452 struct skl_module_iface *fmt = &module->formats[mconfig->fmt_idx];
453 struct skl_module_fmt *format = &fmt->inputs[0].fmt;
455 base_cfg->audio_fmt.number_of_channels = format->channels;
457 base_cfg->audio_fmt.s_freq = format->s_freq;
458 base_cfg->audio_fmt.bit_depth = format->bit_depth;
459 base_cfg->audio_fmt.valid_bit_depth = format->valid_bit_depth;
460 base_cfg->audio_fmt.ch_cfg = format->ch_cfg;
462 dev_dbg(ctx->dev, "bit_depth=%x valid_bd=%x ch_config=%x\n",
463 format->bit_depth, format->valid_bit_depth,
466 base_cfg->audio_fmt.channel_map = format->ch_map;
468 base_cfg->audio_fmt.interleaving = format->interleaving_style;
470 base_cfg->cps = res->cps;
471 base_cfg->ibs = res->ibs;
472 base_cfg->obs = res->obs;
473 base_cfg->is_pages = res->is_pages;
477 * Copies copier capabilities into copier module and updates copier module
480 static void skl_copy_copier_caps(struct skl_module_cfg *mconfig,
481 struct skl_cpr_cfg *cpr_mconfig)
483 if (mconfig->formats_config.caps_size == 0)
486 memcpy(cpr_mconfig->gtw_cfg.config_data,
487 mconfig->formats_config.caps,
488 mconfig->formats_config.caps_size);
490 cpr_mconfig->gtw_cfg.config_length =
491 (mconfig->formats_config.caps_size) / 4;
494 #define SKL_NON_GATEWAY_CPR_NODE_ID 0xFFFFFFFF
496 * Calculate the gatewat settings required for copier module, type of
497 * gateway and index of gateway to use
499 static u32 skl_get_node_id(struct skl_sst *ctx,
500 struct skl_module_cfg *mconfig)
502 union skl_connector_node_id node_id = {0};
503 union skl_ssp_dma_node ssp_node = {0};
504 struct skl_pipe_params *params = mconfig->pipe->p_params;
506 switch (mconfig->dev_type) {
508 node_id.node.dma_type =
509 (SKL_CONN_SOURCE == mconfig->hw_conn_type) ?
510 SKL_DMA_I2S_LINK_OUTPUT_CLASS :
511 SKL_DMA_I2S_LINK_INPUT_CLASS;
512 node_id.node.vindex = params->host_dma_id +
513 (mconfig->vbus_id << 3);
517 node_id.node.dma_type =
518 (SKL_CONN_SOURCE == mconfig->hw_conn_type) ?
519 SKL_DMA_I2S_LINK_OUTPUT_CLASS :
520 SKL_DMA_I2S_LINK_INPUT_CLASS;
521 ssp_node.dma_node.time_slot_index = mconfig->time_slot;
522 ssp_node.dma_node.i2s_instance = mconfig->vbus_id;
523 node_id.node.vindex = ssp_node.val;
526 case SKL_DEVICE_DMIC:
527 node_id.node.dma_type = SKL_DMA_DMIC_LINK_INPUT_CLASS;
528 node_id.node.vindex = mconfig->vbus_id +
529 (mconfig->time_slot);
532 case SKL_DEVICE_HDALINK:
533 node_id.node.dma_type =
534 (SKL_CONN_SOURCE == mconfig->hw_conn_type) ?
535 SKL_DMA_HDA_LINK_OUTPUT_CLASS :
536 SKL_DMA_HDA_LINK_INPUT_CLASS;
537 node_id.node.vindex = params->link_dma_id;
540 case SKL_DEVICE_HDAHOST:
541 node_id.node.dma_type =
542 (SKL_CONN_SOURCE == mconfig->hw_conn_type) ?
543 SKL_DMA_HDA_HOST_OUTPUT_CLASS :
544 SKL_DMA_HDA_HOST_INPUT_CLASS;
545 node_id.node.vindex = params->host_dma_id;
549 node_id.val = 0xFFFFFFFF;
556 static void skl_setup_cpr_gateway_cfg(struct skl_sst *ctx,
557 struct skl_module_cfg *mconfig,
558 struct skl_cpr_cfg *cpr_mconfig)
561 struct skl_module_res *res;
562 int res_idx = mconfig->res_idx;
563 struct skl *skl = get_skl_ctx(ctx->dev);
565 cpr_mconfig->gtw_cfg.node_id = skl_get_node_id(ctx, mconfig);
567 if (cpr_mconfig->gtw_cfg.node_id == SKL_NON_GATEWAY_CPR_NODE_ID) {
568 cpr_mconfig->cpr_feature_mask = 0;
572 if (skl->nr_modules) {
573 res = &mconfig->module->resources[mconfig->res_idx];
574 cpr_mconfig->gtw_cfg.dma_buffer_size = res->dma_buffer_size;
575 goto skip_buf_size_calc;
577 res = &mconfig->module->resources[res_idx];
580 switch (mconfig->hw_conn_type) {
581 case SKL_CONN_SOURCE:
582 if (mconfig->dev_type == SKL_DEVICE_HDAHOST)
583 dma_io_buf = res->ibs;
585 dma_io_buf = res->obs;
589 if (mconfig->dev_type == SKL_DEVICE_HDAHOST)
590 dma_io_buf = res->obs;
592 dma_io_buf = res->ibs;
596 dev_warn(ctx->dev, "wrong connection type: %d\n",
597 mconfig->hw_conn_type);
601 cpr_mconfig->gtw_cfg.dma_buffer_size =
602 mconfig->dma_buffer_size * dma_io_buf;
604 /* fallback to 2ms default value */
605 if (!cpr_mconfig->gtw_cfg.dma_buffer_size) {
606 if (mconfig->hw_conn_type == SKL_CONN_SOURCE)
607 cpr_mconfig->gtw_cfg.dma_buffer_size = 2 * res->obs;
609 cpr_mconfig->gtw_cfg.dma_buffer_size = 2 * res->ibs;
613 cpr_mconfig->cpr_feature_mask = 0;
614 cpr_mconfig->gtw_cfg.config_length = 0;
616 skl_copy_copier_caps(mconfig, cpr_mconfig);
619 #define DMA_CONTROL_ID 5
621 int skl_dsp_set_dma_control(struct skl_sst *ctx, struct skl_module_cfg *mconfig)
623 struct skl_dma_control *dma_ctrl;
624 struct skl_ipc_large_config_msg msg = {0};
629 * if blob size zero, then return
631 if (mconfig->formats_config.caps_size == 0)
634 msg.large_param_id = DMA_CONTROL_ID;
635 msg.param_data_size = sizeof(struct skl_dma_control) +
636 mconfig->formats_config.caps_size;
638 dma_ctrl = kzalloc(msg.param_data_size, GFP_KERNEL);
639 if (dma_ctrl == NULL)
642 dma_ctrl->node_id = skl_get_node_id(ctx, mconfig);
645 dma_ctrl->config_length = mconfig->formats_config.caps_size / 4;
647 memcpy(dma_ctrl->config_data, mconfig->formats_config.caps,
648 mconfig->formats_config.caps_size);
650 err = skl_ipc_set_large_config(&ctx->ipc, &msg, (u32 *)dma_ctrl);
656 static void skl_setup_out_format(struct skl_sst *ctx,
657 struct skl_module_cfg *mconfig,
658 struct skl_audio_data_format *out_fmt)
660 struct skl_module *module = mconfig->module;
661 struct skl_module_iface *fmt = &module->formats[mconfig->fmt_idx];
662 struct skl_module_fmt *format = &fmt->outputs[0].fmt;
664 out_fmt->number_of_channels = (u8)format->channels;
665 out_fmt->s_freq = format->s_freq;
666 out_fmt->bit_depth = format->bit_depth;
667 out_fmt->valid_bit_depth = format->valid_bit_depth;
668 out_fmt->ch_cfg = format->ch_cfg;
670 out_fmt->channel_map = format->ch_map;
671 out_fmt->interleaving = format->interleaving_style;
672 out_fmt->sample_type = format->sample_type;
674 dev_dbg(ctx->dev, "copier out format chan=%d fre=%d bitdepth=%d\n",
675 out_fmt->number_of_channels, format->s_freq, format->bit_depth);
679 * DSP needs SRC module for frequency conversion, SRC takes base module
680 * configuration and the target frequency as extra parameter passed as src
683 static void skl_set_src_format(struct skl_sst *ctx,
684 struct skl_module_cfg *mconfig,
685 struct skl_src_module_cfg *src_mconfig)
687 struct skl_module *module = mconfig->module;
688 struct skl_module_iface *iface = &module->formats[mconfig->fmt_idx];
689 struct skl_module_fmt *fmt = &iface->outputs[0].fmt;
691 skl_set_base_module_format(ctx, mconfig,
692 (struct skl_base_cfg *)src_mconfig);
694 src_mconfig->src_cfg = fmt->s_freq;
698 * DSP needs updown module to do channel conversion. updown module take base
699 * module configuration and channel configuration
700 * It also take coefficients and now we have defaults applied here
702 static void skl_set_updown_mixer_format(struct skl_sst *ctx,
703 struct skl_module_cfg *mconfig,
704 struct skl_up_down_mixer_cfg *mixer_mconfig)
706 struct skl_module *module = mconfig->module;
707 struct skl_module_iface *iface = &module->formats[mconfig->fmt_idx];
708 struct skl_module_fmt *fmt = &iface->outputs[0].fmt;
711 skl_set_base_module_format(ctx, mconfig,
712 (struct skl_base_cfg *)mixer_mconfig);
713 mixer_mconfig->out_ch_cfg = fmt->ch_cfg;
715 /* Select F/W default coefficient */
716 mixer_mconfig->coeff_sel = 0x0;
718 /* User coeff, don't care since we are selecting F/W defaults */
719 for (i = 0; i < UP_DOWN_MIXER_MAX_COEFF; i++)
720 mixer_mconfig->coeff[i] = 0xDEADBEEF;
724 * 'copier' is DSP internal module which copies data from Host DMA (HDA host
725 * dma) or link (hda link, SSP, PDM)
726 * Here we calculate the copier module parameters, like PCM format, output
727 * format, gateway settings
728 * copier_module_config is sent as input buffer with INIT_INSTANCE IPC msg
730 static void skl_set_copier_format(struct skl_sst *ctx,
731 struct skl_module_cfg *mconfig,
732 struct skl_cpr_cfg *cpr_mconfig)
734 struct skl_audio_data_format *out_fmt = &cpr_mconfig->out_fmt;
735 struct skl_base_cfg *base_cfg = (struct skl_base_cfg *)cpr_mconfig;
737 skl_set_base_module_format(ctx, mconfig, base_cfg);
739 skl_setup_out_format(ctx, mconfig, out_fmt);
740 skl_setup_cpr_gateway_cfg(ctx, mconfig, cpr_mconfig);
744 * Algo module are DSP pre processing modules. Algo module take base module
745 * configuration and params
748 static void skl_set_algo_format(struct skl_sst *ctx,
749 struct skl_module_cfg *mconfig,
750 struct skl_algo_cfg *algo_mcfg)
752 struct skl_base_cfg *base_cfg = (struct skl_base_cfg *)algo_mcfg;
754 skl_set_base_module_format(ctx, mconfig, base_cfg);
756 if (mconfig->formats_config.caps_size == 0)
759 memcpy(algo_mcfg->params,
760 mconfig->formats_config.caps,
761 mconfig->formats_config.caps_size);
766 * Mic select module allows selecting one or many input channels, thus
769 * Mic select module take base module configuration and out-format
772 static void skl_set_base_outfmt_format(struct skl_sst *ctx,
773 struct skl_module_cfg *mconfig,
774 struct skl_base_outfmt_cfg *base_outfmt_mcfg)
776 struct skl_audio_data_format *out_fmt = &base_outfmt_mcfg->out_fmt;
777 struct skl_base_cfg *base_cfg =
778 (struct skl_base_cfg *)base_outfmt_mcfg;
780 skl_set_base_module_format(ctx, mconfig, base_cfg);
781 skl_setup_out_format(ctx, mconfig, out_fmt);
784 static u16 skl_get_module_param_size(struct skl_sst *ctx,
785 struct skl_module_cfg *mconfig)
789 switch (mconfig->m_type) {
790 case SKL_MODULE_TYPE_COPIER:
791 param_size = sizeof(struct skl_cpr_cfg);
792 param_size += mconfig->formats_config.caps_size;
795 case SKL_MODULE_TYPE_SRCINT:
796 return sizeof(struct skl_src_module_cfg);
798 case SKL_MODULE_TYPE_UPDWMIX:
799 return sizeof(struct skl_up_down_mixer_cfg);
801 case SKL_MODULE_TYPE_ALGO:
802 param_size = sizeof(struct skl_base_cfg);
803 param_size += mconfig->formats_config.caps_size;
806 case SKL_MODULE_TYPE_BASE_OUTFMT:
807 case SKL_MODULE_TYPE_MIC_SELECT:
808 case SKL_MODULE_TYPE_KPB:
809 return sizeof(struct skl_base_outfmt_cfg);
813 * return only base cfg when no specific module type is
816 return sizeof(struct skl_base_cfg);
823 * DSP firmware supports various modules like copier, SRC, updown etc.
824 * These modules required various parameters to be calculated and sent for
825 * the module initialization to DSP. By default a generic module needs only
826 * base module format configuration
829 static int skl_set_module_format(struct skl_sst *ctx,
830 struct skl_module_cfg *module_config,
831 u16 *module_config_size,
836 param_size = skl_get_module_param_size(ctx, module_config);
838 *param_data = kzalloc(param_size, GFP_KERNEL);
839 if (NULL == *param_data)
842 *module_config_size = param_size;
844 switch (module_config->m_type) {
845 case SKL_MODULE_TYPE_COPIER:
846 skl_set_copier_format(ctx, module_config, *param_data);
849 case SKL_MODULE_TYPE_SRCINT:
850 skl_set_src_format(ctx, module_config, *param_data);
853 case SKL_MODULE_TYPE_UPDWMIX:
854 skl_set_updown_mixer_format(ctx, module_config, *param_data);
857 case SKL_MODULE_TYPE_ALGO:
858 skl_set_algo_format(ctx, module_config, *param_data);
861 case SKL_MODULE_TYPE_BASE_OUTFMT:
862 case SKL_MODULE_TYPE_MIC_SELECT:
863 case SKL_MODULE_TYPE_KPB:
864 skl_set_base_outfmt_format(ctx, module_config, *param_data);
868 skl_set_base_module_format(ctx, module_config, *param_data);
873 dev_dbg(ctx->dev, "Module type=%d config size: %d bytes\n",
874 module_config->id.module_id, param_size);
875 print_hex_dump_debug("Module params:", DUMP_PREFIX_OFFSET, 8, 4,
876 *param_data, param_size, false);
880 static int skl_get_queue_index(struct skl_module_pin *mpin,
881 struct skl_module_inst_id id, int max)
885 for (i = 0; i < max; i++) {
886 if (mpin[i].id.module_id == id.module_id &&
887 mpin[i].id.instance_id == id.instance_id)
895 * Allocates queue for each module.
896 * if dynamic, the pin_index is allocated 0 to max_pin.
897 * In static, the pin_index is fixed based on module_id and instance id
899 static int skl_alloc_queue(struct skl_module_pin *mpin,
900 struct skl_module_cfg *tgt_cfg, int max)
903 struct skl_module_inst_id id = tgt_cfg->id;
905 * if pin in dynamic, find first free pin
906 * otherwise find match module and instance id pin as topology will
907 * ensure a unique pin is assigned to this so no need to
910 for (i = 0; i < max; i++) {
911 if (mpin[i].is_dynamic) {
912 if (!mpin[i].in_use &&
913 mpin[i].pin_state == SKL_PIN_UNBIND) {
915 mpin[i].in_use = true;
916 mpin[i].id.module_id = id.module_id;
917 mpin[i].id.instance_id = id.instance_id;
918 mpin[i].id.pvt_id = id.pvt_id;
919 mpin[i].tgt_mcfg = tgt_cfg;
923 if (mpin[i].id.module_id == id.module_id &&
924 mpin[i].id.instance_id == id.instance_id &&
925 mpin[i].pin_state == SKL_PIN_UNBIND) {
927 mpin[i].tgt_mcfg = tgt_cfg;
936 static void skl_free_queue(struct skl_module_pin *mpin, int q_index)
938 if (mpin[q_index].is_dynamic) {
939 mpin[q_index].in_use = false;
940 mpin[q_index].id.module_id = 0;
941 mpin[q_index].id.instance_id = 0;
942 mpin[q_index].id.pvt_id = 0;
944 mpin[q_index].pin_state = SKL_PIN_UNBIND;
945 mpin[q_index].tgt_mcfg = NULL;
948 /* Module state will be set to unint, if all the out pin state is UNBIND */
950 static void skl_clear_module_state(struct skl_module_pin *mpin, int max,
951 struct skl_module_cfg *mcfg)
956 for (i = 0; i < max; i++) {
957 if (mpin[i].pin_state == SKL_PIN_UNBIND)
964 mcfg->m_state = SKL_MODULE_INIT_DONE;
969 * A module needs to be instanataited in DSP. A mdoule is present in a
970 * collection of module referred as a PIPE.
971 * We first calculate the module format, based on module type and then
972 * invoke the DSP by sending IPC INIT_INSTANCE using ipc helper
974 int skl_init_module(struct skl_sst *ctx,
975 struct skl_module_cfg *mconfig)
977 u16 module_config_size = 0;
978 void *param_data = NULL;
980 struct skl_ipc_init_instance_msg msg;
982 dev_dbg(ctx->dev, "%s: module_id = %d instance=%d\n", __func__,
983 mconfig->id.module_id, mconfig->id.pvt_id);
985 if (mconfig->pipe->state != SKL_PIPE_CREATED) {
986 dev_err(ctx->dev, "Pipe not created state= %d pipe_id= %d\n",
987 mconfig->pipe->state, mconfig->pipe->ppl_id);
991 ret = skl_set_module_format(ctx, mconfig,
992 &module_config_size, ¶m_data);
994 dev_err(ctx->dev, "Failed to set module format ret=%d\n", ret);
998 msg.module_id = mconfig->id.module_id;
999 msg.instance_id = mconfig->id.pvt_id;
1000 msg.ppl_instance_id = mconfig->pipe->ppl_id;
1001 msg.param_data_size = module_config_size;
1002 msg.core_id = mconfig->core_id;
1003 msg.domain = mconfig->domain;
1005 ret = skl_ipc_init_instance(&ctx->ipc, &msg, param_data);
1007 dev_err(ctx->dev, "Failed to init instance ret=%d\n", ret);
1011 mconfig->m_state = SKL_MODULE_INIT_DONE;
1016 static void skl_dump_bind_info(struct skl_sst *ctx, struct skl_module_cfg
1017 *src_module, struct skl_module_cfg *dst_module)
1019 dev_dbg(ctx->dev, "%s: src module_id = %d src_instance=%d\n",
1020 __func__, src_module->id.module_id, src_module->id.pvt_id);
1021 dev_dbg(ctx->dev, "%s: dst_module=%d dst_instance=%d\n", __func__,
1022 dst_module->id.module_id, dst_module->id.pvt_id);
1024 dev_dbg(ctx->dev, "src_module state = %d dst module state = %d\n",
1025 src_module->m_state, dst_module->m_state);
1029 * On module freeup, we need to unbind the module with modules
1030 * it is already bind.
1031 * Find the pin allocated and unbind then using bind_unbind IPC
1033 int skl_unbind_modules(struct skl_sst *ctx,
1034 struct skl_module_cfg *src_mcfg,
1035 struct skl_module_cfg *dst_mcfg)
1038 struct skl_ipc_bind_unbind_msg msg;
1039 struct skl_module_inst_id src_id = src_mcfg->id;
1040 struct skl_module_inst_id dst_id = dst_mcfg->id;
1041 int in_max = dst_mcfg->module->max_input_pins;
1042 int out_max = src_mcfg->module->max_output_pins;
1043 int src_index, dst_index, src_pin_state, dst_pin_state;
1045 skl_dump_bind_info(ctx, src_mcfg, dst_mcfg);
1047 /* get src queue index */
1048 src_index = skl_get_queue_index(src_mcfg->m_out_pin, dst_id, out_max);
1052 msg.src_queue = src_index;
1054 /* get dst queue index */
1055 dst_index = skl_get_queue_index(dst_mcfg->m_in_pin, src_id, in_max);
1059 msg.dst_queue = dst_index;
1061 src_pin_state = src_mcfg->m_out_pin[src_index].pin_state;
1062 dst_pin_state = dst_mcfg->m_in_pin[dst_index].pin_state;
1064 if (src_pin_state != SKL_PIN_BIND_DONE ||
1065 dst_pin_state != SKL_PIN_BIND_DONE)
1068 msg.module_id = src_mcfg->id.module_id;
1069 msg.instance_id = src_mcfg->id.pvt_id;
1070 msg.dst_module_id = dst_mcfg->id.module_id;
1071 msg.dst_instance_id = dst_mcfg->id.pvt_id;
1074 ret = skl_ipc_bind_unbind(&ctx->ipc, &msg);
1076 /* free queue only if unbind is success */
1077 skl_free_queue(src_mcfg->m_out_pin, src_index);
1078 skl_free_queue(dst_mcfg->m_in_pin, dst_index);
1081 * check only if src module bind state, bind is
1082 * always from src -> sink
1084 skl_clear_module_state(src_mcfg->m_out_pin, out_max, src_mcfg);
1090 static void fill_pin_params(struct skl_audio_data_format *pin_fmt,
1091 struct skl_module_fmt *format)
1093 pin_fmt->number_of_channels = format->channels;
1094 pin_fmt->s_freq = format->s_freq;
1095 pin_fmt->bit_depth = format->bit_depth;
1096 pin_fmt->valid_bit_depth = format->valid_bit_depth;
1097 pin_fmt->ch_cfg = format->ch_cfg;
1098 pin_fmt->sample_type = format->sample_type;
1099 pin_fmt->channel_map = format->ch_map;
1100 pin_fmt->interleaving = format->interleaving_style;
1103 #define CPR_SINK_FMT_PARAM_ID 2
1106 * Once a module is instantiated it need to be 'bind' with other modules in
1107 * the pipeline. For binding we need to find the module pins which are bind
1109 * This function finds the pins and then sends bund_unbind IPC message to
1110 * DSP using IPC helper
1112 int skl_bind_modules(struct skl_sst *ctx,
1113 struct skl_module_cfg *src_mcfg,
1114 struct skl_module_cfg *dst_mcfg)
1117 struct skl_ipc_bind_unbind_msg msg;
1118 int in_max = dst_mcfg->module->max_input_pins;
1119 int out_max = src_mcfg->module->max_output_pins;
1120 int src_index, dst_index;
1121 struct skl_module_fmt *format;
1122 struct skl_cpr_pin_fmt pin_fmt;
1123 struct skl_module *module;
1124 struct skl_module_iface *fmt;
1126 skl_dump_bind_info(ctx, src_mcfg, dst_mcfg);
1128 if (src_mcfg->m_state < SKL_MODULE_INIT_DONE ||
1129 dst_mcfg->m_state < SKL_MODULE_INIT_DONE)
1132 src_index = skl_alloc_queue(src_mcfg->m_out_pin, dst_mcfg, out_max);
1136 msg.src_queue = src_index;
1137 dst_index = skl_alloc_queue(dst_mcfg->m_in_pin, src_mcfg, in_max);
1138 if (dst_index < 0) {
1139 skl_free_queue(src_mcfg->m_out_pin, src_index);
1144 * Copier module requires the separate large_config_set_ipc to
1145 * configure the pins other than 0
1147 if (src_mcfg->m_type == SKL_MODULE_TYPE_COPIER && src_index > 0) {
1148 pin_fmt.sink_id = src_index;
1149 module = src_mcfg->module;
1150 fmt = &module->formats[src_mcfg->fmt_idx];
1152 /* Input fmt is same as that of src module input cfg */
1153 format = &fmt->inputs[0].fmt;
1154 fill_pin_params(&(pin_fmt.src_fmt), format);
1156 format = &fmt->outputs[src_index].fmt;
1157 fill_pin_params(&(pin_fmt.dst_fmt), format);
1158 ret = skl_set_module_params(ctx, (void *)&pin_fmt,
1159 sizeof(struct skl_cpr_pin_fmt),
1160 CPR_SINK_FMT_PARAM_ID, src_mcfg);
1166 msg.dst_queue = dst_index;
1168 dev_dbg(ctx->dev, "src queue = %d dst queue =%d\n",
1169 msg.src_queue, msg.dst_queue);
1171 msg.module_id = src_mcfg->id.module_id;
1172 msg.instance_id = src_mcfg->id.pvt_id;
1173 msg.dst_module_id = dst_mcfg->id.module_id;
1174 msg.dst_instance_id = dst_mcfg->id.pvt_id;
1177 ret = skl_ipc_bind_unbind(&ctx->ipc, &msg);
1180 src_mcfg->m_state = SKL_MODULE_BIND_DONE;
1181 src_mcfg->m_out_pin[src_index].pin_state = SKL_PIN_BIND_DONE;
1182 dst_mcfg->m_in_pin[dst_index].pin_state = SKL_PIN_BIND_DONE;
1186 /* error case , if IPC fails, clear the queue index */
1187 skl_free_queue(src_mcfg->m_out_pin, src_index);
1188 skl_free_queue(dst_mcfg->m_in_pin, dst_index);
1193 static int skl_set_pipe_state(struct skl_sst *ctx, struct skl_pipe *pipe,
1194 enum skl_ipc_pipeline_state state)
1196 dev_dbg(ctx->dev, "%s: pipe_satate = %d\n", __func__, state);
1198 return skl_ipc_set_pipeline_state(&ctx->ipc, pipe->ppl_id, state);
1202 * A pipeline is a collection of modules. Before a module in instantiated a
1203 * pipeline needs to be created for it.
1204 * This function creates pipeline, by sending create pipeline IPC messages
1207 int skl_create_pipeline(struct skl_sst *ctx, struct skl_pipe *pipe)
1211 dev_dbg(ctx->dev, "%s: pipe_id = %d\n", __func__, pipe->ppl_id);
1213 ret = skl_ipc_create_pipeline(&ctx->ipc, pipe->memory_pages,
1214 pipe->pipe_priority, pipe->ppl_id,
1217 dev_err(ctx->dev, "Failed to create pipeline\n");
1221 pipe->state = SKL_PIPE_CREATED;
1227 * A pipeline needs to be deleted on cleanup. If a pipeline is running, then
1228 * pause the pipeline first and then delete it
1229 * The pipe delete is done by sending delete pipeline IPC. DSP will stop the
1230 * DMA engines and releases resources
1232 int skl_delete_pipe(struct skl_sst *ctx, struct skl_pipe *pipe)
1236 dev_dbg(ctx->dev, "%s: pipe = %d\n", __func__, pipe->ppl_id);
1238 /* If pipe is started, do stop the pipe in FW. */
1239 if (pipe->state >= SKL_PIPE_STARTED) {
1240 ret = skl_set_pipe_state(ctx, pipe, PPL_PAUSED);
1242 dev_err(ctx->dev, "Failed to stop pipeline\n");
1246 pipe->state = SKL_PIPE_PAUSED;
1249 /* If pipe was not created in FW, do not try to delete it */
1250 if (pipe->state < SKL_PIPE_CREATED)
1253 ret = skl_ipc_delete_pipeline(&ctx->ipc, pipe->ppl_id);
1255 dev_err(ctx->dev, "Failed to delete pipeline\n");
1259 pipe->state = SKL_PIPE_INVALID;
1265 * A pipeline is also a scheduling entity in DSP which can be run, stopped
1266 * For processing data the pipe need to be run by sending IPC set pipe state
1269 int skl_run_pipe(struct skl_sst *ctx, struct skl_pipe *pipe)
1273 dev_dbg(ctx->dev, "%s: pipe = %d\n", __func__, pipe->ppl_id);
1275 /* If pipe was not created in FW, do not try to pause or delete */
1276 if (pipe->state < SKL_PIPE_CREATED)
1279 /* Pipe has to be paused before it is started */
1280 ret = skl_set_pipe_state(ctx, pipe, PPL_PAUSED);
1282 dev_err(ctx->dev, "Failed to pause pipe\n");
1286 pipe->state = SKL_PIPE_PAUSED;
1288 ret = skl_set_pipe_state(ctx, pipe, PPL_RUNNING);
1290 dev_err(ctx->dev, "Failed to start pipe\n");
1294 pipe->state = SKL_PIPE_STARTED;
1300 * Stop the pipeline by sending set pipe state IPC
1301 * DSP doesnt implement stop so we always send pause message
1303 int skl_stop_pipe(struct skl_sst *ctx, struct skl_pipe *pipe)
1307 dev_dbg(ctx->dev, "In %s pipe=%d\n", __func__, pipe->ppl_id);
1309 /* If pipe was not created in FW, do not try to pause or delete */
1310 if (pipe->state < SKL_PIPE_PAUSED)
1313 ret = skl_set_pipe_state(ctx, pipe, PPL_PAUSED);
1315 dev_dbg(ctx->dev, "Failed to stop pipe\n");
1319 pipe->state = SKL_PIPE_PAUSED;
1325 * Reset the pipeline by sending set pipe state IPC this will reset the DMA
1328 int skl_reset_pipe(struct skl_sst *ctx, struct skl_pipe *pipe)
1332 /* If pipe was not created in FW, do not try to pause or delete */
1333 if (pipe->state < SKL_PIPE_PAUSED)
1336 ret = skl_set_pipe_state(ctx, pipe, PPL_RESET);
1338 dev_dbg(ctx->dev, "Failed to reset pipe ret=%d\n", ret);
1342 pipe->state = SKL_PIPE_RESET;
1347 /* Algo parameter set helper function */
1348 int skl_set_module_params(struct skl_sst *ctx, u32 *params, int size,
1349 u32 param_id, struct skl_module_cfg *mcfg)
1351 struct skl_ipc_large_config_msg msg;
1353 msg.module_id = mcfg->id.module_id;
1354 msg.instance_id = mcfg->id.pvt_id;
1355 msg.param_data_size = size;
1356 msg.large_param_id = param_id;
1358 return skl_ipc_set_large_config(&ctx->ipc, &msg, params);
1361 int skl_get_module_params(struct skl_sst *ctx, u32 *params, int size,
1362 u32 param_id, struct skl_module_cfg *mcfg)
1364 struct skl_ipc_large_config_msg msg;
1366 msg.module_id = mcfg->id.module_id;
1367 msg.instance_id = mcfg->id.pvt_id;
1368 msg.param_data_size = size;
1369 msg.large_param_id = param_id;
1371 return skl_ipc_get_large_config(&ctx->ipc, &msg, params);