2 * skl-message.c - HDA DSP interface for FW registration, Pipe and Module
5 * Copyright (C) 2015 Intel Corp
6 * Author:Rafal Redzimski <rafal.f.redzimski@intel.com>
7 * Jeeja KP <jeeja.kp@intel.com>
8 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as version 2, as
12 * published by the Free Software Foundation.
14 * This program is distributed in the hope that it will be useful, but
15 * WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 * General Public License for more details.
20 #include <linux/slab.h>
21 #include <linux/pci.h>
22 #include <sound/core.h>
23 #include <sound/pcm.h>
24 #include <uapi/sound/skl-tplg-interface.h>
25 #include "skl-sst-dsp.h"
26 #include "cnl-sst-dsp.h"
27 #include "skl-sst-ipc.h"
29 #include "../common/sst-dsp.h"
30 #include "../common/sst-dsp-priv.h"
31 #include "skl-topology.h"
33 static int skl_alloc_dma_buf(struct device *dev,
34 struct snd_dma_buffer *dmab, size_t size)
36 struct hdac_bus *bus = dev_get_drvdata(dev);
41 return bus->io_ops->dma_alloc_pages(bus, SNDRV_DMA_TYPE_DEV, size, dmab);
44 static int skl_free_dma_buf(struct device *dev, struct snd_dma_buffer *dmab)
46 struct hdac_bus *bus = dev_get_drvdata(dev);
51 bus->io_ops->dma_free_pages(bus, dmab);
56 #define SKL_ASTATE_PARAM_ID 4
58 void skl_dsp_set_astate_cfg(struct skl_sst *ctx, u32 cnt, void *data)
60 struct skl_ipc_large_config_msg msg = {0};
62 msg.large_param_id = SKL_ASTATE_PARAM_ID;
63 msg.param_data_size = (cnt * sizeof(struct skl_astate_param) +
66 skl_ipc_set_large_config(&ctx->ipc, &msg, data);
69 #define NOTIFICATION_PARAM_ID 3
70 #define NOTIFICATION_MASK 0xf
72 /* disable notfication for underruns/overruns from firmware module */
73 void skl_dsp_enable_notification(struct skl_sst *ctx, bool enable)
75 struct notification_mask mask;
76 struct skl_ipc_large_config_msg msg = {0};
78 mask.notify = NOTIFICATION_MASK;
81 msg.large_param_id = NOTIFICATION_PARAM_ID;
82 msg.param_data_size = sizeof(mask);
84 skl_ipc_set_large_config(&ctx->ipc, &msg, (u32 *)&mask);
87 static int skl_dsp_setup_spib(struct device *dev, unsigned int size,
88 int stream_tag, int enable)
90 struct hdac_bus *bus = dev_get_drvdata(dev);
91 struct hdac_stream *stream = snd_hdac_get_stream(bus,
92 SNDRV_PCM_STREAM_PLAYBACK, stream_tag);
93 struct hdac_ext_stream *estream;
98 estream = stream_to_hdac_ext_stream(stream);
99 /* enable/disable SPIB for this hdac stream */
100 snd_hdac_ext_stream_spbcap_enable(bus, enable, stream->index);
102 /* set the spib value */
103 snd_hdac_ext_stream_set_spib(bus, estream, size);
108 static int skl_dsp_prepare(struct device *dev, unsigned int format,
109 unsigned int size, struct snd_dma_buffer *dmab)
111 struct hdac_bus *bus = dev_get_drvdata(dev);
112 struct hdac_ext_stream *estream;
113 struct hdac_stream *stream;
114 struct snd_pcm_substream substream;
120 memset(&substream, 0, sizeof(substream));
121 substream.stream = SNDRV_PCM_STREAM_PLAYBACK;
123 estream = snd_hdac_ext_stream_assign(bus, &substream,
124 HDAC_EXT_STREAM_TYPE_HOST);
128 stream = hdac_stream(estream);
130 /* assign decouple host dma channel */
131 ret = snd_hdac_dsp_prepare(stream, format, size, dmab);
135 skl_dsp_setup_spib(dev, size, stream->stream_tag, true);
137 return stream->stream_tag;
140 static int skl_dsp_trigger(struct device *dev, bool start, int stream_tag)
142 struct hdac_bus *bus = dev_get_drvdata(dev);
143 struct hdac_stream *stream;
148 stream = snd_hdac_get_stream(bus,
149 SNDRV_PCM_STREAM_PLAYBACK, stream_tag);
153 snd_hdac_dsp_trigger(stream, start);
158 static int skl_dsp_cleanup(struct device *dev,
159 struct snd_dma_buffer *dmab, int stream_tag)
161 struct hdac_bus *bus = dev_get_drvdata(dev);
162 struct hdac_stream *stream;
163 struct hdac_ext_stream *estream;
168 stream = snd_hdac_get_stream(bus,
169 SNDRV_PCM_STREAM_PLAYBACK, stream_tag);
173 estream = stream_to_hdac_ext_stream(stream);
174 skl_dsp_setup_spib(dev, 0, stream_tag, false);
175 snd_hdac_ext_stream_release(estream, HDAC_EXT_STREAM_TYPE_HOST);
177 snd_hdac_dsp_cleanup(stream, dmab);
182 static struct skl_dsp_loader_ops skl_get_loader_ops(void)
184 struct skl_dsp_loader_ops loader_ops;
186 memset(&loader_ops, 0, sizeof(struct skl_dsp_loader_ops));
188 loader_ops.alloc_dma_buf = skl_alloc_dma_buf;
189 loader_ops.free_dma_buf = skl_free_dma_buf;
194 static struct skl_dsp_loader_ops bxt_get_loader_ops(void)
196 struct skl_dsp_loader_ops loader_ops;
198 memset(&loader_ops, 0, sizeof(loader_ops));
200 loader_ops.alloc_dma_buf = skl_alloc_dma_buf;
201 loader_ops.free_dma_buf = skl_free_dma_buf;
202 loader_ops.prepare = skl_dsp_prepare;
203 loader_ops.trigger = skl_dsp_trigger;
204 loader_ops.cleanup = skl_dsp_cleanup;
209 static const struct skl_dsp_ops dsp_ops[] = {
213 .loader_ops = skl_get_loader_ops,
214 .init = skl_sst_dsp_init,
215 .init_fw = skl_sst_init_fw,
216 .cleanup = skl_sst_dsp_cleanup
221 .loader_ops = skl_get_loader_ops,
222 .init = skl_sst_dsp_init,
223 .init_fw = skl_sst_init_fw,
224 .cleanup = skl_sst_dsp_cleanup
229 .loader_ops = bxt_get_loader_ops,
230 .init = bxt_sst_dsp_init,
231 .init_fw = bxt_sst_init_fw,
232 .cleanup = bxt_sst_dsp_cleanup
237 .loader_ops = bxt_get_loader_ops,
238 .init = bxt_sst_dsp_init,
239 .init_fw = bxt_sst_init_fw,
240 .cleanup = bxt_sst_dsp_cleanup
245 .loader_ops = bxt_get_loader_ops,
246 .init = cnl_sst_dsp_init,
247 .init_fw = cnl_sst_init_fw,
248 .cleanup = cnl_sst_dsp_cleanup
252 const struct skl_dsp_ops *skl_get_dsp_ops(int pci_id)
256 for (i = 0; i < ARRAY_SIZE(dsp_ops); i++) {
257 if (dsp_ops[i].id == pci_id)
264 int skl_init_dsp(struct skl *skl)
266 void __iomem *mmio_base;
267 struct hdac_bus *bus = skl_to_bus(skl);
268 struct skl_dsp_loader_ops loader_ops;
270 const struct skl_dsp_ops *ops;
271 struct skl_dsp_cores *cores;
274 /* enable ppcap interrupt */
275 snd_hdac_ext_bus_ppcap_enable(bus, true);
276 snd_hdac_ext_bus_ppcap_int_enable(bus, true);
278 /* read the BAR of the ADSP MMIO */
279 mmio_base = pci_ioremap_bar(skl->pci, 4);
280 if (mmio_base == NULL) {
281 dev_err(bus->dev, "ioremap error\n");
285 ops = skl_get_dsp_ops(skl->pci->device);
291 loader_ops = ops->loader_ops();
292 ret = ops->init(bus->dev, mmio_base, irq,
293 skl->fw_name, loader_ops,
299 skl->skl_sst->dsp_ops = ops;
300 cores = &skl->skl_sst->cores;
301 cores->count = ops->num_cores;
303 cores->state = kcalloc(cores->count, sizeof(*cores->state), GFP_KERNEL);
309 cores->usage_count = kcalloc(cores->count, sizeof(*cores->usage_count),
311 if (!cores->usage_count) {
313 goto free_core_state;
316 dev_dbg(bus->dev, "dsp registration status=%d\n", ret);
329 int skl_free_dsp(struct skl *skl)
331 struct hdac_bus *bus = skl_to_bus(skl);
332 struct skl_sst *ctx = skl->skl_sst;
334 /* disable ppcap interrupt */
335 snd_hdac_ext_bus_ppcap_int_enable(bus, false);
337 ctx->dsp_ops->cleanup(bus->dev, ctx);
339 kfree(ctx->cores.state);
340 kfree(ctx->cores.usage_count);
342 if (ctx->dsp->addr.lpe)
343 iounmap(ctx->dsp->addr.lpe);
349 * In the case of "suspend_active" i.e, the Audio IP being active
350 * during system suspend, immediately excecute any pending D0i3 work
351 * before suspending. This is needed for the IP to work in low power
352 * mode during system suspend. In the case of normal suspend, cancel
353 * any pending D0i3 work.
355 int skl_suspend_late_dsp(struct skl *skl)
357 struct skl_sst *ctx = skl->skl_sst;
358 struct delayed_work *dwork;
363 dwork = &ctx->d0i3.work;
365 if (dwork->work.func) {
366 if (skl->supend_active)
367 flush_delayed_work(dwork);
369 cancel_delayed_work_sync(dwork);
375 int skl_suspend_dsp(struct skl *skl)
377 struct skl_sst *ctx = skl->skl_sst;
378 struct hdac_bus *bus = skl_to_bus(skl);
381 /* if ppcap is not supported return 0 */
385 ret = skl_dsp_sleep(ctx->dsp);
389 /* disable ppcap interrupt */
390 snd_hdac_ext_bus_ppcap_int_enable(bus, false);
391 snd_hdac_ext_bus_ppcap_enable(bus, false);
396 int skl_resume_dsp(struct skl *skl)
398 struct skl_sst *ctx = skl->skl_sst;
399 struct hdac_bus *bus = skl_to_bus(skl);
402 /* if ppcap is not supported return 0 */
406 /* enable ppcap interrupt */
407 snd_hdac_ext_bus_ppcap_enable(bus, true);
408 snd_hdac_ext_bus_ppcap_int_enable(bus, true);
410 /* check if DSP 1st boot is done */
411 if (skl->skl_sst->is_first_boot == true)
415 * Disable dynamic clock and power gating during firmware
416 * and library download
418 ctx->enable_miscbdcge(ctx->dev, false);
419 ctx->clock_power_gating(ctx->dev, false);
421 ret = skl_dsp_wake(ctx->dsp);
422 ctx->enable_miscbdcge(ctx->dev, true);
423 ctx->clock_power_gating(ctx->dev, true);
427 skl_dsp_enable_notification(skl->skl_sst, false);
429 if (skl->cfg.astate_cfg != NULL) {
430 skl_dsp_set_astate_cfg(skl->skl_sst, skl->cfg.astate_cfg->count,
431 skl->cfg.astate_cfg);
436 enum skl_bitdepth skl_get_bit_depth(int params)
440 return SKL_DEPTH_8BIT;
443 return SKL_DEPTH_16BIT;
446 return SKL_DEPTH_24BIT;
449 return SKL_DEPTH_32BIT;
452 return SKL_DEPTH_INVALID;
458 * Each module in DSP expects a base module configuration, which consists of
459 * PCM format information, which we calculate in driver and resource values
460 * which are read from widget information passed through topology binary
461 * This is send when we create a module with INIT_INSTANCE IPC msg
463 static void skl_set_base_module_format(struct skl_sst *ctx,
464 struct skl_module_cfg *mconfig,
465 struct skl_base_cfg *base_cfg)
467 struct skl_module *module = mconfig->module;
468 struct skl_module_res *res = &module->resources[mconfig->res_idx];
469 struct skl_module_iface *fmt = &module->formats[mconfig->fmt_idx];
470 struct skl_module_fmt *format = &fmt->inputs[0].fmt;
472 base_cfg->audio_fmt.number_of_channels = format->channels;
474 base_cfg->audio_fmt.s_freq = format->s_freq;
475 base_cfg->audio_fmt.bit_depth = format->bit_depth;
476 base_cfg->audio_fmt.valid_bit_depth = format->valid_bit_depth;
477 base_cfg->audio_fmt.ch_cfg = format->ch_cfg;
479 dev_dbg(ctx->dev, "bit_depth=%x valid_bd=%x ch_config=%x\n",
480 format->bit_depth, format->valid_bit_depth,
483 base_cfg->audio_fmt.channel_map = format->ch_map;
485 base_cfg->audio_fmt.interleaving = format->interleaving_style;
487 base_cfg->cps = res->cps;
488 base_cfg->ibs = res->ibs;
489 base_cfg->obs = res->obs;
490 base_cfg->is_pages = res->is_pages;
494 * Copies copier capabilities into copier module and updates copier module
497 static void skl_copy_copier_caps(struct skl_module_cfg *mconfig,
498 struct skl_cpr_cfg *cpr_mconfig)
500 if (mconfig->formats_config.caps_size == 0)
503 memcpy(cpr_mconfig->gtw_cfg.config_data,
504 mconfig->formats_config.caps,
505 mconfig->formats_config.caps_size);
507 cpr_mconfig->gtw_cfg.config_length =
508 (mconfig->formats_config.caps_size) / 4;
511 #define SKL_NON_GATEWAY_CPR_NODE_ID 0xFFFFFFFF
513 * Calculate the gatewat settings required for copier module, type of
514 * gateway and index of gateway to use
516 static u32 skl_get_node_id(struct skl_sst *ctx,
517 struct skl_module_cfg *mconfig)
519 union skl_connector_node_id node_id = {0};
520 union skl_ssp_dma_node ssp_node = {0};
521 struct skl_pipe_params *params = mconfig->pipe->p_params;
523 switch (mconfig->dev_type) {
525 node_id.node.dma_type =
526 (SKL_CONN_SOURCE == mconfig->hw_conn_type) ?
527 SKL_DMA_I2S_LINK_OUTPUT_CLASS :
528 SKL_DMA_I2S_LINK_INPUT_CLASS;
529 node_id.node.vindex = params->host_dma_id +
530 (mconfig->vbus_id << 3);
534 node_id.node.dma_type =
535 (SKL_CONN_SOURCE == mconfig->hw_conn_type) ?
536 SKL_DMA_I2S_LINK_OUTPUT_CLASS :
537 SKL_DMA_I2S_LINK_INPUT_CLASS;
538 ssp_node.dma_node.time_slot_index = mconfig->time_slot;
539 ssp_node.dma_node.i2s_instance = mconfig->vbus_id;
540 node_id.node.vindex = ssp_node.val;
543 case SKL_DEVICE_DMIC:
544 node_id.node.dma_type = SKL_DMA_DMIC_LINK_INPUT_CLASS;
545 node_id.node.vindex = mconfig->vbus_id +
546 (mconfig->time_slot);
549 case SKL_DEVICE_HDALINK:
550 node_id.node.dma_type =
551 (SKL_CONN_SOURCE == mconfig->hw_conn_type) ?
552 SKL_DMA_HDA_LINK_OUTPUT_CLASS :
553 SKL_DMA_HDA_LINK_INPUT_CLASS;
554 node_id.node.vindex = params->link_dma_id;
557 case SKL_DEVICE_HDAHOST:
558 node_id.node.dma_type =
559 (SKL_CONN_SOURCE == mconfig->hw_conn_type) ?
560 SKL_DMA_HDA_HOST_OUTPUT_CLASS :
561 SKL_DMA_HDA_HOST_INPUT_CLASS;
562 node_id.node.vindex = params->host_dma_id;
566 node_id.val = 0xFFFFFFFF;
573 static void skl_setup_cpr_gateway_cfg(struct skl_sst *ctx,
574 struct skl_module_cfg *mconfig,
575 struct skl_cpr_cfg *cpr_mconfig)
578 struct skl_module_res *res;
579 int res_idx = mconfig->res_idx;
580 struct skl *skl = get_skl_ctx(ctx->dev);
582 cpr_mconfig->gtw_cfg.node_id = skl_get_node_id(ctx, mconfig);
584 if (cpr_mconfig->gtw_cfg.node_id == SKL_NON_GATEWAY_CPR_NODE_ID) {
585 cpr_mconfig->cpr_feature_mask = 0;
589 if (skl->nr_modules) {
590 res = &mconfig->module->resources[mconfig->res_idx];
591 cpr_mconfig->gtw_cfg.dma_buffer_size = res->dma_buffer_size;
592 goto skip_buf_size_calc;
594 res = &mconfig->module->resources[res_idx];
597 switch (mconfig->hw_conn_type) {
598 case SKL_CONN_SOURCE:
599 if (mconfig->dev_type == SKL_DEVICE_HDAHOST)
600 dma_io_buf = res->ibs;
602 dma_io_buf = res->obs;
606 if (mconfig->dev_type == SKL_DEVICE_HDAHOST)
607 dma_io_buf = res->obs;
609 dma_io_buf = res->ibs;
613 dev_warn(ctx->dev, "wrong connection type: %d\n",
614 mconfig->hw_conn_type);
618 cpr_mconfig->gtw_cfg.dma_buffer_size =
619 mconfig->dma_buffer_size * dma_io_buf;
621 /* fallback to 2ms default value */
622 if (!cpr_mconfig->gtw_cfg.dma_buffer_size) {
623 if (mconfig->hw_conn_type == SKL_CONN_SOURCE)
624 cpr_mconfig->gtw_cfg.dma_buffer_size = 2 * res->obs;
626 cpr_mconfig->gtw_cfg.dma_buffer_size = 2 * res->ibs;
630 cpr_mconfig->cpr_feature_mask = 0;
631 cpr_mconfig->gtw_cfg.config_length = 0;
633 skl_copy_copier_caps(mconfig, cpr_mconfig);
636 #define DMA_CONTROL_ID 5
637 #define DMA_I2S_BLOB_SIZE 21
639 int skl_dsp_set_dma_control(struct skl_sst *ctx, u32 *caps,
640 u32 caps_size, u32 node_id)
642 struct skl_dma_control *dma_ctrl;
643 struct skl_ipc_large_config_msg msg = {0};
648 * if blob size zero, then return
653 msg.large_param_id = DMA_CONTROL_ID;
654 msg.param_data_size = sizeof(struct skl_dma_control) + caps_size;
656 dma_ctrl = kzalloc(msg.param_data_size, GFP_KERNEL);
657 if (dma_ctrl == NULL)
660 dma_ctrl->node_id = node_id;
663 * NHLT blob may contain additional configs along with i2s blob.
664 * firmware expects only the i2s blob size as the config_length.
665 * So fix to i2s blob size.
668 dma_ctrl->config_length = DMA_I2S_BLOB_SIZE;
670 memcpy(dma_ctrl->config_data, caps, caps_size);
672 err = skl_ipc_set_large_config(&ctx->ipc, &msg, (u32 *)dma_ctrl);
677 EXPORT_SYMBOL_GPL(skl_dsp_set_dma_control);
679 static void skl_setup_out_format(struct skl_sst *ctx,
680 struct skl_module_cfg *mconfig,
681 struct skl_audio_data_format *out_fmt)
683 struct skl_module *module = mconfig->module;
684 struct skl_module_iface *fmt = &module->formats[mconfig->fmt_idx];
685 struct skl_module_fmt *format = &fmt->outputs[0].fmt;
687 out_fmt->number_of_channels = (u8)format->channels;
688 out_fmt->s_freq = format->s_freq;
689 out_fmt->bit_depth = format->bit_depth;
690 out_fmt->valid_bit_depth = format->valid_bit_depth;
691 out_fmt->ch_cfg = format->ch_cfg;
693 out_fmt->channel_map = format->ch_map;
694 out_fmt->interleaving = format->interleaving_style;
695 out_fmt->sample_type = format->sample_type;
697 dev_dbg(ctx->dev, "copier out format chan=%d fre=%d bitdepth=%d\n",
698 out_fmt->number_of_channels, format->s_freq, format->bit_depth);
702 * DSP needs SRC module for frequency conversion, SRC takes base module
703 * configuration and the target frequency as extra parameter passed as src
706 static void skl_set_src_format(struct skl_sst *ctx,
707 struct skl_module_cfg *mconfig,
708 struct skl_src_module_cfg *src_mconfig)
710 struct skl_module *module = mconfig->module;
711 struct skl_module_iface *iface = &module->formats[mconfig->fmt_idx];
712 struct skl_module_fmt *fmt = &iface->outputs[0].fmt;
714 skl_set_base_module_format(ctx, mconfig,
715 (struct skl_base_cfg *)src_mconfig);
717 src_mconfig->src_cfg = fmt->s_freq;
721 * DSP needs updown module to do channel conversion. updown module take base
722 * module configuration and channel configuration
723 * It also take coefficients and now we have defaults applied here
725 static void skl_set_updown_mixer_format(struct skl_sst *ctx,
726 struct skl_module_cfg *mconfig,
727 struct skl_up_down_mixer_cfg *mixer_mconfig)
729 struct skl_module *module = mconfig->module;
730 struct skl_module_iface *iface = &module->formats[mconfig->fmt_idx];
731 struct skl_module_fmt *fmt = &iface->outputs[0].fmt;
733 skl_set_base_module_format(ctx, mconfig,
734 (struct skl_base_cfg *)mixer_mconfig);
735 mixer_mconfig->out_ch_cfg = fmt->ch_cfg;
736 mixer_mconfig->ch_map = fmt->ch_map;
740 * 'copier' is DSP internal module which copies data from Host DMA (HDA host
741 * dma) or link (hda link, SSP, PDM)
742 * Here we calculate the copier module parameters, like PCM format, output
743 * format, gateway settings
744 * copier_module_config is sent as input buffer with INIT_INSTANCE IPC msg
746 static void skl_set_copier_format(struct skl_sst *ctx,
747 struct skl_module_cfg *mconfig,
748 struct skl_cpr_cfg *cpr_mconfig)
750 struct skl_audio_data_format *out_fmt = &cpr_mconfig->out_fmt;
751 struct skl_base_cfg *base_cfg = (struct skl_base_cfg *)cpr_mconfig;
753 skl_set_base_module_format(ctx, mconfig, base_cfg);
755 skl_setup_out_format(ctx, mconfig, out_fmt);
756 skl_setup_cpr_gateway_cfg(ctx, mconfig, cpr_mconfig);
760 * Algo module are DSP pre processing modules. Algo module take base module
761 * configuration and params
764 static void skl_set_algo_format(struct skl_sst *ctx,
765 struct skl_module_cfg *mconfig,
766 struct skl_algo_cfg *algo_mcfg)
768 struct skl_base_cfg *base_cfg = (struct skl_base_cfg *)algo_mcfg;
770 skl_set_base_module_format(ctx, mconfig, base_cfg);
772 if (mconfig->formats_config.caps_size == 0)
775 memcpy(algo_mcfg->params,
776 mconfig->formats_config.caps,
777 mconfig->formats_config.caps_size);
782 * Mic select module allows selecting one or many input channels, thus
785 * Mic select module take base module configuration and out-format
788 static void skl_set_base_outfmt_format(struct skl_sst *ctx,
789 struct skl_module_cfg *mconfig,
790 struct skl_base_outfmt_cfg *base_outfmt_mcfg)
792 struct skl_audio_data_format *out_fmt = &base_outfmt_mcfg->out_fmt;
793 struct skl_base_cfg *base_cfg =
794 (struct skl_base_cfg *)base_outfmt_mcfg;
796 skl_set_base_module_format(ctx, mconfig, base_cfg);
797 skl_setup_out_format(ctx, mconfig, out_fmt);
800 static u16 skl_get_module_param_size(struct skl_sst *ctx,
801 struct skl_module_cfg *mconfig)
805 switch (mconfig->m_type) {
806 case SKL_MODULE_TYPE_COPIER:
807 param_size = sizeof(struct skl_cpr_cfg);
808 param_size += mconfig->formats_config.caps_size;
811 case SKL_MODULE_TYPE_SRCINT:
812 return sizeof(struct skl_src_module_cfg);
814 case SKL_MODULE_TYPE_UPDWMIX:
815 return sizeof(struct skl_up_down_mixer_cfg);
817 case SKL_MODULE_TYPE_ALGO:
818 param_size = sizeof(struct skl_base_cfg);
819 param_size += mconfig->formats_config.caps_size;
822 case SKL_MODULE_TYPE_BASE_OUTFMT:
823 case SKL_MODULE_TYPE_MIC_SELECT:
824 case SKL_MODULE_TYPE_KPB:
825 return sizeof(struct skl_base_outfmt_cfg);
829 * return only base cfg when no specific module type is
832 return sizeof(struct skl_base_cfg);
839 * DSP firmware supports various modules like copier, SRC, updown etc.
840 * These modules required various parameters to be calculated and sent for
841 * the module initialization to DSP. By default a generic module needs only
842 * base module format configuration
845 static int skl_set_module_format(struct skl_sst *ctx,
846 struct skl_module_cfg *module_config,
847 u16 *module_config_size,
852 param_size = skl_get_module_param_size(ctx, module_config);
854 *param_data = kzalloc(param_size, GFP_KERNEL);
855 if (NULL == *param_data)
858 *module_config_size = param_size;
860 switch (module_config->m_type) {
861 case SKL_MODULE_TYPE_COPIER:
862 skl_set_copier_format(ctx, module_config, *param_data);
865 case SKL_MODULE_TYPE_SRCINT:
866 skl_set_src_format(ctx, module_config, *param_data);
869 case SKL_MODULE_TYPE_UPDWMIX:
870 skl_set_updown_mixer_format(ctx, module_config, *param_data);
873 case SKL_MODULE_TYPE_ALGO:
874 skl_set_algo_format(ctx, module_config, *param_data);
877 case SKL_MODULE_TYPE_BASE_OUTFMT:
878 case SKL_MODULE_TYPE_MIC_SELECT:
879 case SKL_MODULE_TYPE_KPB:
880 skl_set_base_outfmt_format(ctx, module_config, *param_data);
884 skl_set_base_module_format(ctx, module_config, *param_data);
889 dev_dbg(ctx->dev, "Module type=%d config size: %d bytes\n",
890 module_config->id.module_id, param_size);
891 print_hex_dump_debug("Module params:", DUMP_PREFIX_OFFSET, 8, 4,
892 *param_data, param_size, false);
896 static int skl_get_queue_index(struct skl_module_pin *mpin,
897 struct skl_module_inst_id id, int max)
901 for (i = 0; i < max; i++) {
902 if (mpin[i].id.module_id == id.module_id &&
903 mpin[i].id.instance_id == id.instance_id)
911 * Allocates queue for each module.
912 * if dynamic, the pin_index is allocated 0 to max_pin.
913 * In static, the pin_index is fixed based on module_id and instance id
915 static int skl_alloc_queue(struct skl_module_pin *mpin,
916 struct skl_module_cfg *tgt_cfg, int max)
919 struct skl_module_inst_id id = tgt_cfg->id;
921 * if pin in dynamic, find first free pin
922 * otherwise find match module and instance id pin as topology will
923 * ensure a unique pin is assigned to this so no need to
926 for (i = 0; i < max; i++) {
927 if (mpin[i].is_dynamic) {
928 if (!mpin[i].in_use &&
929 mpin[i].pin_state == SKL_PIN_UNBIND) {
931 mpin[i].in_use = true;
932 mpin[i].id.module_id = id.module_id;
933 mpin[i].id.instance_id = id.instance_id;
934 mpin[i].id.pvt_id = id.pvt_id;
935 mpin[i].tgt_mcfg = tgt_cfg;
939 if (mpin[i].id.module_id == id.module_id &&
940 mpin[i].id.instance_id == id.instance_id &&
941 mpin[i].pin_state == SKL_PIN_UNBIND) {
943 mpin[i].tgt_mcfg = tgt_cfg;
952 static void skl_free_queue(struct skl_module_pin *mpin, int q_index)
954 if (mpin[q_index].is_dynamic) {
955 mpin[q_index].in_use = false;
956 mpin[q_index].id.module_id = 0;
957 mpin[q_index].id.instance_id = 0;
958 mpin[q_index].id.pvt_id = 0;
960 mpin[q_index].pin_state = SKL_PIN_UNBIND;
961 mpin[q_index].tgt_mcfg = NULL;
964 /* Module state will be set to unint, if all the out pin state is UNBIND */
966 static void skl_clear_module_state(struct skl_module_pin *mpin, int max,
967 struct skl_module_cfg *mcfg)
972 for (i = 0; i < max; i++) {
973 if (mpin[i].pin_state == SKL_PIN_UNBIND)
980 mcfg->m_state = SKL_MODULE_INIT_DONE;
985 * A module needs to be instanataited in DSP. A mdoule is present in a
986 * collection of module referred as a PIPE.
987 * We first calculate the module format, based on module type and then
988 * invoke the DSP by sending IPC INIT_INSTANCE using ipc helper
990 int skl_init_module(struct skl_sst *ctx,
991 struct skl_module_cfg *mconfig)
993 u16 module_config_size = 0;
994 void *param_data = NULL;
996 struct skl_ipc_init_instance_msg msg;
998 dev_dbg(ctx->dev, "%s: module_id = %d instance=%d\n", __func__,
999 mconfig->id.module_id, mconfig->id.pvt_id);
1001 if (mconfig->pipe->state != SKL_PIPE_CREATED) {
1002 dev_err(ctx->dev, "Pipe not created state= %d pipe_id= %d\n",
1003 mconfig->pipe->state, mconfig->pipe->ppl_id);
1007 ret = skl_set_module_format(ctx, mconfig,
1008 &module_config_size, ¶m_data);
1010 dev_err(ctx->dev, "Failed to set module format ret=%d\n", ret);
1014 msg.module_id = mconfig->id.module_id;
1015 msg.instance_id = mconfig->id.pvt_id;
1016 msg.ppl_instance_id = mconfig->pipe->ppl_id;
1017 msg.param_data_size = module_config_size;
1018 msg.core_id = mconfig->core_id;
1019 msg.domain = mconfig->domain;
1021 ret = skl_ipc_init_instance(&ctx->ipc, &msg, param_data);
1023 dev_err(ctx->dev, "Failed to init instance ret=%d\n", ret);
1027 mconfig->m_state = SKL_MODULE_INIT_DONE;
1032 static void skl_dump_bind_info(struct skl_sst *ctx, struct skl_module_cfg
1033 *src_module, struct skl_module_cfg *dst_module)
1035 dev_dbg(ctx->dev, "%s: src module_id = %d src_instance=%d\n",
1036 __func__, src_module->id.module_id, src_module->id.pvt_id);
1037 dev_dbg(ctx->dev, "%s: dst_module=%d dst_instance=%d\n", __func__,
1038 dst_module->id.module_id, dst_module->id.pvt_id);
1040 dev_dbg(ctx->dev, "src_module state = %d dst module state = %d\n",
1041 src_module->m_state, dst_module->m_state);
1045 * On module freeup, we need to unbind the module with modules
1046 * it is already bind.
1047 * Find the pin allocated and unbind then using bind_unbind IPC
1049 int skl_unbind_modules(struct skl_sst *ctx,
1050 struct skl_module_cfg *src_mcfg,
1051 struct skl_module_cfg *dst_mcfg)
1054 struct skl_ipc_bind_unbind_msg msg;
1055 struct skl_module_inst_id src_id = src_mcfg->id;
1056 struct skl_module_inst_id dst_id = dst_mcfg->id;
1057 int in_max = dst_mcfg->module->max_input_pins;
1058 int out_max = src_mcfg->module->max_output_pins;
1059 int src_index, dst_index, src_pin_state, dst_pin_state;
1061 skl_dump_bind_info(ctx, src_mcfg, dst_mcfg);
1063 /* get src queue index */
1064 src_index = skl_get_queue_index(src_mcfg->m_out_pin, dst_id, out_max);
1068 msg.src_queue = src_index;
1070 /* get dst queue index */
1071 dst_index = skl_get_queue_index(dst_mcfg->m_in_pin, src_id, in_max);
1075 msg.dst_queue = dst_index;
1077 src_pin_state = src_mcfg->m_out_pin[src_index].pin_state;
1078 dst_pin_state = dst_mcfg->m_in_pin[dst_index].pin_state;
1080 if (src_pin_state != SKL_PIN_BIND_DONE ||
1081 dst_pin_state != SKL_PIN_BIND_DONE)
1084 msg.module_id = src_mcfg->id.module_id;
1085 msg.instance_id = src_mcfg->id.pvt_id;
1086 msg.dst_module_id = dst_mcfg->id.module_id;
1087 msg.dst_instance_id = dst_mcfg->id.pvt_id;
1090 ret = skl_ipc_bind_unbind(&ctx->ipc, &msg);
1092 /* free queue only if unbind is success */
1093 skl_free_queue(src_mcfg->m_out_pin, src_index);
1094 skl_free_queue(dst_mcfg->m_in_pin, dst_index);
1097 * check only if src module bind state, bind is
1098 * always from src -> sink
1100 skl_clear_module_state(src_mcfg->m_out_pin, out_max, src_mcfg);
1106 static void fill_pin_params(struct skl_audio_data_format *pin_fmt,
1107 struct skl_module_fmt *format)
1109 pin_fmt->number_of_channels = format->channels;
1110 pin_fmt->s_freq = format->s_freq;
1111 pin_fmt->bit_depth = format->bit_depth;
1112 pin_fmt->valid_bit_depth = format->valid_bit_depth;
1113 pin_fmt->ch_cfg = format->ch_cfg;
1114 pin_fmt->sample_type = format->sample_type;
1115 pin_fmt->channel_map = format->ch_map;
1116 pin_fmt->interleaving = format->interleaving_style;
1119 #define CPR_SINK_FMT_PARAM_ID 2
1122 * Once a module is instantiated it need to be 'bind' with other modules in
1123 * the pipeline. For binding we need to find the module pins which are bind
1125 * This function finds the pins and then sends bund_unbind IPC message to
1126 * DSP using IPC helper
1128 int skl_bind_modules(struct skl_sst *ctx,
1129 struct skl_module_cfg *src_mcfg,
1130 struct skl_module_cfg *dst_mcfg)
1133 struct skl_ipc_bind_unbind_msg msg;
1134 int in_max = dst_mcfg->module->max_input_pins;
1135 int out_max = src_mcfg->module->max_output_pins;
1136 int src_index, dst_index;
1137 struct skl_module_fmt *format;
1138 struct skl_cpr_pin_fmt pin_fmt;
1139 struct skl_module *module;
1140 struct skl_module_iface *fmt;
1142 skl_dump_bind_info(ctx, src_mcfg, dst_mcfg);
1144 if (src_mcfg->m_state < SKL_MODULE_INIT_DONE ||
1145 dst_mcfg->m_state < SKL_MODULE_INIT_DONE)
1148 src_index = skl_alloc_queue(src_mcfg->m_out_pin, dst_mcfg, out_max);
1152 msg.src_queue = src_index;
1153 dst_index = skl_alloc_queue(dst_mcfg->m_in_pin, src_mcfg, in_max);
1154 if (dst_index < 0) {
1155 skl_free_queue(src_mcfg->m_out_pin, src_index);
1160 * Copier module requires the separate large_config_set_ipc to
1161 * configure the pins other than 0
1163 if (src_mcfg->m_type == SKL_MODULE_TYPE_COPIER && src_index > 0) {
1164 pin_fmt.sink_id = src_index;
1165 module = src_mcfg->module;
1166 fmt = &module->formats[src_mcfg->fmt_idx];
1168 /* Input fmt is same as that of src module input cfg */
1169 format = &fmt->inputs[0].fmt;
1170 fill_pin_params(&(pin_fmt.src_fmt), format);
1172 format = &fmt->outputs[src_index].fmt;
1173 fill_pin_params(&(pin_fmt.dst_fmt), format);
1174 ret = skl_set_module_params(ctx, (void *)&pin_fmt,
1175 sizeof(struct skl_cpr_pin_fmt),
1176 CPR_SINK_FMT_PARAM_ID, src_mcfg);
1182 msg.dst_queue = dst_index;
1184 dev_dbg(ctx->dev, "src queue = %d dst queue =%d\n",
1185 msg.src_queue, msg.dst_queue);
1187 msg.module_id = src_mcfg->id.module_id;
1188 msg.instance_id = src_mcfg->id.pvt_id;
1189 msg.dst_module_id = dst_mcfg->id.module_id;
1190 msg.dst_instance_id = dst_mcfg->id.pvt_id;
1193 ret = skl_ipc_bind_unbind(&ctx->ipc, &msg);
1196 src_mcfg->m_state = SKL_MODULE_BIND_DONE;
1197 src_mcfg->m_out_pin[src_index].pin_state = SKL_PIN_BIND_DONE;
1198 dst_mcfg->m_in_pin[dst_index].pin_state = SKL_PIN_BIND_DONE;
1202 /* error case , if IPC fails, clear the queue index */
1203 skl_free_queue(src_mcfg->m_out_pin, src_index);
1204 skl_free_queue(dst_mcfg->m_in_pin, dst_index);
1209 static int skl_set_pipe_state(struct skl_sst *ctx, struct skl_pipe *pipe,
1210 enum skl_ipc_pipeline_state state)
1212 dev_dbg(ctx->dev, "%s: pipe_state = %d\n", __func__, state);
1214 return skl_ipc_set_pipeline_state(&ctx->ipc, pipe->ppl_id, state);
1218 * A pipeline is a collection of modules. Before a module in instantiated a
1219 * pipeline needs to be created for it.
1220 * This function creates pipeline, by sending create pipeline IPC messages
1223 int skl_create_pipeline(struct skl_sst *ctx, struct skl_pipe *pipe)
1227 dev_dbg(ctx->dev, "%s: pipe_id = %d\n", __func__, pipe->ppl_id);
1229 ret = skl_ipc_create_pipeline(&ctx->ipc, pipe->memory_pages,
1230 pipe->pipe_priority, pipe->ppl_id,
1233 dev_err(ctx->dev, "Failed to create pipeline\n");
1237 pipe->state = SKL_PIPE_CREATED;
1243 * A pipeline needs to be deleted on cleanup. If a pipeline is running, then
1244 * pause the pipeline first and then delete it
1245 * The pipe delete is done by sending delete pipeline IPC. DSP will stop the
1246 * DMA engines and releases resources
1248 int skl_delete_pipe(struct skl_sst *ctx, struct skl_pipe *pipe)
1252 dev_dbg(ctx->dev, "%s: pipe = %d\n", __func__, pipe->ppl_id);
1254 /* If pipe is started, do stop the pipe in FW. */
1255 if (pipe->state >= SKL_PIPE_STARTED) {
1256 ret = skl_set_pipe_state(ctx, pipe, PPL_PAUSED);
1258 dev_err(ctx->dev, "Failed to stop pipeline\n");
1262 pipe->state = SKL_PIPE_PAUSED;
1265 /* If pipe was not created in FW, do not try to delete it */
1266 if (pipe->state < SKL_PIPE_CREATED)
1269 ret = skl_ipc_delete_pipeline(&ctx->ipc, pipe->ppl_id);
1271 dev_err(ctx->dev, "Failed to delete pipeline\n");
1275 pipe->state = SKL_PIPE_INVALID;
1281 * A pipeline is also a scheduling entity in DSP which can be run, stopped
1282 * For processing data the pipe need to be run by sending IPC set pipe state
1285 int skl_run_pipe(struct skl_sst *ctx, struct skl_pipe *pipe)
1289 dev_dbg(ctx->dev, "%s: pipe = %d\n", __func__, pipe->ppl_id);
1291 /* If pipe was not created in FW, do not try to pause or delete */
1292 if (pipe->state < SKL_PIPE_CREATED)
1295 /* Pipe has to be paused before it is started */
1296 ret = skl_set_pipe_state(ctx, pipe, PPL_PAUSED);
1298 dev_err(ctx->dev, "Failed to pause pipe\n");
1302 pipe->state = SKL_PIPE_PAUSED;
1304 ret = skl_set_pipe_state(ctx, pipe, PPL_RUNNING);
1306 dev_err(ctx->dev, "Failed to start pipe\n");
1310 pipe->state = SKL_PIPE_STARTED;
1316 * Stop the pipeline by sending set pipe state IPC
1317 * DSP doesnt implement stop so we always send pause message
1319 int skl_stop_pipe(struct skl_sst *ctx, struct skl_pipe *pipe)
1323 dev_dbg(ctx->dev, "In %s pipe=%d\n", __func__, pipe->ppl_id);
1325 /* If pipe was not created in FW, do not try to pause or delete */
1326 if (pipe->state < SKL_PIPE_PAUSED)
1329 ret = skl_set_pipe_state(ctx, pipe, PPL_PAUSED);
1331 dev_dbg(ctx->dev, "Failed to stop pipe\n");
1335 pipe->state = SKL_PIPE_PAUSED;
1341 * Reset the pipeline by sending set pipe state IPC this will reset the DMA
1344 int skl_reset_pipe(struct skl_sst *ctx, struct skl_pipe *pipe)
1348 /* If pipe was not created in FW, do not try to pause or delete */
1349 if (pipe->state < SKL_PIPE_PAUSED)
1352 ret = skl_set_pipe_state(ctx, pipe, PPL_RESET);
1354 dev_dbg(ctx->dev, "Failed to reset pipe ret=%d\n", ret);
1358 pipe->state = SKL_PIPE_RESET;
1363 /* Algo parameter set helper function */
1364 int skl_set_module_params(struct skl_sst *ctx, u32 *params, int size,
1365 u32 param_id, struct skl_module_cfg *mcfg)
1367 struct skl_ipc_large_config_msg msg;
1369 msg.module_id = mcfg->id.module_id;
1370 msg.instance_id = mcfg->id.pvt_id;
1371 msg.param_data_size = size;
1372 msg.large_param_id = param_id;
1374 return skl_ipc_set_large_config(&ctx->ipc, &msg, params);
1377 int skl_get_module_params(struct skl_sst *ctx, u32 *params, int size,
1378 u32 param_id, struct skl_module_cfg *mcfg)
1380 struct skl_ipc_large_config_msg msg;
1382 msg.module_id = mcfg->id.module_id;
1383 msg.instance_id = mcfg->id.pvt_id;
1384 msg.param_data_size = size;
1385 msg.large_param_id = param_id;
1387 return skl_ipc_get_large_config(&ctx->ipc, &msg, params);