2 * Intel Smart Sound Technology (SST) DSP Core Driver
4 * Copyright (C) 2013, Intel Corporation. All rights reserved.
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License version
8 * 2 as published by the Free Software Foundation.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
17 #include <linux/slab.h>
18 #include <linux/export.h>
19 #include <linux/interrupt.h>
20 #include <linux/module.h>
21 #include <linux/platform_device.h>
23 #include <linux/delay.h>
26 #include "sst-dsp-priv.h"
28 #define CREATE_TRACE_POINTS
29 #include <trace/events/intel-sst.h>
31 /* Internal generic low-level SST IO functions - can be overidden */
32 void sst_shim32_write(void __iomem *addr, u32 offset, u32 value)
34 writel(value, addr + offset);
36 EXPORT_SYMBOL_GPL(sst_shim32_write);
38 u32 sst_shim32_read(void __iomem *addr, u32 offset)
40 return readl(addr + offset);
42 EXPORT_SYMBOL_GPL(sst_shim32_read);
44 void sst_shim32_write64(void __iomem *addr, u32 offset, u64 value)
46 memcpy_toio(addr + offset, &value, sizeof(value));
48 EXPORT_SYMBOL_GPL(sst_shim32_write64);
50 u64 sst_shim32_read64(void __iomem *addr, u32 offset)
54 memcpy_fromio(&val, addr + offset, sizeof(val));
57 EXPORT_SYMBOL_GPL(sst_shim32_read64);
59 static inline void _sst_memcpy_toio_32(volatile u32 __iomem *dest,
60 u32 *src, size_t bytes)
62 int i, words = bytes >> 2;
64 for (i = 0; i < words; i++)
65 writel(src[i], dest + i);
68 static inline void _sst_memcpy_fromio_32(u32 *dest,
69 const volatile __iomem u32 *src, size_t bytes)
71 int i, words = bytes >> 2;
73 for (i = 0; i < words; i++)
74 dest[i] = readl(src + i);
77 void sst_memcpy_toio_32(struct sst_dsp *sst,
78 void __iomem *dest, void *src, size_t bytes)
80 _sst_memcpy_toio_32(dest, src, bytes);
82 EXPORT_SYMBOL_GPL(sst_memcpy_toio_32);
84 void sst_memcpy_fromio_32(struct sst_dsp *sst, void *dest,
85 void __iomem *src, size_t bytes)
87 _sst_memcpy_fromio_32(dest, src, bytes);
89 EXPORT_SYMBOL_GPL(sst_memcpy_fromio_32);
92 void sst_dsp_shim_write(struct sst_dsp *sst, u32 offset, u32 value)
96 spin_lock_irqsave(&sst->spinlock, flags);
97 sst->ops->write(sst->addr.shim, offset, value);
98 spin_unlock_irqrestore(&sst->spinlock, flags);
100 EXPORT_SYMBOL_GPL(sst_dsp_shim_write);
102 u32 sst_dsp_shim_read(struct sst_dsp *sst, u32 offset)
107 spin_lock_irqsave(&sst->spinlock, flags);
108 val = sst->ops->read(sst->addr.shim, offset);
109 spin_unlock_irqrestore(&sst->spinlock, flags);
113 EXPORT_SYMBOL_GPL(sst_dsp_shim_read);
115 void sst_dsp_shim_write64(struct sst_dsp *sst, u32 offset, u64 value)
119 spin_lock_irqsave(&sst->spinlock, flags);
120 sst->ops->write64(sst->addr.shim, offset, value);
121 spin_unlock_irqrestore(&sst->spinlock, flags);
123 EXPORT_SYMBOL_GPL(sst_dsp_shim_write64);
125 u64 sst_dsp_shim_read64(struct sst_dsp *sst, u32 offset)
130 spin_lock_irqsave(&sst->spinlock, flags);
131 val = sst->ops->read64(sst->addr.shim, offset);
132 spin_unlock_irqrestore(&sst->spinlock, flags);
136 EXPORT_SYMBOL_GPL(sst_dsp_shim_read64);
138 void sst_dsp_shim_write_unlocked(struct sst_dsp *sst, u32 offset, u32 value)
140 sst->ops->write(sst->addr.shim, offset, value);
142 EXPORT_SYMBOL_GPL(sst_dsp_shim_write_unlocked);
144 u32 sst_dsp_shim_read_unlocked(struct sst_dsp *sst, u32 offset)
146 return sst->ops->read(sst->addr.shim, offset);
148 EXPORT_SYMBOL_GPL(sst_dsp_shim_read_unlocked);
150 void sst_dsp_shim_write64_unlocked(struct sst_dsp *sst, u32 offset, u64 value)
152 sst->ops->write64(sst->addr.shim, offset, value);
154 EXPORT_SYMBOL_GPL(sst_dsp_shim_write64_unlocked);
156 u64 sst_dsp_shim_read64_unlocked(struct sst_dsp *sst, u32 offset)
158 return sst->ops->read64(sst->addr.shim, offset);
160 EXPORT_SYMBOL_GPL(sst_dsp_shim_read64_unlocked);
162 int sst_dsp_shim_update_bits_unlocked(struct sst_dsp *sst, u32 offset,
166 unsigned int old, new;
169 ret = sst_dsp_shim_read_unlocked(sst, offset);
172 new = (old & (~mask)) | (value & mask);
174 change = (old != new);
176 sst_dsp_shim_write_unlocked(sst, offset, new);
180 EXPORT_SYMBOL_GPL(sst_dsp_shim_update_bits_unlocked);
182 int sst_dsp_shim_update_bits64_unlocked(struct sst_dsp *sst, u32 offset,
188 old = sst_dsp_shim_read64_unlocked(sst, offset);
190 new = (old & (~mask)) | (value & mask);
192 change = (old != new);
194 sst_dsp_shim_write64_unlocked(sst, offset, new);
198 EXPORT_SYMBOL_GPL(sst_dsp_shim_update_bits64_unlocked);
200 /* This is for registers bits with attribute RWC */
201 void sst_dsp_shim_update_bits_forced_unlocked(struct sst_dsp *sst, u32 offset,
204 unsigned int old, new;
207 ret = sst_dsp_shim_read_unlocked(sst, offset);
210 new = (old & (~mask)) | (value & mask);
212 sst_dsp_shim_write_unlocked(sst, offset, new);
214 EXPORT_SYMBOL_GPL(sst_dsp_shim_update_bits_forced_unlocked);
216 int sst_dsp_shim_update_bits(struct sst_dsp *sst, u32 offset,
222 spin_lock_irqsave(&sst->spinlock, flags);
223 change = sst_dsp_shim_update_bits_unlocked(sst, offset, mask, value);
224 spin_unlock_irqrestore(&sst->spinlock, flags);
227 EXPORT_SYMBOL_GPL(sst_dsp_shim_update_bits);
229 int sst_dsp_shim_update_bits64(struct sst_dsp *sst, u32 offset,
235 spin_lock_irqsave(&sst->spinlock, flags);
236 change = sst_dsp_shim_update_bits64_unlocked(sst, offset, mask, value);
237 spin_unlock_irqrestore(&sst->spinlock, flags);
240 EXPORT_SYMBOL_GPL(sst_dsp_shim_update_bits64);
242 /* This is for registers bits with attribute RWC */
243 void sst_dsp_shim_update_bits_forced(struct sst_dsp *sst, u32 offset,
248 spin_lock_irqsave(&sst->spinlock, flags);
249 sst_dsp_shim_update_bits_forced_unlocked(sst, offset, mask, value);
250 spin_unlock_irqrestore(&sst->spinlock, flags);
252 EXPORT_SYMBOL_GPL(sst_dsp_shim_update_bits_forced);
254 int sst_dsp_register_poll(struct sst_dsp *ctx, u32 offset, u32 mask,
255 u32 target, u32 timeout, char *operation)
262 * we will poll for couple of ms using mdelay, if not successful
263 * then go to longer sleep using usleep_range
266 /* check if set state successful */
267 for (time = 0; time < 5; time++) {
268 if ((sst_dsp_shim_read_unlocked(ctx, offset) & mask) == target) {
276 /* sleeping in 10ms steps so adjust timeout value */
279 for (time = 0; time < timeout; time++) {
280 if ((sst_dsp_shim_read_unlocked(ctx, offset) & mask) == target)
283 usleep_range(5000, 10000);
287 reg = sst_dsp_shim_read_unlocked(ctx, offset);
288 dev_info(ctx->dev, "FW Poll Status: reg=%#x %s %s\n", reg, operation,
289 (time < timeout) ? "successful" : "timedout");
290 ret = time < timeout ? 0 : -ETIME;
294 EXPORT_SYMBOL_GPL(sst_dsp_register_poll);
296 void sst_dsp_dump(struct sst_dsp *sst)
301 EXPORT_SYMBOL_GPL(sst_dsp_dump);
303 void sst_dsp_reset(struct sst_dsp *sst)
306 sst->ops->reset(sst);
308 EXPORT_SYMBOL_GPL(sst_dsp_reset);
310 int sst_dsp_boot(struct sst_dsp *sst)
317 EXPORT_SYMBOL_GPL(sst_dsp_boot);
319 int sst_dsp_wake(struct sst_dsp *sst)
322 return sst->ops->wake(sst);
326 EXPORT_SYMBOL_GPL(sst_dsp_wake);
328 void sst_dsp_sleep(struct sst_dsp *sst)
331 sst->ops->sleep(sst);
333 EXPORT_SYMBOL_GPL(sst_dsp_sleep);
335 void sst_dsp_stall(struct sst_dsp *sst)
338 sst->ops->stall(sst);
340 EXPORT_SYMBOL_GPL(sst_dsp_stall);
342 void sst_dsp_ipc_msg_tx(struct sst_dsp *dsp, u32 msg)
344 sst_dsp_shim_write_unlocked(dsp, SST_IPCX, msg | SST_IPCX_BUSY);
345 trace_sst_ipc_msg_tx(msg);
347 EXPORT_SYMBOL_GPL(sst_dsp_ipc_msg_tx);
349 u32 sst_dsp_ipc_msg_rx(struct sst_dsp *dsp)
353 msg = sst_dsp_shim_read_unlocked(dsp, SST_IPCX);
354 trace_sst_ipc_msg_rx(msg);
358 EXPORT_SYMBOL_GPL(sst_dsp_ipc_msg_rx);
360 int sst_dsp_mailbox_init(struct sst_dsp *sst, u32 inbox_offset, size_t inbox_size,
361 u32 outbox_offset, size_t outbox_size)
363 sst->mailbox.in_base = sst->addr.lpe + inbox_offset;
364 sst->mailbox.out_base = sst->addr.lpe + outbox_offset;
365 sst->mailbox.in_size = inbox_size;
366 sst->mailbox.out_size = outbox_size;
369 EXPORT_SYMBOL_GPL(sst_dsp_mailbox_init);
371 void sst_dsp_outbox_write(struct sst_dsp *sst, void *message, size_t bytes)
375 trace_sst_ipc_outbox_write(bytes);
377 memcpy_toio(sst->mailbox.out_base, message, bytes);
379 for (i = 0; i < bytes; i += 4)
380 trace_sst_ipc_outbox_wdata(i, *(u32 *)(message + i));
382 EXPORT_SYMBOL_GPL(sst_dsp_outbox_write);
384 void sst_dsp_outbox_read(struct sst_dsp *sst, void *message, size_t bytes)
388 trace_sst_ipc_outbox_read(bytes);
390 memcpy_fromio(message, sst->mailbox.out_base, bytes);
392 for (i = 0; i < bytes; i += 4)
393 trace_sst_ipc_outbox_rdata(i, *(u32 *)(message + i));
395 EXPORT_SYMBOL_GPL(sst_dsp_outbox_read);
397 void sst_dsp_inbox_write(struct sst_dsp *sst, void *message, size_t bytes)
401 trace_sst_ipc_inbox_write(bytes);
403 memcpy_toio(sst->mailbox.in_base, message, bytes);
405 for (i = 0; i < bytes; i += 4)
406 trace_sst_ipc_inbox_wdata(i, *(u32 *)(message + i));
408 EXPORT_SYMBOL_GPL(sst_dsp_inbox_write);
410 void sst_dsp_inbox_read(struct sst_dsp *sst, void *message, size_t bytes)
414 trace_sst_ipc_inbox_read(bytes);
416 memcpy_fromio(message, sst->mailbox.in_base, bytes);
418 for (i = 0; i < bytes; i += 4)
419 trace_sst_ipc_inbox_rdata(i, *(u32 *)(message + i));
421 EXPORT_SYMBOL_GPL(sst_dsp_inbox_read);
423 #if IS_ENABLED(CONFIG_DW_DMAC_CORE)
424 struct sst_dsp *sst_dsp_new(struct device *dev,
425 struct sst_dsp_device *sst_dev, struct sst_pdata *pdata)
430 dev_dbg(dev, "initialising audio DSP id 0x%x\n", pdata->id);
432 sst = devm_kzalloc(dev, sizeof(*sst), GFP_KERNEL);
436 spin_lock_init(&sst->spinlock);
437 mutex_init(&sst->mutex);
439 sst->dma_dev = pdata->dma_dev;
440 sst->thread_context = sst_dev->thread_context;
441 sst->sst_dev = sst_dev;
443 sst->irq = pdata->irq;
444 sst->ops = sst_dev->ops;
446 INIT_LIST_HEAD(&sst->used_block_list);
447 INIT_LIST_HEAD(&sst->free_block_list);
448 INIT_LIST_HEAD(&sst->module_list);
449 INIT_LIST_HEAD(&sst->fw_list);
450 INIT_LIST_HEAD(&sst->scratch_block_list);
452 /* Initialise SST Audio DSP */
453 if (sst->ops->init) {
454 err = sst->ops->init(sst, pdata);
459 /* Register the ISR */
460 err = request_threaded_irq(sst->irq, sst->ops->irq_handler,
461 sst_dev->thread, IRQF_SHARED, "AudioDSP", sst);
465 err = sst_dma_new(sst);
467 dev_err(dev, "sst_dma_new failed %d\n", err);
474 free_irq(sst->irq, sst);
481 EXPORT_SYMBOL_GPL(sst_dsp_new);
483 void sst_dsp_free(struct sst_dsp *sst)
485 free_irq(sst->irq, sst);
489 sst_dma_free(sst->dma);
491 EXPORT_SYMBOL_GPL(sst_dsp_free);
494 /* Module information */
495 MODULE_AUTHOR("Liam Girdwood");
496 MODULE_DESCRIPTION("Intel SST Core");
497 MODULE_LICENSE("GPL v2");