2 * wm_adsp.c -- Wolfson ADSP support
4 * Copyright 2012 Wolfson Microelectronics plc
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
13 #include <linux/module.h>
14 #include <linux/moduleparam.h>
15 #include <linux/init.h>
16 #include <linux/delay.h>
17 #include <linux/firmware.h>
18 #include <linux/list.h>
20 #include <linux/pm_runtime.h>
21 #include <linux/regmap.h>
22 #include <linux/regulator/consumer.h>
23 #include <linux/slab.h>
24 #include <linux/vmalloc.h>
25 #include <linux/workqueue.h>
26 #include <linux/debugfs.h>
27 #include <sound/core.h>
28 #include <sound/pcm.h>
29 #include <sound/pcm_params.h>
30 #include <sound/soc.h>
31 #include <sound/jack.h>
32 #include <sound/initval.h>
33 #include <sound/tlv.h>
37 #define adsp_crit(_dsp, fmt, ...) \
38 dev_crit(_dsp->dev, "DSP%d: " fmt, _dsp->num, ##__VA_ARGS__)
39 #define adsp_err(_dsp, fmt, ...) \
40 dev_err(_dsp->dev, "DSP%d: " fmt, _dsp->num, ##__VA_ARGS__)
41 #define adsp_warn(_dsp, fmt, ...) \
42 dev_warn(_dsp->dev, "DSP%d: " fmt, _dsp->num, ##__VA_ARGS__)
43 #define adsp_info(_dsp, fmt, ...) \
44 dev_info(_dsp->dev, "DSP%d: " fmt, _dsp->num, ##__VA_ARGS__)
45 #define adsp_dbg(_dsp, fmt, ...) \
46 dev_dbg(_dsp->dev, "DSP%d: " fmt, _dsp->num, ##__VA_ARGS__)
48 #define ADSP1_CONTROL_1 0x00
49 #define ADSP1_CONTROL_2 0x02
50 #define ADSP1_CONTROL_3 0x03
51 #define ADSP1_CONTROL_4 0x04
52 #define ADSP1_CONTROL_5 0x06
53 #define ADSP1_CONTROL_6 0x07
54 #define ADSP1_CONTROL_7 0x08
55 #define ADSP1_CONTROL_8 0x09
56 #define ADSP1_CONTROL_9 0x0A
57 #define ADSP1_CONTROL_10 0x0B
58 #define ADSP1_CONTROL_11 0x0C
59 #define ADSP1_CONTROL_12 0x0D
60 #define ADSP1_CONTROL_13 0x0F
61 #define ADSP1_CONTROL_14 0x10
62 #define ADSP1_CONTROL_15 0x11
63 #define ADSP1_CONTROL_16 0x12
64 #define ADSP1_CONTROL_17 0x13
65 #define ADSP1_CONTROL_18 0x14
66 #define ADSP1_CONTROL_19 0x16
67 #define ADSP1_CONTROL_20 0x17
68 #define ADSP1_CONTROL_21 0x18
69 #define ADSP1_CONTROL_22 0x1A
70 #define ADSP1_CONTROL_23 0x1B
71 #define ADSP1_CONTROL_24 0x1C
72 #define ADSP1_CONTROL_25 0x1E
73 #define ADSP1_CONTROL_26 0x20
74 #define ADSP1_CONTROL_27 0x21
75 #define ADSP1_CONTROL_28 0x22
76 #define ADSP1_CONTROL_29 0x23
77 #define ADSP1_CONTROL_30 0x24
78 #define ADSP1_CONTROL_31 0x26
83 #define ADSP1_WDMA_BUFFER_LENGTH_MASK 0x00FF /* DSP1_WDMA_BUFFER_LENGTH - [7:0] */
84 #define ADSP1_WDMA_BUFFER_LENGTH_SHIFT 0 /* DSP1_WDMA_BUFFER_LENGTH - [7:0] */
85 #define ADSP1_WDMA_BUFFER_LENGTH_WIDTH 8 /* DSP1_WDMA_BUFFER_LENGTH - [7:0] */
91 #define ADSP1_DBG_CLK_ENA 0x0008 /* DSP1_DBG_CLK_ENA */
92 #define ADSP1_DBG_CLK_ENA_MASK 0x0008 /* DSP1_DBG_CLK_ENA */
93 #define ADSP1_DBG_CLK_ENA_SHIFT 3 /* DSP1_DBG_CLK_ENA */
94 #define ADSP1_DBG_CLK_ENA_WIDTH 1 /* DSP1_DBG_CLK_ENA */
95 #define ADSP1_SYS_ENA 0x0004 /* DSP1_SYS_ENA */
96 #define ADSP1_SYS_ENA_MASK 0x0004 /* DSP1_SYS_ENA */
97 #define ADSP1_SYS_ENA_SHIFT 2 /* DSP1_SYS_ENA */
98 #define ADSP1_SYS_ENA_WIDTH 1 /* DSP1_SYS_ENA */
99 #define ADSP1_CORE_ENA 0x0002 /* DSP1_CORE_ENA */
100 #define ADSP1_CORE_ENA_MASK 0x0002 /* DSP1_CORE_ENA */
101 #define ADSP1_CORE_ENA_SHIFT 1 /* DSP1_CORE_ENA */
102 #define ADSP1_CORE_ENA_WIDTH 1 /* DSP1_CORE_ENA */
103 #define ADSP1_START 0x0001 /* DSP1_START */
104 #define ADSP1_START_MASK 0x0001 /* DSP1_START */
105 #define ADSP1_START_SHIFT 0 /* DSP1_START */
106 #define ADSP1_START_WIDTH 1 /* DSP1_START */
111 #define ADSP1_CLK_SEL_MASK 0x0007 /* CLK_SEL_ENA */
112 #define ADSP1_CLK_SEL_SHIFT 0 /* CLK_SEL_ENA */
113 #define ADSP1_CLK_SEL_WIDTH 3 /* CLK_SEL_ENA */
115 #define ADSP2_CONTROL 0x0
116 #define ADSP2_CLOCKING 0x1
117 #define ADSP2_STATUS1 0x4
118 #define ADSP2_WDMA_CONFIG_1 0x30
119 #define ADSP2_WDMA_CONFIG_2 0x31
120 #define ADSP2_RDMA_CONFIG_1 0x34
122 #define ADSP2_SCRATCH0 0x40
123 #define ADSP2_SCRATCH1 0x41
124 #define ADSP2_SCRATCH2 0x42
125 #define ADSP2_SCRATCH3 0x43
131 #define ADSP2_MEM_ENA 0x0010 /* DSP1_MEM_ENA */
132 #define ADSP2_MEM_ENA_MASK 0x0010 /* DSP1_MEM_ENA */
133 #define ADSP2_MEM_ENA_SHIFT 4 /* DSP1_MEM_ENA */
134 #define ADSP2_MEM_ENA_WIDTH 1 /* DSP1_MEM_ENA */
135 #define ADSP2_SYS_ENA 0x0004 /* DSP1_SYS_ENA */
136 #define ADSP2_SYS_ENA_MASK 0x0004 /* DSP1_SYS_ENA */
137 #define ADSP2_SYS_ENA_SHIFT 2 /* DSP1_SYS_ENA */
138 #define ADSP2_SYS_ENA_WIDTH 1 /* DSP1_SYS_ENA */
139 #define ADSP2_CORE_ENA 0x0002 /* DSP1_CORE_ENA */
140 #define ADSP2_CORE_ENA_MASK 0x0002 /* DSP1_CORE_ENA */
141 #define ADSP2_CORE_ENA_SHIFT 1 /* DSP1_CORE_ENA */
142 #define ADSP2_CORE_ENA_WIDTH 1 /* DSP1_CORE_ENA */
143 #define ADSP2_START 0x0001 /* DSP1_START */
144 #define ADSP2_START_MASK 0x0001 /* DSP1_START */
145 #define ADSP2_START_SHIFT 0 /* DSP1_START */
146 #define ADSP2_START_WIDTH 1 /* DSP1_START */
151 #define ADSP2_CLK_SEL_MASK 0x0007 /* CLK_SEL_ENA */
152 #define ADSP2_CLK_SEL_SHIFT 0 /* CLK_SEL_ENA */
153 #define ADSP2_CLK_SEL_WIDTH 3 /* CLK_SEL_ENA */
158 #define ADSP2_RAM_RDY 0x0001
159 #define ADSP2_RAM_RDY_MASK 0x0001
160 #define ADSP2_RAM_RDY_SHIFT 0
161 #define ADSP2_RAM_RDY_WIDTH 1
163 #define ADSP_MAX_STD_CTRL_SIZE 512
166 struct list_head list;
170 static struct wm_adsp_buf *wm_adsp_buf_alloc(const void *src, size_t len,
171 struct list_head *list)
173 struct wm_adsp_buf *buf = kzalloc(sizeof(*buf), GFP_KERNEL);
178 buf->buf = vmalloc(len);
183 memcpy(buf->buf, src, len);
186 list_add_tail(&buf->list, list);
191 static void wm_adsp_buf_free(struct list_head *list)
193 while (!list_empty(list)) {
194 struct wm_adsp_buf *buf = list_first_entry(list,
197 list_del(&buf->list);
203 #define WM_ADSP_FW_MBC_VSS 0
204 #define WM_ADSP_FW_HIFI 1
205 #define WM_ADSP_FW_TX 2
206 #define WM_ADSP_FW_TX_SPK 3
207 #define WM_ADSP_FW_RX 4
208 #define WM_ADSP_FW_RX_ANC 5
209 #define WM_ADSP_FW_CTRL 6
210 #define WM_ADSP_FW_ASR 7
211 #define WM_ADSP_FW_TRACE 8
212 #define WM_ADSP_FW_SPK_PROT 9
213 #define WM_ADSP_FW_MISC 10
215 #define WM_ADSP_NUM_FW 11
217 static const char *wm_adsp_fw_text[WM_ADSP_NUM_FW] = {
218 [WM_ADSP_FW_MBC_VSS] = "MBC/VSS",
219 [WM_ADSP_FW_HIFI] = "MasterHiFi",
220 [WM_ADSP_FW_TX] = "Tx",
221 [WM_ADSP_FW_TX_SPK] = "Tx Speaker",
222 [WM_ADSP_FW_RX] = "Rx",
223 [WM_ADSP_FW_RX_ANC] = "Rx ANC",
224 [WM_ADSP_FW_CTRL] = "Voice Ctrl",
225 [WM_ADSP_FW_ASR] = "ASR Assist",
226 [WM_ADSP_FW_TRACE] = "Dbg Trace",
227 [WM_ADSP_FW_SPK_PROT] = "Protection",
228 [WM_ADSP_FW_MISC] = "Misc",
231 struct wm_adsp_system_config_xm_hdr {
237 __be32 dma_buffer_size;
240 __be32 build_job_name[3];
241 __be32 build_job_number;
244 struct wm_adsp_alg_xm_struct {
250 __be32 high_water_mark;
251 __be32 low_water_mark;
252 __be64 smoothed_power;
255 struct wm_adsp_buffer {
256 __be32 X_buf_base; /* XM base addr of first X area */
257 __be32 X_buf_size; /* Size of 1st X area in words */
258 __be32 X_buf_base2; /* XM base addr of 2nd X area */
259 __be32 X_buf_brk; /* Total X size in words */
260 __be32 Y_buf_base; /* YM base addr of Y area */
261 __be32 wrap; /* Total size X and Y in words */
262 __be32 high_water_mark; /* Point at which IRQ is asserted */
263 __be32 irq_count; /* bits 1-31 count IRQ assertions */
264 __be32 irq_ack; /* acked IRQ count, bit 0 enables IRQ */
265 __be32 next_write_index; /* word index of next write */
266 __be32 next_read_index; /* word index of next read */
267 __be32 error; /* error if any */
268 __be32 oldest_block_index; /* word index of oldest surviving */
269 __be32 requested_rewind; /* how many blocks rewind was done */
270 __be32 reserved_space; /* internal */
271 __be32 min_free; /* min free space since stream start */
272 __be32 blocks_written[2]; /* total blocks written (64 bit) */
273 __be32 words_written[2]; /* total words written (64 bit) */
276 struct wm_adsp_compr;
278 struct wm_adsp_compr_buf {
280 struct wm_adsp_compr *compr;
282 struct wm_adsp_buffer_region *regions;
291 struct wm_adsp_compr {
293 struct wm_adsp_compr_buf *buf;
295 struct snd_compr_stream *stream;
296 struct snd_compressed_buffer size;
299 unsigned int copied_total;
301 unsigned int sample_rate;
304 #define WM_ADSP_DATA_WORD_SIZE 3
306 #define WM_ADSP_MIN_FRAGMENTS 1
307 #define WM_ADSP_MAX_FRAGMENTS 256
308 #define WM_ADSP_MIN_FRAGMENT_SIZE (64 * WM_ADSP_DATA_WORD_SIZE)
309 #define WM_ADSP_MAX_FRAGMENT_SIZE (4096 * WM_ADSP_DATA_WORD_SIZE)
311 #define WM_ADSP_ALG_XM_STRUCT_MAGIC 0x49aec7
313 #define HOST_BUFFER_FIELD(field) \
314 (offsetof(struct wm_adsp_buffer, field) / sizeof(__be32))
316 #define ALG_XM_FIELD(field) \
317 (offsetof(struct wm_adsp_alg_xm_struct, field) / sizeof(__be32))
319 static int wm_adsp_buffer_init(struct wm_adsp *dsp);
320 static int wm_adsp_buffer_free(struct wm_adsp *dsp);
322 struct wm_adsp_buffer_region {
324 unsigned int cumulative_size;
325 unsigned int mem_type;
326 unsigned int base_addr;
329 struct wm_adsp_buffer_region_def {
330 unsigned int mem_type;
331 unsigned int base_offset;
332 unsigned int size_offset;
335 static const struct wm_adsp_buffer_region_def default_regions[] = {
337 .mem_type = WMFW_ADSP2_XM,
338 .base_offset = HOST_BUFFER_FIELD(X_buf_base),
339 .size_offset = HOST_BUFFER_FIELD(X_buf_size),
342 .mem_type = WMFW_ADSP2_XM,
343 .base_offset = HOST_BUFFER_FIELD(X_buf_base2),
344 .size_offset = HOST_BUFFER_FIELD(X_buf_brk),
347 .mem_type = WMFW_ADSP2_YM,
348 .base_offset = HOST_BUFFER_FIELD(Y_buf_base),
349 .size_offset = HOST_BUFFER_FIELD(wrap),
353 struct wm_adsp_fw_caps {
355 struct snd_codec_desc desc;
357 const struct wm_adsp_buffer_region_def *region_defs;
360 static const struct wm_adsp_fw_caps ctrl_caps[] = {
362 .id = SND_AUDIOCODEC_BESPOKE,
365 .sample_rates = { 16000 },
366 .num_sample_rates = 1,
367 .formats = SNDRV_PCM_FMTBIT_S16_LE,
369 .num_regions = ARRAY_SIZE(default_regions),
370 .region_defs = default_regions,
374 static const struct wm_adsp_fw_caps trace_caps[] = {
376 .id = SND_AUDIOCODEC_BESPOKE,
380 4000, 8000, 11025, 12000, 16000, 22050,
381 24000, 32000, 44100, 48000, 64000, 88200,
382 96000, 176400, 192000
384 .num_sample_rates = 15,
385 .formats = SNDRV_PCM_FMTBIT_S16_LE,
387 .num_regions = ARRAY_SIZE(default_regions),
388 .region_defs = default_regions,
392 static const struct {
396 const struct wm_adsp_fw_caps *caps;
398 } wm_adsp_fw[WM_ADSP_NUM_FW] = {
399 [WM_ADSP_FW_MBC_VSS] = { .file = "mbc-vss" },
400 [WM_ADSP_FW_HIFI] = { .file = "hifi" },
401 [WM_ADSP_FW_TX] = { .file = "tx" },
402 [WM_ADSP_FW_TX_SPK] = { .file = "tx-spk" },
403 [WM_ADSP_FW_RX] = { .file = "rx" },
404 [WM_ADSP_FW_RX_ANC] = { .file = "rx-anc" },
405 [WM_ADSP_FW_CTRL] = {
407 .compr_direction = SND_COMPRESS_CAPTURE,
408 .num_caps = ARRAY_SIZE(ctrl_caps),
410 .voice_trigger = true,
412 [WM_ADSP_FW_ASR] = { .file = "asr" },
413 [WM_ADSP_FW_TRACE] = {
415 .compr_direction = SND_COMPRESS_CAPTURE,
416 .num_caps = ARRAY_SIZE(trace_caps),
419 [WM_ADSP_FW_SPK_PROT] = { .file = "spk-prot" },
420 [WM_ADSP_FW_MISC] = { .file = "misc" },
423 struct wm_coeff_ctl_ops {
424 int (*xget)(struct snd_kcontrol *kcontrol,
425 struct snd_ctl_elem_value *ucontrol);
426 int (*xput)(struct snd_kcontrol *kcontrol,
427 struct snd_ctl_elem_value *ucontrol);
428 int (*xinfo)(struct snd_kcontrol *kcontrol,
429 struct snd_ctl_elem_info *uinfo);
432 struct wm_coeff_ctl {
435 struct wm_adsp_alg_region alg_region;
436 struct wm_coeff_ctl_ops ops;
438 unsigned int enabled:1;
439 struct list_head list;
444 struct snd_kcontrol *kcontrol;
445 struct soc_bytes_ext bytes_ext;
449 #ifdef CONFIG_DEBUG_FS
450 static void wm_adsp_debugfs_save_wmfwname(struct wm_adsp *dsp, const char *s)
452 char *tmp = kasprintf(GFP_KERNEL, "%s\n", s);
454 kfree(dsp->wmfw_file_name);
455 dsp->wmfw_file_name = tmp;
458 static void wm_adsp_debugfs_save_binname(struct wm_adsp *dsp, const char *s)
460 char *tmp = kasprintf(GFP_KERNEL, "%s\n", s);
462 kfree(dsp->bin_file_name);
463 dsp->bin_file_name = tmp;
466 static void wm_adsp_debugfs_clear(struct wm_adsp *dsp)
468 kfree(dsp->wmfw_file_name);
469 kfree(dsp->bin_file_name);
470 dsp->wmfw_file_name = NULL;
471 dsp->bin_file_name = NULL;
474 static ssize_t wm_adsp_debugfs_wmfw_read(struct file *file,
475 char __user *user_buf,
476 size_t count, loff_t *ppos)
478 struct wm_adsp *dsp = file->private_data;
481 mutex_lock(&dsp->pwr_lock);
483 if (!dsp->wmfw_file_name || !dsp->booted)
486 ret = simple_read_from_buffer(user_buf, count, ppos,
488 strlen(dsp->wmfw_file_name));
490 mutex_unlock(&dsp->pwr_lock);
494 static ssize_t wm_adsp_debugfs_bin_read(struct file *file,
495 char __user *user_buf,
496 size_t count, loff_t *ppos)
498 struct wm_adsp *dsp = file->private_data;
501 mutex_lock(&dsp->pwr_lock);
503 if (!dsp->bin_file_name || !dsp->booted)
506 ret = simple_read_from_buffer(user_buf, count, ppos,
508 strlen(dsp->bin_file_name));
510 mutex_unlock(&dsp->pwr_lock);
514 static const struct {
516 const struct file_operations fops;
517 } wm_adsp_debugfs_fops[] = {
519 .name = "wmfw_file_name",
522 .read = wm_adsp_debugfs_wmfw_read,
526 .name = "bin_file_name",
529 .read = wm_adsp_debugfs_bin_read,
534 static void wm_adsp2_init_debugfs(struct wm_adsp *dsp,
535 struct snd_soc_codec *codec)
537 struct dentry *root = NULL;
541 if (!codec->component.debugfs_root) {
542 adsp_err(dsp, "No codec debugfs root\n");
546 root_name = kmalloc(PAGE_SIZE, GFP_KERNEL);
550 snprintf(root_name, PAGE_SIZE, "dsp%d", dsp->num);
551 root = debugfs_create_dir(root_name, codec->component.debugfs_root);
557 if (!debugfs_create_bool("booted", S_IRUGO, root, &dsp->booted))
560 if (!debugfs_create_bool("running", S_IRUGO, root, &dsp->running))
563 if (!debugfs_create_x32("fw_id", S_IRUGO, root, &dsp->fw_id))
566 if (!debugfs_create_x32("fw_version", S_IRUGO, root,
567 &dsp->fw_id_version))
570 for (i = 0; i < ARRAY_SIZE(wm_adsp_debugfs_fops); ++i) {
571 if (!debugfs_create_file(wm_adsp_debugfs_fops[i].name,
573 &wm_adsp_debugfs_fops[i].fops))
577 dsp->debugfs_root = root;
581 debugfs_remove_recursive(root);
582 adsp_err(dsp, "Failed to create debugfs\n");
585 static void wm_adsp2_cleanup_debugfs(struct wm_adsp *dsp)
587 wm_adsp_debugfs_clear(dsp);
588 debugfs_remove_recursive(dsp->debugfs_root);
591 static inline void wm_adsp2_init_debugfs(struct wm_adsp *dsp,
592 struct snd_soc_codec *codec)
596 static inline void wm_adsp2_cleanup_debugfs(struct wm_adsp *dsp)
600 static inline void wm_adsp_debugfs_save_wmfwname(struct wm_adsp *dsp,
605 static inline void wm_adsp_debugfs_save_binname(struct wm_adsp *dsp,
610 static inline void wm_adsp_debugfs_clear(struct wm_adsp *dsp)
615 static int wm_adsp_fw_get(struct snd_kcontrol *kcontrol,
616 struct snd_ctl_elem_value *ucontrol)
618 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
619 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
620 struct wm_adsp *dsp = snd_soc_codec_get_drvdata(codec);
622 ucontrol->value.enumerated.item[0] = dsp[e->shift_l].fw;
627 static int wm_adsp_fw_put(struct snd_kcontrol *kcontrol,
628 struct snd_ctl_elem_value *ucontrol)
630 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
631 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
632 struct wm_adsp *dsp = snd_soc_codec_get_drvdata(codec);
635 if (ucontrol->value.enumerated.item[0] == dsp[e->shift_l].fw)
638 if (ucontrol->value.enumerated.item[0] >= WM_ADSP_NUM_FW)
641 mutex_lock(&dsp[e->shift_l].pwr_lock);
643 if (dsp[e->shift_l].booted || dsp[e->shift_l].compr)
646 dsp[e->shift_l].fw = ucontrol->value.enumerated.item[0];
648 mutex_unlock(&dsp[e->shift_l].pwr_lock);
653 static const struct soc_enum wm_adsp_fw_enum[] = {
654 SOC_ENUM_SINGLE(0, 0, ARRAY_SIZE(wm_adsp_fw_text), wm_adsp_fw_text),
655 SOC_ENUM_SINGLE(0, 1, ARRAY_SIZE(wm_adsp_fw_text), wm_adsp_fw_text),
656 SOC_ENUM_SINGLE(0, 2, ARRAY_SIZE(wm_adsp_fw_text), wm_adsp_fw_text),
657 SOC_ENUM_SINGLE(0, 3, ARRAY_SIZE(wm_adsp_fw_text), wm_adsp_fw_text),
660 const struct snd_kcontrol_new wm_adsp_fw_controls[] = {
661 SOC_ENUM_EXT("DSP1 Firmware", wm_adsp_fw_enum[0],
662 wm_adsp_fw_get, wm_adsp_fw_put),
663 SOC_ENUM_EXT("DSP2 Firmware", wm_adsp_fw_enum[1],
664 wm_adsp_fw_get, wm_adsp_fw_put),
665 SOC_ENUM_EXT("DSP3 Firmware", wm_adsp_fw_enum[2],
666 wm_adsp_fw_get, wm_adsp_fw_put),
667 SOC_ENUM_EXT("DSP4 Firmware", wm_adsp_fw_enum[3],
668 wm_adsp_fw_get, wm_adsp_fw_put),
670 EXPORT_SYMBOL_GPL(wm_adsp_fw_controls);
672 static struct wm_adsp_region const *wm_adsp_find_region(struct wm_adsp *dsp,
677 for (i = 0; i < dsp->num_mems; i++)
678 if (dsp->mem[i].type == type)
684 static unsigned int wm_adsp_region_to_reg(struct wm_adsp_region const *mem,
691 return mem->base + (offset * 3);
693 return mem->base + (offset * 2);
695 return mem->base + (offset * 2);
697 return mem->base + (offset * 2);
699 return mem->base + (offset * 2);
701 WARN(1, "Unknown memory region type");
706 static void wm_adsp2_show_fw_status(struct wm_adsp *dsp)
711 ret = regmap_raw_read(dsp->regmap, dsp->base + ADSP2_SCRATCH0,
712 scratch, sizeof(scratch));
714 adsp_err(dsp, "Failed to read SCRATCH regs: %d\n", ret);
718 adsp_dbg(dsp, "FW SCRATCH 0:0x%x 1:0x%x 2:0x%x 3:0x%x\n",
719 be16_to_cpu(scratch[0]),
720 be16_to_cpu(scratch[1]),
721 be16_to_cpu(scratch[2]),
722 be16_to_cpu(scratch[3]));
725 static inline struct wm_coeff_ctl *bytes_ext_to_ctl(struct soc_bytes_ext *ext)
727 return container_of(ext, struct wm_coeff_ctl, bytes_ext);
730 static int wm_coeff_info(struct snd_kcontrol *kctl,
731 struct snd_ctl_elem_info *uinfo)
733 struct soc_bytes_ext *bytes_ext =
734 (struct soc_bytes_ext *)kctl->private_value;
735 struct wm_coeff_ctl *ctl = bytes_ext_to_ctl(bytes_ext);
737 uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
738 uinfo->count = ctl->len;
742 static int wm_coeff_write_control(struct wm_coeff_ctl *ctl,
743 const void *buf, size_t len)
745 struct wm_adsp_alg_region *alg_region = &ctl->alg_region;
746 const struct wm_adsp_region *mem;
747 struct wm_adsp *dsp = ctl->dsp;
752 mem = wm_adsp_find_region(dsp, alg_region->type);
754 adsp_err(dsp, "No base for region %x\n",
759 reg = ctl->alg_region.base + ctl->offset;
760 reg = wm_adsp_region_to_reg(mem, reg);
762 scratch = kmemdup(buf, len, GFP_KERNEL | GFP_DMA);
766 ret = regmap_raw_write(dsp->regmap, reg, scratch,
769 adsp_err(dsp, "Failed to write %zu bytes to %x: %d\n",
774 adsp_dbg(dsp, "Wrote %zu bytes to %x\n", len, reg);
781 static int wm_coeff_put(struct snd_kcontrol *kctl,
782 struct snd_ctl_elem_value *ucontrol)
784 struct soc_bytes_ext *bytes_ext =
785 (struct soc_bytes_ext *)kctl->private_value;
786 struct wm_coeff_ctl *ctl = bytes_ext_to_ctl(bytes_ext);
787 char *p = ucontrol->value.bytes.data;
790 mutex_lock(&ctl->dsp->pwr_lock);
792 if (ctl->flags & WMFW_CTL_FLAG_VOLATILE)
795 memcpy(ctl->cache, p, ctl->len);
798 if (ctl->enabled && ctl->dsp->running)
799 ret = wm_coeff_write_control(ctl, p, ctl->len);
801 mutex_unlock(&ctl->dsp->pwr_lock);
806 static int wm_coeff_tlv_put(struct snd_kcontrol *kctl,
807 const unsigned int __user *bytes, unsigned int size)
809 struct soc_bytes_ext *bytes_ext =
810 (struct soc_bytes_ext *)kctl->private_value;
811 struct wm_coeff_ctl *ctl = bytes_ext_to_ctl(bytes_ext);
814 mutex_lock(&ctl->dsp->pwr_lock);
816 if (copy_from_user(ctl->cache, bytes, size)) {
820 if (ctl->enabled && ctl->dsp->running)
821 ret = wm_coeff_write_control(ctl, ctl->cache, size);
822 else if (ctl->flags & WMFW_CTL_FLAG_VOLATILE)
826 mutex_unlock(&ctl->dsp->pwr_lock);
831 static int wm_coeff_read_control(struct wm_coeff_ctl *ctl,
832 void *buf, size_t len)
834 struct wm_adsp_alg_region *alg_region = &ctl->alg_region;
835 const struct wm_adsp_region *mem;
836 struct wm_adsp *dsp = ctl->dsp;
841 mem = wm_adsp_find_region(dsp, alg_region->type);
843 adsp_err(dsp, "No base for region %x\n",
848 reg = ctl->alg_region.base + ctl->offset;
849 reg = wm_adsp_region_to_reg(mem, reg);
851 scratch = kmalloc(len, GFP_KERNEL | GFP_DMA);
855 ret = regmap_raw_read(dsp->regmap, reg, scratch, len);
857 adsp_err(dsp, "Failed to read %zu bytes from %x: %d\n",
862 adsp_dbg(dsp, "Read %zu bytes from %x\n", len, reg);
864 memcpy(buf, scratch, len);
870 static int wm_coeff_get(struct snd_kcontrol *kctl,
871 struct snd_ctl_elem_value *ucontrol)
873 struct soc_bytes_ext *bytes_ext =
874 (struct soc_bytes_ext *)kctl->private_value;
875 struct wm_coeff_ctl *ctl = bytes_ext_to_ctl(bytes_ext);
876 char *p = ucontrol->value.bytes.data;
879 mutex_lock(&ctl->dsp->pwr_lock);
881 if (ctl->flags & WMFW_CTL_FLAG_VOLATILE) {
882 if (ctl->enabled && ctl->dsp->running)
883 ret = wm_coeff_read_control(ctl, p, ctl->len);
887 if (!ctl->flags && ctl->enabled && ctl->dsp->running)
888 ret = wm_coeff_read_control(ctl, ctl->cache, ctl->len);
890 memcpy(p, ctl->cache, ctl->len);
893 mutex_unlock(&ctl->dsp->pwr_lock);
898 static int wm_coeff_tlv_get(struct snd_kcontrol *kctl,
899 unsigned int __user *bytes, unsigned int size)
901 struct soc_bytes_ext *bytes_ext =
902 (struct soc_bytes_ext *)kctl->private_value;
903 struct wm_coeff_ctl *ctl = bytes_ext_to_ctl(bytes_ext);
906 mutex_lock(&ctl->dsp->pwr_lock);
908 if (ctl->flags & WMFW_CTL_FLAG_VOLATILE) {
909 if (ctl->enabled && ctl->dsp->running)
910 ret = wm_coeff_read_control(ctl, ctl->cache, size);
914 if (!ctl->flags && ctl->enabled && ctl->dsp->running)
915 ret = wm_coeff_read_control(ctl, ctl->cache, size);
918 if (!ret && copy_to_user(bytes, ctl->cache, size))
921 mutex_unlock(&ctl->dsp->pwr_lock);
926 struct wmfw_ctl_work {
928 struct wm_coeff_ctl *ctl;
929 struct work_struct work;
932 static unsigned int wmfw_convert_flags(unsigned int in, unsigned int len)
934 unsigned int out, rd, wr, vol;
936 if (len > ADSP_MAX_STD_CTRL_SIZE) {
937 rd = SNDRV_CTL_ELEM_ACCESS_TLV_READ;
938 wr = SNDRV_CTL_ELEM_ACCESS_TLV_WRITE;
939 vol = SNDRV_CTL_ELEM_ACCESS_VOLATILE;
941 out = SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK;
943 rd = SNDRV_CTL_ELEM_ACCESS_READ;
944 wr = SNDRV_CTL_ELEM_ACCESS_WRITE;
945 vol = SNDRV_CTL_ELEM_ACCESS_VOLATILE;
952 if (in & WMFW_CTL_FLAG_WRITEABLE)
954 if (in & WMFW_CTL_FLAG_VOLATILE)
957 out |= rd | wr | vol;
963 static int wmfw_add_ctl(struct wm_adsp *dsp, struct wm_coeff_ctl *ctl)
965 struct snd_kcontrol_new *kcontrol;
968 if (!ctl || !ctl->name)
971 kcontrol = kzalloc(sizeof(*kcontrol), GFP_KERNEL);
974 kcontrol->iface = SNDRV_CTL_ELEM_IFACE_MIXER;
976 kcontrol->name = ctl->name;
977 kcontrol->info = wm_coeff_info;
978 kcontrol->get = wm_coeff_get;
979 kcontrol->put = wm_coeff_put;
980 kcontrol->iface = SNDRV_CTL_ELEM_IFACE_MIXER;
981 kcontrol->tlv.c = snd_soc_bytes_tlv_callback;
982 kcontrol->private_value = (unsigned long)&ctl->bytes_ext;
984 ctl->bytes_ext.max = ctl->len;
985 ctl->bytes_ext.get = wm_coeff_tlv_get;
986 ctl->bytes_ext.put = wm_coeff_tlv_put;
988 kcontrol->access = wmfw_convert_flags(ctl->flags, ctl->len);
990 ret = snd_soc_add_card_controls(dsp->card, kcontrol, 1);
996 ctl->kcontrol = snd_soc_card_get_kcontrol(dsp->card, ctl->name);
1005 static int wm_coeff_init_control_caches(struct wm_adsp *dsp)
1007 struct wm_coeff_ctl *ctl;
1010 list_for_each_entry(ctl, &dsp->ctl_list, list) {
1011 if (!ctl->enabled || ctl->set)
1013 if (ctl->flags & WMFW_CTL_FLAG_VOLATILE)
1016 ret = wm_coeff_read_control(ctl, ctl->cache, ctl->len);
1024 static int wm_coeff_sync_controls(struct wm_adsp *dsp)
1026 struct wm_coeff_ctl *ctl;
1029 list_for_each_entry(ctl, &dsp->ctl_list, list) {
1032 if (ctl->set && !(ctl->flags & WMFW_CTL_FLAG_VOLATILE)) {
1033 ret = wm_coeff_write_control(ctl, ctl->cache, ctl->len);
1042 static void wm_adsp_ctl_work(struct work_struct *work)
1044 struct wmfw_ctl_work *ctl_work = container_of(work,
1045 struct wmfw_ctl_work,
1048 wmfw_add_ctl(ctl_work->dsp, ctl_work->ctl);
1052 static void wm_adsp_free_ctl_blk(struct wm_coeff_ctl *ctl)
1059 static int wm_adsp_create_control(struct wm_adsp *dsp,
1060 const struct wm_adsp_alg_region *alg_region,
1061 unsigned int offset, unsigned int len,
1062 const char *subname, unsigned int subname_len,
1065 struct wm_coeff_ctl *ctl;
1066 struct wmfw_ctl_work *ctl_work;
1067 char name[SNDRV_CTL_ELEM_ID_NAME_MAXLEN];
1071 if (flags & WMFW_CTL_FLAG_SYS)
1074 switch (alg_region->type) {
1091 adsp_err(dsp, "Unknown region type: %d\n", alg_region->type);
1095 switch (dsp->fw_ver) {
1098 snprintf(name, SNDRV_CTL_ELEM_ID_NAME_MAXLEN, "DSP%d %s %x",
1099 dsp->num, region_name, alg_region->alg);
1102 ret = snprintf(name, SNDRV_CTL_ELEM_ID_NAME_MAXLEN,
1103 "DSP%d%c %.12s %x", dsp->num, *region_name,
1104 wm_adsp_fw_text[dsp->fw], alg_region->alg);
1106 /* Truncate the subname from the start if it is too long */
1108 int avail = SNDRV_CTL_ELEM_ID_NAME_MAXLEN - ret - 2;
1111 if (subname_len > avail)
1112 skip = subname_len - avail;
1114 snprintf(name + ret,
1115 SNDRV_CTL_ELEM_ID_NAME_MAXLEN - ret, " %.*s",
1116 subname_len - skip, subname + skip);
1121 list_for_each_entry(ctl, &dsp->ctl_list, list) {
1122 if (!strcmp(ctl->name, name)) {
1129 ctl = kzalloc(sizeof(*ctl), GFP_KERNEL);
1132 ctl->fw_name = wm_adsp_fw_text[dsp->fw];
1133 ctl->alg_region = *alg_region;
1134 ctl->name = kmemdup(name, strlen(name) + 1, GFP_KERNEL);
1141 ctl->ops.xget = wm_coeff_get;
1142 ctl->ops.xput = wm_coeff_put;
1146 ctl->offset = offset;
1148 ctl->cache = kzalloc(ctl->len, GFP_KERNEL);
1154 list_add(&ctl->list, &dsp->ctl_list);
1156 ctl_work = kzalloc(sizeof(*ctl_work), GFP_KERNEL);
1162 ctl_work->dsp = dsp;
1163 ctl_work->ctl = ctl;
1164 INIT_WORK(&ctl_work->work, wm_adsp_ctl_work);
1165 schedule_work(&ctl_work->work);
1170 list_del(&ctl->list);
1180 struct wm_coeff_parsed_alg {
1187 struct wm_coeff_parsed_coeff {
1197 static int wm_coeff_parse_string(int bytes, const u8 **pos, const u8 **str)
1206 length = le16_to_cpu(*((__le16 *)*pos));
1213 *str = *pos + bytes;
1215 *pos += ((length + bytes) + 3) & ~0x03;
1220 static int wm_coeff_parse_int(int bytes, const u8 **pos)
1226 val = le16_to_cpu(*((__le16 *)*pos));
1229 val = le32_to_cpu(*((__le32 *)*pos));
1240 static inline void wm_coeff_parse_alg(struct wm_adsp *dsp, const u8 **data,
1241 struct wm_coeff_parsed_alg *blk)
1243 const struct wmfw_adsp_alg_data *raw;
1245 switch (dsp->fw_ver) {
1248 raw = (const struct wmfw_adsp_alg_data *)*data;
1251 blk->id = le32_to_cpu(raw->id);
1252 blk->name = raw->name;
1253 blk->name_len = strlen(raw->name);
1254 blk->ncoeff = le32_to_cpu(raw->ncoeff);
1257 blk->id = wm_coeff_parse_int(sizeof(raw->id), data);
1258 blk->name_len = wm_coeff_parse_string(sizeof(u8), data,
1260 wm_coeff_parse_string(sizeof(u16), data, NULL);
1261 blk->ncoeff = wm_coeff_parse_int(sizeof(raw->ncoeff), data);
1265 adsp_dbg(dsp, "Algorithm ID: %#x\n", blk->id);
1266 adsp_dbg(dsp, "Algorithm name: %.*s\n", blk->name_len, blk->name);
1267 adsp_dbg(dsp, "# of coefficient descriptors: %#x\n", blk->ncoeff);
1270 static inline void wm_coeff_parse_coeff(struct wm_adsp *dsp, const u8 **data,
1271 struct wm_coeff_parsed_coeff *blk)
1273 const struct wmfw_adsp_coeff_data *raw;
1277 switch (dsp->fw_ver) {
1280 raw = (const struct wmfw_adsp_coeff_data *)*data;
1281 *data = *data + sizeof(raw->hdr) + le32_to_cpu(raw->hdr.size);
1283 blk->offset = le16_to_cpu(raw->hdr.offset);
1284 blk->mem_type = le16_to_cpu(raw->hdr.type);
1285 blk->name = raw->name;
1286 blk->name_len = strlen(raw->name);
1287 blk->ctl_type = le16_to_cpu(raw->ctl_type);
1288 blk->flags = le16_to_cpu(raw->flags);
1289 blk->len = le32_to_cpu(raw->len);
1293 blk->offset = wm_coeff_parse_int(sizeof(raw->hdr.offset), &tmp);
1294 blk->mem_type = wm_coeff_parse_int(sizeof(raw->hdr.type), &tmp);
1295 length = wm_coeff_parse_int(sizeof(raw->hdr.size), &tmp);
1296 blk->name_len = wm_coeff_parse_string(sizeof(u8), &tmp,
1298 wm_coeff_parse_string(sizeof(u8), &tmp, NULL);
1299 wm_coeff_parse_string(sizeof(u16), &tmp, NULL);
1300 blk->ctl_type = wm_coeff_parse_int(sizeof(raw->ctl_type), &tmp);
1301 blk->flags = wm_coeff_parse_int(sizeof(raw->flags), &tmp);
1302 blk->len = wm_coeff_parse_int(sizeof(raw->len), &tmp);
1304 *data = *data + sizeof(raw->hdr) + length;
1308 adsp_dbg(dsp, "\tCoefficient type: %#x\n", blk->mem_type);
1309 adsp_dbg(dsp, "\tCoefficient offset: %#x\n", blk->offset);
1310 adsp_dbg(dsp, "\tCoefficient name: %.*s\n", blk->name_len, blk->name);
1311 adsp_dbg(dsp, "\tCoefficient flags: %#x\n", blk->flags);
1312 adsp_dbg(dsp, "\tALSA control type: %#x\n", blk->ctl_type);
1313 adsp_dbg(dsp, "\tALSA control len: %#x\n", blk->len);
1316 static int wm_adsp_parse_coeff(struct wm_adsp *dsp,
1317 const struct wmfw_region *region)
1319 struct wm_adsp_alg_region alg_region = {};
1320 struct wm_coeff_parsed_alg alg_blk;
1321 struct wm_coeff_parsed_coeff coeff_blk;
1322 const u8 *data = region->data;
1325 wm_coeff_parse_alg(dsp, &data, &alg_blk);
1326 for (i = 0; i < alg_blk.ncoeff; i++) {
1327 wm_coeff_parse_coeff(dsp, &data, &coeff_blk);
1329 switch (coeff_blk.ctl_type) {
1330 case SNDRV_CTL_ELEM_TYPE_BYTES:
1333 adsp_err(dsp, "Unknown control type: %d\n",
1334 coeff_blk.ctl_type);
1338 alg_region.type = coeff_blk.mem_type;
1339 alg_region.alg = alg_blk.id;
1341 ret = wm_adsp_create_control(dsp, &alg_region,
1348 adsp_err(dsp, "Failed to create control: %.*s, %d\n",
1349 coeff_blk.name_len, coeff_blk.name, ret);
1355 static int wm_adsp_load(struct wm_adsp *dsp)
1357 LIST_HEAD(buf_list);
1358 const struct firmware *firmware;
1359 struct regmap *regmap = dsp->regmap;
1360 unsigned int pos = 0;
1361 const struct wmfw_header *header;
1362 const struct wmfw_adsp1_sizes *adsp1_sizes;
1363 const struct wmfw_adsp2_sizes *adsp2_sizes;
1364 const struct wmfw_footer *footer;
1365 const struct wmfw_region *region;
1366 const struct wm_adsp_region *mem;
1367 const char *region_name;
1368 char *file, *text = NULL;
1369 struct wm_adsp_buf *buf;
1372 int ret, offset, type, sizes;
1374 file = kzalloc(PAGE_SIZE, GFP_KERNEL);
1378 snprintf(file, PAGE_SIZE, "/*(DEBLOBBED)*/", dsp->part, dsp->num,
1379 wm_adsp_fw[dsp->fw].file);
1380 file[PAGE_SIZE - 1] = '\0';
1382 ret = reject_firmware(&firmware, file, dsp->dev);
1384 adsp_err(dsp, "Failed to request '%s'\n", file);
1389 pos = sizeof(*header) + sizeof(*adsp1_sizes) + sizeof(*footer);
1390 if (pos >= firmware->size) {
1391 adsp_err(dsp, "%s: file too short, %zu bytes\n",
1392 file, firmware->size);
1396 header = (void *)&firmware->data[0];
1398 if (memcmp(&header->magic[0], "WMFW", 4) != 0) {
1399 adsp_err(dsp, "%s: invalid magic\n", file);
1403 switch (header->ver) {
1405 adsp_warn(dsp, "%s: Depreciated file format %d\n",
1412 adsp_err(dsp, "%s: unknown file format %d\n",
1417 adsp_info(dsp, "Firmware version: %d\n", header->ver);
1418 dsp->fw_ver = header->ver;
1420 if (header->core != dsp->type) {
1421 adsp_err(dsp, "%s: invalid core %d != %d\n",
1422 file, header->core, dsp->type);
1426 switch (dsp->type) {
1428 pos = sizeof(*header) + sizeof(*adsp1_sizes) + sizeof(*footer);
1429 adsp1_sizes = (void *)&(header[1]);
1430 footer = (void *)&(adsp1_sizes[1]);
1431 sizes = sizeof(*adsp1_sizes);
1433 adsp_dbg(dsp, "%s: %d DM, %d PM, %d ZM\n",
1434 file, le32_to_cpu(adsp1_sizes->dm),
1435 le32_to_cpu(adsp1_sizes->pm),
1436 le32_to_cpu(adsp1_sizes->zm));
1440 pos = sizeof(*header) + sizeof(*adsp2_sizes) + sizeof(*footer);
1441 adsp2_sizes = (void *)&(header[1]);
1442 footer = (void *)&(adsp2_sizes[1]);
1443 sizes = sizeof(*adsp2_sizes);
1445 adsp_dbg(dsp, "%s: %d XM, %d YM %d PM, %d ZM\n",
1446 file, le32_to_cpu(adsp2_sizes->xm),
1447 le32_to_cpu(adsp2_sizes->ym),
1448 le32_to_cpu(adsp2_sizes->pm),
1449 le32_to_cpu(adsp2_sizes->zm));
1453 WARN(1, "Unknown DSP type");
1457 if (le32_to_cpu(header->len) != sizeof(*header) +
1458 sizes + sizeof(*footer)) {
1459 adsp_err(dsp, "%s: unexpected header length %d\n",
1460 file, le32_to_cpu(header->len));
1464 adsp_dbg(dsp, "%s: timestamp %llu\n", file,
1465 le64_to_cpu(footer->timestamp));
1467 while (pos < firmware->size &&
1468 sizeof(*region) < firmware->size - pos) {
1469 region = (void *)&(firmware->data[pos]);
1470 region_name = "Unknown";
1473 offset = le32_to_cpu(region->offset) & 0xffffff;
1474 type = be32_to_cpu(region->type) & 0xff;
1475 mem = wm_adsp_find_region(dsp, type);
1478 case WMFW_NAME_TEXT:
1479 region_name = "Firmware name";
1480 text = kzalloc(le32_to_cpu(region->len) + 1,
1483 case WMFW_ALGORITHM_DATA:
1484 region_name = "Algorithm";
1485 ret = wm_adsp_parse_coeff(dsp, region);
1489 case WMFW_INFO_TEXT:
1490 region_name = "Information";
1491 text = kzalloc(le32_to_cpu(region->len) + 1,
1495 region_name = "Absolute";
1500 reg = wm_adsp_region_to_reg(mem, offset);
1504 reg = wm_adsp_region_to_reg(mem, offset);
1508 reg = wm_adsp_region_to_reg(mem, offset);
1512 reg = wm_adsp_region_to_reg(mem, offset);
1516 reg = wm_adsp_region_to_reg(mem, offset);
1520 "%s.%d: Unknown region type %x at %d(%x)\n",
1521 file, regions, type, pos, pos);
1525 adsp_dbg(dsp, "%s.%d: %d bytes at %d in %s\n", file,
1526 regions, le32_to_cpu(region->len), offset,
1529 if (le32_to_cpu(region->len) >
1530 firmware->size - pos - sizeof(*region)) {
1532 "%s.%d: %s region len %d bytes exceeds file length %zu\n",
1533 file, regions, region_name,
1534 le32_to_cpu(region->len), firmware->size);
1540 memcpy(text, region->data, le32_to_cpu(region->len));
1541 adsp_info(dsp, "%s: %s\n", file, text);
1547 buf = wm_adsp_buf_alloc(region->data,
1548 le32_to_cpu(region->len),
1551 adsp_err(dsp, "Out of memory\n");
1556 ret = regmap_raw_write_async(regmap, reg, buf->buf,
1557 le32_to_cpu(region->len));
1560 "%s.%d: Failed to write %d bytes at %d in %s: %d\n",
1562 le32_to_cpu(region->len), offset,
1568 pos += le32_to_cpu(region->len) + sizeof(*region);
1572 ret = regmap_async_complete(regmap);
1574 adsp_err(dsp, "Failed to complete async write: %d\n", ret);
1578 if (pos > firmware->size)
1579 adsp_warn(dsp, "%s.%d: %zu bytes at end of file\n",
1580 file, regions, pos - firmware->size);
1582 wm_adsp_debugfs_save_wmfwname(dsp, file);
1585 regmap_async_complete(regmap);
1586 wm_adsp_buf_free(&buf_list);
1587 release_firmware(firmware);
1595 static void wm_adsp_ctl_fixup_base(struct wm_adsp *dsp,
1596 const struct wm_adsp_alg_region *alg_region)
1598 struct wm_coeff_ctl *ctl;
1600 list_for_each_entry(ctl, &dsp->ctl_list, list) {
1601 if (ctl->fw_name == wm_adsp_fw_text[dsp->fw] &&
1602 alg_region->alg == ctl->alg_region.alg &&
1603 alg_region->type == ctl->alg_region.type) {
1604 ctl->alg_region.base = alg_region->base;
1609 static void *wm_adsp_read_algs(struct wm_adsp *dsp, size_t n_algs,
1610 unsigned int pos, unsigned int len)
1617 adsp_err(dsp, "No algorithms\n");
1618 return ERR_PTR(-EINVAL);
1621 if (n_algs > 1024) {
1622 adsp_err(dsp, "Algorithm count %zx excessive\n", n_algs);
1623 return ERR_PTR(-EINVAL);
1626 /* Read the terminator first to validate the length */
1627 ret = regmap_raw_read(dsp->regmap, pos + len, &val, sizeof(val));
1629 adsp_err(dsp, "Failed to read algorithm list end: %d\n",
1631 return ERR_PTR(ret);
1634 if (be32_to_cpu(val) != 0xbedead)
1635 adsp_warn(dsp, "Algorithm list end %x 0x%x != 0xbeadead\n",
1636 pos + len, be32_to_cpu(val));
1638 alg = kzalloc(len * 2, GFP_KERNEL | GFP_DMA);
1640 return ERR_PTR(-ENOMEM);
1642 ret = regmap_raw_read(dsp->regmap, pos, alg, len * 2);
1644 adsp_err(dsp, "Failed to read algorithm list: %d\n", ret);
1646 return ERR_PTR(ret);
1652 static struct wm_adsp_alg_region *
1653 wm_adsp_find_alg_region(struct wm_adsp *dsp, int type, unsigned int id)
1655 struct wm_adsp_alg_region *alg_region;
1657 list_for_each_entry(alg_region, &dsp->alg_regions, list) {
1658 if (id == alg_region->alg && type == alg_region->type)
1665 static struct wm_adsp_alg_region *wm_adsp_create_region(struct wm_adsp *dsp,
1666 int type, __be32 id,
1669 struct wm_adsp_alg_region *alg_region;
1671 alg_region = kzalloc(sizeof(*alg_region), GFP_KERNEL);
1673 return ERR_PTR(-ENOMEM);
1675 alg_region->type = type;
1676 alg_region->alg = be32_to_cpu(id);
1677 alg_region->base = be32_to_cpu(base);
1679 list_add_tail(&alg_region->list, &dsp->alg_regions);
1681 if (dsp->fw_ver > 0)
1682 wm_adsp_ctl_fixup_base(dsp, alg_region);
1687 static void wm_adsp_free_alg_regions(struct wm_adsp *dsp)
1689 struct wm_adsp_alg_region *alg_region;
1691 while (!list_empty(&dsp->alg_regions)) {
1692 alg_region = list_first_entry(&dsp->alg_regions,
1693 struct wm_adsp_alg_region,
1695 list_del(&alg_region->list);
1700 static int wm_adsp1_setup_algs(struct wm_adsp *dsp)
1702 struct wmfw_adsp1_id_hdr adsp1_id;
1703 struct wmfw_adsp1_alg_hdr *adsp1_alg;
1704 struct wm_adsp_alg_region *alg_region;
1705 const struct wm_adsp_region *mem;
1706 unsigned int pos, len;
1710 mem = wm_adsp_find_region(dsp, WMFW_ADSP1_DM);
1714 ret = regmap_raw_read(dsp->regmap, mem->base, &adsp1_id,
1717 adsp_err(dsp, "Failed to read algorithm info: %d\n",
1722 n_algs = be32_to_cpu(adsp1_id.n_algs);
1723 dsp->fw_id = be32_to_cpu(adsp1_id.fw.id);
1724 adsp_info(dsp, "Firmware: %x v%d.%d.%d, %zu algorithms\n",
1726 (be32_to_cpu(adsp1_id.fw.ver) & 0xff0000) >> 16,
1727 (be32_to_cpu(adsp1_id.fw.ver) & 0xff00) >> 8,
1728 be32_to_cpu(adsp1_id.fw.ver) & 0xff,
1731 alg_region = wm_adsp_create_region(dsp, WMFW_ADSP1_ZM,
1732 adsp1_id.fw.id, adsp1_id.zm);
1733 if (IS_ERR(alg_region))
1734 return PTR_ERR(alg_region);
1736 alg_region = wm_adsp_create_region(dsp, WMFW_ADSP1_DM,
1737 adsp1_id.fw.id, adsp1_id.dm);
1738 if (IS_ERR(alg_region))
1739 return PTR_ERR(alg_region);
1741 pos = sizeof(adsp1_id) / 2;
1742 len = (sizeof(*adsp1_alg) * n_algs) / 2;
1744 adsp1_alg = wm_adsp_read_algs(dsp, n_algs, mem->base + pos, len);
1745 if (IS_ERR(adsp1_alg))
1746 return PTR_ERR(adsp1_alg);
1748 for (i = 0; i < n_algs; i++) {
1749 adsp_info(dsp, "%d: ID %x v%d.%d.%d DM@%x ZM@%x\n",
1750 i, be32_to_cpu(adsp1_alg[i].alg.id),
1751 (be32_to_cpu(adsp1_alg[i].alg.ver) & 0xff0000) >> 16,
1752 (be32_to_cpu(adsp1_alg[i].alg.ver) & 0xff00) >> 8,
1753 be32_to_cpu(adsp1_alg[i].alg.ver) & 0xff,
1754 be32_to_cpu(adsp1_alg[i].dm),
1755 be32_to_cpu(adsp1_alg[i].zm));
1757 alg_region = wm_adsp_create_region(dsp, WMFW_ADSP1_DM,
1758 adsp1_alg[i].alg.id,
1760 if (IS_ERR(alg_region)) {
1761 ret = PTR_ERR(alg_region);
1764 if (dsp->fw_ver == 0) {
1765 if (i + 1 < n_algs) {
1766 len = be32_to_cpu(adsp1_alg[i + 1].dm);
1767 len -= be32_to_cpu(adsp1_alg[i].dm);
1769 wm_adsp_create_control(dsp, alg_region, 0,
1772 adsp_warn(dsp, "Missing length info for region DM with ID %x\n",
1773 be32_to_cpu(adsp1_alg[i].alg.id));
1777 alg_region = wm_adsp_create_region(dsp, WMFW_ADSP1_ZM,
1778 adsp1_alg[i].alg.id,
1780 if (IS_ERR(alg_region)) {
1781 ret = PTR_ERR(alg_region);
1784 if (dsp->fw_ver == 0) {
1785 if (i + 1 < n_algs) {
1786 len = be32_to_cpu(adsp1_alg[i + 1].zm);
1787 len -= be32_to_cpu(adsp1_alg[i].zm);
1789 wm_adsp_create_control(dsp, alg_region, 0,
1792 adsp_warn(dsp, "Missing length info for region ZM with ID %x\n",
1793 be32_to_cpu(adsp1_alg[i].alg.id));
1803 static int wm_adsp2_setup_algs(struct wm_adsp *dsp)
1805 struct wmfw_adsp2_id_hdr adsp2_id;
1806 struct wmfw_adsp2_alg_hdr *adsp2_alg;
1807 struct wm_adsp_alg_region *alg_region;
1808 const struct wm_adsp_region *mem;
1809 unsigned int pos, len;
1813 mem = wm_adsp_find_region(dsp, WMFW_ADSP2_XM);
1817 ret = regmap_raw_read(dsp->regmap, mem->base, &adsp2_id,
1820 adsp_err(dsp, "Failed to read algorithm info: %d\n",
1825 n_algs = be32_to_cpu(adsp2_id.n_algs);
1826 dsp->fw_id = be32_to_cpu(adsp2_id.fw.id);
1827 dsp->fw_id_version = be32_to_cpu(adsp2_id.fw.ver);
1828 adsp_info(dsp, "Firmware: %x v%d.%d.%d, %zu algorithms\n",
1830 (dsp->fw_id_version & 0xff0000) >> 16,
1831 (dsp->fw_id_version & 0xff00) >> 8,
1832 dsp->fw_id_version & 0xff,
1835 alg_region = wm_adsp_create_region(dsp, WMFW_ADSP2_XM,
1836 adsp2_id.fw.id, adsp2_id.xm);
1837 if (IS_ERR(alg_region))
1838 return PTR_ERR(alg_region);
1840 alg_region = wm_adsp_create_region(dsp, WMFW_ADSP2_YM,
1841 adsp2_id.fw.id, adsp2_id.ym);
1842 if (IS_ERR(alg_region))
1843 return PTR_ERR(alg_region);
1845 alg_region = wm_adsp_create_region(dsp, WMFW_ADSP2_ZM,
1846 adsp2_id.fw.id, adsp2_id.zm);
1847 if (IS_ERR(alg_region))
1848 return PTR_ERR(alg_region);
1850 pos = sizeof(adsp2_id) / 2;
1851 len = (sizeof(*adsp2_alg) * n_algs) / 2;
1853 adsp2_alg = wm_adsp_read_algs(dsp, n_algs, mem->base + pos, len);
1854 if (IS_ERR(adsp2_alg))
1855 return PTR_ERR(adsp2_alg);
1857 for (i = 0; i < n_algs; i++) {
1859 "%d: ID %x v%d.%d.%d XM@%x YM@%x ZM@%x\n",
1860 i, be32_to_cpu(adsp2_alg[i].alg.id),
1861 (be32_to_cpu(adsp2_alg[i].alg.ver) & 0xff0000) >> 16,
1862 (be32_to_cpu(adsp2_alg[i].alg.ver) & 0xff00) >> 8,
1863 be32_to_cpu(adsp2_alg[i].alg.ver) & 0xff,
1864 be32_to_cpu(adsp2_alg[i].xm),
1865 be32_to_cpu(adsp2_alg[i].ym),
1866 be32_to_cpu(adsp2_alg[i].zm));
1868 alg_region = wm_adsp_create_region(dsp, WMFW_ADSP2_XM,
1869 adsp2_alg[i].alg.id,
1871 if (IS_ERR(alg_region)) {
1872 ret = PTR_ERR(alg_region);
1875 if (dsp->fw_ver == 0) {
1876 if (i + 1 < n_algs) {
1877 len = be32_to_cpu(adsp2_alg[i + 1].xm);
1878 len -= be32_to_cpu(adsp2_alg[i].xm);
1880 wm_adsp_create_control(dsp, alg_region, 0,
1883 adsp_warn(dsp, "Missing length info for region XM with ID %x\n",
1884 be32_to_cpu(adsp2_alg[i].alg.id));
1888 alg_region = wm_adsp_create_region(dsp, WMFW_ADSP2_YM,
1889 adsp2_alg[i].alg.id,
1891 if (IS_ERR(alg_region)) {
1892 ret = PTR_ERR(alg_region);
1895 if (dsp->fw_ver == 0) {
1896 if (i + 1 < n_algs) {
1897 len = be32_to_cpu(adsp2_alg[i + 1].ym);
1898 len -= be32_to_cpu(adsp2_alg[i].ym);
1900 wm_adsp_create_control(dsp, alg_region, 0,
1903 adsp_warn(dsp, "Missing length info for region YM with ID %x\n",
1904 be32_to_cpu(adsp2_alg[i].alg.id));
1908 alg_region = wm_adsp_create_region(dsp, WMFW_ADSP2_ZM,
1909 adsp2_alg[i].alg.id,
1911 if (IS_ERR(alg_region)) {
1912 ret = PTR_ERR(alg_region);
1915 if (dsp->fw_ver == 0) {
1916 if (i + 1 < n_algs) {
1917 len = be32_to_cpu(adsp2_alg[i + 1].zm);
1918 len -= be32_to_cpu(adsp2_alg[i].zm);
1920 wm_adsp_create_control(dsp, alg_region, 0,
1923 adsp_warn(dsp, "Missing length info for region ZM with ID %x\n",
1924 be32_to_cpu(adsp2_alg[i].alg.id));
1934 static int wm_adsp_load_coeff(struct wm_adsp *dsp)
1936 LIST_HEAD(buf_list);
1937 struct regmap *regmap = dsp->regmap;
1938 struct wmfw_coeff_hdr *hdr;
1939 struct wmfw_coeff_item *blk;
1940 const struct firmware *firmware;
1941 const struct wm_adsp_region *mem;
1942 struct wm_adsp_alg_region *alg_region;
1943 const char *region_name;
1944 int ret, pos, blocks, type, offset, reg;
1946 struct wm_adsp_buf *buf;
1948 file = kzalloc(PAGE_SIZE, GFP_KERNEL);
1952 snprintf(file, PAGE_SIZE, "/*(DEBLOBBED)*/", dsp->part, dsp->num,
1953 wm_adsp_fw[dsp->fw].file);
1954 file[PAGE_SIZE - 1] = '\0';
1956 ret = reject_firmware(&firmware, file, dsp->dev);
1958 adsp_warn(dsp, "Failed to request '%s'\n", file);
1964 if (sizeof(*hdr) >= firmware->size) {
1965 adsp_err(dsp, "%s: file too short, %zu bytes\n",
1966 file, firmware->size);
1970 hdr = (void *)&firmware->data[0];
1971 if (memcmp(hdr->magic, "WMDR", 4) != 0) {
1972 adsp_err(dsp, "%s: invalid magic\n", file);
1976 switch (be32_to_cpu(hdr->rev) & 0xff) {
1980 adsp_err(dsp, "%s: Unsupported coefficient file format %d\n",
1981 file, be32_to_cpu(hdr->rev) & 0xff);
1986 adsp_dbg(dsp, "%s: v%d.%d.%d\n", file,
1987 (le32_to_cpu(hdr->ver) >> 16) & 0xff,
1988 (le32_to_cpu(hdr->ver) >> 8) & 0xff,
1989 le32_to_cpu(hdr->ver) & 0xff);
1991 pos = le32_to_cpu(hdr->len);
1994 while (pos < firmware->size &&
1995 sizeof(*blk) < firmware->size - pos) {
1996 blk = (void *)(&firmware->data[pos]);
1998 type = le16_to_cpu(blk->type);
1999 offset = le16_to_cpu(blk->offset);
2001 adsp_dbg(dsp, "%s.%d: %x v%d.%d.%d\n",
2002 file, blocks, le32_to_cpu(blk->id),
2003 (le32_to_cpu(blk->ver) >> 16) & 0xff,
2004 (le32_to_cpu(blk->ver) >> 8) & 0xff,
2005 le32_to_cpu(blk->ver) & 0xff);
2006 adsp_dbg(dsp, "%s.%d: %d bytes at 0x%x in %x\n",
2007 file, blocks, le32_to_cpu(blk->len), offset, type);
2010 region_name = "Unknown";
2012 case (WMFW_NAME_TEXT << 8):
2013 case (WMFW_INFO_TEXT << 8):
2015 case (WMFW_ABSOLUTE << 8):
2017 * Old files may use this for global
2020 if (le32_to_cpu(blk->id) == dsp->fw_id &&
2022 region_name = "global coefficients";
2023 mem = wm_adsp_find_region(dsp, type);
2025 adsp_err(dsp, "No ZM\n");
2028 reg = wm_adsp_region_to_reg(mem, 0);
2031 region_name = "register";
2040 adsp_dbg(dsp, "%s.%d: %d bytes in %x for %x\n",
2041 file, blocks, le32_to_cpu(blk->len),
2042 type, le32_to_cpu(blk->id));
2044 mem = wm_adsp_find_region(dsp, type);
2046 adsp_err(dsp, "No base for region %x\n", type);
2050 alg_region = wm_adsp_find_alg_region(dsp, type,
2051 le32_to_cpu(blk->id));
2053 reg = alg_region->base;
2054 reg = wm_adsp_region_to_reg(mem, reg);
2057 adsp_err(dsp, "No %x for algorithm %x\n",
2058 type, le32_to_cpu(blk->id));
2063 adsp_err(dsp, "%s.%d: Unknown region type %x at %d\n",
2064 file, blocks, type, pos);
2069 if (le32_to_cpu(blk->len) >
2070 firmware->size - pos - sizeof(*blk)) {
2072 "%s.%d: %s region len %d bytes exceeds file length %zu\n",
2073 file, blocks, region_name,
2074 le32_to_cpu(blk->len),
2080 buf = wm_adsp_buf_alloc(blk->data,
2081 le32_to_cpu(blk->len),
2084 adsp_err(dsp, "Out of memory\n");
2089 adsp_dbg(dsp, "%s.%d: Writing %d bytes at %x\n",
2090 file, blocks, le32_to_cpu(blk->len),
2092 ret = regmap_raw_write_async(regmap, reg, buf->buf,
2093 le32_to_cpu(blk->len));
2096 "%s.%d: Failed to write to %x in %s: %d\n",
2097 file, blocks, reg, region_name, ret);
2101 pos += (le32_to_cpu(blk->len) + sizeof(*blk) + 3) & ~0x03;
2105 ret = regmap_async_complete(regmap);
2107 adsp_err(dsp, "Failed to complete async write: %d\n", ret);
2109 if (pos > firmware->size)
2110 adsp_warn(dsp, "%s.%d: %zu bytes at end of file\n",
2111 file, blocks, pos - firmware->size);
2113 wm_adsp_debugfs_save_binname(dsp, file);
2116 regmap_async_complete(regmap);
2117 release_firmware(firmware);
2118 wm_adsp_buf_free(&buf_list);
2124 int wm_adsp1_init(struct wm_adsp *dsp)
2126 INIT_LIST_HEAD(&dsp->alg_regions);
2128 mutex_init(&dsp->pwr_lock);
2132 EXPORT_SYMBOL_GPL(wm_adsp1_init);
2134 int wm_adsp1_event(struct snd_soc_dapm_widget *w,
2135 struct snd_kcontrol *kcontrol,
2138 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
2139 struct wm_adsp *dsps = snd_soc_codec_get_drvdata(codec);
2140 struct wm_adsp *dsp = &dsps[w->shift];
2141 struct wm_coeff_ctl *ctl;
2145 dsp->card = codec->component.card;
2147 mutex_lock(&dsp->pwr_lock);
2150 case SND_SOC_DAPM_POST_PMU:
2151 regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_30,
2152 ADSP1_SYS_ENA, ADSP1_SYS_ENA);
2155 * For simplicity set the DSP clock rate to be the
2156 * SYSCLK rate rather than making it configurable.
2158 if (dsp->sysclk_reg) {
2159 ret = regmap_read(dsp->regmap, dsp->sysclk_reg, &val);
2161 adsp_err(dsp, "Failed to read SYSCLK state: %d\n",
2166 val = (val & dsp->sysclk_mask) >> dsp->sysclk_shift;
2168 ret = regmap_update_bits(dsp->regmap,
2169 dsp->base + ADSP1_CONTROL_31,
2170 ADSP1_CLK_SEL_MASK, val);
2172 adsp_err(dsp, "Failed to set clock rate: %d\n",
2178 ret = wm_adsp_load(dsp);
2182 ret = wm_adsp1_setup_algs(dsp);
2186 ret = wm_adsp_load_coeff(dsp);
2190 /* Initialize caches for enabled and unset controls */
2191 ret = wm_coeff_init_control_caches(dsp);
2195 /* Sync set controls */
2196 ret = wm_coeff_sync_controls(dsp);
2202 /* Start the core running */
2203 regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_30,
2204 ADSP1_CORE_ENA | ADSP1_START,
2205 ADSP1_CORE_ENA | ADSP1_START);
2207 dsp->running = true;
2210 case SND_SOC_DAPM_PRE_PMD:
2211 dsp->running = false;
2212 dsp->booted = false;
2215 regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_30,
2216 ADSP1_CORE_ENA | ADSP1_START, 0);
2218 regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_19,
2219 ADSP1_WDMA_BUFFER_LENGTH_MASK, 0);
2221 regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_30,
2224 list_for_each_entry(ctl, &dsp->ctl_list, list)
2228 wm_adsp_free_alg_regions(dsp);
2235 mutex_unlock(&dsp->pwr_lock);
2240 regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_30,
2243 mutex_unlock(&dsp->pwr_lock);
2247 EXPORT_SYMBOL_GPL(wm_adsp1_event);
2249 static int wm_adsp2_ena(struct wm_adsp *dsp)
2254 ret = regmap_update_bits_async(dsp->regmap, dsp->base + ADSP2_CONTROL,
2255 ADSP2_SYS_ENA, ADSP2_SYS_ENA);
2259 /* Wait for the RAM to start, should be near instantaneous */
2260 for (count = 0; count < 10; ++count) {
2261 ret = regmap_read(dsp->regmap, dsp->base + ADSP2_STATUS1, &val);
2265 if (val & ADSP2_RAM_RDY)
2268 usleep_range(250, 500);
2271 if (!(val & ADSP2_RAM_RDY)) {
2272 adsp_err(dsp, "Failed to start DSP RAM\n");
2276 adsp_dbg(dsp, "RAM ready after %d polls\n", count);
2281 static void wm_adsp2_boot_work(struct work_struct *work)
2283 struct wm_adsp *dsp = container_of(work,
2288 mutex_lock(&dsp->pwr_lock);
2290 ret = regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL,
2291 ADSP2_MEM_ENA, ADSP2_MEM_ENA);
2295 ret = wm_adsp2_ena(dsp);
2299 ret = wm_adsp_load(dsp);
2303 ret = wm_adsp2_setup_algs(dsp);
2307 ret = wm_adsp_load_coeff(dsp);
2311 /* Initialize caches for enabled and unset controls */
2312 ret = wm_coeff_init_control_caches(dsp);
2318 /* Turn DSP back off until we are ready to run */
2319 ret = regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL,
2324 mutex_unlock(&dsp->pwr_lock);
2329 regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL,
2330 ADSP2_SYS_ENA | ADSP2_CORE_ENA | ADSP2_START, 0);
2332 mutex_unlock(&dsp->pwr_lock);
2335 static void wm_adsp2_set_dspclk(struct wm_adsp *dsp, unsigned int freq)
2339 ret = regmap_update_bits_async(dsp->regmap,
2340 dsp->base + ADSP2_CLOCKING,
2342 freq << ADSP2_CLK_SEL_SHIFT);
2344 adsp_err(dsp, "Failed to set clock rate: %d\n", ret);
2347 int wm_adsp2_early_event(struct snd_soc_dapm_widget *w,
2348 struct snd_kcontrol *kcontrol, int event,
2351 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
2352 struct wm_adsp *dsps = snd_soc_codec_get_drvdata(codec);
2353 struct wm_adsp *dsp = &dsps[w->shift];
2354 struct wm_coeff_ctl *ctl;
2356 dsp->card = codec->component.card;
2359 case SND_SOC_DAPM_PRE_PMU:
2360 wm_adsp2_set_dspclk(dsp, freq);
2361 queue_work(system_unbound_wq, &dsp->boot_work);
2363 case SND_SOC_DAPM_PRE_PMD:
2364 wm_adsp_debugfs_clear(dsp);
2367 dsp->fw_id_version = 0;
2369 dsp->booted = false;
2371 regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL,
2374 list_for_each_entry(ctl, &dsp->ctl_list, list)
2377 wm_adsp_free_alg_regions(dsp);
2379 adsp_dbg(dsp, "Shutdown complete\n");
2387 EXPORT_SYMBOL_GPL(wm_adsp2_early_event);
2389 int wm_adsp2_event(struct snd_soc_dapm_widget *w,
2390 struct snd_kcontrol *kcontrol, int event)
2392 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
2393 struct wm_adsp *dsps = snd_soc_codec_get_drvdata(codec);
2394 struct wm_adsp *dsp = &dsps[w->shift];
2398 case SND_SOC_DAPM_POST_PMU:
2399 flush_work(&dsp->boot_work);
2404 ret = wm_adsp2_ena(dsp);
2408 /* Sync set controls */
2409 ret = wm_coeff_sync_controls(dsp);
2413 ret = regmap_update_bits(dsp->regmap,
2414 dsp->base + ADSP2_CONTROL,
2415 ADSP2_CORE_ENA | ADSP2_START,
2416 ADSP2_CORE_ENA | ADSP2_START);
2420 dsp->running = true;
2422 mutex_lock(&dsp->pwr_lock);
2424 if (wm_adsp_fw[dsp->fw].num_caps != 0)
2425 ret = wm_adsp_buffer_init(dsp);
2427 mutex_unlock(&dsp->pwr_lock);
2431 case SND_SOC_DAPM_PRE_PMD:
2432 /* Log firmware state, it can be useful for analysis */
2433 wm_adsp2_show_fw_status(dsp);
2435 mutex_lock(&dsp->pwr_lock);
2437 dsp->running = false;
2439 regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL,
2440 ADSP2_CORE_ENA | ADSP2_START, 0);
2442 /* Make sure DMAs are quiesced */
2443 regmap_write(dsp->regmap, dsp->base + ADSP2_RDMA_CONFIG_1, 0);
2444 regmap_write(dsp->regmap, dsp->base + ADSP2_WDMA_CONFIG_1, 0);
2445 regmap_write(dsp->regmap, dsp->base + ADSP2_WDMA_CONFIG_2, 0);
2447 regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL,
2450 if (wm_adsp_fw[dsp->fw].num_caps != 0)
2451 wm_adsp_buffer_free(dsp);
2453 mutex_unlock(&dsp->pwr_lock);
2455 adsp_dbg(dsp, "Execution stopped\n");
2464 regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL,
2465 ADSP2_SYS_ENA | ADSP2_CORE_ENA | ADSP2_START, 0);
2468 EXPORT_SYMBOL_GPL(wm_adsp2_event);
2470 int wm_adsp2_codec_probe(struct wm_adsp *dsp, struct snd_soc_codec *codec)
2472 wm_adsp2_init_debugfs(dsp, codec);
2474 return snd_soc_add_codec_controls(codec,
2475 &wm_adsp_fw_controls[dsp->num - 1],
2478 EXPORT_SYMBOL_GPL(wm_adsp2_codec_probe);
2480 int wm_adsp2_codec_remove(struct wm_adsp *dsp, struct snd_soc_codec *codec)
2482 wm_adsp2_cleanup_debugfs(dsp);
2486 EXPORT_SYMBOL_GPL(wm_adsp2_codec_remove);
2488 int wm_adsp2_init(struct wm_adsp *dsp)
2493 * Disable the DSP memory by default when in reset for a small
2496 ret = regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL,
2499 adsp_err(dsp, "Failed to clear memory retention: %d\n", ret);
2503 INIT_LIST_HEAD(&dsp->alg_regions);
2504 INIT_LIST_HEAD(&dsp->ctl_list);
2505 INIT_WORK(&dsp->boot_work, wm_adsp2_boot_work);
2507 mutex_init(&dsp->pwr_lock);
2511 EXPORT_SYMBOL_GPL(wm_adsp2_init);
2513 void wm_adsp2_remove(struct wm_adsp *dsp)
2515 struct wm_coeff_ctl *ctl;
2517 while (!list_empty(&dsp->ctl_list)) {
2518 ctl = list_first_entry(&dsp->ctl_list, struct wm_coeff_ctl,
2520 list_del(&ctl->list);
2521 wm_adsp_free_ctl_blk(ctl);
2524 EXPORT_SYMBOL_GPL(wm_adsp2_remove);
2526 static inline int wm_adsp_compr_attached(struct wm_adsp_compr *compr)
2528 return compr->buf != NULL;
2531 static int wm_adsp_compr_attach(struct wm_adsp_compr *compr)
2534 * Note this will be more complex once each DSP can support multiple
2537 if (!compr->dsp->buffer)
2540 compr->buf = compr->dsp->buffer;
2541 compr->buf->compr = compr;
2546 static void wm_adsp_compr_detach(struct wm_adsp_compr *compr)
2551 /* Wake the poll so it can see buffer is no longer attached */
2553 snd_compr_fragment_elapsed(compr->stream);
2555 if (wm_adsp_compr_attached(compr)) {
2556 compr->buf->compr = NULL;
2561 int wm_adsp_compr_open(struct wm_adsp *dsp, struct snd_compr_stream *stream)
2563 struct wm_adsp_compr *compr;
2566 mutex_lock(&dsp->pwr_lock);
2568 if (wm_adsp_fw[dsp->fw].num_caps == 0) {
2569 adsp_err(dsp, "Firmware does not support compressed API\n");
2574 if (wm_adsp_fw[dsp->fw].compr_direction != stream->direction) {
2575 adsp_err(dsp, "Firmware does not support stream direction\n");
2581 /* It is expect this limitation will be removed in future */
2582 adsp_err(dsp, "Only a single stream supported per DSP\n");
2587 compr = kzalloc(sizeof(*compr), GFP_KERNEL);
2594 compr->stream = stream;
2598 stream->runtime->private_data = compr;
2601 mutex_unlock(&dsp->pwr_lock);
2605 EXPORT_SYMBOL_GPL(wm_adsp_compr_open);
2607 int wm_adsp_compr_free(struct snd_compr_stream *stream)
2609 struct wm_adsp_compr *compr = stream->runtime->private_data;
2610 struct wm_adsp *dsp = compr->dsp;
2612 mutex_lock(&dsp->pwr_lock);
2614 wm_adsp_compr_detach(compr);
2617 kfree(compr->raw_buf);
2620 mutex_unlock(&dsp->pwr_lock);
2624 EXPORT_SYMBOL_GPL(wm_adsp_compr_free);
2626 static int wm_adsp_compr_check_params(struct snd_compr_stream *stream,
2627 struct snd_compr_params *params)
2629 struct wm_adsp_compr *compr = stream->runtime->private_data;
2630 struct wm_adsp *dsp = compr->dsp;
2631 const struct wm_adsp_fw_caps *caps;
2632 const struct snd_codec_desc *desc;
2635 if (params->buffer.fragment_size < WM_ADSP_MIN_FRAGMENT_SIZE ||
2636 params->buffer.fragment_size > WM_ADSP_MAX_FRAGMENT_SIZE ||
2637 params->buffer.fragments < WM_ADSP_MIN_FRAGMENTS ||
2638 params->buffer.fragments > WM_ADSP_MAX_FRAGMENTS ||
2639 params->buffer.fragment_size % WM_ADSP_DATA_WORD_SIZE) {
2640 adsp_err(dsp, "Invalid buffer fragsize=%d fragments=%d\n",
2641 params->buffer.fragment_size,
2642 params->buffer.fragments);
2647 for (i = 0; i < wm_adsp_fw[dsp->fw].num_caps; i++) {
2648 caps = &wm_adsp_fw[dsp->fw].caps[i];
2651 if (caps->id != params->codec.id)
2654 if (stream->direction == SND_COMPRESS_PLAYBACK) {
2655 if (desc->max_ch < params->codec.ch_out)
2658 if (desc->max_ch < params->codec.ch_in)
2662 if (!(desc->formats & (1 << params->codec.format)))
2665 for (j = 0; j < desc->num_sample_rates; ++j)
2666 if (desc->sample_rates[j] == params->codec.sample_rate)
2670 adsp_err(dsp, "Invalid params id=%u ch=%u,%u rate=%u fmt=%u\n",
2671 params->codec.id, params->codec.ch_in, params->codec.ch_out,
2672 params->codec.sample_rate, params->codec.format);
2676 static inline unsigned int wm_adsp_compr_frag_words(struct wm_adsp_compr *compr)
2678 return compr->size.fragment_size / WM_ADSP_DATA_WORD_SIZE;
2681 int wm_adsp_compr_set_params(struct snd_compr_stream *stream,
2682 struct snd_compr_params *params)
2684 struct wm_adsp_compr *compr = stream->runtime->private_data;
2688 ret = wm_adsp_compr_check_params(stream, params);
2692 compr->size = params->buffer;
2694 adsp_dbg(compr->dsp, "fragment_size=%d fragments=%d\n",
2695 compr->size.fragment_size, compr->size.fragments);
2697 size = wm_adsp_compr_frag_words(compr) * sizeof(*compr->raw_buf);
2698 compr->raw_buf = kmalloc(size, GFP_DMA | GFP_KERNEL);
2699 if (!compr->raw_buf)
2702 compr->sample_rate = params->codec.sample_rate;
2706 EXPORT_SYMBOL_GPL(wm_adsp_compr_set_params);
2708 int wm_adsp_compr_get_caps(struct snd_compr_stream *stream,
2709 struct snd_compr_caps *caps)
2711 struct wm_adsp_compr *compr = stream->runtime->private_data;
2712 int fw = compr->dsp->fw;
2715 if (wm_adsp_fw[fw].caps) {
2716 for (i = 0; i < wm_adsp_fw[fw].num_caps; i++)
2717 caps->codecs[i] = wm_adsp_fw[fw].caps[i].id;
2719 caps->num_codecs = i;
2720 caps->direction = wm_adsp_fw[fw].compr_direction;
2722 caps->min_fragment_size = WM_ADSP_MIN_FRAGMENT_SIZE;
2723 caps->max_fragment_size = WM_ADSP_MAX_FRAGMENT_SIZE;
2724 caps->min_fragments = WM_ADSP_MIN_FRAGMENTS;
2725 caps->max_fragments = WM_ADSP_MAX_FRAGMENTS;
2730 EXPORT_SYMBOL_GPL(wm_adsp_compr_get_caps);
2732 static int wm_adsp_read_data_block(struct wm_adsp *dsp, int mem_type,
2733 unsigned int mem_addr,
2734 unsigned int num_words, u32 *data)
2736 struct wm_adsp_region const *mem = wm_adsp_find_region(dsp, mem_type);
2737 unsigned int i, reg;
2743 reg = wm_adsp_region_to_reg(mem, mem_addr);
2745 ret = regmap_raw_read(dsp->regmap, reg, data,
2746 sizeof(*data) * num_words);
2750 for (i = 0; i < num_words; ++i)
2751 data[i] = be32_to_cpu(data[i]) & 0x00ffffffu;
2756 static inline int wm_adsp_read_data_word(struct wm_adsp *dsp, int mem_type,
2757 unsigned int mem_addr, u32 *data)
2759 return wm_adsp_read_data_block(dsp, mem_type, mem_addr, 1, data);
2762 static int wm_adsp_write_data_word(struct wm_adsp *dsp, int mem_type,
2763 unsigned int mem_addr, u32 data)
2765 struct wm_adsp_region const *mem = wm_adsp_find_region(dsp, mem_type);
2771 reg = wm_adsp_region_to_reg(mem, mem_addr);
2773 data = cpu_to_be32(data & 0x00ffffffu);
2775 return regmap_raw_write(dsp->regmap, reg, &data, sizeof(data));
2778 static inline int wm_adsp_buffer_read(struct wm_adsp_compr_buf *buf,
2779 unsigned int field_offset, u32 *data)
2781 return wm_adsp_read_data_word(buf->dsp, WMFW_ADSP2_XM,
2782 buf->host_buf_ptr + field_offset, data);
2785 static inline int wm_adsp_buffer_write(struct wm_adsp_compr_buf *buf,
2786 unsigned int field_offset, u32 data)
2788 return wm_adsp_write_data_word(buf->dsp, WMFW_ADSP2_XM,
2789 buf->host_buf_ptr + field_offset, data);
2792 static int wm_adsp_buffer_locate(struct wm_adsp_compr_buf *buf)
2794 struct wm_adsp_alg_region *alg_region;
2795 struct wm_adsp *dsp = buf->dsp;
2796 u32 xmalg, addr, magic;
2799 alg_region = wm_adsp_find_alg_region(dsp, WMFW_ADSP2_XM, dsp->fw_id);
2800 xmalg = sizeof(struct wm_adsp_system_config_xm_hdr) / sizeof(__be32);
2802 addr = alg_region->base + xmalg + ALG_XM_FIELD(magic);
2803 ret = wm_adsp_read_data_word(dsp, WMFW_ADSP2_XM, addr, &magic);
2807 if (magic != WM_ADSP_ALG_XM_STRUCT_MAGIC)
2810 addr = alg_region->base + xmalg + ALG_XM_FIELD(host_buf_ptr);
2811 for (i = 0; i < 5; ++i) {
2812 ret = wm_adsp_read_data_word(dsp, WMFW_ADSP2_XM, addr,
2813 &buf->host_buf_ptr);
2817 if (buf->host_buf_ptr)
2820 usleep_range(1000, 2000);
2823 if (!buf->host_buf_ptr)
2826 adsp_dbg(dsp, "host_buf_ptr=%x\n", buf->host_buf_ptr);
2831 static int wm_adsp_buffer_populate(struct wm_adsp_compr_buf *buf)
2833 const struct wm_adsp_fw_caps *caps = wm_adsp_fw[buf->dsp->fw].caps;
2834 struct wm_adsp_buffer_region *region;
2838 for (i = 0; i < caps->num_regions; ++i) {
2839 region = &buf->regions[i];
2841 region->offset = offset;
2842 region->mem_type = caps->region_defs[i].mem_type;
2844 ret = wm_adsp_buffer_read(buf, caps->region_defs[i].base_offset,
2845 ®ion->base_addr);
2849 ret = wm_adsp_buffer_read(buf, caps->region_defs[i].size_offset,
2854 region->cumulative_size = offset;
2857 "region=%d type=%d base=%04x off=%04x size=%04x\n",
2858 i, region->mem_type, region->base_addr,
2859 region->offset, region->cumulative_size);
2865 static int wm_adsp_buffer_init(struct wm_adsp *dsp)
2867 struct wm_adsp_compr_buf *buf;
2870 buf = kzalloc(sizeof(*buf), GFP_KERNEL);
2875 buf->read_index = -1;
2876 buf->irq_count = 0xFFFFFFFF;
2878 ret = wm_adsp_buffer_locate(buf);
2880 adsp_err(dsp, "Failed to acquire host buffer: %d\n", ret);
2884 buf->regions = kcalloc(wm_adsp_fw[dsp->fw].caps->num_regions,
2885 sizeof(*buf->regions), GFP_KERNEL);
2886 if (!buf->regions) {
2891 ret = wm_adsp_buffer_populate(buf);
2893 adsp_err(dsp, "Failed to populate host buffer: %d\n", ret);
2902 kfree(buf->regions);
2908 static int wm_adsp_buffer_free(struct wm_adsp *dsp)
2911 wm_adsp_compr_detach(dsp->buffer->compr);
2913 kfree(dsp->buffer->regions);
2922 int wm_adsp_compr_trigger(struct snd_compr_stream *stream, int cmd)
2924 struct wm_adsp_compr *compr = stream->runtime->private_data;
2925 struct wm_adsp *dsp = compr->dsp;
2928 adsp_dbg(dsp, "Trigger: %d\n", cmd);
2930 mutex_lock(&dsp->pwr_lock);
2933 case SNDRV_PCM_TRIGGER_START:
2934 if (wm_adsp_compr_attached(compr))
2937 ret = wm_adsp_compr_attach(compr);
2939 adsp_err(dsp, "Failed to link buffer and stream: %d\n",
2944 /* Trigger the IRQ at one fragment of data */
2945 ret = wm_adsp_buffer_write(compr->buf,
2946 HOST_BUFFER_FIELD(high_water_mark),
2947 wm_adsp_compr_frag_words(compr));
2949 adsp_err(dsp, "Failed to set high water mark: %d\n",
2954 case SNDRV_PCM_TRIGGER_STOP:
2961 mutex_unlock(&dsp->pwr_lock);
2965 EXPORT_SYMBOL_GPL(wm_adsp_compr_trigger);
2967 static inline int wm_adsp_buffer_size(struct wm_adsp_compr_buf *buf)
2969 int last_region = wm_adsp_fw[buf->dsp->fw].caps->num_regions - 1;
2971 return buf->regions[last_region].cumulative_size;
2974 static int wm_adsp_buffer_update_avail(struct wm_adsp_compr_buf *buf)
2976 u32 next_read_index, next_write_index;
2977 int write_index, read_index, avail;
2980 /* Only sync read index if we haven't already read a valid index */
2981 if (buf->read_index < 0) {
2982 ret = wm_adsp_buffer_read(buf,
2983 HOST_BUFFER_FIELD(next_read_index),
2988 read_index = sign_extend32(next_read_index, 23);
2990 if (read_index < 0) {
2991 adsp_dbg(buf->dsp, "Avail check on unstarted stream\n");
2995 buf->read_index = read_index;
2998 ret = wm_adsp_buffer_read(buf, HOST_BUFFER_FIELD(next_write_index),
3003 write_index = sign_extend32(next_write_index, 23);
3005 avail = write_index - buf->read_index;
3007 avail += wm_adsp_buffer_size(buf);
3009 adsp_dbg(buf->dsp, "readindex=0x%x, writeindex=0x%x, avail=%d\n",
3010 buf->read_index, write_index, avail * WM_ADSP_DATA_WORD_SIZE);
3017 static int wm_adsp_buffer_get_error(struct wm_adsp_compr_buf *buf)
3021 ret = wm_adsp_buffer_read(buf, HOST_BUFFER_FIELD(error), &buf->error);
3023 adsp_err(buf->dsp, "Failed to check buffer error: %d\n", ret);
3026 if (buf->error != 0) {
3027 adsp_err(buf->dsp, "Buffer error occurred: %d\n", buf->error);
3034 int wm_adsp_compr_handle_irq(struct wm_adsp *dsp)
3036 struct wm_adsp_compr_buf *buf;
3037 struct wm_adsp_compr *compr;
3040 mutex_lock(&dsp->pwr_lock);
3050 adsp_dbg(dsp, "Handling buffer IRQ\n");
3052 ret = wm_adsp_buffer_get_error(buf);
3054 goto out_notify; /* Wake poll to report error */
3056 ret = wm_adsp_buffer_read(buf, HOST_BUFFER_FIELD(irq_count),
3059 adsp_err(dsp, "Failed to get irq_count: %d\n", ret);
3063 ret = wm_adsp_buffer_update_avail(buf);
3065 adsp_err(dsp, "Error reading avail: %d\n", ret);
3069 if (wm_adsp_fw[dsp->fw].voice_trigger && buf->irq_count == 2)
3070 ret = WM_ADSP_COMPR_VOICE_TRIGGER;
3073 if (compr && compr->stream)
3074 snd_compr_fragment_elapsed(compr->stream);
3077 mutex_unlock(&dsp->pwr_lock);
3081 EXPORT_SYMBOL_GPL(wm_adsp_compr_handle_irq);
3083 static int wm_adsp_buffer_reenable_irq(struct wm_adsp_compr_buf *buf)
3085 if (buf->irq_count & 0x01)
3088 adsp_dbg(buf->dsp, "Enable IRQ(0x%x) for next fragment\n",
3091 buf->irq_count |= 0x01;
3093 return wm_adsp_buffer_write(buf, HOST_BUFFER_FIELD(irq_ack),
3097 int wm_adsp_compr_pointer(struct snd_compr_stream *stream,
3098 struct snd_compr_tstamp *tstamp)
3100 struct wm_adsp_compr *compr = stream->runtime->private_data;
3101 struct wm_adsp *dsp = compr->dsp;
3102 struct wm_adsp_compr_buf *buf;
3105 adsp_dbg(dsp, "Pointer request\n");
3107 mutex_lock(&dsp->pwr_lock);
3111 if (!compr->buf || compr->buf->error) {
3112 snd_compr_stop_error(stream, SNDRV_PCM_STATE_XRUN);
3117 if (buf->avail < wm_adsp_compr_frag_words(compr)) {
3118 ret = wm_adsp_buffer_update_avail(buf);
3120 adsp_err(dsp, "Error reading avail: %d\n", ret);
3125 * If we really have less than 1 fragment available tell the
3126 * DSP to inform us once a whole fragment is available.
3128 if (buf->avail < wm_adsp_compr_frag_words(compr)) {
3129 ret = wm_adsp_buffer_get_error(buf);
3131 if (compr->buf->error)
3132 snd_compr_stop_error(stream,
3133 SNDRV_PCM_STATE_XRUN);
3137 ret = wm_adsp_buffer_reenable_irq(buf);
3140 "Failed to re-enable buffer IRQ: %d\n",
3147 tstamp->copied_total = compr->copied_total;
3148 tstamp->copied_total += buf->avail * WM_ADSP_DATA_WORD_SIZE;
3149 tstamp->sampling_rate = compr->sample_rate;
3152 mutex_unlock(&dsp->pwr_lock);
3156 EXPORT_SYMBOL_GPL(wm_adsp_compr_pointer);
3158 static int wm_adsp_buffer_capture_block(struct wm_adsp_compr *compr, int target)
3160 struct wm_adsp_compr_buf *buf = compr->buf;
3161 u8 *pack_in = (u8 *)compr->raw_buf;
3162 u8 *pack_out = (u8 *)compr->raw_buf;
3163 unsigned int adsp_addr;
3164 int mem_type, nwords, max_read;
3167 /* Calculate read parameters */
3168 for (i = 0; i < wm_adsp_fw[buf->dsp->fw].caps->num_regions; ++i)
3169 if (buf->read_index < buf->regions[i].cumulative_size)
3172 if (i == wm_adsp_fw[buf->dsp->fw].caps->num_regions)
3175 mem_type = buf->regions[i].mem_type;
3176 adsp_addr = buf->regions[i].base_addr +
3177 (buf->read_index - buf->regions[i].offset);
3179 max_read = wm_adsp_compr_frag_words(compr);
3180 nwords = buf->regions[i].cumulative_size - buf->read_index;
3182 if (nwords > target)
3184 if (nwords > buf->avail)
3185 nwords = buf->avail;
3186 if (nwords > max_read)
3191 /* Read data from DSP */
3192 ret = wm_adsp_read_data_block(buf->dsp, mem_type, adsp_addr,
3193 nwords, compr->raw_buf);
3197 /* Remove the padding bytes from the data read from the DSP */
3198 for (i = 0; i < nwords; i++) {
3199 for (j = 0; j < WM_ADSP_DATA_WORD_SIZE; j++)
3200 *pack_out++ = *pack_in++;
3202 pack_in += sizeof(*(compr->raw_buf)) - WM_ADSP_DATA_WORD_SIZE;
3205 /* update read index to account for words read */
3206 buf->read_index += nwords;
3207 if (buf->read_index == wm_adsp_buffer_size(buf))
3208 buf->read_index = 0;
3210 ret = wm_adsp_buffer_write(buf, HOST_BUFFER_FIELD(next_read_index),
3215 /* update avail to account for words read */
3216 buf->avail -= nwords;
3221 static int wm_adsp_compr_read(struct wm_adsp_compr *compr,
3222 char __user *buf, size_t count)
3224 struct wm_adsp *dsp = compr->dsp;
3228 adsp_dbg(dsp, "Requested read of %zu bytes\n", count);
3230 if (!compr->buf || compr->buf->error) {
3231 snd_compr_stop_error(compr->stream, SNDRV_PCM_STATE_XRUN);
3235 count /= WM_ADSP_DATA_WORD_SIZE;
3238 nwords = wm_adsp_buffer_capture_block(compr, count);
3240 adsp_err(dsp, "Failed to capture block: %d\n", nwords);
3244 nbytes = nwords * WM_ADSP_DATA_WORD_SIZE;
3246 adsp_dbg(dsp, "Read %d bytes\n", nbytes);
3248 if (copy_to_user(buf + ntotal, compr->raw_buf, nbytes)) {
3249 adsp_err(dsp, "Failed to copy data to user: %d, %d\n",
3256 } while (nwords > 0 && count > 0);
3258 compr->copied_total += ntotal;
3263 int wm_adsp_compr_copy(struct snd_compr_stream *stream, char __user *buf,
3266 struct wm_adsp_compr *compr = stream->runtime->private_data;
3267 struct wm_adsp *dsp = compr->dsp;
3270 mutex_lock(&dsp->pwr_lock);
3272 if (stream->direction == SND_COMPRESS_CAPTURE)
3273 ret = wm_adsp_compr_read(compr, buf, count);
3277 mutex_unlock(&dsp->pwr_lock);
3281 EXPORT_SYMBOL_GPL(wm_adsp_compr_copy);
3283 MODULE_LICENSE("GPL v2");