2 * wm_adsp.c -- Wolfson ADSP support
4 * Copyright 2012 Wolfson Microelectronics plc
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
13 #include <linux/module.h>
14 #include <linux/moduleparam.h>
15 #include <linux/init.h>
16 #include <linux/delay.h>
17 #include <linux/firmware.h>
18 #include <linux/list.h>
20 #include <linux/pm_runtime.h>
21 #include <linux/regmap.h>
22 #include <linux/regulator/consumer.h>
23 #include <linux/slab.h>
24 #include <linux/vmalloc.h>
25 #include <linux/workqueue.h>
26 #include <linux/debugfs.h>
27 #include <sound/core.h>
28 #include <sound/pcm.h>
29 #include <sound/pcm_params.h>
30 #include <sound/soc.h>
31 #include <sound/jack.h>
32 #include <sound/initval.h>
33 #include <sound/tlv.h>
35 #include <linux/mfd/arizona/registers.h>
40 #define adsp_crit(_dsp, fmt, ...) \
41 dev_crit(_dsp->dev, "DSP%d: " fmt, _dsp->num, ##__VA_ARGS__)
42 #define adsp_err(_dsp, fmt, ...) \
43 dev_err(_dsp->dev, "DSP%d: " fmt, _dsp->num, ##__VA_ARGS__)
44 #define adsp_warn(_dsp, fmt, ...) \
45 dev_warn(_dsp->dev, "DSP%d: " fmt, _dsp->num, ##__VA_ARGS__)
46 #define adsp_info(_dsp, fmt, ...) \
47 dev_info(_dsp->dev, "DSP%d: " fmt, _dsp->num, ##__VA_ARGS__)
48 #define adsp_dbg(_dsp, fmt, ...) \
49 dev_dbg(_dsp->dev, "DSP%d: " fmt, _dsp->num, ##__VA_ARGS__)
51 #define ADSP1_CONTROL_1 0x00
52 #define ADSP1_CONTROL_2 0x02
53 #define ADSP1_CONTROL_3 0x03
54 #define ADSP1_CONTROL_4 0x04
55 #define ADSP1_CONTROL_5 0x06
56 #define ADSP1_CONTROL_6 0x07
57 #define ADSP1_CONTROL_7 0x08
58 #define ADSP1_CONTROL_8 0x09
59 #define ADSP1_CONTROL_9 0x0A
60 #define ADSP1_CONTROL_10 0x0B
61 #define ADSP1_CONTROL_11 0x0C
62 #define ADSP1_CONTROL_12 0x0D
63 #define ADSP1_CONTROL_13 0x0F
64 #define ADSP1_CONTROL_14 0x10
65 #define ADSP1_CONTROL_15 0x11
66 #define ADSP1_CONTROL_16 0x12
67 #define ADSP1_CONTROL_17 0x13
68 #define ADSP1_CONTROL_18 0x14
69 #define ADSP1_CONTROL_19 0x16
70 #define ADSP1_CONTROL_20 0x17
71 #define ADSP1_CONTROL_21 0x18
72 #define ADSP1_CONTROL_22 0x1A
73 #define ADSP1_CONTROL_23 0x1B
74 #define ADSP1_CONTROL_24 0x1C
75 #define ADSP1_CONTROL_25 0x1E
76 #define ADSP1_CONTROL_26 0x20
77 #define ADSP1_CONTROL_27 0x21
78 #define ADSP1_CONTROL_28 0x22
79 #define ADSP1_CONTROL_29 0x23
80 #define ADSP1_CONTROL_30 0x24
81 #define ADSP1_CONTROL_31 0x26
86 #define ADSP1_WDMA_BUFFER_LENGTH_MASK 0x00FF /* DSP1_WDMA_BUFFER_LENGTH - [7:0] */
87 #define ADSP1_WDMA_BUFFER_LENGTH_SHIFT 0 /* DSP1_WDMA_BUFFER_LENGTH - [7:0] */
88 #define ADSP1_WDMA_BUFFER_LENGTH_WIDTH 8 /* DSP1_WDMA_BUFFER_LENGTH - [7:0] */
94 #define ADSP1_DBG_CLK_ENA 0x0008 /* DSP1_DBG_CLK_ENA */
95 #define ADSP1_DBG_CLK_ENA_MASK 0x0008 /* DSP1_DBG_CLK_ENA */
96 #define ADSP1_DBG_CLK_ENA_SHIFT 3 /* DSP1_DBG_CLK_ENA */
97 #define ADSP1_DBG_CLK_ENA_WIDTH 1 /* DSP1_DBG_CLK_ENA */
98 #define ADSP1_SYS_ENA 0x0004 /* DSP1_SYS_ENA */
99 #define ADSP1_SYS_ENA_MASK 0x0004 /* DSP1_SYS_ENA */
100 #define ADSP1_SYS_ENA_SHIFT 2 /* DSP1_SYS_ENA */
101 #define ADSP1_SYS_ENA_WIDTH 1 /* DSP1_SYS_ENA */
102 #define ADSP1_CORE_ENA 0x0002 /* DSP1_CORE_ENA */
103 #define ADSP1_CORE_ENA_MASK 0x0002 /* DSP1_CORE_ENA */
104 #define ADSP1_CORE_ENA_SHIFT 1 /* DSP1_CORE_ENA */
105 #define ADSP1_CORE_ENA_WIDTH 1 /* DSP1_CORE_ENA */
106 #define ADSP1_START 0x0001 /* DSP1_START */
107 #define ADSP1_START_MASK 0x0001 /* DSP1_START */
108 #define ADSP1_START_SHIFT 0 /* DSP1_START */
109 #define ADSP1_START_WIDTH 1 /* DSP1_START */
114 #define ADSP1_CLK_SEL_MASK 0x0007 /* CLK_SEL_ENA */
115 #define ADSP1_CLK_SEL_SHIFT 0 /* CLK_SEL_ENA */
116 #define ADSP1_CLK_SEL_WIDTH 3 /* CLK_SEL_ENA */
118 #define ADSP2_CONTROL 0x0
119 #define ADSP2_CLOCKING 0x1
120 #define ADSP2_STATUS1 0x4
121 #define ADSP2_WDMA_CONFIG_1 0x30
122 #define ADSP2_WDMA_CONFIG_2 0x31
123 #define ADSP2_RDMA_CONFIG_1 0x34
125 #define ADSP2_SCRATCH0 0x40
126 #define ADSP2_SCRATCH1 0x41
127 #define ADSP2_SCRATCH2 0x42
128 #define ADSP2_SCRATCH3 0x43
134 #define ADSP2_MEM_ENA 0x0010 /* DSP1_MEM_ENA */
135 #define ADSP2_MEM_ENA_MASK 0x0010 /* DSP1_MEM_ENA */
136 #define ADSP2_MEM_ENA_SHIFT 4 /* DSP1_MEM_ENA */
137 #define ADSP2_MEM_ENA_WIDTH 1 /* DSP1_MEM_ENA */
138 #define ADSP2_SYS_ENA 0x0004 /* DSP1_SYS_ENA */
139 #define ADSP2_SYS_ENA_MASK 0x0004 /* DSP1_SYS_ENA */
140 #define ADSP2_SYS_ENA_SHIFT 2 /* DSP1_SYS_ENA */
141 #define ADSP2_SYS_ENA_WIDTH 1 /* DSP1_SYS_ENA */
142 #define ADSP2_CORE_ENA 0x0002 /* DSP1_CORE_ENA */
143 #define ADSP2_CORE_ENA_MASK 0x0002 /* DSP1_CORE_ENA */
144 #define ADSP2_CORE_ENA_SHIFT 1 /* DSP1_CORE_ENA */
145 #define ADSP2_CORE_ENA_WIDTH 1 /* DSP1_CORE_ENA */
146 #define ADSP2_START 0x0001 /* DSP1_START */
147 #define ADSP2_START_MASK 0x0001 /* DSP1_START */
148 #define ADSP2_START_SHIFT 0 /* DSP1_START */
149 #define ADSP2_START_WIDTH 1 /* DSP1_START */
154 #define ADSP2_CLK_SEL_MASK 0x0007 /* CLK_SEL_ENA */
155 #define ADSP2_CLK_SEL_SHIFT 0 /* CLK_SEL_ENA */
156 #define ADSP2_CLK_SEL_WIDTH 3 /* CLK_SEL_ENA */
161 #define ADSP2_RAM_RDY 0x0001
162 #define ADSP2_RAM_RDY_MASK 0x0001
163 #define ADSP2_RAM_RDY_SHIFT 0
164 #define ADSP2_RAM_RDY_WIDTH 1
167 struct list_head list;
171 static struct wm_adsp_buf *wm_adsp_buf_alloc(const void *src, size_t len,
172 struct list_head *list)
174 struct wm_adsp_buf *buf = kzalloc(sizeof(*buf), GFP_KERNEL);
179 buf->buf = vmalloc(len);
184 memcpy(buf->buf, src, len);
187 list_add_tail(&buf->list, list);
192 static void wm_adsp_buf_free(struct list_head *list)
194 while (!list_empty(list)) {
195 struct wm_adsp_buf *buf = list_first_entry(list,
198 list_del(&buf->list);
204 #define WM_ADSP_NUM_FW 4
206 #define WM_ADSP_FW_MBC_VSS 0
207 #define WM_ADSP_FW_TX 1
208 #define WM_ADSP_FW_TX_SPK 2
209 #define WM_ADSP_FW_RX_ANC 3
211 static const char *wm_adsp_fw_text[WM_ADSP_NUM_FW] = {
212 [WM_ADSP_FW_MBC_VSS] = "MBC/VSS",
213 [WM_ADSP_FW_TX] = "Tx",
214 [WM_ADSP_FW_TX_SPK] = "Tx Speaker",
215 [WM_ADSP_FW_RX_ANC] = "Rx ANC",
220 } wm_adsp_fw[WM_ADSP_NUM_FW] = {
221 [WM_ADSP_FW_MBC_VSS] = { .file = "mbc-vss" },
222 [WM_ADSP_FW_TX] = { .file = "tx" },
223 [WM_ADSP_FW_TX_SPK] = { .file = "tx-spk" },
224 [WM_ADSP_FW_RX_ANC] = { .file = "rx-anc" },
227 struct wm_coeff_ctl_ops {
228 int (*xget)(struct snd_kcontrol *kcontrol,
229 struct snd_ctl_elem_value *ucontrol);
230 int (*xput)(struct snd_kcontrol *kcontrol,
231 struct snd_ctl_elem_value *ucontrol);
232 int (*xinfo)(struct snd_kcontrol *kcontrol,
233 struct snd_ctl_elem_info *uinfo);
236 struct wm_coeff_ctl {
239 struct wm_adsp_alg_region alg_region;
240 struct wm_coeff_ctl_ops ops;
242 unsigned int enabled:1;
243 struct list_head list;
248 struct snd_kcontrol *kcontrol;
252 #ifdef CONFIG_DEBUG_FS
253 static void wm_adsp_debugfs_save_wmfwname(struct wm_adsp *dsp, const char *s)
255 char *tmp = kasprintf(GFP_KERNEL, "%s\n", s);
257 mutex_lock(&dsp->debugfs_lock);
258 kfree(dsp->wmfw_file_name);
259 dsp->wmfw_file_name = tmp;
260 mutex_unlock(&dsp->debugfs_lock);
263 static void wm_adsp_debugfs_save_binname(struct wm_adsp *dsp, const char *s)
265 char *tmp = kasprintf(GFP_KERNEL, "%s\n", s);
267 mutex_lock(&dsp->debugfs_lock);
268 kfree(dsp->bin_file_name);
269 dsp->bin_file_name = tmp;
270 mutex_unlock(&dsp->debugfs_lock);
273 static void wm_adsp_debugfs_clear(struct wm_adsp *dsp)
275 mutex_lock(&dsp->debugfs_lock);
276 kfree(dsp->wmfw_file_name);
277 kfree(dsp->bin_file_name);
278 dsp->wmfw_file_name = NULL;
279 dsp->bin_file_name = NULL;
280 mutex_unlock(&dsp->debugfs_lock);
283 static ssize_t wm_adsp_debugfs_wmfw_read(struct file *file,
284 char __user *user_buf,
285 size_t count, loff_t *ppos)
287 struct wm_adsp *dsp = file->private_data;
290 mutex_lock(&dsp->debugfs_lock);
292 if (!dsp->wmfw_file_name || !dsp->running)
295 ret = simple_read_from_buffer(user_buf, count, ppos,
297 strlen(dsp->wmfw_file_name));
299 mutex_unlock(&dsp->debugfs_lock);
303 static ssize_t wm_adsp_debugfs_bin_read(struct file *file,
304 char __user *user_buf,
305 size_t count, loff_t *ppos)
307 struct wm_adsp *dsp = file->private_data;
310 mutex_lock(&dsp->debugfs_lock);
312 if (!dsp->bin_file_name || !dsp->running)
315 ret = simple_read_from_buffer(user_buf, count, ppos,
317 strlen(dsp->bin_file_name));
319 mutex_unlock(&dsp->debugfs_lock);
323 static const struct {
325 const struct file_operations fops;
326 } wm_adsp_debugfs_fops[] = {
328 .name = "wmfw_file_name",
331 .read = wm_adsp_debugfs_wmfw_read,
335 .name = "bin_file_name",
338 .read = wm_adsp_debugfs_bin_read,
343 static void wm_adsp2_init_debugfs(struct wm_adsp *dsp,
344 struct snd_soc_codec *codec)
346 struct dentry *root = NULL;
350 if (!codec->component.debugfs_root) {
351 adsp_err(dsp, "No codec debugfs root\n");
355 root_name = kmalloc(PAGE_SIZE, GFP_KERNEL);
359 snprintf(root_name, PAGE_SIZE, "dsp%d", dsp->num);
360 root = debugfs_create_dir(root_name, codec->component.debugfs_root);
366 if (!debugfs_create_bool("running", S_IRUGO, root, &dsp->running))
369 if (!debugfs_create_x32("fw_id", S_IRUGO, root, &dsp->fw_id))
372 if (!debugfs_create_x32("fw_version", S_IRUGO, root,
373 &dsp->fw_id_version))
376 for (i = 0; i < ARRAY_SIZE(wm_adsp_debugfs_fops); ++i) {
377 if (!debugfs_create_file(wm_adsp_debugfs_fops[i].name,
379 &wm_adsp_debugfs_fops[i].fops))
383 dsp->debugfs_root = root;
387 debugfs_remove_recursive(root);
388 adsp_err(dsp, "Failed to create debugfs\n");
391 static void wm_adsp2_cleanup_debugfs(struct wm_adsp *dsp)
393 wm_adsp_debugfs_clear(dsp);
394 debugfs_remove_recursive(dsp->debugfs_root);
397 static inline void wm_adsp2_init_debugfs(struct wm_adsp *dsp,
398 struct snd_soc_codec *codec)
402 static inline void wm_adsp2_cleanup_debugfs(struct wm_adsp *dsp)
406 static inline void wm_adsp_debugfs_save_wmfwname(struct wm_adsp *dsp,
411 static inline void wm_adsp_debugfs_save_binname(struct wm_adsp *dsp,
416 static inline void wm_adsp_debugfs_clear(struct wm_adsp *dsp)
421 static int wm_adsp_fw_get(struct snd_kcontrol *kcontrol,
422 struct snd_ctl_elem_value *ucontrol)
424 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
425 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
426 struct wm_adsp *dsp = snd_soc_codec_get_drvdata(codec);
428 ucontrol->value.integer.value[0] = dsp[e->shift_l].fw;
433 static int wm_adsp_fw_put(struct snd_kcontrol *kcontrol,
434 struct snd_ctl_elem_value *ucontrol)
436 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
437 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
438 struct wm_adsp *dsp = snd_soc_codec_get_drvdata(codec);
440 if (ucontrol->value.integer.value[0] == dsp[e->shift_l].fw)
443 if (ucontrol->value.integer.value[0] >= WM_ADSP_NUM_FW)
446 if (dsp[e->shift_l].running)
449 dsp[e->shift_l].fw = ucontrol->value.integer.value[0];
454 static const struct soc_enum wm_adsp_fw_enum[] = {
455 SOC_ENUM_SINGLE(0, 0, ARRAY_SIZE(wm_adsp_fw_text), wm_adsp_fw_text),
456 SOC_ENUM_SINGLE(0, 1, ARRAY_SIZE(wm_adsp_fw_text), wm_adsp_fw_text),
457 SOC_ENUM_SINGLE(0, 2, ARRAY_SIZE(wm_adsp_fw_text), wm_adsp_fw_text),
458 SOC_ENUM_SINGLE(0, 3, ARRAY_SIZE(wm_adsp_fw_text), wm_adsp_fw_text),
461 const struct snd_kcontrol_new wm_adsp_fw_controls[] = {
462 SOC_ENUM_EXT("DSP1 Firmware", wm_adsp_fw_enum[0],
463 wm_adsp_fw_get, wm_adsp_fw_put),
464 SOC_ENUM_EXT("DSP2 Firmware", wm_adsp_fw_enum[1],
465 wm_adsp_fw_get, wm_adsp_fw_put),
466 SOC_ENUM_EXT("DSP3 Firmware", wm_adsp_fw_enum[2],
467 wm_adsp_fw_get, wm_adsp_fw_put),
468 SOC_ENUM_EXT("DSP4 Firmware", wm_adsp_fw_enum[3],
469 wm_adsp_fw_get, wm_adsp_fw_put),
471 EXPORT_SYMBOL_GPL(wm_adsp_fw_controls);
473 static struct wm_adsp_region const *wm_adsp_find_region(struct wm_adsp *dsp,
478 for (i = 0; i < dsp->num_mems; i++)
479 if (dsp->mem[i].type == type)
485 static unsigned int wm_adsp_region_to_reg(struct wm_adsp_region const *mem,
492 return mem->base + (offset * 3);
494 return mem->base + (offset * 2);
496 return mem->base + (offset * 2);
498 return mem->base + (offset * 2);
500 return mem->base + (offset * 2);
502 WARN(1, "Unknown memory region type");
507 static void wm_adsp2_show_fw_status(struct wm_adsp *dsp)
512 ret = regmap_raw_read(dsp->regmap, dsp->base + ADSP2_SCRATCH0,
513 scratch, sizeof(scratch));
515 adsp_err(dsp, "Failed to read SCRATCH regs: %d\n", ret);
519 adsp_dbg(dsp, "FW SCRATCH 0:0x%x 1:0x%x 2:0x%x 3:0x%x\n",
520 be16_to_cpu(scratch[0]),
521 be16_to_cpu(scratch[1]),
522 be16_to_cpu(scratch[2]),
523 be16_to_cpu(scratch[3]));
526 static int wm_coeff_info(struct snd_kcontrol *kcontrol,
527 struct snd_ctl_elem_info *uinfo)
529 struct wm_coeff_ctl *ctl = (struct wm_coeff_ctl *)kcontrol->private_value;
531 uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
532 uinfo->count = ctl->len;
536 static int wm_coeff_write_control(struct wm_coeff_ctl *ctl,
537 const void *buf, size_t len)
539 struct wm_adsp_alg_region *alg_region = &ctl->alg_region;
540 const struct wm_adsp_region *mem;
541 struct wm_adsp *dsp = ctl->dsp;
546 mem = wm_adsp_find_region(dsp, alg_region->type);
548 adsp_err(dsp, "No base for region %x\n",
553 reg = ctl->alg_region.base + ctl->offset;
554 reg = wm_adsp_region_to_reg(mem, reg);
556 scratch = kmemdup(buf, ctl->len, GFP_KERNEL | GFP_DMA);
560 ret = regmap_raw_write(dsp->regmap, reg, scratch,
563 adsp_err(dsp, "Failed to write %zu bytes to %x: %d\n",
568 adsp_dbg(dsp, "Wrote %zu bytes to %x\n", ctl->len, reg);
575 static int wm_coeff_put(struct snd_kcontrol *kcontrol,
576 struct snd_ctl_elem_value *ucontrol)
578 struct wm_coeff_ctl *ctl = (struct wm_coeff_ctl *)kcontrol->private_value;
579 char *p = ucontrol->value.bytes.data;
581 memcpy(ctl->cache, p, ctl->len);
587 return wm_coeff_write_control(ctl, p, ctl->len);
590 static int wm_coeff_read_control(struct wm_coeff_ctl *ctl,
591 void *buf, size_t len)
593 struct wm_adsp_alg_region *alg_region = &ctl->alg_region;
594 const struct wm_adsp_region *mem;
595 struct wm_adsp *dsp = ctl->dsp;
600 mem = wm_adsp_find_region(dsp, alg_region->type);
602 adsp_err(dsp, "No base for region %x\n",
607 reg = ctl->alg_region.base + ctl->offset;
608 reg = wm_adsp_region_to_reg(mem, reg);
610 scratch = kmalloc(ctl->len, GFP_KERNEL | GFP_DMA);
614 ret = regmap_raw_read(dsp->regmap, reg, scratch, ctl->len);
616 adsp_err(dsp, "Failed to read %zu bytes from %x: %d\n",
621 adsp_dbg(dsp, "Read %zu bytes from %x\n", ctl->len, reg);
623 memcpy(buf, scratch, ctl->len);
629 static int wm_coeff_get(struct snd_kcontrol *kcontrol,
630 struct snd_ctl_elem_value *ucontrol)
632 struct wm_coeff_ctl *ctl = (struct wm_coeff_ctl *)kcontrol->private_value;
633 char *p = ucontrol->value.bytes.data;
635 if (ctl->flags & WMFW_CTL_FLAG_VOLATILE) {
637 return wm_coeff_read_control(ctl, p, ctl->len);
642 memcpy(p, ctl->cache, ctl->len);
647 struct wmfw_ctl_work {
649 struct wm_coeff_ctl *ctl;
650 struct work_struct work;
653 static int wmfw_add_ctl(struct wm_adsp *dsp, struct wm_coeff_ctl *ctl)
655 struct snd_kcontrol_new *kcontrol;
658 if (!ctl || !ctl->name)
661 kcontrol = kzalloc(sizeof(*kcontrol), GFP_KERNEL);
664 kcontrol->iface = SNDRV_CTL_ELEM_IFACE_MIXER;
666 kcontrol->name = ctl->name;
667 kcontrol->info = wm_coeff_info;
668 kcontrol->get = wm_coeff_get;
669 kcontrol->put = wm_coeff_put;
670 kcontrol->private_value = (unsigned long)ctl;
673 if (ctl->flags & WMFW_CTL_FLAG_WRITEABLE)
674 kcontrol->access |= SNDRV_CTL_ELEM_ACCESS_WRITE;
675 if (ctl->flags & WMFW_CTL_FLAG_READABLE)
676 kcontrol->access |= SNDRV_CTL_ELEM_ACCESS_READ;
677 if (ctl->flags & WMFW_CTL_FLAG_VOLATILE)
678 kcontrol->access |= SNDRV_CTL_ELEM_ACCESS_VOLATILE;
681 ret = snd_soc_add_card_controls(dsp->card,
688 ctl->kcontrol = snd_soc_card_get_kcontrol(dsp->card,
698 static int wm_coeff_init_control_caches(struct wm_adsp *dsp)
700 struct wm_coeff_ctl *ctl;
703 list_for_each_entry(ctl, &dsp->ctl_list, list) {
704 if (!ctl->enabled || ctl->set)
706 if (ctl->flags & WMFW_CTL_FLAG_VOLATILE)
709 ret = wm_coeff_read_control(ctl,
719 static int wm_coeff_sync_controls(struct wm_adsp *dsp)
721 struct wm_coeff_ctl *ctl;
724 list_for_each_entry(ctl, &dsp->ctl_list, list) {
727 if (ctl->set && !(ctl->flags & WMFW_CTL_FLAG_VOLATILE)) {
728 ret = wm_coeff_write_control(ctl,
739 static void wm_adsp_ctl_work(struct work_struct *work)
741 struct wmfw_ctl_work *ctl_work = container_of(work,
742 struct wmfw_ctl_work,
745 wmfw_add_ctl(ctl_work->dsp, ctl_work->ctl);
749 static int wm_adsp_create_control(struct wm_adsp *dsp,
750 const struct wm_adsp_alg_region *alg_region,
751 unsigned int offset, unsigned int len,
752 const char *subname, unsigned int subname_len,
755 struct wm_coeff_ctl *ctl;
756 struct wmfw_ctl_work *ctl_work;
757 char name[SNDRV_CTL_ELEM_ID_NAME_MAXLEN];
761 if (flags & WMFW_CTL_FLAG_SYS)
764 switch (alg_region->type) {
781 adsp_err(dsp, "Unknown region type: %d\n", alg_region->type);
785 switch (dsp->fw_ver) {
788 snprintf(name, SNDRV_CTL_ELEM_ID_NAME_MAXLEN, "DSP%d %s %x",
789 dsp->num, region_name, alg_region->alg);
792 ret = snprintf(name, SNDRV_CTL_ELEM_ID_NAME_MAXLEN,
793 "DSP%d%c %.12s %x", dsp->num, *region_name,
794 wm_adsp_fw_text[dsp->fw], alg_region->alg);
796 /* Truncate the subname from the start if it is too long */
798 int avail = SNDRV_CTL_ELEM_ID_NAME_MAXLEN - ret - 2;
801 if (subname_len > avail)
802 skip = subname_len - avail;
805 SNDRV_CTL_ELEM_ID_NAME_MAXLEN - ret, " %.*s",
806 subname_len - skip, subname + skip);
811 list_for_each_entry(ctl, &dsp->ctl_list,
813 if (!strcmp(ctl->name, name)) {
820 ctl = kzalloc(sizeof(*ctl), GFP_KERNEL);
823 ctl->fw_name = wm_adsp_fw_text[dsp->fw];
824 ctl->alg_region = *alg_region;
825 ctl->name = kmemdup(name, strlen(name) + 1, GFP_KERNEL);
832 ctl->ops.xget = wm_coeff_get;
833 ctl->ops.xput = wm_coeff_put;
837 ctl->offset = offset;
839 adsp_warn(dsp, "Truncating control %s from %d\n",
844 ctl->cache = kzalloc(ctl->len, GFP_KERNEL);
850 list_add(&ctl->list, &dsp->ctl_list);
852 ctl_work = kzalloc(sizeof(*ctl_work), GFP_KERNEL);
860 INIT_WORK(&ctl_work->work, wm_adsp_ctl_work);
861 schedule_work(&ctl_work->work);
866 list_del(&ctl->list);
876 struct wm_coeff_parsed_alg {
883 struct wm_coeff_parsed_coeff {
893 static int wm_coeff_parse_string(int bytes, const u8 **pos, const u8 **str)
902 length = le16_to_cpu(*((__le16 *)*pos));
911 *pos += ((length + bytes) + 3) & ~0x03;
916 static int wm_coeff_parse_int(int bytes, const u8 **pos)
922 val = le16_to_cpu(*((__le16 *)*pos));
925 val = le32_to_cpu(*((__le32 *)*pos));
936 static inline void wm_coeff_parse_alg(struct wm_adsp *dsp, const u8 **data,
937 struct wm_coeff_parsed_alg *blk)
939 const struct wmfw_adsp_alg_data *raw;
941 switch (dsp->fw_ver) {
944 raw = (const struct wmfw_adsp_alg_data *)*data;
947 blk->id = le32_to_cpu(raw->id);
948 blk->name = raw->name;
949 blk->name_len = strlen(raw->name);
950 blk->ncoeff = le32_to_cpu(raw->ncoeff);
953 blk->id = wm_coeff_parse_int(sizeof(raw->id), data);
954 blk->name_len = wm_coeff_parse_string(sizeof(u8), data,
956 wm_coeff_parse_string(sizeof(u16), data, NULL);
957 blk->ncoeff = wm_coeff_parse_int(sizeof(raw->ncoeff), data);
961 adsp_dbg(dsp, "Algorithm ID: %#x\n", blk->id);
962 adsp_dbg(dsp, "Algorithm name: %.*s\n", blk->name_len, blk->name);
963 adsp_dbg(dsp, "# of coefficient descriptors: %#x\n", blk->ncoeff);
966 static inline void wm_coeff_parse_coeff(struct wm_adsp *dsp, const u8 **data,
967 struct wm_coeff_parsed_coeff *blk)
969 const struct wmfw_adsp_coeff_data *raw;
973 switch (dsp->fw_ver) {
976 raw = (const struct wmfw_adsp_coeff_data *)*data;
977 *data = *data + sizeof(raw->hdr) + le32_to_cpu(raw->hdr.size);
979 blk->offset = le16_to_cpu(raw->hdr.offset);
980 blk->mem_type = le16_to_cpu(raw->hdr.type);
981 blk->name = raw->name;
982 blk->name_len = strlen(raw->name);
983 blk->ctl_type = le16_to_cpu(raw->ctl_type);
984 blk->flags = le16_to_cpu(raw->flags);
985 blk->len = le32_to_cpu(raw->len);
989 blk->offset = wm_coeff_parse_int(sizeof(raw->hdr.offset), &tmp);
990 blk->mem_type = wm_coeff_parse_int(sizeof(raw->hdr.type), &tmp);
991 length = wm_coeff_parse_int(sizeof(raw->hdr.size), &tmp);
992 blk->name_len = wm_coeff_parse_string(sizeof(u8), &tmp,
994 wm_coeff_parse_string(sizeof(u8), &tmp, NULL);
995 wm_coeff_parse_string(sizeof(u16), &tmp, NULL);
996 blk->ctl_type = wm_coeff_parse_int(sizeof(raw->ctl_type), &tmp);
997 blk->flags = wm_coeff_parse_int(sizeof(raw->flags), &tmp);
998 blk->len = wm_coeff_parse_int(sizeof(raw->len), &tmp);
1000 *data = *data + sizeof(raw->hdr) + length;
1004 adsp_dbg(dsp, "\tCoefficient type: %#x\n", blk->mem_type);
1005 adsp_dbg(dsp, "\tCoefficient offset: %#x\n", blk->offset);
1006 adsp_dbg(dsp, "\tCoefficient name: %.*s\n", blk->name_len, blk->name);
1007 adsp_dbg(dsp, "\tCoefficient flags: %#x\n", blk->flags);
1008 adsp_dbg(dsp, "\tALSA control type: %#x\n", blk->ctl_type);
1009 adsp_dbg(dsp, "\tALSA control len: %#x\n", blk->len);
1012 static int wm_adsp_parse_coeff(struct wm_adsp *dsp,
1013 const struct wmfw_region *region)
1015 struct wm_adsp_alg_region alg_region = {};
1016 struct wm_coeff_parsed_alg alg_blk;
1017 struct wm_coeff_parsed_coeff coeff_blk;
1018 const u8 *data = region->data;
1021 wm_coeff_parse_alg(dsp, &data, &alg_blk);
1022 for (i = 0; i < alg_blk.ncoeff; i++) {
1023 wm_coeff_parse_coeff(dsp, &data, &coeff_blk);
1025 switch (coeff_blk.ctl_type) {
1026 case SNDRV_CTL_ELEM_TYPE_BYTES:
1029 adsp_err(dsp, "Unknown control type: %d\n",
1030 coeff_blk.ctl_type);
1034 alg_region.type = coeff_blk.mem_type;
1035 alg_region.alg = alg_blk.id;
1037 ret = wm_adsp_create_control(dsp, &alg_region,
1044 adsp_err(dsp, "Failed to create control: %.*s, %d\n",
1045 coeff_blk.name_len, coeff_blk.name, ret);
1051 static int wm_adsp_load(struct wm_adsp *dsp)
1053 LIST_HEAD(buf_list);
1054 const struct firmware *firmware;
1055 struct regmap *regmap = dsp->regmap;
1056 unsigned int pos = 0;
1057 const struct wmfw_header *header;
1058 const struct wmfw_adsp1_sizes *adsp1_sizes;
1059 const struct wmfw_adsp2_sizes *adsp2_sizes;
1060 const struct wmfw_footer *footer;
1061 const struct wmfw_region *region;
1062 const struct wm_adsp_region *mem;
1063 const char *region_name;
1064 char *file, *text = NULL;
1065 struct wm_adsp_buf *buf;
1068 int ret, offset, type, sizes;
1070 file = kzalloc(PAGE_SIZE, GFP_KERNEL);
1074 snprintf(file, PAGE_SIZE, "/*(DEBLOBBED)*/", dsp->part, dsp->num,
1075 wm_adsp_fw[dsp->fw].file);
1076 file[PAGE_SIZE - 1] = '\0';
1078 ret = reject_firmware(&firmware, file, dsp->dev);
1080 adsp_err(dsp, "Failed to request '%s'\n", file);
1085 pos = sizeof(*header) + sizeof(*adsp1_sizes) + sizeof(*footer);
1086 if (pos >= firmware->size) {
1087 adsp_err(dsp, "%s: file too short, %zu bytes\n",
1088 file, firmware->size);
1092 header = (void*)&firmware->data[0];
1094 if (memcmp(&header->magic[0], "WMFW", 4) != 0) {
1095 adsp_err(dsp, "%s: invalid magic\n", file);
1099 switch (header->ver) {
1101 adsp_warn(dsp, "%s: Depreciated file format %d\n",
1108 adsp_err(dsp, "%s: unknown file format %d\n",
1113 adsp_info(dsp, "Firmware version: %d\n", header->ver);
1114 dsp->fw_ver = header->ver;
1116 if (header->core != dsp->type) {
1117 adsp_err(dsp, "%s: invalid core %d != %d\n",
1118 file, header->core, dsp->type);
1122 switch (dsp->type) {
1124 pos = sizeof(*header) + sizeof(*adsp1_sizes) + sizeof(*footer);
1125 adsp1_sizes = (void *)&(header[1]);
1126 footer = (void *)&(adsp1_sizes[1]);
1127 sizes = sizeof(*adsp1_sizes);
1129 adsp_dbg(dsp, "%s: %d DM, %d PM, %d ZM\n",
1130 file, le32_to_cpu(adsp1_sizes->dm),
1131 le32_to_cpu(adsp1_sizes->pm),
1132 le32_to_cpu(adsp1_sizes->zm));
1136 pos = sizeof(*header) + sizeof(*adsp2_sizes) + sizeof(*footer);
1137 adsp2_sizes = (void *)&(header[1]);
1138 footer = (void *)&(adsp2_sizes[1]);
1139 sizes = sizeof(*adsp2_sizes);
1141 adsp_dbg(dsp, "%s: %d XM, %d YM %d PM, %d ZM\n",
1142 file, le32_to_cpu(adsp2_sizes->xm),
1143 le32_to_cpu(adsp2_sizes->ym),
1144 le32_to_cpu(adsp2_sizes->pm),
1145 le32_to_cpu(adsp2_sizes->zm));
1149 WARN(1, "Unknown DSP type");
1153 if (le32_to_cpu(header->len) != sizeof(*header) +
1154 sizes + sizeof(*footer)) {
1155 adsp_err(dsp, "%s: unexpected header length %d\n",
1156 file, le32_to_cpu(header->len));
1160 adsp_dbg(dsp, "%s: timestamp %llu\n", file,
1161 le64_to_cpu(footer->timestamp));
1163 while (pos < firmware->size &&
1164 pos - firmware->size > sizeof(*region)) {
1165 region = (void *)&(firmware->data[pos]);
1166 region_name = "Unknown";
1169 offset = le32_to_cpu(region->offset) & 0xffffff;
1170 type = be32_to_cpu(region->type) & 0xff;
1171 mem = wm_adsp_find_region(dsp, type);
1174 case WMFW_NAME_TEXT:
1175 region_name = "Firmware name";
1176 text = kzalloc(le32_to_cpu(region->len) + 1,
1179 case WMFW_ALGORITHM_DATA:
1180 region_name = "Algorithm";
1181 ret = wm_adsp_parse_coeff(dsp, region);
1185 case WMFW_INFO_TEXT:
1186 region_name = "Information";
1187 text = kzalloc(le32_to_cpu(region->len) + 1,
1191 region_name = "Absolute";
1196 reg = wm_adsp_region_to_reg(mem, offset);
1200 reg = wm_adsp_region_to_reg(mem, offset);
1204 reg = wm_adsp_region_to_reg(mem, offset);
1208 reg = wm_adsp_region_to_reg(mem, offset);
1212 reg = wm_adsp_region_to_reg(mem, offset);
1216 "%s.%d: Unknown region type %x at %d(%x)\n",
1217 file, regions, type, pos, pos);
1221 adsp_dbg(dsp, "%s.%d: %d bytes at %d in %s\n", file,
1222 regions, le32_to_cpu(region->len), offset,
1225 if ((pos + le32_to_cpu(region->len) + sizeof(*region)) >
1228 "%s.%d: %s region len %d bytes exceeds file length %zu\n",
1229 file, regions, region_name,
1230 le32_to_cpu(region->len), firmware->size);
1236 memcpy(text, region->data, le32_to_cpu(region->len));
1237 adsp_info(dsp, "%s: %s\n", file, text);
1243 buf = wm_adsp_buf_alloc(region->data,
1244 le32_to_cpu(region->len),
1247 adsp_err(dsp, "Out of memory\n");
1252 ret = regmap_raw_write_async(regmap, reg, buf->buf,
1253 le32_to_cpu(region->len));
1256 "%s.%d: Failed to write %d bytes at %d in %s: %d\n",
1258 le32_to_cpu(region->len), offset,
1264 pos += le32_to_cpu(region->len) + sizeof(*region);
1268 ret = regmap_async_complete(regmap);
1270 adsp_err(dsp, "Failed to complete async write: %d\n", ret);
1274 if (pos > firmware->size)
1275 adsp_warn(dsp, "%s.%d: %zu bytes at end of file\n",
1276 file, regions, pos - firmware->size);
1278 wm_adsp_debugfs_save_wmfwname(dsp, file);
1281 regmap_async_complete(regmap);
1282 wm_adsp_buf_free(&buf_list);
1283 release_firmware(firmware);
1291 static void wm_adsp_ctl_fixup_base(struct wm_adsp *dsp,
1292 const struct wm_adsp_alg_region *alg_region)
1294 struct wm_coeff_ctl *ctl;
1296 list_for_each_entry(ctl, &dsp->ctl_list, list) {
1297 if (ctl->fw_name == wm_adsp_fw_text[dsp->fw] &&
1298 alg_region->alg == ctl->alg_region.alg &&
1299 alg_region->type == ctl->alg_region.type) {
1300 ctl->alg_region.base = alg_region->base;
1305 static void *wm_adsp_read_algs(struct wm_adsp *dsp, size_t n_algs,
1306 unsigned int pos, unsigned int len)
1313 adsp_err(dsp, "No algorithms\n");
1314 return ERR_PTR(-EINVAL);
1317 if (n_algs > 1024) {
1318 adsp_err(dsp, "Algorithm count %zx excessive\n", n_algs);
1319 return ERR_PTR(-EINVAL);
1322 /* Read the terminator first to validate the length */
1323 ret = regmap_raw_read(dsp->regmap, pos + len, &val, sizeof(val));
1325 adsp_err(dsp, "Failed to read algorithm list end: %d\n",
1327 return ERR_PTR(ret);
1330 if (be32_to_cpu(val) != 0xbedead)
1331 adsp_warn(dsp, "Algorithm list end %x 0x%x != 0xbeadead\n",
1332 pos + len, be32_to_cpu(val));
1334 alg = kzalloc(len * 2, GFP_KERNEL | GFP_DMA);
1336 return ERR_PTR(-ENOMEM);
1338 ret = regmap_raw_read(dsp->regmap, pos, alg, len * 2);
1340 adsp_err(dsp, "Failed to read algorithm list: %d\n",
1343 return ERR_PTR(ret);
1349 static struct wm_adsp_alg_region *wm_adsp_create_region(struct wm_adsp *dsp,
1350 int type, __be32 id,
1353 struct wm_adsp_alg_region *alg_region;
1355 alg_region = kzalloc(sizeof(*alg_region), GFP_KERNEL);
1357 return ERR_PTR(-ENOMEM);
1359 alg_region->type = type;
1360 alg_region->alg = be32_to_cpu(id);
1361 alg_region->base = be32_to_cpu(base);
1363 list_add_tail(&alg_region->list, &dsp->alg_regions);
1365 if (dsp->fw_ver > 0)
1366 wm_adsp_ctl_fixup_base(dsp, alg_region);
1371 static int wm_adsp1_setup_algs(struct wm_adsp *dsp)
1373 struct wmfw_adsp1_id_hdr adsp1_id;
1374 struct wmfw_adsp1_alg_hdr *adsp1_alg;
1375 struct wm_adsp_alg_region *alg_region;
1376 const struct wm_adsp_region *mem;
1377 unsigned int pos, len;
1381 mem = wm_adsp_find_region(dsp, WMFW_ADSP1_DM);
1385 ret = regmap_raw_read(dsp->regmap, mem->base, &adsp1_id,
1388 adsp_err(dsp, "Failed to read algorithm info: %d\n",
1393 n_algs = be32_to_cpu(adsp1_id.n_algs);
1394 dsp->fw_id = be32_to_cpu(adsp1_id.fw.id);
1395 adsp_info(dsp, "Firmware: %x v%d.%d.%d, %zu algorithms\n",
1397 (be32_to_cpu(adsp1_id.fw.ver) & 0xff0000) >> 16,
1398 (be32_to_cpu(adsp1_id.fw.ver) & 0xff00) >> 8,
1399 be32_to_cpu(adsp1_id.fw.ver) & 0xff,
1402 alg_region = wm_adsp_create_region(dsp, WMFW_ADSP1_ZM,
1403 adsp1_id.fw.id, adsp1_id.zm);
1404 if (IS_ERR(alg_region))
1405 return PTR_ERR(alg_region);
1407 alg_region = wm_adsp_create_region(dsp, WMFW_ADSP1_DM,
1408 adsp1_id.fw.id, adsp1_id.dm);
1409 if (IS_ERR(alg_region))
1410 return PTR_ERR(alg_region);
1412 pos = sizeof(adsp1_id) / 2;
1413 len = (sizeof(*adsp1_alg) * n_algs) / 2;
1415 adsp1_alg = wm_adsp_read_algs(dsp, n_algs, mem->base + pos, len);
1416 if (IS_ERR(adsp1_alg))
1417 return PTR_ERR(adsp1_alg);
1419 for (i = 0; i < n_algs; i++) {
1420 adsp_info(dsp, "%d: ID %x v%d.%d.%d DM@%x ZM@%x\n",
1421 i, be32_to_cpu(adsp1_alg[i].alg.id),
1422 (be32_to_cpu(adsp1_alg[i].alg.ver) & 0xff0000) >> 16,
1423 (be32_to_cpu(adsp1_alg[i].alg.ver) & 0xff00) >> 8,
1424 be32_to_cpu(adsp1_alg[i].alg.ver) & 0xff,
1425 be32_to_cpu(adsp1_alg[i].dm),
1426 be32_to_cpu(adsp1_alg[i].zm));
1428 alg_region = wm_adsp_create_region(dsp, WMFW_ADSP1_DM,
1429 adsp1_alg[i].alg.id,
1431 if (IS_ERR(alg_region)) {
1432 ret = PTR_ERR(alg_region);
1435 if (dsp->fw_ver == 0) {
1436 if (i + 1 < n_algs) {
1437 len = be32_to_cpu(adsp1_alg[i + 1].dm);
1438 len -= be32_to_cpu(adsp1_alg[i].dm);
1440 wm_adsp_create_control(dsp, alg_region, 0,
1443 adsp_warn(dsp, "Missing length info for region DM with ID %x\n",
1444 be32_to_cpu(adsp1_alg[i].alg.id));
1448 alg_region = wm_adsp_create_region(dsp, WMFW_ADSP1_ZM,
1449 adsp1_alg[i].alg.id,
1451 if (IS_ERR(alg_region)) {
1452 ret = PTR_ERR(alg_region);
1455 if (dsp->fw_ver == 0) {
1456 if (i + 1 < n_algs) {
1457 len = be32_to_cpu(adsp1_alg[i + 1].zm);
1458 len -= be32_to_cpu(adsp1_alg[i].zm);
1460 wm_adsp_create_control(dsp, alg_region, 0,
1463 adsp_warn(dsp, "Missing length info for region ZM with ID %x\n",
1464 be32_to_cpu(adsp1_alg[i].alg.id));
1474 static int wm_adsp2_setup_algs(struct wm_adsp *dsp)
1476 struct wmfw_adsp2_id_hdr adsp2_id;
1477 struct wmfw_adsp2_alg_hdr *adsp2_alg;
1478 struct wm_adsp_alg_region *alg_region;
1479 const struct wm_adsp_region *mem;
1480 unsigned int pos, len;
1484 mem = wm_adsp_find_region(dsp, WMFW_ADSP2_XM);
1488 ret = regmap_raw_read(dsp->regmap, mem->base, &adsp2_id,
1491 adsp_err(dsp, "Failed to read algorithm info: %d\n",
1496 n_algs = be32_to_cpu(adsp2_id.n_algs);
1497 dsp->fw_id = be32_to_cpu(adsp2_id.fw.id);
1498 dsp->fw_id_version = be32_to_cpu(adsp2_id.fw.ver);
1499 adsp_info(dsp, "Firmware: %x v%d.%d.%d, %zu algorithms\n",
1501 (dsp->fw_id_version & 0xff0000) >> 16,
1502 (dsp->fw_id_version & 0xff00) >> 8,
1503 dsp->fw_id_version & 0xff,
1506 alg_region = wm_adsp_create_region(dsp, WMFW_ADSP2_XM,
1507 adsp2_id.fw.id, adsp2_id.xm);
1508 if (IS_ERR(alg_region))
1509 return PTR_ERR(alg_region);
1511 alg_region = wm_adsp_create_region(dsp, WMFW_ADSP2_YM,
1512 adsp2_id.fw.id, adsp2_id.ym);
1513 if (IS_ERR(alg_region))
1514 return PTR_ERR(alg_region);
1516 alg_region = wm_adsp_create_region(dsp, WMFW_ADSP2_ZM,
1517 adsp2_id.fw.id, adsp2_id.zm);
1518 if (IS_ERR(alg_region))
1519 return PTR_ERR(alg_region);
1521 pos = sizeof(adsp2_id) / 2;
1522 len = (sizeof(*adsp2_alg) * n_algs) / 2;
1524 adsp2_alg = wm_adsp_read_algs(dsp, n_algs, mem->base + pos, len);
1525 if (IS_ERR(adsp2_alg))
1526 return PTR_ERR(adsp2_alg);
1528 for (i = 0; i < n_algs; i++) {
1530 "%d: ID %x v%d.%d.%d XM@%x YM@%x ZM@%x\n",
1531 i, be32_to_cpu(adsp2_alg[i].alg.id),
1532 (be32_to_cpu(adsp2_alg[i].alg.ver) & 0xff0000) >> 16,
1533 (be32_to_cpu(adsp2_alg[i].alg.ver) & 0xff00) >> 8,
1534 be32_to_cpu(adsp2_alg[i].alg.ver) & 0xff,
1535 be32_to_cpu(adsp2_alg[i].xm),
1536 be32_to_cpu(adsp2_alg[i].ym),
1537 be32_to_cpu(adsp2_alg[i].zm));
1539 alg_region = wm_adsp_create_region(dsp, WMFW_ADSP2_XM,
1540 adsp2_alg[i].alg.id,
1542 if (IS_ERR(alg_region)) {
1543 ret = PTR_ERR(alg_region);
1546 if (dsp->fw_ver == 0) {
1547 if (i + 1 < n_algs) {
1548 len = be32_to_cpu(adsp2_alg[i + 1].xm);
1549 len -= be32_to_cpu(adsp2_alg[i].xm);
1551 wm_adsp_create_control(dsp, alg_region, 0,
1554 adsp_warn(dsp, "Missing length info for region XM with ID %x\n",
1555 be32_to_cpu(adsp2_alg[i].alg.id));
1559 alg_region = wm_adsp_create_region(dsp, WMFW_ADSP2_YM,
1560 adsp2_alg[i].alg.id,
1562 if (IS_ERR(alg_region)) {
1563 ret = PTR_ERR(alg_region);
1566 if (dsp->fw_ver == 0) {
1567 if (i + 1 < n_algs) {
1568 len = be32_to_cpu(adsp2_alg[i + 1].ym);
1569 len -= be32_to_cpu(adsp2_alg[i].ym);
1571 wm_adsp_create_control(dsp, alg_region, 0,
1574 adsp_warn(dsp, "Missing length info for region YM with ID %x\n",
1575 be32_to_cpu(adsp2_alg[i].alg.id));
1579 alg_region = wm_adsp_create_region(dsp, WMFW_ADSP2_ZM,
1580 adsp2_alg[i].alg.id,
1582 if (IS_ERR(alg_region)) {
1583 ret = PTR_ERR(alg_region);
1586 if (dsp->fw_ver == 0) {
1587 if (i + 1 < n_algs) {
1588 len = be32_to_cpu(adsp2_alg[i + 1].zm);
1589 len -= be32_to_cpu(adsp2_alg[i].zm);
1591 wm_adsp_create_control(dsp, alg_region, 0,
1594 adsp_warn(dsp, "Missing length info for region ZM with ID %x\n",
1595 be32_to_cpu(adsp2_alg[i].alg.id));
1605 static int wm_adsp_load_coeff(struct wm_adsp *dsp)
1607 LIST_HEAD(buf_list);
1608 struct regmap *regmap = dsp->regmap;
1609 struct wmfw_coeff_hdr *hdr;
1610 struct wmfw_coeff_item *blk;
1611 const struct firmware *firmware;
1612 const struct wm_adsp_region *mem;
1613 struct wm_adsp_alg_region *alg_region;
1614 const char *region_name;
1615 int ret, pos, blocks, type, offset, reg;
1617 struct wm_adsp_buf *buf;
1619 file = kzalloc(PAGE_SIZE, GFP_KERNEL);
1623 snprintf(file, PAGE_SIZE, "/*(DEBLOBBED)*/", dsp->part, dsp->num,
1624 wm_adsp_fw[dsp->fw].file);
1625 file[PAGE_SIZE - 1] = '\0';
1627 ret = reject_firmware(&firmware, file, dsp->dev);
1629 adsp_warn(dsp, "Failed to request '%s'\n", file);
1635 if (sizeof(*hdr) >= firmware->size) {
1636 adsp_err(dsp, "%s: file too short, %zu bytes\n",
1637 file, firmware->size);
1641 hdr = (void*)&firmware->data[0];
1642 if (memcmp(hdr->magic, "WMDR", 4) != 0) {
1643 adsp_err(dsp, "%s: invalid magic\n", file);
1647 switch (be32_to_cpu(hdr->rev) & 0xff) {
1651 adsp_err(dsp, "%s: Unsupported coefficient file format %d\n",
1652 file, be32_to_cpu(hdr->rev) & 0xff);
1657 adsp_dbg(dsp, "%s: v%d.%d.%d\n", file,
1658 (le32_to_cpu(hdr->ver) >> 16) & 0xff,
1659 (le32_to_cpu(hdr->ver) >> 8) & 0xff,
1660 le32_to_cpu(hdr->ver) & 0xff);
1662 pos = le32_to_cpu(hdr->len);
1665 while (pos < firmware->size &&
1666 pos - firmware->size > sizeof(*blk)) {
1667 blk = (void*)(&firmware->data[pos]);
1669 type = le16_to_cpu(blk->type);
1670 offset = le16_to_cpu(blk->offset);
1672 adsp_dbg(dsp, "%s.%d: %x v%d.%d.%d\n",
1673 file, blocks, le32_to_cpu(blk->id),
1674 (le32_to_cpu(blk->ver) >> 16) & 0xff,
1675 (le32_to_cpu(blk->ver) >> 8) & 0xff,
1676 le32_to_cpu(blk->ver) & 0xff);
1677 adsp_dbg(dsp, "%s.%d: %d bytes at 0x%x in %x\n",
1678 file, blocks, le32_to_cpu(blk->len), offset, type);
1681 region_name = "Unknown";
1683 case (WMFW_NAME_TEXT << 8):
1684 case (WMFW_INFO_TEXT << 8):
1686 case (WMFW_ABSOLUTE << 8):
1688 * Old files may use this for global
1691 if (le32_to_cpu(blk->id) == dsp->fw_id &&
1693 region_name = "global coefficients";
1694 mem = wm_adsp_find_region(dsp, type);
1696 adsp_err(dsp, "No ZM\n");
1699 reg = wm_adsp_region_to_reg(mem, 0);
1702 region_name = "register";
1711 adsp_dbg(dsp, "%s.%d: %d bytes in %x for %x\n",
1712 file, blocks, le32_to_cpu(blk->len),
1713 type, le32_to_cpu(blk->id));
1715 mem = wm_adsp_find_region(dsp, type);
1717 adsp_err(dsp, "No base for region %x\n", type);
1722 list_for_each_entry(alg_region,
1723 &dsp->alg_regions, list) {
1724 if (le32_to_cpu(blk->id) == alg_region->alg &&
1725 type == alg_region->type) {
1726 reg = alg_region->base;
1727 reg = wm_adsp_region_to_reg(mem,
1735 adsp_err(dsp, "No %x for algorithm %x\n",
1736 type, le32_to_cpu(blk->id));
1740 adsp_err(dsp, "%s.%d: Unknown region type %x at %d\n",
1741 file, blocks, type, pos);
1746 if ((pos + le32_to_cpu(blk->len) + sizeof(*blk)) >
1749 "%s.%d: %s region len %d bytes exceeds file length %zu\n",
1750 file, blocks, region_name,
1751 le32_to_cpu(blk->len),
1757 buf = wm_adsp_buf_alloc(blk->data,
1758 le32_to_cpu(blk->len),
1761 adsp_err(dsp, "Out of memory\n");
1766 adsp_dbg(dsp, "%s.%d: Writing %d bytes at %x\n",
1767 file, blocks, le32_to_cpu(blk->len),
1769 ret = regmap_raw_write_async(regmap, reg, buf->buf,
1770 le32_to_cpu(blk->len));
1773 "%s.%d: Failed to write to %x in %s: %d\n",
1774 file, blocks, reg, region_name, ret);
1778 pos += (le32_to_cpu(blk->len) + sizeof(*blk) + 3) & ~0x03;
1782 ret = regmap_async_complete(regmap);
1784 adsp_err(dsp, "Failed to complete async write: %d\n", ret);
1786 if (pos > firmware->size)
1787 adsp_warn(dsp, "%s.%d: %zu bytes at end of file\n",
1788 file, blocks, pos - firmware->size);
1790 wm_adsp_debugfs_save_binname(dsp, file);
1793 regmap_async_complete(regmap);
1794 release_firmware(firmware);
1795 wm_adsp_buf_free(&buf_list);
1801 int wm_adsp1_init(struct wm_adsp *dsp)
1803 INIT_LIST_HEAD(&dsp->alg_regions);
1805 #ifdef CONFIG_DEBUG_FS
1806 mutex_init(&dsp->debugfs_lock);
1810 EXPORT_SYMBOL_GPL(wm_adsp1_init);
1812 int wm_adsp1_event(struct snd_soc_dapm_widget *w,
1813 struct snd_kcontrol *kcontrol,
1816 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
1817 struct wm_adsp *dsps = snd_soc_codec_get_drvdata(codec);
1818 struct wm_adsp *dsp = &dsps[w->shift];
1819 struct wm_adsp_alg_region *alg_region;
1820 struct wm_coeff_ctl *ctl;
1824 dsp->card = codec->component.card;
1827 case SND_SOC_DAPM_POST_PMU:
1828 regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_30,
1829 ADSP1_SYS_ENA, ADSP1_SYS_ENA);
1832 * For simplicity set the DSP clock rate to be the
1833 * SYSCLK rate rather than making it configurable.
1835 if(dsp->sysclk_reg) {
1836 ret = regmap_read(dsp->regmap, dsp->sysclk_reg, &val);
1838 adsp_err(dsp, "Failed to read SYSCLK state: %d\n",
1843 val = (val & dsp->sysclk_mask)
1844 >> dsp->sysclk_shift;
1846 ret = regmap_update_bits(dsp->regmap,
1847 dsp->base + ADSP1_CONTROL_31,
1848 ADSP1_CLK_SEL_MASK, val);
1850 adsp_err(dsp, "Failed to set clock rate: %d\n",
1856 ret = wm_adsp_load(dsp);
1860 ret = wm_adsp1_setup_algs(dsp);
1864 ret = wm_adsp_load_coeff(dsp);
1868 /* Initialize caches for enabled and unset controls */
1869 ret = wm_coeff_init_control_caches(dsp);
1873 /* Sync set controls */
1874 ret = wm_coeff_sync_controls(dsp);
1878 /* Start the core running */
1879 regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_30,
1880 ADSP1_CORE_ENA | ADSP1_START,
1881 ADSP1_CORE_ENA | ADSP1_START);
1884 case SND_SOC_DAPM_PRE_PMD:
1886 regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_30,
1887 ADSP1_CORE_ENA | ADSP1_START, 0);
1889 regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_19,
1890 ADSP1_WDMA_BUFFER_LENGTH_MASK, 0);
1892 regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_30,
1895 list_for_each_entry(ctl, &dsp->ctl_list, list)
1898 while (!list_empty(&dsp->alg_regions)) {
1899 alg_region = list_first_entry(&dsp->alg_regions,
1900 struct wm_adsp_alg_region,
1902 list_del(&alg_region->list);
1914 regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_30,
1918 EXPORT_SYMBOL_GPL(wm_adsp1_event);
1920 static int wm_adsp2_ena(struct wm_adsp *dsp)
1925 ret = regmap_update_bits_async(dsp->regmap, dsp->base + ADSP2_CONTROL,
1926 ADSP2_SYS_ENA, ADSP2_SYS_ENA);
1930 /* Wait for the RAM to start, should be near instantaneous */
1931 for (count = 0; count < 10; ++count) {
1932 ret = regmap_read(dsp->regmap, dsp->base + ADSP2_STATUS1,
1937 if (val & ADSP2_RAM_RDY)
1943 if (!(val & ADSP2_RAM_RDY)) {
1944 adsp_err(dsp, "Failed to start DSP RAM\n");
1948 adsp_dbg(dsp, "RAM ready after %d polls\n", count);
1953 static void wm_adsp2_boot_work(struct work_struct *work)
1955 struct wm_adsp *dsp = container_of(work,
1962 * For simplicity set the DSP clock rate to be the
1963 * SYSCLK rate rather than making it configurable.
1965 ret = regmap_read(dsp->regmap, ARIZONA_SYSTEM_CLOCK_1, &val);
1967 adsp_err(dsp, "Failed to read SYSCLK state: %d\n", ret);
1970 val = (val & ARIZONA_SYSCLK_FREQ_MASK)
1971 >> ARIZONA_SYSCLK_FREQ_SHIFT;
1973 ret = regmap_update_bits_async(dsp->regmap,
1974 dsp->base + ADSP2_CLOCKING,
1975 ADSP2_CLK_SEL_MASK, val);
1977 adsp_err(dsp, "Failed to set clock rate: %d\n", ret);
1981 ret = wm_adsp2_ena(dsp);
1985 ret = wm_adsp_load(dsp);
1989 ret = wm_adsp2_setup_algs(dsp);
1993 ret = wm_adsp_load_coeff(dsp);
1997 /* Initialize caches for enabled and unset controls */
1998 ret = wm_coeff_init_control_caches(dsp);
2002 /* Sync set controls */
2003 ret = wm_coeff_sync_controls(dsp);
2007 dsp->running = true;
2012 regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL,
2013 ADSP2_SYS_ENA | ADSP2_CORE_ENA | ADSP2_START, 0);
2016 int wm_adsp2_early_event(struct snd_soc_dapm_widget *w,
2017 struct snd_kcontrol *kcontrol, int event)
2019 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
2020 struct wm_adsp *dsps = snd_soc_codec_get_drvdata(codec);
2021 struct wm_adsp *dsp = &dsps[w->shift];
2023 dsp->card = codec->component.card;
2026 case SND_SOC_DAPM_PRE_PMU:
2027 queue_work(system_unbound_wq, &dsp->boot_work);
2035 EXPORT_SYMBOL_GPL(wm_adsp2_early_event);
2037 int wm_adsp2_event(struct snd_soc_dapm_widget *w,
2038 struct snd_kcontrol *kcontrol, int event)
2040 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
2041 struct wm_adsp *dsps = snd_soc_codec_get_drvdata(codec);
2042 struct wm_adsp *dsp = &dsps[w->shift];
2043 struct wm_adsp_alg_region *alg_region;
2044 struct wm_coeff_ctl *ctl;
2048 case SND_SOC_DAPM_POST_PMU:
2049 flush_work(&dsp->boot_work);
2054 ret = regmap_update_bits(dsp->regmap,
2055 dsp->base + ADSP2_CONTROL,
2056 ADSP2_CORE_ENA | ADSP2_START,
2057 ADSP2_CORE_ENA | ADSP2_START);
2062 case SND_SOC_DAPM_PRE_PMD:
2063 /* Log firmware state, it can be useful for analysis */
2064 wm_adsp2_show_fw_status(dsp);
2066 wm_adsp_debugfs_clear(dsp);
2069 dsp->fw_id_version = 0;
2070 dsp->running = false;
2072 regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL,
2073 ADSP2_SYS_ENA | ADSP2_CORE_ENA |
2076 /* Make sure DMAs are quiesced */
2077 regmap_write(dsp->regmap, dsp->base + ADSP2_WDMA_CONFIG_1, 0);
2078 regmap_write(dsp->regmap, dsp->base + ADSP2_WDMA_CONFIG_2, 0);
2079 regmap_write(dsp->regmap, dsp->base + ADSP2_RDMA_CONFIG_1, 0);
2081 list_for_each_entry(ctl, &dsp->ctl_list, list)
2084 while (!list_empty(&dsp->alg_regions)) {
2085 alg_region = list_first_entry(&dsp->alg_regions,
2086 struct wm_adsp_alg_region,
2088 list_del(&alg_region->list);
2092 adsp_dbg(dsp, "Shutdown complete\n");
2101 regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL,
2102 ADSP2_SYS_ENA | ADSP2_CORE_ENA | ADSP2_START, 0);
2105 EXPORT_SYMBOL_GPL(wm_adsp2_event);
2107 int wm_adsp2_codec_probe(struct wm_adsp *dsp, struct snd_soc_codec *codec)
2109 wm_adsp2_init_debugfs(dsp, codec);
2111 return snd_soc_add_codec_controls(codec,
2112 &wm_adsp_fw_controls[dsp->num - 1],
2115 EXPORT_SYMBOL_GPL(wm_adsp2_codec_probe);
2117 int wm_adsp2_codec_remove(struct wm_adsp *dsp, struct snd_soc_codec *codec)
2119 wm_adsp2_cleanup_debugfs(dsp);
2123 EXPORT_SYMBOL_GPL(wm_adsp2_codec_remove);
2125 int wm_adsp2_init(struct wm_adsp *dsp)
2130 * Disable the DSP memory by default when in reset for a small
2133 ret = regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL,
2136 adsp_err(dsp, "Failed to clear memory retention: %d\n", ret);
2140 INIT_LIST_HEAD(&dsp->alg_regions);
2141 INIT_LIST_HEAD(&dsp->ctl_list);
2142 INIT_WORK(&dsp->boot_work, wm_adsp2_boot_work);
2144 #ifdef CONFIG_DEBUG_FS
2145 mutex_init(&dsp->debugfs_lock);
2149 EXPORT_SYMBOL_GPL(wm_adsp2_init);
2151 MODULE_LICENSE("GPL v2");