sound/soc/codecs/rt5670.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * rt5670.c  --  RT5670 ALSA SoC audio codec driver
   4  *
   5  * Copyright 2014 Realtek Semiconductor Corp.
   6  * Author: Bard Liao <bardliao@realtek.com>
   7  */
   8
   9 #include <linux/module.h>
  10 #include <linux/moduleparam.h>
  11 #include <linux/init.h>
  12 #include <linux/delay.h>
  13 #include <linux/pm.h>
  14 #include <linux/pm_runtime.h>
  15 #include <linux/i2c.h>
  16 #include <linux/platform_device.h>
  17 #include <linux/acpi.h>
  18 #include <linux/spi/spi.h>
  19 #include <linux/dmi.h>
  20 #include <sound/core.h>
  21 #include <sound/pcm.h>
  22 #include <sound/pcm_params.h>
  23 #include <sound/jack.h>
  24 #include <sound/soc.h>
  25 #include <sound/soc-dapm.h>
  26 #include <sound/initval.h>
  27 #include <sound/tlv.h>
  28
  29 #include "rl6231.h"
  30 #include "rt5670.h"
  31 #include "rt5670-dsp.h"
  32
  33 #define RT5670_GPIO1_IS_IRQ                     BIT(0)
  34 #define RT5670_IN2_DIFF                 BIT(1)
  35 #define RT5670_DMIC_EN                  BIT(2)
  36 #define RT5670_DMIC1_IN2P               BIT(3)
  37 #define RT5670_DMIC1_GPIO6              BIT(4)
  38 #define RT5670_DMIC1_GPIO7              BIT(5)
  39 #define RT5670_DMIC2_INR                BIT(6)
  40 #define RT5670_DMIC2_GPIO8              BIT(7)
  41 #define RT5670_DMIC3_GPIO5              BIT(8)
  42 #define RT5670_JD_MODE1                 BIT(9)
  43 #define RT5670_JD_MODE2                 BIT(10)
  44 #define RT5670_JD_MODE3                 BIT(11)
  45 #define RT5670_GPIO1_IS_EXT_SPK_EN      BIT(12)
  46
  47 static unsigned long rt5670_quirk;
  48 static unsigned int quirk_override;
  49 module_param_named(quirk, quirk_override, uint, 0444);
  50 MODULE_PARM_DESC(quirk, "Board-specific quirk override");
  51
  52 #define RT5670_DEVICE_ID 0x6271
  53
  54 #define RT5670_PR_RANGE_BASE (0xff + 1)
  55 #define RT5670_PR_SPACING 0x100
  56
  57 #define RT5670_PR_BASE (RT5670_PR_RANGE_BASE + (0 * RT5670_PR_SPACING))
  58
  59 static const struct regmap_range_cfg rt5670_ranges[] = {
  60         { .name = "PR", .range_min = RT5670_PR_BASE,
  61           .range_max = RT5670_PR_BASE + 0xf8,
  62           .selector_reg = RT5670_PRIV_INDEX,
  63           .selector_mask = 0xff,
  64           .selector_shift = 0x0,
  65           .window_start = RT5670_PRIV_DATA,
  66           .window_len = 0x1, },
  67 };
  68
  69 static const struct reg_sequence init_list[] = {
  70         { RT5670_PR_BASE + 0x14, 0x9a8a },
  71         { RT5670_PR_BASE + 0x38, 0x1fe1 },
  72         { RT5670_PR_BASE + 0x3d, 0x3640 },
  73         { 0x8a, 0x0123 },
  74 };
  75
  76 static const struct reg_default rt5670_reg[] = {
  77         { 0x00, 0x0000 },
  78         { 0x02, 0x8888 },
  79         { 0x03, 0x8888 },
  80         { 0x0a, 0x0001 },
  81         { 0x0b, 0x0827 },
  82         { 0x0c, 0x0000 },
  83         { 0x0d, 0x0008 },
  84         { 0x0e, 0x0000 },
  85         { 0x0f, 0x0808 },
  86         { 0x19, 0xafaf },
  87         { 0x1a, 0xafaf },
  88         { 0x1b, 0x0011 },
  89         { 0x1c, 0x2f2f },
  90         { 0x1d, 0x2f2f },
  91         { 0x1e, 0x0000 },
  92         { 0x1f, 0x2f2f },
  93         { 0x20, 0x0000 },
  94         { 0x26, 0x7860 },
  95         { 0x27, 0x7860 },
  96         { 0x28, 0x7871 },
  97         { 0x29, 0x8080 },
  98         { 0x2a, 0x5656 },
  99         { 0x2b, 0x5454 },
 100         { 0x2c, 0xaaa0 },
 101         { 0x2d, 0x0000 },
 102         { 0x2e, 0x2f2f },
 103         { 0x2f, 0x1002 },
 104         { 0x30, 0x0000 },
 105         { 0x31, 0x5f00 },
 106         { 0x32, 0x0000 },
 107         { 0x33, 0x0000 },
 108         { 0x34, 0x0000 },
 109         { 0x35, 0x0000 },
 110         { 0x36, 0x0000 },
 111         { 0x37, 0x0000 },
 112         { 0x38, 0x0000 },
 113         { 0x3b, 0x0000 },
 114         { 0x3c, 0x007f },
 115         { 0x3d, 0x0000 },
 116         { 0x3e, 0x007f },
 117         { 0x45, 0xe00f },
 118         { 0x4c, 0x5380 },
 119         { 0x4f, 0x0073 },
 120         { 0x52, 0x00d3 },
 121         { 0x53, 0xf000 },
 122         { 0x61, 0x0000 },
 123         { 0x62, 0x0001 },
 124         { 0x63, 0x00c3 },
 125         { 0x64, 0x0000 },
 126         { 0x65, 0x0001 },
 127         { 0x66, 0x0000 },
 128         { 0x6f, 0x8000 },
 129         { 0x70, 0x8000 },
 130         { 0x71, 0x8000 },
 131         { 0x72, 0x8000 },
 132         { 0x73, 0x7770 },
 133         { 0x74, 0x0e00 },
 134         { 0x75, 0x1505 },
 135         { 0x76, 0x0015 },
 136         { 0x77, 0x0c00 },
 137         { 0x78, 0x4000 },
 138         { 0x79, 0x0123 },
 139         { 0x7f, 0x1100 },
 140         { 0x80, 0x0000 },
 141         { 0x81, 0x0000 },
 142         { 0x82, 0x0000 },
 143         { 0x83, 0x0000 },
 144         { 0x84, 0x0000 },
 145         { 0x85, 0x0000 },
 146         { 0x86, 0x0004 },
 147         { 0x87, 0x0000 },
 148         { 0x88, 0x0000 },
 149         { 0x89, 0x0000 },
 150         { 0x8a, 0x0123 },
 151         { 0x8b, 0x0000 },
 152         { 0x8c, 0x0003 },
 153         { 0x8d, 0x0000 },
 154         { 0x8e, 0x0004 },
 155         { 0x8f, 0x1100 },
 156         { 0x90, 0x0646 },
 157         { 0x91, 0x0c06 },
 158         { 0x93, 0x0000 },
 159         { 0x94, 0x1270 },
 160         { 0x95, 0x1000 },
 161         { 0x97, 0x0000 },
 162         { 0x98, 0x0000 },
 163         { 0x99, 0x0000 },
 164         { 0x9a, 0x2184 },
 165         { 0x9b, 0x010a },
 166         { 0x9c, 0x0aea },
 167         { 0x9d, 0x000c },
 168         { 0x9e, 0x0400 },
 169         { 0xae, 0x7000 },
 170         { 0xaf, 0x0000 },
 171         { 0xb0, 0x7000 },
 172         { 0xb1, 0x0000 },
 173         { 0xb2, 0x0000 },
 174         { 0xb3, 0x001f },
 175         { 0xb4, 0x220c },
 176         { 0xb5, 0x1f00 },
 177         { 0xb6, 0x0000 },
 178         { 0xb7, 0x0000 },
 179         { 0xbb, 0x0000 },
 180         { 0xbc, 0x0000 },
 181         { 0xbd, 0x0000 },
 182         { 0xbe, 0x0000 },
 183         { 0xbf, 0x0000 },
 184         { 0xc0, 0x0000 },
 185         { 0xc1, 0x0000 },
 186         { 0xc2, 0x0000 },
 187         { 0xcd, 0x0000 },
 188         { 0xce, 0x0000 },
 189         { 0xcf, 0x1813 },
 190         { 0xd0, 0x0690 },
 191         { 0xd1, 0x1c17 },
 192         { 0xd3, 0xa220 },
 193         { 0xd4, 0x0000 },
 194         { 0xd6, 0x0400 },
 195         { 0xd9, 0x0809 },
 196         { 0xda, 0x0000 },
 197         { 0xdb, 0x0001 },
 198         { 0xdc, 0x0049 },
 199         { 0xdd, 0x0024 },
 200         { 0xe6, 0x8000 },
 201         { 0xe7, 0x0000 },
 202         { 0xec, 0xa200 },
 203         { 0xed, 0x0000 },
 204         { 0xee, 0xa200 },
 205         { 0xef, 0x0000 },
 206         { 0xf8, 0x0000 },
 207         { 0xf9, 0x0000 },
 208         { 0xfa, 0x8010 },
 209         { 0xfb, 0x0033 },
 210         { 0xfc, 0x0100 },
 211 };
 212
 213 static bool rt5670_volatile_register(struct device *dev, unsigned int reg)
 214 {
 215         int i;
 216
 217         for (i = 0; i < ARRAY_SIZE(rt5670_ranges); i++) {
 218                 if ((reg >= rt5670_ranges[i].window_start &&
 219                      reg <= rt5670_ranges[i].window_start +
 220                      rt5670_ranges[i].window_len) ||
 221                     (reg >= rt5670_ranges[i].range_min &&
 222                      reg <= rt5670_ranges[i].range_max)) {
 223                         return true;
 224                 }
 225         }
 226
 227         switch (reg) {
 228         case RT5670_RESET:
 229         case RT5670_PDM_DATA_CTRL1:
 230         case RT5670_PDM1_DATA_CTRL4:
 231         case RT5670_PDM2_DATA_CTRL4:
 232         case RT5670_PRIV_DATA:
 233         case RT5670_ASRC_5:
 234         case RT5670_CJ_CTRL1:
 235         case RT5670_CJ_CTRL2:
 236         case RT5670_CJ_CTRL3:
 237         case RT5670_A_JD_CTRL1:
 238         case RT5670_A_JD_CTRL2:
 239         case RT5670_VAD_CTRL5:
 240         case RT5670_ADC_EQ_CTRL1:
 241         case RT5670_EQ_CTRL1:
 242         case RT5670_ALC_CTRL_1:
 243         case RT5670_IRQ_CTRL2:
 244         case RT5670_INT_IRQ_ST:
 245         case RT5670_IL_CMD:
 246         case RT5670_DSP_CTRL1:
 247         case RT5670_DSP_CTRL2:
 248         case RT5670_DSP_CTRL3:
 249         case RT5670_DSP_CTRL4:
 250         case RT5670_DSP_CTRL5:
 251         case RT5670_VENDOR_ID:
 252         case RT5670_VENDOR_ID1:
 253         case RT5670_VENDOR_ID2:
 254                 return true;
 255         default:
 256                 return false;
 257         }
 258 }
 259
 260 static bool rt5670_readable_register(struct device *dev, unsigned int reg)
 261 {
 262         int i;
 263
 264         for (i = 0; i < ARRAY_SIZE(rt5670_ranges); i++) {
 265                 if ((reg >= rt5670_ranges[i].window_start &&
 266                      reg <= rt5670_ranges[i].window_start +
 267                      rt5670_ranges[i].window_len) ||
 268                     (reg >= rt5670_ranges[i].range_min &&
 269                      reg <= rt5670_ranges[i].range_max)) {
 270                         return true;
 271                 }
 272         }
 273
 274         switch (reg) {
 275         case RT5670_RESET:
 276         case RT5670_HP_VOL:
 277         case RT5670_LOUT1:
 278         case RT5670_CJ_CTRL1:
 279         case RT5670_CJ_CTRL2:
 280         case RT5670_CJ_CTRL3:
 281         case RT5670_IN2:
 282         case RT5670_INL1_INR1_VOL:
 283         case RT5670_DAC1_DIG_VOL:
 284         case RT5670_DAC2_DIG_VOL:
 285         case RT5670_DAC_CTRL:
 286         case RT5670_STO1_ADC_DIG_VOL:
 287         case RT5670_MONO_ADC_DIG_VOL:
 288         case RT5670_STO2_ADC_DIG_VOL:
 289         case RT5670_ADC_BST_VOL1:
 290         case RT5670_ADC_BST_VOL2:
 291         case RT5670_STO2_ADC_MIXER:
 292         case RT5670_STO1_ADC_MIXER:
 293         case RT5670_MONO_ADC_MIXER:
 294         case RT5670_AD_DA_MIXER:
 295         case RT5670_STO_DAC_MIXER:
 296         case RT5670_DD_MIXER:
 297         case RT5670_DIG_MIXER:
 298         case RT5670_DSP_PATH1:
 299         case RT5670_DSP_PATH2:
 300         case RT5670_DIG_INF1_DATA:
 301         case RT5670_DIG_INF2_DATA:
 302         case RT5670_PDM_OUT_CTRL:
 303         case RT5670_PDM_DATA_CTRL1:
 304         case RT5670_PDM1_DATA_CTRL2:
 305         case RT5670_PDM1_DATA_CTRL3:
 306         case RT5670_PDM1_DATA_CTRL4:
 307         case RT5670_PDM2_DATA_CTRL2:
 308         case RT5670_PDM2_DATA_CTRL3:
 309         case RT5670_PDM2_DATA_CTRL4:
 310         case RT5670_REC_L1_MIXER:
 311         case RT5670_REC_L2_MIXER:
 312         case RT5670_REC_R1_MIXER:
 313         case RT5670_REC_R2_MIXER:
 314         case RT5670_HPO_MIXER:
 315         case RT5670_MONO_MIXER:
 316         case RT5670_OUT_L1_MIXER:
 317         case RT5670_OUT_R1_MIXER:
 318         case RT5670_LOUT_MIXER:
 319         case RT5670_PWR_DIG1:
 320         case RT5670_PWR_DIG2:
 321         case RT5670_PWR_ANLG1:
 322         case RT5670_PWR_ANLG2:
 323         case RT5670_PWR_MIXER:
 324         case RT5670_PWR_VOL:
 325         case RT5670_PRIV_INDEX:
 326         case RT5670_PRIV_DATA:
 327         case RT5670_I2S4_SDP:
 328         case RT5670_I2S1_SDP:
 329         case RT5670_I2S2_SDP:
 330         case RT5670_I2S3_SDP:
 331         case RT5670_ADDA_CLK1:
 332         case RT5670_ADDA_CLK2:
 333         case RT5670_DMIC_CTRL1:
 334         case RT5670_DMIC_CTRL2:
 335         case RT5670_TDM_CTRL_1:
 336         case RT5670_TDM_CTRL_2:
 337         case RT5670_TDM_CTRL_3:
 338         case RT5670_DSP_CLK:
 339         case RT5670_GLB_CLK:
 340         case RT5670_PLL_CTRL1:
 341         case RT5670_PLL_CTRL2:
 342         case RT5670_ASRC_1:
 343         case RT5670_ASRC_2:
 344         case RT5670_ASRC_3:
 345         case RT5670_ASRC_4:
 346         case RT5670_ASRC_5:
 347         case RT5670_ASRC_7:
 348         case RT5670_ASRC_8:
 349         case RT5670_ASRC_9:
 350         case RT5670_ASRC_10:
 351         case RT5670_ASRC_11:
 352         case RT5670_ASRC_12:
 353         case RT5670_ASRC_13:
 354         case RT5670_ASRC_14:
 355         case RT5670_DEPOP_M1:
 356         case RT5670_DEPOP_M2:
 357         case RT5670_DEPOP_M3:
 358         case RT5670_CHARGE_PUMP:
 359         case RT5670_MICBIAS:
 360         case RT5670_A_JD_CTRL1:
 361         case RT5670_A_JD_CTRL2:
 362         case RT5670_VAD_CTRL1:
 363         case RT5670_VAD_CTRL2:
 364         case RT5670_VAD_CTRL3:
 365         case RT5670_VAD_CTRL4:
 366         case RT5670_VAD_CTRL5:
 367         case RT5670_ADC_EQ_CTRL1:
 368         case RT5670_ADC_EQ_CTRL2:
 369         case RT5670_EQ_CTRL1:
 370         case RT5670_EQ_CTRL2:
 371         case RT5670_ALC_DRC_CTRL1:
 372         case RT5670_ALC_DRC_CTRL2:
 373         case RT5670_ALC_CTRL_1:
 374         case RT5670_ALC_CTRL_2:
 375         case RT5670_ALC_CTRL_3:
 376         case RT5670_JD_CTRL:
 377         case RT5670_IRQ_CTRL1:
 378         case RT5670_IRQ_CTRL2:
 379         case RT5670_INT_IRQ_ST:
 380         case RT5670_GPIO_CTRL1:
 381         case RT5670_GPIO_CTRL2:
 382         case RT5670_GPIO_CTRL3:
 383         case RT5670_SCRABBLE_FUN:
 384         case RT5670_SCRABBLE_CTRL:
 385         case RT5670_BASE_BACK:
 386         case RT5670_MP3_PLUS1:
 387         case RT5670_MP3_PLUS2:
 388         case RT5670_ADJ_HPF1:
 389         case RT5670_ADJ_HPF2:
 390         case RT5670_HP_CALIB_AMP_DET:
 391         case RT5670_SV_ZCD1:
 392         case RT5670_SV_ZCD2:
 393         case RT5670_IL_CMD:
 394         case RT5670_IL_CMD2:
 395         case RT5670_IL_CMD3:
 396         case RT5670_DRC_HL_CTRL1:
 397         case RT5670_DRC_HL_CTRL2:
 398         case RT5670_ADC_MONO_HP_CTRL1:
 399         case RT5670_ADC_MONO_HP_CTRL2:
 400         case RT5670_ADC_STO2_HP_CTRL1:
 401         case RT5670_ADC_STO2_HP_CTRL2:
 402         case RT5670_JD_CTRL3:
 403         case RT5670_JD_CTRL4:
 404         case RT5670_DIG_MISC:
 405         case RT5670_DSP_CTRL1:
 406         case RT5670_DSP_CTRL2:
 407         case RT5670_DSP_CTRL3:
 408         case RT5670_DSP_CTRL4:
 409         case RT5670_DSP_CTRL5:
 410         case RT5670_GEN_CTRL2:
 411         case RT5670_GEN_CTRL3:
 412         case RT5670_VENDOR_ID:
 413         case RT5670_VENDOR_ID1:
 414         case RT5670_VENDOR_ID2:
 415                 return true;
 416         default:
 417                 return false;
 418         }
 419 }
 420
 421 /**
 422  * rt5670_headset_detect - Detect headset.
 423  * @component: SoC audio component device.
 424  * @jack_insert: Jack insert or not.
 425  *
 426  * Detect whether is headset or not when jack inserted.
 427  *
 428  * Returns detect status.
 429  */
 430
 431 static int rt5670_headset_detect(struct snd_soc_component *component, int jack_insert)
 432 {
 433         int val;
 434         struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
 435         struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component);
 436
 437         if (jack_insert) {
 438                 snd_soc_dapm_force_enable_pin(dapm, "Mic Det Power");
 439                 snd_soc_dapm_sync(dapm);
 440                 snd_soc_component_update_bits(component, RT5670_GEN_CTRL3, 0x4, 0x0);
 441                 snd_soc_component_update_bits(component, RT5670_CJ_CTRL2,
 442                         RT5670_CBJ_DET_MODE | RT5670_CBJ_MN_JD,
 443                         RT5670_CBJ_MN_JD);
 444                 snd_soc_component_write(component, RT5670_GPIO_CTRL2, 0x0004);
 445                 snd_soc_component_update_bits(component, RT5670_GPIO_CTRL1,
 446                         RT5670_GP1_PIN_MASK, RT5670_GP1_PIN_IRQ);
 447                 snd_soc_component_update_bits(component, RT5670_CJ_CTRL1,
 448                         RT5670_CBJ_BST1_EN, RT5670_CBJ_BST1_EN);
 449                 snd_soc_component_write(component, RT5670_JD_CTRL3, 0x00f0);
 450                 snd_soc_component_update_bits(component, RT5670_CJ_CTRL2,
 451                         RT5670_CBJ_MN_JD, RT5670_CBJ_MN_JD);
 452                 snd_soc_component_update_bits(component, RT5670_CJ_CTRL2,
 453                         RT5670_CBJ_MN_JD, 0);
 454                 msleep(300);
 455                 val = snd_soc_component_read(component, RT5670_CJ_CTRL3) & 0x7;
 456                 if (val == 0x1 || val == 0x2) {
 457                         rt5670->jack_type = SND_JACK_HEADSET;
 458                         /* for push button */
 459                         snd_soc_component_update_bits(component, RT5670_INT_IRQ_ST, 0x8, 0x8);
 460                         snd_soc_component_update_bits(component, RT5670_IL_CMD, 0x40, 0x40);
 461                         snd_soc_component_read(component, RT5670_IL_CMD);
 462                 } else {
 463                         snd_soc_component_update_bits(component, RT5670_GEN_CTRL3, 0x4, 0x4);
 464                         rt5670->jack_type = SND_JACK_HEADPHONE;
 465                         snd_soc_dapm_disable_pin(dapm, "Mic Det Power");
 466                         snd_soc_dapm_sync(dapm);
 467                 }
 468         } else {
 469                 snd_soc_component_update_bits(component, RT5670_INT_IRQ_ST, 0x8, 0x0);
 470                 snd_soc_component_update_bits(component, RT5670_GEN_CTRL3, 0x4, 0x4);
 471                 rt5670->jack_type = 0;
 472                 snd_soc_dapm_disable_pin(dapm, "Mic Det Power");
 473                 snd_soc_dapm_sync(dapm);
 474         }
 475
 476         return rt5670->jack_type;
 477 }
 478
 479 void rt5670_jack_suspend(struct snd_soc_component *component)
 480 {
 481         struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component);
 482
 483         rt5670->jack_type_saved = rt5670->jack_type;
 484         rt5670_headset_detect(component, 0);
 485 }
 486 EXPORT_SYMBOL_GPL(rt5670_jack_suspend);
 487
 488 void rt5670_jack_resume(struct snd_soc_component *component)
 489 {
 490         struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component);
 491
 492         if (rt5670->jack_type_saved)
 493                 rt5670_headset_detect(component, 1);
 494 }
 495 EXPORT_SYMBOL_GPL(rt5670_jack_resume);
 496
 497 static int rt5670_button_detect(struct snd_soc_component *component)
 498 {
 499         int btn_type, val;
 500
 501         val = snd_soc_component_read(component, RT5670_IL_CMD);
 502         btn_type = val & 0xff80;
 503         snd_soc_component_write(component, RT5670_IL_CMD, val);
 504         if (btn_type != 0) {
 505                 msleep(20);
 506                 val = snd_soc_component_read(component, RT5670_IL_CMD);
 507                 snd_soc_component_write(component, RT5670_IL_CMD, val);
 508         }
 509
 510         return btn_type;
 511 }
 512
 513 static int rt5670_irq_detection(void *data)
 514 {
 515         struct rt5670_priv *rt5670 = (struct rt5670_priv *)data;
 516         struct snd_soc_jack_gpio *gpio = &rt5670->hp_gpio;
 517         struct snd_soc_jack *jack = rt5670->jack;
 518         int val, btn_type, report = jack->status;
 519
 520         if (rt5670->jd_mode == 1) /* 2 port */
 521                 val = snd_soc_component_read(rt5670->component, RT5670_A_JD_CTRL1) & 0x0070;
 522         else
 523                 val = snd_soc_component_read(rt5670->component, RT5670_A_JD_CTRL1) & 0x0020;
 524
 525         switch (val) {
 526         /* jack in */
 527         case 0x30: /* 2 port */
 528         case 0x0: /* 1 port or 2 port */
 529                 if (rt5670->jack_type == 0) {
 530                         report = rt5670_headset_detect(rt5670->component, 1);
 531                         /* for push button and jack out */
 532                         gpio->debounce_time = 25;
 533                         break;
 534                 }
 535                 btn_type = 0;
 536                 if (snd_soc_component_read(rt5670->component, RT5670_INT_IRQ_ST) & 0x4) {
 537                         /* button pressed */
 538                         report = SND_JACK_HEADSET;
 539                         btn_type = rt5670_button_detect(rt5670->component);
 540                         switch (btn_type) {
 541                         case 0x2000: /* up */
 542                                 report |= SND_JACK_BTN_1;
 543                                 break;
 544                         case 0x0400: /* center */
 545                                 report |= SND_JACK_BTN_0;
 546                                 break;
 547                         case 0x0080: /* down */
 548                                 report |= SND_JACK_BTN_2;
 549                                 break;
 550                         default:
 551                                 dev_err(rt5670->component->dev,
 552                                         "Unexpected button code 0x%04x\n",
 553                                         btn_type);
 554                                 break;
 555                         }
 556                 }
 557                 if (btn_type == 0)/* button release */
 558                         report =  rt5670->jack_type;
 559
 560                 break;
 561         /* jack out */
 562         case 0x70: /* 2 port */
 563         case 0x10: /* 2 port */
 564         case 0x20: /* 1 port */
 565                 report = 0;
 566                 snd_soc_component_update_bits(rt5670->component, RT5670_INT_IRQ_ST, 0x1, 0x0);
 567                 rt5670_headset_detect(rt5670->component, 0);
 568                 gpio->debounce_time = 150; /* for jack in */
 569                 break;
 570         default:
 571                 break;
 572         }
 573
 574         return report;
 575 }
 576
 577 int rt5670_set_jack_detect(struct snd_soc_component *component,
 578         struct snd_soc_jack *jack)
 579 {
 580         struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component);
 581         int ret;
 582
 583         rt5670->jack = jack;
 584         rt5670->hp_gpio.gpiod_dev = component->dev;
 585         rt5670->hp_gpio.name = "headset";
 586         rt5670->hp_gpio.report = SND_JACK_HEADSET |
 587                 SND_JACK_BTN_0 | SND_JACK_BTN_1 | SND_JACK_BTN_2;
 588         rt5670->hp_gpio.debounce_time = 150;
 589         rt5670->hp_gpio.wake = true;
 590         rt5670->hp_gpio.data = (struct rt5670_priv *)rt5670;
 591         rt5670->hp_gpio.jack_status_check = rt5670_irq_detection;
 592
 593         ret = snd_soc_jack_add_gpios(rt5670->jack, 1,
 594                         &rt5670->hp_gpio);
 595         if (ret) {
 596                 dev_err(component->dev, "Adding jack GPIO failed\n");
 597                 return ret;
 598         }
 599
 600         return 0;
 601 }
 602 EXPORT_SYMBOL_GPL(rt5670_set_jack_detect);
 603
 604 static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0);
 605 static const DECLARE_TLV_DB_MINMAX(dac_vol_tlv, -6562, 0);
 606 static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0);
 607 static const DECLARE_TLV_DB_MINMAX(adc_vol_tlv, -1762, 3000);
 608 static const DECLARE_TLV_DB_SCALE(adc_bst_tlv, 0, 1200, 0);
 609
 610 /* {0, +20, +24, +30, +35, +40, +44, +50, +52} dB */
 611 static const DECLARE_TLV_DB_RANGE(bst_tlv,
 612         0, 0, TLV_DB_SCALE_ITEM(0, 0, 0),
 613         1, 1, TLV_DB_SCALE_ITEM(2000, 0, 0),
 614         2, 2, TLV_DB_SCALE_ITEM(2400, 0, 0),
 615         3, 5, TLV_DB_SCALE_ITEM(3000, 500, 0),
 616         6, 6, TLV_DB_SCALE_ITEM(4400, 0, 0),
 617         7, 7, TLV_DB_SCALE_ITEM(5000, 0, 0),
 618         8, 8, TLV_DB_SCALE_ITEM(5200, 0, 0)
 619 );
 620
 621 /* Interface data select */
 622 static const char * const rt5670_data_select[] = {
 623         "Normal", "Swap", "left copy to right", "right copy to left"
 624 };
 625
 626 static SOC_ENUM_SINGLE_DECL(rt5670_if2_dac_enum, RT5670_DIG_INF1_DATA,
 627                                 RT5670_IF2_DAC_SEL_SFT, rt5670_data_select);
 628
 629 static SOC_ENUM_SINGLE_DECL(rt5670_if2_adc_enum, RT5670_DIG_INF1_DATA,
 630                                 RT5670_IF2_ADC_SEL_SFT, rt5670_data_select);
 631
 632 /*
 633  * For reliable output-mute LED control we need a "DAC1 Playback Switch" control.
 634  * We emulate this by only clearing the RT5670_M_DAC1_L/_R AD_DA_MIXER register
 635  * bits when both our emulated DAC1 Playback Switch control and the DAC1 MIXL/R
 636  * DAPM-mixer DAC1 input are enabled.
 637  */
 638 static void rt5670_update_ad_da_mixer_dac1_m_bits(struct rt5670_priv *rt5670)
 639 {
 640         int val = RT5670_M_DAC1_L | RT5670_M_DAC1_R;
 641
 642         if (rt5670->dac1_mixl_dac1_switch && rt5670->dac1_playback_switch_l)
 643                 val &= ~RT5670_M_DAC1_L;
 644
 645         if (rt5670->dac1_mixr_dac1_switch && rt5670->dac1_playback_switch_r)
 646                 val &= ~RT5670_M_DAC1_R;
 647
 648         regmap_update_bits(rt5670->regmap, RT5670_AD_DA_MIXER,
 649                            RT5670_M_DAC1_L | RT5670_M_DAC1_R, val);
 650 }
 651
 652 static int rt5670_dac1_playback_switch_get(struct snd_kcontrol *kcontrol,
 653                                            struct snd_ctl_elem_value *ucontrol)
 654 {
 655         struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
 656         struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component);
 657
 658         ucontrol->value.integer.value[0] = rt5670->dac1_playback_switch_l;
 659         ucontrol->value.integer.value[1] = rt5670->dac1_playback_switch_r;
 660
 661         return 0;
 662 }
 663
 664 static int rt5670_dac1_playback_switch_put(struct snd_kcontrol *kcontrol,
 665                                            struct snd_ctl_elem_value *ucontrol)
 666 {
 667         struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
 668         struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component);
 669
 670         if (rt5670->dac1_playback_switch_l == ucontrol->value.integer.value[0] &&
 671             rt5670->dac1_playback_switch_r == ucontrol->value.integer.value[1])
 672                 return 0;
 673
 674         rt5670->dac1_playback_switch_l = ucontrol->value.integer.value[0];
 675         rt5670->dac1_playback_switch_r = ucontrol->value.integer.value[1];
 676
 677         rt5670_update_ad_da_mixer_dac1_m_bits(rt5670);
 678
 679         return 1;
 680 }
 681
 682 static const struct snd_kcontrol_new rt5670_snd_controls[] = {
 683         /* Headphone Output Volume */
 684         SOC_DOUBLE_TLV("HP Playback Volume", RT5670_HP_VOL,
 685                 RT5670_L_VOL_SFT, RT5670_R_VOL_SFT,
 686                 39, 1, out_vol_tlv),
 687         /* OUTPUT Control */
 688         SOC_DOUBLE_TLV("OUT Playback Volume", RT5670_LOUT1,
 689                 RT5670_L_VOL_SFT, RT5670_R_VOL_SFT, 39, 1, out_vol_tlv),
 690         /* DAC Digital Volume */
 691         SOC_DOUBLE("DAC2 Playback Switch", RT5670_DAC_CTRL,
 692                 RT5670_M_DAC_L2_VOL_SFT, RT5670_M_DAC_R2_VOL_SFT, 1, 1),
 693         SOC_DOUBLE_EXT("DAC1 Playback Switch", SND_SOC_NOPM, 0, 1, 1, 0,
 694                         rt5670_dac1_playback_switch_get, rt5670_dac1_playback_switch_put),
 695         SOC_DOUBLE_TLV("DAC1 Playback Volume", RT5670_DAC1_DIG_VOL,
 696                         RT5670_L_VOL_SFT, RT5670_R_VOL_SFT,
 697                         175, 0, dac_vol_tlv),
 698         SOC_DOUBLE_TLV("Mono DAC Playback Volume", RT5670_DAC2_DIG_VOL,
 699                         RT5670_L_VOL_SFT, RT5670_R_VOL_SFT,
 700                         175, 0, dac_vol_tlv),
 701         /* IN1/IN2 Control */
 702         SOC_SINGLE_TLV("IN1 Boost Volume", RT5670_CJ_CTRL1,
 703                 RT5670_BST_SFT1, 8, 0, bst_tlv),
 704         SOC_SINGLE_TLV("IN2 Boost Volume", RT5670_IN2,
 705                 RT5670_BST_SFT1, 8, 0, bst_tlv),
 706         /* INL/INR Volume Control */
 707         SOC_DOUBLE_TLV("IN Capture Volume", RT5670_INL1_INR1_VOL,
 708                         RT5670_INL_VOL_SFT, RT5670_INR_VOL_SFT,
 709                         31, 1, in_vol_tlv),
 710         /* ADC Digital Volume Control */
 711         SOC_DOUBLE("ADC Capture Switch", RT5670_STO1_ADC_DIG_VOL,
 712                 RT5670_L_MUTE_SFT, RT5670_R_MUTE_SFT, 1, 1),
 713         SOC_DOUBLE_TLV("ADC Capture Volume", RT5670_STO1_ADC_DIG_VOL,
 714                         RT5670_L_VOL_SFT, RT5670_R_VOL_SFT,
 715                         127, 0, adc_vol_tlv),
 716
 717         SOC_DOUBLE_TLV("Mono ADC Capture Volume", RT5670_MONO_ADC_DIG_VOL,
 718                         RT5670_L_VOL_SFT, RT5670_R_VOL_SFT,
 719                         127, 0, adc_vol_tlv),
 720
 721         /* ADC Boost Volume Control */
 722         SOC_DOUBLE_TLV("STO1 ADC Boost Gain Volume", RT5670_ADC_BST_VOL1,
 723                         RT5670_STO1_ADC_L_BST_SFT, RT5670_STO1_ADC_R_BST_SFT,
 724                         3, 0, adc_bst_tlv),
 725
 726         SOC_DOUBLE_TLV("STO2 ADC Boost Gain Volume", RT5670_ADC_BST_VOL1,
 727                         RT5670_STO2_ADC_L_BST_SFT, RT5670_STO2_ADC_R_BST_SFT,
 728                         3, 0, adc_bst_tlv),
 729
 730         SOC_ENUM("ADC IF2 Data Switch", rt5670_if2_adc_enum),
 731         SOC_ENUM("DAC IF2 Data Switch", rt5670_if2_dac_enum),
 732 };
 733
 734 /**
 735  * set_dmic_clk - Set parameter of dmic.
 736  *
 737  * @w: DAPM widget.
 738  * @kcontrol: The kcontrol of this widget.
 739  * @event: Event id.
 740  *
 741  * Choose dmic clock between 1MHz and 3MHz.
 742  * It is better for clock to approximate 3MHz.
 743  */
 744 static int set_dmic_clk(struct snd_soc_dapm_widget *w,
 745         struct snd_kcontrol *kcontrol, int event)
 746 {
 747         struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
 748         struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component);
 749         int idx, rate;
 750
 751         rate = rt5670->sysclk / rl6231_get_pre_div(rt5670->regmap,
 752                 RT5670_ADDA_CLK1, RT5670_I2S_PD1_SFT);
 753         idx = rl6231_calc_dmic_clk(rate);
 754         if (idx < 0)
 755                 dev_err(component->dev, "Failed to set DMIC clock\n");
 756         else
 757                 snd_soc_component_update_bits(component, RT5670_DMIC_CTRL1,
 758                         RT5670_DMIC_CLK_MASK, idx << RT5670_DMIC_CLK_SFT);
 759         return idx;
 760 }
 761
 762 static int is_sys_clk_from_pll(struct snd_soc_dapm_widget *source,
 763                          struct snd_soc_dapm_widget *sink)
 764 {
 765         struct snd_soc_component *component = snd_soc_dapm_to_component(source->dapm);
 766         struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component);
 767
 768         if (rt5670->sysclk_src == RT5670_SCLK_S_PLL1)
 769                 return 1;
 770         else
 771                 return 0;
 772 }
 773
 774 static int is_using_asrc(struct snd_soc_dapm_widget *source,
 775                          struct snd_soc_dapm_widget *sink)
 776 {
 777         struct snd_soc_component *component = snd_soc_dapm_to_component(source->dapm);
 778         unsigned int reg, shift, val;
 779
 780         switch (source->shift) {
 781         case 0:
 782                 reg = RT5670_ASRC_3;
 783                 shift = 0;
 784                 break;
 785         case 1:
 786                 reg = RT5670_ASRC_3;
 787                 shift = 4;
 788                 break;
 789         case 2:
 790                 reg = RT5670_ASRC_5;
 791                 shift = 12;
 792                 break;
 793         case 3:
 794                 reg = RT5670_ASRC_2;
 795                 shift = 0;
 796                 break;
 797         case 8:
 798                 reg = RT5670_ASRC_2;
 799                 shift = 4;
 800                 break;
 801         case 9:
 802                 reg = RT5670_ASRC_2;
 803                 shift = 8;
 804                 break;
 805         case 10:
 806                 reg = RT5670_ASRC_2;
 807                 shift = 12;
 808                 break;
 809         default:
 810                 return 0;
 811         }
 812
 813         val = (snd_soc_component_read(component, reg) >> shift) & 0xf;
 814         switch (val) {
 815         case 1:
 816         case 2:
 817         case 3:
 818         case 4:
 819                 return 1;
 820         default:
 821                 return 0;
 822         }
 823
 824 }
 825
 826 static int can_use_asrc(struct snd_soc_dapm_widget *source,
 827                          struct snd_soc_dapm_widget *sink)
 828 {
 829         struct snd_soc_component *component = snd_soc_dapm_to_component(source->dapm);
 830         struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component);
 831
 832         if (rt5670->sysclk > rt5670->lrck[RT5670_AIF1] * 384)
 833                 return 1;
 834
 835         return 0;
 836 }
 837
 838
 839 /**
 840  * rt5670_sel_asrc_clk_src - select ASRC clock source for a set of filters
 841  * @component: SoC audio component device.
 842  * @filter_mask: mask of filters.
 843  * @clk_src: clock source
 844  *
 845  * The ASRC function is for asynchronous MCLK and LRCK. Also, since RT5670 can
 846  * only support standard 32fs or 64fs i2s format, ASRC should be enabled to
 847  * support special i2s clock format such as Intel's 100fs(100 * sampling rate).
 848  * ASRC function will track i2s clock and generate a corresponding system clock
 849  * for codec. This function provides an API to select the clock source for a
 850  * set of filters specified by the mask. And the codec driver will turn on ASRC
 851  * for these filters if ASRC is selected as their clock source.
 852  */
 853 int rt5670_sel_asrc_clk_src(struct snd_soc_component *component,
 854                             unsigned int filter_mask, unsigned int clk_src)
 855 {
 856         unsigned int asrc2_mask = 0, asrc2_value = 0;
 857         unsigned int asrc3_mask = 0, asrc3_value = 0;
 858
 859         if (clk_src > RT5670_CLK_SEL_SYS3)
 860                 return -EINVAL;
 861
 862         if (filter_mask & RT5670_DA_STEREO_FILTER) {
 863                 asrc2_mask |= RT5670_DA_STO_CLK_SEL_MASK;
 864                 asrc2_value = (asrc2_value & ~RT5670_DA_STO_CLK_SEL_MASK)
 865                                 | (clk_src <<  RT5670_DA_STO_CLK_SEL_SFT);
 866         }
 867
 868         if (filter_mask & RT5670_DA_MONO_L_FILTER) {
 869                 asrc2_mask |= RT5670_DA_MONOL_CLK_SEL_MASK;
 870                 asrc2_value = (asrc2_value & ~RT5670_DA_MONOL_CLK_SEL_MASK)
 871                                 | (clk_src <<  RT5670_DA_MONOL_CLK_SEL_SFT);
 872         }
 873
 874         if (filter_mask & RT5670_DA_MONO_R_FILTER) {
 875                 asrc2_mask |= RT5670_DA_MONOR_CLK_SEL_MASK;
 876                 asrc2_value = (asrc2_value & ~RT5670_DA_MONOR_CLK_SEL_MASK)
 877                                 | (clk_src <<  RT5670_DA_MONOR_CLK_SEL_SFT);
 878         }
 879
 880         if (filter_mask & RT5670_AD_STEREO_FILTER) {
 881                 asrc2_mask |= RT5670_AD_STO1_CLK_SEL_MASK;
 882                 asrc2_value = (asrc2_value & ~RT5670_AD_STO1_CLK_SEL_MASK)
 883                                 | (clk_src <<  RT5670_AD_STO1_CLK_SEL_SFT);
 884         }
 885
 886         if (filter_mask & RT5670_AD_MONO_L_FILTER) {
 887                 asrc3_mask |= RT5670_AD_MONOL_CLK_SEL_MASK;
 888                 asrc3_value = (asrc3_value & ~RT5670_AD_MONOL_CLK_SEL_MASK)
 889                                 | (clk_src <<  RT5670_AD_MONOL_CLK_SEL_SFT);
 890         }
 891
 892         if (filter_mask & RT5670_AD_MONO_R_FILTER)  {
 893                 asrc3_mask |= RT5670_AD_MONOR_CLK_SEL_MASK;
 894                 asrc3_value = (asrc3_value & ~RT5670_AD_MONOR_CLK_SEL_MASK)
 895                                 | (clk_src <<  RT5670_AD_MONOR_CLK_SEL_SFT);
 896         }
 897
 898         if (filter_mask & RT5670_UP_RATE_FILTER) {
 899                 asrc3_mask |= RT5670_UP_CLK_SEL_MASK;
 900                 asrc3_value = (asrc3_value & ~RT5670_UP_CLK_SEL_MASK)
 901                                 | (clk_src <<  RT5670_UP_CLK_SEL_SFT);
 902         }
 903
 904         if (filter_mask & RT5670_DOWN_RATE_FILTER) {
 905                 asrc3_mask |= RT5670_DOWN_CLK_SEL_MASK;
 906                 asrc3_value = (asrc3_value & ~RT5670_DOWN_CLK_SEL_MASK)
 907                                 | (clk_src <<  RT5670_DOWN_CLK_SEL_SFT);
 908         }
 909
 910         if (asrc2_mask)
 911                 snd_soc_component_update_bits(component, RT5670_ASRC_2,
 912                                     asrc2_mask, asrc2_value);
 913
 914         if (asrc3_mask)
 915                 snd_soc_component_update_bits(component, RT5670_ASRC_3,
 916                                     asrc3_mask, asrc3_value);
 917         return 0;
 918 }
 919 EXPORT_SYMBOL_GPL(rt5670_sel_asrc_clk_src);
 920
 921 /* Digital Mixer */
 922 static const struct snd_kcontrol_new rt5670_sto1_adc_l_mix[] = {
 923         SOC_DAPM_SINGLE("ADC1 Switch", RT5670_STO1_ADC_MIXER,
 924                         RT5670_M_ADC_L1_SFT, 1, 1),
 925         SOC_DAPM_SINGLE("ADC2 Switch", RT5670_STO1_ADC_MIXER,
 926                         RT5670_M_ADC_L2_SFT, 1, 1),
 927 };
 928
 929 static const struct snd_kcontrol_new rt5670_sto1_adc_r_mix[] = {
 930         SOC_DAPM_SINGLE("ADC1 Switch", RT5670_STO1_ADC_MIXER,
 931                         RT5670_M_ADC_R1_SFT, 1, 1),
 932         SOC_DAPM_SINGLE("ADC2 Switch", RT5670_STO1_ADC_MIXER,
 933                         RT5670_M_ADC_R2_SFT, 1, 1),
 934 };
 935
 936 static const struct snd_kcontrol_new rt5670_sto2_adc_l_mix[] = {
 937         SOC_DAPM_SINGLE("ADC1 Switch", RT5670_STO2_ADC_MIXER,
 938                         RT5670_M_ADC_L1_SFT, 1, 1),
 939         SOC_DAPM_SINGLE("ADC2 Switch", RT5670_STO2_ADC_MIXER,
 940                         RT5670_M_ADC_L2_SFT, 1, 1),
 941 };
 942
 943 static const struct snd_kcontrol_new rt5670_sto2_adc_r_mix[] = {
 944         SOC_DAPM_SINGLE("ADC1 Switch", RT5670_STO2_ADC_MIXER,
 945                         RT5670_M_ADC_R1_SFT, 1, 1),
 946         SOC_DAPM_SINGLE("ADC2 Switch", RT5670_STO2_ADC_MIXER,
 947                         RT5670_M_ADC_R2_SFT, 1, 1),
 948 };
 949
 950 static const struct snd_kcontrol_new rt5670_mono_adc_l_mix[] = {
 951         SOC_DAPM_SINGLE("ADC1 Switch", RT5670_MONO_ADC_MIXER,
 952                         RT5670_M_MONO_ADC_L1_SFT, 1, 1),
 953         SOC_DAPM_SINGLE("ADC2 Switch", RT5670_MONO_ADC_MIXER,
 954                         RT5670_M_MONO_ADC_L2_SFT, 1, 1),
 955 };
 956
 957 static const struct snd_kcontrol_new rt5670_mono_adc_r_mix[] = {
 958         SOC_DAPM_SINGLE("ADC1 Switch", RT5670_MONO_ADC_MIXER,
 959                         RT5670_M_MONO_ADC_R1_SFT, 1, 1),
 960         SOC_DAPM_SINGLE("ADC2 Switch", RT5670_MONO_ADC_MIXER,
 961                         RT5670_M_MONO_ADC_R2_SFT, 1, 1),
 962 };
 963
 964 /* See comment above rt5670_update_ad_da_mixer_dac1_m_bits() */
 965 static int rt5670_put_dac1_mix_dac1_switch(struct snd_kcontrol *kcontrol,
 966                                            struct snd_ctl_elem_value *ucontrol)
 967 {
 968         struct soc_mixer_control *mc = (struct soc_mixer_control *)kcontrol->private_value;
 969         struct snd_soc_component *component = snd_soc_dapm_kcontrol_component(kcontrol);
 970         struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component);
 971         int ret;
 972
 973         if (mc->shift == 0)
 974                 rt5670->dac1_mixl_dac1_switch = ucontrol->value.integer.value[0];
 975         else
 976                 rt5670->dac1_mixr_dac1_switch = ucontrol->value.integer.value[0];
 977
 978         /* Apply the update (if any) */
 979         ret = snd_soc_dapm_put_volsw(kcontrol, ucontrol);
 980         if (ret == 0)
 981                 return 0;
 982
 983         rt5670_update_ad_da_mixer_dac1_m_bits(rt5670);
 984
 985         return 1;
 986 }
 987
 988 #define SOC_DAPM_SINGLE_RT5670_DAC1_SW(name, shift) \
 989         SOC_SINGLE_EXT(name, SND_SOC_NOPM, shift, 1, 0, \
 990                        snd_soc_dapm_get_volsw, rt5670_put_dac1_mix_dac1_switch)
 991
 992 static const struct snd_kcontrol_new rt5670_dac_l_mix[] = {
 993         SOC_DAPM_SINGLE("Stereo ADC Switch", RT5670_AD_DA_MIXER,
 994                         RT5670_M_ADCMIX_L_SFT, 1, 1),
 995         SOC_DAPM_SINGLE_RT5670_DAC1_SW("DAC1 Switch", 0),
 996 };
 997
 998 static const struct snd_kcontrol_new rt5670_dac_r_mix[] = {
 999         SOC_DAPM_SINGLE("Stereo ADC Switch", RT5670_AD_DA_MIXER,
1000                         RT5670_M_ADCMIX_R_SFT, 1, 1),
1001         SOC_DAPM_SINGLE_RT5670_DAC1_SW("DAC1 Switch", 1),
1002 };
1003
1004 static const struct snd_kcontrol_new rt5670_sto_dac_l_mix[] = {
1005         SOC_DAPM_SINGLE("DAC L1 Switch", RT5670_STO_DAC_MIXER,
1006                         RT5670_M_DAC_L1_SFT, 1, 1),
1007         SOC_DAPM_SINGLE("DAC L2 Switch", RT5670_STO_DAC_MIXER,
1008                         RT5670_M_DAC_L2_SFT, 1, 1),
1009         SOC_DAPM_SINGLE("DAC R1 Switch", RT5670_STO_DAC_MIXER,
1010                         RT5670_M_DAC_R1_STO_L_SFT, 1, 1),
1011 };
1012
1013 static const struct snd_kcontrol_new rt5670_sto_dac_r_mix[] = {
1014         SOC_DAPM_SINGLE("DAC R1 Switch", RT5670_STO_DAC_MIXER,
1015                         RT5670_M_DAC_R1_SFT, 1, 1),
1016         SOC_DAPM_SINGLE("DAC R2 Switch", RT5670_STO_DAC_MIXER,
1017                         RT5670_M_DAC_R2_SFT, 1, 1),
1018         SOC_DAPM_SINGLE("DAC L1 Switch", RT5670_STO_DAC_MIXER,
1019                         RT5670_M_DAC_L1_STO_R_SFT, 1, 1),
1020 };
1021
1022 static const struct snd_kcontrol_new rt5670_mono_dac_l_mix[] = {
1023         SOC_DAPM_SINGLE("DAC L1 Switch", RT5670_DD_MIXER,
1024                         RT5670_M_DAC_L1_MONO_L_SFT, 1, 1),
1025         SOC_DAPM_SINGLE("DAC L2 Switch", RT5670_DD_MIXER,
1026                         RT5670_M_DAC_L2_MONO_L_SFT, 1, 1),
1027         SOC_DAPM_SINGLE("DAC R2 Switch", RT5670_DD_MIXER,
1028                         RT5670_M_DAC_R2_MONO_L_SFT, 1, 1),
1029 };
1030
1031 static const struct snd_kcontrol_new rt5670_mono_dac_r_mix[] = {
1032         SOC_DAPM_SINGLE("DAC R1 Switch", RT5670_DD_MIXER,
1033                         RT5670_M_DAC_R1_MONO_R_SFT, 1, 1),
1034         SOC_DAPM_SINGLE("DAC R2 Switch", RT5670_DD_MIXER,
1035                         RT5670_M_DAC_R2_MONO_R_SFT, 1, 1),
1036         SOC_DAPM_SINGLE("DAC L2 Switch", RT5670_DD_MIXER,
1037                         RT5670_M_DAC_L2_MONO_R_SFT, 1, 1),
1038 };
1039
1040 static const struct snd_kcontrol_new rt5670_dig_l_mix[] = {
1041         SOC_DAPM_SINGLE("Sto DAC Mix L Switch", RT5670_DIG_MIXER,
1042                         RT5670_M_STO_L_DAC_L_SFT, 1, 1),
1043         SOC_DAPM_SINGLE("DAC L2 Switch", RT5670_DIG_MIXER,
1044                         RT5670_M_DAC_L2_DAC_L_SFT, 1, 1),
1045         SOC_DAPM_SINGLE("DAC R2 Switch", RT5670_DIG_MIXER,
1046                         RT5670_M_DAC_R2_DAC_L_SFT, 1, 1),
1047 };
1048
1049 static const struct snd_kcontrol_new rt5670_dig_r_mix[] = {
1050         SOC_DAPM_SINGLE("Sto DAC Mix R Switch", RT5670_DIG_MIXER,
1051                         RT5670_M_STO_R_DAC_R_SFT, 1, 1),
1052         SOC_DAPM_SINGLE("DAC R2 Switch", RT5670_DIG_MIXER,
1053                         RT5670_M_DAC_R2_DAC_R_SFT, 1, 1),
1054         SOC_DAPM_SINGLE("DAC L2 Switch", RT5670_DIG_MIXER,
1055                         RT5670_M_DAC_L2_DAC_R_SFT, 1, 1),
1056 };
1057
1058 /* Analog Input Mixer */
1059 static const struct snd_kcontrol_new rt5670_rec_l_mix[] = {
1060         SOC_DAPM_SINGLE("INL Switch", RT5670_REC_L2_MIXER,
1061                         RT5670_M_IN_L_RM_L_SFT, 1, 1),
1062         SOC_DAPM_SINGLE("BST2 Switch", RT5670_REC_L2_MIXER,
1063                         RT5670_M_BST2_RM_L_SFT, 1, 1),
1064         SOC_DAPM_SINGLE("BST1 Switch", RT5670_REC_L2_MIXER,
1065                         RT5670_M_BST1_RM_L_SFT, 1, 1),
1066 };
1067
1068 static const struct snd_kcontrol_new rt5670_rec_r_mix[] = {
1069         SOC_DAPM_SINGLE("INR Switch", RT5670_REC_R2_MIXER,
1070                         RT5670_M_IN_R_RM_R_SFT, 1, 1),
1071         SOC_DAPM_SINGLE("BST2 Switch", RT5670_REC_R2_MIXER,
1072                         RT5670_M_BST2_RM_R_SFT, 1, 1),
1073         SOC_DAPM_SINGLE("BST1 Switch", RT5670_REC_R2_MIXER,
1074                         RT5670_M_BST1_RM_R_SFT, 1, 1),
1075 };
1076
1077 static const struct snd_kcontrol_new rt5670_out_l_mix[] = {
1078         SOC_DAPM_SINGLE("BST1 Switch", RT5670_OUT_L1_MIXER,
1079                         RT5670_M_BST1_OM_L_SFT, 1, 1),
1080         SOC_DAPM_SINGLE("INL Switch", RT5670_OUT_L1_MIXER,
1081                         RT5670_M_IN_L_OM_L_SFT, 1, 1),
1082         SOC_DAPM_SINGLE("DAC L2 Switch", RT5670_OUT_L1_MIXER,
1083                         RT5670_M_DAC_L2_OM_L_SFT, 1, 1),
1084         SOC_DAPM_SINGLE("DAC L1 Switch", RT5670_OUT_L1_MIXER,
1085                         RT5670_M_DAC_L1_OM_L_SFT, 1, 1),
1086 };
1087
1088 static const struct snd_kcontrol_new rt5670_out_r_mix[] = {
1089         SOC_DAPM_SINGLE("BST2 Switch", RT5670_OUT_R1_MIXER,
1090                         RT5670_M_BST2_OM_R_SFT, 1, 1),
1091         SOC_DAPM_SINGLE("INR Switch", RT5670_OUT_R1_MIXER,
1092                         RT5670_M_IN_R_OM_R_SFT, 1, 1),
1093         SOC_DAPM_SINGLE("DAC R2 Switch", RT5670_OUT_R1_MIXER,
1094                         RT5670_M_DAC_R2_OM_R_SFT, 1, 1),
1095         SOC_DAPM_SINGLE("DAC R1 Switch", RT5670_OUT_R1_MIXER,
1096                         RT5670_M_DAC_R1_OM_R_SFT, 1, 1),
1097 };
1098
1099 static const struct snd_kcontrol_new rt5670_hpo_mix[] = {
1100         SOC_DAPM_SINGLE("DAC1 Switch", RT5670_HPO_MIXER,
1101                         RT5670_M_DAC1_HM_SFT, 1, 1),
1102         SOC_DAPM_SINGLE("HPVOL Switch", RT5670_HPO_MIXER,
1103                         RT5670_M_HPVOL_HM_SFT, 1, 1),
1104 };
1105
1106 static const struct snd_kcontrol_new rt5670_hpvoll_mix[] = {
1107         SOC_DAPM_SINGLE("DAC1 Switch", RT5670_HPO_MIXER,
1108                         RT5670_M_DACL1_HML_SFT, 1, 1),
1109         SOC_DAPM_SINGLE("INL Switch", RT5670_HPO_MIXER,
1110                         RT5670_M_INL1_HML_SFT, 1, 1),
1111 };
1112
1113 static const struct snd_kcontrol_new rt5670_hpvolr_mix[] = {
1114         SOC_DAPM_SINGLE("DAC1 Switch", RT5670_HPO_MIXER,
1115                         RT5670_M_DACR1_HMR_SFT, 1, 1),
1116         SOC_DAPM_SINGLE("INR Switch", RT5670_HPO_MIXER,
1117                         RT5670_M_INR1_HMR_SFT, 1, 1),
1118 };
1119
1120 static const struct snd_kcontrol_new rt5670_lout_mix[] = {
1121         SOC_DAPM_SINGLE("DAC L1 Switch", RT5670_LOUT_MIXER,
1122                         RT5670_M_DAC_L1_LM_SFT, 1, 1),
1123         SOC_DAPM_SINGLE("DAC R1 Switch", RT5670_LOUT_MIXER,
1124                         RT5670_M_DAC_R1_LM_SFT, 1, 1),
1125         SOC_DAPM_SINGLE("OUTMIX L Switch", RT5670_LOUT_MIXER,
1126                         RT5670_M_OV_L_LM_SFT, 1, 1),
1127         SOC_DAPM_SINGLE("OUTMIX R Switch", RT5670_LOUT_MIXER,
1128                         RT5670_M_OV_R_LM_SFT, 1, 1),
1129 };
1130
1131 static const struct snd_kcontrol_new lout_l_enable_control =
1132         SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5670_LOUT1,
1133                 RT5670_L_MUTE_SFT, 1, 1);
1134
1135 static const struct snd_kcontrol_new lout_r_enable_control =
1136         SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5670_LOUT1,
1137                 RT5670_R_MUTE_SFT, 1, 1);
1138
1139 /* DAC1 L/R source */ /* MX-29 [9:8] [11:10] */
1140 static const char * const rt5670_dac1_src[] = {
1141         "IF1 DAC", "IF2 DAC"
1142 };
1143
1144 static SOC_ENUM_SINGLE_DECL(rt5670_dac1l_enum, RT5670_AD_DA_MIXER,
1145         RT5670_DAC1_L_SEL_SFT, rt5670_dac1_src);
1146
1147 static const struct snd_kcontrol_new rt5670_dac1l_mux =
1148         SOC_DAPM_ENUM("DAC1 L source", rt5670_dac1l_enum);
1149
1150 static SOC_ENUM_SINGLE_DECL(rt5670_dac1r_enum, RT5670_AD_DA_MIXER,
1151         RT5670_DAC1_R_SEL_SFT, rt5670_dac1_src);
1152
1153 static const struct snd_kcontrol_new rt5670_dac1r_mux =
1154         SOC_DAPM_ENUM("DAC1 R source", rt5670_dac1r_enum);
1155
1156 /*DAC2 L/R source*/ /* MX-1B [6:4] [2:0] */
1157 /* TODO Use SOC_VALUE_ENUM_SINGLE_DECL */
1158 static const char * const rt5670_dac12_src[] = {
1159         "IF1 DAC", "IF2 DAC", "IF3 DAC", "TxDC DAC",
1160         "Bass", "VAD_ADC", "IF4 DAC"
1161 };
1162
1163 static SOC_ENUM_SINGLE_DECL(rt5670_dac2l_enum, RT5670_DAC_CTRL,
1164         RT5670_DAC2_L_SEL_SFT, rt5670_dac12_src);
1165
1166 static const struct snd_kcontrol_new rt5670_dac_l2_mux =
1167         SOC_DAPM_ENUM("DAC2 L source", rt5670_dac2l_enum);
1168
1169 static const char * const rt5670_dacr2_src[] = {
1170         "IF1 DAC", "IF2 DAC", "IF3 DAC", "TxDC DAC", "TxDP ADC", "IF4 DAC"
1171 };
1172
1173 static SOC_ENUM_SINGLE_DECL(rt5670_dac2r_enum, RT5670_DAC_CTRL,
1174         RT5670_DAC2_R_SEL_SFT, rt5670_dacr2_src);
1175
1176 static const struct snd_kcontrol_new rt5670_dac_r2_mux =
1177         SOC_DAPM_ENUM("DAC2 R source", rt5670_dac2r_enum);
1178
1179 /*RxDP source*/ /* MX-2D [15:13] */
1180 static const char * const rt5670_rxdp_src[] = {
1181         "IF2 DAC", "IF1 DAC", "STO1 ADC Mixer", "STO2 ADC Mixer",
1182         "Mono ADC Mixer L", "Mono ADC Mixer R", "DAC1"
1183 };
1184
1185 static SOC_ENUM_SINGLE_DECL(rt5670_rxdp_enum, RT5670_DSP_PATH1,
1186         RT5670_RXDP_SEL_SFT, rt5670_rxdp_src);
1187
1188 static const struct snd_kcontrol_new rt5670_rxdp_mux =
1189         SOC_DAPM_ENUM("DAC2 L source", rt5670_rxdp_enum);
1190
1191 /* MX-2D [1] [0] */
1192 static const char * const rt5670_dsp_bypass_src[] = {
1193         "DSP", "Bypass"
1194 };
1195
1196 static SOC_ENUM_SINGLE_DECL(rt5670_dsp_ul_enum, RT5670_DSP_PATH1,
1197         RT5670_DSP_UL_SFT, rt5670_dsp_bypass_src);
1198
1199 static const struct snd_kcontrol_new rt5670_dsp_ul_mux =
1200         SOC_DAPM_ENUM("DSP UL source", rt5670_dsp_ul_enum);
1201
1202 static SOC_ENUM_SINGLE_DECL(rt5670_dsp_dl_enum, RT5670_DSP_PATH1,
1203         RT5670_DSP_DL_SFT, rt5670_dsp_bypass_src);
1204
1205 static const struct snd_kcontrol_new rt5670_dsp_dl_mux =
1206         SOC_DAPM_ENUM("DSP DL source", rt5670_dsp_dl_enum);
1207
1208 /* Stereo2 ADC source */
1209 /* MX-26 [15] */
1210 static const char * const rt5670_stereo2_adc_lr_src[] = {
1211         "L", "LR"
1212 };
1213
1214 static SOC_ENUM_SINGLE_DECL(rt5670_stereo2_adc_lr_enum, RT5670_STO2_ADC_MIXER,
1215         RT5670_STO2_ADC_SRC_SFT, rt5670_stereo2_adc_lr_src);
1216
1217 static const struct snd_kcontrol_new rt5670_sto2_adc_lr_mux =
1218         SOC_DAPM_ENUM("Stereo2 ADC LR source", rt5670_stereo2_adc_lr_enum);
1219
1220 /* Stereo1 ADC source */
1221 /* MX-27 MX-26 [12] */
1222 static const char * const rt5670_stereo_adc1_src[] = {
1223         "DAC MIX", "ADC"
1224 };
1225
1226 static SOC_ENUM_SINGLE_DECL(rt5670_stereo1_adc1_enum, RT5670_STO1_ADC_MIXER,
1227         RT5670_ADC_1_SRC_SFT, rt5670_stereo_adc1_src);
1228
1229 static const struct snd_kcontrol_new rt5670_sto_adc_1_mux =
1230         SOC_DAPM_ENUM("Stereo1 ADC 1 Mux", rt5670_stereo1_adc1_enum);
1231
1232 static SOC_ENUM_SINGLE_DECL(rt5670_stereo2_adc1_enum, RT5670_STO2_ADC_MIXER,
1233         RT5670_ADC_1_SRC_SFT, rt5670_stereo_adc1_src);
1234
1235 static const struct snd_kcontrol_new rt5670_sto2_adc_1_mux =
1236         SOC_DAPM_ENUM("Stereo2 ADC 1 Mux", rt5670_stereo2_adc1_enum);
1237
1238
1239 /* MX-27 MX-26 [11] */
1240 static const char * const rt5670_stereo_adc2_src[] = {
1241         "DAC MIX", "DMIC"
1242 };
1243
1244 static SOC_ENUM_SINGLE_DECL(rt5670_stereo1_adc2_enum, RT5670_STO1_ADC_MIXER,
1245         RT5670_ADC_2_SRC_SFT, rt5670_stereo_adc2_src);
1246
1247 static const struct snd_kcontrol_new rt5670_sto_adc_2_mux =
1248         SOC_DAPM_ENUM("Stereo1 ADC 2 Mux", rt5670_stereo1_adc2_enum);
1249
1250 static SOC_ENUM_SINGLE_DECL(rt5670_stereo2_adc2_enum, RT5670_STO2_ADC_MIXER,
1251         RT5670_ADC_2_SRC_SFT, rt5670_stereo_adc2_src);
1252
1253 static const struct snd_kcontrol_new rt5670_sto2_adc_2_mux =
1254         SOC_DAPM_ENUM("Stereo2 ADC 2 Mux", rt5670_stereo2_adc2_enum);
1255
1256 /* MX-27 MX-26 [9:8] */
1257 static const char * const rt5670_stereo_dmic_src[] = {
1258         "DMIC1", "DMIC2", "DMIC3"
1259 };
1260
1261 static SOC_ENUM_SINGLE_DECL(rt5670_stereo1_dmic_enum, RT5670_STO1_ADC_MIXER,
1262         RT5670_DMIC_SRC_SFT, rt5670_stereo_dmic_src);
1263
1264 static const struct snd_kcontrol_new rt5670_sto1_dmic_mux =
1265         SOC_DAPM_ENUM("Stereo1 DMIC source", rt5670_stereo1_dmic_enum);
1266
1267 static SOC_ENUM_SINGLE_DECL(rt5670_stereo2_dmic_enum, RT5670_STO2_ADC_MIXER,
1268         RT5670_DMIC_SRC_SFT, rt5670_stereo_dmic_src);
1269
1270 static const struct snd_kcontrol_new rt5670_sto2_dmic_mux =
1271         SOC_DAPM_ENUM("Stereo2 DMIC source", rt5670_stereo2_dmic_enum);
1272
1273 /* Mono ADC source */
1274 /* MX-28 [12] */
1275 static const char * const rt5670_mono_adc_l1_src[] = {
1276         "Mono DAC MIXL", "ADC1"
1277 };
1278
1279 static SOC_ENUM_SINGLE_DECL(rt5670_mono_adc_l1_enum, RT5670_MONO_ADC_MIXER,
1280         RT5670_MONO_ADC_L1_SRC_SFT, rt5670_mono_adc_l1_src);
1281
1282 static const struct snd_kcontrol_new rt5670_mono_adc_l1_mux =
1283         SOC_DAPM_ENUM("Mono ADC1 left source", rt5670_mono_adc_l1_enum);
1284 /* MX-28 [11] */
1285 static const char * const rt5670_mono_adc_l2_src[] = {
1286         "Mono DAC MIXL", "DMIC"
1287 };
1288
1289 static SOC_ENUM_SINGLE_DECL(rt5670_mono_adc_l2_enum, RT5670_MONO_ADC_MIXER,
1290         RT5670_MONO_ADC_L2_SRC_SFT, rt5670_mono_adc_l2_src);
1291
1292 static const struct snd_kcontrol_new rt5670_mono_adc_l2_mux =
1293         SOC_DAPM_ENUM("Mono ADC2 left source", rt5670_mono_adc_l2_enum);
1294
1295 /* MX-28 [9:8] */
1296 static const char * const rt5670_mono_dmic_src[] = {
1297         "DMIC1", "DMIC2", "DMIC3"
1298 };
1299
1300 static SOC_ENUM_SINGLE_DECL(rt5670_mono_dmic_l_enum, RT5670_MONO_ADC_MIXER,
1301         RT5670_MONO_DMIC_L_SRC_SFT, rt5670_mono_dmic_src);
1302
1303 static const struct snd_kcontrol_new rt5670_mono_dmic_l_mux =
1304         SOC_DAPM_ENUM("Mono DMIC left source", rt5670_mono_dmic_l_enum);
1305 /* MX-28 [1:0] */
1306 static SOC_ENUM_SINGLE_DECL(rt5670_mono_dmic_r_enum, RT5670_MONO_ADC_MIXER,
1307         RT5670_MONO_DMIC_R_SRC_SFT, rt5670_mono_dmic_src);
1308
1309 static const struct snd_kcontrol_new rt5670_mono_dmic_r_mux =
1310         SOC_DAPM_ENUM("Mono DMIC Right source", rt5670_mono_dmic_r_enum);
1311 /* MX-28 [4] */
1312 static const char * const rt5670_mono_adc_r1_src[] = {
1313         "Mono DAC MIXR", "ADC2"
1314 };
1315
1316 static SOC_ENUM_SINGLE_DECL(rt5670_mono_adc_r1_enum, RT5670_MONO_ADC_MIXER,
1317         RT5670_MONO_ADC_R1_SRC_SFT, rt5670_mono_adc_r1_src);
1318
1319 static const struct snd_kcontrol_new rt5670_mono_adc_r1_mux =
1320         SOC_DAPM_ENUM("Mono ADC1 right source", rt5670_mono_adc_r1_enum);
1321 /* MX-28 [3] */
1322 static const char * const rt5670_mono_adc_r2_src[] = {
1323         "Mono DAC MIXR", "DMIC"
1324 };
1325
1326 static SOC_ENUM_SINGLE_DECL(rt5670_mono_adc_r2_enum, RT5670_MONO_ADC_MIXER,
1327         RT5670_MONO_ADC_R2_SRC_SFT, rt5670_mono_adc_r2_src);
1328
1329 static const struct snd_kcontrol_new rt5670_mono_adc_r2_mux =
1330         SOC_DAPM_ENUM("Mono ADC2 right source", rt5670_mono_adc_r2_enum);
1331
1332 /* MX-2D [3:2] */
1333 static const char * const rt5670_txdp_slot_src[] = {
1334         "Slot 0-1", "Slot 2-3", "Slot 4-5", "Slot 6-7"
1335 };
1336
1337 static SOC_ENUM_SINGLE_DECL(rt5670_txdp_slot_enum, RT5670_DSP_PATH1,
1338         RT5670_TXDP_SLOT_SEL_SFT, rt5670_txdp_slot_src);
1339
1340 static const struct snd_kcontrol_new rt5670_txdp_slot_mux =
1341         SOC_DAPM_ENUM("TxDP Slot source", rt5670_txdp_slot_enum);
1342
1343 /* MX-2F [15] */
1344 static const char * const rt5670_if1_adc2_in_src[] = {
1345         "IF_ADC2", "VAD_ADC"
1346 };
1347
1348 static SOC_ENUM_SINGLE_DECL(rt5670_if1_adc2_in_enum, RT5670_DIG_INF1_DATA,
1349         RT5670_IF1_ADC2_IN_SFT, rt5670_if1_adc2_in_src);
1350
1351 static const struct snd_kcontrol_new rt5670_if1_adc2_in_mux =
1352         SOC_DAPM_ENUM("IF1 ADC2 IN source", rt5670_if1_adc2_in_enum);
1353
1354 /* MX-2F [14:12] */
1355 static const char * const rt5670_if2_adc_in_src[] = {
1356         "IF_ADC1", "IF_ADC2", "IF_ADC3", "TxDC_DAC", "TxDP_ADC", "VAD_ADC"
1357 };
1358
1359 static SOC_ENUM_SINGLE_DECL(rt5670_if2_adc_in_enum, RT5670_DIG_INF1_DATA,
1360         RT5670_IF2_ADC_IN_SFT, rt5670_if2_adc_in_src);
1361
1362 static const struct snd_kcontrol_new rt5670_if2_adc_in_mux =
1363         SOC_DAPM_ENUM("IF2 ADC IN source", rt5670_if2_adc_in_enum);
1364
1365 /* MX-31 [15] [13] [11] [9] */
1366 static const char * const rt5670_pdm_src[] = {
1367         "Mono DAC", "Stereo DAC"
1368 };
1369
1370 static SOC_ENUM_SINGLE_DECL(rt5670_pdm1_l_enum, RT5670_PDM_OUT_CTRL,
1371         RT5670_PDM1_L_SFT, rt5670_pdm_src);
1372
1373 static const struct snd_kcontrol_new rt5670_pdm1_l_mux =
1374         SOC_DAPM_ENUM("PDM1 L source", rt5670_pdm1_l_enum);
1375
1376 static SOC_ENUM_SINGLE_DECL(rt5670_pdm1_r_enum, RT5670_PDM_OUT_CTRL,
1377         RT5670_PDM1_R_SFT, rt5670_pdm_src);
1378
1379 static const struct snd_kcontrol_new rt5670_pdm1_r_mux =
1380         SOC_DAPM_ENUM("PDM1 R source", rt5670_pdm1_r_enum);
1381
1382 static SOC_ENUM_SINGLE_DECL(rt5670_pdm2_l_enum, RT5670_PDM_OUT_CTRL,
1383         RT5670_PDM2_L_SFT, rt5670_pdm_src);
1384
1385 static const struct snd_kcontrol_new rt5670_pdm2_l_mux =
1386         SOC_DAPM_ENUM("PDM2 L source", rt5670_pdm2_l_enum);
1387
1388 static SOC_ENUM_SINGLE_DECL(rt5670_pdm2_r_enum, RT5670_PDM_OUT_CTRL,
1389         RT5670_PDM2_R_SFT, rt5670_pdm_src);
1390
1391 static const struct snd_kcontrol_new rt5670_pdm2_r_mux =
1392         SOC_DAPM_ENUM("PDM2 R source", rt5670_pdm2_r_enum);
1393
1394 /* MX-FA [12] */
1395 static const char * const rt5670_if1_adc1_in1_src[] = {
1396         "IF_ADC1", "IF1_ADC3"
1397 };
1398
1399 static SOC_ENUM_SINGLE_DECL(rt5670_if1_adc1_in1_enum, RT5670_DIG_MISC,
1400         RT5670_IF1_ADC1_IN1_SFT, rt5670_if1_adc1_in1_src);
1401
1402 static const struct snd_kcontrol_new rt5670_if1_adc1_in1_mux =
1403         SOC_DAPM_ENUM("IF1 ADC1 IN1 source", rt5670_if1_adc1_in1_enum);
1404
1405 /* MX-FA [11] */
1406 static const char * const rt5670_if1_adc1_in2_src[] = {
1407         "IF1_ADC1_IN1", "IF1_ADC4"
1408 };
1409
1410 static SOC_ENUM_SINGLE_DECL(rt5670_if1_adc1_in2_enum, RT5670_DIG_MISC,
1411         RT5670_IF1_ADC1_IN2_SFT, rt5670_if1_adc1_in2_src);
1412
1413 static const struct snd_kcontrol_new rt5670_if1_adc1_in2_mux =
1414         SOC_DAPM_ENUM("IF1 ADC1 IN2 source", rt5670_if1_adc1_in2_enum);
1415
1416 /* MX-FA [10] */
1417 static const char * const rt5670_if1_adc2_in1_src[] = {
1418         "IF1_ADC2_IN", "IF1_ADC4"
1419 };
1420
1421 static SOC_ENUM_SINGLE_DECL(rt5670_if1_adc2_in1_enum, RT5670_DIG_MISC,
1422         RT5670_IF1_ADC2_IN1_SFT, rt5670_if1_adc2_in1_src);
1423
1424 static const struct snd_kcontrol_new rt5670_if1_adc2_in1_mux =
1425         SOC_DAPM_ENUM("IF1 ADC2 IN1 source", rt5670_if1_adc2_in1_enum);
1426
1427 /* MX-9D [9:8] */
1428 static const char * const rt5670_vad_adc_src[] = {
1429         "Sto1 ADC L", "Mono ADC L", "Mono ADC R", "Sto2 ADC L"
1430 };
1431
1432 static SOC_ENUM_SINGLE_DECL(rt5670_vad_adc_enum, RT5670_VAD_CTRL4,
1433         RT5670_VAD_SEL_SFT, rt5670_vad_adc_src);
1434
1435 static const struct snd_kcontrol_new rt5670_vad_adc_mux =
1436         SOC_DAPM_ENUM("VAD ADC source", rt5670_vad_adc_enum);
1437
1438 static int rt5670_hp_power_event(struct snd_soc_dapm_widget *w,
1439                            struct snd_kcontrol *kcontrol, int event)
1440 {
1441         struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1442         struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component);
1443
1444         switch (event) {
1445         case SND_SOC_DAPM_POST_PMU:
1446                 regmap_update_bits(rt5670->regmap, RT5670_CHARGE_PUMP,
1447                         RT5670_PM_HP_MASK, RT5670_PM_HP_HV);
1448                 regmap_update_bits(rt5670->regmap, RT5670_GEN_CTRL2,
1449                         0x0400, 0x0400);
1450                 /* headphone amp power on */
1451                 regmap_update_bits(rt5670->regmap, RT5670_PWR_ANLG1,
1452                         RT5670_PWR_HA | RT5670_PWR_FV1 |
1453                         RT5670_PWR_FV2, RT5670_PWR_HA |
1454                         RT5670_PWR_FV1 | RT5670_PWR_FV2);
1455                 /* depop parameters */
1456                 regmap_write(rt5670->regmap, RT5670_DEPOP_M2, 0x3100);
1457                 regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x8009);
1458                 regmap_write(rt5670->regmap, RT5670_PR_BASE +
1459                         RT5670_HP_DCC_INT1, 0x9f00);
1460                 mdelay(20);
1461                 regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x8019);
1462                 break;
1463         case SND_SOC_DAPM_PRE_PMD:
1464                 regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x0004);
1465                 msleep(30);
1466                 break;
1467         default:
1468                 return 0;
1469         }
1470
1471         return 0;
1472 }
1473
1474 static int rt5670_hp_event(struct snd_soc_dapm_widget *w,
1475         struct snd_kcontrol *kcontrol, int event)
1476 {
1477         struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1478         struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component);
1479
1480         switch (event) {
1481         case SND_SOC_DAPM_POST_PMU:
1482                 /* headphone unmute sequence */
1483                 regmap_write(rt5670->regmap, RT5670_PR_BASE +
1484                                 RT5670_MAMP_INT_REG2, 0xb400);
1485                 regmap_write(rt5670->regmap, RT5670_DEPOP_M3, 0x0772);
1486                 regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x805d);
1487                 regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x831d);
1488                 regmap_update_bits(rt5670->regmap, RT5670_GEN_CTRL2,
1489                                 0x0300, 0x0300);
1490                 regmap_update_bits(rt5670->regmap, RT5670_HP_VOL,
1491                         RT5670_L_MUTE | RT5670_R_MUTE, 0);
1492                 msleep(80);
1493                 regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x8019);
1494                 break;
1495
1496         case SND_SOC_DAPM_PRE_PMD:
1497                 /* headphone mute sequence */
1498                 regmap_write(rt5670->regmap, RT5670_PR_BASE +
1499                                 RT5670_MAMP_INT_REG2, 0xb400);
1500                 regmap_write(rt5670->regmap, RT5670_DEPOP_M3, 0x0772);
1501                 regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x803d);
1502                 mdelay(10);
1503                 regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x831d);
1504                 mdelay(10);
1505                 regmap_update_bits(rt5670->regmap, RT5670_HP_VOL,
1506                                    RT5670_L_MUTE | RT5670_R_MUTE,
1507                                    RT5670_L_MUTE | RT5670_R_MUTE);
1508                 msleep(20);
1509                 regmap_update_bits(rt5670->regmap,
1510                                    RT5670_GEN_CTRL2, 0x0300, 0x0);
1511                 regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x8019);
1512                 regmap_write(rt5670->regmap, RT5670_DEPOP_M3, 0x0707);
1513                 regmap_write(rt5670->regmap, RT5670_PR_BASE +
1514                                 RT5670_MAMP_INT_REG2, 0xfc00);
1515                 break;
1516
1517         default:
1518                 return 0;
1519         }
1520
1521         return 0;
1522 }
1523
1524 static int rt5670_spk_event(struct snd_soc_dapm_widget *w,
1525         struct snd_kcontrol *kcontrol, int event)
1526 {
1527         struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1528         struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component);
1529
1530         if (!rt5670->gpio1_is_ext_spk_en)
1531                 return 0;
1532
1533         switch (event) {
1534         case SND_SOC_DAPM_POST_PMU:
1535                 regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL2,
1536                                    RT5670_GP1_OUT_MASK, RT5670_GP1_OUT_HI);
1537                 break;
1538
1539         case SND_SOC_DAPM_PRE_PMD:
1540                 regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL2,
1541                                    RT5670_GP1_OUT_MASK, RT5670_GP1_OUT_LO);
1542                 break;
1543
1544         default:
1545                 return 0;
1546         }
1547
1548         return 0;
1549 }
1550
1551 static int rt5670_bst1_event(struct snd_soc_dapm_widget *w,
1552         struct snd_kcontrol *kcontrol, int event)
1553 {
1554         struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1555
1556         switch (event) {
1557         case SND_SOC_DAPM_POST_PMU:
1558                 snd_soc_component_update_bits(component, RT5670_PWR_ANLG2,
1559                                     RT5670_PWR_BST1_P, RT5670_PWR_BST1_P);
1560                 break;
1561
1562         case SND_SOC_DAPM_PRE_PMD:
1563                 snd_soc_component_update_bits(component, RT5670_PWR_ANLG2,
1564                                     RT5670_PWR_BST1_P, 0);
1565                 break;
1566
1567         default:
1568                 return 0;
1569         }
1570
1571         return 0;
1572 }
1573
1574 static int rt5670_bst2_event(struct snd_soc_dapm_widget *w,
1575         struct snd_kcontrol *kcontrol, int event)
1576 {
1577         struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1578
1579         switch (event) {
1580         case SND_SOC_DAPM_POST_PMU:
1581                 snd_soc_component_update_bits(component, RT5670_PWR_ANLG2,
1582                                     RT5670_PWR_BST2_P, RT5670_PWR_BST2_P);
1583                 break;
1584
1585         case SND_SOC_DAPM_PRE_PMD:
1586                 snd_soc_component_update_bits(component, RT5670_PWR_ANLG2,
1587                                     RT5670_PWR_BST2_P, 0);
1588                 break;
1589
1590         default:
1591                 return 0;
1592         }
1593
1594         return 0;
1595 }
1596
1597 static const struct snd_soc_dapm_widget rt5670_dapm_widgets[] = {
1598         SND_SOC_DAPM_SUPPLY("PLL1", RT5670_PWR_ANLG2,
1599                             RT5670_PWR_PLL_BIT, 0, NULL, 0),
1600         SND_SOC_DAPM_SUPPLY("I2S DSP", RT5670_PWR_DIG2,
1601                             RT5670_PWR_I2S_DSP_BIT, 0, NULL, 0),
1602         SND_SOC_DAPM_SUPPLY("Mic Det Power", RT5670_PWR_VOL,
1603                             RT5670_PWR_MIC_DET_BIT, 0, NULL, 0),
1604
1605         /* ASRC */
1606         SND_SOC_DAPM_SUPPLY_S("I2S1 ASRC", 1, RT5670_ASRC_1,
1607                               11, 0, NULL, 0),
1608         SND_SOC_DAPM_SUPPLY_S("I2S2 ASRC", 1, RT5670_ASRC_1,
1609                               12, 0, NULL, 0),
1610         SND_SOC_DAPM_SUPPLY_S("DAC STO ASRC", 1, RT5670_ASRC_1,
1611                               10, 0, NULL, 0),
1612         SND_SOC_DAPM_SUPPLY_S("DAC MONO L ASRC", 1, RT5670_ASRC_1,
1613                               9, 0, NULL, 0),
1614         SND_SOC_DAPM_SUPPLY_S("DAC MONO R ASRC", 1, RT5670_ASRC_1,
1615                               8, 0, NULL, 0),
1616         SND_SOC_DAPM_SUPPLY_S("DMIC STO1 ASRC", 1, RT5670_ASRC_1,
1617                               7, 0, NULL, 0),
1618         SND_SOC_DAPM_SUPPLY_S("DMIC STO2 ASRC", 1, RT5670_ASRC_1,
1619                               6, 0, NULL, 0),
1620         SND_SOC_DAPM_SUPPLY_S("DMIC MONO L ASRC", 1, RT5670_ASRC_1,
1621                               5, 0, NULL, 0),
1622         SND_SOC_DAPM_SUPPLY_S("DMIC MONO R ASRC", 1, RT5670_ASRC_1,
1623                               4, 0, NULL, 0),
1624         SND_SOC_DAPM_SUPPLY_S("ADC STO1 ASRC", 1, RT5670_ASRC_1,
1625                               3, 0, NULL, 0),
1626         SND_SOC_DAPM_SUPPLY_S("ADC STO2 ASRC", 1, RT5670_ASRC_1,
1627                               2, 0, NULL, 0),
1628         SND_SOC_DAPM_SUPPLY_S("ADC MONO L ASRC", 1, RT5670_ASRC_1,
1629                               1, 0, NULL, 0),
1630         SND_SOC_DAPM_SUPPLY_S("ADC MONO R ASRC", 1, RT5670_ASRC_1,
1631                               0, 0, NULL, 0),
1632
1633         /* Input Side */
1634         /* micbias */
1635         SND_SOC_DAPM_SUPPLY("MICBIAS1", RT5670_PWR_ANLG2,
1636                              RT5670_PWR_MB1_BIT, 0, NULL, 0),
1637
1638         /* Input Lines */
1639         SND_SOC_DAPM_INPUT("DMIC L1"),
1640         SND_SOC_DAPM_INPUT("DMIC R1"),
1641         SND_SOC_DAPM_INPUT("DMIC L2"),
1642         SND_SOC_DAPM_INPUT("DMIC R2"),
1643         SND_SOC_DAPM_INPUT("DMIC L3"),
1644         SND_SOC_DAPM_INPUT("DMIC R3"),
1645
1646         SND_SOC_DAPM_INPUT("IN1P"),
1647         SND_SOC_DAPM_INPUT("IN1N"),
1648         SND_SOC_DAPM_INPUT("IN2P"),
1649         SND_SOC_DAPM_INPUT("IN2N"),
1650
1651         SND_SOC_DAPM_PGA("DMIC1", SND_SOC_NOPM, 0, 0, NULL, 0),
1652         SND_SOC_DAPM_PGA("DMIC2", SND_SOC_NOPM, 0, 0, NULL, 0),
1653         SND_SOC_DAPM_PGA("DMIC3", SND_SOC_NOPM, 0, 0, NULL, 0),
1654
1655         SND_SOC_DAPM_SUPPLY("DMIC CLK", SND_SOC_NOPM, 0, 0,
1656                             set_dmic_clk, SND_SOC_DAPM_PRE_PMU),
1657         SND_SOC_DAPM_SUPPLY("DMIC1 Power", RT5670_DMIC_CTRL1,
1658                             RT5670_DMIC_1_EN_SFT, 0, NULL, 0),
1659         SND_SOC_DAPM_SUPPLY("DMIC2 Power", RT5670_DMIC_CTRL1,
1660                             RT5670_DMIC_2_EN_SFT, 0, NULL, 0),
1661         SND_SOC_DAPM_SUPPLY("DMIC3 Power", RT5670_DMIC_CTRL1,
1662                             RT5670_DMIC_3_EN_SFT, 0, NULL, 0),
1663         /* Boost */
1664         SND_SOC_DAPM_PGA_E("BST1", RT5670_PWR_ANLG2, RT5670_PWR_BST1_BIT,
1665                            0, NULL, 0, rt5670_bst1_event,
1666                            SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1667         SND_SOC_DAPM_PGA_E("BST2", RT5670_PWR_ANLG2, RT5670_PWR_BST2_BIT,
1668                            0, NULL, 0, rt5670_bst2_event,
1669                            SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1670         /* Input Volume */
1671         SND_SOC_DAPM_PGA("INL VOL", RT5670_PWR_VOL,
1672                          RT5670_PWR_IN_L_BIT, 0, NULL, 0),
1673         SND_SOC_DAPM_PGA("INR VOL", RT5670_PWR_VOL,
1674                          RT5670_PWR_IN_R_BIT, 0, NULL, 0),
1675
1676         /* REC Mixer */
1677         SND_SOC_DAPM_MIXER("RECMIXL", RT5670_PWR_MIXER, RT5670_PWR_RM_L_BIT, 0,
1678                            rt5670_rec_l_mix, ARRAY_SIZE(rt5670_rec_l_mix)),
1679         SND_SOC_DAPM_MIXER("RECMIXR", RT5670_PWR_MIXER, RT5670_PWR_RM_R_BIT, 0,
1680                            rt5670_rec_r_mix, ARRAY_SIZE(rt5670_rec_r_mix)),
1681         /* ADCs */
1682         SND_SOC_DAPM_ADC("ADC 1", NULL, SND_SOC_NOPM, 0, 0),
1683         SND_SOC_DAPM_ADC("ADC 2", NULL, SND_SOC_NOPM, 0, 0),
1684
1685         SND_SOC_DAPM_PGA("ADC 1_2", SND_SOC_NOPM, 0, 0, NULL, 0),
1686
1687         SND_SOC_DAPM_SUPPLY("ADC 1 power", RT5670_PWR_DIG1,
1688                             RT5670_PWR_ADC_L_BIT, 0, NULL, 0),
1689         SND_SOC_DAPM_SUPPLY("ADC 2 power", RT5670_PWR_DIG1,
1690                             RT5670_PWR_ADC_R_BIT, 0, NULL, 0),
1691         SND_SOC_DAPM_SUPPLY("ADC clock", RT5670_PR_BASE +
1692                             RT5670_CHOP_DAC_ADC, 12, 0, NULL, 0),
1693         /* ADC Mux */
1694         SND_SOC_DAPM_MUX("Stereo1 DMIC Mux", SND_SOC_NOPM, 0, 0,
1695                          &rt5670_sto1_dmic_mux),
1696         SND_SOC_DAPM_MUX("Stereo1 ADC L2 Mux", SND_SOC_NOPM, 0, 0,
1697                          &rt5670_sto_adc_2_mux),
1698         SND_SOC_DAPM_MUX("Stereo1 ADC R2 Mux", SND_SOC_NOPM, 0, 0,
1699                          &rt5670_sto_adc_2_mux),
1700         SND_SOC_DAPM_MUX("Stereo1 ADC L1 Mux", SND_SOC_NOPM, 0, 0,
1701                          &rt5670_sto_adc_1_mux),
1702         SND_SOC_DAPM_MUX("Stereo1 ADC R1 Mux", SND_SOC_NOPM, 0, 0,
1703                          &rt5670_sto_adc_1_mux),
1704         SND_SOC_DAPM_MUX("Stereo2 DMIC Mux", SND_SOC_NOPM, 0, 0,
1705                          &rt5670_sto2_dmic_mux),
1706         SND_SOC_DAPM_MUX("Stereo2 ADC L2 Mux", SND_SOC_NOPM, 0, 0,
1707                          &rt5670_sto2_adc_2_mux),
1708         SND_SOC_DAPM_MUX("Stereo2 ADC R2 Mux", SND_SOC_NOPM, 0, 0,
1709                          &rt5670_sto2_adc_2_mux),
1710         SND_SOC_DAPM_MUX("Stereo2 ADC L1 Mux", SND_SOC_NOPM, 0, 0,
1711                          &rt5670_sto2_adc_1_mux),
1712         SND_SOC_DAPM_MUX("Stereo2 ADC R1 Mux", SND_SOC_NOPM, 0, 0,
1713                          &rt5670_sto2_adc_1_mux),
1714         SND_SOC_DAPM_MUX("Stereo2 ADC LR Mux", SND_SOC_NOPM, 0, 0,
1715                          &rt5670_sto2_adc_lr_mux),
1716         SND_SOC_DAPM_MUX("Mono DMIC L Mux", SND_SOC_NOPM, 0, 0,
1717                          &rt5670_mono_dmic_l_mux),
1718         SND_SOC_DAPM_MUX("Mono DMIC R Mux", SND_SOC_NOPM, 0, 0,
1719                          &rt5670_mono_dmic_r_mux),
1720         SND_SOC_DAPM_MUX("Mono ADC L2 Mux", SND_SOC_NOPM, 0, 0,
1721                          &rt5670_mono_adc_l2_mux),
1722         SND_SOC_DAPM_MUX("Mono ADC L1 Mux", SND_SOC_NOPM, 0, 0,
1723                          &rt5670_mono_adc_l1_mux),
1724         SND_SOC_DAPM_MUX("Mono ADC R1 Mux", SND_SOC_NOPM, 0, 0,
1725                          &rt5670_mono_adc_r1_mux),
1726         SND_SOC_DAPM_MUX("Mono ADC R2 Mux", SND_SOC_NOPM, 0, 0,
1727                          &rt5670_mono_adc_r2_mux),
1728         /* ADC Mixer */
1729         SND_SOC_DAPM_SUPPLY("ADC Stereo1 Filter", RT5670_PWR_DIG2,
1730                             RT5670_PWR_ADC_S1F_BIT, 0, NULL, 0),
1731         SND_SOC_DAPM_SUPPLY("ADC Stereo2 Filter", RT5670_PWR_DIG2,
1732                             RT5670_PWR_ADC_S2F_BIT, 0, NULL, 0),
1733         SND_SOC_DAPM_MIXER("Sto1 ADC MIXL", SND_SOC_NOPM, 0, 0,
1734                            rt5670_sto1_adc_l_mix, ARRAY_SIZE(rt5670_sto1_adc_l_mix)),
1735         SND_SOC_DAPM_MIXER("Sto1 ADC MIXR", SND_SOC_NOPM, 0, 0,
1736                            rt5670_sto1_adc_r_mix, ARRAY_SIZE(rt5670_sto1_adc_r_mix)),
1737         SND_SOC_DAPM_MIXER("Sto2 ADC MIXL", SND_SOC_NOPM, 0, 0,
1738                            rt5670_sto2_adc_l_mix,
1739                            ARRAY_SIZE(rt5670_sto2_adc_l_mix)),
1740         SND_SOC_DAPM_MIXER("Sto2 ADC MIXR", SND_SOC_NOPM, 0, 0,
1741                            rt5670_sto2_adc_r_mix,
1742                            ARRAY_SIZE(rt5670_sto2_adc_r_mix)),
1743         SND_SOC_DAPM_SUPPLY("ADC Mono Left Filter", RT5670_PWR_DIG2,
1744                             RT5670_PWR_ADC_MF_L_BIT, 0, NULL, 0),
1745         SND_SOC_DAPM_MIXER("Mono ADC MIXL", RT5670_MONO_ADC_DIG_VOL,
1746                            RT5670_L_MUTE_SFT, 1, rt5670_mono_adc_l_mix,
1747                            ARRAY_SIZE(rt5670_mono_adc_l_mix)),
1748         SND_SOC_DAPM_SUPPLY("ADC Mono Right Filter", RT5670_PWR_DIG2,
1749                             RT5670_PWR_ADC_MF_R_BIT, 0, NULL, 0),
1750         SND_SOC_DAPM_MIXER("Mono ADC MIXR", RT5670_MONO_ADC_DIG_VOL,
1751                            RT5670_R_MUTE_SFT, 1, rt5670_mono_adc_r_mix,
1752                            ARRAY_SIZE(rt5670_mono_adc_r_mix)),
1753
1754         /* ADC PGA */
1755         SND_SOC_DAPM_PGA("Stereo1 ADC MIXL", SND_SOC_NOPM, 0, 0, NULL, 0),
1756         SND_SOC_DAPM_PGA("Stereo1 ADC MIXR", SND_SOC_NOPM, 0, 0, NULL, 0),
1757         SND_SOC_DAPM_PGA("Stereo2 ADC MIXL", SND_SOC_NOPM, 0, 0, NULL, 0),
1758         SND_SOC_DAPM_PGA("Stereo2 ADC MIXR", SND_SOC_NOPM, 0, 0, NULL, 0),
1759         SND_SOC_DAPM_PGA("Sto2 ADC LR MIX", SND_SOC_NOPM, 0, 0, NULL, 0),
1760         SND_SOC_DAPM_PGA("Stereo1 ADC MIX", SND_SOC_NOPM, 0, 0, NULL, 0),
1761         SND_SOC_DAPM_PGA("Stereo2 ADC MIX", SND_SOC_NOPM, 0, 0, NULL, 0),
1762         SND_SOC_DAPM_PGA("Mono ADC MIX", SND_SOC_NOPM, 0, 0, NULL, 0),
1763         SND_SOC_DAPM_PGA("VAD_ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1764         SND_SOC_DAPM_PGA("IF_ADC1", SND_SOC_NOPM, 0, 0, NULL, 0),
1765         SND_SOC_DAPM_PGA("IF_ADC2", SND_SOC_NOPM, 0, 0, NULL, 0),
1766         SND_SOC_DAPM_PGA("IF_ADC3", SND_SOC_NOPM, 0, 0, NULL, 0),
1767         SND_SOC_DAPM_PGA("IF1_ADC1", SND_SOC_NOPM, 0, 0, NULL, 0),
1768         SND_SOC_DAPM_PGA("IF1_ADC2", SND_SOC_NOPM, 0, 0, NULL, 0),
1769         SND_SOC_DAPM_PGA("IF1_ADC3", SND_SOC_NOPM, 0, 0, NULL, 0),
1770
1771         /* DSP */
1772         SND_SOC_DAPM_PGA("TxDP_ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1773         SND_SOC_DAPM_PGA("TxDP_ADC_L", SND_SOC_NOPM, 0, 0, NULL, 0),
1774         SND_SOC_DAPM_PGA("TxDP_ADC_R", SND_SOC_NOPM, 0, 0, NULL, 0),
1775         SND_SOC_DAPM_PGA("TxDC_DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
1776
1777         SND_SOC_DAPM_MUX("TDM Data Mux", SND_SOC_NOPM, 0, 0,
1778                          &rt5670_txdp_slot_mux),
1779
1780         SND_SOC_DAPM_MUX("DSP UL Mux", SND_SOC_NOPM, 0, 0,
1781                          &rt5670_dsp_ul_mux),
1782         SND_SOC_DAPM_MUX("DSP DL Mux", SND_SOC_NOPM, 0, 0,
1783                          &rt5670_dsp_dl_mux),
1784
1785         SND_SOC_DAPM_MUX("RxDP Mux", SND_SOC_NOPM, 0, 0,
1786                          &rt5670_rxdp_mux),
1787
1788         /* IF2 Mux */
1789         SND_SOC_DAPM_MUX("IF2 ADC Mux", SND_SOC_NOPM, 0, 0,
1790                          &rt5670_if2_adc_in_mux),
1791
1792         /* Digital Interface */
1793         SND_SOC_DAPM_SUPPLY("I2S1", RT5670_PWR_DIG1,
1794                             RT5670_PWR_I2S1_BIT, 0, NULL, 0),
1795         SND_SOC_DAPM_PGA("IF1 DAC1", SND_SOC_NOPM, 0, 0, NULL, 0),
1796         SND_SOC_DAPM_PGA("IF1 DAC2", SND_SOC_NOPM, 0, 0, NULL, 0),
1797         SND_SOC_DAPM_PGA("IF1 DAC1 L", SND_SOC_NOPM, 0, 0, NULL, 0),
1798         SND_SOC_DAPM_PGA("IF1 DAC1 R", SND_SOC_NOPM, 0, 0, NULL, 0),
1799         SND_SOC_DAPM_PGA("IF1 DAC2 L", SND_SOC_NOPM, 0, 0, NULL, 0),
1800         SND_SOC_DAPM_PGA("IF1 DAC2 R", SND_SOC_NOPM, 0, 0, NULL, 0),
1801         SND_SOC_DAPM_PGA("IF1 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1802         SND_SOC_DAPM_PGA("IF1 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1803         SND_SOC_DAPM_PGA("IF1 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1804         SND_SOC_DAPM_SUPPLY("I2S2", RT5670_PWR_DIG1,
1805                             RT5670_PWR_I2S2_BIT, 0, NULL, 0),
1806         SND_SOC_DAPM_PGA("IF2 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
1807         SND_SOC_DAPM_PGA("IF2 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1808         SND_SOC_DAPM_PGA("IF2 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1809         SND_SOC_DAPM_PGA("IF2 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1810         SND_SOC_DAPM_PGA("IF2 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1811         SND_SOC_DAPM_PGA("IF2 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1812
1813         /* Digital Interface Select */
1814         SND_SOC_DAPM_MUX("IF1 ADC1 IN1 Mux", SND_SOC_NOPM, 0, 0,
1815                          &rt5670_if1_adc1_in1_mux),
1816         SND_SOC_DAPM_MUX("IF1 ADC1 IN2 Mux", SND_SOC_NOPM, 0, 0,
1817                          &rt5670_if1_adc1_in2_mux),
1818         SND_SOC_DAPM_MUX("IF1 ADC2 IN Mux", SND_SOC_NOPM, 0, 0,
1819                          &rt5670_if1_adc2_in_mux),
1820         SND_SOC_DAPM_MUX("IF1 ADC2 IN1 Mux", SND_SOC_NOPM, 0, 0,
1821                          &rt5670_if1_adc2_in1_mux),
1822         SND_SOC_DAPM_MUX("VAD ADC Mux", SND_SOC_NOPM, 0, 0,
1823                          &rt5670_vad_adc_mux),
1824
1825         /* Audio Interface */
1826         SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
1827         SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0),
1828         SND_SOC_DAPM_AIF_IN("AIF2RX", "AIF2 Playback", 0, SND_SOC_NOPM, 0, 0),
1829         SND_SOC_DAPM_AIF_OUT("AIF2TX", "AIF2 Capture", 0,
1830                              RT5670_GPIO_CTRL1, RT5670_I2S2_PIN_SFT, 1),
1831
1832         /* Audio DSP */
1833         SND_SOC_DAPM_PGA("Audio DSP", SND_SOC_NOPM, 0, 0, NULL, 0),
1834
1835         /* Output Side */
1836         /* DAC mixer before sound effect  */
1837         SND_SOC_DAPM_MIXER("DAC1 MIXL", SND_SOC_NOPM, 0, 0,
1838                            rt5670_dac_l_mix, ARRAY_SIZE(rt5670_dac_l_mix)),
1839         SND_SOC_DAPM_MIXER("DAC1 MIXR", SND_SOC_NOPM, 0, 0,
1840                            rt5670_dac_r_mix, ARRAY_SIZE(rt5670_dac_r_mix)),
1841         SND_SOC_DAPM_PGA("DAC MIX", SND_SOC_NOPM, 0, 0, NULL, 0),
1842
1843         /* DAC2 channel Mux */
1844         SND_SOC_DAPM_MUX("DAC L2 Mux", SND_SOC_NOPM, 0, 0,
1845                          &rt5670_dac_l2_mux),
1846         SND_SOC_DAPM_MUX("DAC R2 Mux", SND_SOC_NOPM, 0, 0,
1847                          &rt5670_dac_r2_mux),
1848         SND_SOC_DAPM_PGA("DAC L2 Volume", RT5670_PWR_DIG1,
1849                          RT5670_PWR_DAC_L2_BIT, 0, NULL, 0),
1850         SND_SOC_DAPM_PGA("DAC R2 Volume", RT5670_PWR_DIG1,
1851                          RT5670_PWR_DAC_R2_BIT, 0, NULL, 0),
1852
1853         SND_SOC_DAPM_MUX("DAC1 L Mux", SND_SOC_NOPM, 0, 0, &rt5670_dac1l_mux),
1854         SND_SOC_DAPM_MUX("DAC1 R Mux", SND_SOC_NOPM, 0, 0, &rt5670_dac1r_mux),
1855
1856         /* DAC Mixer */
1857         SND_SOC_DAPM_SUPPLY("DAC Stereo1 Filter", RT5670_PWR_DIG2,
1858                             RT5670_PWR_DAC_S1F_BIT, 0, NULL, 0),
1859         SND_SOC_DAPM_SUPPLY("DAC Mono Left Filter", RT5670_PWR_DIG2,
1860                             RT5670_PWR_DAC_MF_L_BIT, 0, NULL, 0),
1861         SND_SOC_DAPM_SUPPLY("DAC Mono Right Filter", RT5670_PWR_DIG2,
1862                             RT5670_PWR_DAC_MF_R_BIT, 0, NULL, 0),
1863         SND_SOC_DAPM_MIXER("Stereo DAC MIXL", SND_SOC_NOPM, 0, 0,
1864                            rt5670_sto_dac_l_mix,
1865                            ARRAY_SIZE(rt5670_sto_dac_l_mix)),
1866         SND_SOC_DAPM_MIXER("Stereo DAC MIXR", SND_SOC_NOPM, 0, 0,
1867                            rt5670_sto_dac_r_mix,
1868                            ARRAY_SIZE(rt5670_sto_dac_r_mix)),
1869         SND_SOC_DAPM_MIXER("Mono DAC MIXL", SND_SOC_NOPM, 0, 0,
1870                            rt5670_mono_dac_l_mix,
1871                            ARRAY_SIZE(rt5670_mono_dac_l_mix)),
1872         SND_SOC_DAPM_MIXER("Mono DAC MIXR", SND_SOC_NOPM, 0, 0,
1873                            rt5670_mono_dac_r_mix,
1874                            ARRAY_SIZE(rt5670_mono_dac_r_mix)),
1875         SND_SOC_DAPM_MIXER("DAC MIXL", SND_SOC_NOPM, 0, 0,
1876                            rt5670_dig_l_mix,
1877                            ARRAY_SIZE(rt5670_dig_l_mix)),
1878         SND_SOC_DAPM_MIXER("DAC MIXR", SND_SOC_NOPM, 0, 0,
1879                            rt5670_dig_r_mix,
1880                            ARRAY_SIZE(rt5670_dig_r_mix)),
1881
1882         /* DACs */
1883         SND_SOC_DAPM_SUPPLY("DAC L1 Power", RT5670_PWR_DIG1,
1884                             RT5670_PWR_DAC_L1_BIT, 0, NULL, 0),
1885         SND_SOC_DAPM_SUPPLY("DAC R1 Power", RT5670_PWR_DIG1,
1886                             RT5670_PWR_DAC_R1_BIT, 0, NULL, 0),
1887         SND_SOC_DAPM_DAC("DAC L1", NULL, SND_SOC_NOPM, 0, 0),
1888         SND_SOC_DAPM_DAC("DAC R1", NULL, SND_SOC_NOPM, 0, 0),
1889         SND_SOC_DAPM_DAC("DAC L2", NULL, RT5670_PWR_DIG1,
1890                          RT5670_PWR_DAC_L2_BIT, 0),
1891
1892         SND_SOC_DAPM_DAC("DAC R2", NULL, RT5670_PWR_DIG1,
1893                          RT5670_PWR_DAC_R2_BIT, 0),
1894         /* OUT Mixer */
1895
1896         SND_SOC_DAPM_MIXER("OUT MIXL", RT5670_PWR_MIXER, RT5670_PWR_OM_L_BIT,
1897                            0, rt5670_out_l_mix, ARRAY_SIZE(rt5670_out_l_mix)),
1898         SND_SOC_DAPM_MIXER("OUT MIXR", RT5670_PWR_MIXER, RT5670_PWR_OM_R_BIT,
1899                            0, rt5670_out_r_mix, ARRAY_SIZE(rt5670_out_r_mix)),
1900         /* Ouput Volume */
1901         SND_SOC_DAPM_MIXER("HPOVOL MIXL", RT5670_PWR_VOL,
1902                            RT5670_PWR_HV_L_BIT, 0,
1903                            rt5670_hpvoll_mix, ARRAY_SIZE(rt5670_hpvoll_mix)),
1904         SND_SOC_DAPM_MIXER("HPOVOL MIXR", RT5670_PWR_VOL,
1905                            RT5670_PWR_HV_R_BIT, 0,
1906                            rt5670_hpvolr_mix, ARRAY_SIZE(rt5670_hpvolr_mix)),
1907         SND_SOC_DAPM_PGA("DAC 1", SND_SOC_NOPM, 0, 0, NULL, 0),
1908         SND_SOC_DAPM_PGA("DAC 2", SND_SOC_NOPM, 0, 0, NULL, 0),
1909         SND_SOC_DAPM_PGA("HPOVOL", SND_SOC_NOPM, 0, 0, NULL, 0),
1910
1911         /* HPO/LOUT/Mono Mixer */
1912         SND_SOC_DAPM_MIXER("HPO MIX", SND_SOC_NOPM, 0, 0,
1913                            rt5670_hpo_mix, ARRAY_SIZE(rt5670_hpo_mix)),
1914         SND_SOC_DAPM_MIXER("LOUT MIX", RT5670_PWR_ANLG1, RT5670_PWR_LM_BIT,
1915                            0, rt5670_lout_mix, ARRAY_SIZE(rt5670_lout_mix)),
1916         SND_SOC_DAPM_SUPPLY_S("Improve HP Amp Drv", 1, SND_SOC_NOPM, 0, 0,
1917                               rt5670_hp_power_event, SND_SOC_DAPM_POST_PMU |
1918                               SND_SOC_DAPM_PRE_PMD),
1919         SND_SOC_DAPM_SUPPLY("HP L Amp", RT5670_PWR_ANLG1,
1920                             RT5670_PWR_HP_L_BIT, 0, NULL, 0),
1921         SND_SOC_DAPM_SUPPLY("HP R Amp", RT5670_PWR_ANLG1,
1922                             RT5670_PWR_HP_R_BIT, 0, NULL, 0),
1923         SND_SOC_DAPM_PGA_S("HP Amp", 1, SND_SOC_NOPM, 0, 0,
1924                            rt5670_hp_event, SND_SOC_DAPM_PRE_PMD |
1925                            SND_SOC_DAPM_POST_PMU),
1926         SND_SOC_DAPM_SWITCH("LOUT L Playback", SND_SOC_NOPM, 0, 0,
1927                             &lout_l_enable_control),
1928         SND_SOC_DAPM_SWITCH("LOUT R Playback", SND_SOC_NOPM, 0, 0,
1929                             &lout_r_enable_control),
1930         SND_SOC_DAPM_PGA("LOUT Amp", SND_SOC_NOPM, 0, 0, NULL, 0),
1931
1932         /* PDM */
1933         SND_SOC_DAPM_SUPPLY("PDM1 Power", RT5670_PWR_DIG2,
1934                 RT5670_PWR_PDM1_BIT, 0, NULL, 0),
1935
1936         SND_SOC_DAPM_MUX("PDM1 L Mux", RT5670_PDM_OUT_CTRL,
1937                          RT5670_M_PDM1_L_SFT, 1, &rt5670_pdm1_l_mux),
1938         SND_SOC_DAPM_MUX("PDM1 R Mux", RT5670_PDM_OUT_CTRL,
1939                          RT5670_M_PDM1_R_SFT, 1, &rt5670_pdm1_r_mux),
1940
1941         /* Output Lines */
1942         SND_SOC_DAPM_OUTPUT("HPOL"),
1943         SND_SOC_DAPM_OUTPUT("HPOR"),
1944         SND_SOC_DAPM_OUTPUT("LOUTL"),
1945         SND_SOC_DAPM_OUTPUT("LOUTR"),
1946 };
1947
1948 static const struct snd_soc_dapm_widget rt5670_specific_dapm_widgets[] = {
1949         SND_SOC_DAPM_SUPPLY("PDM2 Power", RT5670_PWR_DIG2,
1950                 RT5670_PWR_PDM2_BIT, 0, NULL, 0),
1951         SND_SOC_DAPM_MUX("PDM2 L Mux", RT5670_PDM_OUT_CTRL,
1952                          RT5670_M_PDM2_L_SFT, 1, &rt5670_pdm2_l_mux),
1953         SND_SOC_DAPM_MUX("PDM2 R Mux", RT5670_PDM_OUT_CTRL,
1954                          RT5670_M_PDM2_R_SFT, 1, &rt5670_pdm2_r_mux),
1955         SND_SOC_DAPM_OUTPUT("PDM1L"),
1956         SND_SOC_DAPM_OUTPUT("PDM1R"),
1957         SND_SOC_DAPM_OUTPUT("PDM2L"),
1958         SND_SOC_DAPM_OUTPUT("PDM2R"),
1959 };
1960
1961 static const struct snd_soc_dapm_widget rt5672_specific_dapm_widgets[] = {
1962         SND_SOC_DAPM_PGA_E("SPO Amp", SND_SOC_NOPM, 0, 0, NULL, 0,
1963                            rt5670_spk_event, SND_SOC_DAPM_PRE_PMD |
1964                            SND_SOC_DAPM_POST_PMU),
1965         SND_SOC_DAPM_OUTPUT("SPOLP"),
1966         SND_SOC_DAPM_OUTPUT("SPOLN"),
1967         SND_SOC_DAPM_OUTPUT("SPORP"),
1968         SND_SOC_DAPM_OUTPUT("SPORN"),
1969 };
1970
1971 static const struct snd_soc_dapm_route rt5670_dapm_routes[] = {
1972         { "ADC Stereo1 Filter", NULL, "ADC STO1 ASRC", is_using_asrc },
1973         { "ADC Stereo2 Filter", NULL, "ADC STO2 ASRC", is_using_asrc },
1974         { "ADC Mono Left Filter", NULL, "ADC MONO L ASRC", is_using_asrc },
1975         { "ADC Mono Right Filter", NULL, "ADC MONO R ASRC", is_using_asrc },
1976         { "DAC Mono Left Filter", NULL, "DAC MONO L ASRC", is_using_asrc },
1977         { "DAC Mono Right Filter", NULL, "DAC MONO R ASRC", is_using_asrc },
1978         { "DAC Stereo1 Filter", NULL, "DAC STO ASRC", is_using_asrc },
1979         { "Stereo1 DMIC Mux", NULL, "DMIC STO1 ASRC", can_use_asrc },
1980         { "Stereo2 DMIC Mux", NULL, "DMIC STO2 ASRC", can_use_asrc },
1981         { "Mono DMIC L Mux", NULL, "DMIC MONO L ASRC", can_use_asrc },
1982         { "Mono DMIC R Mux", NULL, "DMIC MONO R ASRC", can_use_asrc },
1983
1984         { "I2S1", NULL, "I2S1 ASRC", can_use_asrc},
1985         { "I2S2", NULL, "I2S2 ASRC", can_use_asrc},
1986
1987         { "DMIC1", NULL, "DMIC L1" },
1988         { "DMIC1", NULL, "DMIC R1" },
1989         { "DMIC2", NULL, "DMIC L2" },
1990         { "DMIC2", NULL, "DMIC R2" },
1991         { "DMIC3", NULL, "DMIC L3" },
1992         { "DMIC3", NULL, "DMIC R3" },
1993
1994         { "BST1", NULL, "IN1P" },
1995         { "BST1", NULL, "IN1N" },
1996         { "BST1", NULL, "Mic Det Power" },
1997         { "BST2", NULL, "IN2P" },
1998         { "BST2", NULL, "IN2N" },
1999
2000         { "INL VOL", NULL, "IN2P" },
2001         { "INR VOL", NULL, "IN2N" },
2002
2003         { "RECMIXL", "INL Switch", "INL VOL" },
2004         { "RECMIXL", "BST2 Switch", "BST2" },
2005         { "RECMIXL", "BST1 Switch", "BST1" },
2006
2007         { "RECMIXR", "INR Switch", "INR VOL" },
2008         { "RECMIXR", "BST2 Switch", "BST2" },
2009         { "RECMIXR", "BST1 Switch", "BST1" },
2010
2011         { "ADC 1", NULL, "RECMIXL" },
2012         { "ADC 1", NULL, "ADC 1 power" },
2013         { "ADC 1", NULL, "ADC clock" },
2014         { "ADC 2", NULL, "RECMIXR" },
2015         { "ADC 2", NULL, "ADC 2 power" },
2016         { "ADC 2", NULL, "ADC clock" },
2017
2018         { "DMIC L1", NULL, "DMIC CLK" },
2019         { "DMIC L1", NULL, "DMIC1 Power" },
2020         { "DMIC R1", NULL, "DMIC CLK" },
2021         { "DMIC R1", NULL, "DMIC1 Power" },
2022         { "DMIC L2", NULL, "DMIC CLK" },
2023         { "DMIC L2", NULL, "DMIC2 Power" },
2024         { "DMIC R2", NULL, "DMIC CLK" },
2025         { "DMIC R2", NULL, "DMIC2 Power" },
2026         { "DMIC L3", NULL, "DMIC CLK" },
2027         { "DMIC L3", NULL, "DMIC3 Power" },
2028         { "DMIC R3", NULL, "DMIC CLK" },
2029         { "DMIC R3", NULL, "DMIC3 Power" },
2030
2031         { "Stereo1 DMIC Mux", "DMIC1", "DMIC1" },
2032         { "Stereo1 DMIC Mux", "DMIC2", "DMIC2" },
2033         { "Stereo1 DMIC Mux", "DMIC3", "DMIC3" },
2034
2035         { "Stereo2 DMIC Mux", "DMIC1", "DMIC1" },
2036         { "Stereo2 DMIC Mux", "DMIC2", "DMIC2" },
2037         { "Stereo2 DMIC Mux", "DMIC3", "DMIC3" },
2038
2039         { "Mono DMIC L Mux", "DMIC1", "DMIC L1" },
2040         { "Mono DMIC L Mux", "DMIC2", "DMIC L2" },
2041         { "Mono DMIC L Mux", "DMIC3", "DMIC L3" },
2042
2043         { "Mono DMIC R Mux", "DMIC1", "DMIC R1" },
2044         { "Mono DMIC R Mux", "DMIC2", "DMIC R2" },
2045         { "Mono DMIC R Mux", "DMIC3", "DMIC R3" },
2046
2047         { "ADC 1_2", NULL, "ADC 1" },
2048         { "ADC 1_2", NULL, "ADC 2" },
2049
2050         { "Stereo1 ADC L2 Mux", "DMIC", "Stereo1 DMIC Mux" },
2051         { "Stereo1 ADC L2 Mux", "DAC MIX", "DAC MIXL" },
2052         { "Stereo1 ADC L1 Mux", "ADC", "ADC 1_2" },
2053         { "Stereo1 ADC L1 Mux", "DAC MIX", "DAC MIXL" },
2054
2055         { "Stereo1 ADC R1 Mux", "ADC", "ADC 1_2" },
2056         { "Stereo1 ADC R1 Mux", "DAC MIX", "DAC MIXR" },
2057         { "Stereo1 ADC R2 Mux", "DMIC", "Stereo1 DMIC Mux" },
2058         { "Stereo1 ADC R2 Mux", "DAC MIX", "DAC MIXR" },
2059
2060         { "Mono ADC L2 Mux", "DMIC", "Mono DMIC L Mux" },
2061         { "Mono ADC L2 Mux", "Mono DAC MIXL", "Mono DAC MIXL" },
2062         { "Mono ADC L1 Mux", "Mono DAC MIXL", "Mono DAC MIXL" },
2063         { "Mono ADC L1 Mux", "ADC1",  "ADC 1" },
2064
2065         { "Mono ADC R1 Mux", "Mono DAC MIXR", "Mono DAC MIXR" },
2066         { "Mono ADC R1 Mux", "ADC2", "ADC 2" },
2067         { "Mono ADC R2 Mux", "DMIC", "Mono DMIC R Mux" },
2068         { "Mono ADC R2 Mux", "Mono DAC MIXR", "Mono DAC MIXR" },
2069
2070         { "Sto1 ADC MIXL", "ADC1 Switch", "Stereo1 ADC L1 Mux" },
2071         { "Sto1 ADC MIXL", "ADC2 Switch", "Stereo1 ADC L2 Mux" },
2072         { "Sto1 ADC MIXR", "ADC1 Switch", "Stereo1 ADC R1 Mux" },
2073         { "Sto1 ADC MIXR", "ADC2 Switch", "Stereo1 ADC R2 Mux" },
2074
2075         { "Stereo1 ADC MIXL", NULL, "Sto1 ADC MIXL" },
2076         { "Stereo1 ADC MIXL", NULL, "ADC Stereo1 Filter" },
2077
2078         { "Stereo1 ADC MIXR", NULL, "Sto1 ADC MIXR" },
2079         { "Stereo1 ADC MIXR", NULL, "ADC Stereo1 Filter" },
2080         { "ADC Stereo1 Filter", NULL, "PLL1", is_sys_clk_from_pll },
2081
2082         { "Mono ADC MIXL", "ADC1 Switch", "Mono ADC L1 Mux" },
2083         { "Mono ADC MIXL", "ADC2 Switch", "Mono ADC L2 Mux" },
2084         { "Mono ADC MIXL", NULL, "ADC Mono Left Filter" },
2085         { "ADC Mono Left Filter", NULL, "PLL1", is_sys_clk_from_pll },
2086
2087         { "Mono ADC MIXR", "ADC1 Switch", "Mono ADC R1 Mux" },
2088         { "Mono ADC MIXR", "ADC2 Switch", "Mono ADC R2 Mux" },
2089         { "Mono ADC MIXR", NULL, "ADC Mono Right Filter" },
2090         { "ADC Mono Right Filter", NULL, "PLL1", is_sys_clk_from_pll },
2091
2092         { "Stereo2 ADC L2 Mux", "DMIC", "Stereo2 DMIC Mux" },
2093         { "Stereo2 ADC L2 Mux", "DAC MIX", "DAC MIXL" },
2094         { "Stereo2 ADC L1 Mux", "ADC", "ADC 1_2" },
2095         { "Stereo2 ADC L1 Mux", "DAC MIX", "DAC MIXL" },
2096
2097         { "Stereo2 ADC R1 Mux", "ADC", "ADC 1_2" },
2098         { "Stereo2 ADC R1 Mux", "DAC MIX", "DAC MIXR" },
2099         { "Stereo2 ADC R2 Mux", "DMIC", "Stereo2 DMIC Mux" },
2100         { "Stereo2 ADC R2 Mux", "DAC MIX", "DAC MIXR" },
2101
2102         { "Sto2 ADC MIXL", "ADC1 Switch", "Stereo2 ADC L1 Mux" },
2103         { "Sto2 ADC MIXL", "ADC2 Switch", "Stereo2 ADC L2 Mux" },
2104         { "Sto2 ADC MIXR", "ADC1 Switch", "Stereo2 ADC R1 Mux" },
2105         { "Sto2 ADC MIXR", "ADC2 Switch", "Stereo2 ADC R2 Mux" },
2106
2107         { "Sto2 ADC LR MIX", NULL, "Sto2 ADC MIXL" },
2108         { "Sto2 ADC LR MIX", NULL, "Sto2 ADC MIXR" },
2109
2110         { "Stereo2 ADC LR Mux", "L", "Sto2 ADC MIXL" },
2111         { "Stereo2 ADC LR Mux", "LR", "Sto2 ADC LR MIX" },
2112
2113         { "Stereo2 ADC MIXL", NULL, "Stereo2 ADC LR Mux" },
2114         { "Stereo2 ADC MIXL", NULL, "ADC Stereo2 Filter" },
2115
2116         { "Stereo2 ADC MIXR", NULL, "Sto2 ADC MIXR" },
2117         { "Stereo2 ADC MIXR", NULL, "ADC Stereo2 Filter" },
2118         { "ADC Stereo2 Filter", NULL, "PLL1", is_sys_clk_from_pll },
2119
2120         { "VAD ADC Mux", "Sto1 ADC L", "Stereo1 ADC MIXL" },
2121         { "VAD ADC Mux", "Mono ADC L", "Mono ADC MIXL" },
2122         { "VAD ADC Mux", "Mono ADC R", "Mono ADC MIXR" },
2123         { "VAD ADC Mux", "Sto2 ADC L", "Sto2 ADC MIXL" },
2124
2125         { "VAD_ADC", NULL, "VAD ADC Mux" },
2126
2127         { "IF_ADC1", NULL, "Stereo1 ADC MIXL" },
2128         { "IF_ADC1", NULL, "Stereo1 ADC MIXR" },
2129         { "IF_ADC2", NULL, "Mono ADC MIXL" },
2130         { "IF_ADC2", NULL, "Mono ADC MIXR" },
2131         { "IF_ADC3", NULL, "Stereo2 ADC MIXL" },
2132         { "IF_ADC3", NULL, "Stereo2 ADC MIXR" },
2133
2134         { "IF1 ADC1 IN1 Mux", "IF_ADC1", "IF_ADC1" },
2135         { "IF1 ADC1 IN1 Mux", "IF1_ADC3", "IF1_ADC3" },
2136
2137         { "IF1 ADC1 IN2 Mux", "IF1_ADC1_IN1", "IF1 ADC1 IN1 Mux" },
2138         { "IF1 ADC1 IN2 Mux", "IF1_ADC4", "TxDP_ADC" },
2139
2140         { "IF1 ADC2 IN Mux", "IF_ADC2", "IF_ADC2" },
2141         { "IF1 ADC2 IN Mux", "VAD_ADC", "VAD_ADC" },
2142
2143         { "IF1 ADC2 IN1 Mux", "IF1_ADC2_IN", "IF1 ADC2 IN Mux" },
2144         { "IF1 ADC2 IN1 Mux", "IF1_ADC4", "TxDP_ADC" },
2145
2146         { "IF1_ADC1" , NULL, "IF1 ADC1 IN2 Mux" },
2147         { "IF1_ADC2" , NULL, "IF1 ADC2 IN1 Mux" },
2148
2149         { "Stereo1 ADC MIX", NULL, "Stereo1 ADC MIXL" },
2150         { "Stereo1 ADC MIX", NULL, "Stereo1 ADC MIXR" },
2151         { "Stereo2 ADC MIX", NULL, "Sto2 ADC MIXL" },
2152         { "Stereo2 ADC MIX", NULL, "Sto2 ADC MIXR" },
2153         { "Mono ADC MIX", NULL, "Mono ADC MIXL" },
2154         { "Mono ADC MIX", NULL, "Mono ADC MIXR" },
2155
2156         { "RxDP Mux", "IF2 DAC", "IF2 DAC" },
2157         { "RxDP Mux", "IF1 DAC", "IF1 DAC2" },
2158         { "RxDP Mux", "STO1 ADC Mixer", "Stereo1 ADC MIX" },
2159         { "RxDP Mux", "STO2 ADC Mixer", "Stereo2 ADC MIX" },
2160         { "RxDP Mux", "Mono ADC Mixer L", "Mono ADC MIXL" },
2161         { "RxDP Mux", "Mono ADC Mixer R", "Mono ADC MIXR" },
2162         { "RxDP Mux", "DAC1", "DAC MIX" },
2163
2164         { "TDM Data Mux", "Slot 0-1", "Stereo1 ADC MIX" },
2165         { "TDM Data Mux", "Slot 2-3", "Mono ADC MIX" },
2166         { "TDM Data Mux", "Slot 4-5", "Stereo2 ADC MIX" },
2167         { "TDM Data Mux", "Slot 6-7", "IF2 DAC" },
2168
2169         { "DSP UL Mux", "Bypass", "TDM Data Mux" },
2170         { "DSP UL Mux", NULL, "I2S DSP" },
2171         { "DSP DL Mux", "Bypass", "RxDP Mux" },
2172         { "DSP DL Mux", NULL, "I2S DSP" },
2173
2174         { "TxDP_ADC_L", NULL, "DSP UL Mux" },
2175         { "TxDP_ADC_R", NULL, "DSP UL Mux" },
2176         { "TxDC_DAC", NULL, "DSP DL Mux" },
2177
2178         { "TxDP_ADC", NULL, "TxDP_ADC_L" },
2179         { "TxDP_ADC", NULL, "TxDP_ADC_R" },
2180
2181         { "IF1 ADC", NULL, "I2S1" },
2182         { "IF1 ADC", NULL, "IF1_ADC1" },
2183         { "IF1 ADC", NULL, "IF1_ADC2" },
2184         { "IF1 ADC", NULL, "IF_ADC3" },
2185         { "IF1 ADC", NULL, "TxDP_ADC" },
2186
2187         { "IF2 ADC Mux", "IF_ADC1", "IF_ADC1" },
2188         { "IF2 ADC Mux", "IF_ADC2", "IF_ADC2" },
2189         { "IF2 ADC Mux", "IF_ADC3", "IF_ADC3" },
2190         { "IF2 ADC Mux", "TxDC_DAC", "TxDC_DAC" },
2191         { "IF2 ADC Mux", "TxDP_ADC", "TxDP_ADC" },
2192         { "IF2 ADC Mux", "VAD_ADC", "VAD_ADC" },
2193
2194         { "IF2 ADC L", NULL, "IF2 ADC Mux" },
2195         { "IF2 ADC R", NULL, "IF2 ADC Mux" },
2196
2197         { "IF2 ADC", NULL, "I2S2" },
2198         { "IF2 ADC", NULL, "IF2 ADC L" },
2199         { "IF2 ADC", NULL, "IF2 ADC R" },
2200
2201         { "AIF1TX", NULL, "IF1 ADC" },
2202         { "AIF2TX", NULL, "IF2 ADC" },
2203
2204         { "IF1 DAC1", NULL, "AIF1RX" },
2205         { "IF1 DAC2", NULL, "AIF1RX" },
2206         { "IF2 DAC", NULL, "AIF2RX" },
2207
2208         { "IF1 DAC1", NULL, "I2S1" },
2209         { "IF1 DAC2", NULL, "I2S1" },
2210         { "IF2 DAC", NULL, "I2S2" },
2211
2212         { "IF1 DAC2 L", NULL, "IF1 DAC2" },
2213         { "IF1 DAC2 R", NULL, "IF1 DAC2" },
2214         { "IF1 DAC1 L", NULL, "IF1 DAC1" },
2215         { "IF1 DAC1 R", NULL, "IF1 DAC1" },
2216         { "IF2 DAC L", NULL, "IF2 DAC" },
2217         { "IF2 DAC R", NULL, "IF2 DAC" },
2218
2219         { "DAC1 L Mux", "IF1 DAC", "IF1 DAC1 L" },
2220         { "DAC1 L Mux", "IF2 DAC", "IF2 DAC L" },
2221
2222         { "DAC1 R Mux", "IF1 DAC", "IF1 DAC1 R" },
2223         { "DAC1 R Mux", "IF2 DAC", "IF2 DAC R" },
2224
2225         { "DAC1 MIXL", "Stereo ADC Switch", "Stereo1 ADC MIXL" },
2226         { "DAC1 MIXL", "DAC1 Switch", "DAC1 L Mux" },
2227         { "DAC1 MIXL", NULL, "DAC Stereo1 Filter" },
2228         { "DAC1 MIXR", "Stereo ADC Switch", "Stereo1 ADC MIXR" },
2229         { "DAC1 MIXR", "DAC1 Switch", "DAC1 R Mux" },
2230         { "DAC1 MIXR", NULL, "DAC Stereo1 Filter" },
2231
2232         { "DAC Stereo1 Filter", NULL, "PLL1", is_sys_clk_from_pll },
2233         { "DAC Mono Left Filter", NULL, "PLL1", is_sys_clk_from_pll },
2234         { "DAC Mono Right Filter", NULL, "PLL1", is_sys_clk_from_pll },
2235
2236         { "DAC MIX", NULL, "DAC1 MIXL" },
2237         { "DAC MIX", NULL, "DAC1 MIXR" },
2238
2239         { "Audio DSP", NULL, "DAC1 MIXL" },
2240         { "Audio DSP", NULL, "DAC1 MIXR" },
2241
2242         { "DAC L2 Mux", "IF1 DAC", "IF1 DAC2 L" },
2243         { "DAC L2 Mux", "IF2 DAC", "IF2 DAC L" },
2244         { "DAC L2 Mux", "TxDC DAC", "TxDC_DAC" },
2245         { "DAC L2 Mux", "VAD_ADC", "VAD_ADC" },
2246         { "DAC L2 Volume", NULL, "DAC L2 Mux" },
2247         { "DAC L2 Volume", NULL, "DAC Mono Left Filter" },
2248
2249         { "DAC R2 Mux", "IF1 DAC", "IF1 DAC2 R" },
2250         { "DAC R2 Mux", "IF2 DAC", "IF2 DAC R" },
2251         { "DAC R2 Mux", "TxDC DAC", "TxDC_DAC" },
2252         { "DAC R2 Mux", "TxDP ADC", "TxDP_ADC" },
2253         { "DAC R2 Volume", NULL, "DAC R2 Mux" },
2254         { "DAC R2 Volume", NULL, "DAC Mono Right Filter" },
2255
2256         { "Stereo DAC MIXL", "DAC L1 Switch", "DAC1 MIXL" },
2257         { "Stereo DAC MIXL", "DAC R1 Switch", "DAC1 MIXR" },
2258         { "Stereo DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" },
2259         { "Stereo DAC MIXL", NULL, "DAC Stereo1 Filter" },
2260         { "Stereo DAC MIXL", NULL, "DAC L1 Power" },
2261         { "Stereo DAC MIXR", "DAC R1 Switch", "DAC1 MIXR" },
2262         { "Stereo DAC MIXR", "DAC L1 Switch", "DAC1 MIXL" },
2263         { "Stereo DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" },
2264         { "Stereo DAC MIXR", NULL, "DAC Stereo1 Filter" },
2265         { "Stereo DAC MIXR", NULL, "DAC R1 Power" },
2266
2267         { "Mono DAC MIXL", "DAC L1 Switch", "DAC1 MIXL" },
2268         { "Mono DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" },
2269         { "Mono DAC MIXL", "DAC R2 Switch", "DAC R2 Volume" },
2270         { "Mono DAC MIXL", NULL, "DAC Mono Left Filter" },
2271         { "Mono DAC MIXR", "DAC R1 Switch", "DAC1 MIXR" },
2272         { "Mono DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" },
2273         { "Mono DAC MIXR", "DAC L2 Switch", "DAC L2 Volume" },
2274         { "Mono DAC MIXR", NULL, "DAC Mono Right Filter" },
2275
2276         { "DAC MIXL", "Sto DAC Mix L Switch", "Stereo DAC MIXL" },
2277         { "DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" },
2278         { "DAC MIXL", "DAC R2 Switch", "DAC R2 Volume" },
2279         { "DAC MIXR", "Sto DAC Mix R Switch", "Stereo DAC MIXR" },
2280         { "DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" },
2281         { "DAC MIXR", "DAC L2 Switch", "DAC L2 Volume" },
2282
2283         { "DAC L1", NULL, "DAC L1 Power" },
2284         { "DAC L1", NULL, "Stereo DAC MIXL" },
2285         { "DAC R1", NULL, "DAC R1 Power" },
2286         { "DAC R1", NULL, "Stereo DAC MIXR" },
2287         { "DAC L2", NULL, "Mono DAC MIXL" },
2288         { "DAC R2", NULL, "Mono DAC MIXR" },
2289
2290         { "OUT MIXL", "BST1 Switch", "BST1" },
2291         { "OUT MIXL", "INL Switch", "INL VOL" },
2292         { "OUT MIXL", "DAC L2 Switch", "DAC L2" },
2293         { "OUT MIXL", "DAC L1 Switch", "DAC L1" },
2294
2295         { "OUT MIXR", "BST2 Switch", "BST2" },
2296         { "OUT MIXR", "INR Switch", "INR VOL" },
2297         { "OUT MIXR", "DAC R2 Switch", "DAC R2" },
2298         { "OUT MIXR", "DAC R1 Switch", "DAC R1" },
2299
2300         { "HPOVOL MIXL", "DAC1 Switch", "DAC L1" },
2301         { "HPOVOL MIXL", "INL Switch", "INL VOL" },
2302         { "HPOVOL MIXR", "DAC1 Switch", "DAC R1" },
2303         { "HPOVOL MIXR", "INR Switch", "INR VOL" },
2304
2305         { "DAC 2", NULL, "DAC L2" },
2306         { "DAC 2", NULL, "DAC R2" },
2307         { "DAC 1", NULL, "DAC L1" },
2308         { "DAC 1", NULL, "DAC R1" },
2309         { "HPOVOL", NULL, "HPOVOL MIXL" },
2310         { "HPOVOL", NULL, "HPOVOL MIXR" },
2311         { "HPO MIX", "DAC1 Switch", "DAC 1" },
2312         { "HPO MIX", "HPVOL Switch", "HPOVOL" },
2313
2314         { "LOUT MIX", "DAC L1 Switch", "DAC L1" },
2315         { "LOUT MIX", "DAC R1 Switch", "DAC R1" },
2316         { "LOUT MIX", "OUTMIX L Switch", "OUT MIXL" },
2317         { "LOUT MIX", "OUTMIX R Switch", "OUT MIXR" },
2318
2319         { "PDM1 L Mux", "Stereo DAC", "Stereo DAC MIXL" },
2320         { "PDM1 L Mux", "Mono DAC", "Mono DAC MIXL" },
2321         { "PDM1 L Mux", NULL, "PDM1 Power" },
2322         { "PDM1 R Mux", "Stereo DAC", "Stereo DAC MIXR" },
2323         { "PDM1 R Mux", "Mono DAC", "Mono DAC MIXR" },
2324         { "PDM1 R Mux", NULL, "PDM1 Power" },
2325
2326         { "HP Amp", NULL, "HPO MIX" },
2327         { "HP Amp", NULL, "Mic Det Power" },
2328         { "HPOL", NULL, "HP Amp" },
2329         { "HPOL", NULL, "HP L Amp" },
2330         { "HPOL", NULL, "Improve HP Amp Drv" },
2331         { "HPOR", NULL, "HP Amp" },
2332         { "HPOR", NULL, "HP R Amp" },
2333         { "HPOR", NULL, "Improve HP Amp Drv" },
2334
2335         { "LOUT Amp", NULL, "LOUT MIX" },
2336         { "LOUT L Playback", "Switch", "LOUT Amp" },
2337         { "LOUT R Playback", "Switch", "LOUT Amp" },
2338         { "LOUTL", NULL, "LOUT L Playback" },
2339         { "LOUTR", NULL, "LOUT R Playback" },
2340         { "LOUTL", NULL, "Improve HP Amp Drv" },
2341         { "LOUTR", NULL, "Improve HP Amp Drv" },
2342 };
2343
2344 static const struct snd_soc_dapm_route rt5670_specific_dapm_routes[] = {
2345         { "PDM2 L Mux", "Stereo DAC", "Stereo DAC MIXL" },
2346         { "PDM2 L Mux", "Mono DAC", "Mono DAC MIXL" },
2347         { "PDM2 L Mux", NULL, "PDM2 Power" },
2348         { "PDM2 R Mux", "Stereo DAC", "Stereo DAC MIXR" },
2349         { "PDM2 R Mux", "Mono DAC", "Mono DAC MIXR" },
2350         { "PDM2 R Mux", NULL, "PDM2 Power" },
2351         { "PDM1L", NULL, "PDM1 L Mux" },
2352         { "PDM1R", NULL, "PDM1 R Mux" },
2353         { "PDM2L", NULL, "PDM2 L Mux" },
2354         { "PDM2R", NULL, "PDM2 R Mux" },
2355 };
2356
2357 static const struct snd_soc_dapm_route rt5672_specific_dapm_routes[] = {
2358         { "SPO Amp", NULL, "PDM1 L Mux" },
2359         { "SPO Amp", NULL, "PDM1 R Mux" },
2360         { "SPOLP", NULL, "SPO Amp" },
2361         { "SPOLN", NULL, "SPO Amp" },
2362         { "SPORP", NULL, "SPO Amp" },
2363         { "SPORN", NULL, "SPO Amp" },
2364 };
2365
2366 static int rt5670_hw_params(struct snd_pcm_substream *substream,
2367         struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
2368 {
2369         struct snd_soc_component *component = dai->component;
2370         struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component);
2371         unsigned int val_len = 0, val_clk, mask_clk;
2372         int pre_div, bclk_ms, frame_size;
2373
2374         rt5670->lrck[dai->id] = params_rate(params);
2375         pre_div = rl6231_get_clk_info(rt5670->sysclk, rt5670->lrck[dai->id]);
2376         if (pre_div < 0) {
2377                 dev_err(component->dev, "Unsupported clock setting %d for DAI %d\n",
2378                         rt5670->lrck[dai->id], dai->id);
2379                 return -EINVAL;
2380         }
2381         frame_size = snd_soc_params_to_frame_size(params);
2382         if (frame_size < 0) {
2383                 dev_err(component->dev, "Unsupported frame size: %d\n", frame_size);
2384                 return -EINVAL;
2385         }
2386         bclk_ms = frame_size > 32;
2387         rt5670->bclk[dai->id] = rt5670->lrck[dai->id] * (32 << bclk_ms);
2388
2389         dev_dbg(dai->dev, "bclk is %dHz and lrck is %dHz\n",
2390                 rt5670->bclk[dai->id], rt5670->lrck[dai->id]);
2391         dev_dbg(dai->dev, "bclk_ms is %d and pre_div is %d for iis %d\n",
2392                                 bclk_ms, pre_div, dai->id);
2393
2394         switch (params_width(params)) {
2395         case 16:
2396                 break;
2397         case 20:
2398                 val_len |= RT5670_I2S_DL_20;
2399                 break;
2400         case 24:
2401                 val_len |= RT5670_I2S_DL_24;
2402                 break;
2403         case 8:
2404                 val_len |= RT5670_I2S_DL_8;
2405                 break;
2406         default:
2407                 return -EINVAL;
2408         }
2409
2410         switch (dai->id) {
2411         case RT5670_AIF1:
2412                 mask_clk = RT5670_I2S_BCLK_MS1_MASK | RT5670_I2S_PD1_MASK;
2413                 val_clk = bclk_ms << RT5670_I2S_BCLK_MS1_SFT |
2414                         pre_div << RT5670_I2S_PD1_SFT;
2415                 snd_soc_component_update_bits(component, RT5670_I2S1_SDP,
2416                         RT5670_I2S_DL_MASK, val_len);
2417                 snd_soc_component_update_bits(component, RT5670_ADDA_CLK1, mask_clk, val_clk);
2418                 break;
2419         case RT5670_AIF2:
2420                 mask_clk = RT5670_I2S_BCLK_MS2_MASK | RT5670_I2S_PD2_MASK;
2421                 val_clk = bclk_ms << RT5670_I2S_BCLK_MS2_SFT |
2422                         pre_div << RT5670_I2S_PD2_SFT;
2423                 snd_soc_component_update_bits(component, RT5670_I2S2_SDP,
2424                         RT5670_I2S_DL_MASK, val_len);
2425                 snd_soc_component_update_bits(component, RT5670_ADDA_CLK1, mask_clk, val_clk);
2426                 break;
2427         default:
2428                 dev_err(component->dev, "Invalid dai->id: %d\n", dai->id);
2429                 return -EINVAL;
2430         }
2431
2432         return 0;
2433 }
2434
2435 static int rt5670_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
2436 {
2437         struct snd_soc_component *component = dai->component;
2438         struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component);
2439         unsigned int reg_val = 0;
2440
2441         switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
2442         case SND_SOC_DAIFMT_CBM_CFM:
2443                 rt5670->master[dai->id] = 1;
2444                 break;
2445         case SND_SOC_DAIFMT_CBS_CFS:
2446                 reg_val |= RT5670_I2S_MS_S;
2447                 rt5670->master[dai->id] = 0;
2448                 break;
2449         default:
2450                 return -EINVAL;
2451         }
2452
2453         switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
2454         case SND_SOC_DAIFMT_NB_NF:
2455                 break;
2456         case SND_SOC_DAIFMT_IB_NF:
2457                 reg_val |= RT5670_I2S_BP_INV;
2458                 break;
2459         default:
2460                 return -EINVAL;
2461         }
2462
2463         switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
2464         case SND_SOC_DAIFMT_I2S:
2465                 break;
2466         case SND_SOC_DAIFMT_LEFT_J:
2467                 reg_val |= RT5670_I2S_DF_LEFT;
2468                 break;
2469         case SND_SOC_DAIFMT_DSP_A:
2470                 reg_val |= RT5670_I2S_DF_PCM_A;
2471                 break;
2472         case SND_SOC_DAIFMT_DSP_B:
2473                 reg_val |= RT5670_I2S_DF_PCM_B;
2474                 break;
2475         default:
2476                 return -EINVAL;
2477         }
2478
2479         switch (dai->id) {
2480         case RT5670_AIF1:
2481                 snd_soc_component_update_bits(component, RT5670_I2S1_SDP,
2482                         RT5670_I2S_MS_MASK | RT5670_I2S_BP_MASK |
2483                         RT5670_I2S_DF_MASK, reg_val);
2484                 break;
2485         case RT5670_AIF2:
2486                 snd_soc_component_update_bits(component, RT5670_I2S2_SDP,
2487                         RT5670_I2S_MS_MASK | RT5670_I2S_BP_MASK |
2488                         RT5670_I2S_DF_MASK, reg_val);
2489                 break;
2490         default:
2491                 dev_err(component->dev, "Invalid dai->id: %d\n", dai->id);
2492                 return -EINVAL;
2493         }
2494         return 0;
2495 }
2496
2497 static int rt5670_set_codec_sysclk(struct snd_soc_component *component, int clk_id,
2498                                    int source, unsigned int freq, int dir)
2499 {
2500         struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component);
2501         unsigned int reg_val = 0;
2502
2503         switch (clk_id) {
2504         case RT5670_SCLK_S_MCLK:
2505                 reg_val |= RT5670_SCLK_SRC_MCLK;
2506                 break;
2507         case RT5670_SCLK_S_PLL1:
2508                 reg_val |= RT5670_SCLK_SRC_PLL1;
2509                 break;
2510         case RT5670_SCLK_S_RCCLK:
2511                 reg_val |= RT5670_SCLK_SRC_RCCLK;
2512                 break;
2513         default:
2514                 dev_err(component->dev, "Invalid clock id (%d)\n", clk_id);
2515                 return -EINVAL;
2516         }
2517         snd_soc_component_update_bits(component, RT5670_GLB_CLK,
2518                 RT5670_SCLK_SRC_MASK, reg_val);
2519         rt5670->sysclk = freq;
2520         if (clk_id != RT5670_SCLK_S_RCCLK)
2521                 rt5670->sysclk_src = clk_id;
2522
2523         dev_dbg(component->dev, "Sysclk : %dHz clock id : %d\n", freq, clk_id);
2524
2525         return 0;
2526 }
2527
2528 static int rt5670_set_dai_pll(struct snd_soc_dai *dai, int pll_id, int source,
2529                         unsigned int freq_in, unsigned int freq_out)
2530 {
2531         struct snd_soc_component *component = dai->component;
2532         struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component);
2533         struct rl6231_pll_code pll_code;
2534         int ret;
2535
2536         if (source == rt5670->pll_src && freq_in == rt5670->pll_in &&
2537             freq_out == rt5670->pll_out)
2538                 return 0;
2539
2540         if (!freq_in || !freq_out) {
2541                 dev_dbg(component->dev, "PLL disabled\n");
2542
2543                 rt5670->pll_in = 0;
2544                 rt5670->pll_out = 0;
2545                 snd_soc_component_update_bits(component, RT5670_GLB_CLK,
2546                         RT5670_SCLK_SRC_MASK, RT5670_SCLK_SRC_MCLK);
2547                 return 0;
2548         }
2549
2550         switch (source) {
2551         case RT5670_PLL1_S_MCLK:
2552                 snd_soc_component_update_bits(component, RT5670_GLB_CLK,
2553                         RT5670_PLL1_SRC_MASK, RT5670_PLL1_SRC_MCLK);
2554                 break;
2555         case RT5670_PLL1_S_BCLK1:
2556         case RT5670_PLL1_S_BCLK2:
2557         case RT5670_PLL1_S_BCLK3:
2558         case RT5670_PLL1_S_BCLK4:
2559                 switch (dai->id) {
2560                 case RT5670_AIF1:
2561                         snd_soc_component_update_bits(component, RT5670_GLB_CLK,
2562                                 RT5670_PLL1_SRC_MASK, RT5670_PLL1_SRC_BCLK1);
2563                         break;
2564                 case RT5670_AIF2:
2565                         snd_soc_component_update_bits(component, RT5670_GLB_CLK,
2566                                 RT5670_PLL1_SRC_MASK, RT5670_PLL1_SRC_BCLK2);
2567                         break;
2568                 default:
2569                         dev_err(component->dev, "Invalid dai->id: %d\n", dai->id);
2570                         return -EINVAL;
2571                 }
2572                 break;
2573         default:
2574                 dev_err(component->dev, "Unknown PLL source %d\n", source);
2575                 return -EINVAL;
2576         }
2577
2578         ret = rl6231_pll_calc(freq_in, freq_out, &pll_code);
2579         if (ret < 0) {
2580                 dev_err(component->dev, "Unsupported input clock %d\n", freq_in);
2581                 return ret;
2582         }
2583
2584         dev_dbg(component->dev, "bypass=%d m=%d n=%d k=%d\n",
2585                 pll_code.m_bp, (pll_code.m_bp ? 0 : pll_code.m_code),
2586                 pll_code.n_code, pll_code.k_code);
2587
2588         snd_soc_component_write(component, RT5670_PLL_CTRL1,
2589                 pll_code.n_code << RT5670_PLL_N_SFT | pll_code.k_code);
2590         snd_soc_component_write(component, RT5670_PLL_CTRL2,
2591                 ((pll_code.m_bp ? 0 : pll_code.m_code) << RT5670_PLL_M_SFT) |
2592                 (pll_code.m_bp << RT5670_PLL_M_BP_SFT));
2593
2594         rt5670->pll_in = freq_in;
2595         rt5670->pll_out = freq_out;
2596         rt5670->pll_src = source;
2597
2598         return 0;
2599 }
2600
2601 static int rt5670_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask,
2602                         unsigned int rx_mask, int slots, int slot_width)
2603 {
2604         struct snd_soc_component *component = dai->component;
2605         unsigned int val = 0;
2606
2607         if (rx_mask || tx_mask)
2608                 val |= (1 << 14);
2609
2610         switch (slots) {
2611         case 4:
2612                 val |= (1 << 12);
2613                 break;
2614         case 6:
2615                 val |= (2 << 12);
2616                 break;
2617         case 8:
2618                 val |= (3 << 12);
2619                 break;
2620         case 2:
2621                 break;
2622         default:
2623                 return -EINVAL;
2624         }
2625
2626         switch (slot_width) {
2627         case 20:
2628                 val |= (1 << 10);
2629                 break;
2630         case 24:
2631                 val |= (2 << 10);
2632                 break;
2633         case 32:
2634                 val |= (3 << 10);
2635                 break;
2636         case 16:
2637                 break;
2638         default:
2639                 return -EINVAL;
2640         }
2641
2642         snd_soc_component_update_bits(component, RT5670_TDM_CTRL_1, 0x7c00, val);
2643
2644         return 0;
2645 }
2646
2647 static int rt5670_set_bclk_ratio(struct snd_soc_dai *dai, unsigned int ratio)
2648 {
2649         struct snd_soc_component *component = dai->component;
2650
2651         dev_dbg(component->dev, "%s ratio=%d\n", __func__, ratio);
2652         if (dai->id != RT5670_AIF1)
2653                 return 0;
2654
2655         if ((ratio % 50) == 0)
2656                 snd_soc_component_update_bits(component, RT5670_GEN_CTRL3,
2657                         RT5670_TDM_DATA_MODE_SEL, RT5670_TDM_DATA_MODE_50FS);
2658         else
2659                 snd_soc_component_update_bits(component, RT5670_GEN_CTRL3,
2660                         RT5670_TDM_DATA_MODE_SEL, RT5670_TDM_DATA_MODE_NOR);
2661
2662         return 0;
2663 }
2664
2665 static int rt5670_set_bias_level(struct snd_soc_component *component,
2666                         enum snd_soc_bias_level level)
2667 {
2668         struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component);
2669
2670         switch (level) {
2671         case SND_SOC_BIAS_PREPARE:
2672                 if (SND_SOC_BIAS_STANDBY == snd_soc_component_get_bias_level(component)) {
2673                         snd_soc_component_update_bits(component, RT5670_PWR_ANLG1,
2674                                 RT5670_PWR_VREF1 | RT5670_PWR_MB |
2675                                 RT5670_PWR_BG | RT5670_PWR_VREF2,
2676                                 RT5670_PWR_VREF1 | RT5670_PWR_MB |
2677                                 RT5670_PWR_BG | RT5670_PWR_VREF2);
2678                         mdelay(10);
2679                         snd_soc_component_update_bits(component, RT5670_PWR_ANLG1,
2680                                 RT5670_PWR_FV1 | RT5670_PWR_FV2,
2681                                 RT5670_PWR_FV1 | RT5670_PWR_FV2);
2682                         snd_soc_component_update_bits(component, RT5670_CHARGE_PUMP,
2683                                 RT5670_OSW_L_MASK | RT5670_OSW_R_MASK,
2684                                 RT5670_OSW_L_DIS | RT5670_OSW_R_DIS);
2685                         snd_soc_component_update_bits(component, RT5670_DIG_MISC, 0x1, 0x1);
2686                         snd_soc_component_update_bits(component, RT5670_PWR_ANLG1,
2687                                 RT5670_LDO_SEL_MASK, 0x5);
2688                 }
2689                 break;
2690         case SND_SOC_BIAS_STANDBY:
2691                 snd_soc_component_update_bits(component, RT5670_PWR_ANLG1,
2692                                 RT5670_PWR_VREF1 | RT5670_PWR_VREF2 |
2693                                 RT5670_PWR_FV1 | RT5670_PWR_FV2, 0);
2694                 snd_soc_component_update_bits(component, RT5670_PWR_ANLG1,
2695                                 RT5670_LDO_SEL_MASK, 0x3);
2696                 break;
2697         case SND_SOC_BIAS_OFF:
2698                 if (rt5670->jd_mode)
2699                         snd_soc_component_update_bits(component, RT5670_PWR_ANLG1,
2700                                 RT5670_PWR_VREF1 | RT5670_PWR_MB |
2701                                 RT5670_PWR_BG | RT5670_PWR_VREF2 |
2702                                 RT5670_PWR_FV1 | RT5670_PWR_FV2,
2703                                 RT5670_PWR_MB | RT5670_PWR_BG);
2704                 else
2705                         snd_soc_component_update_bits(component, RT5670_PWR_ANLG1,
2706                                 RT5670_PWR_VREF1 | RT5670_PWR_MB |
2707                                 RT5670_PWR_BG | RT5670_PWR_VREF2 |
2708                                 RT5670_PWR_FV1 | RT5670_PWR_FV2, 0);
2709
2710                 snd_soc_component_update_bits(component, RT5670_DIG_MISC, 0x1, 0x0);
2711                 break;
2712
2713         default:
2714                 break;
2715         }
2716
2717         return 0;
2718 }
2719
2720 static int rt5670_probe(struct snd_soc_component *component)
2721 {
2722         struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
2723         struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component);
2724
2725         switch (snd_soc_component_read(component, RT5670_RESET) & RT5670_ID_MASK) {
2726         case RT5670_ID_5670:
2727         case RT5670_ID_5671:
2728                 snd_soc_dapm_new_controls(dapm,
2729                         rt5670_specific_dapm_widgets,
2730                         ARRAY_SIZE(rt5670_specific_dapm_widgets));
2731                 snd_soc_dapm_add_routes(dapm,
2732                         rt5670_specific_dapm_routes,
2733                         ARRAY_SIZE(rt5670_specific_dapm_routes));
2734                 break;
2735         case RT5670_ID_5672:
2736                 snd_soc_dapm_new_controls(dapm,
2737                         rt5672_specific_dapm_widgets,
2738                         ARRAY_SIZE(rt5672_specific_dapm_widgets));
2739                 snd_soc_dapm_add_routes(dapm,
2740                         rt5672_specific_dapm_routes,
2741                         ARRAY_SIZE(rt5672_specific_dapm_routes));
2742                 break;
2743         default:
2744                 dev_err(component->dev,
2745                         "The driver is for RT5670 RT5671 or RT5672 only\n");
2746                 return -ENODEV;
2747         }
2748         rt5670->component = component;
2749
2750         return 0;
2751 }
2752
2753 static void rt5670_remove(struct snd_soc_component *component)
2754 {
2755         struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component);
2756
2757         regmap_write(rt5670->regmap, RT5670_RESET, 0);
2758         snd_soc_jack_free_gpios(rt5670->jack, 1, &rt5670->hp_gpio);
2759 }
2760
2761 #ifdef CONFIG_PM
2762 static int rt5670_suspend(struct snd_soc_component *component)
2763 {
2764         struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component);
2765
2766         regcache_cache_only(rt5670->regmap, true);
2767         regcache_mark_dirty(rt5670->regmap);
2768         return 0;
2769 }
2770
2771 static int rt5670_resume(struct snd_soc_component *component)
2772 {
2773         struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component);
2774
2775         regcache_cache_only(rt5670->regmap, false);
2776         regcache_sync(rt5670->regmap);
2777
2778         return 0;
2779 }
2780 #else
2781 #define rt5670_suspend NULL
2782 #define rt5670_resume NULL
2783 #endif
2784
2785 #define RT5670_STEREO_RATES SNDRV_PCM_RATE_8000_96000
2786 #define RT5670_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
2787                         SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8)
2788
2789 static const struct snd_soc_dai_ops rt5670_aif_dai_ops = {
2790         .hw_params = rt5670_hw_params,
2791         .set_fmt = rt5670_set_dai_fmt,
2792         .set_tdm_slot = rt5670_set_tdm_slot,
2793         .set_pll = rt5670_set_dai_pll,
2794         .set_bclk_ratio = rt5670_set_bclk_ratio,
2795 };
2796
2797 static struct snd_soc_dai_driver rt5670_dai[] = {
2798         {
2799                 .name = "rt5670-aif1",
2800                 .id = RT5670_AIF1,
2801                 .playback = {
2802                         .stream_name = "AIF1 Playback",
2803                         .channels_min = 1,
2804                         .channels_max = 2,
2805                         .rates = RT5670_STEREO_RATES,
2806                         .formats = RT5670_FORMATS,
2807                 },
2808                 .capture = {
2809                         .stream_name = "AIF1 Capture",
2810                         .channels_min = 1,
2811                         .channels_max = 2,
2812                         .rates = RT5670_STEREO_RATES,
2813                         .formats = RT5670_FORMATS,
2814                 },
2815                 .ops = &rt5670_aif_dai_ops,
2816                 .symmetric_rate = 1,
2817         },
2818         {
2819                 .name = "rt5670-aif2",
2820                 .id = RT5670_AIF2,
2821                 .playback = {
2822                         .stream_name = "AIF2 Playback",
2823                         .channels_min = 1,
2824                         .channels_max = 2,
2825                         .rates = RT5670_STEREO_RATES,
2826                         .formats = RT5670_FORMATS,
2827                 },
2828                 .capture = {
2829                         .stream_name = "AIF2 Capture",
2830                         .channels_min = 1,
2831                         .channels_max = 2,
2832                         .rates = RT5670_STEREO_RATES,
2833                         .formats = RT5670_FORMATS,
2834                 },
2835                 .ops = &rt5670_aif_dai_ops,
2836                 .symmetric_rate = 1,
2837         },
2838 };
2839
2840 static const struct snd_soc_component_driver soc_component_dev_rt5670 = {
2841         .probe                  = rt5670_probe,
2842         .remove                 = rt5670_remove,
2843         .suspend                = rt5670_suspend,
2844         .resume                 = rt5670_resume,
2845         .set_bias_level         = rt5670_set_bias_level,
2846         .set_sysclk             = rt5670_set_codec_sysclk,
2847         .controls               = rt5670_snd_controls,
2848         .num_controls           = ARRAY_SIZE(rt5670_snd_controls),
2849         .dapm_widgets           = rt5670_dapm_widgets,
2850         .num_dapm_widgets       = ARRAY_SIZE(rt5670_dapm_widgets),
2851         .dapm_routes            = rt5670_dapm_routes,
2852         .num_dapm_routes        = ARRAY_SIZE(rt5670_dapm_routes),
2853         .use_pmdown_time        = 1,
2854         .endianness             = 1,
2855 };
2856
2857 static const struct regmap_config rt5670_regmap = {
2858         .reg_bits = 8,
2859         .val_bits = 16,
2860         .use_single_read = true,
2861         .use_single_write = true,
2862         .max_register = RT5670_VENDOR_ID2 + 1 + (ARRAY_SIZE(rt5670_ranges) *
2863                                                RT5670_PR_SPACING),
2864         .volatile_reg = rt5670_volatile_register,
2865         .readable_reg = rt5670_readable_register,
2866         .cache_type = REGCACHE_MAPLE,
2867         .reg_defaults = rt5670_reg,
2868         .num_reg_defaults = ARRAY_SIZE(rt5670_reg),
2869         .ranges = rt5670_ranges,
2870         .num_ranges = ARRAY_SIZE(rt5670_ranges),
2871 };
2872
2873 static const struct i2c_device_id rt5670_i2c_id[] = {
2874         { "rt5670", 0 },
2875         { "rt5671", 0 },
2876         { "rt5672", 0 },
2877         { }
2878 };
2879 MODULE_DEVICE_TABLE(i2c, rt5670_i2c_id);
2880
2881 #ifdef CONFIG_ACPI
2882 static const struct acpi_device_id rt5670_acpi_match[] = {
2883         { "10EC5670", 0},
2884         { "10EC5672", 0},
2885         { "10EC5640", 0}, /* quirk */
2886         { },
2887 };
2888 MODULE_DEVICE_TABLE(acpi, rt5670_acpi_match);
2889 #endif
2890
2891 static int rt5670_quirk_cb(const struct dmi_system_id *id)
2892 {
2893         rt5670_quirk = (unsigned long)id->driver_data;
2894         return 1;
2895 }
2896
2897 static const struct dmi_system_id dmi_platform_intel_quirks[] = {
2898         {
2899                 .callback = rt5670_quirk_cb,
2900                 .ident = "Intel Braswell",
2901                 .matches = {
2902                         DMI_MATCH(DMI_SYS_VENDOR, "Intel Corporation"),
2903                         DMI_MATCH(DMI_BOARD_NAME, "Braswell CRB"),
2904                 },
2905                 .driver_data = (unsigned long *)(RT5670_DMIC_EN |
2906                                                  RT5670_DMIC1_IN2P |
2907                                                  RT5670_GPIO1_IS_IRQ |
2908                                                  RT5670_JD_MODE1),
2909         },
2910         {
2911                 .callback = rt5670_quirk_cb,
2912                 .ident = "Dell Wyse 3040",
2913                 .matches = {
2914                         DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
2915                         DMI_MATCH(DMI_PRODUCT_NAME, "Wyse 3040"),
2916                 },
2917                 .driver_data = (unsigned long *)(RT5670_DMIC_EN |
2918                                                  RT5670_DMIC1_IN2P |
2919                                                  RT5670_GPIO1_IS_IRQ |
2920                                                  RT5670_JD_MODE1),
2921         },
2922         {
2923                 .callback = rt5670_quirk_cb,
2924                 .ident = "Lenovo Thinkpad Tablet 8",
2925                 .matches = {
2926                         DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"),
2927                         DMI_MATCH(DMI_PRODUCT_VERSION, "ThinkPad 8"),
2928                 },
2929                 .driver_data = (unsigned long *)(RT5670_DMIC_EN |
2930                                                  RT5670_DMIC2_INR |
2931                                                  RT5670_GPIO1_IS_IRQ |
2932                                                  RT5670_JD_MODE1),
2933         },
2934         {
2935                 .callback = rt5670_quirk_cb,
2936                 .ident = "Lenovo Thinkpad Tablet 10",
2937                 .matches = {
2938                         DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"),
2939                         DMI_MATCH(DMI_PRODUCT_VERSION, "ThinkPad 10"),
2940                 },
2941                 .driver_data = (unsigned long *)(RT5670_DMIC_EN |
2942                                                  RT5670_DMIC1_IN2P |
2943                                                  RT5670_GPIO1_IS_IRQ |
2944                                                  RT5670_JD_MODE1),
2945         },
2946         {
2947                 .callback = rt5670_quirk_cb,
2948                 .ident = "Lenovo Thinkpad Tablet 10",
2949                 .matches = {
2950                         DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"),
2951                         DMI_MATCH(DMI_PRODUCT_VERSION, "ThinkPad Tablet B"),
2952                 },
2953                 .driver_data = (unsigned long *)(RT5670_DMIC_EN |
2954                                                  RT5670_DMIC1_IN2P |
2955                                                  RT5670_GPIO1_IS_IRQ |
2956                                                  RT5670_JD_MODE1),
2957         },
2958         {
2959                 .callback = rt5670_quirk_cb,
2960                 .ident = "Lenovo Miix 2 10",
2961                 .matches = {
2962                         DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"),
2963                         DMI_MATCH(DMI_PRODUCT_VERSION, "Lenovo Miix 2 10"),
2964                 },
2965                 .driver_data = (unsigned long *)(RT5670_DMIC_EN |
2966                                                  RT5670_DMIC1_IN2P |
2967                                                  RT5670_GPIO1_IS_EXT_SPK_EN |
2968                                                  RT5670_JD_MODE2),
2969         },
2970         {
2971                 .callback = rt5670_quirk_cb,
2972                 .ident = "Dell Venue 8 Pro 5855",
2973                 .matches = {
2974                         DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
2975                         DMI_MATCH(DMI_PRODUCT_NAME, "Venue 8 Pro 5855"),
2976                 },
2977                 .driver_data = (unsigned long *)(RT5670_DMIC_EN |
2978                                                  RT5670_DMIC2_INR |
2979                                                  RT5670_GPIO1_IS_IRQ |
2980                                                  RT5670_JD_MODE3),
2981         },
2982         {
2983                 .callback = rt5670_quirk_cb,
2984                 .ident = "Dell Venue 10 Pro 5055",
2985                 .matches = {
2986                         DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
2987                         DMI_MATCH(DMI_PRODUCT_NAME, "Venue 10 Pro 5055"),
2988                 },
2989                 .driver_data = (unsigned long *)(RT5670_DMIC_EN |
2990                                                  RT5670_DMIC2_INR |
2991                                                  RT5670_GPIO1_IS_IRQ |
2992                                                  RT5670_JD_MODE1),
2993         },
2994         {
2995                 .callback = rt5670_quirk_cb,
2996                 .ident = "Aegex 10 tablet (RU2)",
2997                 .matches = {
2998                         DMI_MATCH(DMI_SYS_VENDOR, "AEGEX"),
2999                         DMI_MATCH(DMI_PRODUCT_VERSION, "RU2"),
3000                 },
3001                 .driver_data = (unsigned long *)(RT5670_DMIC_EN |
3002                                                  RT5670_DMIC2_INR |
3003                                                  RT5670_GPIO1_IS_IRQ |
3004                                                  RT5670_JD_MODE3),
3005         },
3006         {}
3007 };
3008
3009 const char *rt5670_components(void)
3010 {
3011         unsigned long quirk;
3012         bool dmic1 = false;
3013         bool dmic2 = false;
3014         bool dmic3 = false;
3015
3016         if (quirk_override) {
3017                 quirk = quirk_override;
3018         } else {
3019                 dmi_check_system(dmi_platform_intel_quirks);
3020                 quirk = rt5670_quirk;
3021         }
3022
3023         if ((quirk & RT5670_DMIC1_IN2P) ||
3024             (quirk & RT5670_DMIC1_GPIO6) ||
3025             (quirk & RT5670_DMIC1_GPIO7))
3026                 dmic1 = true;
3027
3028         if ((quirk & RT5670_DMIC2_INR) ||
3029             (quirk & RT5670_DMIC2_GPIO8))
3030                 dmic2 = true;
3031
3032         if (quirk & RT5670_DMIC3_GPIO5)
3033                 dmic3 = true;
3034
3035         if (dmic1 && dmic2)
3036                 return "cfg-spk:2 cfg-mic:dmics12";
3037         else if (dmic1)
3038                 return "cfg-spk:2 cfg-mic:dmic1";
3039         else if (dmic2)
3040                 return "cfg-spk:2 cfg-mic:dmic2";
3041         else if (dmic3)
3042                 return "cfg-spk:2 cfg-mic:dmic3";
3043
3044         return NULL;
3045 }
3046 EXPORT_SYMBOL_GPL(rt5670_components);
3047
3048 static int rt5670_i2c_probe(struct i2c_client *i2c)
3049 {
3050         struct rt5670_priv *rt5670;
3051         int ret;
3052         unsigned int val;
3053
3054         rt5670 = devm_kzalloc(&i2c->dev,
3055                                 sizeof(struct rt5670_priv),
3056                                 GFP_KERNEL);
3057         if (NULL == rt5670)
3058                 return -ENOMEM;
3059
3060         i2c_set_clientdata(i2c, rt5670);
3061
3062         dmi_check_system(dmi_platform_intel_quirks);
3063         if (quirk_override) {
3064                 dev_info(&i2c->dev, "Overriding quirk 0x%x => 0x%x\n",
3065                          (unsigned int)rt5670_quirk, quirk_override);
3066                 rt5670_quirk = quirk_override;
3067         }
3068
3069         if (rt5670_quirk & RT5670_GPIO1_IS_IRQ) {
3070                 rt5670->gpio1_is_irq = true;
3071                 dev_info(&i2c->dev, "quirk GPIO1 is IRQ\n");
3072         }
3073         if (rt5670_quirk & RT5670_GPIO1_IS_EXT_SPK_EN) {
3074                 rt5670->gpio1_is_ext_spk_en = true;
3075                 dev_info(&i2c->dev, "quirk GPIO1 is external speaker enable\n");
3076         }
3077         if (rt5670_quirk & RT5670_IN2_DIFF) {
3078                 rt5670->in2_diff = true;
3079                 dev_info(&i2c->dev, "quirk IN2_DIFF\n");
3080         }
3081         if (rt5670_quirk & RT5670_DMIC_EN) {
3082                 rt5670->dmic_en = true;
3083                 dev_info(&i2c->dev, "quirk DMIC enabled\n");
3084         }
3085         if (rt5670_quirk & RT5670_DMIC1_IN2P) {
3086                 rt5670->dmic1_data_pin = RT5670_DMIC_DATA_IN2P;
3087                 dev_info(&i2c->dev, "quirk DMIC1 on IN2P pin\n");
3088         }
3089         if (rt5670_quirk & RT5670_DMIC1_GPIO6) {
3090                 rt5670->dmic1_data_pin = RT5670_DMIC_DATA_GPIO6;
3091                 dev_info(&i2c->dev, "quirk DMIC1 on GPIO6 pin\n");
3092         }
3093         if (rt5670_quirk & RT5670_DMIC1_GPIO7) {
3094                 rt5670->dmic1_data_pin = RT5670_DMIC_DATA_GPIO7;
3095                 dev_info(&i2c->dev, "quirk DMIC1 on GPIO7 pin\n");
3096         }
3097         if (rt5670_quirk & RT5670_DMIC2_INR) {
3098                 rt5670->dmic2_data_pin = RT5670_DMIC_DATA_IN3N;
3099                 dev_info(&i2c->dev, "quirk DMIC2 on INR pin\n");
3100         }
3101         if (rt5670_quirk & RT5670_DMIC2_GPIO8) {
3102                 rt5670->dmic2_data_pin = RT5670_DMIC_DATA_GPIO8;
3103                 dev_info(&i2c->dev, "quirk DMIC2 on GPIO8 pin\n");
3104         }
3105         if (rt5670_quirk & RT5670_DMIC3_GPIO5) {
3106                 rt5670->dmic3_data_pin = RT5670_DMIC_DATA_GPIO5;
3107                 dev_info(&i2c->dev, "quirk DMIC3 on GPIO5 pin\n");
3108         }
3109
3110         if (rt5670_quirk & RT5670_JD_MODE1) {
3111                 rt5670->jd_mode = 1;
3112                 dev_info(&i2c->dev, "quirk JD mode 1\n");
3113         }
3114         if (rt5670_quirk & RT5670_JD_MODE2) {
3115                 rt5670->jd_mode = 2;
3116                 dev_info(&i2c->dev, "quirk JD mode 2\n");
3117         }
3118         if (rt5670_quirk & RT5670_JD_MODE3) {
3119                 rt5670->jd_mode = 3;
3120                 dev_info(&i2c->dev, "quirk JD mode 3\n");
3121         }
3122
3123         /*
3124          * Enable the emulated "DAC1 Playback Switch" by default to avoid
3125          * muting the output with older UCM profiles.
3126          */
3127         rt5670->dac1_playback_switch_l = true;
3128         rt5670->dac1_playback_switch_r = true;
3129         /* The Power-On-Reset values for the DAC1 mixer have the DAC1 input enabled. */
3130         rt5670->dac1_mixl_dac1_switch = true;
3131         rt5670->dac1_mixr_dac1_switch = true;
3132
3133         rt5670->regmap = devm_regmap_init_i2c(i2c, &rt5670_regmap);
3134         if (IS_ERR(rt5670->regmap)) {
3135                 ret = PTR_ERR(rt5670->regmap);
3136                 dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
3137                         ret);
3138                 return ret;
3139         }
3140
3141         regmap_read(rt5670->regmap, RT5670_VENDOR_ID2, &val);
3142         if (val != RT5670_DEVICE_ID) {
3143                 dev_err(&i2c->dev,
3144                         "Device with ID register %#x is not rt5670/72\n", val);
3145                 return -ENODEV;
3146         }
3147
3148         regmap_write(rt5670->regmap, RT5670_RESET, 0);
3149         regmap_update_bits(rt5670->regmap, RT5670_PWR_ANLG1,
3150                 RT5670_PWR_HP_L | RT5670_PWR_HP_R |
3151                 RT5670_PWR_VREF2, RT5670_PWR_VREF2);
3152         msleep(100);
3153
3154         regmap_write(rt5670->regmap, RT5670_RESET, 0);
3155
3156         regmap_read(rt5670->regmap, RT5670_VENDOR_ID, &val);
3157         if (val >= 4)
3158                 regmap_write(rt5670->regmap, RT5670_GPIO_CTRL3, 0x0980);
3159         else
3160                 regmap_write(rt5670->regmap, RT5670_GPIO_CTRL3, 0x0d00);
3161
3162         ret = regmap_register_patch(rt5670->regmap, init_list,
3163                                     ARRAY_SIZE(init_list));
3164         if (ret != 0)
3165                 dev_warn(&i2c->dev, "Failed to apply regmap patch: %d\n", ret);
3166
3167         regmap_update_bits(rt5670->regmap, RT5670_DIG_MISC,
3168                                  RT5670_MCLK_DET, RT5670_MCLK_DET);
3169
3170         if (rt5670->in2_diff)
3171                 regmap_update_bits(rt5670->regmap, RT5670_IN2,
3172                                         RT5670_IN_DF2, RT5670_IN_DF2);
3173
3174         if (rt5670->gpio1_is_irq) {
3175                 /* for push button */
3176                 regmap_write(rt5670->regmap, RT5670_IL_CMD, 0x0000);
3177                 regmap_write(rt5670->regmap, RT5670_IL_CMD2, 0x0010);
3178                 regmap_write(rt5670->regmap, RT5670_IL_CMD3, 0x0014);
3179                 /* for irq */
3180                 regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1,
3181                                    RT5670_GP1_PIN_MASK, RT5670_GP1_PIN_IRQ);
3182                 regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL2,
3183                                    RT5670_GP1_PF_MASK, RT5670_GP1_PF_OUT);
3184         }
3185
3186         if (rt5670->gpio1_is_ext_spk_en) {
3187                 regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1,
3188                                    RT5670_GP1_PIN_MASK, RT5670_GP1_PIN_GPIO1);
3189                 regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL2,
3190                                    RT5670_GP1_PF_MASK, RT5670_GP1_PF_OUT);
3191         }
3192
3193         if (rt5670->jd_mode) {
3194                 regmap_update_bits(rt5670->regmap, RT5670_GLB_CLK,
3195                                    RT5670_SCLK_SRC_MASK, RT5670_SCLK_SRC_RCCLK);
3196                 rt5670->sysclk = 0;
3197                 rt5670->sysclk_src = RT5670_SCLK_S_RCCLK;
3198                 regmap_update_bits(rt5670->regmap, RT5670_PWR_ANLG1,
3199                                    RT5670_PWR_MB, RT5670_PWR_MB);
3200                 regmap_update_bits(rt5670->regmap, RT5670_PWR_ANLG2,
3201                                    RT5670_PWR_JD1, RT5670_PWR_JD1);
3202                 regmap_update_bits(rt5670->regmap, RT5670_IRQ_CTRL1,
3203                                    RT5670_JD1_1_EN_MASK, RT5670_JD1_1_EN);
3204                 regmap_update_bits(rt5670->regmap, RT5670_JD_CTRL3,
3205                                    RT5670_JD_TRI_CBJ_SEL_MASK |
3206                                    RT5670_JD_TRI_HPO_SEL_MASK,
3207                                    RT5670_JD_CBJ_JD1_1 | RT5670_JD_HPO_JD1_1);
3208                 switch (rt5670->jd_mode) {
3209                 case 1:
3210                         regmap_update_bits(rt5670->regmap, RT5670_A_JD_CTRL1,
3211                                            RT5670_JD1_MODE_MASK,
3212                                            RT5670_JD1_MODE_0);
3213                         break;
3214                 case 2:
3215                         regmap_update_bits(rt5670->regmap, RT5670_A_JD_CTRL1,
3216                                            RT5670_JD1_MODE_MASK,
3217                                            RT5670_JD1_MODE_1);
3218                         break;
3219                 case 3:
3220                         regmap_update_bits(rt5670->regmap, RT5670_A_JD_CTRL1,
3221                                            RT5670_JD1_MODE_MASK,
3222                                            RT5670_JD1_MODE_2);
3223                         break;
3224                 default:
3225                         break;
3226                 }
3227         }
3228
3229         if (rt5670->dmic_en) {
3230                 regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1,
3231                                    RT5670_GP2_PIN_MASK,
3232                                    RT5670_GP2_PIN_DMIC1_SCL);
3233
3234                 switch (rt5670->dmic1_data_pin) {
3235                 case RT5670_DMIC_DATA_IN2P:
3236                         regmap_update_bits(rt5670->regmap, RT5670_DMIC_CTRL1,
3237                                            RT5670_DMIC_1_DP_MASK,
3238                                            RT5670_DMIC_1_DP_IN2P);
3239                         break;
3240
3241                 case RT5670_DMIC_DATA_GPIO6:
3242                         regmap_update_bits(rt5670->regmap, RT5670_DMIC_CTRL1,
3243                                            RT5670_DMIC_1_DP_MASK,
3244                                            RT5670_DMIC_1_DP_GPIO6);
3245                         regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1,
3246                                            RT5670_GP6_PIN_MASK,
3247                                            RT5670_GP6_PIN_DMIC1_SDA);
3248                         break;
3249
3250                 case RT5670_DMIC_DATA_GPIO7:
3251                         regmap_update_bits(rt5670->regmap, RT5670_DMIC_CTRL1,
3252                                            RT5670_DMIC_1_DP_MASK,
3253                                            RT5670_DMIC_1_DP_GPIO7);
3254                         regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1,
3255                                            RT5670_GP7_PIN_MASK,
3256                                            RT5670_GP7_PIN_DMIC1_SDA);
3257                         break;
3258
3259                 default:
3260                         break;
3261                 }
3262
3263                 switch (rt5670->dmic2_data_pin) {
3264                 case RT5670_DMIC_DATA_IN3N:
3265                         regmap_update_bits(rt5670->regmap, RT5670_DMIC_CTRL1,
3266                                            RT5670_DMIC_2_DP_MASK,
3267                                            RT5670_DMIC_2_DP_IN3N);
3268                         break;
3269
3270                 case RT5670_DMIC_DATA_GPIO8:
3271                         regmap_update_bits(rt5670->regmap, RT5670_DMIC_CTRL1,
3272                                            RT5670_DMIC_2_DP_MASK,
3273                                            RT5670_DMIC_2_DP_GPIO8);
3274                         regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1,
3275                                            RT5670_GP8_PIN_MASK,
3276                                            RT5670_GP8_PIN_DMIC2_SDA);
3277                         break;
3278
3279                 default:
3280                         break;
3281                 }
3282
3283                 switch (rt5670->dmic3_data_pin) {
3284                 case RT5670_DMIC_DATA_GPIO5:
3285                         regmap_update_bits(rt5670->regmap, RT5670_DMIC_CTRL2,
3286                                            RT5670_DMIC_3_DP_MASK,
3287                                            RT5670_DMIC_3_DP_GPIO5);
3288                         regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1,
3289                                            RT5670_GP5_PIN_MASK,
3290                                            RT5670_GP5_PIN_DMIC3_SDA);
3291                         break;
3292
3293                 case RT5670_DMIC_DATA_GPIO9:
3294                 case RT5670_DMIC_DATA_GPIO10:
3295                         dev_err(&i2c->dev,
3296                                 "Always use GPIO5 as DMIC3 data pin\n");
3297                         break;
3298
3299                 default:
3300                         break;
3301                 }
3302
3303         }
3304
3305         pm_runtime_enable(&i2c->dev);
3306         pm_request_idle(&i2c->dev);
3307
3308         ret = devm_snd_soc_register_component(&i2c->dev,
3309                         &soc_component_dev_rt5670,
3310                         rt5670_dai, ARRAY_SIZE(rt5670_dai));
3311         if (ret < 0)
3312                 goto err;
3313
3314         return 0;
3315 err:
3316         pm_runtime_disable(&i2c->dev);
3317
3318         return ret;
3319 }
3320
3321 static void rt5670_i2c_remove(struct i2c_client *i2c)
3322 {
3323         pm_runtime_disable(&i2c->dev);
3324 }
3325
3326 static struct i2c_driver rt5670_i2c_driver = {
3327         .driver = {
3328                 .name = "rt5670",
3329                 .acpi_match_table = ACPI_PTR(rt5670_acpi_match),
3330         },
3331         .probe    = rt5670_i2c_probe,
3332         .remove   = rt5670_i2c_remove,
3333         .id_table = rt5670_i2c_id,
3334 };
3335
3336 module_i2c_driver(rt5670_i2c_driver);
3337
3338 MODULE_DESCRIPTION("ASoC RT5670 driver");
3339 MODULE_AUTHOR("Bard Liao <bardliao@realtek.com>");
3340 MODULE_LICENSE("GPL v2");