1 // SPDX-License-Identifier: GPL-2.0-only
3 * rt5659.c -- RT5659/RT5658 ALSA SoC audio codec driver
5 * Copyright 2015 Realtek Semiconductor Corp.
6 * Author: Bard Liao <bardliao@realtek.com>
10 #include <linux/module.h>
11 #include <linux/moduleparam.h>
12 #include <linux/init.h>
13 #include <linux/delay.h>
15 #include <linux/i2c.h>
16 #include <linux/platform_device.h>
17 #include <linux/spi/spi.h>
18 #include <linux/acpi.h>
19 #include <linux/gpio/consumer.h>
20 #include <sound/core.h>
21 #include <sound/pcm.h>
22 #include <sound/pcm_params.h>
23 #include <sound/jack.h>
24 #include <sound/soc.h>
25 #include <sound/soc-dapm.h>
26 #include <sound/initval.h>
27 #include <sound/tlv.h>
28 #include <sound/rt5659.h>
33 static const struct reg_default rt5659_reg[] = {
530 static bool rt5659_volatile_register(struct device *dev, unsigned int reg)
534 case RT5659_EJD_CTRL_2:
535 case RT5659_SILENCE_CTRL:
536 case RT5659_DAC2_DIG_VOL:
537 case RT5659_HP_IMP_GAIN_2:
538 case RT5659_PDM_OUT_CTRL:
539 case RT5659_PDM_DATA_CTRL_1:
540 case RT5659_PDM_DATA_CTRL_4:
541 case RT5659_HAPTIC_GEN_CTRL_1:
542 case RT5659_HAPTIC_GEN_CTRL_3:
543 case RT5659_HAPTIC_LPF_CTRL_3:
545 case RT5659_MICBIAS_1:
547 case RT5659_ADC_EQ_CTRL_1:
548 case RT5659_DAC_EQ_CTRL_1:
549 case RT5659_INT_ST_1:
550 case RT5659_INT_ST_2:
551 case RT5659_GPIO_STA:
552 case RT5659_SINE_GEN_CTRL_1:
553 case RT5659_IL_CMD_1:
554 case RT5659_4BTN_IL_CMD_1:
555 case RT5659_PSV_IL_CMD_1:
556 case RT5659_AJD1_CTRL:
557 case RT5659_AJD2_AJD3_CTRL:
558 case RT5659_JD_CTRL_3:
559 case RT5659_VENDOR_ID:
560 case RT5659_VENDOR_ID_1:
561 case RT5659_DEVICE_ID:
562 case RT5659_MEMORY_TEST:
563 case RT5659_SOFT_RAMP_DEPOP_DAC_CLK_CTRL:
564 case RT5659_VOL_TEST:
565 case RT5659_STO_NG2_CTRL_1:
566 case RT5659_STO_NG2_CTRL_5:
567 case RT5659_STO_NG2_CTRL_6:
568 case RT5659_STO_NG2_CTRL_7:
569 case RT5659_MONO_NG2_CTRL_1:
570 case RT5659_MONO_NG2_CTRL_5:
571 case RT5659_MONO_NG2_CTRL_6:
572 case RT5659_HP_IMP_SENS_CTRL_1:
573 case RT5659_HP_IMP_SENS_CTRL_3:
574 case RT5659_HP_IMP_SENS_CTRL_4:
575 case RT5659_HP_CALIB_CTRL_1:
576 case RT5659_HP_CALIB_CTRL_9:
577 case RT5659_HP_CALIB_STA_1:
578 case RT5659_HP_CALIB_STA_2:
579 case RT5659_HP_CALIB_STA_3:
580 case RT5659_HP_CALIB_STA_4:
581 case RT5659_HP_CALIB_STA_5:
582 case RT5659_HP_CALIB_STA_6:
583 case RT5659_HP_CALIB_STA_7:
584 case RT5659_HP_CALIB_STA_8:
585 case RT5659_HP_CALIB_STA_9:
586 case RT5659_MONO_AMP_CALIB_CTRL_1:
587 case RT5659_MONO_AMP_CALIB_CTRL_3:
588 case RT5659_MONO_AMP_CALIB_STA_1:
589 case RT5659_MONO_AMP_CALIB_STA_2:
590 case RT5659_MONO_AMP_CALIB_STA_3:
591 case RT5659_MONO_AMP_CALIB_STA_4:
592 case RT5659_SPK_PWR_LMT_STA_1:
593 case RT5659_SPK_PWR_LMT_STA_2:
594 case RT5659_SPK_PWR_LMT_STA_3:
595 case RT5659_SPK_PWR_LMT_STA_4:
596 case RT5659_SPK_PWR_LMT_STA_5:
597 case RT5659_SPK_PWR_LMT_STA_6:
598 case RT5659_SPK_DC_CAILB_CTRL_1:
599 case RT5659_SPK_DC_CAILB_STA_1:
600 case RT5659_SPK_DC_CAILB_STA_2:
601 case RT5659_SPK_DC_CAILB_STA_3:
602 case RT5659_SPK_DC_CAILB_STA_4:
603 case RT5659_SPK_DC_CAILB_STA_5:
604 case RT5659_SPK_DC_CAILB_STA_6:
605 case RT5659_SPK_DC_CAILB_STA_7:
606 case RT5659_SPK_DC_CAILB_STA_8:
607 case RT5659_SPK_DC_CAILB_STA_9:
608 case RT5659_SPK_DC_CAILB_STA_10:
609 case RT5659_SPK_VDD_STA_1:
610 case RT5659_SPK_VDD_STA_2:
611 case RT5659_SPK_DC_DET_CTRL_1:
612 case RT5659_PURE_DC_DET_CTRL_1:
613 case RT5659_PURE_DC_DET_CTRL_2:
614 case RT5659_DRC1_PRIV_1:
615 case RT5659_DRC1_PRIV_4:
616 case RT5659_DRC1_PRIV_5:
617 case RT5659_DRC1_PRIV_6:
618 case RT5659_DRC1_PRIV_7:
619 case RT5659_DRC2_PRIV_1:
620 case RT5659_DRC2_PRIV_4:
621 case RT5659_DRC2_PRIV_5:
622 case RT5659_DRC2_PRIV_6:
623 case RT5659_DRC2_PRIV_7:
624 case RT5659_ALC_PGA_STA_1:
625 case RT5659_ALC_PGA_STA_2:
626 case RT5659_ALC_PGA_STA_3:
633 static bool rt5659_readable_register(struct device *dev, unsigned int reg)
640 case RT5659_MONO_OUT:
641 case RT5659_HPL_GAIN:
642 case RT5659_HPR_GAIN:
643 case RT5659_MONO_GAIN:
644 case RT5659_SPDIF_CTRL_1:
645 case RT5659_SPDIF_CTRL_2:
646 case RT5659_CAL_BST_CTRL:
649 case RT5659_INL1_INR1_VOL:
650 case RT5659_EJD_CTRL_1:
651 case RT5659_EJD_CTRL_2:
652 case RT5659_EJD_CTRL_3:
653 case RT5659_SILENCE_CTRL:
654 case RT5659_PSV_CTRL:
655 case RT5659_SIDETONE_CTRL:
656 case RT5659_DAC1_DIG_VOL:
657 case RT5659_DAC2_DIG_VOL:
658 case RT5659_DAC_CTRL:
659 case RT5659_STO1_ADC_DIG_VOL:
660 case RT5659_MONO_ADC_DIG_VOL:
661 case RT5659_STO2_ADC_DIG_VOL:
662 case RT5659_STO1_BOOST:
663 case RT5659_MONO_BOOST:
664 case RT5659_STO2_BOOST:
665 case RT5659_HP_IMP_GAIN_1:
666 case RT5659_HP_IMP_GAIN_2:
667 case RT5659_STO1_ADC_MIXER:
668 case RT5659_MONO_ADC_MIXER:
669 case RT5659_AD_DA_MIXER:
670 case RT5659_STO_DAC_MIXER:
671 case RT5659_MONO_DAC_MIXER:
672 case RT5659_DIG_MIXER:
673 case RT5659_A_DAC_MUX:
674 case RT5659_DIG_INF23_DATA:
675 case RT5659_PDM_OUT_CTRL:
676 case RT5659_PDM_DATA_CTRL_1:
677 case RT5659_PDM_DATA_CTRL_2:
678 case RT5659_PDM_DATA_CTRL_3:
679 case RT5659_PDM_DATA_CTRL_4:
680 case RT5659_SPDIF_CTRL:
681 case RT5659_REC1_GAIN:
682 case RT5659_REC1_L1_MIXER:
683 case RT5659_REC1_L2_MIXER:
684 case RT5659_REC1_R1_MIXER:
685 case RT5659_REC1_R2_MIXER:
687 case RT5659_REC2_L1_MIXER:
688 case RT5659_REC2_L2_MIXER:
689 case RT5659_REC2_R1_MIXER:
690 case RT5659_REC2_R2_MIXER:
691 case RT5659_SPK_L_MIXER:
692 case RT5659_SPK_R_MIXER:
693 case RT5659_SPO_AMP_GAIN:
694 case RT5659_ALC_BACK_GAIN:
695 case RT5659_MONOMIX_GAIN:
696 case RT5659_MONOMIX_IN_GAIN:
697 case RT5659_OUT_L_GAIN:
698 case RT5659_OUT_L_MIXER:
699 case RT5659_OUT_R_GAIN:
700 case RT5659_OUT_R_MIXER:
701 case RT5659_LOUT_MIXER:
702 case RT5659_HAPTIC_GEN_CTRL_1:
703 case RT5659_HAPTIC_GEN_CTRL_2:
704 case RT5659_HAPTIC_GEN_CTRL_3:
705 case RT5659_HAPTIC_GEN_CTRL_4:
706 case RT5659_HAPTIC_GEN_CTRL_5:
707 case RT5659_HAPTIC_GEN_CTRL_6:
708 case RT5659_HAPTIC_GEN_CTRL_7:
709 case RT5659_HAPTIC_GEN_CTRL_8:
710 case RT5659_HAPTIC_GEN_CTRL_9:
711 case RT5659_HAPTIC_GEN_CTRL_10:
712 case RT5659_HAPTIC_GEN_CTRL_11:
713 case RT5659_HAPTIC_LPF_CTRL_1:
714 case RT5659_HAPTIC_LPF_CTRL_2:
715 case RT5659_HAPTIC_LPF_CTRL_3:
716 case RT5659_PWR_DIG_1:
717 case RT5659_PWR_DIG_2:
718 case RT5659_PWR_ANLG_1:
719 case RT5659_PWR_ANLG_2:
720 case RT5659_PWR_ANLG_3:
721 case RT5659_PWR_MIXER:
723 case RT5659_PRIV_INDEX:
725 case RT5659_PRIV_DATA:
726 case RT5659_PRE_DIV_1:
727 case RT5659_PRE_DIV_2:
728 case RT5659_I2S1_SDP:
729 case RT5659_I2S2_SDP:
730 case RT5659_I2S3_SDP:
731 case RT5659_ADDA_CLK_1:
732 case RT5659_ADDA_CLK_2:
733 case RT5659_DMIC_CTRL_1:
734 case RT5659_DMIC_CTRL_2:
735 case RT5659_TDM_CTRL_1:
736 case RT5659_TDM_CTRL_2:
737 case RT5659_TDM_CTRL_3:
738 case RT5659_TDM_CTRL_4:
739 case RT5659_TDM_CTRL_5:
741 case RT5659_PLL_CTRL_1:
742 case RT5659_PLL_CTRL_2:
756 case RT5659_HP_CHARGE_PUMP_1:
757 case RT5659_HP_CHARGE_PUMP_2:
758 case RT5659_MICBIAS_1:
759 case RT5659_MICBIAS_2:
763 case RT5659_REC_M1_M2_GAIN_CTRL:
764 case RT5659_RC_CLK_CTRL:
765 case RT5659_CLASSD_CTRL_1:
766 case RT5659_CLASSD_CTRL_2:
767 case RT5659_ADC_EQ_CTRL_1:
768 case RT5659_ADC_EQ_CTRL_2:
769 case RT5659_DAC_EQ_CTRL_1:
770 case RT5659_DAC_EQ_CTRL_2:
771 case RT5659_DAC_EQ_CTRL_3:
772 case RT5659_IRQ_CTRL_1:
773 case RT5659_IRQ_CTRL_2:
774 case RT5659_IRQ_CTRL_3:
775 case RT5659_IRQ_CTRL_4:
776 case RT5659_IRQ_CTRL_5:
777 case RT5659_IRQ_CTRL_6:
778 case RT5659_INT_ST_1:
779 case RT5659_INT_ST_2:
780 case RT5659_GPIO_CTRL_1:
781 case RT5659_GPIO_CTRL_2:
782 case RT5659_GPIO_CTRL_3:
783 case RT5659_GPIO_CTRL_4:
784 case RT5659_GPIO_CTRL_5:
785 case RT5659_GPIO_STA:
786 case RT5659_SINE_GEN_CTRL_1:
787 case RT5659_SINE_GEN_CTRL_2:
788 case RT5659_SINE_GEN_CTRL_3:
789 case RT5659_HP_AMP_DET_CTRL_1:
790 case RT5659_HP_AMP_DET_CTRL_2:
791 case RT5659_SV_ZCD_1:
792 case RT5659_SV_ZCD_2:
793 case RT5659_IL_CMD_1:
794 case RT5659_IL_CMD_2:
795 case RT5659_IL_CMD_3:
796 case RT5659_IL_CMD_4:
797 case RT5659_4BTN_IL_CMD_1:
798 case RT5659_4BTN_IL_CMD_2:
799 case RT5659_4BTN_IL_CMD_3:
800 case RT5659_PSV_IL_CMD_1:
801 case RT5659_PSV_IL_CMD_2:
802 case RT5659_ADC_STO1_HP_CTRL_1:
803 case RT5659_ADC_STO1_HP_CTRL_2:
804 case RT5659_ADC_MONO_HP_CTRL_1:
805 case RT5659_ADC_MONO_HP_CTRL_2:
806 case RT5659_AJD1_CTRL:
807 case RT5659_AJD2_AJD3_CTRL:
811 case RT5659_JD_CTRL_1:
812 case RT5659_JD_CTRL_2:
813 case RT5659_JD_CTRL_3:
814 case RT5659_JD_CTRL_4:
815 case RT5659_DIG_MISC:
818 case RT5659_VENDOR_ID:
819 case RT5659_VENDOR_ID_1:
820 case RT5659_DEVICE_ID:
821 case RT5659_DAC_ADC_DIG_VOL:
822 case RT5659_BIAS_CUR_CTRL_1:
823 case RT5659_BIAS_CUR_CTRL_2:
824 case RT5659_BIAS_CUR_CTRL_3:
825 case RT5659_BIAS_CUR_CTRL_4:
826 case RT5659_BIAS_CUR_CTRL_5:
827 case RT5659_BIAS_CUR_CTRL_6:
828 case RT5659_BIAS_CUR_CTRL_7:
829 case RT5659_BIAS_CUR_CTRL_8:
830 case RT5659_BIAS_CUR_CTRL_9:
831 case RT5659_BIAS_CUR_CTRL_10:
832 case RT5659_MEMORY_TEST:
833 case RT5659_VREF_REC_OP_FB_CAP_CTRL:
834 case RT5659_CLASSD_0:
835 case RT5659_CLASSD_1:
836 case RT5659_CLASSD_2:
837 case RT5659_CLASSD_3:
838 case RT5659_CLASSD_4:
839 case RT5659_CLASSD_5:
840 case RT5659_CLASSD_6:
841 case RT5659_CLASSD_7:
842 case RT5659_CLASSD_8:
843 case RT5659_CLASSD_9:
844 case RT5659_CLASSD_10:
845 case RT5659_CHARGE_PUMP_1:
846 case RT5659_CHARGE_PUMP_2:
847 case RT5659_DIG_IN_CTRL_1:
848 case RT5659_DIG_IN_CTRL_2:
849 case RT5659_PAD_DRIVING_CTRL:
850 case RT5659_SOFT_RAMP_DEPOP:
852 case RT5659_CHOP_DAC:
853 case RT5659_CHOP_ADC:
854 case RT5659_CALIB_ADC_CTRL:
855 case RT5659_SOFT_RAMP_DEPOP_DAC_CLK_CTRL:
856 case RT5659_VOL_TEST:
857 case RT5659_TEST_MODE_CTRL_1:
858 case RT5659_TEST_MODE_CTRL_2:
859 case RT5659_TEST_MODE_CTRL_3:
860 case RT5659_TEST_MODE_CTRL_4:
861 case RT5659_BASSBACK_CTRL:
862 case RT5659_MP3_PLUS_CTRL_1:
863 case RT5659_MP3_PLUS_CTRL_2:
864 case RT5659_MP3_HPF_A1:
865 case RT5659_MP3_HPF_A2:
866 case RT5659_MP3_HPF_H0:
867 case RT5659_MP3_LPF_H0:
868 case RT5659_3D_SPK_CTRL:
869 case RT5659_3D_SPK_COEF_1:
870 case RT5659_3D_SPK_COEF_2:
871 case RT5659_3D_SPK_COEF_3:
872 case RT5659_3D_SPK_COEF_4:
873 case RT5659_3D_SPK_COEF_5:
874 case RT5659_3D_SPK_COEF_6:
875 case RT5659_3D_SPK_COEF_7:
876 case RT5659_STO_NG2_CTRL_1:
877 case RT5659_STO_NG2_CTRL_2:
878 case RT5659_STO_NG2_CTRL_3:
879 case RT5659_STO_NG2_CTRL_4:
880 case RT5659_STO_NG2_CTRL_5:
881 case RT5659_STO_NG2_CTRL_6:
882 case RT5659_STO_NG2_CTRL_7:
883 case RT5659_STO_NG2_CTRL_8:
884 case RT5659_MONO_NG2_CTRL_1:
885 case RT5659_MONO_NG2_CTRL_2:
886 case RT5659_MONO_NG2_CTRL_3:
887 case RT5659_MONO_NG2_CTRL_4:
888 case RT5659_MONO_NG2_CTRL_5:
889 case RT5659_MONO_NG2_CTRL_6:
890 case RT5659_MID_HP_AMP_DET:
891 case RT5659_LOW_HP_AMP_DET:
892 case RT5659_LDO_CTRL:
893 case RT5659_HP_DECROSS_CTRL_1:
894 case RT5659_HP_DECROSS_CTRL_2:
895 case RT5659_HP_DECROSS_CTRL_3:
896 case RT5659_HP_DECROSS_CTRL_4:
897 case RT5659_HP_IMP_SENS_CTRL_1:
898 case RT5659_HP_IMP_SENS_CTRL_2:
899 case RT5659_HP_IMP_SENS_CTRL_3:
900 case RT5659_HP_IMP_SENS_CTRL_4:
901 case RT5659_HP_IMP_SENS_MAP_1:
902 case RT5659_HP_IMP_SENS_MAP_2:
903 case RT5659_HP_IMP_SENS_MAP_3:
904 case RT5659_HP_IMP_SENS_MAP_4:
905 case RT5659_HP_IMP_SENS_MAP_5:
906 case RT5659_HP_IMP_SENS_MAP_6:
907 case RT5659_HP_IMP_SENS_MAP_7:
908 case RT5659_HP_IMP_SENS_MAP_8:
909 case RT5659_HP_LOGIC_CTRL_1:
910 case RT5659_HP_LOGIC_CTRL_2:
911 case RT5659_HP_CALIB_CTRL_1:
912 case RT5659_HP_CALIB_CTRL_2:
913 case RT5659_HP_CALIB_CTRL_3:
914 case RT5659_HP_CALIB_CTRL_4:
915 case RT5659_HP_CALIB_CTRL_5:
916 case RT5659_HP_CALIB_CTRL_6:
917 case RT5659_HP_CALIB_CTRL_7:
918 case RT5659_HP_CALIB_CTRL_9:
919 case RT5659_HP_CALIB_CTRL_10:
920 case RT5659_HP_CALIB_CTRL_11:
921 case RT5659_HP_CALIB_STA_1:
922 case RT5659_HP_CALIB_STA_2:
923 case RT5659_HP_CALIB_STA_3:
924 case RT5659_HP_CALIB_STA_4:
925 case RT5659_HP_CALIB_STA_5:
926 case RT5659_HP_CALIB_STA_6:
927 case RT5659_HP_CALIB_STA_7:
928 case RT5659_HP_CALIB_STA_8:
929 case RT5659_HP_CALIB_STA_9:
930 case RT5659_MONO_AMP_CALIB_CTRL_1:
931 case RT5659_MONO_AMP_CALIB_CTRL_2:
932 case RT5659_MONO_AMP_CALIB_CTRL_3:
933 case RT5659_MONO_AMP_CALIB_CTRL_4:
934 case RT5659_MONO_AMP_CALIB_CTRL_5:
935 case RT5659_MONO_AMP_CALIB_STA_1:
936 case RT5659_MONO_AMP_CALIB_STA_2:
937 case RT5659_MONO_AMP_CALIB_STA_3:
938 case RT5659_MONO_AMP_CALIB_STA_4:
939 case RT5659_SPK_PWR_LMT_CTRL_1:
940 case RT5659_SPK_PWR_LMT_CTRL_2:
941 case RT5659_SPK_PWR_LMT_CTRL_3:
942 case RT5659_SPK_PWR_LMT_STA_1:
943 case RT5659_SPK_PWR_LMT_STA_2:
944 case RT5659_SPK_PWR_LMT_STA_3:
945 case RT5659_SPK_PWR_LMT_STA_4:
946 case RT5659_SPK_PWR_LMT_STA_5:
947 case RT5659_SPK_PWR_LMT_STA_6:
948 case RT5659_FLEX_SPK_BST_CTRL_1:
949 case RT5659_FLEX_SPK_BST_CTRL_2:
950 case RT5659_FLEX_SPK_BST_CTRL_3:
951 case RT5659_FLEX_SPK_BST_CTRL_4:
952 case RT5659_SPK_EX_LMT_CTRL_1:
953 case RT5659_SPK_EX_LMT_CTRL_2:
954 case RT5659_SPK_EX_LMT_CTRL_3:
955 case RT5659_SPK_EX_LMT_CTRL_4:
956 case RT5659_SPK_EX_LMT_CTRL_5:
957 case RT5659_SPK_EX_LMT_CTRL_6:
958 case RT5659_SPK_EX_LMT_CTRL_7:
959 case RT5659_ADJ_HPF_CTRL_1:
960 case RT5659_ADJ_HPF_CTRL_2:
961 case RT5659_SPK_DC_CAILB_CTRL_1:
962 case RT5659_SPK_DC_CAILB_CTRL_2:
963 case RT5659_SPK_DC_CAILB_CTRL_3:
964 case RT5659_SPK_DC_CAILB_CTRL_4:
965 case RT5659_SPK_DC_CAILB_CTRL_5:
966 case RT5659_SPK_DC_CAILB_STA_1:
967 case RT5659_SPK_DC_CAILB_STA_2:
968 case RT5659_SPK_DC_CAILB_STA_3:
969 case RT5659_SPK_DC_CAILB_STA_4:
970 case RT5659_SPK_DC_CAILB_STA_5:
971 case RT5659_SPK_DC_CAILB_STA_6:
972 case RT5659_SPK_DC_CAILB_STA_7:
973 case RT5659_SPK_DC_CAILB_STA_8:
974 case RT5659_SPK_DC_CAILB_STA_9:
975 case RT5659_SPK_DC_CAILB_STA_10:
976 case RT5659_SPK_VDD_STA_1:
977 case RT5659_SPK_VDD_STA_2:
978 case RT5659_SPK_DC_DET_CTRL_1:
979 case RT5659_SPK_DC_DET_CTRL_2:
980 case RT5659_SPK_DC_DET_CTRL_3:
981 case RT5659_PURE_DC_DET_CTRL_1:
982 case RT5659_PURE_DC_DET_CTRL_2:
986 case RT5659_DRC1_CTRL_1:
987 case RT5659_DRC1_CTRL_2:
988 case RT5659_DRC1_CTRL_3:
989 case RT5659_DRC1_CTRL_4:
990 case RT5659_DRC1_CTRL_5:
991 case RT5659_DRC1_CTRL_6:
992 case RT5659_DRC1_HARD_LMT_CTRL_1:
993 case RT5659_DRC1_HARD_LMT_CTRL_2:
994 case RT5659_DRC2_CTRL_1:
995 case RT5659_DRC2_CTRL_2:
996 case RT5659_DRC2_CTRL_3:
997 case RT5659_DRC2_CTRL_4:
998 case RT5659_DRC2_CTRL_5:
999 case RT5659_DRC2_CTRL_6:
1000 case RT5659_DRC2_HARD_LMT_CTRL_1:
1001 case RT5659_DRC2_HARD_LMT_CTRL_2:
1002 case RT5659_DRC1_PRIV_1:
1003 case RT5659_DRC1_PRIV_2:
1004 case RT5659_DRC1_PRIV_3:
1005 case RT5659_DRC1_PRIV_4:
1006 case RT5659_DRC1_PRIV_5:
1007 case RT5659_DRC1_PRIV_6:
1008 case RT5659_DRC1_PRIV_7:
1009 case RT5659_DRC2_PRIV_1:
1010 case RT5659_DRC2_PRIV_2:
1011 case RT5659_DRC2_PRIV_3:
1012 case RT5659_DRC2_PRIV_4:
1013 case RT5659_DRC2_PRIV_5:
1014 case RT5659_DRC2_PRIV_6:
1015 case RT5659_DRC2_PRIV_7:
1016 case RT5659_MULTI_DRC_CTRL:
1017 case RT5659_CROSS_OVER_1:
1018 case RT5659_CROSS_OVER_2:
1019 case RT5659_CROSS_OVER_3:
1020 case RT5659_CROSS_OVER_4:
1021 case RT5659_CROSS_OVER_5:
1022 case RT5659_CROSS_OVER_6:
1023 case RT5659_CROSS_OVER_7:
1024 case RT5659_CROSS_OVER_8:
1025 case RT5659_CROSS_OVER_9:
1026 case RT5659_CROSS_OVER_10:
1027 case RT5659_ALC_PGA_CTRL_1:
1028 case RT5659_ALC_PGA_CTRL_2:
1029 case RT5659_ALC_PGA_CTRL_3:
1030 case RT5659_ALC_PGA_CTRL_4:
1031 case RT5659_ALC_PGA_CTRL_5:
1032 case RT5659_ALC_PGA_CTRL_6:
1033 case RT5659_ALC_PGA_CTRL_7:
1034 case RT5659_ALC_PGA_CTRL_8:
1035 case RT5659_ALC_PGA_STA_1:
1036 case RT5659_ALC_PGA_STA_2:
1037 case RT5659_ALC_PGA_STA_3:
1038 case RT5659_DAC_L_EQ_PRE_VOL:
1039 case RT5659_DAC_R_EQ_PRE_VOL:
1040 case RT5659_DAC_L_EQ_POST_VOL:
1041 case RT5659_DAC_R_EQ_POST_VOL:
1042 case RT5659_DAC_L_EQ_LPF1_A1:
1043 case RT5659_DAC_L_EQ_LPF1_H0:
1044 case RT5659_DAC_R_EQ_LPF1_A1:
1045 case RT5659_DAC_R_EQ_LPF1_H0:
1046 case RT5659_DAC_L_EQ_BPF2_A1:
1047 case RT5659_DAC_L_EQ_BPF2_A2:
1048 case RT5659_DAC_L_EQ_BPF2_H0:
1049 case RT5659_DAC_R_EQ_BPF2_A1:
1050 case RT5659_DAC_R_EQ_BPF2_A2:
1051 case RT5659_DAC_R_EQ_BPF2_H0:
1052 case RT5659_DAC_L_EQ_BPF3_A1:
1053 case RT5659_DAC_L_EQ_BPF3_A2:
1054 case RT5659_DAC_L_EQ_BPF3_H0:
1055 case RT5659_DAC_R_EQ_BPF3_A1:
1056 case RT5659_DAC_R_EQ_BPF3_A2:
1057 case RT5659_DAC_R_EQ_BPF3_H0:
1058 case RT5659_DAC_L_EQ_BPF4_A1:
1059 case RT5659_DAC_L_EQ_BPF4_A2:
1060 case RT5659_DAC_L_EQ_BPF4_H0:
1061 case RT5659_DAC_R_EQ_BPF4_A1:
1062 case RT5659_DAC_R_EQ_BPF4_A2:
1063 case RT5659_DAC_R_EQ_BPF4_H0:
1064 case RT5659_DAC_L_EQ_HPF1_A1:
1065 case RT5659_DAC_L_EQ_HPF1_H0:
1066 case RT5659_DAC_R_EQ_HPF1_A1:
1067 case RT5659_DAC_R_EQ_HPF1_H0:
1068 case RT5659_DAC_L_EQ_HPF2_A1:
1069 case RT5659_DAC_L_EQ_HPF2_A2:
1070 case RT5659_DAC_L_EQ_HPF2_H0:
1071 case RT5659_DAC_R_EQ_HPF2_A1:
1072 case RT5659_DAC_R_EQ_HPF2_A2:
1073 case RT5659_DAC_R_EQ_HPF2_H0:
1074 case RT5659_DAC_L_BI_EQ_BPF1_H0_1:
1075 case RT5659_DAC_L_BI_EQ_BPF1_H0_2:
1076 case RT5659_DAC_L_BI_EQ_BPF1_B1_1:
1077 case RT5659_DAC_L_BI_EQ_BPF1_B1_2:
1078 case RT5659_DAC_L_BI_EQ_BPF1_B2_1:
1079 case RT5659_DAC_L_BI_EQ_BPF1_B2_2:
1080 case RT5659_DAC_L_BI_EQ_BPF1_A1_1:
1081 case RT5659_DAC_L_BI_EQ_BPF1_A1_2:
1082 case RT5659_DAC_L_BI_EQ_BPF1_A2_1:
1083 case RT5659_DAC_L_BI_EQ_BPF1_A2_2:
1084 case RT5659_DAC_R_BI_EQ_BPF1_H0_1:
1085 case RT5659_DAC_R_BI_EQ_BPF1_H0_2:
1086 case RT5659_DAC_R_BI_EQ_BPF1_B1_1:
1087 case RT5659_DAC_R_BI_EQ_BPF1_B1_2:
1088 case RT5659_DAC_R_BI_EQ_BPF1_B2_1:
1089 case RT5659_DAC_R_BI_EQ_BPF1_B2_2:
1090 case RT5659_DAC_R_BI_EQ_BPF1_A1_1:
1091 case RT5659_DAC_R_BI_EQ_BPF1_A1_2:
1092 case RT5659_DAC_R_BI_EQ_BPF1_A2_1:
1093 case RT5659_DAC_R_BI_EQ_BPF1_A2_2:
1094 case RT5659_ADC_L_EQ_LPF1_A1:
1095 case RT5659_ADC_R_EQ_LPF1_A1:
1096 case RT5659_ADC_L_EQ_LPF1_H0:
1097 case RT5659_ADC_R_EQ_LPF1_H0:
1098 case RT5659_ADC_L_EQ_BPF1_A1:
1099 case RT5659_ADC_R_EQ_BPF1_A1:
1100 case RT5659_ADC_L_EQ_BPF1_A2:
1101 case RT5659_ADC_R_EQ_BPF1_A2:
1102 case RT5659_ADC_L_EQ_BPF1_H0:
1103 case RT5659_ADC_R_EQ_BPF1_H0:
1104 case RT5659_ADC_L_EQ_BPF2_A1:
1105 case RT5659_ADC_R_EQ_BPF2_A1:
1106 case RT5659_ADC_L_EQ_BPF2_A2:
1107 case RT5659_ADC_R_EQ_BPF2_A2:
1108 case RT5659_ADC_L_EQ_BPF2_H0:
1109 case RT5659_ADC_R_EQ_BPF2_H0:
1110 case RT5659_ADC_L_EQ_BPF3_A1:
1111 case RT5659_ADC_R_EQ_BPF3_A1:
1112 case RT5659_ADC_L_EQ_BPF3_A2:
1113 case RT5659_ADC_R_EQ_BPF3_A2:
1114 case RT5659_ADC_L_EQ_BPF3_H0:
1115 case RT5659_ADC_R_EQ_BPF3_H0:
1116 case RT5659_ADC_L_EQ_BPF4_A1:
1117 case RT5659_ADC_R_EQ_BPF4_A1:
1118 case RT5659_ADC_L_EQ_BPF4_A2:
1119 case RT5659_ADC_R_EQ_BPF4_A2:
1120 case RT5659_ADC_L_EQ_BPF4_H0:
1121 case RT5659_ADC_R_EQ_BPF4_H0:
1122 case RT5659_ADC_L_EQ_HPF1_A1:
1123 case RT5659_ADC_R_EQ_HPF1_A1:
1124 case RT5659_ADC_L_EQ_HPF1_H0:
1125 case RT5659_ADC_R_EQ_HPF1_H0:
1126 case RT5659_ADC_L_EQ_PRE_VOL:
1127 case RT5659_ADC_R_EQ_PRE_VOL:
1128 case RT5659_ADC_L_EQ_POST_VOL:
1129 case RT5659_ADC_R_EQ_POST_VOL:
1136 static const DECLARE_TLV_DB_SCALE(hp_vol_tlv, -2325, 75, 0);
1137 static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0);
1138 static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -65625, 375, 0);
1139 static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0);
1140 static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -17625, 375, 0);
1141 static const DECLARE_TLV_DB_SCALE(adc_bst_tlv, 0, 1200, 0);
1142 static const DECLARE_TLV_DB_SCALE(in_bst_tlv, -1200, 75, 0);
1144 /* Interface data select */
1145 static const char * const rt5659_data_select[] = {
1146 "L/R", "R/L", "L/L", "R/R"
1149 static SOC_ENUM_SINGLE_DECL(rt5659_if1_01_adc_enum,
1150 RT5659_TDM_CTRL_2, RT5659_DS_ADC_SLOT01_SFT, rt5659_data_select);
1152 static SOC_ENUM_SINGLE_DECL(rt5659_if1_23_adc_enum,
1153 RT5659_TDM_CTRL_2, RT5659_DS_ADC_SLOT23_SFT, rt5659_data_select);
1155 static SOC_ENUM_SINGLE_DECL(rt5659_if1_45_adc_enum,
1156 RT5659_TDM_CTRL_2, RT5659_DS_ADC_SLOT45_SFT, rt5659_data_select);
1158 static SOC_ENUM_SINGLE_DECL(rt5659_if1_67_adc_enum,
1159 RT5659_TDM_CTRL_2, RT5659_DS_ADC_SLOT67_SFT, rt5659_data_select);
1161 static SOC_ENUM_SINGLE_DECL(rt5659_if2_dac_enum,
1162 RT5659_DIG_INF23_DATA, RT5659_IF2_DAC_SEL_SFT, rt5659_data_select);
1164 static SOC_ENUM_SINGLE_DECL(rt5659_if2_adc_enum,
1165 RT5659_DIG_INF23_DATA, RT5659_IF2_ADC_SEL_SFT, rt5659_data_select);
1167 static SOC_ENUM_SINGLE_DECL(rt5659_if3_dac_enum,
1168 RT5659_DIG_INF23_DATA, RT5659_IF3_DAC_SEL_SFT, rt5659_data_select);
1170 static SOC_ENUM_SINGLE_DECL(rt5659_if3_adc_enum,
1171 RT5659_DIG_INF23_DATA, RT5659_IF3_ADC_SEL_SFT, rt5659_data_select);
1173 static const struct snd_kcontrol_new rt5659_if1_01_adc_swap_mux =
1174 SOC_DAPM_ENUM("IF1 01 ADC Swap Source", rt5659_if1_01_adc_enum);
1176 static const struct snd_kcontrol_new rt5659_if1_23_adc_swap_mux =
1177 SOC_DAPM_ENUM("IF1 23 ADC1 Swap Source", rt5659_if1_23_adc_enum);
1179 static const struct snd_kcontrol_new rt5659_if1_45_adc_swap_mux =
1180 SOC_DAPM_ENUM("IF1 45 ADC1 Swap Source", rt5659_if1_45_adc_enum);
1182 static const struct snd_kcontrol_new rt5659_if1_67_adc_swap_mux =
1183 SOC_DAPM_ENUM("IF1 67 ADC1 Swap Source", rt5659_if1_67_adc_enum);
1185 static const struct snd_kcontrol_new rt5659_if2_dac_swap_mux =
1186 SOC_DAPM_ENUM("IF2 DAC Swap Source", rt5659_if2_dac_enum);
1188 static const struct snd_kcontrol_new rt5659_if2_adc_swap_mux =
1189 SOC_DAPM_ENUM("IF2 ADC Swap Source", rt5659_if2_adc_enum);
1191 static const struct snd_kcontrol_new rt5659_if3_dac_swap_mux =
1192 SOC_DAPM_ENUM("IF3 DAC Swap Source", rt5659_if3_dac_enum);
1194 static const struct snd_kcontrol_new rt5659_if3_adc_swap_mux =
1195 SOC_DAPM_ENUM("IF3 ADC Swap Source", rt5659_if3_adc_enum);
1197 static int rt5659_hp_vol_put(struct snd_kcontrol *kcontrol,
1198 struct snd_ctl_elem_value *ucontrol)
1200 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
1201 int ret = snd_soc_put_volsw(kcontrol, ucontrol);
1203 if (snd_soc_component_read(component, RT5659_STO_NG2_CTRL_1) & RT5659_NG2_EN) {
1204 snd_soc_component_update_bits(component, RT5659_STO_NG2_CTRL_1,
1205 RT5659_NG2_EN_MASK, RT5659_NG2_DIS);
1206 snd_soc_component_update_bits(component, RT5659_STO_NG2_CTRL_1,
1207 RT5659_NG2_EN_MASK, RT5659_NG2_EN);
1213 static void rt5659_enable_push_button_irq(struct snd_soc_component *component,
1216 struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
1219 snd_soc_component_write(component, RT5659_4BTN_IL_CMD_1, 0x000b);
1221 /* MICBIAS1 and Mic Det Power for button detect*/
1222 snd_soc_dapm_force_enable_pin(dapm, "MICBIAS1");
1223 snd_soc_dapm_force_enable_pin(dapm,
1225 snd_soc_dapm_sync(dapm);
1227 snd_soc_component_update_bits(component, RT5659_PWR_ANLG_2,
1228 RT5659_PWR_MB1, RT5659_PWR_MB1);
1229 snd_soc_component_update_bits(component, RT5659_PWR_VOL,
1230 RT5659_PWR_MIC_DET, RT5659_PWR_MIC_DET);
1232 snd_soc_component_update_bits(component, RT5659_IRQ_CTRL_2,
1233 RT5659_IL_IRQ_MASK, RT5659_IL_IRQ_EN);
1234 snd_soc_component_update_bits(component, RT5659_4BTN_IL_CMD_2,
1235 RT5659_4BTN_IL_MASK, RT5659_4BTN_IL_EN);
1237 snd_soc_component_update_bits(component, RT5659_4BTN_IL_CMD_2,
1238 RT5659_4BTN_IL_MASK, RT5659_4BTN_IL_DIS);
1239 snd_soc_component_update_bits(component, RT5659_IRQ_CTRL_2,
1240 RT5659_IL_IRQ_MASK, RT5659_IL_IRQ_DIS);
1241 /* MICBIAS1 and Mic Det Power for button detect*/
1242 snd_soc_dapm_disable_pin(dapm, "MICBIAS1");
1243 snd_soc_dapm_disable_pin(dapm, "Mic Det Power");
1244 snd_soc_dapm_sync(dapm);
1249 * rt5659_headset_detect - Detect headset.
1250 * @component: SoC audio component device.
1251 * @jack_insert: Jack insert or not.
1253 * Detect whether is headset or not when jack inserted.
1255 * Returns detect status.
1258 static int rt5659_headset_detect(struct snd_soc_component *component, int jack_insert)
1260 struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
1261 int val, i = 0, sleep_time[5] = {300, 150, 100, 50, 30};
1264 struct rt5659_priv *rt5659 = snd_soc_component_get_drvdata(component);
1267 snd_soc_dapm_force_enable_pin(dapm,
1269 snd_soc_dapm_sync(dapm);
1270 reg_63 = snd_soc_component_read(component, RT5659_PWR_ANLG_1);
1272 snd_soc_component_update_bits(component, RT5659_PWR_ANLG_1,
1273 RT5659_PWR_VREF2 | RT5659_PWR_MB,
1274 RT5659_PWR_VREF2 | RT5659_PWR_MB);
1276 snd_soc_component_update_bits(component, RT5659_PWR_ANLG_1,
1277 RT5659_PWR_FV2, RT5659_PWR_FV2);
1279 snd_soc_component_write(component, RT5659_EJD_CTRL_2, 0x4160);
1280 snd_soc_component_update_bits(component, RT5659_EJD_CTRL_1,
1283 snd_soc_component_update_bits(component, RT5659_EJD_CTRL_1,
1287 msleep(sleep_time[i]);
1288 val = snd_soc_component_read(component, RT5659_EJD_CTRL_2) & 0x0003;
1290 if (val == 0x1 || val == 0x2 || val == 0x3)
1296 rt5659->jack_type = SND_JACK_HEADSET;
1297 rt5659_enable_push_button_irq(component, true);
1300 snd_soc_component_write(component, RT5659_PWR_ANLG_1, reg_63);
1301 rt5659->jack_type = SND_JACK_HEADPHONE;
1302 snd_soc_dapm_disable_pin(dapm, "Mic Det Power");
1303 snd_soc_dapm_sync(dapm);
1307 snd_soc_dapm_disable_pin(dapm, "Mic Det Power");
1308 snd_soc_dapm_sync(dapm);
1309 if (rt5659->jack_type == SND_JACK_HEADSET)
1310 rt5659_enable_push_button_irq(component, false);
1311 rt5659->jack_type = 0;
1314 dev_dbg(component->dev, "jack_type = %d\n", rt5659->jack_type);
1315 return rt5659->jack_type;
1318 static int rt5659_button_detect(struct snd_soc_component *component)
1322 val = snd_soc_component_read(component, RT5659_4BTN_IL_CMD_1);
1323 btn_type = val & 0xfff0;
1324 snd_soc_component_write(component, RT5659_4BTN_IL_CMD_1, val);
1329 static irqreturn_t rt5659_irq(int irq, void *data)
1331 struct rt5659_priv *rt5659 = data;
1333 queue_delayed_work(system_power_efficient_wq,
1334 &rt5659->jack_detect_work, msecs_to_jiffies(250));
1339 int rt5659_set_jack_detect(struct snd_soc_component *component,
1340 struct snd_soc_jack *hs_jack)
1342 struct rt5659_priv *rt5659 = snd_soc_component_get_drvdata(component);
1344 rt5659->hs_jack = hs_jack;
1346 rt5659_irq(0, rt5659);
1350 EXPORT_SYMBOL_GPL(rt5659_set_jack_detect);
1352 static void rt5659_jack_detect_work(struct work_struct *work)
1354 struct rt5659_priv *rt5659 =
1355 container_of(work, struct rt5659_priv, jack_detect_work.work);
1356 int val, btn_type, report = 0;
1358 if (!rt5659->component)
1361 val = snd_soc_component_read(rt5659->component, RT5659_INT_ST_1) & 0x0080;
1364 if (rt5659->jack_type == 0) {
1365 /* jack was out, report jack type */
1366 report = rt5659_headset_detect(rt5659->component, 1);
1368 /* jack is already in, report button event */
1369 report = SND_JACK_HEADSET;
1370 btn_type = rt5659_button_detect(rt5659->component);
1372 * rt5659 can report three kinds of button behavior,
1373 * one click, double click and hold. However,
1374 * currently we will report button pressed/released
1375 * event. So all the three button behaviors are
1376 * treated as button pressed.
1382 report |= SND_JACK_BTN_0;
1387 report |= SND_JACK_BTN_1;
1392 report |= SND_JACK_BTN_2;
1397 report |= SND_JACK_BTN_3;
1399 case 0x0000: /* unpressed */
1403 dev_err(rt5659->component->dev,
1404 "Unexpected button code 0x%04x\n",
1409 /* button release or spurious interrput*/
1411 report = rt5659->jack_type;
1415 report = rt5659_headset_detect(rt5659->component, 0);
1418 snd_soc_jack_report(rt5659->hs_jack, report, SND_JACK_HEADSET |
1419 SND_JACK_BTN_0 | SND_JACK_BTN_1 |
1420 SND_JACK_BTN_2 | SND_JACK_BTN_3);
1423 static void rt5659_jack_detect_intel_hd_header(struct work_struct *work)
1425 struct rt5659_priv *rt5659 =
1426 container_of(work, struct rt5659_priv, jack_detect_work.work);
1428 bool hp_flag, mic_flag;
1430 if (!rt5659->hs_jack)
1433 /* headphone jack */
1434 regmap_read(rt5659->regmap, RT5659_GPIO_STA, &value);
1435 hp_flag = (!(value & 0x8)) ? true : false;
1437 if (hp_flag != rt5659->hda_hp_plugged) {
1438 rt5659->hda_hp_plugged = hp_flag;
1441 regmap_update_bits(rt5659->regmap, RT5659_IRQ_CTRL_1,
1443 rt5659->jack_type |= SND_JACK_HEADPHONE;
1445 regmap_update_bits(rt5659->regmap, RT5659_IRQ_CTRL_1,
1447 rt5659->jack_type = rt5659->jack_type &
1448 (~SND_JACK_HEADPHONE);
1451 snd_soc_jack_report(rt5659->hs_jack, rt5659->jack_type,
1452 SND_JACK_HEADPHONE);
1456 regmap_read(rt5659->regmap, RT5659_4BTN_IL_CMD_1, &value);
1457 regmap_write(rt5659->regmap, RT5659_4BTN_IL_CMD_1, value);
1458 mic_flag = (value & 0x2000) ? true : false;
1460 if (mic_flag != rt5659->hda_mic_plugged) {
1461 rt5659->hda_mic_plugged = mic_flag;
1463 regmap_update_bits(rt5659->regmap, RT5659_IRQ_CTRL_2,
1465 rt5659->jack_type |= SND_JACK_MICROPHONE;
1467 regmap_update_bits(rt5659->regmap, RT5659_IRQ_CTRL_2,
1469 rt5659->jack_type = rt5659->jack_type
1470 & (~SND_JACK_MICROPHONE);
1473 snd_soc_jack_report(rt5659->hs_jack, rt5659->jack_type,
1474 SND_JACK_MICROPHONE);
1478 static const struct snd_kcontrol_new rt5659_snd_controls[] = {
1479 /* Speaker Output Volume */
1480 SOC_DOUBLE_TLV("Speaker Playback Volume", RT5659_SPO_VOL,
1481 RT5659_L_VOL_SFT, RT5659_R_VOL_SFT, 39, 1, out_vol_tlv),
1483 /* Headphone Output Volume */
1484 SOC_DOUBLE_R_EXT_TLV("Headphone Playback Volume", RT5659_HPL_GAIN,
1485 RT5659_HPR_GAIN, RT5659_G_HP_SFT, 31, 1, snd_soc_get_volsw,
1486 rt5659_hp_vol_put, hp_vol_tlv),
1488 /* Mono Output Volume */
1489 SOC_SINGLE_TLV("Mono Playback Volume", RT5659_MONO_OUT,
1490 RT5659_L_VOL_SFT, 39, 1, out_vol_tlv),
1493 SOC_DOUBLE_TLV("OUT Playback Volume", RT5659_LOUT,
1494 RT5659_L_VOL_SFT, RT5659_R_VOL_SFT, 39, 1, out_vol_tlv),
1496 /* DAC Digital Volume */
1497 SOC_DOUBLE_TLV("DAC1 Playback Volume", RT5659_DAC1_DIG_VOL,
1498 RT5659_L_VOL_SFT, RT5659_R_VOL_SFT, 175, 0, dac_vol_tlv),
1499 SOC_DOUBLE("DAC1 Playback Switch", RT5659_AD_DA_MIXER,
1500 RT5659_M_DAC1_L_SFT, RT5659_M_DAC1_R_SFT, 1, 1),
1502 SOC_DOUBLE_TLV("DAC2 Playback Volume", RT5659_DAC2_DIG_VOL,
1503 RT5659_L_VOL_SFT, RT5659_R_VOL_SFT, 175, 0, dac_vol_tlv),
1504 SOC_DOUBLE("DAC2 Playback Switch", RT5659_DAC_CTRL,
1505 RT5659_M_DAC2_L_VOL_SFT, RT5659_M_DAC2_R_VOL_SFT, 1, 1),
1507 /* IN1/IN2/IN3/IN4 Volume */
1508 SOC_SINGLE_TLV("IN1 Boost Volume", RT5659_IN1_IN2,
1509 RT5659_BST1_SFT, 69, 0, in_bst_tlv),
1510 SOC_SINGLE_TLV("IN2 Boost Volume", RT5659_IN1_IN2,
1511 RT5659_BST2_SFT, 69, 0, in_bst_tlv),
1512 SOC_SINGLE_TLV("IN3 Boost Volume", RT5659_IN3_IN4,
1513 RT5659_BST3_SFT, 69, 0, in_bst_tlv),
1514 SOC_SINGLE_TLV("IN4 Boost Volume", RT5659_IN3_IN4,
1515 RT5659_BST4_SFT, 69, 0, in_bst_tlv),
1517 /* INL/INR Volume Control */
1518 SOC_DOUBLE_TLV("IN Capture Volume", RT5659_INL1_INR1_VOL,
1519 RT5659_INL_VOL_SFT, RT5659_INR_VOL_SFT, 31, 1, in_vol_tlv),
1521 /* ADC Digital Volume Control */
1522 SOC_DOUBLE("STO1 ADC Capture Switch", RT5659_STO1_ADC_DIG_VOL,
1523 RT5659_L_MUTE_SFT, RT5659_R_MUTE_SFT, 1, 1),
1524 SOC_DOUBLE_TLV("STO1 ADC Capture Volume", RT5659_STO1_ADC_DIG_VOL,
1525 RT5659_L_VOL_SFT, RT5659_R_VOL_SFT, 127, 0, adc_vol_tlv),
1526 SOC_DOUBLE("Mono ADC Capture Switch", RT5659_MONO_ADC_DIG_VOL,
1527 RT5659_L_MUTE_SFT, RT5659_R_MUTE_SFT, 1, 1),
1528 SOC_DOUBLE_TLV("Mono ADC Capture Volume", RT5659_MONO_ADC_DIG_VOL,
1529 RT5659_L_VOL_SFT, RT5659_R_VOL_SFT, 127, 0, adc_vol_tlv),
1530 SOC_DOUBLE("STO2 ADC Capture Switch", RT5659_STO2_ADC_DIG_VOL,
1531 RT5659_L_MUTE_SFT, RT5659_R_MUTE_SFT, 1, 1),
1532 SOC_DOUBLE_TLV("STO2 ADC Capture Volume", RT5659_STO2_ADC_DIG_VOL,
1533 RT5659_L_VOL_SFT, RT5659_R_VOL_SFT, 127, 0, adc_vol_tlv),
1535 /* ADC Boost Volume Control */
1536 SOC_DOUBLE_TLV("STO1 ADC Boost Gain Volume", RT5659_STO1_BOOST,
1537 RT5659_STO1_ADC_L_BST_SFT, RT5659_STO1_ADC_R_BST_SFT,
1540 SOC_DOUBLE_TLV("Mono ADC Boost Gain Volume", RT5659_MONO_BOOST,
1541 RT5659_MONO_ADC_L_BST_SFT, RT5659_MONO_ADC_R_BST_SFT,
1544 SOC_DOUBLE_TLV("STO2 ADC Boost Gain Volume", RT5659_STO2_BOOST,
1545 RT5659_STO2_ADC_L_BST_SFT, RT5659_STO2_ADC_R_BST_SFT,
1548 SOC_SINGLE("DAC IF1 DAC1 L Data Switch", RT5659_TDM_CTRL_4, 12, 7, 0),
1549 SOC_SINGLE("DAC IF1 DAC1 R Data Switch", RT5659_TDM_CTRL_4, 8, 7, 0),
1550 SOC_SINGLE("DAC IF1 DAC2 L Data Switch", RT5659_TDM_CTRL_4, 4, 7, 0),
1551 SOC_SINGLE("DAC IF1 DAC2 R Data Switch", RT5659_TDM_CTRL_4, 0, 7, 0),
1555 * set_dmic_clk - Set parameter of dmic.
1558 * @kcontrol: The kcontrol of this widget.
1561 * Choose dmic clock between 1MHz and 3MHz.
1562 * It is better for clock to approximate 3MHz.
1564 static int set_dmic_clk(struct snd_soc_dapm_widget *w,
1565 struct snd_kcontrol *kcontrol, int event)
1567 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1568 struct rt5659_priv *rt5659 = snd_soc_component_get_drvdata(component);
1571 pd = rl6231_get_pre_div(rt5659->regmap,
1572 RT5659_ADDA_CLK_1, RT5659_I2S_PD1_SFT);
1573 idx = rl6231_calc_dmic_clk(rt5659->sysclk / pd);
1576 dev_err(component->dev, "Failed to set DMIC clock\n");
1578 snd_soc_component_update_bits(component, RT5659_DMIC_CTRL_1,
1579 RT5659_DMIC_CLK_MASK, idx << RT5659_DMIC_CLK_SFT);
1584 static int set_adc1_clk(struct snd_soc_dapm_widget *w,
1585 struct snd_kcontrol *kcontrol, int event)
1587 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1590 case SND_SOC_DAPM_POST_PMU:
1591 snd_soc_component_update_bits(component, RT5659_CHOP_ADC,
1592 RT5659_CKXEN_ADC1_MASK | RT5659_CKGEN_ADC1_MASK,
1593 RT5659_CKXEN_ADC1_MASK | RT5659_CKGEN_ADC1_MASK);
1596 case SND_SOC_DAPM_PRE_PMD:
1597 snd_soc_component_update_bits(component, RT5659_CHOP_ADC,
1598 RT5659_CKXEN_ADC1_MASK | RT5659_CKGEN_ADC1_MASK, 0);
1609 static int set_adc2_clk(struct snd_soc_dapm_widget *w,
1610 struct snd_kcontrol *kcontrol, int event)
1612 struct snd_soc_component *component =
1613 snd_soc_dapm_to_component(w->dapm);
1616 case SND_SOC_DAPM_POST_PMU:
1617 snd_soc_component_update_bits(component, RT5659_CHOP_ADC,
1618 RT5659_CKXEN_ADC2_MASK | RT5659_CKGEN_ADC2_MASK,
1619 RT5659_CKXEN_ADC2_MASK | RT5659_CKGEN_ADC2_MASK);
1622 case SND_SOC_DAPM_PRE_PMD:
1623 snd_soc_component_update_bits(component, RT5659_CHOP_ADC,
1624 RT5659_CKXEN_ADC2_MASK | RT5659_CKGEN_ADC2_MASK, 0);
1635 static int rt5659_charge_pump_event(struct snd_soc_dapm_widget *w,
1636 struct snd_kcontrol *kcontrol, int event)
1638 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1641 case SND_SOC_DAPM_PRE_PMU:
1643 snd_soc_component_write(component, RT5659_DEPOP_1, 0x0009);
1645 case SND_SOC_DAPM_POST_PMD:
1646 snd_soc_component_write(component, RT5659_HP_CHARGE_PUMP_1, 0x0c16);
1655 static int is_sys_clk_from_pll(struct snd_soc_dapm_widget *w,
1656 struct snd_soc_dapm_widget *sink)
1659 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1661 val = snd_soc_component_read(component, RT5659_GLB_CLK);
1662 val &= RT5659_SCLK_SRC_MASK;
1663 if (val == RT5659_SCLK_SRC_PLL1)
1669 static int is_using_asrc(struct snd_soc_dapm_widget *w,
1670 struct snd_soc_dapm_widget *sink)
1672 unsigned int reg, shift, val;
1673 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1676 case RT5659_ADC_MONO_R_ASRC_SFT:
1677 reg = RT5659_ASRC_3;
1678 shift = RT5659_AD_MONO_R_T_SFT;
1680 case RT5659_ADC_MONO_L_ASRC_SFT:
1681 reg = RT5659_ASRC_3;
1682 shift = RT5659_AD_MONO_L_T_SFT;
1684 case RT5659_ADC_STO1_ASRC_SFT:
1685 reg = RT5659_ASRC_2;
1686 shift = RT5659_AD_STO1_T_SFT;
1688 case RT5659_DAC_MONO_R_ASRC_SFT:
1689 reg = RT5659_ASRC_2;
1690 shift = RT5659_DA_MONO_R_T_SFT;
1692 case RT5659_DAC_MONO_L_ASRC_SFT:
1693 reg = RT5659_ASRC_2;
1694 shift = RT5659_DA_MONO_L_T_SFT;
1696 case RT5659_DAC_STO_ASRC_SFT:
1697 reg = RT5659_ASRC_2;
1698 shift = RT5659_DA_STO_T_SFT;
1704 val = (snd_soc_component_read(component, reg) >> shift) & 0xf;
1709 /* I2S_Pre_Div1 should be 1 in asrc mode */
1710 snd_soc_component_update_bits(component, RT5659_ADDA_CLK_1,
1711 RT5659_I2S_PD1_MASK, RT5659_I2S_PD1_2);
1720 static const struct snd_kcontrol_new rt5659_sto1_adc_l_mix[] = {
1721 SOC_DAPM_SINGLE("ADC1 Switch", RT5659_STO1_ADC_MIXER,
1722 RT5659_M_STO1_ADC_L1_SFT, 1, 1),
1723 SOC_DAPM_SINGLE("ADC2 Switch", RT5659_STO1_ADC_MIXER,
1724 RT5659_M_STO1_ADC_L2_SFT, 1, 1),
1727 static const struct snd_kcontrol_new rt5659_sto1_adc_r_mix[] = {
1728 SOC_DAPM_SINGLE("ADC1 Switch", RT5659_STO1_ADC_MIXER,
1729 RT5659_M_STO1_ADC_R1_SFT, 1, 1),
1730 SOC_DAPM_SINGLE("ADC2 Switch", RT5659_STO1_ADC_MIXER,
1731 RT5659_M_STO1_ADC_R2_SFT, 1, 1),
1734 static const struct snd_kcontrol_new rt5659_mono_adc_l_mix[] = {
1735 SOC_DAPM_SINGLE("ADC1 Switch", RT5659_MONO_ADC_MIXER,
1736 RT5659_M_MONO_ADC_L1_SFT, 1, 1),
1737 SOC_DAPM_SINGLE("ADC2 Switch", RT5659_MONO_ADC_MIXER,
1738 RT5659_M_MONO_ADC_L2_SFT, 1, 1),
1741 static const struct snd_kcontrol_new rt5659_mono_adc_r_mix[] = {
1742 SOC_DAPM_SINGLE("ADC1 Switch", RT5659_MONO_ADC_MIXER,
1743 RT5659_M_MONO_ADC_R1_SFT, 1, 1),
1744 SOC_DAPM_SINGLE("ADC2 Switch", RT5659_MONO_ADC_MIXER,
1745 RT5659_M_MONO_ADC_R2_SFT, 1, 1),
1748 static const struct snd_kcontrol_new rt5659_dac_l_mix[] = {
1749 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5659_AD_DA_MIXER,
1750 RT5659_M_ADCMIX_L_SFT, 1, 1),
1751 SOC_DAPM_SINGLE("DAC1 Switch", RT5659_AD_DA_MIXER,
1752 RT5659_M_DAC1_L_SFT, 1, 1),
1755 static const struct snd_kcontrol_new rt5659_dac_r_mix[] = {
1756 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5659_AD_DA_MIXER,
1757 RT5659_M_ADCMIX_R_SFT, 1, 1),
1758 SOC_DAPM_SINGLE("DAC1 Switch", RT5659_AD_DA_MIXER,
1759 RT5659_M_DAC1_R_SFT, 1, 1),
1762 static const struct snd_kcontrol_new rt5659_sto_dac_l_mix[] = {
1763 SOC_DAPM_SINGLE("DAC L1 Switch", RT5659_STO_DAC_MIXER,
1764 RT5659_M_DAC_L1_STO_L_SFT, 1, 1),
1765 SOC_DAPM_SINGLE("DAC R1 Switch", RT5659_STO_DAC_MIXER,
1766 RT5659_M_DAC_R1_STO_L_SFT, 1, 1),
1767 SOC_DAPM_SINGLE("DAC L2 Switch", RT5659_STO_DAC_MIXER,
1768 RT5659_M_DAC_L2_STO_L_SFT, 1, 1),
1769 SOC_DAPM_SINGLE("DAC R2 Switch", RT5659_STO_DAC_MIXER,
1770 RT5659_M_DAC_R2_STO_L_SFT, 1, 1),
1773 static const struct snd_kcontrol_new rt5659_sto_dac_r_mix[] = {
1774 SOC_DAPM_SINGLE("DAC L1 Switch", RT5659_STO_DAC_MIXER,
1775 RT5659_M_DAC_L1_STO_R_SFT, 1, 1),
1776 SOC_DAPM_SINGLE("DAC R1 Switch", RT5659_STO_DAC_MIXER,
1777 RT5659_M_DAC_R1_STO_R_SFT, 1, 1),
1778 SOC_DAPM_SINGLE("DAC L2 Switch", RT5659_STO_DAC_MIXER,
1779 RT5659_M_DAC_L2_STO_R_SFT, 1, 1),
1780 SOC_DAPM_SINGLE("DAC R2 Switch", RT5659_STO_DAC_MIXER,
1781 RT5659_M_DAC_R2_STO_R_SFT, 1, 1),
1784 static const struct snd_kcontrol_new rt5659_mono_dac_l_mix[] = {
1785 SOC_DAPM_SINGLE("DAC L1 Switch", RT5659_MONO_DAC_MIXER,
1786 RT5659_M_DAC_L1_MONO_L_SFT, 1, 1),
1787 SOC_DAPM_SINGLE("DAC R1 Switch", RT5659_MONO_DAC_MIXER,
1788 RT5659_M_DAC_R1_MONO_L_SFT, 1, 1),
1789 SOC_DAPM_SINGLE("DAC L2 Switch", RT5659_MONO_DAC_MIXER,
1790 RT5659_M_DAC_L2_MONO_L_SFT, 1, 1),
1791 SOC_DAPM_SINGLE("DAC R2 Switch", RT5659_MONO_DAC_MIXER,
1792 RT5659_M_DAC_R2_MONO_L_SFT, 1, 1),
1795 static const struct snd_kcontrol_new rt5659_mono_dac_r_mix[] = {
1796 SOC_DAPM_SINGLE("DAC L1 Switch", RT5659_MONO_DAC_MIXER,
1797 RT5659_M_DAC_L1_MONO_R_SFT, 1, 1),
1798 SOC_DAPM_SINGLE("DAC R1 Switch", RT5659_MONO_DAC_MIXER,
1799 RT5659_M_DAC_R1_MONO_R_SFT, 1, 1),
1800 SOC_DAPM_SINGLE("DAC L2 Switch", RT5659_MONO_DAC_MIXER,
1801 RT5659_M_DAC_L2_MONO_R_SFT, 1, 1),
1802 SOC_DAPM_SINGLE("DAC R2 Switch", RT5659_MONO_DAC_MIXER,
1803 RT5659_M_DAC_R2_MONO_R_SFT, 1, 1),
1806 /* Analog Input Mixer */
1807 static const struct snd_kcontrol_new rt5659_rec1_l_mix[] = {
1808 SOC_DAPM_SINGLE("SPKVOLL Switch", RT5659_REC1_L2_MIXER,
1809 RT5659_M_SPKVOLL_RM1_L_SFT, 1, 1),
1810 SOC_DAPM_SINGLE("INL Switch", RT5659_REC1_L2_MIXER,
1811 RT5659_M_INL_RM1_L_SFT, 1, 1),
1812 SOC_DAPM_SINGLE("BST4 Switch", RT5659_REC1_L2_MIXER,
1813 RT5659_M_BST4_RM1_L_SFT, 1, 1),
1814 SOC_DAPM_SINGLE("BST3 Switch", RT5659_REC1_L2_MIXER,
1815 RT5659_M_BST3_RM1_L_SFT, 1, 1),
1816 SOC_DAPM_SINGLE("BST2 Switch", RT5659_REC1_L2_MIXER,
1817 RT5659_M_BST2_RM1_L_SFT, 1, 1),
1818 SOC_DAPM_SINGLE("BST1 Switch", RT5659_REC1_L2_MIXER,
1819 RT5659_M_BST1_RM1_L_SFT, 1, 1),
1822 static const struct snd_kcontrol_new rt5659_rec1_r_mix[] = {
1823 SOC_DAPM_SINGLE("HPOVOLR Switch", RT5659_REC1_L2_MIXER,
1824 RT5659_M_HPOVOLR_RM1_R_SFT, 1, 1),
1825 SOC_DAPM_SINGLE("INR Switch", RT5659_REC1_R2_MIXER,
1826 RT5659_M_INR_RM1_R_SFT, 1, 1),
1827 SOC_DAPM_SINGLE("BST4 Switch", RT5659_REC1_R2_MIXER,
1828 RT5659_M_BST4_RM1_R_SFT, 1, 1),
1829 SOC_DAPM_SINGLE("BST3 Switch", RT5659_REC1_R2_MIXER,
1830 RT5659_M_BST3_RM1_R_SFT, 1, 1),
1831 SOC_DAPM_SINGLE("BST2 Switch", RT5659_REC1_R2_MIXER,
1832 RT5659_M_BST2_RM1_R_SFT, 1, 1),
1833 SOC_DAPM_SINGLE("BST1 Switch", RT5659_REC1_R2_MIXER,
1834 RT5659_M_BST1_RM1_R_SFT, 1, 1),
1837 static const struct snd_kcontrol_new rt5659_rec2_l_mix[] = {
1838 SOC_DAPM_SINGLE("SPKVOLL Switch", RT5659_REC2_L2_MIXER,
1839 RT5659_M_SPKVOL_RM2_L_SFT, 1, 1),
1840 SOC_DAPM_SINGLE("OUTVOLL Switch", RT5659_REC2_L2_MIXER,
1841 RT5659_M_OUTVOLL_RM2_L_SFT, 1, 1),
1842 SOC_DAPM_SINGLE("BST4 Switch", RT5659_REC2_L2_MIXER,
1843 RT5659_M_BST4_RM2_L_SFT, 1, 1),
1844 SOC_DAPM_SINGLE("BST3 Switch", RT5659_REC2_L2_MIXER,
1845 RT5659_M_BST3_RM2_L_SFT, 1, 1),
1846 SOC_DAPM_SINGLE("BST2 Switch", RT5659_REC2_L2_MIXER,
1847 RT5659_M_BST2_RM2_L_SFT, 1, 1),
1848 SOC_DAPM_SINGLE("BST1 Switch", RT5659_REC2_L2_MIXER,
1849 RT5659_M_BST1_RM2_L_SFT, 1, 1),
1852 static const struct snd_kcontrol_new rt5659_rec2_r_mix[] = {
1853 SOC_DAPM_SINGLE("MONOVOL Switch", RT5659_REC2_R2_MIXER,
1854 RT5659_M_MONOVOL_RM2_R_SFT, 1, 1),
1855 SOC_DAPM_SINGLE("OUTVOLR Switch", RT5659_REC2_R2_MIXER,
1856 RT5659_M_OUTVOLR_RM2_R_SFT, 1, 1),
1857 SOC_DAPM_SINGLE("BST4 Switch", RT5659_REC2_R2_MIXER,
1858 RT5659_M_BST4_RM2_R_SFT, 1, 1),
1859 SOC_DAPM_SINGLE("BST3 Switch", RT5659_REC2_R2_MIXER,
1860 RT5659_M_BST3_RM2_R_SFT, 1, 1),
1861 SOC_DAPM_SINGLE("BST2 Switch", RT5659_REC2_R2_MIXER,
1862 RT5659_M_BST2_RM2_R_SFT, 1, 1),
1863 SOC_DAPM_SINGLE("BST1 Switch", RT5659_REC2_R2_MIXER,
1864 RT5659_M_BST1_RM2_R_SFT, 1, 1),
1867 static const struct snd_kcontrol_new rt5659_spk_l_mix[] = {
1868 SOC_DAPM_SINGLE("DAC L2 Switch", RT5659_SPK_L_MIXER,
1869 RT5659_M_DAC_L2_SM_L_SFT, 1, 1),
1870 SOC_DAPM_SINGLE("BST1 Switch", RT5659_SPK_L_MIXER,
1871 RT5659_M_BST1_SM_L_SFT, 1, 1),
1872 SOC_DAPM_SINGLE("INL Switch", RT5659_SPK_L_MIXER,
1873 RT5659_M_IN_L_SM_L_SFT, 1, 1),
1874 SOC_DAPM_SINGLE("INR Switch", RT5659_SPK_L_MIXER,
1875 RT5659_M_IN_R_SM_L_SFT, 1, 1),
1876 SOC_DAPM_SINGLE("BST3 Switch", RT5659_SPK_L_MIXER,
1877 RT5659_M_BST3_SM_L_SFT, 1, 1),
1880 static const struct snd_kcontrol_new rt5659_spk_r_mix[] = {
1881 SOC_DAPM_SINGLE("DAC R2 Switch", RT5659_SPK_R_MIXER,
1882 RT5659_M_DAC_R2_SM_R_SFT, 1, 1),
1883 SOC_DAPM_SINGLE("BST4 Switch", RT5659_SPK_R_MIXER,
1884 RT5659_M_BST4_SM_R_SFT, 1, 1),
1885 SOC_DAPM_SINGLE("INL Switch", RT5659_SPK_R_MIXER,
1886 RT5659_M_IN_L_SM_R_SFT, 1, 1),
1887 SOC_DAPM_SINGLE("INR Switch", RT5659_SPK_R_MIXER,
1888 RT5659_M_IN_R_SM_R_SFT, 1, 1),
1889 SOC_DAPM_SINGLE("BST3 Switch", RT5659_SPK_R_MIXER,
1890 RT5659_M_BST3_SM_R_SFT, 1, 1),
1893 static const struct snd_kcontrol_new rt5659_monovol_mix[] = {
1894 SOC_DAPM_SINGLE("DAC L2 Switch", RT5659_MONOMIX_IN_GAIN,
1895 RT5659_M_DAC_L2_MM_SFT, 1, 1),
1896 SOC_DAPM_SINGLE("DAC R2 Switch", RT5659_MONOMIX_IN_GAIN,
1897 RT5659_M_DAC_R2_MM_SFT, 1, 1),
1898 SOC_DAPM_SINGLE("BST1 Switch", RT5659_MONOMIX_IN_GAIN,
1899 RT5659_M_BST1_MM_SFT, 1, 1),
1900 SOC_DAPM_SINGLE("BST2 Switch", RT5659_MONOMIX_IN_GAIN,
1901 RT5659_M_BST2_MM_SFT, 1, 1),
1902 SOC_DAPM_SINGLE("BST3 Switch", RT5659_MONOMIX_IN_GAIN,
1903 RT5659_M_BST3_MM_SFT, 1, 1),
1906 static const struct snd_kcontrol_new rt5659_out_l_mix[] = {
1907 SOC_DAPM_SINGLE("DAC L2 Switch", RT5659_OUT_L_MIXER,
1908 RT5659_M_DAC_L2_OM_L_SFT, 1, 1),
1909 SOC_DAPM_SINGLE("INL Switch", RT5659_OUT_L_MIXER,
1910 RT5659_M_IN_L_OM_L_SFT, 1, 1),
1911 SOC_DAPM_SINGLE("BST1 Switch", RT5659_OUT_L_MIXER,
1912 RT5659_M_BST1_OM_L_SFT, 1, 1),
1913 SOC_DAPM_SINGLE("BST2 Switch", RT5659_OUT_L_MIXER,
1914 RT5659_M_BST2_OM_L_SFT, 1, 1),
1915 SOC_DAPM_SINGLE("BST3 Switch", RT5659_OUT_L_MIXER,
1916 RT5659_M_BST3_OM_L_SFT, 1, 1),
1919 static const struct snd_kcontrol_new rt5659_out_r_mix[] = {
1920 SOC_DAPM_SINGLE("DAC R2 Switch", RT5659_OUT_R_MIXER,
1921 RT5659_M_DAC_R2_OM_R_SFT, 1, 1),
1922 SOC_DAPM_SINGLE("INR Switch", RT5659_OUT_R_MIXER,
1923 RT5659_M_IN_R_OM_R_SFT, 1, 1),
1924 SOC_DAPM_SINGLE("BST2 Switch", RT5659_OUT_R_MIXER,
1925 RT5659_M_BST2_OM_R_SFT, 1, 1),
1926 SOC_DAPM_SINGLE("BST3 Switch", RT5659_OUT_R_MIXER,
1927 RT5659_M_BST3_OM_R_SFT, 1, 1),
1928 SOC_DAPM_SINGLE("BST4 Switch", RT5659_OUT_R_MIXER,
1929 RT5659_M_BST4_OM_R_SFT, 1, 1),
1932 static const struct snd_kcontrol_new rt5659_spo_l_mix[] = {
1933 SOC_DAPM_SINGLE("DAC L2 Switch", RT5659_SPO_AMP_GAIN,
1934 RT5659_M_DAC_L2_SPKOMIX_SFT, 1, 0),
1935 SOC_DAPM_SINGLE("SPKVOL L Switch", RT5659_SPO_AMP_GAIN,
1936 RT5659_M_SPKVOLL_SPKOMIX_SFT, 1, 0),
1939 static const struct snd_kcontrol_new rt5659_spo_r_mix[] = {
1940 SOC_DAPM_SINGLE("DAC R2 Switch", RT5659_SPO_AMP_GAIN,
1941 RT5659_M_DAC_R2_SPKOMIX_SFT, 1, 0),
1942 SOC_DAPM_SINGLE("SPKVOL R Switch", RT5659_SPO_AMP_GAIN,
1943 RT5659_M_SPKVOLR_SPKOMIX_SFT, 1, 0),
1946 static const struct snd_kcontrol_new rt5659_mono_mix[] = {
1947 SOC_DAPM_SINGLE("DAC L2 Switch", RT5659_MONOMIX_IN_GAIN,
1948 RT5659_M_DAC_L2_MA_SFT, 1, 1),
1949 SOC_DAPM_SINGLE("MONOVOL Switch", RT5659_MONOMIX_IN_GAIN,
1950 RT5659_M_MONOVOL_MA_SFT, 1, 1),
1953 static const struct snd_kcontrol_new rt5659_lout_l_mix[] = {
1954 SOC_DAPM_SINGLE("DAC L2 Switch", RT5659_LOUT_MIXER,
1955 RT5659_M_DAC_L2_LM_SFT, 1, 1),
1956 SOC_DAPM_SINGLE("OUTVOL L Switch", RT5659_LOUT_MIXER,
1957 RT5659_M_OV_L_LM_SFT, 1, 1),
1960 static const struct snd_kcontrol_new rt5659_lout_r_mix[] = {
1961 SOC_DAPM_SINGLE("DAC R2 Switch", RT5659_LOUT_MIXER,
1962 RT5659_M_DAC_R2_LM_SFT, 1, 1),
1963 SOC_DAPM_SINGLE("OUTVOL R Switch", RT5659_LOUT_MIXER,
1964 RT5659_M_OV_R_LM_SFT, 1, 1),
1968 /*MX-1B [6:4], MX-1B [2:0]*/
1969 static const char * const rt5659_dac2_src[] = {
1970 "IF1 DAC2", "IF2 DAC", "IF3 DAC", "Mono ADC MIX"
1973 static SOC_ENUM_SINGLE_DECL(
1974 rt5659_dac_l2_enum, RT5659_DAC_CTRL,
1975 RT5659_DAC_L2_SEL_SFT, rt5659_dac2_src);
1977 static const struct snd_kcontrol_new rt5659_dac_l2_mux =
1978 SOC_DAPM_ENUM("DAC L2 Source", rt5659_dac_l2_enum);
1980 static SOC_ENUM_SINGLE_DECL(
1981 rt5659_dac_r2_enum, RT5659_DAC_CTRL,
1982 RT5659_DAC_R2_SEL_SFT, rt5659_dac2_src);
1984 static const struct snd_kcontrol_new rt5659_dac_r2_mux =
1985 SOC_DAPM_ENUM("DAC R2 Source", rt5659_dac_r2_enum);
1988 /* STO1 ADC1 Source */
1990 static const char * const rt5659_sto1_adc1_src[] = {
1994 static SOC_ENUM_SINGLE_DECL(
1995 rt5659_sto1_adc1_enum, RT5659_STO1_ADC_MIXER,
1996 RT5659_STO1_ADC1_SRC_SFT, rt5659_sto1_adc1_src);
1998 static const struct snd_kcontrol_new rt5659_sto1_adc1_mux =
1999 SOC_DAPM_ENUM("Stereo1 ADC1 Source", rt5659_sto1_adc1_enum);
2001 /* STO1 ADC Source */
2003 static const char * const rt5659_sto1_adc_src[] = {
2007 static SOC_ENUM_SINGLE_DECL(
2008 rt5659_sto1_adc_enum, RT5659_STO1_ADC_MIXER,
2009 RT5659_STO1_ADC_SRC_SFT, rt5659_sto1_adc_src);
2011 static const struct snd_kcontrol_new rt5659_sto1_adc_mux =
2012 SOC_DAPM_ENUM("Stereo1 ADC Source", rt5659_sto1_adc_enum);
2014 /* STO1 ADC2 Source */
2016 static const char * const rt5659_sto1_adc2_src[] = {
2020 static SOC_ENUM_SINGLE_DECL(
2021 rt5659_sto1_adc2_enum, RT5659_STO1_ADC_MIXER,
2022 RT5659_STO1_ADC2_SRC_SFT, rt5659_sto1_adc2_src);
2024 static const struct snd_kcontrol_new rt5659_sto1_adc2_mux =
2025 SOC_DAPM_ENUM("Stereo1 ADC2 Source", rt5659_sto1_adc2_enum);
2027 /* STO1 DMIC Source */
2029 static const char * const rt5659_sto1_dmic_src[] = {
2033 static SOC_ENUM_SINGLE_DECL(
2034 rt5659_sto1_dmic_enum, RT5659_STO1_ADC_MIXER,
2035 RT5659_STO1_DMIC_SRC_SFT, rt5659_sto1_dmic_src);
2037 static const struct snd_kcontrol_new rt5659_sto1_dmic_mux =
2038 SOC_DAPM_ENUM("Stereo1 DMIC Source", rt5659_sto1_dmic_enum);
2041 /* MONO ADC L2 Source */
2043 static const char * const rt5659_mono_adc_l2_src[] = {
2044 "Mono DAC MIXL", "DMIC"
2047 static SOC_ENUM_SINGLE_DECL(
2048 rt5659_mono_adc_l2_enum, RT5659_MONO_ADC_MIXER,
2049 RT5659_MONO_ADC_L2_SRC_SFT, rt5659_mono_adc_l2_src);
2051 static const struct snd_kcontrol_new rt5659_mono_adc_l2_mux =
2052 SOC_DAPM_ENUM("Mono ADC L2 Source", rt5659_mono_adc_l2_enum);
2055 /* MONO ADC L1 Source */
2057 static const char * const rt5659_mono_adc_l1_src[] = {
2058 "Mono DAC MIXL", "ADC"
2061 static SOC_ENUM_SINGLE_DECL(
2062 rt5659_mono_adc_l1_enum, RT5659_MONO_ADC_MIXER,
2063 RT5659_MONO_ADC_L1_SRC_SFT, rt5659_mono_adc_l1_src);
2065 static const struct snd_kcontrol_new rt5659_mono_adc_l1_mux =
2066 SOC_DAPM_ENUM("Mono ADC L1 Source", rt5659_mono_adc_l1_enum);
2068 /* MONO ADC L Source, MONO ADC R Source*/
2069 /* MX-27 [10:9], MX-27 [2:1] */
2070 static const char * const rt5659_mono_adc_src[] = {
2071 "ADC1 L", "ADC1 R", "ADC2 L", "ADC2 R"
2074 static SOC_ENUM_SINGLE_DECL(
2075 rt5659_mono_adc_l_enum, RT5659_MONO_ADC_MIXER,
2076 RT5659_MONO_ADC_L_SRC_SFT, rt5659_mono_adc_src);
2078 static const struct snd_kcontrol_new rt5659_mono_adc_l_mux =
2079 SOC_DAPM_ENUM("Mono ADC L Source", rt5659_mono_adc_l_enum);
2081 static SOC_ENUM_SINGLE_DECL(
2082 rt5659_mono_adcr_enum, RT5659_MONO_ADC_MIXER,
2083 RT5659_MONO_ADC_R_SRC_SFT, rt5659_mono_adc_src);
2085 static const struct snd_kcontrol_new rt5659_mono_adc_r_mux =
2086 SOC_DAPM_ENUM("Mono ADC R Source", rt5659_mono_adcr_enum);
2088 /* MONO DMIC L Source */
2090 static const char * const rt5659_mono_dmic_l_src[] = {
2091 "DMIC1 L", "DMIC2 L"
2094 static SOC_ENUM_SINGLE_DECL(
2095 rt5659_mono_dmic_l_enum, RT5659_MONO_ADC_MIXER,
2096 RT5659_MONO_DMIC_L_SRC_SFT, rt5659_mono_dmic_l_src);
2098 static const struct snd_kcontrol_new rt5659_mono_dmic_l_mux =
2099 SOC_DAPM_ENUM("Mono DMIC L Source", rt5659_mono_dmic_l_enum);
2101 /* MONO ADC R2 Source */
2103 static const char * const rt5659_mono_adc_r2_src[] = {
2104 "Mono DAC MIXR", "DMIC"
2107 static SOC_ENUM_SINGLE_DECL(
2108 rt5659_mono_adc_r2_enum, RT5659_MONO_ADC_MIXER,
2109 RT5659_MONO_ADC_R2_SRC_SFT, rt5659_mono_adc_r2_src);
2111 static const struct snd_kcontrol_new rt5659_mono_adc_r2_mux =
2112 SOC_DAPM_ENUM("Mono ADC R2 Source", rt5659_mono_adc_r2_enum);
2114 /* MONO ADC R1 Source */
2116 static const char * const rt5659_mono_adc_r1_src[] = {
2117 "Mono DAC MIXR", "ADC"
2120 static SOC_ENUM_SINGLE_DECL(
2121 rt5659_mono_adc_r1_enum, RT5659_MONO_ADC_MIXER,
2122 RT5659_MONO_ADC_R1_SRC_SFT, rt5659_mono_adc_r1_src);
2124 static const struct snd_kcontrol_new rt5659_mono_adc_r1_mux =
2125 SOC_DAPM_ENUM("Mono ADC R1 Source", rt5659_mono_adc_r1_enum);
2127 /* MONO DMIC R Source */
2129 static const char * const rt5659_mono_dmic_r_src[] = {
2130 "DMIC1 R", "DMIC2 R"
2133 static SOC_ENUM_SINGLE_DECL(
2134 rt5659_mono_dmic_r_enum, RT5659_MONO_ADC_MIXER,
2135 RT5659_MONO_DMIC_R_SRC_SFT, rt5659_mono_dmic_r_src);
2137 static const struct snd_kcontrol_new rt5659_mono_dmic_r_mux =
2138 SOC_DAPM_ENUM("Mono DMIC R Source", rt5659_mono_dmic_r_enum);
2141 /* DAC R1 Source, DAC L1 Source*/
2142 /* MX-29 [11:10], MX-29 [9:8]*/
2143 static const char * const rt5659_dac1_src[] = {
2144 "IF1 DAC1", "IF2 DAC", "IF3 DAC"
2147 static SOC_ENUM_SINGLE_DECL(
2148 rt5659_dac_r1_enum, RT5659_AD_DA_MIXER,
2149 RT5659_DAC1_R_SEL_SFT, rt5659_dac1_src);
2151 static const struct snd_kcontrol_new rt5659_dac_r1_mux =
2152 SOC_DAPM_ENUM("DAC R1 Source", rt5659_dac_r1_enum);
2154 static SOC_ENUM_SINGLE_DECL(
2155 rt5659_dac_l1_enum, RT5659_AD_DA_MIXER,
2156 RT5659_DAC1_L_SEL_SFT, rt5659_dac1_src);
2158 static const struct snd_kcontrol_new rt5659_dac_l1_mux =
2159 SOC_DAPM_ENUM("DAC L1 Source", rt5659_dac_l1_enum);
2161 /* DAC Digital Mixer L Source, DAC Digital Mixer R Source*/
2162 /* MX-2C [6], MX-2C [4]*/
2163 static const char * const rt5659_dig_dac_mix_src[] = {
2164 "Stereo DAC Mixer", "Mono DAC Mixer"
2167 static SOC_ENUM_SINGLE_DECL(
2168 rt5659_dig_dac_mixl_enum, RT5659_DIG_MIXER,
2169 RT5659_DAC_MIX_L_SFT, rt5659_dig_dac_mix_src);
2171 static const struct snd_kcontrol_new rt5659_dig_dac_mixl_mux =
2172 SOC_DAPM_ENUM("DAC Digital Mixer L Source", rt5659_dig_dac_mixl_enum);
2174 static SOC_ENUM_SINGLE_DECL(
2175 rt5659_dig_dac_mixr_enum, RT5659_DIG_MIXER,
2176 RT5659_DAC_MIX_R_SFT, rt5659_dig_dac_mix_src);
2178 static const struct snd_kcontrol_new rt5659_dig_dac_mixr_mux =
2179 SOC_DAPM_ENUM("DAC Digital Mixer R Source", rt5659_dig_dac_mixr_enum);
2181 /* Analog DAC L1 Source, Analog DAC R1 Source*/
2182 /* MX-2D [3], MX-2D [2]*/
2183 static const char * const rt5659_alg_dac1_src[] = {
2184 "DAC", "Stereo DAC Mixer"
2187 static SOC_ENUM_SINGLE_DECL(
2188 rt5659_alg_dac_l1_enum, RT5659_A_DAC_MUX,
2189 RT5659_A_DACL1_SFT, rt5659_alg_dac1_src);
2191 static const struct snd_kcontrol_new rt5659_alg_dac_l1_mux =
2192 SOC_DAPM_ENUM("Analog DACL1 Source", rt5659_alg_dac_l1_enum);
2194 static SOC_ENUM_SINGLE_DECL(
2195 rt5659_alg_dac_r1_enum, RT5659_A_DAC_MUX,
2196 RT5659_A_DACR1_SFT, rt5659_alg_dac1_src);
2198 static const struct snd_kcontrol_new rt5659_alg_dac_r1_mux =
2199 SOC_DAPM_ENUM("Analog DACR1 Source", rt5659_alg_dac_r1_enum);
2201 /* Analog DAC LR Source, Analog DAC R2 Source*/
2202 /* MX-2D [1], MX-2D [0]*/
2203 static const char * const rt5659_alg_dac2_src[] = {
2204 "Stereo DAC Mixer", "Mono DAC Mixer"
2207 static SOC_ENUM_SINGLE_DECL(
2208 rt5659_alg_dac_l2_enum, RT5659_A_DAC_MUX,
2209 RT5659_A_DACL2_SFT, rt5659_alg_dac2_src);
2211 static const struct snd_kcontrol_new rt5659_alg_dac_l2_mux =
2212 SOC_DAPM_ENUM("Analog DAC L2 Source", rt5659_alg_dac_l2_enum);
2214 static SOC_ENUM_SINGLE_DECL(
2215 rt5659_alg_dac_r2_enum, RT5659_A_DAC_MUX,
2216 RT5659_A_DACR2_SFT, rt5659_alg_dac2_src);
2218 static const struct snd_kcontrol_new rt5659_alg_dac_r2_mux =
2219 SOC_DAPM_ENUM("Analog DAC R2 Source", rt5659_alg_dac_r2_enum);
2221 /* Interface2 ADC Data Input*/
2223 static const char * const rt5659_if2_adc_in_src[] = {
2224 "IF_ADC1", "IF_ADC2", "DAC_REF", "IF_ADC3"
2227 static SOC_ENUM_SINGLE_DECL(
2228 rt5659_if2_adc_in_enum, RT5659_DIG_INF23_DATA,
2229 RT5659_IF2_ADC_IN_SFT, rt5659_if2_adc_in_src);
2231 static const struct snd_kcontrol_new rt5659_if2_adc_in_mux =
2232 SOC_DAPM_ENUM("IF2 ADC IN Source", rt5659_if2_adc_in_enum);
2234 /* Interface3 ADC Data Input*/
2236 static const char * const rt5659_if3_adc_in_src[] = {
2237 "IF_ADC1", "IF_ADC2", "DAC_REF", "Stereo2_ADC_L/R"
2240 static SOC_ENUM_SINGLE_DECL(
2241 rt5659_if3_adc_in_enum, RT5659_DIG_INF23_DATA,
2242 RT5659_IF3_ADC_IN_SFT, rt5659_if3_adc_in_src);
2244 static const struct snd_kcontrol_new rt5659_if3_adc_in_mux =
2245 SOC_DAPM_ENUM("IF3 ADC IN Source", rt5659_if3_adc_in_enum);
2248 /* MX-31 [15] [13] */
2249 static const char * const rt5659_pdm_src[] = {
2250 "Mono DAC", "Stereo DAC"
2253 static SOC_ENUM_SINGLE_DECL(
2254 rt5659_pdm_l_enum, RT5659_PDM_OUT_CTRL,
2255 RT5659_PDM1_L_SFT, rt5659_pdm_src);
2257 static const struct snd_kcontrol_new rt5659_pdm_l_mux =
2258 SOC_DAPM_ENUM("PDM L Source", rt5659_pdm_l_enum);
2260 static SOC_ENUM_SINGLE_DECL(
2261 rt5659_pdm_r_enum, RT5659_PDM_OUT_CTRL,
2262 RT5659_PDM1_R_SFT, rt5659_pdm_src);
2264 static const struct snd_kcontrol_new rt5659_pdm_r_mux =
2265 SOC_DAPM_ENUM("PDM R Source", rt5659_pdm_r_enum);
2267 /* SPDIF Output source*/
2269 static const char * const rt5659_spdif_src[] = {
2270 "IF1_DAC1", "IF1_DAC2", "IF2_DAC", "IF3_DAC"
2273 static SOC_ENUM_SINGLE_DECL(
2274 rt5659_spdif_enum, RT5659_SPDIF_CTRL,
2275 RT5659_SPDIF_SEL_SFT, rt5659_spdif_src);
2277 static const struct snd_kcontrol_new rt5659_spdif_mux =
2278 SOC_DAPM_ENUM("SPDIF Source", rt5659_spdif_enum);
2280 /* I2S1 TDM ADCDAT Source */
2282 static const char * const rt5659_rx_adc_data_src[] = {
2283 "AD1:AD2:DAC:NUL", "AD1:AD2:NUL:DAC", "AD1:DAC:AD2:NUL",
2284 "AD1:DAC:NUL:AD2", "AD1:NUL:DAC:AD2", "AD1:NUL:AD2:DAC",
2285 "AD2:AD1:DAC:NUL", "AD2:AD1:NUL:DAC", "AD2:DAC:AD1:NUL",
2286 "AD2:DAC:NUL:AD1", "AD2:NUL:DAC:AD1", "AD1:NUL:AD1:DAC",
2287 "DAC:AD1:AD2:NUL", "DAC:AD1:NUL:AD2", "DAC:AD2:AD1:NUL",
2288 "DAC:AD2:NUL:AD1", "DAC:NUL:DAC:AD2", "DAC:NUL:AD2:DAC",
2289 "NUL:AD1:AD2:DAC", "NUL:AD1:DAC:AD2", "NUL:AD2:AD1:DAC",
2290 "NUL:AD2:DAC:AD1", "NUL:DAC:DAC:AD2", "NUL:DAC:AD2:DAC"
2293 static SOC_ENUM_SINGLE_DECL(
2294 rt5659_rx_adc_data_enum, RT5659_TDM_CTRL_2,
2295 RT5659_ADCDAT_SRC_SFT, rt5659_rx_adc_data_src);
2297 static const struct snd_kcontrol_new rt5659_rx_adc_dac_mux =
2298 SOC_DAPM_ENUM("TDM ADCDAT Source", rt5659_rx_adc_data_enum);
2300 /* Out Volume Switch */
2301 static const struct snd_kcontrol_new spkvol_l_switch =
2302 SOC_DAPM_SINGLE("Switch", RT5659_SPO_VOL, RT5659_VOL_L_SFT, 1, 1);
2304 static const struct snd_kcontrol_new spkvol_r_switch =
2305 SOC_DAPM_SINGLE("Switch", RT5659_SPO_VOL, RT5659_VOL_R_SFT, 1, 1);
2307 static const struct snd_kcontrol_new monovol_switch =
2308 SOC_DAPM_SINGLE("Switch", RT5659_MONO_OUT, RT5659_VOL_L_SFT, 1, 1);
2310 static const struct snd_kcontrol_new outvol_l_switch =
2311 SOC_DAPM_SINGLE("Switch", RT5659_LOUT, RT5659_VOL_L_SFT, 1, 1);
2313 static const struct snd_kcontrol_new outvol_r_switch =
2314 SOC_DAPM_SINGLE("Switch", RT5659_LOUT, RT5659_VOL_R_SFT, 1, 1);
2317 static const struct snd_kcontrol_new spo_switch =
2318 SOC_DAPM_SINGLE("Switch", RT5659_CLASSD_2, RT5659_M_RF_DIG_SFT, 1, 1);
2320 static const struct snd_kcontrol_new mono_switch =
2321 SOC_DAPM_SINGLE("Switch", RT5659_MONO_OUT, RT5659_L_MUTE_SFT, 1, 1);
2323 static const struct snd_kcontrol_new hpo_l_switch =
2324 SOC_DAPM_SINGLE("Switch", RT5659_HP_VOL, RT5659_L_MUTE_SFT, 1, 1);
2326 static const struct snd_kcontrol_new hpo_r_switch =
2327 SOC_DAPM_SINGLE("Switch", RT5659_HP_VOL, RT5659_R_MUTE_SFT, 1, 1);
2329 static const struct snd_kcontrol_new lout_l_switch =
2330 SOC_DAPM_SINGLE("Switch", RT5659_LOUT, RT5659_L_MUTE_SFT, 1, 1);
2332 static const struct snd_kcontrol_new lout_r_switch =
2333 SOC_DAPM_SINGLE("Switch", RT5659_LOUT, RT5659_R_MUTE_SFT, 1, 1);
2335 static const struct snd_kcontrol_new pdm_l_switch =
2336 SOC_DAPM_SINGLE("Switch", RT5659_PDM_OUT_CTRL, RT5659_M_PDM1_L_SFT, 1,
2339 static const struct snd_kcontrol_new pdm_r_switch =
2340 SOC_DAPM_SINGLE("Switch", RT5659_PDM_OUT_CTRL, RT5659_M_PDM1_R_SFT, 1,
2343 static int rt5659_spk_event(struct snd_soc_dapm_widget *w,
2344 struct snd_kcontrol *kcontrol, int event)
2346 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
2349 case SND_SOC_DAPM_PRE_PMU:
2350 snd_soc_component_update_bits(component, RT5659_CLASSD_CTRL_1,
2351 RT5659_POW_CLSD_DB_MASK, RT5659_POW_CLSD_DB_EN);
2352 snd_soc_component_update_bits(component, RT5659_CLASSD_2,
2353 RT5659_M_RI_DIG, RT5659_M_RI_DIG);
2354 snd_soc_component_write(component, RT5659_CLASSD_1, 0x0803);
2355 snd_soc_component_write(component, RT5659_SPK_DC_CAILB_CTRL_3, 0x0000);
2358 case SND_SOC_DAPM_POST_PMD:
2359 snd_soc_component_write(component, RT5659_CLASSD_1, 0x0011);
2360 snd_soc_component_update_bits(component, RT5659_CLASSD_2,
2361 RT5659_M_RI_DIG, 0x0);
2362 snd_soc_component_write(component, RT5659_SPK_DC_CAILB_CTRL_3, 0x0003);
2363 snd_soc_component_update_bits(component, RT5659_CLASSD_CTRL_1,
2364 RT5659_POW_CLSD_DB_MASK, RT5659_POW_CLSD_DB_DIS);
2375 static int rt5659_mono_event(struct snd_soc_dapm_widget *w,
2376 struct snd_kcontrol *kcontrol, int event)
2378 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
2381 case SND_SOC_DAPM_PRE_PMU:
2382 snd_soc_component_write(component, RT5659_MONO_AMP_CALIB_CTRL_1, 0x1e00);
2385 case SND_SOC_DAPM_POST_PMD:
2386 snd_soc_component_write(component, RT5659_MONO_AMP_CALIB_CTRL_1, 0x1e04);
2397 static int rt5659_hp_event(struct snd_soc_dapm_widget *w,
2398 struct snd_kcontrol *kcontrol, int event)
2400 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
2403 case SND_SOC_DAPM_POST_PMU:
2404 snd_soc_component_write(component, RT5659_HP_CHARGE_PUMP_1, 0x0e1e);
2405 snd_soc_component_update_bits(component, RT5659_DEPOP_1, 0x0010, 0x0010);
2408 case SND_SOC_DAPM_PRE_PMD:
2409 snd_soc_component_write(component, RT5659_DEPOP_1, 0x0000);
2419 static int set_dmic_power(struct snd_soc_dapm_widget *w,
2420 struct snd_kcontrol *kcontrol, int event)
2423 case SND_SOC_DAPM_POST_PMU:
2424 /*Add delay to avoid pop noise*/
2435 static const struct snd_soc_dapm_widget rt5659_particular_dapm_widgets[] = {
2436 SND_SOC_DAPM_SUPPLY("LDO2", RT5659_PWR_ANLG_3, RT5659_PWR_LDO2_BIT, 0,
2438 SND_SOC_DAPM_SUPPLY("MICBIAS1", RT5659_PWR_ANLG_2, RT5659_PWR_MB1_BIT,
2440 SND_SOC_DAPM_SUPPLY("Mic Det Power", RT5659_PWR_VOL,
2441 RT5659_PWR_MIC_DET_BIT, 0, NULL, 0),
2444 static const struct snd_soc_dapm_widget rt5659_dapm_widgets[] = {
2445 SND_SOC_DAPM_SUPPLY("PLL", RT5659_PWR_ANLG_3, RT5659_PWR_PLL_BIT, 0,
2447 SND_SOC_DAPM_SUPPLY("Mono Vref", RT5659_PWR_ANLG_1,
2448 RT5659_PWR_VREF3_BIT, 0, NULL, 0),
2451 SND_SOC_DAPM_SUPPLY_S("I2S1 ASRC", 1, RT5659_ASRC_1,
2452 RT5659_I2S1_ASRC_SFT, 0, NULL, 0),
2453 SND_SOC_DAPM_SUPPLY_S("I2S2 ASRC", 1, RT5659_ASRC_1,
2454 RT5659_I2S2_ASRC_SFT, 0, NULL, 0),
2455 SND_SOC_DAPM_SUPPLY_S("I2S3 ASRC", 1, RT5659_ASRC_1,
2456 RT5659_I2S3_ASRC_SFT, 0, NULL, 0),
2457 SND_SOC_DAPM_SUPPLY_S("DAC STO ASRC", 1, RT5659_ASRC_1,
2458 RT5659_DAC_STO_ASRC_SFT, 0, NULL, 0),
2459 SND_SOC_DAPM_SUPPLY_S("DAC Mono L ASRC", 1, RT5659_ASRC_1,
2460 RT5659_DAC_MONO_L_ASRC_SFT, 0, NULL, 0),
2461 SND_SOC_DAPM_SUPPLY_S("DAC Mono R ASRC", 1, RT5659_ASRC_1,
2462 RT5659_DAC_MONO_R_ASRC_SFT, 0, NULL, 0),
2463 SND_SOC_DAPM_SUPPLY_S("ADC STO1 ASRC", 1, RT5659_ASRC_1,
2464 RT5659_ADC_STO1_ASRC_SFT, 0, NULL, 0),
2465 SND_SOC_DAPM_SUPPLY_S("ADC Mono L ASRC", 1, RT5659_ASRC_1,
2466 RT5659_ADC_MONO_L_ASRC_SFT, 0, NULL, 0),
2467 SND_SOC_DAPM_SUPPLY_S("ADC Mono R ASRC", 1, RT5659_ASRC_1,
2468 RT5659_ADC_MONO_R_ASRC_SFT, 0, NULL, 0),
2471 SND_SOC_DAPM_SUPPLY("MICBIAS2", RT5659_PWR_ANLG_2, RT5659_PWR_MB2_BIT,
2473 SND_SOC_DAPM_SUPPLY("MICBIAS3", RT5659_PWR_ANLG_2, RT5659_PWR_MB3_BIT,
2477 SND_SOC_DAPM_INPUT("DMIC L1"),
2478 SND_SOC_DAPM_INPUT("DMIC R1"),
2479 SND_SOC_DAPM_INPUT("DMIC L2"),
2480 SND_SOC_DAPM_INPUT("DMIC R2"),
2482 SND_SOC_DAPM_INPUT("IN1P"),
2483 SND_SOC_DAPM_INPUT("IN1N"),
2484 SND_SOC_DAPM_INPUT("IN2P"),
2485 SND_SOC_DAPM_INPUT("IN2N"),
2486 SND_SOC_DAPM_INPUT("IN3P"),
2487 SND_SOC_DAPM_INPUT("IN3N"),
2488 SND_SOC_DAPM_INPUT("IN4P"),
2489 SND_SOC_DAPM_INPUT("IN4N"),
2491 SND_SOC_DAPM_PGA("DMIC1", SND_SOC_NOPM, 0, 0, NULL, 0),
2492 SND_SOC_DAPM_PGA("DMIC2", SND_SOC_NOPM, 0, 0, NULL, 0),
2494 SND_SOC_DAPM_SUPPLY("DMIC CLK", SND_SOC_NOPM, 0, 0,
2495 set_dmic_clk, SND_SOC_DAPM_PRE_PMU),
2496 SND_SOC_DAPM_SUPPLY("DMIC1 Power", RT5659_DMIC_CTRL_1,
2497 RT5659_DMIC_1_EN_SFT, 0, set_dmic_power, SND_SOC_DAPM_POST_PMU),
2498 SND_SOC_DAPM_SUPPLY("DMIC2 Power", RT5659_DMIC_CTRL_1,
2499 RT5659_DMIC_2_EN_SFT, 0, set_dmic_power, SND_SOC_DAPM_POST_PMU),
2502 SND_SOC_DAPM_PGA("BST1", RT5659_PWR_ANLG_2,
2503 RT5659_PWR_BST1_P_BIT, 0, NULL, 0),
2504 SND_SOC_DAPM_PGA("BST2", RT5659_PWR_ANLG_2,
2505 RT5659_PWR_BST2_P_BIT, 0, NULL, 0),
2506 SND_SOC_DAPM_PGA("BST3", RT5659_PWR_ANLG_2,
2507 RT5659_PWR_BST3_P_BIT, 0, NULL, 0),
2508 SND_SOC_DAPM_PGA("BST4", RT5659_PWR_ANLG_2,
2509 RT5659_PWR_BST4_P_BIT, 0, NULL, 0),
2510 SND_SOC_DAPM_SUPPLY("BST1 Power", RT5659_PWR_ANLG_2,
2511 RT5659_PWR_BST1_BIT, 0, NULL, 0),
2512 SND_SOC_DAPM_SUPPLY("BST2 Power", RT5659_PWR_ANLG_2,
2513 RT5659_PWR_BST2_BIT, 0, NULL, 0),
2514 SND_SOC_DAPM_SUPPLY("BST3 Power", RT5659_PWR_ANLG_2,
2515 RT5659_PWR_BST3_BIT, 0, NULL, 0),
2516 SND_SOC_DAPM_SUPPLY("BST4 Power", RT5659_PWR_ANLG_2,
2517 RT5659_PWR_BST4_BIT, 0, NULL, 0),
2521 SND_SOC_DAPM_PGA("INL VOL", RT5659_PWR_VOL, RT5659_PWR_IN_L_BIT,
2523 SND_SOC_DAPM_PGA("INR VOL", RT5659_PWR_VOL, RT5659_PWR_IN_R_BIT,
2527 SND_SOC_DAPM_MIXER("RECMIX1L", RT5659_PWR_MIXER, RT5659_PWR_RM1_L_BIT,
2528 0, rt5659_rec1_l_mix, ARRAY_SIZE(rt5659_rec1_l_mix)),
2529 SND_SOC_DAPM_MIXER("RECMIX1R", RT5659_PWR_MIXER, RT5659_PWR_RM1_R_BIT,
2530 0, rt5659_rec1_r_mix, ARRAY_SIZE(rt5659_rec1_r_mix)),
2531 SND_SOC_DAPM_MIXER("RECMIX2L", RT5659_PWR_MIXER, RT5659_PWR_RM2_L_BIT,
2532 0, rt5659_rec2_l_mix, ARRAY_SIZE(rt5659_rec2_l_mix)),
2533 SND_SOC_DAPM_MIXER("RECMIX2R", RT5659_PWR_MIXER, RT5659_PWR_RM2_R_BIT,
2534 0, rt5659_rec2_r_mix, ARRAY_SIZE(rt5659_rec2_r_mix)),
2537 SND_SOC_DAPM_ADC("ADC1 L", NULL, SND_SOC_NOPM, 0, 0),
2538 SND_SOC_DAPM_ADC("ADC1 R", NULL, SND_SOC_NOPM, 0, 0),
2539 SND_SOC_DAPM_ADC("ADC2 L", NULL, SND_SOC_NOPM, 0, 0),
2540 SND_SOC_DAPM_ADC("ADC2 R", NULL, SND_SOC_NOPM, 0, 0),
2542 SND_SOC_DAPM_SUPPLY("ADC1 L Power", RT5659_PWR_DIG_1,
2543 RT5659_PWR_ADC_L1_BIT, 0, NULL, 0),
2544 SND_SOC_DAPM_SUPPLY("ADC1 R Power", RT5659_PWR_DIG_1,
2545 RT5659_PWR_ADC_R1_BIT, 0, NULL, 0),
2546 SND_SOC_DAPM_SUPPLY("ADC2 L Power", RT5659_PWR_DIG_1,
2547 RT5659_PWR_ADC_L2_BIT, 0, NULL, 0),
2548 SND_SOC_DAPM_SUPPLY("ADC2 R Power", RT5659_PWR_DIG_1,
2549 RT5659_PWR_ADC_R2_BIT, 0, NULL, 0),
2550 SND_SOC_DAPM_SUPPLY("ADC1 clock", SND_SOC_NOPM, 0, 0, set_adc1_clk,
2551 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
2552 SND_SOC_DAPM_SUPPLY("ADC2 clock", SND_SOC_NOPM, 0, 0, set_adc2_clk,
2553 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
2556 SND_SOC_DAPM_MUX("Stereo1 DMIC L Mux", SND_SOC_NOPM, 0, 0,
2557 &rt5659_sto1_dmic_mux),
2558 SND_SOC_DAPM_MUX("Stereo1 DMIC R Mux", SND_SOC_NOPM, 0, 0,
2559 &rt5659_sto1_dmic_mux),
2560 SND_SOC_DAPM_MUX("Stereo1 ADC L1 Mux", SND_SOC_NOPM, 0, 0,
2561 &rt5659_sto1_adc1_mux),
2562 SND_SOC_DAPM_MUX("Stereo1 ADC R1 Mux", SND_SOC_NOPM, 0, 0,
2563 &rt5659_sto1_adc1_mux),
2564 SND_SOC_DAPM_MUX("Stereo1 ADC L2 Mux", SND_SOC_NOPM, 0, 0,
2565 &rt5659_sto1_adc2_mux),
2566 SND_SOC_DAPM_MUX("Stereo1 ADC R2 Mux", SND_SOC_NOPM, 0, 0,
2567 &rt5659_sto1_adc2_mux),
2568 SND_SOC_DAPM_MUX("Stereo1 ADC L Mux", SND_SOC_NOPM, 0, 0,
2569 &rt5659_sto1_adc_mux),
2570 SND_SOC_DAPM_MUX("Stereo1 ADC R Mux", SND_SOC_NOPM, 0, 0,
2571 &rt5659_sto1_adc_mux),
2572 SND_SOC_DAPM_MUX("Mono ADC L2 Mux", SND_SOC_NOPM, 0, 0,
2573 &rt5659_mono_adc_l2_mux),
2574 SND_SOC_DAPM_MUX("Mono ADC R2 Mux", SND_SOC_NOPM, 0, 0,
2575 &rt5659_mono_adc_r2_mux),
2576 SND_SOC_DAPM_MUX("Mono ADC L1 Mux", SND_SOC_NOPM, 0, 0,
2577 &rt5659_mono_adc_l1_mux),
2578 SND_SOC_DAPM_MUX("Mono ADC R1 Mux", SND_SOC_NOPM, 0, 0,
2579 &rt5659_mono_adc_r1_mux),
2580 SND_SOC_DAPM_MUX("Mono DMIC L Mux", SND_SOC_NOPM, 0, 0,
2581 &rt5659_mono_dmic_l_mux),
2582 SND_SOC_DAPM_MUX("Mono DMIC R Mux", SND_SOC_NOPM, 0, 0,
2583 &rt5659_mono_dmic_r_mux),
2584 SND_SOC_DAPM_MUX("Mono ADC L Mux", SND_SOC_NOPM, 0, 0,
2585 &rt5659_mono_adc_l_mux),
2586 SND_SOC_DAPM_MUX("Mono ADC R Mux", SND_SOC_NOPM, 0, 0,
2587 &rt5659_mono_adc_r_mux),
2589 SND_SOC_DAPM_SUPPLY("ADC Stereo1 Filter", RT5659_PWR_DIG_2,
2590 RT5659_PWR_ADC_S1F_BIT, 0, NULL, 0),
2591 SND_SOC_DAPM_SUPPLY("ADC Stereo2 Filter", RT5659_PWR_DIG_2,
2592 RT5659_PWR_ADC_S2F_BIT, 0, NULL, 0),
2593 SND_SOC_DAPM_MIXER("Stereo1 ADC MIXL", SND_SOC_NOPM,
2594 0, 0, rt5659_sto1_adc_l_mix,
2595 ARRAY_SIZE(rt5659_sto1_adc_l_mix)),
2596 SND_SOC_DAPM_MIXER("Stereo1 ADC MIXR", SND_SOC_NOPM,
2597 0, 0, rt5659_sto1_adc_r_mix,
2598 ARRAY_SIZE(rt5659_sto1_adc_r_mix)),
2599 SND_SOC_DAPM_SUPPLY("ADC Mono Left Filter", RT5659_PWR_DIG_2,
2600 RT5659_PWR_ADC_MF_L_BIT, 0, NULL, 0),
2601 SND_SOC_DAPM_MIXER("Mono ADC MIXL", RT5659_MONO_ADC_DIG_VOL,
2602 RT5659_L_MUTE_SFT, 1, rt5659_mono_adc_l_mix,
2603 ARRAY_SIZE(rt5659_mono_adc_l_mix)),
2604 SND_SOC_DAPM_SUPPLY("ADC Mono Right Filter", RT5659_PWR_DIG_2,
2605 RT5659_PWR_ADC_MF_R_BIT, 0, NULL, 0),
2606 SND_SOC_DAPM_MIXER("Mono ADC MIXR", RT5659_MONO_ADC_DIG_VOL,
2607 RT5659_R_MUTE_SFT, 1, rt5659_mono_adc_r_mix,
2608 ARRAY_SIZE(rt5659_mono_adc_r_mix)),
2611 SND_SOC_DAPM_PGA("IF_ADC1", SND_SOC_NOPM, 0, 0, NULL, 0),
2612 SND_SOC_DAPM_PGA("IF_ADC2", SND_SOC_NOPM, 0, 0, NULL, 0),
2613 SND_SOC_DAPM_PGA("IF_ADC3", SND_SOC_NOPM, 0, 0, NULL, 0),
2614 SND_SOC_DAPM_PGA("IF1_ADC1", SND_SOC_NOPM, 0, 0, NULL, 0),
2615 SND_SOC_DAPM_PGA("IF1_ADC2", SND_SOC_NOPM, 0, 0, NULL, 0),
2616 SND_SOC_DAPM_PGA("IF1_ADC3", SND_SOC_NOPM, 0, 0, NULL, 0),
2617 SND_SOC_DAPM_PGA("IF1_ADC4", SND_SOC_NOPM, 0, 0, NULL, 0),
2618 SND_SOC_DAPM_PGA("Stereo2 ADC LR", SND_SOC_NOPM, 0, 0, NULL, 0),
2620 SND_SOC_DAPM_PGA("Stereo1 ADC Volume L", RT5659_STO1_ADC_DIG_VOL,
2621 RT5659_L_MUTE_SFT, 1, NULL, 0),
2622 SND_SOC_DAPM_PGA("Stereo1 ADC Volume R", RT5659_STO1_ADC_DIG_VOL,
2623 RT5659_R_MUTE_SFT, 1, NULL, 0),
2625 /* Digital Interface */
2626 SND_SOC_DAPM_SUPPLY("I2S1", RT5659_PWR_DIG_1, RT5659_PWR_I2S1_BIT,
2628 SND_SOC_DAPM_PGA("IF1 DAC1", SND_SOC_NOPM, 0, 0, NULL, 0),
2629 SND_SOC_DAPM_PGA("IF1 DAC2", SND_SOC_NOPM, 0, 0, NULL, 0),
2630 SND_SOC_DAPM_PGA("IF1 DAC1 L", SND_SOC_NOPM, 0, 0, NULL, 0),
2631 SND_SOC_DAPM_PGA("IF1 DAC1 R", SND_SOC_NOPM, 0, 0, NULL, 0),
2632 SND_SOC_DAPM_PGA("IF1 DAC2 L", SND_SOC_NOPM, 0, 0, NULL, 0),
2633 SND_SOC_DAPM_PGA("IF1 DAC2 R", SND_SOC_NOPM, 0, 0, NULL, 0),
2634 SND_SOC_DAPM_PGA("IF1 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
2635 SND_SOC_DAPM_PGA("IF1 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
2636 SND_SOC_DAPM_PGA("IF1 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
2637 SND_SOC_DAPM_SUPPLY("I2S2", RT5659_PWR_DIG_1, RT5659_PWR_I2S2_BIT, 0,
2639 SND_SOC_DAPM_PGA("IF2 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
2640 SND_SOC_DAPM_PGA("IF2 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
2641 SND_SOC_DAPM_PGA("IF2 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
2642 SND_SOC_DAPM_PGA("IF2 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
2643 SND_SOC_DAPM_PGA("IF2 ADC1", SND_SOC_NOPM, 0, 0, NULL, 0),
2644 SND_SOC_DAPM_PGA("IF2 ADC2", SND_SOC_NOPM, 0, 0, NULL, 0),
2645 SND_SOC_DAPM_SUPPLY("I2S3", RT5659_PWR_DIG_1, RT5659_PWR_I2S3_BIT, 0,
2647 SND_SOC_DAPM_PGA("IF3 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
2648 SND_SOC_DAPM_PGA("IF3 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
2649 SND_SOC_DAPM_PGA("IF3 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
2650 SND_SOC_DAPM_PGA("IF3 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
2651 SND_SOC_DAPM_PGA("IF3 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
2652 SND_SOC_DAPM_PGA("IF3 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
2654 /* Digital Interface Select */
2655 SND_SOC_DAPM_PGA("TDM AD1:AD2:DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
2656 SND_SOC_DAPM_PGA("TDM AD2:DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
2657 SND_SOC_DAPM_MUX("TDM Data Mux", SND_SOC_NOPM, 0, 0,
2658 &rt5659_rx_adc_dac_mux),
2659 SND_SOC_DAPM_MUX("IF2 ADC Mux", SND_SOC_NOPM, 0, 0,
2660 &rt5659_if2_adc_in_mux),
2661 SND_SOC_DAPM_MUX("IF3 ADC Mux", SND_SOC_NOPM, 0, 0,
2662 &rt5659_if3_adc_in_mux),
2663 SND_SOC_DAPM_MUX("IF1 01 ADC Swap Mux", SND_SOC_NOPM, 0, 0,
2664 &rt5659_if1_01_adc_swap_mux),
2665 SND_SOC_DAPM_MUX("IF1 23 ADC Swap Mux", SND_SOC_NOPM, 0, 0,
2666 &rt5659_if1_23_adc_swap_mux),
2667 SND_SOC_DAPM_MUX("IF1 45 ADC Swap Mux", SND_SOC_NOPM, 0, 0,
2668 &rt5659_if1_45_adc_swap_mux),
2669 SND_SOC_DAPM_MUX("IF1 67 ADC Swap Mux", SND_SOC_NOPM, 0, 0,
2670 &rt5659_if1_67_adc_swap_mux),
2671 SND_SOC_DAPM_MUX("IF2 DAC Swap Mux", SND_SOC_NOPM, 0, 0,
2672 &rt5659_if2_dac_swap_mux),
2673 SND_SOC_DAPM_MUX("IF2 ADC Swap Mux", SND_SOC_NOPM, 0, 0,
2674 &rt5659_if2_adc_swap_mux),
2675 SND_SOC_DAPM_MUX("IF3 DAC Swap Mux", SND_SOC_NOPM, 0, 0,
2676 &rt5659_if3_dac_swap_mux),
2677 SND_SOC_DAPM_MUX("IF3 ADC Swap Mux", SND_SOC_NOPM, 0, 0,
2678 &rt5659_if3_adc_swap_mux),
2680 /* Audio Interface */
2681 SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
2682 SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0),
2683 SND_SOC_DAPM_AIF_IN("AIF2RX", "AIF2 Playback", 0, SND_SOC_NOPM, 0, 0),
2684 SND_SOC_DAPM_AIF_OUT("AIF2TX", "AIF2 Capture", 0, SND_SOC_NOPM, 0, 0),
2685 SND_SOC_DAPM_AIF_IN("AIF3RX", "AIF3 Playback", 0, SND_SOC_NOPM, 0, 0),
2686 SND_SOC_DAPM_AIF_OUT("AIF3TX", "AIF3 Capture", 0, SND_SOC_NOPM, 0, 0),
2689 /* DAC mixer before sound effect */
2690 SND_SOC_DAPM_MIXER("DAC1 MIXL", SND_SOC_NOPM, 0, 0,
2691 rt5659_dac_l_mix, ARRAY_SIZE(rt5659_dac_l_mix)),
2692 SND_SOC_DAPM_MIXER("DAC1 MIXR", SND_SOC_NOPM, 0, 0,
2693 rt5659_dac_r_mix, ARRAY_SIZE(rt5659_dac_r_mix)),
2695 /* DAC channel Mux */
2696 SND_SOC_DAPM_MUX("DAC L1 Mux", SND_SOC_NOPM, 0, 0, &rt5659_dac_l1_mux),
2697 SND_SOC_DAPM_MUX("DAC R1 Mux", SND_SOC_NOPM, 0, 0, &rt5659_dac_r1_mux),
2698 SND_SOC_DAPM_MUX("DAC L2 Mux", SND_SOC_NOPM, 0, 0, &rt5659_dac_l2_mux),
2699 SND_SOC_DAPM_MUX("DAC R2 Mux", SND_SOC_NOPM, 0, 0, &rt5659_dac_r2_mux),
2701 SND_SOC_DAPM_MUX("DAC L1 Source", SND_SOC_NOPM, 0, 0,
2702 &rt5659_alg_dac_l1_mux),
2703 SND_SOC_DAPM_MUX("DAC R1 Source", SND_SOC_NOPM, 0, 0,
2704 &rt5659_alg_dac_r1_mux),
2705 SND_SOC_DAPM_MUX("DAC L2 Source", SND_SOC_NOPM, 0, 0,
2706 &rt5659_alg_dac_l2_mux),
2707 SND_SOC_DAPM_MUX("DAC R2 Source", SND_SOC_NOPM, 0, 0,
2708 &rt5659_alg_dac_r2_mux),
2711 SND_SOC_DAPM_SUPPLY("DAC Stereo1 Filter", RT5659_PWR_DIG_2,
2712 RT5659_PWR_DAC_S1F_BIT, 0, NULL, 0),
2713 SND_SOC_DAPM_SUPPLY("DAC Mono Left Filter", RT5659_PWR_DIG_2,
2714 RT5659_PWR_DAC_MF_L_BIT, 0, NULL, 0),
2715 SND_SOC_DAPM_SUPPLY("DAC Mono Right Filter", RT5659_PWR_DIG_2,
2716 RT5659_PWR_DAC_MF_R_BIT, 0, NULL, 0),
2717 SND_SOC_DAPM_MIXER("Stereo DAC MIXL", SND_SOC_NOPM, 0, 0,
2718 rt5659_sto_dac_l_mix, ARRAY_SIZE(rt5659_sto_dac_l_mix)),
2719 SND_SOC_DAPM_MIXER("Stereo DAC MIXR", SND_SOC_NOPM, 0, 0,
2720 rt5659_sto_dac_r_mix, ARRAY_SIZE(rt5659_sto_dac_r_mix)),
2721 SND_SOC_DAPM_MIXER("Mono DAC MIXL", SND_SOC_NOPM, 0, 0,
2722 rt5659_mono_dac_l_mix, ARRAY_SIZE(rt5659_mono_dac_l_mix)),
2723 SND_SOC_DAPM_MIXER("Mono DAC MIXR", SND_SOC_NOPM, 0, 0,
2724 rt5659_mono_dac_r_mix, ARRAY_SIZE(rt5659_mono_dac_r_mix)),
2725 SND_SOC_DAPM_MUX("DAC MIXL", SND_SOC_NOPM, 0, 0,
2726 &rt5659_dig_dac_mixl_mux),
2727 SND_SOC_DAPM_MUX("DAC MIXR", SND_SOC_NOPM, 0, 0,
2728 &rt5659_dig_dac_mixr_mux),
2731 SND_SOC_DAPM_SUPPLY_S("DAC L1 Power", 1, RT5659_PWR_DIG_1,
2732 RT5659_PWR_DAC_L1_BIT, 0, NULL, 0),
2733 SND_SOC_DAPM_SUPPLY_S("DAC R1 Power", 1, RT5659_PWR_DIG_1,
2734 RT5659_PWR_DAC_R1_BIT, 0, NULL, 0),
2735 SND_SOC_DAPM_DAC("DAC L1", NULL, SND_SOC_NOPM, 0, 0),
2736 SND_SOC_DAPM_DAC("DAC R1", NULL, SND_SOC_NOPM, 0, 0),
2738 SND_SOC_DAPM_SUPPLY("DAC L2 Power", RT5659_PWR_DIG_1,
2739 RT5659_PWR_DAC_L2_BIT, 0, NULL, 0),
2740 SND_SOC_DAPM_SUPPLY("DAC R2 Power", RT5659_PWR_DIG_1,
2741 RT5659_PWR_DAC_R2_BIT, 0, NULL, 0),
2742 SND_SOC_DAPM_DAC("DAC L2", NULL, SND_SOC_NOPM, 0, 0),
2743 SND_SOC_DAPM_DAC("DAC R2", NULL, SND_SOC_NOPM, 0, 0),
2744 SND_SOC_DAPM_PGA("DAC_REF", SND_SOC_NOPM, 0, 0, NULL, 0),
2747 SND_SOC_DAPM_MIXER("SPK MIXL", RT5659_PWR_MIXER, RT5659_PWR_SM_L_BIT,
2748 0, rt5659_spk_l_mix, ARRAY_SIZE(rt5659_spk_l_mix)),
2749 SND_SOC_DAPM_MIXER("SPK MIXR", RT5659_PWR_MIXER, RT5659_PWR_SM_R_BIT,
2750 0, rt5659_spk_r_mix, ARRAY_SIZE(rt5659_spk_r_mix)),
2751 SND_SOC_DAPM_MIXER("MONOVOL MIX", RT5659_PWR_MIXER, RT5659_PWR_MM_BIT,
2752 0, rt5659_monovol_mix, ARRAY_SIZE(rt5659_monovol_mix)),
2753 SND_SOC_DAPM_MIXER("OUT MIXL", RT5659_PWR_MIXER, RT5659_PWR_OM_L_BIT,
2754 0, rt5659_out_l_mix, ARRAY_SIZE(rt5659_out_l_mix)),
2755 SND_SOC_DAPM_MIXER("OUT MIXR", RT5659_PWR_MIXER, RT5659_PWR_OM_R_BIT,
2756 0, rt5659_out_r_mix, ARRAY_SIZE(rt5659_out_r_mix)),
2759 SND_SOC_DAPM_SWITCH("SPKVOL L", RT5659_PWR_VOL, RT5659_PWR_SV_L_BIT, 0,
2761 SND_SOC_DAPM_SWITCH("SPKVOL R", RT5659_PWR_VOL, RT5659_PWR_SV_R_BIT, 0,
2763 SND_SOC_DAPM_SWITCH("MONOVOL", RT5659_PWR_VOL, RT5659_PWR_MV_BIT, 0,
2765 SND_SOC_DAPM_SWITCH("OUTVOL L", RT5659_PWR_VOL, RT5659_PWR_OV_L_BIT, 0,
2767 SND_SOC_DAPM_SWITCH("OUTVOL R", RT5659_PWR_VOL, RT5659_PWR_OV_R_BIT, 0,
2770 /* SPO/MONO/HPO/LOUT */
2771 SND_SOC_DAPM_MIXER("SPO L MIX", SND_SOC_NOPM, 0, 0, rt5659_spo_l_mix,
2772 ARRAY_SIZE(rt5659_spo_l_mix)),
2773 SND_SOC_DAPM_MIXER("SPO R MIX", SND_SOC_NOPM, 0, 0, rt5659_spo_r_mix,
2774 ARRAY_SIZE(rt5659_spo_r_mix)),
2775 SND_SOC_DAPM_MIXER("Mono MIX", SND_SOC_NOPM, 0, 0, rt5659_mono_mix,
2776 ARRAY_SIZE(rt5659_mono_mix)),
2777 SND_SOC_DAPM_MIXER("LOUT L MIX", SND_SOC_NOPM, 0, 0, rt5659_lout_l_mix,
2778 ARRAY_SIZE(rt5659_lout_l_mix)),
2779 SND_SOC_DAPM_MIXER("LOUT R MIX", SND_SOC_NOPM, 0, 0, rt5659_lout_r_mix,
2780 ARRAY_SIZE(rt5659_lout_r_mix)),
2782 SND_SOC_DAPM_PGA_S("SPK Amp", 1, RT5659_PWR_DIG_1, RT5659_PWR_CLS_D_BIT,
2783 0, rt5659_spk_event, SND_SOC_DAPM_POST_PMD |
2784 SND_SOC_DAPM_PRE_PMU),
2785 SND_SOC_DAPM_PGA_S("Mono Amp", 1, RT5659_PWR_ANLG_1, RT5659_PWR_MA_BIT,
2786 0, rt5659_mono_event, SND_SOC_DAPM_POST_PMD |
2787 SND_SOC_DAPM_PRE_PMU),
2788 SND_SOC_DAPM_PGA_S("HP Amp", 1, SND_SOC_NOPM, 0, 0, rt5659_hp_event,
2789 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
2790 SND_SOC_DAPM_PGA_S("LOUT Amp", 1, RT5659_PWR_ANLG_1, RT5659_PWR_LM_BIT,
2793 SND_SOC_DAPM_SUPPLY("Charge Pump", SND_SOC_NOPM, 0, 0,
2794 rt5659_charge_pump_event, SND_SOC_DAPM_PRE_PMU |
2795 SND_SOC_DAPM_POST_PMD),
2797 SND_SOC_DAPM_SWITCH("SPO Playback", SND_SOC_NOPM, 0, 0, &spo_switch),
2798 SND_SOC_DAPM_SWITCH("Mono Playback", SND_SOC_NOPM, 0, 0,
2800 SND_SOC_DAPM_SWITCH("HPO L Playback", SND_SOC_NOPM, 0, 0,
2802 SND_SOC_DAPM_SWITCH("HPO R Playback", SND_SOC_NOPM, 0, 0,
2804 SND_SOC_DAPM_SWITCH("LOUT L Playback", SND_SOC_NOPM, 0, 0,
2806 SND_SOC_DAPM_SWITCH("LOUT R Playback", SND_SOC_NOPM, 0, 0,
2808 SND_SOC_DAPM_SWITCH("PDM L Playback", SND_SOC_NOPM, 0, 0,
2810 SND_SOC_DAPM_SWITCH("PDM R Playback", SND_SOC_NOPM, 0, 0,
2814 SND_SOC_DAPM_SUPPLY("PDM Power", RT5659_PWR_DIG_2,
2815 RT5659_PWR_PDM1_BIT, 0, NULL, 0),
2816 SND_SOC_DAPM_MUX("PDM L Mux", RT5659_PDM_OUT_CTRL,
2817 RT5659_M_PDM1_L_SFT, 1, &rt5659_pdm_l_mux),
2818 SND_SOC_DAPM_MUX("PDM R Mux", RT5659_PDM_OUT_CTRL,
2819 RT5659_M_PDM1_R_SFT, 1, &rt5659_pdm_r_mux),
2822 SND_SOC_DAPM_MUX("SPDIF Mux", SND_SOC_NOPM, 0, 0, &rt5659_spdif_mux),
2824 SND_SOC_DAPM_SUPPLY("SYS CLK DET", RT5659_CLK_DET, 3, 0, NULL, 0),
2825 SND_SOC_DAPM_SUPPLY("CLKDET", RT5659_CLK_DET, 0, 0, NULL, 0),
2828 SND_SOC_DAPM_OUTPUT("HPOL"),
2829 SND_SOC_DAPM_OUTPUT("HPOR"),
2830 SND_SOC_DAPM_OUTPUT("SPOL"),
2831 SND_SOC_DAPM_OUTPUT("SPOR"),
2832 SND_SOC_DAPM_OUTPUT("LOUTL"),
2833 SND_SOC_DAPM_OUTPUT("LOUTR"),
2834 SND_SOC_DAPM_OUTPUT("MONOOUT"),
2835 SND_SOC_DAPM_OUTPUT("PDML"),
2836 SND_SOC_DAPM_OUTPUT("PDMR"),
2837 SND_SOC_DAPM_OUTPUT("SPDIF"),
2840 static const struct snd_soc_dapm_route rt5659_dapm_routes[] = {
2842 { "ADC Stereo1 Filter", NULL, "PLL", is_sys_clk_from_pll },
2843 { "ADC Stereo2 Filter", NULL, "PLL", is_sys_clk_from_pll },
2844 { "ADC Mono Left Filter", NULL, "PLL", is_sys_clk_from_pll },
2845 { "ADC Mono Right Filter", NULL, "PLL", is_sys_clk_from_pll },
2846 { "DAC Stereo1 Filter", NULL, "PLL", is_sys_clk_from_pll },
2847 { "DAC Mono Left Filter", NULL, "PLL", is_sys_clk_from_pll },
2848 { "DAC Mono Right Filter", NULL, "PLL", is_sys_clk_from_pll },
2851 { "ADC Stereo1 Filter", NULL, "ADC STO1 ASRC", is_using_asrc },
2852 { "ADC Mono Left Filter", NULL, "ADC Mono L ASRC", is_using_asrc },
2853 { "ADC Mono Right Filter", NULL, "ADC Mono R ASRC", is_using_asrc },
2854 { "DAC Mono Left Filter", NULL, "DAC Mono L ASRC", is_using_asrc },
2855 { "DAC Mono Right Filter", NULL, "DAC Mono R ASRC", is_using_asrc },
2856 { "DAC Stereo1 Filter", NULL, "DAC STO ASRC", is_using_asrc },
2858 { "SYS CLK DET", NULL, "CLKDET" },
2860 { "I2S1", NULL, "I2S1 ASRC" },
2861 { "I2S2", NULL, "I2S2 ASRC" },
2862 { "I2S3", NULL, "I2S3 ASRC" },
2864 { "DMIC1", NULL, "DMIC L1" },
2865 { "DMIC1", NULL, "DMIC R1" },
2866 { "DMIC2", NULL, "DMIC L2" },
2867 { "DMIC2", NULL, "DMIC R2" },
2869 { "BST1", NULL, "IN1P" },
2870 { "BST1", NULL, "IN1N" },
2871 { "BST1", NULL, "BST1 Power" },
2872 { "BST2", NULL, "IN2P" },
2873 { "BST2", NULL, "IN2N" },
2874 { "BST2", NULL, "BST2 Power" },
2875 { "BST3", NULL, "IN3P" },
2876 { "BST3", NULL, "IN3N" },
2877 { "BST3", NULL, "BST3 Power" },
2878 { "BST4", NULL, "IN4P" },
2879 { "BST4", NULL, "IN4N" },
2880 { "BST4", NULL, "BST4 Power" },
2882 { "INL VOL", NULL, "IN2P" },
2883 { "INR VOL", NULL, "IN2N" },
2885 { "RECMIX1L", "SPKVOLL Switch", "SPKVOL L" },
2886 { "RECMIX1L", "INL Switch", "INL VOL" },
2887 { "RECMIX1L", "BST4 Switch", "BST4" },
2888 { "RECMIX1L", "BST3 Switch", "BST3" },
2889 { "RECMIX1L", "BST2 Switch", "BST2" },
2890 { "RECMIX1L", "BST1 Switch", "BST1" },
2892 { "RECMIX1R", "HPOVOLR Switch", "HPO R Playback" },
2893 { "RECMIX1R", "INR Switch", "INR VOL" },
2894 { "RECMIX1R", "BST4 Switch", "BST4" },
2895 { "RECMIX1R", "BST3 Switch", "BST3" },
2896 { "RECMIX1R", "BST2 Switch", "BST2" },
2897 { "RECMIX1R", "BST1 Switch", "BST1" },
2899 { "RECMIX2L", "SPKVOLL Switch", "SPKVOL L" },
2900 { "RECMIX2L", "OUTVOLL Switch", "OUTVOL L" },
2901 { "RECMIX2L", "BST4 Switch", "BST4" },
2902 { "RECMIX2L", "BST3 Switch", "BST3" },
2903 { "RECMIX2L", "BST2 Switch", "BST2" },
2904 { "RECMIX2L", "BST1 Switch", "BST1" },
2906 { "RECMIX2R", "MONOVOL Switch", "MONOVOL" },
2907 { "RECMIX2R", "OUTVOLR Switch", "OUTVOL R" },
2908 { "RECMIX2R", "BST4 Switch", "BST4" },
2909 { "RECMIX2R", "BST3 Switch", "BST3" },
2910 { "RECMIX2R", "BST2 Switch", "BST2" },
2911 { "RECMIX2R", "BST1 Switch", "BST1" },
2913 { "ADC1 L", NULL, "RECMIX1L" },
2914 { "ADC1 L", NULL, "ADC1 L Power" },
2915 { "ADC1 L", NULL, "ADC1 clock" },
2916 { "ADC1 R", NULL, "RECMIX1R" },
2917 { "ADC1 R", NULL, "ADC1 R Power" },
2918 { "ADC1 R", NULL, "ADC1 clock" },
2920 { "ADC2 L", NULL, "RECMIX2L" },
2921 { "ADC2 L", NULL, "ADC2 L Power" },
2922 { "ADC2 L", NULL, "ADC2 clock" },
2923 { "ADC2 R", NULL, "RECMIX2R" },
2924 { "ADC2 R", NULL, "ADC2 R Power" },
2925 { "ADC2 R", NULL, "ADC2 clock" },
2927 { "DMIC L1", NULL, "DMIC CLK" },
2928 { "DMIC L1", NULL, "DMIC1 Power" },
2929 { "DMIC R1", NULL, "DMIC CLK" },
2930 { "DMIC R1", NULL, "DMIC1 Power" },
2931 { "DMIC L2", NULL, "DMIC CLK" },
2932 { "DMIC L2", NULL, "DMIC2 Power" },
2933 { "DMIC R2", NULL, "DMIC CLK" },
2934 { "DMIC R2", NULL, "DMIC2 Power" },
2936 { "Stereo1 DMIC L Mux", "DMIC1", "DMIC L1" },
2937 { "Stereo1 DMIC L Mux", "DMIC2", "DMIC L2" },
2939 { "Stereo1 DMIC R Mux", "DMIC1", "DMIC R1" },
2940 { "Stereo1 DMIC R Mux", "DMIC2", "DMIC R2" },
2942 { "Mono DMIC L Mux", "DMIC1 L", "DMIC L1" },
2943 { "Mono DMIC L Mux", "DMIC2 L", "DMIC L2" },
2945 { "Mono DMIC R Mux", "DMIC1 R", "DMIC R1" },
2946 { "Mono DMIC R Mux", "DMIC2 R", "DMIC R2" },
2948 { "Stereo1 ADC L Mux", "ADC1", "ADC1 L" },
2949 { "Stereo1 ADC L Mux", "ADC2", "ADC2 L" },
2950 { "Stereo1 ADC R Mux", "ADC1", "ADC1 R" },
2951 { "Stereo1 ADC R Mux", "ADC2", "ADC2 R" },
2953 { "Stereo1 ADC L1 Mux", "ADC", "Stereo1 ADC L Mux" },
2954 { "Stereo1 ADC L1 Mux", "DAC MIX", "DAC MIXL" },
2955 { "Stereo1 ADC L2 Mux", "DMIC", "Stereo1 DMIC L Mux" },
2956 { "Stereo1 ADC L2 Mux", "DAC MIX", "DAC MIXL" },
2958 { "Stereo1 ADC R1 Mux", "ADC", "Stereo1 ADC R Mux" },
2959 { "Stereo1 ADC R1 Mux", "DAC MIX", "DAC MIXR" },
2960 { "Stereo1 ADC R2 Mux", "DMIC", "Stereo1 DMIC R Mux" },
2961 { "Stereo1 ADC R2 Mux", "DAC MIX", "DAC MIXR" },
2963 { "Mono ADC L Mux", "ADC1 L", "ADC1 L" },
2964 { "Mono ADC L Mux", "ADC1 R", "ADC1 R" },
2965 { "Mono ADC L Mux", "ADC2 L", "ADC2 L" },
2966 { "Mono ADC L Mux", "ADC2 R", "ADC2 R" },
2968 { "Mono ADC R Mux", "ADC1 L", "ADC1 L" },
2969 { "Mono ADC R Mux", "ADC1 R", "ADC1 R" },
2970 { "Mono ADC R Mux", "ADC2 L", "ADC2 L" },
2971 { "Mono ADC R Mux", "ADC2 R", "ADC2 R" },
2973 { "Mono ADC L2 Mux", "DMIC", "Mono DMIC L Mux" },
2974 { "Mono ADC L2 Mux", "Mono DAC MIXL", "Mono DAC MIXL" },
2975 { "Mono ADC L1 Mux", "Mono DAC MIXL", "Mono DAC MIXL" },
2976 { "Mono ADC L1 Mux", "ADC", "Mono ADC L Mux" },
2978 { "Mono ADC R1 Mux", "Mono DAC MIXR", "Mono DAC MIXR" },
2979 { "Mono ADC R1 Mux", "ADC", "Mono ADC R Mux" },
2980 { "Mono ADC R2 Mux", "DMIC", "Mono DMIC R Mux" },
2981 { "Mono ADC R2 Mux", "Mono DAC MIXR", "Mono DAC MIXR" },
2983 { "Stereo1 ADC MIXL", "ADC1 Switch", "Stereo1 ADC L1 Mux" },
2984 { "Stereo1 ADC MIXL", "ADC2 Switch", "Stereo1 ADC L2 Mux" },
2985 { "Stereo1 ADC MIXL", NULL, "ADC Stereo1 Filter" },
2987 { "Stereo1 ADC MIXR", "ADC1 Switch", "Stereo1 ADC R1 Mux" },
2988 { "Stereo1 ADC MIXR", "ADC2 Switch", "Stereo1 ADC R2 Mux" },
2989 { "Stereo1 ADC MIXR", NULL, "ADC Stereo1 Filter" },
2991 { "Mono ADC MIXL", "ADC1 Switch", "Mono ADC L1 Mux" },
2992 { "Mono ADC MIXL", "ADC2 Switch", "Mono ADC L2 Mux" },
2993 { "Mono ADC MIXL", NULL, "ADC Mono Left Filter" },
2995 { "Mono ADC MIXR", "ADC1 Switch", "Mono ADC R1 Mux" },
2996 { "Mono ADC MIXR", "ADC2 Switch", "Mono ADC R2 Mux" },
2997 { "Mono ADC MIXR", NULL, "ADC Mono Right Filter" },
2999 { "Stereo1 ADC Volume L", NULL, "Stereo1 ADC MIXL" },
3000 { "Stereo1 ADC Volume R", NULL, "Stereo1 ADC MIXR" },
3002 { "IF_ADC1", NULL, "Stereo1 ADC Volume L" },
3003 { "IF_ADC1", NULL, "Stereo1 ADC Volume R" },
3004 { "IF_ADC2", NULL, "Mono ADC MIXL" },
3005 { "IF_ADC2", NULL, "Mono ADC MIXR" },
3007 { "TDM AD1:AD2:DAC", NULL, "IF_ADC1" },
3008 { "TDM AD1:AD2:DAC", NULL, "IF_ADC2" },
3009 { "TDM AD1:AD2:DAC", NULL, "DAC_REF" },
3010 { "TDM AD2:DAC", NULL, "IF_ADC2" },
3011 { "TDM AD2:DAC", NULL, "DAC_REF" },
3012 { "TDM Data Mux", "AD1:AD2:DAC:NUL", "TDM AD1:AD2:DAC" },
3013 { "TDM Data Mux", "AD1:AD2:NUL:DAC", "TDM AD1:AD2:DAC" },
3014 { "TDM Data Mux", "AD1:DAC:AD2:NUL", "TDM AD1:AD2:DAC" },
3015 { "TDM Data Mux", "AD1:DAC:NUL:AD2", "TDM AD1:AD2:DAC" },
3016 { "TDM Data Mux", "AD1:NUL:DAC:AD2", "TDM AD1:AD2:DAC" },
3017 { "TDM Data Mux", "AD1:NUL:AD2:DAC", "TDM AD1:AD2:DAC" },
3018 { "TDM Data Mux", "AD2:AD1:DAC:NUL", "TDM AD1:AD2:DAC" },
3019 { "TDM Data Mux", "AD2:AD1:NUL:DAC", "TDM AD1:AD2:DAC" },
3020 { "TDM Data Mux", "AD2:DAC:AD1:NUL", "TDM AD1:AD2:DAC" },
3021 { "TDM Data Mux", "AD2:DAC:NUL:AD1", "TDM AD1:AD2:DAC" },
3022 { "TDM Data Mux", "AD2:NUL:DAC:AD1", "TDM AD1:AD2:DAC" },
3023 { "TDM Data Mux", "AD1:NUL:AD1:DAC", "TDM AD1:AD2:DAC" },
3024 { "TDM Data Mux", "DAC:AD1:AD2:NUL", "TDM AD1:AD2:DAC" },
3025 { "TDM Data Mux", "DAC:AD1:NUL:AD2", "TDM AD1:AD2:DAC" },
3026 { "TDM Data Mux", "DAC:AD2:AD1:NUL", "TDM AD1:AD2:DAC" },
3027 { "TDM Data Mux", "DAC:AD2:NUL:AD1", "TDM AD1:AD2:DAC" },
3028 { "TDM Data Mux", "DAC:NUL:DAC:AD2", "TDM AD2:DAC" },
3029 { "TDM Data Mux", "DAC:NUL:AD2:DAC", "TDM AD2:DAC" },
3030 { "TDM Data Mux", "NUL:AD1:AD2:DAC", "TDM AD1:AD2:DAC" },
3031 { "TDM Data Mux", "NUL:AD1:DAC:AD2", "TDM AD1:AD2:DAC" },
3032 { "TDM Data Mux", "NUL:AD2:AD1:DAC", "TDM AD1:AD2:DAC" },
3033 { "TDM Data Mux", "NUL:AD2:DAC:AD1", "TDM AD1:AD2:DAC" },
3034 { "TDM Data Mux", "NUL:DAC:DAC:AD2", "TDM AD2:DAC" },
3035 { "TDM Data Mux", "NUL:DAC:AD2:DAC", "TDM AD2:DAC" },
3036 { "IF1 01 ADC Swap Mux", "L/R", "TDM Data Mux" },
3037 { "IF1 01 ADC Swap Mux", "R/L", "TDM Data Mux" },
3038 { "IF1 01 ADC Swap Mux", "L/L", "TDM Data Mux" },
3039 { "IF1 01 ADC Swap Mux", "R/R", "TDM Data Mux" },
3040 { "IF1 23 ADC Swap Mux", "L/R", "TDM Data Mux" },
3041 { "IF1 23 ADC Swap Mux", "R/L", "TDM Data Mux" },
3042 { "IF1 23 ADC Swap Mux", "L/L", "TDM Data Mux" },
3043 { "IF1 23 ADC Swap Mux", "R/R", "TDM Data Mux" },
3044 { "IF1 45 ADC Swap Mux", "L/R", "TDM Data Mux" },
3045 { "IF1 45 ADC Swap Mux", "R/L", "TDM Data Mux" },
3046 { "IF1 45 ADC Swap Mux", "L/L", "TDM Data Mux" },
3047 { "IF1 45 ADC Swap Mux", "R/R", "TDM Data Mux" },
3048 { "IF1 67 ADC Swap Mux", "L/R", "TDM Data Mux" },
3049 { "IF1 67 ADC Swap Mux", "R/L", "TDM Data Mux" },
3050 { "IF1 67 ADC Swap Mux", "L/L", "TDM Data Mux" },
3051 { "IF1 67 ADC Swap Mux", "R/R", "TDM Data Mux" },
3052 { "IF1 ADC", NULL, "IF1 01 ADC Swap Mux" },
3053 { "IF1 ADC", NULL, "IF1 23 ADC Swap Mux" },
3054 { "IF1 ADC", NULL, "IF1 45 ADC Swap Mux" },
3055 { "IF1 ADC", NULL, "IF1 67 ADC Swap Mux" },
3056 { "IF1 ADC", NULL, "I2S1" },
3058 { "IF2 ADC Mux", "IF_ADC1", "IF_ADC1" },
3059 { "IF2 ADC Mux", "IF_ADC2", "IF_ADC2" },
3060 { "IF2 ADC Mux", "IF_ADC3", "IF_ADC3" },
3061 { "IF2 ADC Mux", "DAC_REF", "DAC_REF" },
3062 { "IF2 ADC", NULL, "IF2 ADC Mux"},
3063 { "IF2 ADC", NULL, "I2S2" },
3065 { "IF3 ADC Mux", "IF_ADC1", "IF_ADC1" },
3066 { "IF3 ADC Mux", "IF_ADC2", "IF_ADC2" },
3067 { "IF3 ADC Mux", "Stereo2_ADC_L/R", "Stereo2 ADC LR" },
3068 { "IF3 ADC Mux", "DAC_REF", "DAC_REF" },
3069 { "IF3 ADC", NULL, "IF3 ADC Mux"},
3070 { "IF3 ADC", NULL, "I2S3" },
3072 { "AIF1TX", NULL, "IF1 ADC" },
3073 { "IF2 ADC Swap Mux", "L/R", "IF2 ADC" },
3074 { "IF2 ADC Swap Mux", "R/L", "IF2 ADC" },
3075 { "IF2 ADC Swap Mux", "L/L", "IF2 ADC" },
3076 { "IF2 ADC Swap Mux", "R/R", "IF2 ADC" },
3077 { "AIF2TX", NULL, "IF2 ADC Swap Mux" },
3078 { "IF3 ADC Swap Mux", "L/R", "IF3 ADC" },
3079 { "IF3 ADC Swap Mux", "R/L", "IF3 ADC" },
3080 { "IF3 ADC Swap Mux", "L/L", "IF3 ADC" },
3081 { "IF3 ADC Swap Mux", "R/R", "IF3 ADC" },
3082 { "AIF3TX", NULL, "IF3 ADC Swap Mux" },
3084 { "IF1 DAC1", NULL, "AIF1RX" },
3085 { "IF1 DAC2", NULL, "AIF1RX" },
3086 { "IF2 DAC Swap Mux", "L/R", "AIF2RX" },
3087 { "IF2 DAC Swap Mux", "R/L", "AIF2RX" },
3088 { "IF2 DAC Swap Mux", "L/L", "AIF2RX" },
3089 { "IF2 DAC Swap Mux", "R/R", "AIF2RX" },
3090 { "IF2 DAC", NULL, "IF2 DAC Swap Mux" },
3091 { "IF3 DAC Swap Mux", "L/R", "AIF3RX" },
3092 { "IF3 DAC Swap Mux", "R/L", "AIF3RX" },
3093 { "IF3 DAC Swap Mux", "L/L", "AIF3RX" },
3094 { "IF3 DAC Swap Mux", "R/R", "AIF3RX" },
3095 { "IF3 DAC", NULL, "IF3 DAC Swap Mux" },
3097 { "IF1 DAC1", NULL, "I2S1" },
3098 { "IF1 DAC2", NULL, "I2S1" },
3099 { "IF2 DAC", NULL, "I2S2" },
3100 { "IF3 DAC", NULL, "I2S3" },
3102 { "IF1 DAC2 L", NULL, "IF1 DAC2" },
3103 { "IF1 DAC2 R", NULL, "IF1 DAC2" },
3104 { "IF1 DAC1 L", NULL, "IF1 DAC1" },
3105 { "IF1 DAC1 R", NULL, "IF1 DAC1" },
3106 { "IF2 DAC L", NULL, "IF2 DAC" },
3107 { "IF2 DAC R", NULL, "IF2 DAC" },
3108 { "IF3 DAC L", NULL, "IF3 DAC" },
3109 { "IF3 DAC R", NULL, "IF3 DAC" },
3111 { "DAC L1 Mux", "IF1 DAC1", "IF1 DAC1 L" },
3112 { "DAC L1 Mux", "IF2 DAC", "IF2 DAC L" },
3113 { "DAC L1 Mux", "IF3 DAC", "IF3 DAC L" },
3114 { "DAC L1 Mux", NULL, "DAC Stereo1 Filter" },
3116 { "DAC R1 Mux", "IF1 DAC1", "IF1 DAC1 R" },
3117 { "DAC R1 Mux", "IF2 DAC", "IF2 DAC R" },
3118 { "DAC R1 Mux", "IF3 DAC", "IF3 DAC R" },
3119 { "DAC R1 Mux", NULL, "DAC Stereo1 Filter" },
3121 { "DAC1 MIXL", "Stereo ADC Switch", "Stereo1 ADC Volume L" },
3122 { "DAC1 MIXL", "DAC1 Switch", "DAC L1 Mux" },
3123 { "DAC1 MIXR", "Stereo ADC Switch", "Stereo1 ADC Volume R" },
3124 { "DAC1 MIXR", "DAC1 Switch", "DAC R1 Mux" },
3126 { "DAC_REF", NULL, "DAC1 MIXL" },
3127 { "DAC_REF", NULL, "DAC1 MIXR" },
3129 { "DAC L2 Mux", "IF1 DAC2", "IF1 DAC2 L" },
3130 { "DAC L2 Mux", "IF2 DAC", "IF2 DAC L" },
3131 { "DAC L2 Mux", "IF3 DAC", "IF3 DAC L" },
3132 { "DAC L2 Mux", "Mono ADC MIX", "Mono ADC MIXL" },
3133 { "DAC L2 Mux", NULL, "DAC Mono Left Filter" },
3135 { "DAC R2 Mux", "IF1 DAC2", "IF1 DAC2 R" },
3136 { "DAC R2 Mux", "IF2 DAC", "IF2 DAC R" },
3137 { "DAC R2 Mux", "IF3 DAC", "IF3 DAC R" },
3138 { "DAC R2 Mux", "Mono ADC MIX", "Mono ADC MIXR" },
3139 { "DAC R2 Mux", NULL, "DAC Mono Right Filter" },
3141 { "Stereo DAC MIXL", "DAC L1 Switch", "DAC1 MIXL" },
3142 { "Stereo DAC MIXL", "DAC R1 Switch", "DAC1 MIXR" },
3143 { "Stereo DAC MIXL", "DAC L2 Switch", "DAC L2 Mux" },
3144 { "Stereo DAC MIXL", "DAC R2 Switch", "DAC R2 Mux" },
3146 { "Stereo DAC MIXR", "DAC R1 Switch", "DAC1 MIXR" },
3147 { "Stereo DAC MIXR", "DAC L1 Switch", "DAC1 MIXL" },
3148 { "Stereo DAC MIXR", "DAC L2 Switch", "DAC L2 Mux" },
3149 { "Stereo DAC MIXR", "DAC R2 Switch", "DAC R2 Mux" },
3151 { "Mono DAC MIXL", "DAC L1 Switch", "DAC1 MIXL" },
3152 { "Mono DAC MIXL", "DAC R1 Switch", "DAC1 MIXR" },
3153 { "Mono DAC MIXL", "DAC L2 Switch", "DAC L2 Mux" },
3154 { "Mono DAC MIXL", "DAC R2 Switch", "DAC R2 Mux" },
3155 { "Mono DAC MIXR", "DAC L1 Switch", "DAC1 MIXL" },
3156 { "Mono DAC MIXR", "DAC R1 Switch", "DAC1 MIXR" },
3157 { "Mono DAC MIXR", "DAC R2 Switch", "DAC R2 Mux" },
3158 { "Mono DAC MIXR", "DAC L2 Switch", "DAC L2 Mux" },
3160 { "DAC MIXL", "Stereo DAC Mixer", "Stereo DAC MIXL" },
3161 { "DAC MIXL", "Mono DAC Mixer", "Mono DAC MIXL" },
3162 { "DAC MIXR", "Stereo DAC Mixer", "Stereo DAC MIXR" },
3163 { "DAC MIXR", "Mono DAC Mixer", "Mono DAC MIXR" },
3165 { "DAC L1 Source", NULL, "DAC L1 Power" },
3166 { "DAC L1 Source", "DAC", "DAC1 MIXL" },
3167 { "DAC L1 Source", "Stereo DAC Mixer", "Stereo DAC MIXL" },
3168 { "DAC R1 Source", NULL, "DAC R1 Power" },
3169 { "DAC R1 Source", "DAC", "DAC1 MIXR" },
3170 { "DAC R1 Source", "Stereo DAC Mixer", "Stereo DAC MIXR" },
3171 { "DAC L2 Source", "Stereo DAC Mixer", "Stereo DAC MIXL" },
3172 { "DAC L2 Source", "Mono DAC Mixer", "Mono DAC MIXL" },
3173 { "DAC L2 Source", NULL, "DAC L2 Power" },
3174 { "DAC R2 Source", "Stereo DAC Mixer", "Stereo DAC MIXR" },
3175 { "DAC R2 Source", "Mono DAC Mixer", "Mono DAC MIXR" },
3176 { "DAC R2 Source", NULL, "DAC R2 Power" },
3178 { "DAC L1", NULL, "DAC L1 Source" },
3179 { "DAC R1", NULL, "DAC R1 Source" },
3180 { "DAC L2", NULL, "DAC L2 Source" },
3181 { "DAC R2", NULL, "DAC R2 Source" },
3183 { "SPK MIXL", "DAC L2 Switch", "DAC L2" },
3184 { "SPK MIXL", "BST1 Switch", "BST1" },
3185 { "SPK MIXL", "INL Switch", "INL VOL" },
3186 { "SPK MIXL", "INR Switch", "INR VOL" },
3187 { "SPK MIXL", "BST3 Switch", "BST3" },
3188 { "SPK MIXR", "DAC R2 Switch", "DAC R2" },
3189 { "SPK MIXR", "BST4 Switch", "BST4" },
3190 { "SPK MIXR", "INL Switch", "INL VOL" },
3191 { "SPK MIXR", "INR Switch", "INR VOL" },
3192 { "SPK MIXR", "BST3 Switch", "BST3" },
3194 { "MONOVOL MIX", "DAC L2 Switch", "DAC L2" },
3195 { "MONOVOL MIX", "DAC R2 Switch", "DAC R2" },
3196 { "MONOVOL MIX", "BST1 Switch", "BST1" },
3197 { "MONOVOL MIX", "BST2 Switch", "BST2" },
3198 { "MONOVOL MIX", "BST3 Switch", "BST3" },
3200 { "OUT MIXL", "DAC L2 Switch", "DAC L2" },
3201 { "OUT MIXL", "INL Switch", "INL VOL" },
3202 { "OUT MIXL", "BST1 Switch", "BST1" },
3203 { "OUT MIXL", "BST2 Switch", "BST2" },
3204 { "OUT MIXL", "BST3 Switch", "BST3" },
3205 { "OUT MIXR", "DAC R2 Switch", "DAC R2" },
3206 { "OUT MIXR", "INR Switch", "INR VOL" },
3207 { "OUT MIXR", "BST2 Switch", "BST2" },
3208 { "OUT MIXR", "BST3 Switch", "BST3" },
3209 { "OUT MIXR", "BST4 Switch", "BST4" },
3211 { "SPKVOL L", "Switch", "SPK MIXL" },
3212 { "SPKVOL R", "Switch", "SPK MIXR" },
3213 { "SPO L MIX", "DAC L2 Switch", "DAC L2" },
3214 { "SPO L MIX", "SPKVOL L Switch", "SPKVOL L" },
3215 { "SPO R MIX", "DAC R2 Switch", "DAC R2" },
3216 { "SPO R MIX", "SPKVOL R Switch", "SPKVOL R" },
3217 { "SPK Amp", NULL, "SPO L MIX" },
3218 { "SPK Amp", NULL, "SPO R MIX" },
3219 { "SPK Amp", NULL, "SYS CLK DET" },
3220 { "SPO Playback", "Switch", "SPK Amp" },
3221 { "SPOL", NULL, "SPO Playback" },
3222 { "SPOR", NULL, "SPO Playback" },
3224 { "MONOVOL", "Switch", "MONOVOL MIX" },
3225 { "Mono MIX", "DAC L2 Switch", "DAC L2" },
3226 { "Mono MIX", "MONOVOL Switch", "MONOVOL" },
3227 { "Mono Amp", NULL, "Mono MIX" },
3228 { "Mono Amp", NULL, "Mono Vref" },
3229 { "Mono Amp", NULL, "SYS CLK DET" },
3230 { "Mono Playback", "Switch", "Mono Amp" },
3231 { "MONOOUT", NULL, "Mono Playback" },
3233 { "HP Amp", NULL, "DAC L1" },
3234 { "HP Amp", NULL, "DAC R1" },
3235 { "HP Amp", NULL, "Charge Pump" },
3236 { "HP Amp", NULL, "SYS CLK DET" },
3237 { "HPO L Playback", "Switch", "HP Amp"},
3238 { "HPO R Playback", "Switch", "HP Amp"},
3239 { "HPOL", NULL, "HPO L Playback" },
3240 { "HPOR", NULL, "HPO R Playback" },
3242 { "OUTVOL L", "Switch", "OUT MIXL" },
3243 { "OUTVOL R", "Switch", "OUT MIXR" },
3244 { "LOUT L MIX", "DAC L2 Switch", "DAC L2" },
3245 { "LOUT L MIX", "OUTVOL L Switch", "OUTVOL L" },
3246 { "LOUT R MIX", "DAC R2 Switch", "DAC R2" },
3247 { "LOUT R MIX", "OUTVOL R Switch", "OUTVOL R" },
3248 { "LOUT Amp", NULL, "LOUT L MIX" },
3249 { "LOUT Amp", NULL, "LOUT R MIX" },
3250 { "LOUT Amp", NULL, "Charge Pump" },
3251 { "LOUT Amp", NULL, "SYS CLK DET" },
3252 { "LOUT L Playback", "Switch", "LOUT Amp" },
3253 { "LOUT R Playback", "Switch", "LOUT Amp" },
3254 { "LOUTL", NULL, "LOUT L Playback" },
3255 { "LOUTR", NULL, "LOUT R Playback" },
3257 { "PDM L Mux", "Mono DAC", "Mono DAC MIXL" },
3258 { "PDM L Mux", "Stereo DAC", "Stereo DAC MIXL" },
3259 { "PDM L Mux", NULL, "PDM Power" },
3260 { "PDM R Mux", "Mono DAC", "Mono DAC MIXR" },
3261 { "PDM R Mux", "Stereo DAC", "Stereo DAC MIXR" },
3262 { "PDM R Mux", NULL, "PDM Power" },
3263 { "PDM L Playback", "Switch", "PDM L Mux" },
3264 { "PDM R Playback", "Switch", "PDM R Mux" },
3265 { "PDML", NULL, "PDM L Playback" },
3266 { "PDMR", NULL, "PDM R Playback" },
3268 { "SPDIF Mux", "IF3_DAC", "IF3 DAC" },
3269 { "SPDIF Mux", "IF2_DAC", "IF2 DAC" },
3270 { "SPDIF Mux", "IF1_DAC2", "IF1 DAC2" },
3271 { "SPDIF Mux", "IF1_DAC1", "IF1 DAC1" },
3272 { "SPDIF", NULL, "SPDIF Mux" },
3275 static int rt5659_hw_params(struct snd_pcm_substream *substream,
3276 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
3278 struct snd_soc_component *component = dai->component;
3279 struct rt5659_priv *rt5659 = snd_soc_component_get_drvdata(component);
3280 unsigned int val_len = 0, val_clk, mask_clk;
3281 int pre_div, frame_size;
3283 rt5659->lrck[dai->id] = params_rate(params);
3284 pre_div = rl6231_get_clk_info(rt5659->sysclk, rt5659->lrck[dai->id]);
3286 dev_err(component->dev, "Unsupported clock setting %d for DAI %d\n",
3287 rt5659->lrck[dai->id], dai->id);
3290 frame_size = snd_soc_params_to_frame_size(params);
3291 if (frame_size < 0) {
3292 dev_err(component->dev, "Unsupported frame size: %d\n", frame_size);
3296 dev_dbg(dai->dev, "lrck is %dHz and pre_div is %d for iis %d\n",
3297 rt5659->lrck[dai->id], pre_div, dai->id);
3299 switch (params_width(params)) {
3303 val_len |= RT5659_I2S_DL_20;
3306 val_len |= RT5659_I2S_DL_24;
3309 val_len |= RT5659_I2S_DL_8;
3317 mask_clk = RT5659_I2S_PD1_MASK;
3318 val_clk = pre_div << RT5659_I2S_PD1_SFT;
3319 snd_soc_component_update_bits(component, RT5659_I2S1_SDP,
3320 RT5659_I2S_DL_MASK, val_len);
3323 mask_clk = RT5659_I2S_PD2_MASK;
3324 val_clk = pre_div << RT5659_I2S_PD2_SFT;
3325 snd_soc_component_update_bits(component, RT5659_I2S2_SDP,
3326 RT5659_I2S_DL_MASK, val_len);
3329 mask_clk = RT5659_I2S_PD3_MASK;
3330 val_clk = pre_div << RT5659_I2S_PD3_SFT;
3331 snd_soc_component_update_bits(component, RT5659_I2S3_SDP,
3332 RT5659_I2S_DL_MASK, val_len);
3335 dev_err(component->dev, "Invalid dai->id: %d\n", dai->id);
3339 snd_soc_component_update_bits(component, RT5659_ADDA_CLK_1, mask_clk, val_clk);
3341 switch (rt5659->lrck[dai->id]) {
3343 snd_soc_component_update_bits(component, RT5659_ADDA_CLK_1,
3344 RT5659_DAC_OSR_MASK, RT5659_DAC_OSR_32);
3347 snd_soc_component_update_bits(component, RT5659_ADDA_CLK_1,
3348 RT5659_DAC_OSR_MASK, RT5659_DAC_OSR_64);
3351 snd_soc_component_update_bits(component, RT5659_ADDA_CLK_1,
3352 RT5659_DAC_OSR_MASK, RT5659_DAC_OSR_128);
3359 static int rt5659_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
3361 struct snd_soc_component *component = dai->component;
3362 struct rt5659_priv *rt5659 = snd_soc_component_get_drvdata(component);
3363 unsigned int reg_val = 0;
3365 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
3366 case SND_SOC_DAIFMT_CBM_CFM:
3367 rt5659->master[dai->id] = 1;
3369 case SND_SOC_DAIFMT_CBS_CFS:
3370 reg_val |= RT5659_I2S_MS_S;
3371 rt5659->master[dai->id] = 0;
3377 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
3378 case SND_SOC_DAIFMT_NB_NF:
3380 case SND_SOC_DAIFMT_IB_NF:
3381 reg_val |= RT5659_I2S_BP_INV;
3387 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
3388 case SND_SOC_DAIFMT_I2S:
3390 case SND_SOC_DAIFMT_LEFT_J:
3391 reg_val |= RT5659_I2S_DF_LEFT;
3393 case SND_SOC_DAIFMT_DSP_A:
3394 reg_val |= RT5659_I2S_DF_PCM_A;
3396 case SND_SOC_DAIFMT_DSP_B:
3397 reg_val |= RT5659_I2S_DF_PCM_B;
3405 snd_soc_component_update_bits(component, RT5659_I2S1_SDP,
3406 RT5659_I2S_MS_MASK | RT5659_I2S_BP_MASK |
3407 RT5659_I2S_DF_MASK, reg_val);
3410 snd_soc_component_update_bits(component, RT5659_I2S2_SDP,
3411 RT5659_I2S_MS_MASK | RT5659_I2S_BP_MASK |
3412 RT5659_I2S_DF_MASK, reg_val);
3415 snd_soc_component_update_bits(component, RT5659_I2S3_SDP,
3416 RT5659_I2S_MS_MASK | RT5659_I2S_BP_MASK |
3417 RT5659_I2S_DF_MASK, reg_val);
3420 dev_err(component->dev, "Invalid dai->id: %d\n", dai->id);
3426 static int rt5659_set_component_sysclk(struct snd_soc_component *component, int clk_id,
3427 int source, unsigned int freq, int dir)
3429 struct rt5659_priv *rt5659 = snd_soc_component_get_drvdata(component);
3430 unsigned int reg_val = 0;
3433 if (freq == rt5659->sysclk && clk_id == rt5659->sysclk_src)
3437 case RT5659_SCLK_S_MCLK:
3438 ret = clk_set_rate(rt5659->mclk, freq);
3442 reg_val |= RT5659_SCLK_SRC_MCLK;
3444 case RT5659_SCLK_S_PLL1:
3445 reg_val |= RT5659_SCLK_SRC_PLL1;
3447 case RT5659_SCLK_S_RCCLK:
3448 reg_val |= RT5659_SCLK_SRC_RCCLK;
3451 dev_err(component->dev, "Invalid clock id (%d)\n", clk_id);
3454 snd_soc_component_update_bits(component, RT5659_GLB_CLK,
3455 RT5659_SCLK_SRC_MASK, reg_val);
3456 rt5659->sysclk = freq;
3457 rt5659->sysclk_src = clk_id;
3459 dev_dbg(component->dev, "Sysclk is %dHz and clock id is %d\n",
3465 static int rt5659_set_component_pll(struct snd_soc_component *component, int pll_id,
3466 int source, unsigned int freq_in,
3467 unsigned int freq_out)
3469 struct rt5659_priv *rt5659 = snd_soc_component_get_drvdata(component);
3470 struct rl6231_pll_code pll_code;
3473 if (source == rt5659->pll_src && freq_in == rt5659->pll_in &&
3474 freq_out == rt5659->pll_out)
3477 if (!freq_in || !freq_out) {
3478 dev_dbg(component->dev, "PLL disabled\n");
3481 rt5659->pll_out = 0;
3482 snd_soc_component_update_bits(component, RT5659_GLB_CLK,
3483 RT5659_SCLK_SRC_MASK, RT5659_SCLK_SRC_MCLK);
3488 case RT5659_PLL1_S_MCLK:
3489 snd_soc_component_update_bits(component, RT5659_GLB_CLK,
3490 RT5659_PLL1_SRC_MASK, RT5659_PLL1_SRC_MCLK);
3492 case RT5659_PLL1_S_BCLK1:
3493 snd_soc_component_update_bits(component, RT5659_GLB_CLK,
3494 RT5659_PLL1_SRC_MASK, RT5659_PLL1_SRC_BCLK1);
3496 case RT5659_PLL1_S_BCLK2:
3497 snd_soc_component_update_bits(component, RT5659_GLB_CLK,
3498 RT5659_PLL1_SRC_MASK, RT5659_PLL1_SRC_BCLK2);
3500 case RT5659_PLL1_S_BCLK3:
3501 snd_soc_component_update_bits(component, RT5659_GLB_CLK,
3502 RT5659_PLL1_SRC_MASK, RT5659_PLL1_SRC_BCLK3);
3505 dev_err(component->dev, "Unknown PLL source %d\n", source);
3509 ret = rl6231_pll_calc(freq_in, freq_out, &pll_code);
3511 dev_err(component->dev, "Unsupported input clock %d\n", freq_in);
3515 dev_dbg(component->dev, "bypass=%d m=%d n=%d k=%d\n",
3516 pll_code.m_bp, (pll_code.m_bp ? 0 : pll_code.m_code),
3517 pll_code.n_code, pll_code.k_code);
3519 snd_soc_component_write(component, RT5659_PLL_CTRL_1,
3520 pll_code.n_code << RT5659_PLL_N_SFT | pll_code.k_code);
3521 snd_soc_component_write(component, RT5659_PLL_CTRL_2,
3522 ((pll_code.m_bp ? 0 : pll_code.m_code) << RT5659_PLL_M_SFT) |
3523 (pll_code.m_bp << RT5659_PLL_M_BP_SFT));
3525 rt5659->pll_in = freq_in;
3526 rt5659->pll_out = freq_out;
3527 rt5659->pll_src = source;
3532 static int rt5659_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask,
3533 unsigned int rx_mask, int slots, int slot_width)
3535 struct snd_soc_component *component = dai->component;
3536 unsigned int val = 0;
3538 if (rx_mask || tx_mask)
3560 switch (slot_width) {
3579 snd_soc_component_update_bits(component, RT5659_TDM_CTRL_1, 0x8ff0, val);
3584 static int rt5659_set_bclk_ratio(struct snd_soc_dai *dai, unsigned int ratio)
3586 struct snd_soc_component *component = dai->component;
3587 struct rt5659_priv *rt5659 = snd_soc_component_get_drvdata(component);
3589 dev_dbg(component->dev, "%s ratio=%d\n", __func__, ratio);
3591 rt5659->bclk[dai->id] = ratio;
3596 snd_soc_component_update_bits(component, RT5659_ADDA_CLK_1,
3597 RT5659_I2S_BCLK_MS2_MASK,
3598 RT5659_I2S_BCLK_MS2_64);
3601 snd_soc_component_update_bits(component, RT5659_ADDA_CLK_1,
3602 RT5659_I2S_BCLK_MS3_MASK,
3603 RT5659_I2S_BCLK_MS3_64);
3611 static int rt5659_set_bias_level(struct snd_soc_component *component,
3612 enum snd_soc_bias_level level)
3614 struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
3615 struct rt5659_priv *rt5659 = snd_soc_component_get_drvdata(component);
3619 case SND_SOC_BIAS_PREPARE:
3620 regmap_update_bits(rt5659->regmap, RT5659_DIG_MISC,
3621 RT5659_DIG_GATE_CTRL, RT5659_DIG_GATE_CTRL);
3622 regmap_update_bits(rt5659->regmap, RT5659_PWR_DIG_1,
3623 RT5659_PWR_LDO, RT5659_PWR_LDO);
3624 regmap_update_bits(rt5659->regmap, RT5659_PWR_ANLG_1,
3625 RT5659_PWR_MB | RT5659_PWR_VREF1 | RT5659_PWR_VREF2,
3626 RT5659_PWR_MB | RT5659_PWR_VREF1 | RT5659_PWR_VREF2);
3628 regmap_update_bits(rt5659->regmap, RT5659_PWR_ANLG_1,
3629 RT5659_PWR_FV1 | RT5659_PWR_FV2,
3630 RT5659_PWR_FV1 | RT5659_PWR_FV2);
3633 case SND_SOC_BIAS_STANDBY:
3634 if (dapm->bias_level == SND_SOC_BIAS_OFF) {
3635 ret = clk_prepare_enable(rt5659->mclk);
3637 dev_err(component->dev,
3638 "failed to enable MCLK: %d\n", ret);
3644 case SND_SOC_BIAS_OFF:
3645 regmap_update_bits(rt5659->regmap, RT5659_PWR_DIG_1,
3647 regmap_update_bits(rt5659->regmap, RT5659_PWR_ANLG_1,
3648 RT5659_PWR_MB | RT5659_PWR_VREF1 | RT5659_PWR_VREF2
3649 | RT5659_PWR_FV1 | RT5659_PWR_FV2,
3650 RT5659_PWR_MB | RT5659_PWR_VREF2);
3651 regmap_update_bits(rt5659->regmap, RT5659_DIG_MISC,
3652 RT5659_DIG_GATE_CTRL, 0);
3653 clk_disable_unprepare(rt5659->mclk);
3663 static int rt5659_probe(struct snd_soc_component *component)
3665 struct snd_soc_dapm_context *dapm =
3666 snd_soc_component_get_dapm(component);
3667 struct rt5659_priv *rt5659 = snd_soc_component_get_drvdata(component);
3669 rt5659->component = component;
3671 switch (rt5659->pdata.jd_src) {
3672 case RT5659_JD_HDA_HEADER:
3676 snd_soc_dapm_new_controls(dapm,
3677 rt5659_particular_dapm_widgets,
3678 ARRAY_SIZE(rt5659_particular_dapm_widgets));
3685 static void rt5659_remove(struct snd_soc_component *component)
3687 struct rt5659_priv *rt5659 = snd_soc_component_get_drvdata(component);
3689 regmap_write(rt5659->regmap, RT5659_RESET, 0);
3693 static int rt5659_suspend(struct snd_soc_component *component)
3695 struct rt5659_priv *rt5659 = snd_soc_component_get_drvdata(component);
3697 regcache_cache_only(rt5659->regmap, true);
3698 regcache_mark_dirty(rt5659->regmap);
3702 static int rt5659_resume(struct snd_soc_component *component)
3704 struct rt5659_priv *rt5659 = snd_soc_component_get_drvdata(component);
3706 regcache_cache_only(rt5659->regmap, false);
3707 regcache_sync(rt5659->regmap);
3712 #define rt5659_suspend NULL
3713 #define rt5659_resume NULL
3716 #define RT5659_STEREO_RATES SNDRV_PCM_RATE_8000_192000
3717 #define RT5659_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
3718 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8)
3720 static const struct snd_soc_dai_ops rt5659_aif_dai_ops = {
3721 .hw_params = rt5659_hw_params,
3722 .set_fmt = rt5659_set_dai_fmt,
3723 .set_tdm_slot = rt5659_set_tdm_slot,
3724 .set_bclk_ratio = rt5659_set_bclk_ratio,
3727 static struct snd_soc_dai_driver rt5659_dai[] = {
3729 .name = "rt5659-aif1",
3732 .stream_name = "AIF1 Playback",
3735 .rates = RT5659_STEREO_RATES,
3736 .formats = RT5659_FORMATS,
3739 .stream_name = "AIF1 Capture",
3742 .rates = RT5659_STEREO_RATES,
3743 .formats = RT5659_FORMATS,
3745 .ops = &rt5659_aif_dai_ops,
3748 .name = "rt5659-aif2",
3751 .stream_name = "AIF2 Playback",
3754 .rates = RT5659_STEREO_RATES,
3755 .formats = RT5659_FORMATS,
3758 .stream_name = "AIF2 Capture",
3761 .rates = RT5659_STEREO_RATES,
3762 .formats = RT5659_FORMATS,
3764 .ops = &rt5659_aif_dai_ops,
3767 .name = "rt5659-aif3",
3770 .stream_name = "AIF3 Playback",
3773 .rates = RT5659_STEREO_RATES,
3774 .formats = RT5659_FORMATS,
3777 .stream_name = "AIF3 Capture",
3780 .rates = RT5659_STEREO_RATES,
3781 .formats = RT5659_FORMATS,
3783 .ops = &rt5659_aif_dai_ops,
3787 static const struct snd_soc_component_driver soc_component_dev_rt5659 = {
3788 .probe = rt5659_probe,
3789 .remove = rt5659_remove,
3790 .suspend = rt5659_suspend,
3791 .resume = rt5659_resume,
3792 .set_bias_level = rt5659_set_bias_level,
3793 .controls = rt5659_snd_controls,
3794 .num_controls = ARRAY_SIZE(rt5659_snd_controls),
3795 .dapm_widgets = rt5659_dapm_widgets,
3796 .num_dapm_widgets = ARRAY_SIZE(rt5659_dapm_widgets),
3797 .dapm_routes = rt5659_dapm_routes,
3798 .num_dapm_routes = ARRAY_SIZE(rt5659_dapm_routes),
3799 .set_sysclk = rt5659_set_component_sysclk,
3800 .set_pll = rt5659_set_component_pll,
3801 .use_pmdown_time = 1,
3806 static const struct regmap_config rt5659_regmap = {
3809 .max_register = 0x0400,
3810 .volatile_reg = rt5659_volatile_register,
3811 .readable_reg = rt5659_readable_register,
3812 .cache_type = REGCACHE_RBTREE,
3813 .reg_defaults = rt5659_reg,
3814 .num_reg_defaults = ARRAY_SIZE(rt5659_reg),
3817 static const struct i2c_device_id rt5659_i2c_id[] = {
3822 MODULE_DEVICE_TABLE(i2c, rt5659_i2c_id);
3824 static int rt5659_parse_dt(struct rt5659_priv *rt5659, struct device *dev)
3826 rt5659->pdata.in1_diff = device_property_read_bool(dev,
3827 "realtek,in1-differential");
3828 rt5659->pdata.in3_diff = device_property_read_bool(dev,
3829 "realtek,in3-differential");
3830 rt5659->pdata.in4_diff = device_property_read_bool(dev,
3831 "realtek,in4-differential");
3834 device_property_read_u32(dev, "realtek,dmic1-data-pin",
3835 &rt5659->pdata.dmic1_data_pin);
3836 device_property_read_u32(dev, "realtek,dmic2-data-pin",
3837 &rt5659->pdata.dmic2_data_pin);
3838 device_property_read_u32(dev, "realtek,jd-src",
3839 &rt5659->pdata.jd_src);
3844 static void rt5659_calibrate(struct rt5659_priv *rt5659)
3848 /* Calibrate HPO Start */
3849 /* Fine tune HP Performance */
3850 regmap_write(rt5659->regmap, RT5659_BIAS_CUR_CTRL_8, 0xa502);
3851 regmap_write(rt5659->regmap, RT5659_CHOP_DAC, 0x3030);
3853 regmap_write(rt5659->regmap, RT5659_PRE_DIV_1, 0xef00);
3854 regmap_write(rt5659->regmap, RT5659_PRE_DIV_2, 0xeffc);
3855 regmap_write(rt5659->regmap, RT5659_MICBIAS_2, 0x0280);
3856 regmap_write(rt5659->regmap, RT5659_DIG_MISC, 0x0001);
3857 regmap_write(rt5659->regmap, RT5659_GLB_CLK, 0x8000);
3859 regmap_write(rt5659->regmap, RT5659_PWR_ANLG_1, 0xaa7e);
3861 regmap_write(rt5659->regmap, RT5659_PWR_ANLG_1, 0xfe7e);
3863 regmap_write(rt5659->regmap, RT5659_PWR_ANLG_3, 0x0004);
3864 regmap_write(rt5659->regmap, RT5659_PWR_DIG_2, 0x0400);
3866 regmap_write(rt5659->regmap, RT5659_PWR_DIG_1, 0x0080);
3867 usleep_range(10000, 10005);
3868 regmap_write(rt5659->regmap, RT5659_DEPOP_1, 0x0009);
3870 regmap_write(rt5659->regmap, RT5659_PWR_DIG_1, 0x0f80);
3872 regmap_write(rt5659->regmap, RT5659_HP_CHARGE_PUMP_1, 0x0e16);
3875 /* Enalbe K ADC Power And Clock */
3876 regmap_write(rt5659->regmap, RT5659_CAL_REC, 0x0505);
3878 regmap_write(rt5659->regmap, RT5659_PWR_ANLG_3, 0x0184);
3879 regmap_write(rt5659->regmap, RT5659_CALIB_ADC_CTRL, 0x3c05);
3880 regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_2, 0x20c1);
3883 regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_2, 0x2cc1);
3884 regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_1, 0x5100);
3885 regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_7, 0x0014);
3886 regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_1, 0xd100);
3889 /* Manual K ADC Offset */
3890 regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_2, 0x2cc1);
3891 regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_1, 0x4900);
3892 regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_7, 0x0016);
3893 regmap_update_bits(rt5659->regmap, RT5659_HP_CALIB_CTRL_1,
3898 regmap_read(rt5659->regmap, RT5659_HP_CALIB_CTRL_1, &value);
3900 usleep_range(10000, 10005);
3905 dev_err(rt5659->component->dev,
3906 "HP Calibration 1 Failure\n");
3913 /* Manual K Internal Path Offset */
3914 regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_2, 0x2cc1);
3915 regmap_write(rt5659->regmap, RT5659_HP_VOL, 0x0000);
3916 regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_1, 0x4500);
3917 regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_7, 0x001f);
3918 regmap_update_bits(rt5659->regmap, RT5659_HP_CALIB_CTRL_1,
3923 regmap_read(rt5659->regmap, RT5659_HP_CALIB_CTRL_1, &value);
3925 usleep_range(10000, 10005);
3930 dev_err(rt5659->component->dev,
3931 "HP Calibration 2 Failure\n");
3938 regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_7, 0x0000);
3939 regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_2, 0x20c0);
3940 /* Calibrate HPO End */
3942 /* Calibrate SPO Start */
3943 regmap_write(rt5659->regmap, RT5659_CLASSD_0, 0x2021);
3944 regmap_write(rt5659->regmap, RT5659_CLASSD_CTRL_1, 0x0260);
3945 regmap_write(rt5659->regmap, RT5659_PWR_MIXER, 0x3000);
3946 regmap_write(rt5659->regmap, RT5659_PWR_VOL, 0xc000);
3947 regmap_write(rt5659->regmap, RT5659_A_DAC_MUX, 0x000c);
3948 regmap_write(rt5659->regmap, RT5659_DIG_MISC, 0x8000);
3949 regmap_write(rt5659->regmap, RT5659_SPO_VOL, 0x0808);
3950 regmap_write(rt5659->regmap, RT5659_SPK_L_MIXER, 0x001e);
3951 regmap_write(rt5659->regmap, RT5659_SPK_R_MIXER, 0x001e);
3952 regmap_write(rt5659->regmap, RT5659_CLASSD_1, 0x0803);
3953 regmap_write(rt5659->regmap, RT5659_CLASSD_2, 0x0554);
3954 regmap_write(rt5659->regmap, RT5659_SPO_AMP_GAIN, 0x1103);
3956 /* Enalbe K ADC Power And Clock */
3957 regmap_write(rt5659->regmap, RT5659_CAL_REC, 0x0909);
3958 regmap_update_bits(rt5659->regmap, RT5659_HP_CALIB_CTRL_2, 0x0001,
3961 /* Start Calibration */
3962 regmap_write(rt5659->regmap, RT5659_SPK_DC_CAILB_CTRL_3, 0x0000);
3963 regmap_write(rt5659->regmap, RT5659_CLASSD_0, 0x0021);
3964 regmap_write(rt5659->regmap, RT5659_SPK_DC_CAILB_CTRL_1, 0x3e80);
3965 regmap_update_bits(rt5659->regmap, RT5659_SPK_DC_CAILB_CTRL_1,
3970 regmap_read(rt5659->regmap,
3971 RT5659_SPK_DC_CAILB_CTRL_1, &value);
3973 usleep_range(10000, 10005);
3978 dev_err(rt5659->component->dev,
3979 "SPK Calibration Failure\n");
3985 /* Calibrate SPO End */
3987 /* Calibrate MONO Start */
3988 regmap_write(rt5659->regmap, RT5659_DIG_MISC, 0x0000);
3989 regmap_write(rt5659->regmap, RT5659_MONOMIX_IN_GAIN, 0x021f);
3990 regmap_write(rt5659->regmap, RT5659_MONO_OUT, 0x480a);
3991 /* MONO NG2 GAIN 5dB */
3992 regmap_write(rt5659->regmap, RT5659_MONO_GAIN, 0x0003);
3993 regmap_write(rt5659->regmap, RT5659_MONO_NG2_CTRL_5, 0x0009);
3995 /* Start Calibration */
3996 regmap_write(rt5659->regmap, RT5659_SPK_DC_CAILB_CTRL_3, 0x000f);
3997 regmap_write(rt5659->regmap, RT5659_MONO_AMP_CALIB_CTRL_1, 0x1e00);
3998 regmap_update_bits(rt5659->regmap, RT5659_MONO_AMP_CALIB_CTRL_1,
4003 regmap_read(rt5659->regmap, RT5659_MONO_AMP_CALIB_CTRL_1,
4006 usleep_range(10000, 10005);
4011 dev_err(rt5659->component->dev,
4012 "Mono Calibration Failure\n");
4019 regmap_write(rt5659->regmap, RT5659_SPK_DC_CAILB_CTRL_3, 0x0003);
4020 /* Calibrate MONO End */
4023 regmap_write(rt5659->regmap, RT5659_CAL_REC, 0x0808);
4024 regmap_write(rt5659->regmap, RT5659_PWR_ANLG_3, 0x0000);
4025 regmap_write(rt5659->regmap, RT5659_CALIB_ADC_CTRL, 0x2005);
4026 regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_2, 0x20c0);
4027 regmap_write(rt5659->regmap, RT5659_DEPOP_1, 0x0000);
4028 regmap_write(rt5659->regmap, RT5659_CLASSD_1, 0x0011);
4029 regmap_write(rt5659->regmap, RT5659_CLASSD_2, 0x0150);
4030 regmap_write(rt5659->regmap, RT5659_PWR_ANLG_1, 0xfe3e);
4031 regmap_write(rt5659->regmap, RT5659_MONO_OUT, 0xc80a);
4032 regmap_write(rt5659->regmap, RT5659_MONO_AMP_CALIB_CTRL_1, 0x1e04);
4033 regmap_write(rt5659->regmap, RT5659_PWR_MIXER, 0x0000);
4034 regmap_write(rt5659->regmap, RT5659_PWR_VOL, 0x0000);
4035 regmap_write(rt5659->regmap, RT5659_PWR_DIG_1, 0x0000);
4036 regmap_write(rt5659->regmap, RT5659_PWR_DIG_2, 0x0000);
4037 regmap_write(rt5659->regmap, RT5659_PWR_ANLG_1, 0x003e);
4038 regmap_write(rt5659->regmap, RT5659_CLASSD_CTRL_1, 0x0060);
4039 regmap_write(rt5659->regmap, RT5659_CLASSD_0, 0x2021);
4040 regmap_write(rt5659->regmap, RT5659_GLB_CLK, 0x0000);
4041 regmap_write(rt5659->regmap, RT5659_MICBIAS_2, 0x0080);
4042 regmap_write(rt5659->regmap, RT5659_HP_VOL, 0x8080);
4043 regmap_write(rt5659->regmap, RT5659_HP_CHARGE_PUMP_1, 0x0c16);
4046 static void rt5659_intel_hd_header_probe_setup(struct rt5659_priv *rt5659)
4050 regmap_read(rt5659->regmap, RT5659_GPIO_STA, &value);
4051 if (!(value & 0x8)) {
4052 rt5659->hda_hp_plugged = true;
4053 regmap_update_bits(rt5659->regmap, RT5659_IRQ_CTRL_1,
4056 regmap_update_bits(rt5659->regmap, RT5659_IRQ_CTRL_1,
4060 regmap_update_bits(rt5659->regmap, RT5659_PWR_ANLG_1,
4061 RT5659_PWR_VREF2 | RT5659_PWR_MB,
4062 RT5659_PWR_VREF2 | RT5659_PWR_MB);
4064 regmap_update_bits(rt5659->regmap, RT5659_PWR_ANLG_1,
4065 RT5659_PWR_FV2, RT5659_PWR_FV2);
4067 regmap_update_bits(rt5659->regmap, RT5659_PWR_ANLG_3, RT5659_PWR_LDO2,
4069 regmap_update_bits(rt5659->regmap, RT5659_PWR_ANLG_2, RT5659_PWR_MB1,
4071 regmap_update_bits(rt5659->regmap, RT5659_PWR_VOL, RT5659_PWR_MIC_DET,
4072 RT5659_PWR_MIC_DET);
4075 regmap_update_bits(rt5659->regmap, RT5659_4BTN_IL_CMD_2,
4076 RT5659_4BTN_IL_MASK, RT5659_4BTN_IL_EN);
4077 regmap_read(rt5659->regmap, RT5659_4BTN_IL_CMD_1, &value);
4078 regmap_write(rt5659->regmap, RT5659_4BTN_IL_CMD_1, value);
4079 regmap_read(rt5659->regmap, RT5659_4BTN_IL_CMD_1, &value);
4081 if (value & 0x2000) {
4082 rt5659->hda_mic_plugged = true;
4083 regmap_update_bits(rt5659->regmap, RT5659_IRQ_CTRL_2,
4086 regmap_update_bits(rt5659->regmap, RT5659_IRQ_CTRL_2,
4090 regmap_update_bits(rt5659->regmap, RT5659_IRQ_CTRL_2,
4091 RT5659_IL_IRQ_MASK, RT5659_IL_IRQ_EN);
4094 static int rt5659_i2c_probe(struct i2c_client *i2c)
4096 struct rt5659_platform_data *pdata = dev_get_platdata(&i2c->dev);
4097 struct rt5659_priv *rt5659;
4101 rt5659 = devm_kzalloc(&i2c->dev, sizeof(struct rt5659_priv),
4107 i2c_set_clientdata(i2c, rt5659);
4110 rt5659->pdata = *pdata;
4112 rt5659_parse_dt(rt5659, &i2c->dev);
4114 rt5659->gpiod_ldo1_en = devm_gpiod_get_optional(&i2c->dev, "ldo1-en",
4116 if (IS_ERR(rt5659->gpiod_ldo1_en))
4117 dev_warn(&i2c->dev, "Request ldo1-en GPIO failed\n");
4119 rt5659->gpiod_reset = devm_gpiod_get_optional(&i2c->dev, "reset",
4122 /* Sleep for 300 ms miniumum */
4125 rt5659->regmap = devm_regmap_init_i2c(i2c, &rt5659_regmap);
4126 if (IS_ERR(rt5659->regmap)) {
4127 ret = PTR_ERR(rt5659->regmap);
4128 dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
4133 regmap_read(rt5659->regmap, RT5659_DEVICE_ID, &val);
4134 if (val != DEVICE_ID) {
4136 "Device with ID register %x is not rt5659\n", val);
4140 regmap_write(rt5659->regmap, RT5659_RESET, 0);
4142 /* Check if MCLK provided */
4143 rt5659->mclk = devm_clk_get_optional(&i2c->dev, "mclk");
4144 if (IS_ERR(rt5659->mclk))
4145 return PTR_ERR(rt5659->mclk);
4147 rt5659_calibrate(rt5659);
4149 /* line in diff mode*/
4150 if (rt5659->pdata.in1_diff)
4151 regmap_update_bits(rt5659->regmap, RT5659_IN1_IN2,
4152 RT5659_IN1_DF_MASK, RT5659_IN1_DF_MASK);
4153 if (rt5659->pdata.in3_diff)
4154 regmap_update_bits(rt5659->regmap, RT5659_IN3_IN4,
4155 RT5659_IN3_DF_MASK, RT5659_IN3_DF_MASK);
4156 if (rt5659->pdata.in4_diff)
4157 regmap_update_bits(rt5659->regmap, RT5659_IN3_IN4,
4158 RT5659_IN4_DF_MASK, RT5659_IN4_DF_MASK);
4161 if (rt5659->pdata.dmic1_data_pin != RT5659_DMIC1_NULL ||
4162 rt5659->pdata.dmic2_data_pin != RT5659_DMIC2_NULL) {
4163 regmap_update_bits(rt5659->regmap, RT5659_GPIO_CTRL_1,
4164 RT5659_GP2_PIN_MASK, RT5659_GP2_PIN_DMIC1_SCL);
4166 switch (rt5659->pdata.dmic1_data_pin) {
4167 case RT5659_DMIC1_DATA_IN2N:
4168 regmap_update_bits(rt5659->regmap, RT5659_DMIC_CTRL_1,
4169 RT5659_DMIC_1_DP_MASK, RT5659_DMIC_1_DP_IN2N);
4172 case RT5659_DMIC1_DATA_GPIO5:
4173 regmap_update_bits(rt5659->regmap,
4175 RT5659_I2S2_PIN_MASK,
4176 RT5659_I2S2_PIN_GPIO);
4177 regmap_update_bits(rt5659->regmap, RT5659_DMIC_CTRL_1,
4178 RT5659_DMIC_1_DP_MASK, RT5659_DMIC_1_DP_GPIO5);
4179 regmap_update_bits(rt5659->regmap, RT5659_GPIO_CTRL_1,
4180 RT5659_GP5_PIN_MASK, RT5659_GP5_PIN_DMIC1_SDA);
4183 case RT5659_DMIC1_DATA_GPIO9:
4184 regmap_update_bits(rt5659->regmap, RT5659_DMIC_CTRL_1,
4185 RT5659_DMIC_1_DP_MASK, RT5659_DMIC_1_DP_GPIO9);
4186 regmap_update_bits(rt5659->regmap, RT5659_GPIO_CTRL_1,
4187 RT5659_GP9_PIN_MASK, RT5659_GP9_PIN_DMIC1_SDA);
4190 case RT5659_DMIC1_DATA_GPIO11:
4191 regmap_update_bits(rt5659->regmap, RT5659_DMIC_CTRL_1,
4192 RT5659_DMIC_1_DP_MASK, RT5659_DMIC_1_DP_GPIO11);
4193 regmap_update_bits(rt5659->regmap, RT5659_GPIO_CTRL_1,
4194 RT5659_GP11_PIN_MASK,
4195 RT5659_GP11_PIN_DMIC1_SDA);
4199 dev_dbg(&i2c->dev, "no DMIC1\n");
4203 switch (rt5659->pdata.dmic2_data_pin) {
4204 case RT5659_DMIC2_DATA_IN2P:
4205 regmap_update_bits(rt5659->regmap,
4207 RT5659_DMIC_2_DP_MASK,
4208 RT5659_DMIC_2_DP_IN2P);
4211 case RT5659_DMIC2_DATA_GPIO6:
4212 regmap_update_bits(rt5659->regmap,
4214 RT5659_DMIC_2_DP_MASK,
4215 RT5659_DMIC_2_DP_GPIO6);
4216 regmap_update_bits(rt5659->regmap,
4218 RT5659_GP6_PIN_MASK,
4219 RT5659_GP6_PIN_DMIC2_SDA);
4222 case RT5659_DMIC2_DATA_GPIO10:
4223 regmap_update_bits(rt5659->regmap,
4225 RT5659_DMIC_2_DP_MASK,
4226 RT5659_DMIC_2_DP_GPIO10);
4227 regmap_update_bits(rt5659->regmap,
4229 RT5659_GP10_PIN_MASK,
4230 RT5659_GP10_PIN_DMIC2_SDA);
4233 case RT5659_DMIC2_DATA_GPIO12:
4234 regmap_update_bits(rt5659->regmap,
4236 RT5659_DMIC_2_DP_MASK,
4237 RT5659_DMIC_2_DP_GPIO12);
4238 regmap_update_bits(rt5659->regmap,
4240 RT5659_GP12_PIN_MASK,
4241 RT5659_GP12_PIN_DMIC2_SDA);
4245 dev_dbg(&i2c->dev, "no DMIC2\n");
4250 regmap_update_bits(rt5659->regmap, RT5659_GPIO_CTRL_1,
4251 RT5659_GP2_PIN_MASK | RT5659_GP5_PIN_MASK |
4252 RT5659_GP9_PIN_MASK | RT5659_GP11_PIN_MASK |
4253 RT5659_GP6_PIN_MASK | RT5659_GP10_PIN_MASK |
4254 RT5659_GP12_PIN_MASK,
4255 RT5659_GP2_PIN_GPIO2 | RT5659_GP5_PIN_GPIO5 |
4256 RT5659_GP9_PIN_GPIO9 | RT5659_GP11_PIN_GPIO11 |
4257 RT5659_GP6_PIN_GPIO6 | RT5659_GP10_PIN_GPIO10 |
4258 RT5659_GP12_PIN_GPIO12);
4259 regmap_update_bits(rt5659->regmap, RT5659_DMIC_CTRL_1,
4260 RT5659_DMIC_1_DP_MASK | RT5659_DMIC_2_DP_MASK,
4261 RT5659_DMIC_1_DP_IN2N | RT5659_DMIC_2_DP_IN2P);
4264 switch (rt5659->pdata.jd_src) {
4266 regmap_write(rt5659->regmap, RT5659_EJD_CTRL_1, 0xa880);
4267 regmap_write(rt5659->regmap, RT5659_RC_CLK_CTRL, 0x9000);
4268 regmap_write(rt5659->regmap, RT5659_GPIO_CTRL_1, 0xc800);
4269 regmap_update_bits(rt5659->regmap, RT5659_PWR_ANLG_1,
4270 RT5659_PWR_MB, RT5659_PWR_MB);
4271 regmap_write(rt5659->regmap, RT5659_PWR_ANLG_2, 0x0001);
4272 regmap_write(rt5659->regmap, RT5659_IRQ_CTRL_2, 0x0040);
4273 INIT_DELAYED_WORK(&rt5659->jack_detect_work,
4274 rt5659_jack_detect_work);
4276 case RT5659_JD_HDA_HEADER:
4277 regmap_write(rt5659->regmap, RT5659_GPIO_CTRL_3, 0x8000);
4278 regmap_write(rt5659->regmap, RT5659_RC_CLK_CTRL, 0x0900);
4279 regmap_write(rt5659->regmap, RT5659_EJD_CTRL_1, 0x70c0);
4280 regmap_write(rt5659->regmap, RT5659_JD_CTRL_1, 0x2000);
4281 regmap_write(rt5659->regmap, RT5659_IRQ_CTRL_1, 0x0040);
4282 INIT_DELAYED_WORK(&rt5659->jack_detect_work,
4283 rt5659_jack_detect_intel_hd_header);
4284 rt5659_intel_hd_header_probe_setup(rt5659);
4291 ret = devm_request_threaded_irq(&i2c->dev, i2c->irq, NULL,
4292 rt5659_irq, IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING
4293 | IRQF_ONESHOT, "rt5659", rt5659);
4295 dev_err(&i2c->dev, "Failed to request IRQ: %d\n", ret);
4297 /* Enable IRQ output for GPIO1 pin any way */
4298 regmap_update_bits(rt5659->regmap, RT5659_GPIO_CTRL_1,
4299 RT5659_GP1_PIN_MASK, RT5659_GP1_PIN_IRQ);
4302 return devm_snd_soc_register_component(&i2c->dev,
4303 &soc_component_dev_rt5659,
4304 rt5659_dai, ARRAY_SIZE(rt5659_dai));
4307 static void rt5659_i2c_shutdown(struct i2c_client *client)
4309 struct rt5659_priv *rt5659 = i2c_get_clientdata(client);
4311 regmap_write(rt5659->regmap, RT5659_RESET, 0);
4315 static const struct of_device_id rt5659_of_match[] = {
4316 { .compatible = "realtek,rt5658", },
4317 { .compatible = "realtek,rt5659", },
4320 MODULE_DEVICE_TABLE(of, rt5659_of_match);
4324 static const struct acpi_device_id rt5659_acpi_match[] = {
4329 MODULE_DEVICE_TABLE(acpi, rt5659_acpi_match);
4332 static struct i2c_driver rt5659_i2c_driver = {
4335 .of_match_table = of_match_ptr(rt5659_of_match),
4336 .acpi_match_table = ACPI_PTR(rt5659_acpi_match),
4338 .probe = rt5659_i2c_probe,
4339 .shutdown = rt5659_i2c_shutdown,
4340 .id_table = rt5659_i2c_id,
4342 module_i2c_driver(rt5659_i2c_driver);
4344 MODULE_DESCRIPTION("ASoC RT5659 driver");
4345 MODULE_AUTHOR("Bard Liao <bardliao@realtek.com>");
4346 MODULE_LICENSE("GPL v2");
projects / releases.git / blob