2 * rt5659.c -- RT5659/RT5658 ALSA SoC audio codec driver
4 * Copyright 2015 Realtek Semiconductor Corp.
5 * Author: Bard Liao <bardliao@realtek.com>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
12 #include <linux/clk.h>
13 #include <linux/module.h>
14 #include <linux/moduleparam.h>
15 #include <linux/init.h>
16 #include <linux/delay.h>
18 #include <linux/i2c.h>
19 #include <linux/platform_device.h>
20 #include <linux/spi/spi.h>
21 #include <linux/acpi.h>
22 #include <linux/gpio.h>
23 #include <linux/gpio/consumer.h>
24 #include <sound/core.h>
25 #include <sound/pcm.h>
26 #include <sound/pcm_params.h>
27 #include <sound/jack.h>
28 #include <sound/soc.h>
29 #include <sound/soc-dapm.h>
30 #include <sound/initval.h>
31 #include <sound/tlv.h>
32 #include <sound/rt5659.h>
37 static const struct reg_default rt5659_reg[] = {
534 static bool rt5659_volatile_register(struct device *dev, unsigned int reg)
538 case RT5659_EJD_CTRL_2:
539 case RT5659_SILENCE_CTRL:
540 case RT5659_DAC2_DIG_VOL:
541 case RT5659_HP_IMP_GAIN_2:
542 case RT5659_PDM_OUT_CTRL:
543 case RT5659_PDM_DATA_CTRL_1:
544 case RT5659_PDM_DATA_CTRL_4:
545 case RT5659_HAPTIC_GEN_CTRL_1:
546 case RT5659_HAPTIC_GEN_CTRL_3:
547 case RT5659_HAPTIC_LPF_CTRL_3:
549 case RT5659_MICBIAS_1:
551 case RT5659_ADC_EQ_CTRL_1:
552 case RT5659_DAC_EQ_CTRL_1:
553 case RT5659_INT_ST_1:
554 case RT5659_INT_ST_2:
555 case RT5659_GPIO_STA:
556 case RT5659_SINE_GEN_CTRL_1:
557 case RT5659_IL_CMD_1:
558 case RT5659_4BTN_IL_CMD_1:
559 case RT5659_PSV_IL_CMD_1:
560 case RT5659_AJD1_CTRL:
561 case RT5659_AJD2_AJD3_CTRL:
562 case RT5659_JD_CTRL_3:
563 case RT5659_VENDOR_ID:
564 case RT5659_VENDOR_ID_1:
565 case RT5659_DEVICE_ID:
566 case RT5659_MEMORY_TEST:
567 case RT5659_SOFT_RAMP_DEPOP_DAC_CLK_CTRL:
568 case RT5659_VOL_TEST:
569 case RT5659_STO_NG2_CTRL_1:
570 case RT5659_STO_NG2_CTRL_5:
571 case RT5659_STO_NG2_CTRL_6:
572 case RT5659_STO_NG2_CTRL_7:
573 case RT5659_MONO_NG2_CTRL_1:
574 case RT5659_MONO_NG2_CTRL_5:
575 case RT5659_MONO_NG2_CTRL_6:
576 case RT5659_HP_IMP_SENS_CTRL_1:
577 case RT5659_HP_IMP_SENS_CTRL_3:
578 case RT5659_HP_IMP_SENS_CTRL_4:
579 case RT5659_HP_CALIB_CTRL_1:
580 case RT5659_HP_CALIB_CTRL_9:
581 case RT5659_HP_CALIB_STA_1:
582 case RT5659_HP_CALIB_STA_2:
583 case RT5659_HP_CALIB_STA_3:
584 case RT5659_HP_CALIB_STA_4:
585 case RT5659_HP_CALIB_STA_5:
586 case RT5659_HP_CALIB_STA_6:
587 case RT5659_HP_CALIB_STA_7:
588 case RT5659_HP_CALIB_STA_8:
589 case RT5659_HP_CALIB_STA_9:
590 case RT5659_MONO_AMP_CALIB_CTRL_1:
591 case RT5659_MONO_AMP_CALIB_CTRL_3:
592 case RT5659_MONO_AMP_CALIB_STA_1:
593 case RT5659_MONO_AMP_CALIB_STA_2:
594 case RT5659_MONO_AMP_CALIB_STA_3:
595 case RT5659_MONO_AMP_CALIB_STA_4:
596 case RT5659_SPK_PWR_LMT_STA_1:
597 case RT5659_SPK_PWR_LMT_STA_2:
598 case RT5659_SPK_PWR_LMT_STA_3:
599 case RT5659_SPK_PWR_LMT_STA_4:
600 case RT5659_SPK_PWR_LMT_STA_5:
601 case RT5659_SPK_PWR_LMT_STA_6:
602 case RT5659_SPK_DC_CAILB_CTRL_1:
603 case RT5659_SPK_DC_CAILB_STA_1:
604 case RT5659_SPK_DC_CAILB_STA_2:
605 case RT5659_SPK_DC_CAILB_STA_3:
606 case RT5659_SPK_DC_CAILB_STA_4:
607 case RT5659_SPK_DC_CAILB_STA_5:
608 case RT5659_SPK_DC_CAILB_STA_6:
609 case RT5659_SPK_DC_CAILB_STA_7:
610 case RT5659_SPK_DC_CAILB_STA_8:
611 case RT5659_SPK_DC_CAILB_STA_9:
612 case RT5659_SPK_DC_CAILB_STA_10:
613 case RT5659_SPK_VDD_STA_1:
614 case RT5659_SPK_VDD_STA_2:
615 case RT5659_SPK_DC_DET_CTRL_1:
616 case RT5659_PURE_DC_DET_CTRL_1:
617 case RT5659_PURE_DC_DET_CTRL_2:
618 case RT5659_DRC1_PRIV_1:
619 case RT5659_DRC1_PRIV_4:
620 case RT5659_DRC1_PRIV_5:
621 case RT5659_DRC1_PRIV_6:
622 case RT5659_DRC1_PRIV_7:
623 case RT5659_DRC2_PRIV_1:
624 case RT5659_DRC2_PRIV_4:
625 case RT5659_DRC2_PRIV_5:
626 case RT5659_DRC2_PRIV_6:
627 case RT5659_DRC2_PRIV_7:
628 case RT5659_ALC_PGA_STA_1:
629 case RT5659_ALC_PGA_STA_2:
630 case RT5659_ALC_PGA_STA_3:
637 static bool rt5659_readable_register(struct device *dev, unsigned int reg)
644 case RT5659_MONO_OUT:
645 case RT5659_HPL_GAIN:
646 case RT5659_HPR_GAIN:
647 case RT5659_MONO_GAIN:
648 case RT5659_SPDIF_CTRL_1:
649 case RT5659_SPDIF_CTRL_2:
650 case RT5659_CAL_BST_CTRL:
653 case RT5659_INL1_INR1_VOL:
654 case RT5659_EJD_CTRL_1:
655 case RT5659_EJD_CTRL_2:
656 case RT5659_EJD_CTRL_3:
657 case RT5659_SILENCE_CTRL:
658 case RT5659_PSV_CTRL:
659 case RT5659_SIDETONE_CTRL:
660 case RT5659_DAC1_DIG_VOL:
661 case RT5659_DAC2_DIG_VOL:
662 case RT5659_DAC_CTRL:
663 case RT5659_STO1_ADC_DIG_VOL:
664 case RT5659_MONO_ADC_DIG_VOL:
665 case RT5659_STO2_ADC_DIG_VOL:
666 case RT5659_STO1_BOOST:
667 case RT5659_MONO_BOOST:
668 case RT5659_STO2_BOOST:
669 case RT5659_HP_IMP_GAIN_1:
670 case RT5659_HP_IMP_GAIN_2:
671 case RT5659_STO1_ADC_MIXER:
672 case RT5659_MONO_ADC_MIXER:
673 case RT5659_AD_DA_MIXER:
674 case RT5659_STO_DAC_MIXER:
675 case RT5659_MONO_DAC_MIXER:
676 case RT5659_DIG_MIXER:
677 case RT5659_A_DAC_MUX:
678 case RT5659_DIG_INF23_DATA:
679 case RT5659_PDM_OUT_CTRL:
680 case RT5659_PDM_DATA_CTRL_1:
681 case RT5659_PDM_DATA_CTRL_2:
682 case RT5659_PDM_DATA_CTRL_3:
683 case RT5659_PDM_DATA_CTRL_4:
684 case RT5659_SPDIF_CTRL:
685 case RT5659_REC1_GAIN:
686 case RT5659_REC1_L1_MIXER:
687 case RT5659_REC1_L2_MIXER:
688 case RT5659_REC1_R1_MIXER:
689 case RT5659_REC1_R2_MIXER:
691 case RT5659_REC2_L1_MIXER:
692 case RT5659_REC2_L2_MIXER:
693 case RT5659_REC2_R1_MIXER:
694 case RT5659_REC2_R2_MIXER:
695 case RT5659_SPK_L_MIXER:
696 case RT5659_SPK_R_MIXER:
697 case RT5659_SPO_AMP_GAIN:
698 case RT5659_ALC_BACK_GAIN:
699 case RT5659_MONOMIX_GAIN:
700 case RT5659_MONOMIX_IN_GAIN:
701 case RT5659_OUT_L_GAIN:
702 case RT5659_OUT_L_MIXER:
703 case RT5659_OUT_R_GAIN:
704 case RT5659_OUT_R_MIXER:
705 case RT5659_LOUT_MIXER:
706 case RT5659_HAPTIC_GEN_CTRL_1:
707 case RT5659_HAPTIC_GEN_CTRL_2:
708 case RT5659_HAPTIC_GEN_CTRL_3:
709 case RT5659_HAPTIC_GEN_CTRL_4:
710 case RT5659_HAPTIC_GEN_CTRL_5:
711 case RT5659_HAPTIC_GEN_CTRL_6:
712 case RT5659_HAPTIC_GEN_CTRL_7:
713 case RT5659_HAPTIC_GEN_CTRL_8:
714 case RT5659_HAPTIC_GEN_CTRL_9:
715 case RT5659_HAPTIC_GEN_CTRL_10:
716 case RT5659_HAPTIC_GEN_CTRL_11:
717 case RT5659_HAPTIC_LPF_CTRL_1:
718 case RT5659_HAPTIC_LPF_CTRL_2:
719 case RT5659_HAPTIC_LPF_CTRL_3:
720 case RT5659_PWR_DIG_1:
721 case RT5659_PWR_DIG_2:
722 case RT5659_PWR_ANLG_1:
723 case RT5659_PWR_ANLG_2:
724 case RT5659_PWR_ANLG_3:
725 case RT5659_PWR_MIXER:
727 case RT5659_PRIV_INDEX:
729 case RT5659_PRIV_DATA:
730 case RT5659_PRE_DIV_1:
731 case RT5659_PRE_DIV_2:
732 case RT5659_I2S1_SDP:
733 case RT5659_I2S2_SDP:
734 case RT5659_I2S3_SDP:
735 case RT5659_ADDA_CLK_1:
736 case RT5659_ADDA_CLK_2:
737 case RT5659_DMIC_CTRL_1:
738 case RT5659_DMIC_CTRL_2:
739 case RT5659_TDM_CTRL_1:
740 case RT5659_TDM_CTRL_2:
741 case RT5659_TDM_CTRL_3:
742 case RT5659_TDM_CTRL_4:
743 case RT5659_TDM_CTRL_5:
745 case RT5659_PLL_CTRL_1:
746 case RT5659_PLL_CTRL_2:
760 case RT5659_HP_CHARGE_PUMP_1:
761 case RT5659_HP_CHARGE_PUMP_2:
762 case RT5659_MICBIAS_1:
763 case RT5659_MICBIAS_2:
767 case RT5659_REC_M1_M2_GAIN_CTRL:
768 case RT5659_RC_CLK_CTRL:
769 case RT5659_CLASSD_CTRL_1:
770 case RT5659_CLASSD_CTRL_2:
771 case RT5659_ADC_EQ_CTRL_1:
772 case RT5659_ADC_EQ_CTRL_2:
773 case RT5659_DAC_EQ_CTRL_1:
774 case RT5659_DAC_EQ_CTRL_2:
775 case RT5659_DAC_EQ_CTRL_3:
776 case RT5659_IRQ_CTRL_1:
777 case RT5659_IRQ_CTRL_2:
778 case RT5659_IRQ_CTRL_3:
779 case RT5659_IRQ_CTRL_4:
780 case RT5659_IRQ_CTRL_5:
781 case RT5659_IRQ_CTRL_6:
782 case RT5659_INT_ST_1:
783 case RT5659_INT_ST_2:
784 case RT5659_GPIO_CTRL_1:
785 case RT5659_GPIO_CTRL_2:
786 case RT5659_GPIO_CTRL_3:
787 case RT5659_GPIO_CTRL_4:
788 case RT5659_GPIO_CTRL_5:
789 case RT5659_GPIO_STA:
790 case RT5659_SINE_GEN_CTRL_1:
791 case RT5659_SINE_GEN_CTRL_2:
792 case RT5659_SINE_GEN_CTRL_3:
793 case RT5659_HP_AMP_DET_CTRL_1:
794 case RT5659_HP_AMP_DET_CTRL_2:
795 case RT5659_SV_ZCD_1:
796 case RT5659_SV_ZCD_2:
797 case RT5659_IL_CMD_1:
798 case RT5659_IL_CMD_2:
799 case RT5659_IL_CMD_3:
800 case RT5659_IL_CMD_4:
801 case RT5659_4BTN_IL_CMD_1:
802 case RT5659_4BTN_IL_CMD_2:
803 case RT5659_4BTN_IL_CMD_3:
804 case RT5659_PSV_IL_CMD_1:
805 case RT5659_PSV_IL_CMD_2:
806 case RT5659_ADC_STO1_HP_CTRL_1:
807 case RT5659_ADC_STO1_HP_CTRL_2:
808 case RT5659_ADC_MONO_HP_CTRL_1:
809 case RT5659_ADC_MONO_HP_CTRL_2:
810 case RT5659_AJD1_CTRL:
811 case RT5659_AJD2_AJD3_CTRL:
815 case RT5659_JD_CTRL_1:
816 case RT5659_JD_CTRL_2:
817 case RT5659_JD_CTRL_3:
818 case RT5659_JD_CTRL_4:
819 case RT5659_DIG_MISC:
822 case RT5659_VENDOR_ID:
823 case RT5659_VENDOR_ID_1:
824 case RT5659_DEVICE_ID:
825 case RT5659_DAC_ADC_DIG_VOL:
826 case RT5659_BIAS_CUR_CTRL_1:
827 case RT5659_BIAS_CUR_CTRL_2:
828 case RT5659_BIAS_CUR_CTRL_3:
829 case RT5659_BIAS_CUR_CTRL_4:
830 case RT5659_BIAS_CUR_CTRL_5:
831 case RT5659_BIAS_CUR_CTRL_6:
832 case RT5659_BIAS_CUR_CTRL_7:
833 case RT5659_BIAS_CUR_CTRL_8:
834 case RT5659_BIAS_CUR_CTRL_9:
835 case RT5659_BIAS_CUR_CTRL_10:
836 case RT5659_MEMORY_TEST:
837 case RT5659_VREF_REC_OP_FB_CAP_CTRL:
838 case RT5659_CLASSD_0:
839 case RT5659_CLASSD_1:
840 case RT5659_CLASSD_2:
841 case RT5659_CLASSD_3:
842 case RT5659_CLASSD_4:
843 case RT5659_CLASSD_5:
844 case RT5659_CLASSD_6:
845 case RT5659_CLASSD_7:
846 case RT5659_CLASSD_8:
847 case RT5659_CLASSD_9:
848 case RT5659_CLASSD_10:
849 case RT5659_CHARGE_PUMP_1:
850 case RT5659_CHARGE_PUMP_2:
851 case RT5659_DIG_IN_CTRL_1:
852 case RT5659_DIG_IN_CTRL_2:
853 case RT5659_PAD_DRIVING_CTRL:
854 case RT5659_SOFT_RAMP_DEPOP:
856 case RT5659_CHOP_DAC:
857 case RT5659_CHOP_ADC:
858 case RT5659_CALIB_ADC_CTRL:
859 case RT5659_SOFT_RAMP_DEPOP_DAC_CLK_CTRL:
860 case RT5659_VOL_TEST:
861 case RT5659_TEST_MODE_CTRL_1:
862 case RT5659_TEST_MODE_CTRL_2:
863 case RT5659_TEST_MODE_CTRL_3:
864 case RT5659_TEST_MODE_CTRL_4:
865 case RT5659_BASSBACK_CTRL:
866 case RT5659_MP3_PLUS_CTRL_1:
867 case RT5659_MP3_PLUS_CTRL_2:
868 case RT5659_MP3_HPF_A1:
869 case RT5659_MP3_HPF_A2:
870 case RT5659_MP3_HPF_H0:
871 case RT5659_MP3_LPF_H0:
872 case RT5659_3D_SPK_CTRL:
873 case RT5659_3D_SPK_COEF_1:
874 case RT5659_3D_SPK_COEF_2:
875 case RT5659_3D_SPK_COEF_3:
876 case RT5659_3D_SPK_COEF_4:
877 case RT5659_3D_SPK_COEF_5:
878 case RT5659_3D_SPK_COEF_6:
879 case RT5659_3D_SPK_COEF_7:
880 case RT5659_STO_NG2_CTRL_1:
881 case RT5659_STO_NG2_CTRL_2:
882 case RT5659_STO_NG2_CTRL_3:
883 case RT5659_STO_NG2_CTRL_4:
884 case RT5659_STO_NG2_CTRL_5:
885 case RT5659_STO_NG2_CTRL_6:
886 case RT5659_STO_NG2_CTRL_7:
887 case RT5659_STO_NG2_CTRL_8:
888 case RT5659_MONO_NG2_CTRL_1:
889 case RT5659_MONO_NG2_CTRL_2:
890 case RT5659_MONO_NG2_CTRL_3:
891 case RT5659_MONO_NG2_CTRL_4:
892 case RT5659_MONO_NG2_CTRL_5:
893 case RT5659_MONO_NG2_CTRL_6:
894 case RT5659_MID_HP_AMP_DET:
895 case RT5659_LOW_HP_AMP_DET:
896 case RT5659_LDO_CTRL:
897 case RT5659_HP_DECROSS_CTRL_1:
898 case RT5659_HP_DECROSS_CTRL_2:
899 case RT5659_HP_DECROSS_CTRL_3:
900 case RT5659_HP_DECROSS_CTRL_4:
901 case RT5659_HP_IMP_SENS_CTRL_1:
902 case RT5659_HP_IMP_SENS_CTRL_2:
903 case RT5659_HP_IMP_SENS_CTRL_3:
904 case RT5659_HP_IMP_SENS_CTRL_4:
905 case RT5659_HP_IMP_SENS_MAP_1:
906 case RT5659_HP_IMP_SENS_MAP_2:
907 case RT5659_HP_IMP_SENS_MAP_3:
908 case RT5659_HP_IMP_SENS_MAP_4:
909 case RT5659_HP_IMP_SENS_MAP_5:
910 case RT5659_HP_IMP_SENS_MAP_6:
911 case RT5659_HP_IMP_SENS_MAP_7:
912 case RT5659_HP_IMP_SENS_MAP_8:
913 case RT5659_HP_LOGIC_CTRL_1:
914 case RT5659_HP_LOGIC_CTRL_2:
915 case RT5659_HP_CALIB_CTRL_1:
916 case RT5659_HP_CALIB_CTRL_2:
917 case RT5659_HP_CALIB_CTRL_3:
918 case RT5659_HP_CALIB_CTRL_4:
919 case RT5659_HP_CALIB_CTRL_5:
920 case RT5659_HP_CALIB_CTRL_6:
921 case RT5659_HP_CALIB_CTRL_7:
922 case RT5659_HP_CALIB_CTRL_9:
923 case RT5659_HP_CALIB_CTRL_10:
924 case RT5659_HP_CALIB_CTRL_11:
925 case RT5659_HP_CALIB_STA_1:
926 case RT5659_HP_CALIB_STA_2:
927 case RT5659_HP_CALIB_STA_3:
928 case RT5659_HP_CALIB_STA_4:
929 case RT5659_HP_CALIB_STA_5:
930 case RT5659_HP_CALIB_STA_6:
931 case RT5659_HP_CALIB_STA_7:
932 case RT5659_HP_CALIB_STA_8:
933 case RT5659_HP_CALIB_STA_9:
934 case RT5659_MONO_AMP_CALIB_CTRL_1:
935 case RT5659_MONO_AMP_CALIB_CTRL_2:
936 case RT5659_MONO_AMP_CALIB_CTRL_3:
937 case RT5659_MONO_AMP_CALIB_CTRL_4:
938 case RT5659_MONO_AMP_CALIB_CTRL_5:
939 case RT5659_MONO_AMP_CALIB_STA_1:
940 case RT5659_MONO_AMP_CALIB_STA_2:
941 case RT5659_MONO_AMP_CALIB_STA_3:
942 case RT5659_MONO_AMP_CALIB_STA_4:
943 case RT5659_SPK_PWR_LMT_CTRL_1:
944 case RT5659_SPK_PWR_LMT_CTRL_2:
945 case RT5659_SPK_PWR_LMT_CTRL_3:
946 case RT5659_SPK_PWR_LMT_STA_1:
947 case RT5659_SPK_PWR_LMT_STA_2:
948 case RT5659_SPK_PWR_LMT_STA_3:
949 case RT5659_SPK_PWR_LMT_STA_4:
950 case RT5659_SPK_PWR_LMT_STA_5:
951 case RT5659_SPK_PWR_LMT_STA_6:
952 case RT5659_FLEX_SPK_BST_CTRL_1:
953 case RT5659_FLEX_SPK_BST_CTRL_2:
954 case RT5659_FLEX_SPK_BST_CTRL_3:
955 case RT5659_FLEX_SPK_BST_CTRL_4:
956 case RT5659_SPK_EX_LMT_CTRL_1:
957 case RT5659_SPK_EX_LMT_CTRL_2:
958 case RT5659_SPK_EX_LMT_CTRL_3:
959 case RT5659_SPK_EX_LMT_CTRL_4:
960 case RT5659_SPK_EX_LMT_CTRL_5:
961 case RT5659_SPK_EX_LMT_CTRL_6:
962 case RT5659_SPK_EX_LMT_CTRL_7:
963 case RT5659_ADJ_HPF_CTRL_1:
964 case RT5659_ADJ_HPF_CTRL_2:
965 case RT5659_SPK_DC_CAILB_CTRL_1:
966 case RT5659_SPK_DC_CAILB_CTRL_2:
967 case RT5659_SPK_DC_CAILB_CTRL_3:
968 case RT5659_SPK_DC_CAILB_CTRL_4:
969 case RT5659_SPK_DC_CAILB_CTRL_5:
970 case RT5659_SPK_DC_CAILB_STA_1:
971 case RT5659_SPK_DC_CAILB_STA_2:
972 case RT5659_SPK_DC_CAILB_STA_3:
973 case RT5659_SPK_DC_CAILB_STA_4:
974 case RT5659_SPK_DC_CAILB_STA_5:
975 case RT5659_SPK_DC_CAILB_STA_6:
976 case RT5659_SPK_DC_CAILB_STA_7:
977 case RT5659_SPK_DC_CAILB_STA_8:
978 case RT5659_SPK_DC_CAILB_STA_9:
979 case RT5659_SPK_DC_CAILB_STA_10:
980 case RT5659_SPK_VDD_STA_1:
981 case RT5659_SPK_VDD_STA_2:
982 case RT5659_SPK_DC_DET_CTRL_1:
983 case RT5659_SPK_DC_DET_CTRL_2:
984 case RT5659_SPK_DC_DET_CTRL_3:
985 case RT5659_PURE_DC_DET_CTRL_1:
986 case RT5659_PURE_DC_DET_CTRL_2:
990 case RT5659_DRC1_CTRL_1:
991 case RT5659_DRC1_CTRL_2:
992 case RT5659_DRC1_CTRL_3:
993 case RT5659_DRC1_CTRL_4:
994 case RT5659_DRC1_CTRL_5:
995 case RT5659_DRC1_CTRL_6:
996 case RT5659_DRC1_HARD_LMT_CTRL_1:
997 case RT5659_DRC1_HARD_LMT_CTRL_2:
998 case RT5659_DRC2_CTRL_1:
999 case RT5659_DRC2_CTRL_2:
1000 case RT5659_DRC2_CTRL_3:
1001 case RT5659_DRC2_CTRL_4:
1002 case RT5659_DRC2_CTRL_5:
1003 case RT5659_DRC2_CTRL_6:
1004 case RT5659_DRC2_HARD_LMT_CTRL_1:
1005 case RT5659_DRC2_HARD_LMT_CTRL_2:
1006 case RT5659_DRC1_PRIV_1:
1007 case RT5659_DRC1_PRIV_2:
1008 case RT5659_DRC1_PRIV_3:
1009 case RT5659_DRC1_PRIV_4:
1010 case RT5659_DRC1_PRIV_5:
1011 case RT5659_DRC1_PRIV_6:
1012 case RT5659_DRC1_PRIV_7:
1013 case RT5659_DRC2_PRIV_1:
1014 case RT5659_DRC2_PRIV_2:
1015 case RT5659_DRC2_PRIV_3:
1016 case RT5659_DRC2_PRIV_4:
1017 case RT5659_DRC2_PRIV_5:
1018 case RT5659_DRC2_PRIV_6:
1019 case RT5659_DRC2_PRIV_7:
1020 case RT5659_MULTI_DRC_CTRL:
1021 case RT5659_CROSS_OVER_1:
1022 case RT5659_CROSS_OVER_2:
1023 case RT5659_CROSS_OVER_3:
1024 case RT5659_CROSS_OVER_4:
1025 case RT5659_CROSS_OVER_5:
1026 case RT5659_CROSS_OVER_6:
1027 case RT5659_CROSS_OVER_7:
1028 case RT5659_CROSS_OVER_8:
1029 case RT5659_CROSS_OVER_9:
1030 case RT5659_CROSS_OVER_10:
1031 case RT5659_ALC_PGA_CTRL_1:
1032 case RT5659_ALC_PGA_CTRL_2:
1033 case RT5659_ALC_PGA_CTRL_3:
1034 case RT5659_ALC_PGA_CTRL_4:
1035 case RT5659_ALC_PGA_CTRL_5:
1036 case RT5659_ALC_PGA_CTRL_6:
1037 case RT5659_ALC_PGA_CTRL_7:
1038 case RT5659_ALC_PGA_CTRL_8:
1039 case RT5659_ALC_PGA_STA_1:
1040 case RT5659_ALC_PGA_STA_2:
1041 case RT5659_ALC_PGA_STA_3:
1042 case RT5659_DAC_L_EQ_PRE_VOL:
1043 case RT5659_DAC_R_EQ_PRE_VOL:
1044 case RT5659_DAC_L_EQ_POST_VOL:
1045 case RT5659_DAC_R_EQ_POST_VOL:
1046 case RT5659_DAC_L_EQ_LPF1_A1:
1047 case RT5659_DAC_L_EQ_LPF1_H0:
1048 case RT5659_DAC_R_EQ_LPF1_A1:
1049 case RT5659_DAC_R_EQ_LPF1_H0:
1050 case RT5659_DAC_L_EQ_BPF2_A1:
1051 case RT5659_DAC_L_EQ_BPF2_A2:
1052 case RT5659_DAC_L_EQ_BPF2_H0:
1053 case RT5659_DAC_R_EQ_BPF2_A1:
1054 case RT5659_DAC_R_EQ_BPF2_A2:
1055 case RT5659_DAC_R_EQ_BPF2_H0:
1056 case RT5659_DAC_L_EQ_BPF3_A1:
1057 case RT5659_DAC_L_EQ_BPF3_A2:
1058 case RT5659_DAC_L_EQ_BPF3_H0:
1059 case RT5659_DAC_R_EQ_BPF3_A1:
1060 case RT5659_DAC_R_EQ_BPF3_A2:
1061 case RT5659_DAC_R_EQ_BPF3_H0:
1062 case RT5659_DAC_L_EQ_BPF4_A1:
1063 case RT5659_DAC_L_EQ_BPF4_A2:
1064 case RT5659_DAC_L_EQ_BPF4_H0:
1065 case RT5659_DAC_R_EQ_BPF4_A1:
1066 case RT5659_DAC_R_EQ_BPF4_A2:
1067 case RT5659_DAC_R_EQ_BPF4_H0:
1068 case RT5659_DAC_L_EQ_HPF1_A1:
1069 case RT5659_DAC_L_EQ_HPF1_H0:
1070 case RT5659_DAC_R_EQ_HPF1_A1:
1071 case RT5659_DAC_R_EQ_HPF1_H0:
1072 case RT5659_DAC_L_EQ_HPF2_A1:
1073 case RT5659_DAC_L_EQ_HPF2_A2:
1074 case RT5659_DAC_L_EQ_HPF2_H0:
1075 case RT5659_DAC_R_EQ_HPF2_A1:
1076 case RT5659_DAC_R_EQ_HPF2_A2:
1077 case RT5659_DAC_R_EQ_HPF2_H0:
1078 case RT5659_DAC_L_BI_EQ_BPF1_H0_1:
1079 case RT5659_DAC_L_BI_EQ_BPF1_H0_2:
1080 case RT5659_DAC_L_BI_EQ_BPF1_B1_1:
1081 case RT5659_DAC_L_BI_EQ_BPF1_B1_2:
1082 case RT5659_DAC_L_BI_EQ_BPF1_B2_1:
1083 case RT5659_DAC_L_BI_EQ_BPF1_B2_2:
1084 case RT5659_DAC_L_BI_EQ_BPF1_A1_1:
1085 case RT5659_DAC_L_BI_EQ_BPF1_A1_2:
1086 case RT5659_DAC_L_BI_EQ_BPF1_A2_1:
1087 case RT5659_DAC_L_BI_EQ_BPF1_A2_2:
1088 case RT5659_DAC_R_BI_EQ_BPF1_H0_1:
1089 case RT5659_DAC_R_BI_EQ_BPF1_H0_2:
1090 case RT5659_DAC_R_BI_EQ_BPF1_B1_1:
1091 case RT5659_DAC_R_BI_EQ_BPF1_B1_2:
1092 case RT5659_DAC_R_BI_EQ_BPF1_B2_1:
1093 case RT5659_DAC_R_BI_EQ_BPF1_B2_2:
1094 case RT5659_DAC_R_BI_EQ_BPF1_A1_1:
1095 case RT5659_DAC_R_BI_EQ_BPF1_A1_2:
1096 case RT5659_DAC_R_BI_EQ_BPF1_A2_1:
1097 case RT5659_DAC_R_BI_EQ_BPF1_A2_2:
1098 case RT5659_ADC_L_EQ_LPF1_A1:
1099 case RT5659_ADC_R_EQ_LPF1_A1:
1100 case RT5659_ADC_L_EQ_LPF1_H0:
1101 case RT5659_ADC_R_EQ_LPF1_H0:
1102 case RT5659_ADC_L_EQ_BPF1_A1:
1103 case RT5659_ADC_R_EQ_BPF1_A1:
1104 case RT5659_ADC_L_EQ_BPF1_A2:
1105 case RT5659_ADC_R_EQ_BPF1_A2:
1106 case RT5659_ADC_L_EQ_BPF1_H0:
1107 case RT5659_ADC_R_EQ_BPF1_H0:
1108 case RT5659_ADC_L_EQ_BPF2_A1:
1109 case RT5659_ADC_R_EQ_BPF2_A1:
1110 case RT5659_ADC_L_EQ_BPF2_A2:
1111 case RT5659_ADC_R_EQ_BPF2_A2:
1112 case RT5659_ADC_L_EQ_BPF2_H0:
1113 case RT5659_ADC_R_EQ_BPF2_H0:
1114 case RT5659_ADC_L_EQ_BPF3_A1:
1115 case RT5659_ADC_R_EQ_BPF3_A1:
1116 case RT5659_ADC_L_EQ_BPF3_A2:
1117 case RT5659_ADC_R_EQ_BPF3_A2:
1118 case RT5659_ADC_L_EQ_BPF3_H0:
1119 case RT5659_ADC_R_EQ_BPF3_H0:
1120 case RT5659_ADC_L_EQ_BPF4_A1:
1121 case RT5659_ADC_R_EQ_BPF4_A1:
1122 case RT5659_ADC_L_EQ_BPF4_A2:
1123 case RT5659_ADC_R_EQ_BPF4_A2:
1124 case RT5659_ADC_L_EQ_BPF4_H0:
1125 case RT5659_ADC_R_EQ_BPF4_H0:
1126 case RT5659_ADC_L_EQ_HPF1_A1:
1127 case RT5659_ADC_R_EQ_HPF1_A1:
1128 case RT5659_ADC_L_EQ_HPF1_H0:
1129 case RT5659_ADC_R_EQ_HPF1_H0:
1130 case RT5659_ADC_L_EQ_PRE_VOL:
1131 case RT5659_ADC_R_EQ_PRE_VOL:
1132 case RT5659_ADC_L_EQ_POST_VOL:
1133 case RT5659_ADC_R_EQ_POST_VOL:
1140 static const DECLARE_TLV_DB_SCALE(hp_vol_tlv, -2325, 75, 0);
1141 static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0);
1142 static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -65625, 375, 0);
1143 static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0);
1144 static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -17625, 375, 0);
1145 static const DECLARE_TLV_DB_SCALE(adc_bst_tlv, 0, 1200, 0);
1146 static const DECLARE_TLV_DB_SCALE(in_bst_tlv, -1200, 75, 0);
1148 /* Interface data select */
1149 static const char * const rt5659_data_select[] = {
1150 "L/R", "R/L", "L/L", "R/R"
1153 static SOC_ENUM_SINGLE_DECL(rt5659_if1_01_adc_enum,
1154 RT5659_TDM_CTRL_2, RT5659_DS_ADC_SLOT01_SFT, rt5659_data_select);
1156 static SOC_ENUM_SINGLE_DECL(rt5659_if1_23_adc_enum,
1157 RT5659_TDM_CTRL_2, RT5659_DS_ADC_SLOT23_SFT, rt5659_data_select);
1159 static SOC_ENUM_SINGLE_DECL(rt5659_if1_45_adc_enum,
1160 RT5659_TDM_CTRL_2, RT5659_DS_ADC_SLOT45_SFT, rt5659_data_select);
1162 static SOC_ENUM_SINGLE_DECL(rt5659_if1_67_adc_enum,
1163 RT5659_TDM_CTRL_2, RT5659_DS_ADC_SLOT67_SFT, rt5659_data_select);
1165 static SOC_ENUM_SINGLE_DECL(rt5659_if2_dac_enum,
1166 RT5659_DIG_INF23_DATA, RT5659_IF2_DAC_SEL_SFT, rt5659_data_select);
1168 static SOC_ENUM_SINGLE_DECL(rt5659_if2_adc_enum,
1169 RT5659_DIG_INF23_DATA, RT5659_IF2_ADC_SEL_SFT, rt5659_data_select);
1171 static SOC_ENUM_SINGLE_DECL(rt5659_if3_dac_enum,
1172 RT5659_DIG_INF23_DATA, RT5659_IF3_DAC_SEL_SFT, rt5659_data_select);
1174 static SOC_ENUM_SINGLE_DECL(rt5659_if3_adc_enum,
1175 RT5659_DIG_INF23_DATA, RT5659_IF3_ADC_SEL_SFT, rt5659_data_select);
1177 static const struct snd_kcontrol_new rt5659_if1_01_adc_swap_mux =
1178 SOC_DAPM_ENUM("IF1 01 ADC Swap Source", rt5659_if1_01_adc_enum);
1180 static const struct snd_kcontrol_new rt5659_if1_23_adc_swap_mux =
1181 SOC_DAPM_ENUM("IF1 23 ADC1 Swap Source", rt5659_if1_23_adc_enum);
1183 static const struct snd_kcontrol_new rt5659_if1_45_adc_swap_mux =
1184 SOC_DAPM_ENUM("IF1 45 ADC1 Swap Source", rt5659_if1_45_adc_enum);
1186 static const struct snd_kcontrol_new rt5659_if1_67_adc_swap_mux =
1187 SOC_DAPM_ENUM("IF1 67 ADC1 Swap Source", rt5659_if1_67_adc_enum);
1189 static const struct snd_kcontrol_new rt5659_if2_dac_swap_mux =
1190 SOC_DAPM_ENUM("IF2 DAC Swap Source", rt5659_if2_dac_enum);
1192 static const struct snd_kcontrol_new rt5659_if2_adc_swap_mux =
1193 SOC_DAPM_ENUM("IF2 ADC Swap Source", rt5659_if2_adc_enum);
1195 static const struct snd_kcontrol_new rt5659_if3_dac_swap_mux =
1196 SOC_DAPM_ENUM("IF3 DAC Swap Source", rt5659_if3_dac_enum);
1198 static const struct snd_kcontrol_new rt5659_if3_adc_swap_mux =
1199 SOC_DAPM_ENUM("IF3 ADC Swap Source", rt5659_if3_adc_enum);
1201 static const char * const rt5659_asrc_clk_src[] = {
1202 "clk_sysy_div_out", "clk_i2s1_track", "clk_i2s2_track",
1203 "clk_i2s3_track", "clk_sys2", "clk_sys3"
1206 static unsigned int rt5659_asrc_clk_map_values[] = {
1210 static SOC_VALUE_ENUM_SINGLE_DECL(
1211 rt5659_da_sto_asrc_enum, RT5659_ASRC_2, RT5659_DA_STO_T_SFT, 0x7,
1212 rt5659_asrc_clk_src, rt5659_asrc_clk_map_values);
1214 static SOC_VALUE_ENUM_SINGLE_DECL(
1215 rt5659_da_monol_asrc_enum, RT5659_ASRC_2, RT5659_DA_MONO_L_T_SFT, 0x7,
1216 rt5659_asrc_clk_src, rt5659_asrc_clk_map_values);
1218 static SOC_VALUE_ENUM_SINGLE_DECL(
1219 rt5659_da_monor_asrc_enum, RT5659_ASRC_2, RT5659_DA_MONO_R_T_SFT, 0x7,
1220 rt5659_asrc_clk_src, rt5659_asrc_clk_map_values);
1222 static SOC_VALUE_ENUM_SINGLE_DECL(
1223 rt5659_ad_sto1_asrc_enum, RT5659_ASRC_2, RT5659_AD_STO1_T_SFT, 0x7,
1224 rt5659_asrc_clk_src, rt5659_asrc_clk_map_values);
1226 static SOC_VALUE_ENUM_SINGLE_DECL(
1227 rt5659_ad_sto2_asrc_enum, RT5659_ASRC_3, RT5659_AD_STO2_T_SFT, 0x7,
1228 rt5659_asrc_clk_src, rt5659_asrc_clk_map_values);
1230 static SOC_VALUE_ENUM_SINGLE_DECL(
1231 rt5659_ad_monol_asrc_enum, RT5659_ASRC_3, RT5659_AD_MONO_L_T_SFT, 0x7,
1232 rt5659_asrc_clk_src, rt5659_asrc_clk_map_values);
1234 static SOC_VALUE_ENUM_SINGLE_DECL(
1235 rt5659_ad_monor_asrc_enum, RT5659_ASRC_3, RT5659_AD_MONO_R_T_SFT, 0x7,
1236 rt5659_asrc_clk_src, rt5659_asrc_clk_map_values);
1238 static int rt5659_hp_vol_put(struct snd_kcontrol *kcontrol,
1239 struct snd_ctl_elem_value *ucontrol)
1241 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
1242 int ret = snd_soc_put_volsw(kcontrol, ucontrol);
1244 if (snd_soc_component_read32(component, RT5659_STO_NG2_CTRL_1) & RT5659_NG2_EN) {
1245 snd_soc_component_update_bits(component, RT5659_STO_NG2_CTRL_1,
1246 RT5659_NG2_EN_MASK, RT5659_NG2_DIS);
1247 snd_soc_component_update_bits(component, RT5659_STO_NG2_CTRL_1,
1248 RT5659_NG2_EN_MASK, RT5659_NG2_EN);
1254 static void rt5659_enable_push_button_irq(struct snd_soc_component *component,
1257 struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
1260 snd_soc_component_write(component, RT5659_4BTN_IL_CMD_1, 0x000b);
1262 /* MICBIAS1 and Mic Det Power for button detect*/
1263 snd_soc_dapm_force_enable_pin(dapm, "MICBIAS1");
1264 snd_soc_dapm_force_enable_pin(dapm,
1266 snd_soc_dapm_sync(dapm);
1268 snd_soc_component_update_bits(component, RT5659_PWR_ANLG_2,
1269 RT5659_PWR_MB1, RT5659_PWR_MB1);
1270 snd_soc_component_update_bits(component, RT5659_PWR_VOL,
1271 RT5659_PWR_MIC_DET, RT5659_PWR_MIC_DET);
1273 snd_soc_component_update_bits(component, RT5659_IRQ_CTRL_2,
1274 RT5659_IL_IRQ_MASK, RT5659_IL_IRQ_EN);
1275 snd_soc_component_update_bits(component, RT5659_4BTN_IL_CMD_2,
1276 RT5659_4BTN_IL_MASK, RT5659_4BTN_IL_EN);
1278 snd_soc_component_update_bits(component, RT5659_4BTN_IL_CMD_2,
1279 RT5659_4BTN_IL_MASK, RT5659_4BTN_IL_DIS);
1280 snd_soc_component_update_bits(component, RT5659_IRQ_CTRL_2,
1281 RT5659_IL_IRQ_MASK, RT5659_IL_IRQ_DIS);
1282 /* MICBIAS1 and Mic Det Power for button detect*/
1283 snd_soc_dapm_disable_pin(dapm, "MICBIAS1");
1284 snd_soc_dapm_disable_pin(dapm, "Mic Det Power");
1285 snd_soc_dapm_sync(dapm);
1290 * rt5659_headset_detect - Detect headset.
1291 * @component: SoC audio component device.
1292 * @jack_insert: Jack insert or not.
1294 * Detect whether is headset or not when jack inserted.
1296 * Returns detect status.
1299 static int rt5659_headset_detect(struct snd_soc_component *component, int jack_insert)
1301 struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
1302 int val, i = 0, sleep_time[5] = {300, 150, 100, 50, 30};
1305 struct rt5659_priv *rt5659 = snd_soc_component_get_drvdata(component);
1308 snd_soc_dapm_force_enable_pin(dapm,
1310 snd_soc_dapm_sync(dapm);
1311 reg_63 = snd_soc_component_read32(component, RT5659_PWR_ANLG_1);
1313 snd_soc_component_update_bits(component, RT5659_PWR_ANLG_1,
1314 RT5659_PWR_VREF2 | RT5659_PWR_MB,
1315 RT5659_PWR_VREF2 | RT5659_PWR_MB);
1317 snd_soc_component_update_bits(component, RT5659_PWR_ANLG_1,
1318 RT5659_PWR_FV2, RT5659_PWR_FV2);
1320 snd_soc_component_write(component, RT5659_EJD_CTRL_2, 0x4160);
1321 snd_soc_component_update_bits(component, RT5659_EJD_CTRL_1,
1324 snd_soc_component_update_bits(component, RT5659_EJD_CTRL_1,
1328 msleep(sleep_time[i]);
1329 val = snd_soc_component_read32(component, RT5659_EJD_CTRL_2) & 0x0003;
1331 if (val == 0x1 || val == 0x2 || val == 0x3)
1337 rt5659->jack_type = SND_JACK_HEADSET;
1338 rt5659_enable_push_button_irq(component, true);
1341 snd_soc_component_write(component, RT5659_PWR_ANLG_1, reg_63);
1342 rt5659->jack_type = SND_JACK_HEADPHONE;
1343 snd_soc_dapm_disable_pin(dapm, "Mic Det Power");
1344 snd_soc_dapm_sync(dapm);
1348 snd_soc_dapm_disable_pin(dapm, "Mic Det Power");
1349 snd_soc_dapm_sync(dapm);
1350 if (rt5659->jack_type == SND_JACK_HEADSET)
1351 rt5659_enable_push_button_irq(component, false);
1352 rt5659->jack_type = 0;
1355 dev_dbg(component->dev, "jack_type = %d\n", rt5659->jack_type);
1356 return rt5659->jack_type;
1359 static int rt5659_button_detect(struct snd_soc_component *component)
1363 val = snd_soc_component_read32(component, RT5659_4BTN_IL_CMD_1);
1364 btn_type = val & 0xfff0;
1365 snd_soc_component_write(component, RT5659_4BTN_IL_CMD_1, val);
1370 static irqreturn_t rt5659_irq(int irq, void *data)
1372 struct rt5659_priv *rt5659 = data;
1374 queue_delayed_work(system_power_efficient_wq,
1375 &rt5659->jack_detect_work, msecs_to_jiffies(250));
1380 int rt5659_set_jack_detect(struct snd_soc_component *component,
1381 struct snd_soc_jack *hs_jack)
1383 struct rt5659_priv *rt5659 = snd_soc_component_get_drvdata(component);
1385 rt5659->hs_jack = hs_jack;
1387 rt5659_irq(0, rt5659);
1391 EXPORT_SYMBOL_GPL(rt5659_set_jack_detect);
1393 static void rt5659_jack_detect_work(struct work_struct *work)
1395 struct rt5659_priv *rt5659 =
1396 container_of(work, struct rt5659_priv, jack_detect_work.work);
1397 int val, btn_type, report = 0;
1399 if (!rt5659->component)
1402 val = snd_soc_component_read32(rt5659->component, RT5659_INT_ST_1) & 0x0080;
1405 if (rt5659->jack_type == 0) {
1406 /* jack was out, report jack type */
1407 report = rt5659_headset_detect(rt5659->component, 1);
1409 /* jack is already in, report button event */
1410 report = SND_JACK_HEADSET;
1411 btn_type = rt5659_button_detect(rt5659->component);
1413 * rt5659 can report three kinds of button behavior,
1414 * one click, double click and hold. However,
1415 * currently we will report button pressed/released
1416 * event. So all the three button behaviors are
1417 * treated as button pressed.
1423 report |= SND_JACK_BTN_0;
1428 report |= SND_JACK_BTN_1;
1433 report |= SND_JACK_BTN_2;
1438 report |= SND_JACK_BTN_3;
1440 case 0x0000: /* unpressed */
1444 dev_err(rt5659->component->dev,
1445 "Unexpected button code 0x%04x\n",
1450 /* button release or spurious interrput*/
1452 report = rt5659->jack_type;
1456 report = rt5659_headset_detect(rt5659->component, 0);
1459 snd_soc_jack_report(rt5659->hs_jack, report, SND_JACK_HEADSET |
1460 SND_JACK_BTN_0 | SND_JACK_BTN_1 |
1461 SND_JACK_BTN_2 | SND_JACK_BTN_3);
1464 static void rt5659_jack_detect_intel_hd_header(struct work_struct *work)
1466 struct rt5659_priv *rt5659 =
1467 container_of(work, struct rt5659_priv, jack_detect_work.work);
1469 bool hp_flag, mic_flag;
1471 if (!rt5659->hs_jack)
1474 /* headphone jack */
1475 regmap_read(rt5659->regmap, RT5659_GPIO_STA, &value);
1476 hp_flag = (!(value & 0x8)) ? true : false;
1478 if (hp_flag != rt5659->hda_hp_plugged) {
1479 rt5659->hda_hp_plugged = hp_flag;
1482 regmap_update_bits(rt5659->regmap, RT5659_IRQ_CTRL_1,
1484 rt5659->jack_type |= SND_JACK_HEADPHONE;
1486 regmap_update_bits(rt5659->regmap, RT5659_IRQ_CTRL_1,
1488 rt5659->jack_type = rt5659->jack_type &
1489 (~SND_JACK_HEADPHONE);
1492 snd_soc_jack_report(rt5659->hs_jack, rt5659->jack_type,
1493 SND_JACK_HEADPHONE);
1497 regmap_read(rt5659->regmap, RT5659_4BTN_IL_CMD_1, &value);
1498 regmap_write(rt5659->regmap, RT5659_4BTN_IL_CMD_1, value);
1499 mic_flag = (value & 0x2000) ? true : false;
1501 if (mic_flag != rt5659->hda_mic_plugged) {
1502 rt5659->hda_mic_plugged = mic_flag;
1504 regmap_update_bits(rt5659->regmap, RT5659_IRQ_CTRL_2,
1506 rt5659->jack_type |= SND_JACK_MICROPHONE;
1508 regmap_update_bits(rt5659->regmap, RT5659_IRQ_CTRL_2,
1510 rt5659->jack_type = rt5659->jack_type
1511 & (~SND_JACK_MICROPHONE);
1514 snd_soc_jack_report(rt5659->hs_jack, rt5659->jack_type,
1515 SND_JACK_MICROPHONE);
1519 static const struct snd_kcontrol_new rt5659_snd_controls[] = {
1520 /* Speaker Output Volume */
1521 SOC_DOUBLE_TLV("Speaker Playback Volume", RT5659_SPO_VOL,
1522 RT5659_L_VOL_SFT, RT5659_R_VOL_SFT, 39, 1, out_vol_tlv),
1524 /* Headphone Output Volume */
1525 SOC_DOUBLE_R_EXT_TLV("Headphone Playback Volume", RT5659_HPL_GAIN,
1526 RT5659_HPR_GAIN, RT5659_G_HP_SFT, 31, 1, snd_soc_get_volsw,
1527 rt5659_hp_vol_put, hp_vol_tlv),
1529 /* Mono Output Volume */
1530 SOC_SINGLE_TLV("Mono Playback Volume", RT5659_MONO_OUT,
1531 RT5659_L_VOL_SFT, 39, 1, out_vol_tlv),
1534 SOC_DOUBLE_TLV("OUT Playback Volume", RT5659_LOUT,
1535 RT5659_L_VOL_SFT, RT5659_R_VOL_SFT, 39, 1, out_vol_tlv),
1537 /* DAC Digital Volume */
1538 SOC_DOUBLE_TLV("DAC1 Playback Volume", RT5659_DAC1_DIG_VOL,
1539 RT5659_L_VOL_SFT, RT5659_R_VOL_SFT, 175, 0, dac_vol_tlv),
1540 SOC_DOUBLE("DAC1 Playback Switch", RT5659_AD_DA_MIXER,
1541 RT5659_M_DAC1_L_SFT, RT5659_M_DAC1_R_SFT, 1, 1),
1543 SOC_DOUBLE_TLV("DAC2 Playback Volume", RT5659_DAC2_DIG_VOL,
1544 RT5659_L_VOL_SFT, RT5659_R_VOL_SFT, 175, 0, dac_vol_tlv),
1545 SOC_DOUBLE("DAC2 Playback Switch", RT5659_DAC_CTRL,
1546 RT5659_M_DAC2_L_VOL_SFT, RT5659_M_DAC2_R_VOL_SFT, 1, 1),
1548 /* IN1/IN2/IN3/IN4 Volume */
1549 SOC_SINGLE_TLV("IN1 Boost Volume", RT5659_IN1_IN2,
1550 RT5659_BST1_SFT, 69, 0, in_bst_tlv),
1551 SOC_SINGLE_TLV("IN2 Boost Volume", RT5659_IN1_IN2,
1552 RT5659_BST2_SFT, 69, 0, in_bst_tlv),
1553 SOC_SINGLE_TLV("IN3 Boost Volume", RT5659_IN3_IN4,
1554 RT5659_BST3_SFT, 69, 0, in_bst_tlv),
1555 SOC_SINGLE_TLV("IN4 Boost Volume", RT5659_IN3_IN4,
1556 RT5659_BST4_SFT, 69, 0, in_bst_tlv),
1558 /* INL/INR Volume Control */
1559 SOC_DOUBLE_TLV("IN Capture Volume", RT5659_INL1_INR1_VOL,
1560 RT5659_INL_VOL_SFT, RT5659_INR_VOL_SFT, 31, 1, in_vol_tlv),
1562 /* ADC Digital Volume Control */
1563 SOC_DOUBLE("STO1 ADC Capture Switch", RT5659_STO1_ADC_DIG_VOL,
1564 RT5659_L_MUTE_SFT, RT5659_R_MUTE_SFT, 1, 1),
1565 SOC_DOUBLE_TLV("STO1 ADC Capture Volume", RT5659_STO1_ADC_DIG_VOL,
1566 RT5659_L_VOL_SFT, RT5659_R_VOL_SFT, 127, 0, adc_vol_tlv),
1567 SOC_DOUBLE("Mono ADC Capture Switch", RT5659_MONO_ADC_DIG_VOL,
1568 RT5659_L_MUTE_SFT, RT5659_R_MUTE_SFT, 1, 1),
1569 SOC_DOUBLE_TLV("Mono ADC Capture Volume", RT5659_MONO_ADC_DIG_VOL,
1570 RT5659_L_VOL_SFT, RT5659_R_VOL_SFT, 127, 0, adc_vol_tlv),
1571 SOC_DOUBLE("STO2 ADC Capture Switch", RT5659_STO2_ADC_DIG_VOL,
1572 RT5659_L_MUTE_SFT, RT5659_R_MUTE_SFT, 1, 1),
1573 SOC_DOUBLE_TLV("STO2 ADC Capture Volume", RT5659_STO2_ADC_DIG_VOL,
1574 RT5659_L_VOL_SFT, RT5659_R_VOL_SFT, 127, 0, adc_vol_tlv),
1576 /* ADC Boost Volume Control */
1577 SOC_DOUBLE_TLV("STO1 ADC Boost Gain Volume", RT5659_STO1_BOOST,
1578 RT5659_STO1_ADC_L_BST_SFT, RT5659_STO1_ADC_R_BST_SFT,
1581 SOC_DOUBLE_TLV("Mono ADC Boost Gain Volume", RT5659_MONO_BOOST,
1582 RT5659_MONO_ADC_L_BST_SFT, RT5659_MONO_ADC_R_BST_SFT,
1585 SOC_DOUBLE_TLV("STO2 ADC Boost Gain Volume", RT5659_STO2_BOOST,
1586 RT5659_STO2_ADC_L_BST_SFT, RT5659_STO2_ADC_R_BST_SFT,
1589 SOC_SINGLE("DAC IF1 DAC1 L Data Switch", RT5659_TDM_CTRL_4, 12, 7, 0),
1590 SOC_SINGLE("DAC IF1 DAC1 R Data Switch", RT5659_TDM_CTRL_4, 8, 7, 0),
1591 SOC_SINGLE("DAC IF1 DAC2 L Data Switch", RT5659_TDM_CTRL_4, 4, 7, 0),
1592 SOC_SINGLE("DAC IF1 DAC2 R Data Switch", RT5659_TDM_CTRL_4, 0, 7, 0),
1596 * set_dmic_clk - Set parameter of dmic.
1599 * @kcontrol: The kcontrol of this widget.
1602 * Choose dmic clock between 1MHz and 3MHz.
1603 * It is better for clock to approximate 3MHz.
1605 static int set_dmic_clk(struct snd_soc_dapm_widget *w,
1606 struct snd_kcontrol *kcontrol, int event)
1608 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1609 struct rt5659_priv *rt5659 = snd_soc_component_get_drvdata(component);
1610 int pd, idx = -EINVAL;
1612 pd = rl6231_get_pre_div(rt5659->regmap,
1613 RT5659_ADDA_CLK_1, RT5659_I2S_PD1_SFT);
1614 idx = rl6231_calc_dmic_clk(rt5659->sysclk / pd);
1617 dev_err(component->dev, "Failed to set DMIC clock\n");
1619 snd_soc_component_update_bits(component, RT5659_DMIC_CTRL_1,
1620 RT5659_DMIC_CLK_MASK, idx << RT5659_DMIC_CLK_SFT);
1625 static int set_adc1_clk(struct snd_soc_dapm_widget *w,
1626 struct snd_kcontrol *kcontrol, int event)
1628 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1631 case SND_SOC_DAPM_POST_PMU:
1632 snd_soc_component_update_bits(component, RT5659_CHOP_ADC,
1633 RT5659_CKXEN_ADC1_MASK | RT5659_CKGEN_ADC1_MASK,
1634 RT5659_CKXEN_ADC1_MASK | RT5659_CKGEN_ADC1_MASK);
1637 case SND_SOC_DAPM_PRE_PMD:
1638 snd_soc_component_update_bits(component, RT5659_CHOP_ADC,
1639 RT5659_CKXEN_ADC1_MASK | RT5659_CKGEN_ADC1_MASK, 0);
1650 static int set_adc2_clk(struct snd_soc_dapm_widget *w,
1651 struct snd_kcontrol *kcontrol, int event)
1653 struct snd_soc_component *component =
1654 snd_soc_dapm_to_component(w->dapm);
1657 case SND_SOC_DAPM_POST_PMU:
1658 snd_soc_component_update_bits(component, RT5659_CHOP_ADC,
1659 RT5659_CKXEN_ADC2_MASK | RT5659_CKGEN_ADC2_MASK,
1660 RT5659_CKXEN_ADC2_MASK | RT5659_CKGEN_ADC2_MASK);
1663 case SND_SOC_DAPM_PRE_PMD:
1664 snd_soc_component_update_bits(component, RT5659_CHOP_ADC,
1665 RT5659_CKXEN_ADC2_MASK | RT5659_CKGEN_ADC2_MASK, 0);
1676 static int rt5659_charge_pump_event(struct snd_soc_dapm_widget *w,
1677 struct snd_kcontrol *kcontrol, int event)
1679 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1682 case SND_SOC_DAPM_PRE_PMU:
1684 snd_soc_component_write(component, RT5659_DEPOP_1, 0x0009);
1686 case SND_SOC_DAPM_POST_PMD:
1687 snd_soc_component_write(component, RT5659_HP_CHARGE_PUMP_1, 0x0c16);
1696 static int is_sys_clk_from_pll(struct snd_soc_dapm_widget *w,
1697 struct snd_soc_dapm_widget *sink)
1700 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1702 val = snd_soc_component_read32(component, RT5659_GLB_CLK);
1703 val &= RT5659_SCLK_SRC_MASK;
1704 if (val == RT5659_SCLK_SRC_PLL1)
1710 static int is_using_asrc(struct snd_soc_dapm_widget *w,
1711 struct snd_soc_dapm_widget *sink)
1713 unsigned int reg, shift, val;
1714 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1717 case RT5659_ADC_MONO_R_ASRC_SFT:
1718 reg = RT5659_ASRC_3;
1719 shift = RT5659_AD_MONO_R_T_SFT;
1721 case RT5659_ADC_MONO_L_ASRC_SFT:
1722 reg = RT5659_ASRC_3;
1723 shift = RT5659_AD_MONO_L_T_SFT;
1725 case RT5659_ADC_STO1_ASRC_SFT:
1726 reg = RT5659_ASRC_2;
1727 shift = RT5659_AD_STO1_T_SFT;
1729 case RT5659_DAC_MONO_R_ASRC_SFT:
1730 reg = RT5659_ASRC_2;
1731 shift = RT5659_DA_MONO_R_T_SFT;
1733 case RT5659_DAC_MONO_L_ASRC_SFT:
1734 reg = RT5659_ASRC_2;
1735 shift = RT5659_DA_MONO_L_T_SFT;
1737 case RT5659_DAC_STO_ASRC_SFT:
1738 reg = RT5659_ASRC_2;
1739 shift = RT5659_DA_STO_T_SFT;
1745 val = (snd_soc_component_read32(component, reg) >> shift) & 0xf;
1750 /* I2S_Pre_Div1 should be 1 in asrc mode */
1751 snd_soc_component_update_bits(component, RT5659_ADDA_CLK_1,
1752 RT5659_I2S_PD1_MASK, RT5659_I2S_PD1_2);
1761 static const struct snd_kcontrol_new rt5659_sto1_adc_l_mix[] = {
1762 SOC_DAPM_SINGLE("ADC1 Switch", RT5659_STO1_ADC_MIXER,
1763 RT5659_M_STO1_ADC_L1_SFT, 1, 1),
1764 SOC_DAPM_SINGLE("ADC2 Switch", RT5659_STO1_ADC_MIXER,
1765 RT5659_M_STO1_ADC_L2_SFT, 1, 1),
1768 static const struct snd_kcontrol_new rt5659_sto1_adc_r_mix[] = {
1769 SOC_DAPM_SINGLE("ADC1 Switch", RT5659_STO1_ADC_MIXER,
1770 RT5659_M_STO1_ADC_R1_SFT, 1, 1),
1771 SOC_DAPM_SINGLE("ADC2 Switch", RT5659_STO1_ADC_MIXER,
1772 RT5659_M_STO1_ADC_R2_SFT, 1, 1),
1775 static const struct snd_kcontrol_new rt5659_mono_adc_l_mix[] = {
1776 SOC_DAPM_SINGLE("ADC1 Switch", RT5659_MONO_ADC_MIXER,
1777 RT5659_M_MONO_ADC_L1_SFT, 1, 1),
1778 SOC_DAPM_SINGLE("ADC2 Switch", RT5659_MONO_ADC_MIXER,
1779 RT5659_M_MONO_ADC_L2_SFT, 1, 1),
1782 static const struct snd_kcontrol_new rt5659_mono_adc_r_mix[] = {
1783 SOC_DAPM_SINGLE("ADC1 Switch", RT5659_MONO_ADC_MIXER,
1784 RT5659_M_MONO_ADC_R1_SFT, 1, 1),
1785 SOC_DAPM_SINGLE("ADC2 Switch", RT5659_MONO_ADC_MIXER,
1786 RT5659_M_MONO_ADC_R2_SFT, 1, 1),
1789 static const struct snd_kcontrol_new rt5659_dac_l_mix[] = {
1790 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5659_AD_DA_MIXER,
1791 RT5659_M_ADCMIX_L_SFT, 1, 1),
1792 SOC_DAPM_SINGLE("DAC1 Switch", RT5659_AD_DA_MIXER,
1793 RT5659_M_DAC1_L_SFT, 1, 1),
1796 static const struct snd_kcontrol_new rt5659_dac_r_mix[] = {
1797 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5659_AD_DA_MIXER,
1798 RT5659_M_ADCMIX_R_SFT, 1, 1),
1799 SOC_DAPM_SINGLE("DAC1 Switch", RT5659_AD_DA_MIXER,
1800 RT5659_M_DAC1_R_SFT, 1, 1),
1803 static const struct snd_kcontrol_new rt5659_sto_dac_l_mix[] = {
1804 SOC_DAPM_SINGLE("DAC L1 Switch", RT5659_STO_DAC_MIXER,
1805 RT5659_M_DAC_L1_STO_L_SFT, 1, 1),
1806 SOC_DAPM_SINGLE("DAC R1 Switch", RT5659_STO_DAC_MIXER,
1807 RT5659_M_DAC_R1_STO_L_SFT, 1, 1),
1808 SOC_DAPM_SINGLE("DAC L2 Switch", RT5659_STO_DAC_MIXER,
1809 RT5659_M_DAC_L2_STO_L_SFT, 1, 1),
1810 SOC_DAPM_SINGLE("DAC R2 Switch", RT5659_STO_DAC_MIXER,
1811 RT5659_M_DAC_R2_STO_L_SFT, 1, 1),
1814 static const struct snd_kcontrol_new rt5659_sto_dac_r_mix[] = {
1815 SOC_DAPM_SINGLE("DAC L1 Switch", RT5659_STO_DAC_MIXER,
1816 RT5659_M_DAC_L1_STO_R_SFT, 1, 1),
1817 SOC_DAPM_SINGLE("DAC R1 Switch", RT5659_STO_DAC_MIXER,
1818 RT5659_M_DAC_R1_STO_R_SFT, 1, 1),
1819 SOC_DAPM_SINGLE("DAC L2 Switch", RT5659_STO_DAC_MIXER,
1820 RT5659_M_DAC_L2_STO_R_SFT, 1, 1),
1821 SOC_DAPM_SINGLE("DAC R2 Switch", RT5659_STO_DAC_MIXER,
1822 RT5659_M_DAC_R2_STO_R_SFT, 1, 1),
1825 static const struct snd_kcontrol_new rt5659_mono_dac_l_mix[] = {
1826 SOC_DAPM_SINGLE("DAC L1 Switch", RT5659_MONO_DAC_MIXER,
1827 RT5659_M_DAC_L1_MONO_L_SFT, 1, 1),
1828 SOC_DAPM_SINGLE("DAC R1 Switch", RT5659_MONO_DAC_MIXER,
1829 RT5659_M_DAC_R1_MONO_L_SFT, 1, 1),
1830 SOC_DAPM_SINGLE("DAC L2 Switch", RT5659_MONO_DAC_MIXER,
1831 RT5659_M_DAC_L2_MONO_L_SFT, 1, 1),
1832 SOC_DAPM_SINGLE("DAC R2 Switch", RT5659_MONO_DAC_MIXER,
1833 RT5659_M_DAC_R2_MONO_L_SFT, 1, 1),
1836 static const struct snd_kcontrol_new rt5659_mono_dac_r_mix[] = {
1837 SOC_DAPM_SINGLE("DAC L1 Switch", RT5659_MONO_DAC_MIXER,
1838 RT5659_M_DAC_L1_MONO_R_SFT, 1, 1),
1839 SOC_DAPM_SINGLE("DAC R1 Switch", RT5659_MONO_DAC_MIXER,
1840 RT5659_M_DAC_R1_MONO_R_SFT, 1, 1),
1841 SOC_DAPM_SINGLE("DAC L2 Switch", RT5659_MONO_DAC_MIXER,
1842 RT5659_M_DAC_L2_MONO_R_SFT, 1, 1),
1843 SOC_DAPM_SINGLE("DAC R2 Switch", RT5659_MONO_DAC_MIXER,
1844 RT5659_M_DAC_R2_MONO_R_SFT, 1, 1),
1847 /* Analog Input Mixer */
1848 static const struct snd_kcontrol_new rt5659_rec1_l_mix[] = {
1849 SOC_DAPM_SINGLE("SPKVOLL Switch", RT5659_REC1_L2_MIXER,
1850 RT5659_M_SPKVOLL_RM1_L_SFT, 1, 1),
1851 SOC_DAPM_SINGLE("INL Switch", RT5659_REC1_L2_MIXER,
1852 RT5659_M_INL_RM1_L_SFT, 1, 1),
1853 SOC_DAPM_SINGLE("BST4 Switch", RT5659_REC1_L2_MIXER,
1854 RT5659_M_BST4_RM1_L_SFT, 1, 1),
1855 SOC_DAPM_SINGLE("BST3 Switch", RT5659_REC1_L2_MIXER,
1856 RT5659_M_BST3_RM1_L_SFT, 1, 1),
1857 SOC_DAPM_SINGLE("BST2 Switch", RT5659_REC1_L2_MIXER,
1858 RT5659_M_BST2_RM1_L_SFT, 1, 1),
1859 SOC_DAPM_SINGLE("BST1 Switch", RT5659_REC1_L2_MIXER,
1860 RT5659_M_BST1_RM1_L_SFT, 1, 1),
1863 static const struct snd_kcontrol_new rt5659_rec1_r_mix[] = {
1864 SOC_DAPM_SINGLE("HPOVOLR Switch", RT5659_REC1_L2_MIXER,
1865 RT5659_M_HPOVOLR_RM1_R_SFT, 1, 1),
1866 SOC_DAPM_SINGLE("INR Switch", RT5659_REC1_R2_MIXER,
1867 RT5659_M_INR_RM1_R_SFT, 1, 1),
1868 SOC_DAPM_SINGLE("BST4 Switch", RT5659_REC1_R2_MIXER,
1869 RT5659_M_BST4_RM1_R_SFT, 1, 1),
1870 SOC_DAPM_SINGLE("BST3 Switch", RT5659_REC1_R2_MIXER,
1871 RT5659_M_BST3_RM1_R_SFT, 1, 1),
1872 SOC_DAPM_SINGLE("BST2 Switch", RT5659_REC1_R2_MIXER,
1873 RT5659_M_BST2_RM1_R_SFT, 1, 1),
1874 SOC_DAPM_SINGLE("BST1 Switch", RT5659_REC1_R2_MIXER,
1875 RT5659_M_BST1_RM1_R_SFT, 1, 1),
1878 static const struct snd_kcontrol_new rt5659_rec2_l_mix[] = {
1879 SOC_DAPM_SINGLE("SPKVOLL Switch", RT5659_REC2_L2_MIXER,
1880 RT5659_M_SPKVOL_RM2_L_SFT, 1, 1),
1881 SOC_DAPM_SINGLE("OUTVOLL Switch", RT5659_REC2_L2_MIXER,
1882 RT5659_M_OUTVOLL_RM2_L_SFT, 1, 1),
1883 SOC_DAPM_SINGLE("BST4 Switch", RT5659_REC2_L2_MIXER,
1884 RT5659_M_BST4_RM2_L_SFT, 1, 1),
1885 SOC_DAPM_SINGLE("BST3 Switch", RT5659_REC2_L2_MIXER,
1886 RT5659_M_BST3_RM2_L_SFT, 1, 1),
1887 SOC_DAPM_SINGLE("BST2 Switch", RT5659_REC2_L2_MIXER,
1888 RT5659_M_BST2_RM2_L_SFT, 1, 1),
1889 SOC_DAPM_SINGLE("BST1 Switch", RT5659_REC2_L2_MIXER,
1890 RT5659_M_BST1_RM2_L_SFT, 1, 1),
1893 static const struct snd_kcontrol_new rt5659_rec2_r_mix[] = {
1894 SOC_DAPM_SINGLE("MONOVOL Switch", RT5659_REC2_R2_MIXER,
1895 RT5659_M_MONOVOL_RM2_R_SFT, 1, 1),
1896 SOC_DAPM_SINGLE("OUTVOLR Switch", RT5659_REC2_R2_MIXER,
1897 RT5659_M_OUTVOLR_RM2_R_SFT, 1, 1),
1898 SOC_DAPM_SINGLE("BST4 Switch", RT5659_REC2_R2_MIXER,
1899 RT5659_M_BST4_RM2_R_SFT, 1, 1),
1900 SOC_DAPM_SINGLE("BST3 Switch", RT5659_REC2_R2_MIXER,
1901 RT5659_M_BST3_RM2_R_SFT, 1, 1),
1902 SOC_DAPM_SINGLE("BST2 Switch", RT5659_REC2_R2_MIXER,
1903 RT5659_M_BST2_RM2_R_SFT, 1, 1),
1904 SOC_DAPM_SINGLE("BST1 Switch", RT5659_REC2_R2_MIXER,
1905 RT5659_M_BST1_RM2_R_SFT, 1, 1),
1908 static const struct snd_kcontrol_new rt5659_spk_l_mix[] = {
1909 SOC_DAPM_SINGLE("DAC L2 Switch", RT5659_SPK_L_MIXER,
1910 RT5659_M_DAC_L2_SM_L_SFT, 1, 1),
1911 SOC_DAPM_SINGLE("BST1 Switch", RT5659_SPK_L_MIXER,
1912 RT5659_M_BST1_SM_L_SFT, 1, 1),
1913 SOC_DAPM_SINGLE("INL Switch", RT5659_SPK_L_MIXER,
1914 RT5659_M_IN_L_SM_L_SFT, 1, 1),
1915 SOC_DAPM_SINGLE("INR Switch", RT5659_SPK_L_MIXER,
1916 RT5659_M_IN_R_SM_L_SFT, 1, 1),
1917 SOC_DAPM_SINGLE("BST3 Switch", RT5659_SPK_L_MIXER,
1918 RT5659_M_BST3_SM_L_SFT, 1, 1),
1921 static const struct snd_kcontrol_new rt5659_spk_r_mix[] = {
1922 SOC_DAPM_SINGLE("DAC R2 Switch", RT5659_SPK_R_MIXER,
1923 RT5659_M_DAC_R2_SM_R_SFT, 1, 1),
1924 SOC_DAPM_SINGLE("BST4 Switch", RT5659_SPK_R_MIXER,
1925 RT5659_M_BST4_SM_R_SFT, 1, 1),
1926 SOC_DAPM_SINGLE("INL Switch", RT5659_SPK_R_MIXER,
1927 RT5659_M_IN_L_SM_R_SFT, 1, 1),
1928 SOC_DAPM_SINGLE("INR Switch", RT5659_SPK_R_MIXER,
1929 RT5659_M_IN_R_SM_R_SFT, 1, 1),
1930 SOC_DAPM_SINGLE("BST3 Switch", RT5659_SPK_R_MIXER,
1931 RT5659_M_BST3_SM_R_SFT, 1, 1),
1934 static const struct snd_kcontrol_new rt5659_monovol_mix[] = {
1935 SOC_DAPM_SINGLE("DAC L2 Switch", RT5659_MONOMIX_IN_GAIN,
1936 RT5659_M_DAC_L2_MM_SFT, 1, 1),
1937 SOC_DAPM_SINGLE("DAC R2 Switch", RT5659_MONOMIX_IN_GAIN,
1938 RT5659_M_DAC_R2_MM_SFT, 1, 1),
1939 SOC_DAPM_SINGLE("BST1 Switch", RT5659_MONOMIX_IN_GAIN,
1940 RT5659_M_BST1_MM_SFT, 1, 1),
1941 SOC_DAPM_SINGLE("BST2 Switch", RT5659_MONOMIX_IN_GAIN,
1942 RT5659_M_BST2_MM_SFT, 1, 1),
1943 SOC_DAPM_SINGLE("BST3 Switch", RT5659_MONOMIX_IN_GAIN,
1944 RT5659_M_BST3_MM_SFT, 1, 1),
1947 static const struct snd_kcontrol_new rt5659_out_l_mix[] = {
1948 SOC_DAPM_SINGLE("DAC L2 Switch", RT5659_OUT_L_MIXER,
1949 RT5659_M_DAC_L2_OM_L_SFT, 1, 1),
1950 SOC_DAPM_SINGLE("INL Switch", RT5659_OUT_L_MIXER,
1951 RT5659_M_IN_L_OM_L_SFT, 1, 1),
1952 SOC_DAPM_SINGLE("BST1 Switch", RT5659_OUT_L_MIXER,
1953 RT5659_M_BST1_OM_L_SFT, 1, 1),
1954 SOC_DAPM_SINGLE("BST2 Switch", RT5659_OUT_L_MIXER,
1955 RT5659_M_BST2_OM_L_SFT, 1, 1),
1956 SOC_DAPM_SINGLE("BST3 Switch", RT5659_OUT_L_MIXER,
1957 RT5659_M_BST3_OM_L_SFT, 1, 1),
1960 static const struct snd_kcontrol_new rt5659_out_r_mix[] = {
1961 SOC_DAPM_SINGLE("DAC R2 Switch", RT5659_OUT_R_MIXER,
1962 RT5659_M_DAC_R2_OM_R_SFT, 1, 1),
1963 SOC_DAPM_SINGLE("INR Switch", RT5659_OUT_R_MIXER,
1964 RT5659_M_IN_R_OM_R_SFT, 1, 1),
1965 SOC_DAPM_SINGLE("BST2 Switch", RT5659_OUT_R_MIXER,
1966 RT5659_M_BST2_OM_R_SFT, 1, 1),
1967 SOC_DAPM_SINGLE("BST3 Switch", RT5659_OUT_R_MIXER,
1968 RT5659_M_BST3_OM_R_SFT, 1, 1),
1969 SOC_DAPM_SINGLE("BST4 Switch", RT5659_OUT_R_MIXER,
1970 RT5659_M_BST4_OM_R_SFT, 1, 1),
1973 static const struct snd_kcontrol_new rt5659_spo_l_mix[] = {
1974 SOC_DAPM_SINGLE("DAC L2 Switch", RT5659_SPO_AMP_GAIN,
1975 RT5659_M_DAC_L2_SPKOMIX_SFT, 1, 0),
1976 SOC_DAPM_SINGLE("SPKVOL L Switch", RT5659_SPO_AMP_GAIN,
1977 RT5659_M_SPKVOLL_SPKOMIX_SFT, 1, 0),
1980 static const struct snd_kcontrol_new rt5659_spo_r_mix[] = {
1981 SOC_DAPM_SINGLE("DAC R2 Switch", RT5659_SPO_AMP_GAIN,
1982 RT5659_M_DAC_R2_SPKOMIX_SFT, 1, 0),
1983 SOC_DAPM_SINGLE("SPKVOL R Switch", RT5659_SPO_AMP_GAIN,
1984 RT5659_M_SPKVOLR_SPKOMIX_SFT, 1, 0),
1987 static const struct snd_kcontrol_new rt5659_mono_mix[] = {
1988 SOC_DAPM_SINGLE("DAC L2 Switch", RT5659_MONOMIX_IN_GAIN,
1989 RT5659_M_DAC_L2_MA_SFT, 1, 1),
1990 SOC_DAPM_SINGLE("MONOVOL Switch", RT5659_MONOMIX_IN_GAIN,
1991 RT5659_M_MONOVOL_MA_SFT, 1, 1),
1994 static const struct snd_kcontrol_new rt5659_lout_l_mix[] = {
1995 SOC_DAPM_SINGLE("DAC L2 Switch", RT5659_LOUT_MIXER,
1996 RT5659_M_DAC_L2_LM_SFT, 1, 1),
1997 SOC_DAPM_SINGLE("OUTVOL L Switch", RT5659_LOUT_MIXER,
1998 RT5659_M_OV_L_LM_SFT, 1, 1),
2001 static const struct snd_kcontrol_new rt5659_lout_r_mix[] = {
2002 SOC_DAPM_SINGLE("DAC R2 Switch", RT5659_LOUT_MIXER,
2003 RT5659_M_DAC_R2_LM_SFT, 1, 1),
2004 SOC_DAPM_SINGLE("OUTVOL R Switch", RT5659_LOUT_MIXER,
2005 RT5659_M_OV_R_LM_SFT, 1, 1),
2009 /*MX-1B [6:4], MX-1B [2:0]*/
2010 static const char * const rt5659_dac2_src[] = {
2011 "IF1 DAC2", "IF2 DAC", "IF3 DAC", "Mono ADC MIX"
2014 static SOC_ENUM_SINGLE_DECL(
2015 rt5659_dac_l2_enum, RT5659_DAC_CTRL,
2016 RT5659_DAC_L2_SEL_SFT, rt5659_dac2_src);
2018 static const struct snd_kcontrol_new rt5659_dac_l2_mux =
2019 SOC_DAPM_ENUM("DAC L2 Source", rt5659_dac_l2_enum);
2021 static SOC_ENUM_SINGLE_DECL(
2022 rt5659_dac_r2_enum, RT5659_DAC_CTRL,
2023 RT5659_DAC_R2_SEL_SFT, rt5659_dac2_src);
2025 static const struct snd_kcontrol_new rt5659_dac_r2_mux =
2026 SOC_DAPM_ENUM("DAC R2 Source", rt5659_dac_r2_enum);
2029 /* STO1 ADC1 Source */
2031 static const char * const rt5659_sto1_adc1_src[] = {
2035 static SOC_ENUM_SINGLE_DECL(
2036 rt5659_sto1_adc1_enum, RT5659_STO1_ADC_MIXER,
2037 RT5659_STO1_ADC1_SRC_SFT, rt5659_sto1_adc1_src);
2039 static const struct snd_kcontrol_new rt5659_sto1_adc1_mux =
2040 SOC_DAPM_ENUM("Stereo1 ADC1 Source", rt5659_sto1_adc1_enum);
2042 /* STO1 ADC Source */
2044 static const char * const rt5659_sto1_adc_src[] = {
2048 static SOC_ENUM_SINGLE_DECL(
2049 rt5659_sto1_adc_enum, RT5659_STO1_ADC_MIXER,
2050 RT5659_STO1_ADC_SRC_SFT, rt5659_sto1_adc_src);
2052 static const struct snd_kcontrol_new rt5659_sto1_adc_mux =
2053 SOC_DAPM_ENUM("Stereo1 ADC Source", rt5659_sto1_adc_enum);
2055 /* STO1 ADC2 Source */
2057 static const char * const rt5659_sto1_adc2_src[] = {
2061 static SOC_ENUM_SINGLE_DECL(
2062 rt5659_sto1_adc2_enum, RT5659_STO1_ADC_MIXER,
2063 RT5659_STO1_ADC2_SRC_SFT, rt5659_sto1_adc2_src);
2065 static const struct snd_kcontrol_new rt5659_sto1_adc2_mux =
2066 SOC_DAPM_ENUM("Stereo1 ADC2 Source", rt5659_sto1_adc2_enum);
2068 /* STO1 DMIC Source */
2070 static const char * const rt5659_sto1_dmic_src[] = {
2074 static SOC_ENUM_SINGLE_DECL(
2075 rt5659_sto1_dmic_enum, RT5659_STO1_ADC_MIXER,
2076 RT5659_STO1_DMIC_SRC_SFT, rt5659_sto1_dmic_src);
2078 static const struct snd_kcontrol_new rt5659_sto1_dmic_mux =
2079 SOC_DAPM_ENUM("Stereo1 DMIC Source", rt5659_sto1_dmic_enum);
2082 /* MONO ADC L2 Source */
2084 static const char * const rt5659_mono_adc_l2_src[] = {
2085 "Mono DAC MIXL", "DMIC"
2088 static SOC_ENUM_SINGLE_DECL(
2089 rt5659_mono_adc_l2_enum, RT5659_MONO_ADC_MIXER,
2090 RT5659_MONO_ADC_L2_SRC_SFT, rt5659_mono_adc_l2_src);
2092 static const struct snd_kcontrol_new rt5659_mono_adc_l2_mux =
2093 SOC_DAPM_ENUM("Mono ADC L2 Source", rt5659_mono_adc_l2_enum);
2096 /* MONO ADC L1 Source */
2098 static const char * const rt5659_mono_adc_l1_src[] = {
2099 "Mono DAC MIXL", "ADC"
2102 static SOC_ENUM_SINGLE_DECL(
2103 rt5659_mono_adc_l1_enum, RT5659_MONO_ADC_MIXER,
2104 RT5659_MONO_ADC_L1_SRC_SFT, rt5659_mono_adc_l1_src);
2106 static const struct snd_kcontrol_new rt5659_mono_adc_l1_mux =
2107 SOC_DAPM_ENUM("Mono ADC L1 Source", rt5659_mono_adc_l1_enum);
2109 /* MONO ADC L Source, MONO ADC R Source*/
2110 /* MX-27 [10:9], MX-27 [2:1] */
2111 static const char * const rt5659_mono_adc_src[] = {
2112 "ADC1 L", "ADC1 R", "ADC2 L", "ADC2 R"
2115 static SOC_ENUM_SINGLE_DECL(
2116 rt5659_mono_adc_l_enum, RT5659_MONO_ADC_MIXER,
2117 RT5659_MONO_ADC_L_SRC_SFT, rt5659_mono_adc_src);
2119 static const struct snd_kcontrol_new rt5659_mono_adc_l_mux =
2120 SOC_DAPM_ENUM("Mono ADC L Source", rt5659_mono_adc_l_enum);
2122 static SOC_ENUM_SINGLE_DECL(
2123 rt5659_mono_adcr_enum, RT5659_MONO_ADC_MIXER,
2124 RT5659_MONO_ADC_R_SRC_SFT, rt5659_mono_adc_src);
2126 static const struct snd_kcontrol_new rt5659_mono_adc_r_mux =
2127 SOC_DAPM_ENUM("Mono ADC R Source", rt5659_mono_adcr_enum);
2129 /* MONO DMIC L Source */
2131 static const char * const rt5659_mono_dmic_l_src[] = {
2132 "DMIC1 L", "DMIC2 L"
2135 static SOC_ENUM_SINGLE_DECL(
2136 rt5659_mono_dmic_l_enum, RT5659_MONO_ADC_MIXER,
2137 RT5659_MONO_DMIC_L_SRC_SFT, rt5659_mono_dmic_l_src);
2139 static const struct snd_kcontrol_new rt5659_mono_dmic_l_mux =
2140 SOC_DAPM_ENUM("Mono DMIC L Source", rt5659_mono_dmic_l_enum);
2142 /* MONO ADC R2 Source */
2144 static const char * const rt5659_mono_adc_r2_src[] = {
2145 "Mono DAC MIXR", "DMIC"
2148 static SOC_ENUM_SINGLE_DECL(
2149 rt5659_mono_adc_r2_enum, RT5659_MONO_ADC_MIXER,
2150 RT5659_MONO_ADC_R2_SRC_SFT, rt5659_mono_adc_r2_src);
2152 static const struct snd_kcontrol_new rt5659_mono_adc_r2_mux =
2153 SOC_DAPM_ENUM("Mono ADC R2 Source", rt5659_mono_adc_r2_enum);
2155 /* MONO ADC R1 Source */
2157 static const char * const rt5659_mono_adc_r1_src[] = {
2158 "Mono DAC MIXR", "ADC"
2161 static SOC_ENUM_SINGLE_DECL(
2162 rt5659_mono_adc_r1_enum, RT5659_MONO_ADC_MIXER,
2163 RT5659_MONO_ADC_R1_SRC_SFT, rt5659_mono_adc_r1_src);
2165 static const struct snd_kcontrol_new rt5659_mono_adc_r1_mux =
2166 SOC_DAPM_ENUM("Mono ADC R1 Source", rt5659_mono_adc_r1_enum);
2168 /* MONO DMIC R Source */
2170 static const char * const rt5659_mono_dmic_r_src[] = {
2171 "DMIC1 R", "DMIC2 R"
2174 static SOC_ENUM_SINGLE_DECL(
2175 rt5659_mono_dmic_r_enum, RT5659_MONO_ADC_MIXER,
2176 RT5659_MONO_DMIC_R_SRC_SFT, rt5659_mono_dmic_r_src);
2178 static const struct snd_kcontrol_new rt5659_mono_dmic_r_mux =
2179 SOC_DAPM_ENUM("Mono DMIC R Source", rt5659_mono_dmic_r_enum);
2182 /* DAC R1 Source, DAC L1 Source*/
2183 /* MX-29 [11:10], MX-29 [9:8]*/
2184 static const char * const rt5659_dac1_src[] = {
2185 "IF1 DAC1", "IF2 DAC", "IF3 DAC"
2188 static SOC_ENUM_SINGLE_DECL(
2189 rt5659_dac_r1_enum, RT5659_AD_DA_MIXER,
2190 RT5659_DAC1_R_SEL_SFT, rt5659_dac1_src);
2192 static const struct snd_kcontrol_new rt5659_dac_r1_mux =
2193 SOC_DAPM_ENUM("DAC R1 Source", rt5659_dac_r1_enum);
2195 static SOC_ENUM_SINGLE_DECL(
2196 rt5659_dac_l1_enum, RT5659_AD_DA_MIXER,
2197 RT5659_DAC1_L_SEL_SFT, rt5659_dac1_src);
2199 static const struct snd_kcontrol_new rt5659_dac_l1_mux =
2200 SOC_DAPM_ENUM("DAC L1 Source", rt5659_dac_l1_enum);
2202 /* DAC Digital Mixer L Source, DAC Digital Mixer R Source*/
2203 /* MX-2C [6], MX-2C [4]*/
2204 static const char * const rt5659_dig_dac_mix_src[] = {
2205 "Stereo DAC Mixer", "Mono DAC Mixer"
2208 static SOC_ENUM_SINGLE_DECL(
2209 rt5659_dig_dac_mixl_enum, RT5659_DIG_MIXER,
2210 RT5659_DAC_MIX_L_SFT, rt5659_dig_dac_mix_src);
2212 static const struct snd_kcontrol_new rt5659_dig_dac_mixl_mux =
2213 SOC_DAPM_ENUM("DAC Digital Mixer L Source", rt5659_dig_dac_mixl_enum);
2215 static SOC_ENUM_SINGLE_DECL(
2216 rt5659_dig_dac_mixr_enum, RT5659_DIG_MIXER,
2217 RT5659_DAC_MIX_R_SFT, rt5659_dig_dac_mix_src);
2219 static const struct snd_kcontrol_new rt5659_dig_dac_mixr_mux =
2220 SOC_DAPM_ENUM("DAC Digital Mixer R Source", rt5659_dig_dac_mixr_enum);
2222 /* Analog DAC L1 Source, Analog DAC R1 Source*/
2223 /* MX-2D [3], MX-2D [2]*/
2224 static const char * const rt5659_alg_dac1_src[] = {
2225 "DAC", "Stereo DAC Mixer"
2228 static SOC_ENUM_SINGLE_DECL(
2229 rt5659_alg_dac_l1_enum, RT5659_A_DAC_MUX,
2230 RT5659_A_DACL1_SFT, rt5659_alg_dac1_src);
2232 static const struct snd_kcontrol_new rt5659_alg_dac_l1_mux =
2233 SOC_DAPM_ENUM("Analog DACL1 Source", rt5659_alg_dac_l1_enum);
2235 static SOC_ENUM_SINGLE_DECL(
2236 rt5659_alg_dac_r1_enum, RT5659_A_DAC_MUX,
2237 RT5659_A_DACR1_SFT, rt5659_alg_dac1_src);
2239 static const struct snd_kcontrol_new rt5659_alg_dac_r1_mux =
2240 SOC_DAPM_ENUM("Analog DACR1 Source", rt5659_alg_dac_r1_enum);
2242 /* Analog DAC LR Source, Analog DAC R2 Source*/
2243 /* MX-2D [1], MX-2D [0]*/
2244 static const char * const rt5659_alg_dac2_src[] = {
2245 "Stereo DAC Mixer", "Mono DAC Mixer"
2248 static SOC_ENUM_SINGLE_DECL(
2249 rt5659_alg_dac_l2_enum, RT5659_A_DAC_MUX,
2250 RT5659_A_DACL2_SFT, rt5659_alg_dac2_src);
2252 static const struct snd_kcontrol_new rt5659_alg_dac_l2_mux =
2253 SOC_DAPM_ENUM("Analog DAC L2 Source", rt5659_alg_dac_l2_enum);
2255 static SOC_ENUM_SINGLE_DECL(
2256 rt5659_alg_dac_r2_enum, RT5659_A_DAC_MUX,
2257 RT5659_A_DACR2_SFT, rt5659_alg_dac2_src);
2259 static const struct snd_kcontrol_new rt5659_alg_dac_r2_mux =
2260 SOC_DAPM_ENUM("Analog DAC R2 Source", rt5659_alg_dac_r2_enum);
2262 /* Interface2 ADC Data Input*/
2264 static const char * const rt5659_if2_adc_in_src[] = {
2265 "IF_ADC1", "IF_ADC2", "DAC_REF", "IF_ADC3"
2268 static SOC_ENUM_SINGLE_DECL(
2269 rt5659_if2_adc_in_enum, RT5659_DIG_INF23_DATA,
2270 RT5659_IF2_ADC_IN_SFT, rt5659_if2_adc_in_src);
2272 static const struct snd_kcontrol_new rt5659_if2_adc_in_mux =
2273 SOC_DAPM_ENUM("IF2 ADC IN Source", rt5659_if2_adc_in_enum);
2275 /* Interface3 ADC Data Input*/
2277 static const char * const rt5659_if3_adc_in_src[] = {
2278 "IF_ADC1", "IF_ADC2", "DAC_REF", "Stereo2_ADC_L/R"
2281 static SOC_ENUM_SINGLE_DECL(
2282 rt5659_if3_adc_in_enum, RT5659_DIG_INF23_DATA,
2283 RT5659_IF3_ADC_IN_SFT, rt5659_if3_adc_in_src);
2285 static const struct snd_kcontrol_new rt5659_if3_adc_in_mux =
2286 SOC_DAPM_ENUM("IF3 ADC IN Source", rt5659_if3_adc_in_enum);
2289 /* MX-31 [15] [13] */
2290 static const char * const rt5659_pdm_src[] = {
2291 "Mono DAC", "Stereo DAC"
2294 static SOC_ENUM_SINGLE_DECL(
2295 rt5659_pdm_l_enum, RT5659_PDM_OUT_CTRL,
2296 RT5659_PDM1_L_SFT, rt5659_pdm_src);
2298 static const struct snd_kcontrol_new rt5659_pdm_l_mux =
2299 SOC_DAPM_ENUM("PDM L Source", rt5659_pdm_l_enum);
2301 static SOC_ENUM_SINGLE_DECL(
2302 rt5659_pdm_r_enum, RT5659_PDM_OUT_CTRL,
2303 RT5659_PDM1_R_SFT, rt5659_pdm_src);
2305 static const struct snd_kcontrol_new rt5659_pdm_r_mux =
2306 SOC_DAPM_ENUM("PDM R Source", rt5659_pdm_r_enum);
2308 /* SPDIF Output source*/
2310 static const char * const rt5659_spdif_src[] = {
2311 "IF1_DAC1", "IF1_DAC2", "IF2_DAC", "IF3_DAC"
2314 static SOC_ENUM_SINGLE_DECL(
2315 rt5659_spdif_enum, RT5659_SPDIF_CTRL,
2316 RT5659_SPDIF_SEL_SFT, rt5659_spdif_src);
2318 static const struct snd_kcontrol_new rt5659_spdif_mux =
2319 SOC_DAPM_ENUM("SPDIF Source", rt5659_spdif_enum);
2321 /* I2S1 TDM ADCDAT Source */
2323 static const char * const rt5659_rx_adc_data_src[] = {
2324 "AD1:AD2:DAC:NUL", "AD1:AD2:NUL:DAC", "AD1:DAC:AD2:NUL",
2325 "AD1:DAC:NUL:AD2", "AD1:NUL:DAC:AD2", "AD1:NUL:AD2:DAC",
2326 "AD2:AD1:DAC:NUL", "AD2:AD1:NUL:DAC", "AD2:DAC:AD1:NUL",
2327 "AD2:DAC:NUL:AD1", "AD2:NUL:DAC:AD1", "AD1:NUL:AD1:DAC",
2328 "DAC:AD1:AD2:NUL", "DAC:AD1:NUL:AD2", "DAC:AD2:AD1:NUL",
2329 "DAC:AD2:NUL:AD1", "DAC:NUL:DAC:AD2", "DAC:NUL:AD2:DAC",
2330 "NUL:AD1:AD2:DAC", "NUL:AD1:DAC:AD2", "NUL:AD2:AD1:DAC",
2331 "NUL:AD2:DAC:AD1", "NUL:DAC:DAC:AD2", "NUL:DAC:AD2:DAC"
2334 static SOC_ENUM_SINGLE_DECL(
2335 rt5659_rx_adc_data_enum, RT5659_TDM_CTRL_2,
2336 RT5659_ADCDAT_SRC_SFT, rt5659_rx_adc_data_src);
2338 static const struct snd_kcontrol_new rt5659_rx_adc_dac_mux =
2339 SOC_DAPM_ENUM("TDM ADCDAT Source", rt5659_rx_adc_data_enum);
2341 /* Out Volume Switch */
2342 static const struct snd_kcontrol_new spkvol_l_switch =
2343 SOC_DAPM_SINGLE("Switch", RT5659_SPO_VOL, RT5659_VOL_L_SFT, 1, 1);
2345 static const struct snd_kcontrol_new spkvol_r_switch =
2346 SOC_DAPM_SINGLE("Switch", RT5659_SPO_VOL, RT5659_VOL_R_SFT, 1, 1);
2348 static const struct snd_kcontrol_new monovol_switch =
2349 SOC_DAPM_SINGLE("Switch", RT5659_MONO_OUT, RT5659_VOL_L_SFT, 1, 1);
2351 static const struct snd_kcontrol_new outvol_l_switch =
2352 SOC_DAPM_SINGLE("Switch", RT5659_LOUT, RT5659_VOL_L_SFT, 1, 1);
2354 static const struct snd_kcontrol_new outvol_r_switch =
2355 SOC_DAPM_SINGLE("Switch", RT5659_LOUT, RT5659_VOL_R_SFT, 1, 1);
2358 static const struct snd_kcontrol_new spo_switch =
2359 SOC_DAPM_SINGLE("Switch", RT5659_CLASSD_2, RT5659_M_RF_DIG_SFT, 1, 1);
2361 static const struct snd_kcontrol_new mono_switch =
2362 SOC_DAPM_SINGLE("Switch", RT5659_MONO_OUT, RT5659_L_MUTE_SFT, 1, 1);
2364 static const struct snd_kcontrol_new hpo_l_switch =
2365 SOC_DAPM_SINGLE("Switch", RT5659_HP_VOL, RT5659_L_MUTE_SFT, 1, 1);
2367 static const struct snd_kcontrol_new hpo_r_switch =
2368 SOC_DAPM_SINGLE("Switch", RT5659_HP_VOL, RT5659_R_MUTE_SFT, 1, 1);
2370 static const struct snd_kcontrol_new lout_l_switch =
2371 SOC_DAPM_SINGLE("Switch", RT5659_LOUT, RT5659_L_MUTE_SFT, 1, 1);
2373 static const struct snd_kcontrol_new lout_r_switch =
2374 SOC_DAPM_SINGLE("Switch", RT5659_LOUT, RT5659_R_MUTE_SFT, 1, 1);
2376 static const struct snd_kcontrol_new pdm_l_switch =
2377 SOC_DAPM_SINGLE("Switch", RT5659_PDM_OUT_CTRL, RT5659_M_PDM1_L_SFT, 1,
2380 static const struct snd_kcontrol_new pdm_r_switch =
2381 SOC_DAPM_SINGLE("Switch", RT5659_PDM_OUT_CTRL, RT5659_M_PDM1_R_SFT, 1,
2384 static int rt5659_spk_event(struct snd_soc_dapm_widget *w,
2385 struct snd_kcontrol *kcontrol, int event)
2387 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
2390 case SND_SOC_DAPM_PRE_PMU:
2391 snd_soc_component_update_bits(component, RT5659_CLASSD_CTRL_1,
2392 RT5659_POW_CLSD_DB_MASK, RT5659_POW_CLSD_DB_EN);
2393 snd_soc_component_update_bits(component, RT5659_CLASSD_2,
2394 RT5659_M_RI_DIG, RT5659_M_RI_DIG);
2395 snd_soc_component_write(component, RT5659_CLASSD_1, 0x0803);
2396 snd_soc_component_write(component, RT5659_SPK_DC_CAILB_CTRL_3, 0x0000);
2399 case SND_SOC_DAPM_POST_PMD:
2400 snd_soc_component_write(component, RT5659_CLASSD_1, 0x0011);
2401 snd_soc_component_update_bits(component, RT5659_CLASSD_2,
2402 RT5659_M_RI_DIG, 0x0);
2403 snd_soc_component_write(component, RT5659_SPK_DC_CAILB_CTRL_3, 0x0003);
2404 snd_soc_component_update_bits(component, RT5659_CLASSD_CTRL_1,
2405 RT5659_POW_CLSD_DB_MASK, RT5659_POW_CLSD_DB_DIS);
2416 static int rt5659_mono_event(struct snd_soc_dapm_widget *w,
2417 struct snd_kcontrol *kcontrol, int event)
2419 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
2422 case SND_SOC_DAPM_PRE_PMU:
2423 snd_soc_component_write(component, RT5659_MONO_AMP_CALIB_CTRL_1, 0x1e00);
2426 case SND_SOC_DAPM_POST_PMD:
2427 snd_soc_component_write(component, RT5659_MONO_AMP_CALIB_CTRL_1, 0x1e04);
2438 static int rt5659_hp_event(struct snd_soc_dapm_widget *w,
2439 struct snd_kcontrol *kcontrol, int event)
2441 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
2444 case SND_SOC_DAPM_POST_PMU:
2445 snd_soc_component_write(component, RT5659_HP_CHARGE_PUMP_1, 0x0e1e);
2446 snd_soc_component_update_bits(component, RT5659_DEPOP_1, 0x0010, 0x0010);
2449 case SND_SOC_DAPM_PRE_PMD:
2450 snd_soc_component_write(component, RT5659_DEPOP_1, 0x0000);
2460 static int set_dmic_power(struct snd_soc_dapm_widget *w,
2461 struct snd_kcontrol *kcontrol, int event)
2464 case SND_SOC_DAPM_POST_PMU:
2465 /*Add delay to avoid pop noise*/
2476 static const struct snd_soc_dapm_widget rt5659_particular_dapm_widgets[] = {
2477 SND_SOC_DAPM_SUPPLY("LDO2", RT5659_PWR_ANLG_3, RT5659_PWR_LDO2_BIT, 0,
2479 SND_SOC_DAPM_SUPPLY("MICBIAS1", RT5659_PWR_ANLG_2, RT5659_PWR_MB1_BIT,
2481 SND_SOC_DAPM_SUPPLY("Mic Det Power", RT5659_PWR_VOL,
2482 RT5659_PWR_MIC_DET_BIT, 0, NULL, 0),
2485 static const struct snd_soc_dapm_widget rt5659_dapm_widgets[] = {
2486 SND_SOC_DAPM_SUPPLY("PLL", RT5659_PWR_ANLG_3, RT5659_PWR_PLL_BIT, 0,
2488 SND_SOC_DAPM_SUPPLY("Mono Vref", RT5659_PWR_ANLG_1,
2489 RT5659_PWR_VREF3_BIT, 0, NULL, 0),
2492 SND_SOC_DAPM_SUPPLY_S("I2S1 ASRC", 1, RT5659_ASRC_1,
2493 RT5659_I2S1_ASRC_SFT, 0, NULL, 0),
2494 SND_SOC_DAPM_SUPPLY_S("I2S2 ASRC", 1, RT5659_ASRC_1,
2495 RT5659_I2S2_ASRC_SFT, 0, NULL, 0),
2496 SND_SOC_DAPM_SUPPLY_S("I2S3 ASRC", 1, RT5659_ASRC_1,
2497 RT5659_I2S3_ASRC_SFT, 0, NULL, 0),
2498 SND_SOC_DAPM_SUPPLY_S("DAC STO ASRC", 1, RT5659_ASRC_1,
2499 RT5659_DAC_STO_ASRC_SFT, 0, NULL, 0),
2500 SND_SOC_DAPM_SUPPLY_S("DAC Mono L ASRC", 1, RT5659_ASRC_1,
2501 RT5659_DAC_MONO_L_ASRC_SFT, 0, NULL, 0),
2502 SND_SOC_DAPM_SUPPLY_S("DAC Mono R ASRC", 1, RT5659_ASRC_1,
2503 RT5659_DAC_MONO_R_ASRC_SFT, 0, NULL, 0),
2504 SND_SOC_DAPM_SUPPLY_S("ADC STO1 ASRC", 1, RT5659_ASRC_1,
2505 RT5659_ADC_STO1_ASRC_SFT, 0, NULL, 0),
2506 SND_SOC_DAPM_SUPPLY_S("ADC Mono L ASRC", 1, RT5659_ASRC_1,
2507 RT5659_ADC_MONO_L_ASRC_SFT, 0, NULL, 0),
2508 SND_SOC_DAPM_SUPPLY_S("ADC Mono R ASRC", 1, RT5659_ASRC_1,
2509 RT5659_ADC_MONO_R_ASRC_SFT, 0, NULL, 0),
2512 SND_SOC_DAPM_SUPPLY("MICBIAS2", RT5659_PWR_ANLG_2, RT5659_PWR_MB2_BIT,
2514 SND_SOC_DAPM_SUPPLY("MICBIAS3", RT5659_PWR_ANLG_2, RT5659_PWR_MB3_BIT,
2518 SND_SOC_DAPM_INPUT("DMIC L1"),
2519 SND_SOC_DAPM_INPUT("DMIC R1"),
2520 SND_SOC_DAPM_INPUT("DMIC L2"),
2521 SND_SOC_DAPM_INPUT("DMIC R2"),
2523 SND_SOC_DAPM_INPUT("IN1P"),
2524 SND_SOC_DAPM_INPUT("IN1N"),
2525 SND_SOC_DAPM_INPUT("IN2P"),
2526 SND_SOC_DAPM_INPUT("IN2N"),
2527 SND_SOC_DAPM_INPUT("IN3P"),
2528 SND_SOC_DAPM_INPUT("IN3N"),
2529 SND_SOC_DAPM_INPUT("IN4P"),
2530 SND_SOC_DAPM_INPUT("IN4N"),
2532 SND_SOC_DAPM_PGA("DMIC1", SND_SOC_NOPM, 0, 0, NULL, 0),
2533 SND_SOC_DAPM_PGA("DMIC2", SND_SOC_NOPM, 0, 0, NULL, 0),
2535 SND_SOC_DAPM_SUPPLY("DMIC CLK", SND_SOC_NOPM, 0, 0,
2536 set_dmic_clk, SND_SOC_DAPM_PRE_PMU),
2537 SND_SOC_DAPM_SUPPLY("DMIC1 Power", RT5659_DMIC_CTRL_1,
2538 RT5659_DMIC_1_EN_SFT, 0, set_dmic_power, SND_SOC_DAPM_POST_PMU),
2539 SND_SOC_DAPM_SUPPLY("DMIC2 Power", RT5659_DMIC_CTRL_1,
2540 RT5659_DMIC_2_EN_SFT, 0, set_dmic_power, SND_SOC_DAPM_POST_PMU),
2543 SND_SOC_DAPM_PGA("BST1", RT5659_PWR_ANLG_2,
2544 RT5659_PWR_BST1_P_BIT, 0, NULL, 0),
2545 SND_SOC_DAPM_PGA("BST2", RT5659_PWR_ANLG_2,
2546 RT5659_PWR_BST2_P_BIT, 0, NULL, 0),
2547 SND_SOC_DAPM_PGA("BST3", RT5659_PWR_ANLG_2,
2548 RT5659_PWR_BST3_P_BIT, 0, NULL, 0),
2549 SND_SOC_DAPM_PGA("BST4", RT5659_PWR_ANLG_2,
2550 RT5659_PWR_BST4_P_BIT, 0, NULL, 0),
2551 SND_SOC_DAPM_SUPPLY("BST1 Power", RT5659_PWR_ANLG_2,
2552 RT5659_PWR_BST1_BIT, 0, NULL, 0),
2553 SND_SOC_DAPM_SUPPLY("BST2 Power", RT5659_PWR_ANLG_2,
2554 RT5659_PWR_BST2_BIT, 0, NULL, 0),
2555 SND_SOC_DAPM_SUPPLY("BST3 Power", RT5659_PWR_ANLG_2,
2556 RT5659_PWR_BST3_BIT, 0, NULL, 0),
2557 SND_SOC_DAPM_SUPPLY("BST4 Power", RT5659_PWR_ANLG_2,
2558 RT5659_PWR_BST4_BIT, 0, NULL, 0),
2562 SND_SOC_DAPM_PGA("INL VOL", RT5659_PWR_VOL, RT5659_PWR_IN_L_BIT,
2564 SND_SOC_DAPM_PGA("INR VOL", RT5659_PWR_VOL, RT5659_PWR_IN_R_BIT,
2568 SND_SOC_DAPM_MIXER("RECMIX1L", RT5659_PWR_MIXER, RT5659_PWR_RM1_L_BIT,
2569 0, rt5659_rec1_l_mix, ARRAY_SIZE(rt5659_rec1_l_mix)),
2570 SND_SOC_DAPM_MIXER("RECMIX1R", RT5659_PWR_MIXER, RT5659_PWR_RM1_R_BIT,
2571 0, rt5659_rec1_r_mix, ARRAY_SIZE(rt5659_rec1_r_mix)),
2572 SND_SOC_DAPM_MIXER("RECMIX2L", RT5659_PWR_MIXER, RT5659_PWR_RM2_L_BIT,
2573 0, rt5659_rec2_l_mix, ARRAY_SIZE(rt5659_rec2_l_mix)),
2574 SND_SOC_DAPM_MIXER("RECMIX2R", RT5659_PWR_MIXER, RT5659_PWR_RM2_R_BIT,
2575 0, rt5659_rec2_r_mix, ARRAY_SIZE(rt5659_rec2_r_mix)),
2578 SND_SOC_DAPM_ADC("ADC1 L", NULL, SND_SOC_NOPM, 0, 0),
2579 SND_SOC_DAPM_ADC("ADC1 R", NULL, SND_SOC_NOPM, 0, 0),
2580 SND_SOC_DAPM_ADC("ADC2 L", NULL, SND_SOC_NOPM, 0, 0),
2581 SND_SOC_DAPM_ADC("ADC2 R", NULL, SND_SOC_NOPM, 0, 0),
2583 SND_SOC_DAPM_SUPPLY("ADC1 L Power", RT5659_PWR_DIG_1,
2584 RT5659_PWR_ADC_L1_BIT, 0, NULL, 0),
2585 SND_SOC_DAPM_SUPPLY("ADC1 R Power", RT5659_PWR_DIG_1,
2586 RT5659_PWR_ADC_R1_BIT, 0, NULL, 0),
2587 SND_SOC_DAPM_SUPPLY("ADC2 L Power", RT5659_PWR_DIG_1,
2588 RT5659_PWR_ADC_L2_BIT, 0, NULL, 0),
2589 SND_SOC_DAPM_SUPPLY("ADC2 R Power", RT5659_PWR_DIG_1,
2590 RT5659_PWR_ADC_R2_BIT, 0, NULL, 0),
2591 SND_SOC_DAPM_SUPPLY("ADC1 clock", SND_SOC_NOPM, 0, 0, set_adc1_clk,
2592 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
2593 SND_SOC_DAPM_SUPPLY("ADC2 clock", SND_SOC_NOPM, 0, 0, set_adc2_clk,
2594 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
2597 SND_SOC_DAPM_MUX("Stereo1 DMIC L Mux", SND_SOC_NOPM, 0, 0,
2598 &rt5659_sto1_dmic_mux),
2599 SND_SOC_DAPM_MUX("Stereo1 DMIC R Mux", SND_SOC_NOPM, 0, 0,
2600 &rt5659_sto1_dmic_mux),
2601 SND_SOC_DAPM_MUX("Stereo1 ADC L1 Mux", SND_SOC_NOPM, 0, 0,
2602 &rt5659_sto1_adc1_mux),
2603 SND_SOC_DAPM_MUX("Stereo1 ADC R1 Mux", SND_SOC_NOPM, 0, 0,
2604 &rt5659_sto1_adc1_mux),
2605 SND_SOC_DAPM_MUX("Stereo1 ADC L2 Mux", SND_SOC_NOPM, 0, 0,
2606 &rt5659_sto1_adc2_mux),
2607 SND_SOC_DAPM_MUX("Stereo1 ADC R2 Mux", SND_SOC_NOPM, 0, 0,
2608 &rt5659_sto1_adc2_mux),
2609 SND_SOC_DAPM_MUX("Stereo1 ADC L Mux", SND_SOC_NOPM, 0, 0,
2610 &rt5659_sto1_adc_mux),
2611 SND_SOC_DAPM_MUX("Stereo1 ADC R Mux", SND_SOC_NOPM, 0, 0,
2612 &rt5659_sto1_adc_mux),
2613 SND_SOC_DAPM_MUX("Mono ADC L2 Mux", SND_SOC_NOPM, 0, 0,
2614 &rt5659_mono_adc_l2_mux),
2615 SND_SOC_DAPM_MUX("Mono ADC R2 Mux", SND_SOC_NOPM, 0, 0,
2616 &rt5659_mono_adc_r2_mux),
2617 SND_SOC_DAPM_MUX("Mono ADC L1 Mux", SND_SOC_NOPM, 0, 0,
2618 &rt5659_mono_adc_l1_mux),
2619 SND_SOC_DAPM_MUX("Mono ADC R1 Mux", SND_SOC_NOPM, 0, 0,
2620 &rt5659_mono_adc_r1_mux),
2621 SND_SOC_DAPM_MUX("Mono DMIC L Mux", SND_SOC_NOPM, 0, 0,
2622 &rt5659_mono_dmic_l_mux),
2623 SND_SOC_DAPM_MUX("Mono DMIC R Mux", SND_SOC_NOPM, 0, 0,
2624 &rt5659_mono_dmic_r_mux),
2625 SND_SOC_DAPM_MUX("Mono ADC L Mux", SND_SOC_NOPM, 0, 0,
2626 &rt5659_mono_adc_l_mux),
2627 SND_SOC_DAPM_MUX("Mono ADC R Mux", SND_SOC_NOPM, 0, 0,
2628 &rt5659_mono_adc_r_mux),
2630 SND_SOC_DAPM_SUPPLY("ADC Stereo1 Filter", RT5659_PWR_DIG_2,
2631 RT5659_PWR_ADC_S1F_BIT, 0, NULL, 0),
2632 SND_SOC_DAPM_SUPPLY("ADC Stereo2 Filter", RT5659_PWR_DIG_2,
2633 RT5659_PWR_ADC_S2F_BIT, 0, NULL, 0),
2634 SND_SOC_DAPM_MIXER("Stereo1 ADC MIXL", SND_SOC_NOPM,
2635 0, 0, rt5659_sto1_adc_l_mix,
2636 ARRAY_SIZE(rt5659_sto1_adc_l_mix)),
2637 SND_SOC_DAPM_MIXER("Stereo1 ADC MIXR", SND_SOC_NOPM,
2638 0, 0, rt5659_sto1_adc_r_mix,
2639 ARRAY_SIZE(rt5659_sto1_adc_r_mix)),
2640 SND_SOC_DAPM_SUPPLY("ADC Mono Left Filter", RT5659_PWR_DIG_2,
2641 RT5659_PWR_ADC_MF_L_BIT, 0, NULL, 0),
2642 SND_SOC_DAPM_MIXER("Mono ADC MIXL", RT5659_MONO_ADC_DIG_VOL,
2643 RT5659_L_MUTE_SFT, 1, rt5659_mono_adc_l_mix,
2644 ARRAY_SIZE(rt5659_mono_adc_l_mix)),
2645 SND_SOC_DAPM_SUPPLY("ADC Mono Right Filter", RT5659_PWR_DIG_2,
2646 RT5659_PWR_ADC_MF_R_BIT, 0, NULL, 0),
2647 SND_SOC_DAPM_MIXER("Mono ADC MIXR", RT5659_MONO_ADC_DIG_VOL,
2648 RT5659_R_MUTE_SFT, 1, rt5659_mono_adc_r_mix,
2649 ARRAY_SIZE(rt5659_mono_adc_r_mix)),
2652 SND_SOC_DAPM_PGA("IF_ADC1", SND_SOC_NOPM, 0, 0, NULL, 0),
2653 SND_SOC_DAPM_PGA("IF_ADC2", SND_SOC_NOPM, 0, 0, NULL, 0),
2654 SND_SOC_DAPM_PGA("IF_ADC3", SND_SOC_NOPM, 0, 0, NULL, 0),
2655 SND_SOC_DAPM_PGA("IF1_ADC1", SND_SOC_NOPM, 0, 0, NULL, 0),
2656 SND_SOC_DAPM_PGA("IF1_ADC2", SND_SOC_NOPM, 0, 0, NULL, 0),
2657 SND_SOC_DAPM_PGA("IF1_ADC3", SND_SOC_NOPM, 0, 0, NULL, 0),
2658 SND_SOC_DAPM_PGA("IF1_ADC4", SND_SOC_NOPM, 0, 0, NULL, 0),
2659 SND_SOC_DAPM_PGA("Stereo2 ADC LR", SND_SOC_NOPM, 0, 0, NULL, 0),
2661 SND_SOC_DAPM_PGA("Stereo1 ADC Volume L", RT5659_STO1_ADC_DIG_VOL,
2662 RT5659_L_MUTE_SFT, 1, NULL, 0),
2663 SND_SOC_DAPM_PGA("Stereo1 ADC Volume R", RT5659_STO1_ADC_DIG_VOL,
2664 RT5659_R_MUTE_SFT, 1, NULL, 0),
2666 /* Digital Interface */
2667 SND_SOC_DAPM_SUPPLY("I2S1", RT5659_PWR_DIG_1, RT5659_PWR_I2S1_BIT,
2669 SND_SOC_DAPM_PGA("IF1 DAC1", SND_SOC_NOPM, 0, 0, NULL, 0),
2670 SND_SOC_DAPM_PGA("IF1 DAC2", SND_SOC_NOPM, 0, 0, NULL, 0),
2671 SND_SOC_DAPM_PGA("IF1 DAC1 L", SND_SOC_NOPM, 0, 0, NULL, 0),
2672 SND_SOC_DAPM_PGA("IF1 DAC1 R", SND_SOC_NOPM, 0, 0, NULL, 0),
2673 SND_SOC_DAPM_PGA("IF1 DAC2 L", SND_SOC_NOPM, 0, 0, NULL, 0),
2674 SND_SOC_DAPM_PGA("IF1 DAC2 R", SND_SOC_NOPM, 0, 0, NULL, 0),
2675 SND_SOC_DAPM_PGA("IF1 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
2676 SND_SOC_DAPM_PGA("IF1 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
2677 SND_SOC_DAPM_PGA("IF1 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
2678 SND_SOC_DAPM_SUPPLY("I2S2", RT5659_PWR_DIG_1, RT5659_PWR_I2S2_BIT, 0,
2680 SND_SOC_DAPM_PGA("IF2 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
2681 SND_SOC_DAPM_PGA("IF2 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
2682 SND_SOC_DAPM_PGA("IF2 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
2683 SND_SOC_DAPM_PGA("IF2 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
2684 SND_SOC_DAPM_PGA("IF2 ADC1", SND_SOC_NOPM, 0, 0, NULL, 0),
2685 SND_SOC_DAPM_PGA("IF2 ADC2", SND_SOC_NOPM, 0, 0, NULL, 0),
2686 SND_SOC_DAPM_SUPPLY("I2S3", RT5659_PWR_DIG_1, RT5659_PWR_I2S3_BIT, 0,
2688 SND_SOC_DAPM_PGA("IF3 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
2689 SND_SOC_DAPM_PGA("IF3 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
2690 SND_SOC_DAPM_PGA("IF3 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
2691 SND_SOC_DAPM_PGA("IF3 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
2692 SND_SOC_DAPM_PGA("IF3 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
2693 SND_SOC_DAPM_PGA("IF3 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
2695 /* Digital Interface Select */
2696 SND_SOC_DAPM_PGA("TDM AD1:AD2:DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
2697 SND_SOC_DAPM_PGA("TDM AD2:DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
2698 SND_SOC_DAPM_MUX("TDM Data Mux", SND_SOC_NOPM, 0, 0,
2699 &rt5659_rx_adc_dac_mux),
2700 SND_SOC_DAPM_MUX("IF2 ADC Mux", SND_SOC_NOPM, 0, 0,
2701 &rt5659_if2_adc_in_mux),
2702 SND_SOC_DAPM_MUX("IF3 ADC Mux", SND_SOC_NOPM, 0, 0,
2703 &rt5659_if3_adc_in_mux),
2704 SND_SOC_DAPM_MUX("IF1 01 ADC Swap Mux", SND_SOC_NOPM, 0, 0,
2705 &rt5659_if1_01_adc_swap_mux),
2706 SND_SOC_DAPM_MUX("IF1 23 ADC Swap Mux", SND_SOC_NOPM, 0, 0,
2707 &rt5659_if1_23_adc_swap_mux),
2708 SND_SOC_DAPM_MUX("IF1 45 ADC Swap Mux", SND_SOC_NOPM, 0, 0,
2709 &rt5659_if1_45_adc_swap_mux),
2710 SND_SOC_DAPM_MUX("IF1 67 ADC Swap Mux", SND_SOC_NOPM, 0, 0,
2711 &rt5659_if1_67_adc_swap_mux),
2712 SND_SOC_DAPM_MUX("IF2 DAC Swap Mux", SND_SOC_NOPM, 0, 0,
2713 &rt5659_if2_dac_swap_mux),
2714 SND_SOC_DAPM_MUX("IF2 ADC Swap Mux", SND_SOC_NOPM, 0, 0,
2715 &rt5659_if2_adc_swap_mux),
2716 SND_SOC_DAPM_MUX("IF3 DAC Swap Mux", SND_SOC_NOPM, 0, 0,
2717 &rt5659_if3_dac_swap_mux),
2718 SND_SOC_DAPM_MUX("IF3 ADC Swap Mux", SND_SOC_NOPM, 0, 0,
2719 &rt5659_if3_adc_swap_mux),
2721 /* Audio Interface */
2722 SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
2723 SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0),
2724 SND_SOC_DAPM_AIF_IN("AIF2RX", "AIF2 Playback", 0, SND_SOC_NOPM, 0, 0),
2725 SND_SOC_DAPM_AIF_OUT("AIF2TX", "AIF2 Capture", 0, SND_SOC_NOPM, 0, 0),
2726 SND_SOC_DAPM_AIF_IN("AIF3RX", "AIF3 Playback", 0, SND_SOC_NOPM, 0, 0),
2727 SND_SOC_DAPM_AIF_OUT("AIF3TX", "AIF3 Capture", 0, SND_SOC_NOPM, 0, 0),
2730 /* DAC mixer before sound effect */
2731 SND_SOC_DAPM_MIXER("DAC1 MIXL", SND_SOC_NOPM, 0, 0,
2732 rt5659_dac_l_mix, ARRAY_SIZE(rt5659_dac_l_mix)),
2733 SND_SOC_DAPM_MIXER("DAC1 MIXR", SND_SOC_NOPM, 0, 0,
2734 rt5659_dac_r_mix, ARRAY_SIZE(rt5659_dac_r_mix)),
2736 /* DAC channel Mux */
2737 SND_SOC_DAPM_MUX("DAC L1 Mux", SND_SOC_NOPM, 0, 0, &rt5659_dac_l1_mux),
2738 SND_SOC_DAPM_MUX("DAC R1 Mux", SND_SOC_NOPM, 0, 0, &rt5659_dac_r1_mux),
2739 SND_SOC_DAPM_MUX("DAC L2 Mux", SND_SOC_NOPM, 0, 0, &rt5659_dac_l2_mux),
2740 SND_SOC_DAPM_MUX("DAC R2 Mux", SND_SOC_NOPM, 0, 0, &rt5659_dac_r2_mux),
2742 SND_SOC_DAPM_MUX("DAC L1 Source", SND_SOC_NOPM, 0, 0,
2743 &rt5659_alg_dac_l1_mux),
2744 SND_SOC_DAPM_MUX("DAC R1 Source", SND_SOC_NOPM, 0, 0,
2745 &rt5659_alg_dac_r1_mux),
2746 SND_SOC_DAPM_MUX("DAC L2 Source", SND_SOC_NOPM, 0, 0,
2747 &rt5659_alg_dac_l2_mux),
2748 SND_SOC_DAPM_MUX("DAC R2 Source", SND_SOC_NOPM, 0, 0,
2749 &rt5659_alg_dac_r2_mux),
2752 SND_SOC_DAPM_SUPPLY("DAC Stereo1 Filter", RT5659_PWR_DIG_2,
2753 RT5659_PWR_DAC_S1F_BIT, 0, NULL, 0),
2754 SND_SOC_DAPM_SUPPLY("DAC Mono Left Filter", RT5659_PWR_DIG_2,
2755 RT5659_PWR_DAC_MF_L_BIT, 0, NULL, 0),
2756 SND_SOC_DAPM_SUPPLY("DAC Mono Right Filter", RT5659_PWR_DIG_2,
2757 RT5659_PWR_DAC_MF_R_BIT, 0, NULL, 0),
2758 SND_SOC_DAPM_MIXER("Stereo DAC MIXL", SND_SOC_NOPM, 0, 0,
2759 rt5659_sto_dac_l_mix, ARRAY_SIZE(rt5659_sto_dac_l_mix)),
2760 SND_SOC_DAPM_MIXER("Stereo DAC MIXR", SND_SOC_NOPM, 0, 0,
2761 rt5659_sto_dac_r_mix, ARRAY_SIZE(rt5659_sto_dac_r_mix)),
2762 SND_SOC_DAPM_MIXER("Mono DAC MIXL", SND_SOC_NOPM, 0, 0,
2763 rt5659_mono_dac_l_mix, ARRAY_SIZE(rt5659_mono_dac_l_mix)),
2764 SND_SOC_DAPM_MIXER("Mono DAC MIXR", SND_SOC_NOPM, 0, 0,
2765 rt5659_mono_dac_r_mix, ARRAY_SIZE(rt5659_mono_dac_r_mix)),
2766 SND_SOC_DAPM_MUX("DAC MIXL", SND_SOC_NOPM, 0, 0,
2767 &rt5659_dig_dac_mixl_mux),
2768 SND_SOC_DAPM_MUX("DAC MIXR", SND_SOC_NOPM, 0, 0,
2769 &rt5659_dig_dac_mixr_mux),
2772 SND_SOC_DAPM_SUPPLY_S("DAC L1 Power", 1, RT5659_PWR_DIG_1,
2773 RT5659_PWR_DAC_L1_BIT, 0, NULL, 0),
2774 SND_SOC_DAPM_SUPPLY_S("DAC R1 Power", 1, RT5659_PWR_DIG_1,
2775 RT5659_PWR_DAC_R1_BIT, 0, NULL, 0),
2776 SND_SOC_DAPM_DAC("DAC L1", NULL, SND_SOC_NOPM, 0, 0),
2777 SND_SOC_DAPM_DAC("DAC R1", NULL, SND_SOC_NOPM, 0, 0),
2779 SND_SOC_DAPM_SUPPLY("DAC L2 Power", RT5659_PWR_DIG_1,
2780 RT5659_PWR_DAC_L2_BIT, 0, NULL, 0),
2781 SND_SOC_DAPM_SUPPLY("DAC R2 Power", RT5659_PWR_DIG_1,
2782 RT5659_PWR_DAC_R2_BIT, 0, NULL, 0),
2783 SND_SOC_DAPM_DAC("DAC L2", NULL, SND_SOC_NOPM, 0, 0),
2784 SND_SOC_DAPM_DAC("DAC R2", NULL, SND_SOC_NOPM, 0, 0),
2785 SND_SOC_DAPM_PGA("DAC_REF", SND_SOC_NOPM, 0, 0, NULL, 0),
2788 SND_SOC_DAPM_MIXER("SPK MIXL", RT5659_PWR_MIXER, RT5659_PWR_SM_L_BIT,
2789 0, rt5659_spk_l_mix, ARRAY_SIZE(rt5659_spk_l_mix)),
2790 SND_SOC_DAPM_MIXER("SPK MIXR", RT5659_PWR_MIXER, RT5659_PWR_SM_R_BIT,
2791 0, rt5659_spk_r_mix, ARRAY_SIZE(rt5659_spk_r_mix)),
2792 SND_SOC_DAPM_MIXER("MONOVOL MIX", RT5659_PWR_MIXER, RT5659_PWR_MM_BIT,
2793 0, rt5659_monovol_mix, ARRAY_SIZE(rt5659_monovol_mix)),
2794 SND_SOC_DAPM_MIXER("OUT MIXL", RT5659_PWR_MIXER, RT5659_PWR_OM_L_BIT,
2795 0, rt5659_out_l_mix, ARRAY_SIZE(rt5659_out_l_mix)),
2796 SND_SOC_DAPM_MIXER("OUT MIXR", RT5659_PWR_MIXER, RT5659_PWR_OM_R_BIT,
2797 0, rt5659_out_r_mix, ARRAY_SIZE(rt5659_out_r_mix)),
2800 SND_SOC_DAPM_SWITCH("SPKVOL L", RT5659_PWR_VOL, RT5659_PWR_SV_L_BIT, 0,
2802 SND_SOC_DAPM_SWITCH("SPKVOL R", RT5659_PWR_VOL, RT5659_PWR_SV_R_BIT, 0,
2804 SND_SOC_DAPM_SWITCH("MONOVOL", RT5659_PWR_VOL, RT5659_PWR_MV_BIT, 0,
2806 SND_SOC_DAPM_SWITCH("OUTVOL L", RT5659_PWR_VOL, RT5659_PWR_OV_L_BIT, 0,
2808 SND_SOC_DAPM_SWITCH("OUTVOL R", RT5659_PWR_VOL, RT5659_PWR_OV_R_BIT, 0,
2811 /* SPO/MONO/HPO/LOUT */
2812 SND_SOC_DAPM_MIXER("SPO L MIX", SND_SOC_NOPM, 0, 0, rt5659_spo_l_mix,
2813 ARRAY_SIZE(rt5659_spo_l_mix)),
2814 SND_SOC_DAPM_MIXER("SPO R MIX", SND_SOC_NOPM, 0, 0, rt5659_spo_r_mix,
2815 ARRAY_SIZE(rt5659_spo_r_mix)),
2816 SND_SOC_DAPM_MIXER("Mono MIX", SND_SOC_NOPM, 0, 0, rt5659_mono_mix,
2817 ARRAY_SIZE(rt5659_mono_mix)),
2818 SND_SOC_DAPM_MIXER("LOUT L MIX", SND_SOC_NOPM, 0, 0, rt5659_lout_l_mix,
2819 ARRAY_SIZE(rt5659_lout_l_mix)),
2820 SND_SOC_DAPM_MIXER("LOUT R MIX", SND_SOC_NOPM, 0, 0, rt5659_lout_r_mix,
2821 ARRAY_SIZE(rt5659_lout_r_mix)),
2823 SND_SOC_DAPM_PGA_S("SPK Amp", 1, RT5659_PWR_DIG_1, RT5659_PWR_CLS_D_BIT,
2824 0, rt5659_spk_event, SND_SOC_DAPM_POST_PMD |
2825 SND_SOC_DAPM_PRE_PMU),
2826 SND_SOC_DAPM_PGA_S("Mono Amp", 1, RT5659_PWR_ANLG_1, RT5659_PWR_MA_BIT,
2827 0, rt5659_mono_event, SND_SOC_DAPM_POST_PMD |
2828 SND_SOC_DAPM_PRE_PMU),
2829 SND_SOC_DAPM_PGA_S("HP Amp", 1, SND_SOC_NOPM, 0, 0, rt5659_hp_event,
2830 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
2831 SND_SOC_DAPM_PGA_S("LOUT Amp", 1, RT5659_PWR_ANLG_1, RT5659_PWR_LM_BIT,
2834 SND_SOC_DAPM_SUPPLY("Charge Pump", SND_SOC_NOPM, 0, 0,
2835 rt5659_charge_pump_event, SND_SOC_DAPM_PRE_PMU |
2836 SND_SOC_DAPM_POST_PMD),
2838 SND_SOC_DAPM_SWITCH("SPO Playback", SND_SOC_NOPM, 0, 0, &spo_switch),
2839 SND_SOC_DAPM_SWITCH("Mono Playback", SND_SOC_NOPM, 0, 0,
2841 SND_SOC_DAPM_SWITCH("HPO L Playback", SND_SOC_NOPM, 0, 0,
2843 SND_SOC_DAPM_SWITCH("HPO R Playback", SND_SOC_NOPM, 0, 0,
2845 SND_SOC_DAPM_SWITCH("LOUT L Playback", SND_SOC_NOPM, 0, 0,
2847 SND_SOC_DAPM_SWITCH("LOUT R Playback", SND_SOC_NOPM, 0, 0,
2849 SND_SOC_DAPM_SWITCH("PDM L Playback", SND_SOC_NOPM, 0, 0,
2851 SND_SOC_DAPM_SWITCH("PDM R Playback", SND_SOC_NOPM, 0, 0,
2855 SND_SOC_DAPM_SUPPLY("PDM Power", RT5659_PWR_DIG_2,
2856 RT5659_PWR_PDM1_BIT, 0, NULL, 0),
2857 SND_SOC_DAPM_MUX("PDM L Mux", RT5659_PDM_OUT_CTRL,
2858 RT5659_M_PDM1_L_SFT, 1, &rt5659_pdm_l_mux),
2859 SND_SOC_DAPM_MUX("PDM R Mux", RT5659_PDM_OUT_CTRL,
2860 RT5659_M_PDM1_R_SFT, 1, &rt5659_pdm_r_mux),
2863 SND_SOC_DAPM_MUX("SPDIF Mux", SND_SOC_NOPM, 0, 0, &rt5659_spdif_mux),
2865 SND_SOC_DAPM_SUPPLY("SYS CLK DET", RT5659_CLK_DET, 3, 0, NULL, 0),
2866 SND_SOC_DAPM_SUPPLY("CLKDET", RT5659_CLK_DET, 0, 0, NULL, 0),
2869 SND_SOC_DAPM_OUTPUT("HPOL"),
2870 SND_SOC_DAPM_OUTPUT("HPOR"),
2871 SND_SOC_DAPM_OUTPUT("SPOL"),
2872 SND_SOC_DAPM_OUTPUT("SPOR"),
2873 SND_SOC_DAPM_OUTPUT("LOUTL"),
2874 SND_SOC_DAPM_OUTPUT("LOUTR"),
2875 SND_SOC_DAPM_OUTPUT("MONOOUT"),
2876 SND_SOC_DAPM_OUTPUT("PDML"),
2877 SND_SOC_DAPM_OUTPUT("PDMR"),
2878 SND_SOC_DAPM_OUTPUT("SPDIF"),
2881 static const struct snd_soc_dapm_route rt5659_dapm_routes[] = {
2883 { "ADC Stereo1 Filter", NULL, "PLL", is_sys_clk_from_pll },
2884 { "ADC Stereo2 Filter", NULL, "PLL", is_sys_clk_from_pll },
2885 { "ADC Mono Left Filter", NULL, "PLL", is_sys_clk_from_pll },
2886 { "ADC Mono Right Filter", NULL, "PLL", is_sys_clk_from_pll },
2887 { "DAC Stereo1 Filter", NULL, "PLL", is_sys_clk_from_pll },
2888 { "DAC Mono Left Filter", NULL, "PLL", is_sys_clk_from_pll },
2889 { "DAC Mono Right Filter", NULL, "PLL", is_sys_clk_from_pll },
2892 { "ADC Stereo1 Filter", NULL, "ADC STO1 ASRC", is_using_asrc },
2893 { "ADC Mono Left Filter", NULL, "ADC Mono L ASRC", is_using_asrc },
2894 { "ADC Mono Right Filter", NULL, "ADC Mono R ASRC", is_using_asrc },
2895 { "DAC Mono Left Filter", NULL, "DAC Mono L ASRC", is_using_asrc },
2896 { "DAC Mono Right Filter", NULL, "DAC Mono R ASRC", is_using_asrc },
2897 { "DAC Stereo1 Filter", NULL, "DAC STO ASRC", is_using_asrc },
2899 { "SYS CLK DET", NULL, "CLKDET" },
2901 { "I2S1", NULL, "I2S1 ASRC" },
2902 { "I2S2", NULL, "I2S2 ASRC" },
2903 { "I2S3", NULL, "I2S3 ASRC" },
2905 { "DMIC1", NULL, "DMIC L1" },
2906 { "DMIC1", NULL, "DMIC R1" },
2907 { "DMIC2", NULL, "DMIC L2" },
2908 { "DMIC2", NULL, "DMIC R2" },
2910 { "BST1", NULL, "IN1P" },
2911 { "BST1", NULL, "IN1N" },
2912 { "BST1", NULL, "BST1 Power" },
2913 { "BST2", NULL, "IN2P" },
2914 { "BST2", NULL, "IN2N" },
2915 { "BST2", NULL, "BST2 Power" },
2916 { "BST3", NULL, "IN3P" },
2917 { "BST3", NULL, "IN3N" },
2918 { "BST3", NULL, "BST3 Power" },
2919 { "BST4", NULL, "IN4P" },
2920 { "BST4", NULL, "IN4N" },
2921 { "BST4", NULL, "BST4 Power" },
2923 { "INL VOL", NULL, "IN2P" },
2924 { "INR VOL", NULL, "IN2N" },
2926 { "RECMIX1L", "SPKVOLL Switch", "SPKVOL L" },
2927 { "RECMIX1L", "INL Switch", "INL VOL" },
2928 { "RECMIX1L", "BST4 Switch", "BST4" },
2929 { "RECMIX1L", "BST3 Switch", "BST3" },
2930 { "RECMIX1L", "BST2 Switch", "BST2" },
2931 { "RECMIX1L", "BST1 Switch", "BST1" },
2933 { "RECMIX1R", "HPOVOLR Switch", "HPO R Playback" },
2934 { "RECMIX1R", "INR Switch", "INR VOL" },
2935 { "RECMIX1R", "BST4 Switch", "BST4" },
2936 { "RECMIX1R", "BST3 Switch", "BST3" },
2937 { "RECMIX1R", "BST2 Switch", "BST2" },
2938 { "RECMIX1R", "BST1 Switch", "BST1" },
2940 { "RECMIX2L", "SPKVOLL Switch", "SPKVOL L" },
2941 { "RECMIX2L", "OUTVOLL Switch", "OUTVOL L" },
2942 { "RECMIX2L", "BST4 Switch", "BST4" },
2943 { "RECMIX2L", "BST3 Switch", "BST3" },
2944 { "RECMIX2L", "BST2 Switch", "BST2" },
2945 { "RECMIX2L", "BST1 Switch", "BST1" },
2947 { "RECMIX2R", "MONOVOL Switch", "MONOVOL" },
2948 { "RECMIX2R", "OUTVOLR Switch", "OUTVOL R" },
2949 { "RECMIX2R", "BST4 Switch", "BST4" },
2950 { "RECMIX2R", "BST3 Switch", "BST3" },
2951 { "RECMIX2R", "BST2 Switch", "BST2" },
2952 { "RECMIX2R", "BST1 Switch", "BST1" },
2954 { "ADC1 L", NULL, "RECMIX1L" },
2955 { "ADC1 L", NULL, "ADC1 L Power" },
2956 { "ADC1 L", NULL, "ADC1 clock" },
2957 { "ADC1 R", NULL, "RECMIX1R" },
2958 { "ADC1 R", NULL, "ADC1 R Power" },
2959 { "ADC1 R", NULL, "ADC1 clock" },
2961 { "ADC2 L", NULL, "RECMIX2L" },
2962 { "ADC2 L", NULL, "ADC2 L Power" },
2963 { "ADC2 L", NULL, "ADC2 clock" },
2964 { "ADC2 R", NULL, "RECMIX2R" },
2965 { "ADC2 R", NULL, "ADC2 R Power" },
2966 { "ADC2 R", NULL, "ADC2 clock" },
2968 { "DMIC L1", NULL, "DMIC CLK" },
2969 { "DMIC L1", NULL, "DMIC1 Power" },
2970 { "DMIC R1", NULL, "DMIC CLK" },
2971 { "DMIC R1", NULL, "DMIC1 Power" },
2972 { "DMIC L2", NULL, "DMIC CLK" },
2973 { "DMIC L2", NULL, "DMIC2 Power" },
2974 { "DMIC R2", NULL, "DMIC CLK" },
2975 { "DMIC R2", NULL, "DMIC2 Power" },
2977 { "Stereo1 DMIC L Mux", "DMIC1", "DMIC L1" },
2978 { "Stereo1 DMIC L Mux", "DMIC2", "DMIC L2" },
2980 { "Stereo1 DMIC R Mux", "DMIC1", "DMIC R1" },
2981 { "Stereo1 DMIC R Mux", "DMIC2", "DMIC R2" },
2983 { "Mono DMIC L Mux", "DMIC1 L", "DMIC L1" },
2984 { "Mono DMIC L Mux", "DMIC2 L", "DMIC L2" },
2986 { "Mono DMIC R Mux", "DMIC1 R", "DMIC R1" },
2987 { "Mono DMIC R Mux", "DMIC2 R", "DMIC R2" },
2989 { "Stereo1 ADC L Mux", "ADC1", "ADC1 L" },
2990 { "Stereo1 ADC L Mux", "ADC2", "ADC2 L" },
2991 { "Stereo1 ADC R Mux", "ADC1", "ADC1 R" },
2992 { "Stereo1 ADC R Mux", "ADC2", "ADC2 R" },
2994 { "Stereo1 ADC L1 Mux", "ADC", "Stereo1 ADC L Mux" },
2995 { "Stereo1 ADC L1 Mux", "DAC MIX", "DAC MIXL" },
2996 { "Stereo1 ADC L2 Mux", "DMIC", "Stereo1 DMIC L Mux" },
2997 { "Stereo1 ADC L2 Mux", "DAC MIX", "DAC MIXL" },
2999 { "Stereo1 ADC R1 Mux", "ADC", "Stereo1 ADC R Mux" },
3000 { "Stereo1 ADC R1 Mux", "DAC MIX", "DAC MIXR" },
3001 { "Stereo1 ADC R2 Mux", "DMIC", "Stereo1 DMIC R Mux" },
3002 { "Stereo1 ADC R2 Mux", "DAC MIX", "DAC MIXR" },
3004 { "Mono ADC L Mux", "ADC1 L", "ADC1 L" },
3005 { "Mono ADC L Mux", "ADC1 R", "ADC1 R" },
3006 { "Mono ADC L Mux", "ADC2 L", "ADC2 L" },
3007 { "Mono ADC L Mux", "ADC2 R", "ADC2 R" },
3009 { "Mono ADC R Mux", "ADC1 L", "ADC1 L" },
3010 { "Mono ADC R Mux", "ADC1 R", "ADC1 R" },
3011 { "Mono ADC R Mux", "ADC2 L", "ADC2 L" },
3012 { "Mono ADC R Mux", "ADC2 R", "ADC2 R" },
3014 { "Mono ADC L2 Mux", "DMIC", "Mono DMIC L Mux" },
3015 { "Mono ADC L2 Mux", "Mono DAC MIXL", "Mono DAC MIXL" },
3016 { "Mono ADC L1 Mux", "Mono DAC MIXL", "Mono DAC MIXL" },
3017 { "Mono ADC L1 Mux", "ADC", "Mono ADC L Mux" },
3019 { "Mono ADC R1 Mux", "Mono DAC MIXR", "Mono DAC MIXR" },
3020 { "Mono ADC R1 Mux", "ADC", "Mono ADC R Mux" },
3021 { "Mono ADC R2 Mux", "DMIC", "Mono DMIC R Mux" },
3022 { "Mono ADC R2 Mux", "Mono DAC MIXR", "Mono DAC MIXR" },
3024 { "Stereo1 ADC MIXL", "ADC1 Switch", "Stereo1 ADC L1 Mux" },
3025 { "Stereo1 ADC MIXL", "ADC2 Switch", "Stereo1 ADC L2 Mux" },
3026 { "Stereo1 ADC MIXL", NULL, "ADC Stereo1 Filter" },
3028 { "Stereo1 ADC MIXR", "ADC1 Switch", "Stereo1 ADC R1 Mux" },
3029 { "Stereo1 ADC MIXR", "ADC2 Switch", "Stereo1 ADC R2 Mux" },
3030 { "Stereo1 ADC MIXR", NULL, "ADC Stereo1 Filter" },
3032 { "Mono ADC MIXL", "ADC1 Switch", "Mono ADC L1 Mux" },
3033 { "Mono ADC MIXL", "ADC2 Switch", "Mono ADC L2 Mux" },
3034 { "Mono ADC MIXL", NULL, "ADC Mono Left Filter" },
3036 { "Mono ADC MIXR", "ADC1 Switch", "Mono ADC R1 Mux" },
3037 { "Mono ADC MIXR", "ADC2 Switch", "Mono ADC R2 Mux" },
3038 { "Mono ADC MIXR", NULL, "ADC Mono Right Filter" },
3040 { "Stereo1 ADC Volume L", NULL, "Stereo1 ADC MIXL" },
3041 { "Stereo1 ADC Volume R", NULL, "Stereo1 ADC MIXR" },
3043 { "IF_ADC1", NULL, "Stereo1 ADC Volume L" },
3044 { "IF_ADC1", NULL, "Stereo1 ADC Volume R" },
3045 { "IF_ADC2", NULL, "Mono ADC MIXL" },
3046 { "IF_ADC2", NULL, "Mono ADC MIXR" },
3048 { "TDM AD1:AD2:DAC", NULL, "IF_ADC1" },
3049 { "TDM AD1:AD2:DAC", NULL, "IF_ADC2" },
3050 { "TDM AD1:AD2:DAC", NULL, "DAC_REF" },
3051 { "TDM AD2:DAC", NULL, "IF_ADC2" },
3052 { "TDM AD2:DAC", NULL, "DAC_REF" },
3053 { "TDM Data Mux", "AD1:AD2:DAC:NUL", "TDM AD1:AD2:DAC" },
3054 { "TDM Data Mux", "AD1:AD2:NUL:DAC", "TDM AD1:AD2:DAC" },
3055 { "TDM Data Mux", "AD1:DAC:AD2:NUL", "TDM AD1:AD2:DAC" },
3056 { "TDM Data Mux", "AD1:DAC:NUL:AD2", "TDM AD1:AD2:DAC" },
3057 { "TDM Data Mux", "AD1:NUL:DAC:AD2", "TDM AD1:AD2:DAC" },
3058 { "TDM Data Mux", "AD1:NUL:AD2:DAC", "TDM AD1:AD2:DAC" },
3059 { "TDM Data Mux", "AD2:AD1:DAC:NUL", "TDM AD1:AD2:DAC" },
3060 { "TDM Data Mux", "AD2:AD1:NUL:DAC", "TDM AD1:AD2:DAC" },
3061 { "TDM Data Mux", "AD2:DAC:AD1:NUL", "TDM AD1:AD2:DAC" },
3062 { "TDM Data Mux", "AD2:DAC:NUL:AD1", "TDM AD1:AD2:DAC" },
3063 { "TDM Data Mux", "AD2:NUL:DAC:AD1", "TDM AD1:AD2:DAC" },
3064 { "TDM Data Mux", "AD1:NUL:AD1:DAC", "TDM AD1:AD2:DAC" },
3065 { "TDM Data Mux", "DAC:AD1:AD2:NUL", "TDM AD1:AD2:DAC" },
3066 { "TDM Data Mux", "DAC:AD1:NUL:AD2", "TDM AD1:AD2:DAC" },
3067 { "TDM Data Mux", "DAC:AD2:AD1:NUL", "TDM AD1:AD2:DAC" },
3068 { "TDM Data Mux", "DAC:AD2:NUL:AD1", "TDM AD1:AD2:DAC" },
3069 { "TDM Data Mux", "DAC:NUL:DAC:AD2", "TDM AD2:DAC" },
3070 { "TDM Data Mux", "DAC:NUL:AD2:DAC", "TDM AD2:DAC" },
3071 { "TDM Data Mux", "NUL:AD1:AD2:DAC", "TDM AD1:AD2:DAC" },
3072 { "TDM Data Mux", "NUL:AD1:DAC:AD2", "TDM AD1:AD2:DAC" },
3073 { "TDM Data Mux", "NUL:AD2:AD1:DAC", "TDM AD1:AD2:DAC" },
3074 { "TDM Data Mux", "NUL:AD2:DAC:AD1", "TDM AD1:AD2:DAC" },
3075 { "TDM Data Mux", "NUL:DAC:DAC:AD2", "TDM AD2:DAC" },
3076 { "TDM Data Mux", "NUL:DAC:AD2:DAC", "TDM AD2:DAC" },
3077 { "IF1 01 ADC Swap Mux", "L/R", "TDM Data Mux" },
3078 { "IF1 01 ADC Swap Mux", "R/L", "TDM Data Mux" },
3079 { "IF1 01 ADC Swap Mux", "L/L", "TDM Data Mux" },
3080 { "IF1 01 ADC Swap Mux", "R/R", "TDM Data Mux" },
3081 { "IF1 23 ADC Swap Mux", "L/R", "TDM Data Mux" },
3082 { "IF1 23 ADC Swap Mux", "R/L", "TDM Data Mux" },
3083 { "IF1 23 ADC Swap Mux", "L/L", "TDM Data Mux" },
3084 { "IF1 23 ADC Swap Mux", "R/R", "TDM Data Mux" },
3085 { "IF1 45 ADC Swap Mux", "L/R", "TDM Data Mux" },
3086 { "IF1 45 ADC Swap Mux", "R/L", "TDM Data Mux" },
3087 { "IF1 45 ADC Swap Mux", "L/L", "TDM Data Mux" },
3088 { "IF1 45 ADC Swap Mux", "R/R", "TDM Data Mux" },
3089 { "IF1 67 ADC Swap Mux", "L/R", "TDM Data Mux" },
3090 { "IF1 67 ADC Swap Mux", "R/L", "TDM Data Mux" },
3091 { "IF1 67 ADC Swap Mux", "L/L", "TDM Data Mux" },
3092 { "IF1 67 ADC Swap Mux", "R/R", "TDM Data Mux" },
3093 { "IF1 ADC", NULL, "IF1 01 ADC Swap Mux" },
3094 { "IF1 ADC", NULL, "IF1 23 ADC Swap Mux" },
3095 { "IF1 ADC", NULL, "IF1 45 ADC Swap Mux" },
3096 { "IF1 ADC", NULL, "IF1 67 ADC Swap Mux" },
3097 { "IF1 ADC", NULL, "I2S1" },
3099 { "IF2 ADC Mux", "IF_ADC1", "IF_ADC1" },
3100 { "IF2 ADC Mux", "IF_ADC2", "IF_ADC2" },
3101 { "IF2 ADC Mux", "IF_ADC3", "IF_ADC3" },
3102 { "IF2 ADC Mux", "DAC_REF", "DAC_REF" },
3103 { "IF2 ADC", NULL, "IF2 ADC Mux"},
3104 { "IF2 ADC", NULL, "I2S2" },
3106 { "IF3 ADC Mux", "IF_ADC1", "IF_ADC1" },
3107 { "IF3 ADC Mux", "IF_ADC2", "IF_ADC2" },
3108 { "IF3 ADC Mux", "Stereo2_ADC_L/R", "Stereo2 ADC LR" },
3109 { "IF3 ADC Mux", "DAC_REF", "DAC_REF" },
3110 { "IF3 ADC", NULL, "IF3 ADC Mux"},
3111 { "IF3 ADC", NULL, "I2S3" },
3113 { "AIF1TX", NULL, "IF1 ADC" },
3114 { "IF2 ADC Swap Mux", "L/R", "IF2 ADC" },
3115 { "IF2 ADC Swap Mux", "R/L", "IF2 ADC" },
3116 { "IF2 ADC Swap Mux", "L/L", "IF2 ADC" },
3117 { "IF2 ADC Swap Mux", "R/R", "IF2 ADC" },
3118 { "AIF2TX", NULL, "IF2 ADC Swap Mux" },
3119 { "IF3 ADC Swap Mux", "L/R", "IF3 ADC" },
3120 { "IF3 ADC Swap Mux", "R/L", "IF3 ADC" },
3121 { "IF3 ADC Swap Mux", "L/L", "IF3 ADC" },
3122 { "IF3 ADC Swap Mux", "R/R", "IF3 ADC" },
3123 { "AIF3TX", NULL, "IF3 ADC Swap Mux" },
3125 { "IF1 DAC1", NULL, "AIF1RX" },
3126 { "IF1 DAC2", NULL, "AIF1RX" },
3127 { "IF2 DAC Swap Mux", "L/R", "AIF2RX" },
3128 { "IF2 DAC Swap Mux", "R/L", "AIF2RX" },
3129 { "IF2 DAC Swap Mux", "L/L", "AIF2RX" },
3130 { "IF2 DAC Swap Mux", "R/R", "AIF2RX" },
3131 { "IF2 DAC", NULL, "IF2 DAC Swap Mux" },
3132 { "IF3 DAC Swap Mux", "L/R", "AIF3RX" },
3133 { "IF3 DAC Swap Mux", "R/L", "AIF3RX" },
3134 { "IF3 DAC Swap Mux", "L/L", "AIF3RX" },
3135 { "IF3 DAC Swap Mux", "R/R", "AIF3RX" },
3136 { "IF3 DAC", NULL, "IF3 DAC Swap Mux" },
3138 { "IF1 DAC1", NULL, "I2S1" },
3139 { "IF1 DAC2", NULL, "I2S1" },
3140 { "IF2 DAC", NULL, "I2S2" },
3141 { "IF3 DAC", NULL, "I2S3" },
3143 { "IF1 DAC2 L", NULL, "IF1 DAC2" },
3144 { "IF1 DAC2 R", NULL, "IF1 DAC2" },
3145 { "IF1 DAC1 L", NULL, "IF1 DAC1" },
3146 { "IF1 DAC1 R", NULL, "IF1 DAC1" },
3147 { "IF2 DAC L", NULL, "IF2 DAC" },
3148 { "IF2 DAC R", NULL, "IF2 DAC" },
3149 { "IF3 DAC L", NULL, "IF3 DAC" },
3150 { "IF3 DAC R", NULL, "IF3 DAC" },
3152 { "DAC L1 Mux", "IF1 DAC1", "IF1 DAC1 L" },
3153 { "DAC L1 Mux", "IF2 DAC", "IF2 DAC L" },
3154 { "DAC L1 Mux", "IF3 DAC", "IF3 DAC L" },
3155 { "DAC L1 Mux", NULL, "DAC Stereo1 Filter" },
3157 { "DAC R1 Mux", "IF1 DAC1", "IF1 DAC1 R" },
3158 { "DAC R1 Mux", "IF2 DAC", "IF2 DAC R" },
3159 { "DAC R1 Mux", "IF3 DAC", "IF3 DAC R" },
3160 { "DAC R1 Mux", NULL, "DAC Stereo1 Filter" },
3162 { "DAC1 MIXL", "Stereo ADC Switch", "Stereo1 ADC Volume L" },
3163 { "DAC1 MIXL", "DAC1 Switch", "DAC L1 Mux" },
3164 { "DAC1 MIXR", "Stereo ADC Switch", "Stereo1 ADC Volume R" },
3165 { "DAC1 MIXR", "DAC1 Switch", "DAC R1 Mux" },
3167 { "DAC_REF", NULL, "DAC1 MIXL" },
3168 { "DAC_REF", NULL, "DAC1 MIXR" },
3170 { "DAC L2 Mux", "IF1 DAC2", "IF1 DAC2 L" },
3171 { "DAC L2 Mux", "IF2 DAC", "IF2 DAC L" },
3172 { "DAC L2 Mux", "IF3 DAC", "IF3 DAC L" },
3173 { "DAC L2 Mux", "Mono ADC MIX", "Mono ADC MIXL" },
3174 { "DAC L2 Mux", NULL, "DAC Mono Left Filter" },
3176 { "DAC R2 Mux", "IF1 DAC2", "IF1 DAC2 R" },
3177 { "DAC R2 Mux", "IF2 DAC", "IF2 DAC R" },
3178 { "DAC R2 Mux", "IF3 DAC", "IF3 DAC R" },
3179 { "DAC R2 Mux", "Mono ADC MIX", "Mono ADC MIXR" },
3180 { "DAC R2 Mux", NULL, "DAC Mono Right Filter" },
3182 { "Stereo DAC MIXL", "DAC L1 Switch", "DAC1 MIXL" },
3183 { "Stereo DAC MIXL", "DAC R1 Switch", "DAC1 MIXR" },
3184 { "Stereo DAC MIXL", "DAC L2 Switch", "DAC L2 Mux" },
3185 { "Stereo DAC MIXL", "DAC R2 Switch", "DAC R2 Mux" },
3187 { "Stereo DAC MIXR", "DAC R1 Switch", "DAC1 MIXR" },
3188 { "Stereo DAC MIXR", "DAC L1 Switch", "DAC1 MIXL" },
3189 { "Stereo DAC MIXR", "DAC L2 Switch", "DAC L2 Mux" },
3190 { "Stereo DAC MIXR", "DAC R2 Switch", "DAC R2 Mux" },
3192 { "Mono DAC MIXL", "DAC L1 Switch", "DAC1 MIXL" },
3193 { "Mono DAC MIXL", "DAC R1 Switch", "DAC1 MIXR" },
3194 { "Mono DAC MIXL", "DAC L2 Switch", "DAC L2 Mux" },
3195 { "Mono DAC MIXL", "DAC R2 Switch", "DAC R2 Mux" },
3196 { "Mono DAC MIXR", "DAC L1 Switch", "DAC1 MIXL" },
3197 { "Mono DAC MIXR", "DAC R1 Switch", "DAC1 MIXR" },
3198 { "Mono DAC MIXR", "DAC R2 Switch", "DAC R2 Mux" },
3199 { "Mono DAC MIXR", "DAC L2 Switch", "DAC L2 Mux" },
3201 { "DAC MIXL", "Stereo DAC Mixer", "Stereo DAC MIXL" },
3202 { "DAC MIXL", "Mono DAC Mixer", "Mono DAC MIXL" },
3203 { "DAC MIXR", "Stereo DAC Mixer", "Stereo DAC MIXR" },
3204 { "DAC MIXR", "Mono DAC Mixer", "Mono DAC MIXR" },
3206 { "DAC L1 Source", NULL, "DAC L1 Power" },
3207 { "DAC L1 Source", "DAC", "DAC1 MIXL" },
3208 { "DAC L1 Source", "Stereo DAC Mixer", "Stereo DAC MIXL" },
3209 { "DAC R1 Source", NULL, "DAC R1 Power" },
3210 { "DAC R1 Source", "DAC", "DAC1 MIXR" },
3211 { "DAC R1 Source", "Stereo DAC Mixer", "Stereo DAC MIXR" },
3212 { "DAC L2 Source", "Stereo DAC Mixer", "Stereo DAC MIXL" },
3213 { "DAC L2 Source", "Mono DAC Mixer", "Mono DAC MIXL" },
3214 { "DAC L2 Source", NULL, "DAC L2 Power" },
3215 { "DAC R2 Source", "Stereo DAC Mixer", "Stereo DAC MIXR" },
3216 { "DAC R2 Source", "Mono DAC Mixer", "Mono DAC MIXR" },
3217 { "DAC R2 Source", NULL, "DAC R2 Power" },
3219 { "DAC L1", NULL, "DAC L1 Source" },
3220 { "DAC R1", NULL, "DAC R1 Source" },
3221 { "DAC L2", NULL, "DAC L2 Source" },
3222 { "DAC R2", NULL, "DAC R2 Source" },
3224 { "SPK MIXL", "DAC L2 Switch", "DAC L2" },
3225 { "SPK MIXL", "BST1 Switch", "BST1" },
3226 { "SPK MIXL", "INL Switch", "INL VOL" },
3227 { "SPK MIXL", "INR Switch", "INR VOL" },
3228 { "SPK MIXL", "BST3 Switch", "BST3" },
3229 { "SPK MIXR", "DAC R2 Switch", "DAC R2" },
3230 { "SPK MIXR", "BST4 Switch", "BST4" },
3231 { "SPK MIXR", "INL Switch", "INL VOL" },
3232 { "SPK MIXR", "INR Switch", "INR VOL" },
3233 { "SPK MIXR", "BST3 Switch", "BST3" },
3235 { "MONOVOL MIX", "DAC L2 Switch", "DAC L2" },
3236 { "MONOVOL MIX", "DAC R2 Switch", "DAC R2" },
3237 { "MONOVOL MIX", "BST1 Switch", "BST1" },
3238 { "MONOVOL MIX", "BST2 Switch", "BST2" },
3239 { "MONOVOL MIX", "BST3 Switch", "BST3" },
3241 { "OUT MIXL", "DAC L2 Switch", "DAC L2" },
3242 { "OUT MIXL", "INL Switch", "INL VOL" },
3243 { "OUT MIXL", "BST1 Switch", "BST1" },
3244 { "OUT MIXL", "BST2 Switch", "BST2" },
3245 { "OUT MIXL", "BST3 Switch", "BST3" },
3246 { "OUT MIXR", "DAC R2 Switch", "DAC R2" },
3247 { "OUT MIXR", "INR Switch", "INR VOL" },
3248 { "OUT MIXR", "BST2 Switch", "BST2" },
3249 { "OUT MIXR", "BST3 Switch", "BST3" },
3250 { "OUT MIXR", "BST4 Switch", "BST4" },
3252 { "SPKVOL L", "Switch", "SPK MIXL" },
3253 { "SPKVOL R", "Switch", "SPK MIXR" },
3254 { "SPO L MIX", "DAC L2 Switch", "DAC L2" },
3255 { "SPO L MIX", "SPKVOL L Switch", "SPKVOL L" },
3256 { "SPO R MIX", "DAC R2 Switch", "DAC R2" },
3257 { "SPO R MIX", "SPKVOL R Switch", "SPKVOL R" },
3258 { "SPK Amp", NULL, "SPO L MIX" },
3259 { "SPK Amp", NULL, "SPO R MIX" },
3260 { "SPK Amp", NULL, "SYS CLK DET" },
3261 { "SPO Playback", "Switch", "SPK Amp" },
3262 { "SPOL", NULL, "SPO Playback" },
3263 { "SPOR", NULL, "SPO Playback" },
3265 { "MONOVOL", "Switch", "MONOVOL MIX" },
3266 { "Mono MIX", "DAC L2 Switch", "DAC L2" },
3267 { "Mono MIX", "MONOVOL Switch", "MONOVOL" },
3268 { "Mono Amp", NULL, "Mono MIX" },
3269 { "Mono Amp", NULL, "Mono Vref" },
3270 { "Mono Amp", NULL, "SYS CLK DET" },
3271 { "Mono Playback", "Switch", "Mono Amp" },
3272 { "MONOOUT", NULL, "Mono Playback" },
3274 { "HP Amp", NULL, "DAC L1" },
3275 { "HP Amp", NULL, "DAC R1" },
3276 { "HP Amp", NULL, "Charge Pump" },
3277 { "HP Amp", NULL, "SYS CLK DET" },
3278 { "HPO L Playback", "Switch", "HP Amp"},
3279 { "HPO R Playback", "Switch", "HP Amp"},
3280 { "HPOL", NULL, "HPO L Playback" },
3281 { "HPOR", NULL, "HPO R Playback" },
3283 { "OUTVOL L", "Switch", "OUT MIXL" },
3284 { "OUTVOL R", "Switch", "OUT MIXR" },
3285 { "LOUT L MIX", "DAC L2 Switch", "DAC L2" },
3286 { "LOUT L MIX", "OUTVOL L Switch", "OUTVOL L" },
3287 { "LOUT R MIX", "DAC R2 Switch", "DAC R2" },
3288 { "LOUT R MIX", "OUTVOL R Switch", "OUTVOL R" },
3289 { "LOUT Amp", NULL, "LOUT L MIX" },
3290 { "LOUT Amp", NULL, "LOUT R MIX" },
3291 { "LOUT Amp", NULL, "Charge Pump" },
3292 { "LOUT Amp", NULL, "SYS CLK DET" },
3293 { "LOUT L Playback", "Switch", "LOUT Amp" },
3294 { "LOUT R Playback", "Switch", "LOUT Amp" },
3295 { "LOUTL", NULL, "LOUT L Playback" },
3296 { "LOUTR", NULL, "LOUT R Playback" },
3298 { "PDM L Mux", "Mono DAC", "Mono DAC MIXL" },
3299 { "PDM L Mux", "Stereo DAC", "Stereo DAC MIXL" },
3300 { "PDM L Mux", NULL, "PDM Power" },
3301 { "PDM R Mux", "Mono DAC", "Mono DAC MIXR" },
3302 { "PDM R Mux", "Stereo DAC", "Stereo DAC MIXR" },
3303 { "PDM R Mux", NULL, "PDM Power" },
3304 { "PDM L Playback", "Switch", "PDM L Mux" },
3305 { "PDM R Playback", "Switch", "PDM R Mux" },
3306 { "PDML", NULL, "PDM L Playback" },
3307 { "PDMR", NULL, "PDM R Playback" },
3309 { "SPDIF Mux", "IF3_DAC", "IF3 DAC" },
3310 { "SPDIF Mux", "IF2_DAC", "IF2 DAC" },
3311 { "SPDIF Mux", "IF1_DAC2", "IF1 DAC2" },
3312 { "SPDIF Mux", "IF1_DAC1", "IF1 DAC1" },
3313 { "SPDIF", NULL, "SPDIF Mux" },
3316 static int rt5659_hw_params(struct snd_pcm_substream *substream,
3317 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
3319 struct snd_soc_component *component = dai->component;
3320 struct rt5659_priv *rt5659 = snd_soc_component_get_drvdata(component);
3321 unsigned int val_len = 0, val_clk, mask_clk;
3322 int pre_div, frame_size;
3324 rt5659->lrck[dai->id] = params_rate(params);
3325 pre_div = rl6231_get_clk_info(rt5659->sysclk, rt5659->lrck[dai->id]);
3327 dev_err(component->dev, "Unsupported clock setting %d for DAI %d\n",
3328 rt5659->lrck[dai->id], dai->id);
3331 frame_size = snd_soc_params_to_frame_size(params);
3332 if (frame_size < 0) {
3333 dev_err(component->dev, "Unsupported frame size: %d\n", frame_size);
3337 dev_dbg(dai->dev, "lrck is %dHz and pre_div is %d for iis %d\n",
3338 rt5659->lrck[dai->id], pre_div, dai->id);
3340 switch (params_width(params)) {
3344 val_len |= RT5659_I2S_DL_20;
3347 val_len |= RT5659_I2S_DL_24;
3350 val_len |= RT5659_I2S_DL_8;
3358 mask_clk = RT5659_I2S_PD1_MASK;
3359 val_clk = pre_div << RT5659_I2S_PD1_SFT;
3360 snd_soc_component_update_bits(component, RT5659_I2S1_SDP,
3361 RT5659_I2S_DL_MASK, val_len);
3364 mask_clk = RT5659_I2S_PD2_MASK;
3365 val_clk = pre_div << RT5659_I2S_PD2_SFT;
3366 snd_soc_component_update_bits(component, RT5659_I2S2_SDP,
3367 RT5659_I2S_DL_MASK, val_len);
3370 mask_clk = RT5659_I2S_PD3_MASK;
3371 val_clk = pre_div << RT5659_I2S_PD3_SFT;
3372 snd_soc_component_update_bits(component, RT5659_I2S3_SDP,
3373 RT5659_I2S_DL_MASK, val_len);
3376 dev_err(component->dev, "Invalid dai->id: %d\n", dai->id);
3380 snd_soc_component_update_bits(component, RT5659_ADDA_CLK_1, mask_clk, val_clk);
3382 switch (rt5659->lrck[dai->id]) {
3384 snd_soc_component_update_bits(component, RT5659_ADDA_CLK_1,
3385 RT5659_DAC_OSR_MASK, RT5659_DAC_OSR_32);
3388 snd_soc_component_update_bits(component, RT5659_ADDA_CLK_1,
3389 RT5659_DAC_OSR_MASK, RT5659_DAC_OSR_64);
3392 snd_soc_component_update_bits(component, RT5659_ADDA_CLK_1,
3393 RT5659_DAC_OSR_MASK, RT5659_DAC_OSR_128);
3400 static int rt5659_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
3402 struct snd_soc_component *component = dai->component;
3403 struct rt5659_priv *rt5659 = snd_soc_component_get_drvdata(component);
3404 unsigned int reg_val = 0;
3406 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
3407 case SND_SOC_DAIFMT_CBM_CFM:
3408 rt5659->master[dai->id] = 1;
3410 case SND_SOC_DAIFMT_CBS_CFS:
3411 reg_val |= RT5659_I2S_MS_S;
3412 rt5659->master[dai->id] = 0;
3418 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
3419 case SND_SOC_DAIFMT_NB_NF:
3421 case SND_SOC_DAIFMT_IB_NF:
3422 reg_val |= RT5659_I2S_BP_INV;
3428 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
3429 case SND_SOC_DAIFMT_I2S:
3431 case SND_SOC_DAIFMT_LEFT_J:
3432 reg_val |= RT5659_I2S_DF_LEFT;
3434 case SND_SOC_DAIFMT_DSP_A:
3435 reg_val |= RT5659_I2S_DF_PCM_A;
3437 case SND_SOC_DAIFMT_DSP_B:
3438 reg_val |= RT5659_I2S_DF_PCM_B;
3446 snd_soc_component_update_bits(component, RT5659_I2S1_SDP,
3447 RT5659_I2S_MS_MASK | RT5659_I2S_BP_MASK |
3448 RT5659_I2S_DF_MASK, reg_val);
3451 snd_soc_component_update_bits(component, RT5659_I2S2_SDP,
3452 RT5659_I2S_MS_MASK | RT5659_I2S_BP_MASK |
3453 RT5659_I2S_DF_MASK, reg_val);
3456 snd_soc_component_update_bits(component, RT5659_I2S3_SDP,
3457 RT5659_I2S_MS_MASK | RT5659_I2S_BP_MASK |
3458 RT5659_I2S_DF_MASK, reg_val);
3461 dev_err(component->dev, "Invalid dai->id: %d\n", dai->id);
3467 static int rt5659_set_component_sysclk(struct snd_soc_component *component, int clk_id,
3468 int source, unsigned int freq, int dir)
3470 struct rt5659_priv *rt5659 = snd_soc_component_get_drvdata(component);
3471 unsigned int reg_val = 0;
3474 if (freq == rt5659->sysclk && clk_id == rt5659->sysclk_src)
3478 case RT5659_SCLK_S_MCLK:
3479 ret = clk_set_rate(rt5659->mclk, freq);
3483 reg_val |= RT5659_SCLK_SRC_MCLK;
3485 case RT5659_SCLK_S_PLL1:
3486 reg_val |= RT5659_SCLK_SRC_PLL1;
3488 case RT5659_SCLK_S_RCCLK:
3489 reg_val |= RT5659_SCLK_SRC_RCCLK;
3492 dev_err(component->dev, "Invalid clock id (%d)\n", clk_id);
3495 snd_soc_component_update_bits(component, RT5659_GLB_CLK,
3496 RT5659_SCLK_SRC_MASK, reg_val);
3497 rt5659->sysclk = freq;
3498 rt5659->sysclk_src = clk_id;
3500 dev_dbg(component->dev, "Sysclk is %dHz and clock id is %d\n",
3506 static int rt5659_set_component_pll(struct snd_soc_component *component, int pll_id,
3507 int source, unsigned int freq_in,
3508 unsigned int freq_out)
3510 struct rt5659_priv *rt5659 = snd_soc_component_get_drvdata(component);
3511 struct rl6231_pll_code pll_code;
3514 if (source == rt5659->pll_src && freq_in == rt5659->pll_in &&
3515 freq_out == rt5659->pll_out)
3518 if (!freq_in || !freq_out) {
3519 dev_dbg(component->dev, "PLL disabled\n");
3522 rt5659->pll_out = 0;
3523 snd_soc_component_update_bits(component, RT5659_GLB_CLK,
3524 RT5659_SCLK_SRC_MASK, RT5659_SCLK_SRC_MCLK);
3529 case RT5659_PLL1_S_MCLK:
3530 snd_soc_component_update_bits(component, RT5659_GLB_CLK,
3531 RT5659_PLL1_SRC_MASK, RT5659_PLL1_SRC_MCLK);
3533 case RT5659_PLL1_S_BCLK1:
3534 snd_soc_component_update_bits(component, RT5659_GLB_CLK,
3535 RT5659_PLL1_SRC_MASK, RT5659_PLL1_SRC_BCLK1);
3537 case RT5659_PLL1_S_BCLK2:
3538 snd_soc_component_update_bits(component, RT5659_GLB_CLK,
3539 RT5659_PLL1_SRC_MASK, RT5659_PLL1_SRC_BCLK2);
3541 case RT5659_PLL1_S_BCLK3:
3542 snd_soc_component_update_bits(component, RT5659_GLB_CLK,
3543 RT5659_PLL1_SRC_MASK, RT5659_PLL1_SRC_BCLK3);
3546 dev_err(component->dev, "Unknown PLL source %d\n", source);
3550 ret = rl6231_pll_calc(freq_in, freq_out, &pll_code);
3552 dev_err(component->dev, "Unsupport input clock %d\n", freq_in);
3556 dev_dbg(component->dev, "bypass=%d m=%d n=%d k=%d\n",
3557 pll_code.m_bp, (pll_code.m_bp ? 0 : pll_code.m_code),
3558 pll_code.n_code, pll_code.k_code);
3560 snd_soc_component_write(component, RT5659_PLL_CTRL_1,
3561 pll_code.n_code << RT5659_PLL_N_SFT | pll_code.k_code);
3562 snd_soc_component_write(component, RT5659_PLL_CTRL_2,
3563 (pll_code.m_bp ? 0 : pll_code.m_code) << RT5659_PLL_M_SFT |
3564 pll_code.m_bp << RT5659_PLL_M_BP_SFT);
3566 rt5659->pll_in = freq_in;
3567 rt5659->pll_out = freq_out;
3568 rt5659->pll_src = source;
3573 static int rt5659_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask,
3574 unsigned int rx_mask, int slots, int slot_width)
3576 struct snd_soc_component *component = dai->component;
3577 unsigned int val = 0;
3579 if (rx_mask || tx_mask)
3601 switch (slot_width) {
3620 snd_soc_component_update_bits(component, RT5659_TDM_CTRL_1, 0x8ff0, val);
3625 static int rt5659_set_bclk_ratio(struct snd_soc_dai *dai, unsigned int ratio)
3627 struct snd_soc_component *component = dai->component;
3628 struct rt5659_priv *rt5659 = snd_soc_component_get_drvdata(component);
3630 dev_dbg(component->dev, "%s ratio=%d\n", __func__, ratio);
3632 rt5659->bclk[dai->id] = ratio;
3637 snd_soc_component_update_bits(component, RT5659_ADDA_CLK_1,
3638 RT5659_I2S_BCLK_MS2_MASK,
3639 RT5659_I2S_BCLK_MS2_64);
3642 snd_soc_component_update_bits(component, RT5659_ADDA_CLK_1,
3643 RT5659_I2S_BCLK_MS3_MASK,
3644 RT5659_I2S_BCLK_MS3_64);
3652 static int rt5659_set_bias_level(struct snd_soc_component *component,
3653 enum snd_soc_bias_level level)
3655 struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
3656 struct rt5659_priv *rt5659 = snd_soc_component_get_drvdata(component);
3660 case SND_SOC_BIAS_PREPARE:
3661 regmap_update_bits(rt5659->regmap, RT5659_DIG_MISC,
3662 RT5659_DIG_GATE_CTRL, RT5659_DIG_GATE_CTRL);
3663 regmap_update_bits(rt5659->regmap, RT5659_PWR_DIG_1,
3664 RT5659_PWR_LDO, RT5659_PWR_LDO);
3665 regmap_update_bits(rt5659->regmap, RT5659_PWR_ANLG_1,
3666 RT5659_PWR_MB | RT5659_PWR_VREF1 | RT5659_PWR_VREF2,
3667 RT5659_PWR_MB | RT5659_PWR_VREF1 | RT5659_PWR_VREF2);
3669 regmap_update_bits(rt5659->regmap, RT5659_PWR_ANLG_1,
3670 RT5659_PWR_FV1 | RT5659_PWR_FV2,
3671 RT5659_PWR_FV1 | RT5659_PWR_FV2);
3674 case SND_SOC_BIAS_STANDBY:
3675 if (dapm->bias_level == SND_SOC_BIAS_OFF) {
3676 ret = clk_prepare_enable(rt5659->mclk);
3678 dev_err(component->dev,
3679 "failed to enable MCLK: %d\n", ret);
3685 case SND_SOC_BIAS_OFF:
3686 regmap_update_bits(rt5659->regmap, RT5659_PWR_DIG_1,
3688 regmap_update_bits(rt5659->regmap, RT5659_PWR_ANLG_1,
3689 RT5659_PWR_MB | RT5659_PWR_VREF1 | RT5659_PWR_VREF2
3690 | RT5659_PWR_FV1 | RT5659_PWR_FV2,
3691 RT5659_PWR_MB | RT5659_PWR_VREF2);
3692 regmap_update_bits(rt5659->regmap, RT5659_DIG_MISC,
3693 RT5659_DIG_GATE_CTRL, 0);
3694 clk_disable_unprepare(rt5659->mclk);
3704 static int rt5659_probe(struct snd_soc_component *component)
3706 struct snd_soc_dapm_context *dapm =
3707 snd_soc_component_get_dapm(component);
3708 struct rt5659_priv *rt5659 = snd_soc_component_get_drvdata(component);
3710 rt5659->component = component;
3712 switch (rt5659->pdata.jd_src) {
3713 case RT5659_JD_HDA_HEADER:
3717 snd_soc_dapm_new_controls(dapm,
3718 rt5659_particular_dapm_widgets,
3719 ARRAY_SIZE(rt5659_particular_dapm_widgets));
3726 static void rt5659_remove(struct snd_soc_component *component)
3728 struct rt5659_priv *rt5659 = snd_soc_component_get_drvdata(component);
3730 regmap_write(rt5659->regmap, RT5659_RESET, 0);
3734 static int rt5659_suspend(struct snd_soc_component *component)
3736 struct rt5659_priv *rt5659 = snd_soc_component_get_drvdata(component);
3738 regcache_cache_only(rt5659->regmap, true);
3739 regcache_mark_dirty(rt5659->regmap);
3743 static int rt5659_resume(struct snd_soc_component *component)
3745 struct rt5659_priv *rt5659 = snd_soc_component_get_drvdata(component);
3747 regcache_cache_only(rt5659->regmap, false);
3748 regcache_sync(rt5659->regmap);
3753 #define rt5659_suspend NULL
3754 #define rt5659_resume NULL
3757 #define RT5659_STEREO_RATES SNDRV_PCM_RATE_8000_192000
3758 #define RT5659_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
3759 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8)
3761 static const struct snd_soc_dai_ops rt5659_aif_dai_ops = {
3762 .hw_params = rt5659_hw_params,
3763 .set_fmt = rt5659_set_dai_fmt,
3764 .set_tdm_slot = rt5659_set_tdm_slot,
3765 .set_bclk_ratio = rt5659_set_bclk_ratio,
3768 static struct snd_soc_dai_driver rt5659_dai[] = {
3770 .name = "rt5659-aif1",
3773 .stream_name = "AIF1 Playback",
3776 .rates = RT5659_STEREO_RATES,
3777 .formats = RT5659_FORMATS,
3780 .stream_name = "AIF1 Capture",
3783 .rates = RT5659_STEREO_RATES,
3784 .formats = RT5659_FORMATS,
3786 .ops = &rt5659_aif_dai_ops,
3789 .name = "rt5659-aif2",
3792 .stream_name = "AIF2 Playback",
3795 .rates = RT5659_STEREO_RATES,
3796 .formats = RT5659_FORMATS,
3799 .stream_name = "AIF2 Capture",
3802 .rates = RT5659_STEREO_RATES,
3803 .formats = RT5659_FORMATS,
3805 .ops = &rt5659_aif_dai_ops,
3808 .name = "rt5659-aif3",
3811 .stream_name = "AIF3 Playback",
3814 .rates = RT5659_STEREO_RATES,
3815 .formats = RT5659_FORMATS,
3818 .stream_name = "AIF3 Capture",
3821 .rates = RT5659_STEREO_RATES,
3822 .formats = RT5659_FORMATS,
3824 .ops = &rt5659_aif_dai_ops,
3828 static const struct snd_soc_component_driver soc_component_dev_rt5659 = {
3829 .probe = rt5659_probe,
3830 .remove = rt5659_remove,
3831 .suspend = rt5659_suspend,
3832 .resume = rt5659_resume,
3833 .set_bias_level = rt5659_set_bias_level,
3834 .controls = rt5659_snd_controls,
3835 .num_controls = ARRAY_SIZE(rt5659_snd_controls),
3836 .dapm_widgets = rt5659_dapm_widgets,
3837 .num_dapm_widgets = ARRAY_SIZE(rt5659_dapm_widgets),
3838 .dapm_routes = rt5659_dapm_routes,
3839 .num_dapm_routes = ARRAY_SIZE(rt5659_dapm_routes),
3840 .set_sysclk = rt5659_set_component_sysclk,
3841 .set_pll = rt5659_set_component_pll,
3842 .use_pmdown_time = 1,
3844 .non_legacy_dai_naming = 1,
3848 static const struct regmap_config rt5659_regmap = {
3851 .max_register = 0x0400,
3852 .volatile_reg = rt5659_volatile_register,
3853 .readable_reg = rt5659_readable_register,
3854 .cache_type = REGCACHE_RBTREE,
3855 .reg_defaults = rt5659_reg,
3856 .num_reg_defaults = ARRAY_SIZE(rt5659_reg),
3859 static const struct i2c_device_id rt5659_i2c_id[] = {
3864 MODULE_DEVICE_TABLE(i2c, rt5659_i2c_id);
3866 static int rt5659_parse_dt(struct rt5659_priv *rt5659, struct device *dev)
3868 rt5659->pdata.in1_diff = device_property_read_bool(dev,
3869 "realtek,in1-differential");
3870 rt5659->pdata.in3_diff = device_property_read_bool(dev,
3871 "realtek,in3-differential");
3872 rt5659->pdata.in4_diff = device_property_read_bool(dev,
3873 "realtek,in4-differential");
3876 device_property_read_u32(dev, "realtek,dmic1-data-pin",
3877 &rt5659->pdata.dmic1_data_pin);
3878 device_property_read_u32(dev, "realtek,dmic2-data-pin",
3879 &rt5659->pdata.dmic2_data_pin);
3880 device_property_read_u32(dev, "realtek,jd-src",
3881 &rt5659->pdata.jd_src);
3886 static void rt5659_calibrate(struct rt5659_priv *rt5659)
3890 /* Calibrate HPO Start */
3891 /* Fine tune HP Performance */
3892 regmap_write(rt5659->regmap, RT5659_BIAS_CUR_CTRL_8, 0xa502);
3893 regmap_write(rt5659->regmap, RT5659_CHOP_DAC, 0x3030);
3895 regmap_write(rt5659->regmap, RT5659_PRE_DIV_1, 0xef00);
3896 regmap_write(rt5659->regmap, RT5659_PRE_DIV_2, 0xeffc);
3897 regmap_write(rt5659->regmap, RT5659_MICBIAS_2, 0x0280);
3898 regmap_write(rt5659->regmap, RT5659_DIG_MISC, 0x0001);
3899 regmap_write(rt5659->regmap, RT5659_GLB_CLK, 0x8000);
3901 regmap_write(rt5659->regmap, RT5659_PWR_ANLG_1, 0xaa7e);
3903 regmap_write(rt5659->regmap, RT5659_PWR_ANLG_1, 0xfe7e);
3905 regmap_write(rt5659->regmap, RT5659_PWR_ANLG_3, 0x0004);
3906 regmap_write(rt5659->regmap, RT5659_PWR_DIG_2, 0x0400);
3908 regmap_write(rt5659->regmap, RT5659_PWR_DIG_1, 0x0080);
3909 usleep_range(10000, 10005);
3910 regmap_write(rt5659->regmap, RT5659_DEPOP_1, 0x0009);
3912 regmap_write(rt5659->regmap, RT5659_PWR_DIG_1, 0x0f80);
3914 regmap_write(rt5659->regmap, RT5659_HP_CHARGE_PUMP_1, 0x0e16);
3917 /* Enalbe K ADC Power And Clock */
3918 regmap_write(rt5659->regmap, RT5659_CAL_REC, 0x0505);
3920 regmap_write(rt5659->regmap, RT5659_PWR_ANLG_3, 0x0184);
3921 regmap_write(rt5659->regmap, RT5659_CALIB_ADC_CTRL, 0x3c05);
3922 regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_2, 0x20c1);
3925 regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_2, 0x2cc1);
3926 regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_1, 0x5100);
3927 regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_7, 0x0014);
3928 regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_1, 0xd100);
3931 /* Manual K ADC Offset */
3932 regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_2, 0x2cc1);
3933 regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_1, 0x4900);
3934 regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_7, 0x0016);
3935 regmap_update_bits(rt5659->regmap, RT5659_HP_CALIB_CTRL_1,
3940 regmap_read(rt5659->regmap, RT5659_HP_CALIB_CTRL_1, &value);
3942 usleep_range(10000, 10005);
3947 dev_err(rt5659->component->dev,
3948 "HP Calibration 1 Failure\n");
3955 /* Manual K Internal Path Offset */
3956 regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_2, 0x2cc1);
3957 regmap_write(rt5659->regmap, RT5659_HP_VOL, 0x0000);
3958 regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_1, 0x4500);
3959 regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_7, 0x001f);
3960 regmap_update_bits(rt5659->regmap, RT5659_HP_CALIB_CTRL_1,
3965 regmap_read(rt5659->regmap, RT5659_HP_CALIB_CTRL_1, &value);
3967 usleep_range(10000, 10005);
3972 dev_err(rt5659->component->dev,
3973 "HP Calibration 2 Failure\n");
3980 regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_7, 0x0000);
3981 regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_2, 0x20c0);
3982 /* Calibrate HPO End */
3984 /* Calibrate SPO Start */
3985 regmap_write(rt5659->regmap, RT5659_CLASSD_0, 0x2021);
3986 regmap_write(rt5659->regmap, RT5659_CLASSD_CTRL_1, 0x0260);
3987 regmap_write(rt5659->regmap, RT5659_PWR_MIXER, 0x3000);
3988 regmap_write(rt5659->regmap, RT5659_PWR_VOL, 0xc000);
3989 regmap_write(rt5659->regmap, RT5659_A_DAC_MUX, 0x000c);
3990 regmap_write(rt5659->regmap, RT5659_DIG_MISC, 0x8000);
3991 regmap_write(rt5659->regmap, RT5659_SPO_VOL, 0x0808);
3992 regmap_write(rt5659->regmap, RT5659_SPK_L_MIXER, 0x001e);
3993 regmap_write(rt5659->regmap, RT5659_SPK_R_MIXER, 0x001e);
3994 regmap_write(rt5659->regmap, RT5659_CLASSD_1, 0x0803);
3995 regmap_write(rt5659->regmap, RT5659_CLASSD_2, 0x0554);
3996 regmap_write(rt5659->regmap, RT5659_SPO_AMP_GAIN, 0x1103);
3998 /* Enalbe K ADC Power And Clock */
3999 regmap_write(rt5659->regmap, RT5659_CAL_REC, 0x0909);
4000 regmap_update_bits(rt5659->regmap, RT5659_HP_CALIB_CTRL_2, 0x0001,
4003 /* Start Calibration */
4004 regmap_write(rt5659->regmap, RT5659_SPK_DC_CAILB_CTRL_3, 0x0000);
4005 regmap_write(rt5659->regmap, RT5659_CLASSD_0, 0x0021);
4006 regmap_write(rt5659->regmap, RT5659_SPK_DC_CAILB_CTRL_1, 0x3e80);
4007 regmap_update_bits(rt5659->regmap, RT5659_SPK_DC_CAILB_CTRL_1,
4012 regmap_read(rt5659->regmap,
4013 RT5659_SPK_DC_CAILB_CTRL_1, &value);
4015 usleep_range(10000, 10005);
4020 dev_err(rt5659->component->dev,
4021 "SPK Calibration Failure\n");
4027 /* Calibrate SPO End */
4029 /* Calibrate MONO Start */
4030 regmap_write(rt5659->regmap, RT5659_DIG_MISC, 0x0000);
4031 regmap_write(rt5659->regmap, RT5659_MONOMIX_IN_GAIN, 0x021f);
4032 regmap_write(rt5659->regmap, RT5659_MONO_OUT, 0x480a);
4033 /* MONO NG2 GAIN 5dB */
4034 regmap_write(rt5659->regmap, RT5659_MONO_GAIN, 0x0003);
4035 regmap_write(rt5659->regmap, RT5659_MONO_NG2_CTRL_5, 0x0009);
4037 /* Start Calibration */
4038 regmap_write(rt5659->regmap, RT5659_SPK_DC_CAILB_CTRL_3, 0x000f);
4039 regmap_write(rt5659->regmap, RT5659_MONO_AMP_CALIB_CTRL_1, 0x1e00);
4040 regmap_update_bits(rt5659->regmap, RT5659_MONO_AMP_CALIB_CTRL_1,
4045 regmap_read(rt5659->regmap, RT5659_MONO_AMP_CALIB_CTRL_1,
4048 usleep_range(10000, 10005);
4053 dev_err(rt5659->component->dev,
4054 "Mono Calibration Failure\n");
4061 regmap_write(rt5659->regmap, RT5659_SPK_DC_CAILB_CTRL_3, 0x0003);
4062 /* Calibrate MONO End */
4065 regmap_write(rt5659->regmap, RT5659_CAL_REC, 0x0808);
4066 regmap_write(rt5659->regmap, RT5659_PWR_ANLG_3, 0x0000);
4067 regmap_write(rt5659->regmap, RT5659_CALIB_ADC_CTRL, 0x2005);
4068 regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_2, 0x20c0);
4069 regmap_write(rt5659->regmap, RT5659_DEPOP_1, 0x0000);
4070 regmap_write(rt5659->regmap, RT5659_CLASSD_1, 0x0011);
4071 regmap_write(rt5659->regmap, RT5659_CLASSD_2, 0x0150);
4072 regmap_write(rt5659->regmap, RT5659_PWR_ANLG_1, 0xfe3e);
4073 regmap_write(rt5659->regmap, RT5659_MONO_OUT, 0xc80a);
4074 regmap_write(rt5659->regmap, RT5659_MONO_AMP_CALIB_CTRL_1, 0x1e04);
4075 regmap_write(rt5659->regmap, RT5659_PWR_MIXER, 0x0000);
4076 regmap_write(rt5659->regmap, RT5659_PWR_VOL, 0x0000);
4077 regmap_write(rt5659->regmap, RT5659_PWR_DIG_1, 0x0000);
4078 regmap_write(rt5659->regmap, RT5659_PWR_DIG_2, 0x0000);
4079 regmap_write(rt5659->regmap, RT5659_PWR_ANLG_1, 0x003e);
4080 regmap_write(rt5659->regmap, RT5659_CLASSD_CTRL_1, 0x0060);
4081 regmap_write(rt5659->regmap, RT5659_CLASSD_0, 0x2021);
4082 regmap_write(rt5659->regmap, RT5659_GLB_CLK, 0x0000);
4083 regmap_write(rt5659->regmap, RT5659_MICBIAS_2, 0x0080);
4084 regmap_write(rt5659->regmap, RT5659_HP_VOL, 0x8080);
4085 regmap_write(rt5659->regmap, RT5659_HP_CHARGE_PUMP_1, 0x0c16);
4088 static void rt5659_intel_hd_header_probe_setup(struct rt5659_priv *rt5659)
4092 regmap_read(rt5659->regmap, RT5659_GPIO_STA, &value);
4093 if (!(value & 0x8)) {
4094 rt5659->hda_hp_plugged = true;
4095 regmap_update_bits(rt5659->regmap, RT5659_IRQ_CTRL_1,
4098 regmap_update_bits(rt5659->regmap, RT5659_IRQ_CTRL_1,
4102 regmap_update_bits(rt5659->regmap, RT5659_PWR_ANLG_1,
4103 RT5659_PWR_VREF2 | RT5659_PWR_MB,
4104 RT5659_PWR_VREF2 | RT5659_PWR_MB);
4106 regmap_update_bits(rt5659->regmap, RT5659_PWR_ANLG_1,
4107 RT5659_PWR_FV2, RT5659_PWR_FV2);
4109 regmap_update_bits(rt5659->regmap, RT5659_PWR_ANLG_3, RT5659_PWR_LDO2,
4111 regmap_update_bits(rt5659->regmap, RT5659_PWR_ANLG_2, RT5659_PWR_MB1,
4113 regmap_update_bits(rt5659->regmap, RT5659_PWR_VOL, RT5659_PWR_MIC_DET,
4114 RT5659_PWR_MIC_DET);
4117 regmap_update_bits(rt5659->regmap, RT5659_4BTN_IL_CMD_2,
4118 RT5659_4BTN_IL_MASK, RT5659_4BTN_IL_EN);
4119 regmap_read(rt5659->regmap, RT5659_4BTN_IL_CMD_1, &value);
4120 regmap_write(rt5659->regmap, RT5659_4BTN_IL_CMD_1, value);
4121 regmap_read(rt5659->regmap, RT5659_4BTN_IL_CMD_1, &value);
4123 if (value & 0x2000) {
4124 rt5659->hda_mic_plugged = true;
4125 regmap_update_bits(rt5659->regmap, RT5659_IRQ_CTRL_2,
4128 regmap_update_bits(rt5659->regmap, RT5659_IRQ_CTRL_2,
4132 regmap_update_bits(rt5659->regmap, RT5659_IRQ_CTRL_2,
4133 RT5659_IL_IRQ_MASK, RT5659_IL_IRQ_EN);
4136 static int rt5659_i2c_probe(struct i2c_client *i2c,
4137 const struct i2c_device_id *id)
4139 struct rt5659_platform_data *pdata = dev_get_platdata(&i2c->dev);
4140 struct rt5659_priv *rt5659;
4144 rt5659 = devm_kzalloc(&i2c->dev, sizeof(struct rt5659_priv),
4150 i2c_set_clientdata(i2c, rt5659);
4153 rt5659->pdata = *pdata;
4155 rt5659_parse_dt(rt5659, &i2c->dev);
4157 rt5659->gpiod_ldo1_en = devm_gpiod_get_optional(&i2c->dev, "ldo1-en",
4159 if (IS_ERR(rt5659->gpiod_ldo1_en))
4160 dev_warn(&i2c->dev, "Request ldo1-en GPIO failed\n");
4162 rt5659->gpiod_reset = devm_gpiod_get_optional(&i2c->dev, "reset",
4165 /* Sleep for 300 ms miniumum */
4168 rt5659->regmap = devm_regmap_init_i2c(i2c, &rt5659_regmap);
4169 if (IS_ERR(rt5659->regmap)) {
4170 ret = PTR_ERR(rt5659->regmap);
4171 dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
4176 regmap_read(rt5659->regmap, RT5659_DEVICE_ID, &val);
4177 if (val != DEVICE_ID) {
4179 "Device with ID register %x is not rt5659\n", val);
4183 regmap_write(rt5659->regmap, RT5659_RESET, 0);
4185 /* Check if MCLK provided */
4186 rt5659->mclk = devm_clk_get(&i2c->dev, "mclk");
4187 if (IS_ERR(rt5659->mclk)) {
4188 if (PTR_ERR(rt5659->mclk) != -ENOENT)
4189 return PTR_ERR(rt5659->mclk);
4190 /* Otherwise mark the mclk pointer to NULL */
4191 rt5659->mclk = NULL;
4194 rt5659_calibrate(rt5659);
4196 /* line in diff mode*/
4197 if (rt5659->pdata.in1_diff)
4198 regmap_update_bits(rt5659->regmap, RT5659_IN1_IN2,
4199 RT5659_IN1_DF_MASK, RT5659_IN1_DF_MASK);
4200 if (rt5659->pdata.in3_diff)
4201 regmap_update_bits(rt5659->regmap, RT5659_IN3_IN4,
4202 RT5659_IN3_DF_MASK, RT5659_IN3_DF_MASK);
4203 if (rt5659->pdata.in4_diff)
4204 regmap_update_bits(rt5659->regmap, RT5659_IN3_IN4,
4205 RT5659_IN4_DF_MASK, RT5659_IN4_DF_MASK);
4208 if (rt5659->pdata.dmic1_data_pin != RT5659_DMIC1_NULL ||
4209 rt5659->pdata.dmic2_data_pin != RT5659_DMIC2_NULL) {
4210 regmap_update_bits(rt5659->regmap, RT5659_GPIO_CTRL_1,
4211 RT5659_GP2_PIN_MASK, RT5659_GP2_PIN_DMIC1_SCL);
4213 switch (rt5659->pdata.dmic1_data_pin) {
4214 case RT5659_DMIC1_DATA_IN2N:
4215 regmap_update_bits(rt5659->regmap, RT5659_DMIC_CTRL_1,
4216 RT5659_DMIC_1_DP_MASK, RT5659_DMIC_1_DP_IN2N);
4219 case RT5659_DMIC1_DATA_GPIO5:
4220 regmap_update_bits(rt5659->regmap,
4222 RT5659_I2S2_PIN_MASK,
4223 RT5659_I2S2_PIN_GPIO);
4224 regmap_update_bits(rt5659->regmap, RT5659_DMIC_CTRL_1,
4225 RT5659_DMIC_1_DP_MASK, RT5659_DMIC_1_DP_GPIO5);
4226 regmap_update_bits(rt5659->regmap, RT5659_GPIO_CTRL_1,
4227 RT5659_GP5_PIN_MASK, RT5659_GP5_PIN_DMIC1_SDA);
4230 case RT5659_DMIC1_DATA_GPIO9:
4231 regmap_update_bits(rt5659->regmap, RT5659_DMIC_CTRL_1,
4232 RT5659_DMIC_1_DP_MASK, RT5659_DMIC_1_DP_GPIO9);
4233 regmap_update_bits(rt5659->regmap, RT5659_GPIO_CTRL_1,
4234 RT5659_GP9_PIN_MASK, RT5659_GP9_PIN_DMIC1_SDA);
4237 case RT5659_DMIC1_DATA_GPIO11:
4238 regmap_update_bits(rt5659->regmap, RT5659_DMIC_CTRL_1,
4239 RT5659_DMIC_1_DP_MASK, RT5659_DMIC_1_DP_GPIO11);
4240 regmap_update_bits(rt5659->regmap, RT5659_GPIO_CTRL_1,
4241 RT5659_GP11_PIN_MASK,
4242 RT5659_GP11_PIN_DMIC1_SDA);
4246 dev_dbg(&i2c->dev, "no DMIC1\n");
4250 switch (rt5659->pdata.dmic2_data_pin) {
4251 case RT5659_DMIC2_DATA_IN2P:
4252 regmap_update_bits(rt5659->regmap,
4254 RT5659_DMIC_2_DP_MASK,
4255 RT5659_DMIC_2_DP_IN2P);
4258 case RT5659_DMIC2_DATA_GPIO6:
4259 regmap_update_bits(rt5659->regmap,
4261 RT5659_DMIC_2_DP_MASK,
4262 RT5659_DMIC_2_DP_GPIO6);
4263 regmap_update_bits(rt5659->regmap,
4265 RT5659_GP6_PIN_MASK,
4266 RT5659_GP6_PIN_DMIC2_SDA);
4269 case RT5659_DMIC2_DATA_GPIO10:
4270 regmap_update_bits(rt5659->regmap,
4272 RT5659_DMIC_2_DP_MASK,
4273 RT5659_DMIC_2_DP_GPIO10);
4274 regmap_update_bits(rt5659->regmap,
4276 RT5659_GP10_PIN_MASK,
4277 RT5659_GP10_PIN_DMIC2_SDA);
4280 case RT5659_DMIC2_DATA_GPIO12:
4281 regmap_update_bits(rt5659->regmap,
4283 RT5659_DMIC_2_DP_MASK,
4284 RT5659_DMIC_2_DP_GPIO12);
4285 regmap_update_bits(rt5659->regmap,
4287 RT5659_GP12_PIN_MASK,
4288 RT5659_GP12_PIN_DMIC2_SDA);
4292 dev_dbg(&i2c->dev, "no DMIC2\n");
4297 regmap_update_bits(rt5659->regmap, RT5659_GPIO_CTRL_1,
4298 RT5659_GP2_PIN_MASK | RT5659_GP5_PIN_MASK |
4299 RT5659_GP9_PIN_MASK | RT5659_GP11_PIN_MASK |
4300 RT5659_GP6_PIN_MASK | RT5659_GP10_PIN_MASK |
4301 RT5659_GP12_PIN_MASK,
4302 RT5659_GP2_PIN_GPIO2 | RT5659_GP5_PIN_GPIO5 |
4303 RT5659_GP9_PIN_GPIO9 | RT5659_GP11_PIN_GPIO11 |
4304 RT5659_GP6_PIN_GPIO6 | RT5659_GP10_PIN_GPIO10 |
4305 RT5659_GP12_PIN_GPIO12);
4306 regmap_update_bits(rt5659->regmap, RT5659_DMIC_CTRL_1,
4307 RT5659_DMIC_1_DP_MASK | RT5659_DMIC_2_DP_MASK,
4308 RT5659_DMIC_1_DP_IN2N | RT5659_DMIC_2_DP_IN2P);
4311 switch (rt5659->pdata.jd_src) {
4313 regmap_write(rt5659->regmap, RT5659_EJD_CTRL_1, 0xa880);
4314 regmap_write(rt5659->regmap, RT5659_RC_CLK_CTRL, 0x9000);
4315 regmap_write(rt5659->regmap, RT5659_GPIO_CTRL_1, 0xc800);
4316 regmap_update_bits(rt5659->regmap, RT5659_PWR_ANLG_1,
4317 RT5659_PWR_MB, RT5659_PWR_MB);
4318 regmap_write(rt5659->regmap, RT5659_PWR_ANLG_2, 0x0001);
4319 regmap_write(rt5659->regmap, RT5659_IRQ_CTRL_2, 0x0040);
4320 INIT_DELAYED_WORK(&rt5659->jack_detect_work,
4321 rt5659_jack_detect_work);
4323 case RT5659_JD_HDA_HEADER:
4324 regmap_write(rt5659->regmap, RT5659_GPIO_CTRL_3, 0x8000);
4325 regmap_write(rt5659->regmap, RT5659_RC_CLK_CTRL, 0x0900);
4326 regmap_write(rt5659->regmap, RT5659_EJD_CTRL_1, 0x70c0);
4327 regmap_write(rt5659->regmap, RT5659_JD_CTRL_1, 0x2000);
4328 regmap_write(rt5659->regmap, RT5659_IRQ_CTRL_1, 0x0040);
4329 INIT_DELAYED_WORK(&rt5659->jack_detect_work,
4330 rt5659_jack_detect_intel_hd_header);
4331 rt5659_intel_hd_header_probe_setup(rt5659);
4338 ret = devm_request_threaded_irq(&i2c->dev, i2c->irq, NULL,
4339 rt5659_irq, IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING
4340 | IRQF_ONESHOT, "rt5659", rt5659);
4342 dev_err(&i2c->dev, "Failed to reguest IRQ: %d\n", ret);
4344 /* Enable IRQ output for GPIO1 pin any way */
4345 regmap_update_bits(rt5659->regmap, RT5659_GPIO_CTRL_1,
4346 RT5659_GP1_PIN_MASK, RT5659_GP1_PIN_IRQ);
4349 return devm_snd_soc_register_component(&i2c->dev,
4350 &soc_component_dev_rt5659,
4351 rt5659_dai, ARRAY_SIZE(rt5659_dai));
4354 static void rt5659_i2c_shutdown(struct i2c_client *client)
4356 struct rt5659_priv *rt5659 = i2c_get_clientdata(client);
4358 regmap_write(rt5659->regmap, RT5659_RESET, 0);
4362 static const struct of_device_id rt5659_of_match[] = {
4363 { .compatible = "realtek,rt5658", },
4364 { .compatible = "realtek,rt5659", },
4367 MODULE_DEVICE_TABLE(of, rt5659_of_match);
4371 static const struct acpi_device_id rt5659_acpi_match[] = {
4376 MODULE_DEVICE_TABLE(acpi, rt5659_acpi_match);
4379 static struct i2c_driver rt5659_i2c_driver = {
4382 .of_match_table = of_match_ptr(rt5659_of_match),
4383 .acpi_match_table = ACPI_PTR(rt5659_acpi_match),
4385 .probe = rt5659_i2c_probe,
4386 .shutdown = rt5659_i2c_shutdown,
4387 .id_table = rt5659_i2c_id,
4389 module_i2c_driver(rt5659_i2c_driver);
4391 MODULE_DESCRIPTION("ASoC RT5659 driver");
4392 MODULE_AUTHOR("Bard Liao <bardliao@realtek.com>");
4393 MODULE_LICENSE("GPL v2");
projects / releases.git / blob