sound/soc/codecs/rt5645.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * rt5645.c  --  RT5645 ALSA SoC audio codec driver
   4  *
   5  * Copyright 2013 Realtek Semiconductor Corp.
   6  * Author: Bard Liao <bardliao@realtek.com>
   7  */
   8
   9 #include <linux/module.h>
  10 #include <linux/moduleparam.h>
  11 #include <linux/init.h>
  12 #include <linux/delay.h>
  13 #include <linux/pm.h>
  14 #include <linux/i2c.h>
  15 #include <linux/platform_device.h>
  16 #include <linux/spi/spi.h>
  17 #include <linux/gpio/consumer.h>
  18 #include <linux/acpi.h>
  19 #include <linux/dmi.h>
  20 #include <linux/regulator/consumer.h>
  21 #include <sound/core.h>
  22 #include <sound/pcm.h>
  23 #include <sound/pcm_params.h>
  24 #include <sound/jack.h>
  25 #include <sound/soc.h>
  26 #include <sound/soc-dapm.h>
  27 #include <sound/initval.h>
  28 #include <sound/tlv.h>
  29
  30 #include "rl6231.h"
  31 #include "rt5645.h"
  32
  33 #define QUIRK_INV_JD1_1(q)      ((q) & 1)
  34 #define QUIRK_LEVEL_IRQ(q)      (((q) >> 1) & 1)
  35 #define QUIRK_IN2_DIFF(q)       (((q) >> 2) & 1)
  36 #define QUIRK_INV_HP_POL(q)     (((q) >> 3) & 1)
  37 #define QUIRK_JD_MODE(q)        (((q) >> 4) & 7)
  38 #define QUIRK_DMIC1_DATA_PIN(q) (((q) >> 8) & 3)
  39 #define QUIRK_DMIC2_DATA_PIN(q) (((q) >> 12) & 3)
  40
  41 static unsigned int quirk = -1;
  42 module_param(quirk, uint, 0444);
  43 MODULE_PARM_DESC(quirk, "RT5645 pdata quirk override");
  44
  45 static const struct acpi_gpio_mapping *cht_rt5645_gpios;
  46
  47 #define RT5645_DEVICE_ID 0x6308
  48 #define RT5650_DEVICE_ID 0x6419
  49
  50 #define RT5645_PR_RANGE_BASE (0xff + 1)
  51 #define RT5645_PR_SPACING 0x100
  52
  53 #define RT5645_PR_BASE (RT5645_PR_RANGE_BASE + (0 * RT5645_PR_SPACING))
  54
  55 #define RT5645_HWEQ_NUM 57
  56
  57 #define TIME_TO_POWER_MS 400
  58
  59 static const struct regmap_range_cfg rt5645_ranges[] = {
  60         {
  61                 .name = "PR",
  62                 .range_min = RT5645_PR_BASE,
  63                 .range_max = RT5645_PR_BASE + 0xf8,
  64                 .selector_reg = RT5645_PRIV_INDEX,
  65                 .selector_mask = 0xff,
  66                 .selector_shift = 0x0,
  67                 .window_start = RT5645_PRIV_DATA,
  68                 .window_len = 0x1,
  69         },
  70 };
  71
  72 static const struct reg_sequence init_list[] = {
  73         {RT5645_PR_BASE + 0x3d, 0x3600},
  74         {RT5645_PR_BASE + 0x1c, 0xfd70},
  75         {RT5645_PR_BASE + 0x20, 0x611f},
  76         {RT5645_PR_BASE + 0x21, 0x4040},
  77         {RT5645_PR_BASE + 0x23, 0x0004},
  78         {RT5645_ASRC_4, 0x0120},
  79 };
  80
  81 static const struct reg_sequence rt5650_init_list[] = {
  82         {0xf6,  0x0100},
  83         {RT5645_PWR_ANLG1, 0x02},
  84 };
  85
  86 static const struct reg_default rt5645_reg[] = {
  87         { 0x00, 0x0000 },
  88         { 0x01, 0xc8c8 },
  89         { 0x02, 0xc8c8 },
  90         { 0x03, 0xc8c8 },
  91         { 0x0a, 0x0002 },
  92         { 0x0b, 0x2827 },
  93         { 0x0c, 0xe000 },
  94         { 0x0d, 0x0000 },
  95         { 0x0e, 0x0000 },
  96         { 0x0f, 0x0808 },
  97         { 0x14, 0x3333 },
  98         { 0x16, 0x4b00 },
  99         { 0x18, 0x018b },
 100         { 0x19, 0xafaf },
 101         { 0x1a, 0xafaf },
 102         { 0x1b, 0x0001 },
 103         { 0x1c, 0x2f2f },
 104         { 0x1d, 0x2f2f },
 105         { 0x1e, 0x0000 },
 106         { 0x20, 0x0000 },
 107         { 0x27, 0x7060 },
 108         { 0x28, 0x7070 },
 109         { 0x29, 0x8080 },
 110         { 0x2a, 0x5656 },
 111         { 0x2b, 0x5454 },
 112         { 0x2c, 0xaaa0 },
 113         { 0x2d, 0x0000 },
 114         { 0x2f, 0x1002 },
 115         { 0x31, 0x5000 },
 116         { 0x32, 0x0000 },
 117         { 0x33, 0x0000 },
 118         { 0x34, 0x0000 },
 119         { 0x35, 0x0000 },
 120         { 0x3b, 0x0000 },
 121         { 0x3c, 0x007f },
 122         { 0x3d, 0x0000 },
 123         { 0x3e, 0x007f },
 124         { 0x3f, 0x0000 },
 125         { 0x40, 0x001f },
 126         { 0x41, 0x0000 },
 127         { 0x42, 0x001f },
 128         { 0x45, 0x6000 },
 129         { 0x46, 0x003e },
 130         { 0x47, 0x003e },
 131         { 0x48, 0xf807 },
 132         { 0x4a, 0x0004 },
 133         { 0x4d, 0x0000 },
 134         { 0x4e, 0x0000 },
 135         { 0x4f, 0x01ff },
 136         { 0x50, 0x0000 },
 137         { 0x51, 0x0000 },
 138         { 0x52, 0x01ff },
 139         { 0x53, 0xf000 },
 140         { 0x56, 0x0111 },
 141         { 0x57, 0x0064 },
 142         { 0x58, 0xef0e },
 143         { 0x59, 0xf0f0 },
 144         { 0x5a, 0xef0e },
 145         { 0x5b, 0xf0f0 },
 146         { 0x5c, 0xef0e },
 147         { 0x5d, 0xf0f0 },
 148         { 0x5e, 0xf000 },
 149         { 0x5f, 0x0000 },
 150         { 0x61, 0x0300 },
 151         { 0x62, 0x0000 },
 152         { 0x63, 0x00c2 },
 153         { 0x64, 0x0000 },
 154         { 0x65, 0x0000 },
 155         { 0x66, 0x0000 },
 156         { 0x6a, 0x0000 },
 157         { 0x6c, 0x0aaa },
 158         { 0x70, 0x8000 },
 159         { 0x71, 0x8000 },
 160         { 0x72, 0x8000 },
 161         { 0x73, 0x7770 },
 162         { 0x74, 0x3e00 },
 163         { 0x75, 0x2409 },
 164         { 0x76, 0x000a },
 165         { 0x77, 0x0c00 },
 166         { 0x78, 0x0000 },
 167         { 0x79, 0x0123 },
 168         { 0x80, 0x0000 },
 169         { 0x81, 0x0000 },
 170         { 0x82, 0x0000 },
 171         { 0x83, 0x0000 },
 172         { 0x84, 0x0000 },
 173         { 0x85, 0x0000 },
 174         { 0x8a, 0x0120 },
 175         { 0x8e, 0x0004 },
 176         { 0x8f, 0x1100 },
 177         { 0x90, 0x0646 },
 178         { 0x91, 0x0c06 },
 179         { 0x93, 0x0000 },
 180         { 0x94, 0x0200 },
 181         { 0x95, 0x0000 },
 182         { 0x9a, 0x2184 },
 183         { 0x9b, 0x010a },
 184         { 0x9c, 0x0aea },
 185         { 0x9d, 0x000c },
 186         { 0x9e, 0x0400 },
 187         { 0xa0, 0xa0a8 },
 188         { 0xa1, 0x0059 },
 189         { 0xa2, 0x0001 },
 190         { 0xae, 0x6000 },
 191         { 0xaf, 0x0000 },
 192         { 0xb0, 0x6000 },
 193         { 0xb1, 0x0000 },
 194         { 0xb2, 0x0000 },
 195         { 0xb3, 0x001f },
 196         { 0xb4, 0x020c },
 197         { 0xb5, 0x1f00 },
 198         { 0xb6, 0x0000 },
 199         { 0xbb, 0x0000 },
 200         { 0xbc, 0x0000 },
 201         { 0xbd, 0x0000 },
 202         { 0xbe, 0x0000 },
 203         { 0xbf, 0x3100 },
 204         { 0xc0, 0x0000 },
 205         { 0xc1, 0x0000 },
 206         { 0xc2, 0x0000 },
 207         { 0xc3, 0x2000 },
 208         { 0xcd, 0x0000 },
 209         { 0xce, 0x0000 },
 210         { 0xcf, 0x1813 },
 211         { 0xd0, 0x0690 },
 212         { 0xd1, 0x1c17 },
 213         { 0xd3, 0xb320 },
 214         { 0xd4, 0x0000 },
 215         { 0xd6, 0x0400 },
 216         { 0xd9, 0x0809 },
 217         { 0xda, 0x0000 },
 218         { 0xdb, 0x0003 },
 219         { 0xdc, 0x0049 },
 220         { 0xdd, 0x001b },
 221         { 0xdf, 0x0008 },
 222         { 0xe0, 0x4000 },
 223         { 0xe6, 0x8000 },
 224         { 0xe7, 0x0200 },
 225         { 0xec, 0xb300 },
 226         { 0xed, 0x0000 },
 227         { 0xf0, 0x001f },
 228         { 0xf1, 0x020c },
 229         { 0xf2, 0x1f00 },
 230         { 0xf3, 0x0000 },
 231         { 0xf4, 0x4000 },
 232         { 0xf8, 0x0000 },
 233         { 0xf9, 0x0000 },
 234         { 0xfa, 0x2060 },
 235         { 0xfb, 0x4040 },
 236         { 0xfc, 0x0000 },
 237         { 0xfd, 0x0002 },
 238         { 0xfe, 0x10ec },
 239         { 0xff, 0x6308 },
 240 };
 241
 242 static const struct reg_default rt5650_reg[] = {
 243         { 0x00, 0x0000 },
 244         { 0x01, 0xc8c8 },
 245         { 0x02, 0xc8c8 },
 246         { 0x03, 0xc8c8 },
 247         { 0x0a, 0x0002 },
 248         { 0x0b, 0x2827 },
 249         { 0x0c, 0xe000 },
 250         { 0x0d, 0x0000 },
 251         { 0x0e, 0x0000 },
 252         { 0x0f, 0x0808 },
 253         { 0x14, 0x3333 },
 254         { 0x16, 0x4b00 },
 255         { 0x18, 0x018b },
 256         { 0x19, 0xafaf },
 257         { 0x1a, 0xafaf },
 258         { 0x1b, 0x0001 },
 259         { 0x1c, 0x2f2f },
 260         { 0x1d, 0x2f2f },
 261         { 0x1e, 0x0000 },
 262         { 0x20, 0x0000 },
 263         { 0x27, 0x7060 },
 264         { 0x28, 0x7070 },
 265         { 0x29, 0x8080 },
 266         { 0x2a, 0x5656 },
 267         { 0x2b, 0x5454 },
 268         { 0x2c, 0xaaa0 },
 269         { 0x2d, 0x0000 },
 270         { 0x2f, 0x5002 },
 271         { 0x31, 0x5000 },
 272         { 0x32, 0x0000 },
 273         { 0x33, 0x0000 },
 274         { 0x34, 0x0000 },
 275         { 0x35, 0x0000 },
 276         { 0x3b, 0x0000 },
 277         { 0x3c, 0x007f },
 278         { 0x3d, 0x0000 },
 279         { 0x3e, 0x007f },
 280         { 0x3f, 0x0000 },
 281         { 0x40, 0x001f },
 282         { 0x41, 0x0000 },
 283         { 0x42, 0x001f },
 284         { 0x45, 0x6000 },
 285         { 0x46, 0x003e },
 286         { 0x47, 0x003e },
 287         { 0x48, 0xf807 },
 288         { 0x4a, 0x0004 },
 289         { 0x4d, 0x0000 },
 290         { 0x4e, 0x0000 },
 291         { 0x4f, 0x01ff },
 292         { 0x50, 0x0000 },
 293         { 0x51, 0x0000 },
 294         { 0x52, 0x01ff },
 295         { 0x53, 0xf000 },
 296         { 0x56, 0x0111 },
 297         { 0x57, 0x0064 },
 298         { 0x58, 0xef0e },
 299         { 0x59, 0xf0f0 },
 300         { 0x5a, 0xef0e },
 301         { 0x5b, 0xf0f0 },
 302         { 0x5c, 0xef0e },
 303         { 0x5d, 0xf0f0 },
 304         { 0x5e, 0xf000 },
 305         { 0x5f, 0x0000 },
 306         { 0x61, 0x0300 },
 307         { 0x62, 0x0000 },
 308         { 0x63, 0x00c2 },
 309         { 0x64, 0x0000 },
 310         { 0x65, 0x0000 },
 311         { 0x66, 0x0000 },
 312         { 0x6a, 0x0000 },
 313         { 0x6c, 0x0aaa },
 314         { 0x70, 0x8000 },
 315         { 0x71, 0x8000 },
 316         { 0x72, 0x8000 },
 317         { 0x73, 0x7770 },
 318         { 0x74, 0x3e00 },
 319         { 0x75, 0x2409 },
 320         { 0x76, 0x000a },
 321         { 0x77, 0x0c00 },
 322         { 0x78, 0x0000 },
 323         { 0x79, 0x0123 },
 324         { 0x7a, 0x0123 },
 325         { 0x80, 0x0000 },
 326         { 0x81, 0x0000 },
 327         { 0x82, 0x0000 },
 328         { 0x83, 0x0000 },
 329         { 0x84, 0x0000 },
 330         { 0x85, 0x0000 },
 331         { 0x8a, 0x0120 },
 332         { 0x8e, 0x0004 },
 333         { 0x8f, 0x1100 },
 334         { 0x90, 0x0646 },
 335         { 0x91, 0x0c06 },
 336         { 0x93, 0x0000 },
 337         { 0x94, 0x0200 },
 338         { 0x95, 0x0000 },
 339         { 0x9a, 0x2184 },
 340         { 0x9b, 0x010a },
 341         { 0x9c, 0x0aea },
 342         { 0x9d, 0x000c },
 343         { 0x9e, 0x0400 },
 344         { 0xa0, 0xa0a8 },
 345         { 0xa1, 0x0059 },
 346         { 0xa2, 0x0001 },
 347         { 0xae, 0x6000 },
 348         { 0xaf, 0x0000 },
 349         { 0xb0, 0x6000 },
 350         { 0xb1, 0x0000 },
 351         { 0xb2, 0x0000 },
 352         { 0xb3, 0x001f },
 353         { 0xb4, 0x020c },
 354         { 0xb5, 0x1f00 },
 355         { 0xb6, 0x0000 },
 356         { 0xbb, 0x0000 },
 357         { 0xbc, 0x0000 },
 358         { 0xbd, 0x0000 },
 359         { 0xbe, 0x0000 },
 360         { 0xbf, 0x3100 },
 361         { 0xc0, 0x0000 },
 362         { 0xc1, 0x0000 },
 363         { 0xc2, 0x0000 },
 364         { 0xc3, 0x2000 },
 365         { 0xcd, 0x0000 },
 366         { 0xce, 0x0000 },
 367         { 0xcf, 0x1813 },
 368         { 0xd0, 0x0690 },
 369         { 0xd1, 0x1c17 },
 370         { 0xd3, 0xb320 },
 371         { 0xd4, 0x0000 },
 372         { 0xd6, 0x0400 },
 373         { 0xd9, 0x0809 },
 374         { 0xda, 0x0000 },
 375         { 0xdb, 0x0003 },
 376         { 0xdc, 0x0049 },
 377         { 0xdd, 0x001b },
 378         { 0xdf, 0x0008 },
 379         { 0xe0, 0x4000 },
 380         { 0xe6, 0x8000 },
 381         { 0xe7, 0x0200 },
 382         { 0xec, 0xb300 },
 383         { 0xed, 0x0000 },
 384         { 0xf0, 0x001f },
 385         { 0xf1, 0x020c },
 386         { 0xf2, 0x1f00 },
 387         { 0xf3, 0x0000 },
 388         { 0xf4, 0x4000 },
 389         { 0xf8, 0x0000 },
 390         { 0xf9, 0x0000 },
 391         { 0xfa, 0x2060 },
 392         { 0xfb, 0x4040 },
 393         { 0xfc, 0x0000 },
 394         { 0xfd, 0x0002 },
 395         { 0xfe, 0x10ec },
 396         { 0xff, 0x6308 },
 397 };
 398
 399 struct rt5645_eq_param_s {
 400         unsigned short reg;
 401         unsigned short val;
 402 };
 403
 404 struct rt5645_eq_param_s_be16 {
 405         __be16 reg;
 406         __be16 val;
 407 };
 408
 409 static const char *const rt5645_supply_names[] = {
 410         "avdd",
 411         "cpvdd",
 412 };
 413
 414 struct rt5645_platform_data {
 415         /* IN2 can optionally be differential */
 416         bool in2_diff;
 417
 418         unsigned int dmic1_data_pin;
 419         /* 0 = IN2N; 1 = GPIO5; 2 = GPIO11 */
 420         unsigned int dmic2_data_pin;
 421         /* 0 = IN2P; 1 = GPIO6; 2 = GPIO10; 3 = GPIO12 */
 422
 423         unsigned int jd_mode;
 424         /* Use level triggered irq */
 425         bool level_trigger_irq;
 426         /* Invert JD1_1 status polarity */
 427         bool inv_jd1_1;
 428         /* Invert HP detect status polarity */
 429         bool inv_hp_pol;
 430
 431         /* Only 1 speaker connected */
 432         bool mono_speaker;
 433
 434         /* Value to assign to snd_soc_card.long_name */
 435         const char *long_name;
 436
 437         /* Some (package) variants have the headset-mic pin not-connected */
 438         bool no_headset_mic;
 439 };
 440
 441 struct rt5645_priv {
 442         struct snd_soc_component *component;
 443         struct rt5645_platform_data pdata;
 444         struct regmap *regmap;
 445         struct i2c_client *i2c;
 446         struct gpio_desc *gpiod_hp_det;
 447         struct gpio_desc *gpiod_cbj_sleeve;
 448         struct snd_soc_jack *hp_jack;
 449         struct snd_soc_jack *mic_jack;
 450         struct snd_soc_jack *btn_jack;
 451         struct delayed_work jack_detect_work, rcclock_work;
 452         struct regulator_bulk_data supplies[ARRAY_SIZE(rt5645_supply_names)];
 453         struct rt5645_eq_param_s *eq_param;
 454         struct timer_list btn_check_timer;
 455         struct mutex jd_mutex;
 456
 457         int codec_type;
 458         int sysclk;
 459         int sysclk_src;
 460         int lrck[RT5645_AIFS];
 461         int bclk[RT5645_AIFS];
 462         int master[RT5645_AIFS];
 463
 464         int pll_src;
 465         int pll_in;
 466         int pll_out;
 467
 468         int jack_type;
 469         bool en_button_func;
 470         int v_id;
 471 };
 472
 473 static int rt5645_reset(struct snd_soc_component *component)
 474 {
 475         return snd_soc_component_write(component, RT5645_RESET, 0);
 476 }
 477
 478 static bool rt5645_volatile_register(struct device *dev, unsigned int reg)
 479 {
 480         int i;
 481
 482         for (i = 0; i < ARRAY_SIZE(rt5645_ranges); i++) {
 483                 if (reg >= rt5645_ranges[i].range_min &&
 484                         reg <= rt5645_ranges[i].range_max) {
 485                         return true;
 486                 }
 487         }
 488
 489         switch (reg) {
 490         case RT5645_RESET:
 491         case RT5645_PRIV_INDEX:
 492         case RT5645_PRIV_DATA:
 493         case RT5645_IN1_CTRL1:
 494         case RT5645_IN1_CTRL2:
 495         case RT5645_IN1_CTRL3:
 496         case RT5645_A_JD_CTRL1:
 497         case RT5645_ADC_EQ_CTRL1:
 498         case RT5645_EQ_CTRL1:
 499         case RT5645_ALC_CTRL_1:
 500         case RT5645_IRQ_CTRL2:
 501         case RT5645_IRQ_CTRL3:
 502         case RT5645_INT_IRQ_ST:
 503         case RT5645_IL_CMD:
 504         case RT5650_4BTN_IL_CMD1:
 505         case RT5645_VENDOR_ID:
 506         case RT5645_VENDOR_ID1:
 507         case RT5645_VENDOR_ID2:
 508                 return true;
 509         default:
 510                 return false;
 511         }
 512 }
 513
 514 static bool rt5645_readable_register(struct device *dev, unsigned int reg)
 515 {
 516         int i;
 517
 518         for (i = 0; i < ARRAY_SIZE(rt5645_ranges); i++) {
 519                 if (reg >= rt5645_ranges[i].range_min &&
 520                         reg <= rt5645_ranges[i].range_max) {
 521                         return true;
 522                 }
 523         }
 524
 525         switch (reg) {
 526         case RT5645_RESET:
 527         case RT5645_SPK_VOL:
 528         case RT5645_HP_VOL:
 529         case RT5645_LOUT1:
 530         case RT5645_IN1_CTRL1:
 531         case RT5645_IN1_CTRL2:
 532         case RT5645_IN1_CTRL3:
 533         case RT5645_IN2_CTRL:
 534         case RT5645_INL1_INR1_VOL:
 535         case RT5645_SPK_FUNC_LIM:
 536         case RT5645_ADJ_HPF_CTRL:
 537         case RT5645_DAC1_DIG_VOL:
 538         case RT5645_DAC2_DIG_VOL:
 539         case RT5645_DAC_CTRL:
 540         case RT5645_STO1_ADC_DIG_VOL:
 541         case RT5645_MONO_ADC_DIG_VOL:
 542         case RT5645_ADC_BST_VOL1:
 543         case RT5645_ADC_BST_VOL2:
 544         case RT5645_STO1_ADC_MIXER:
 545         case RT5645_MONO_ADC_MIXER:
 546         case RT5645_AD_DA_MIXER:
 547         case RT5645_STO_DAC_MIXER:
 548         case RT5645_MONO_DAC_MIXER:
 549         case RT5645_DIG_MIXER:
 550         case RT5650_A_DAC_SOUR:
 551         case RT5645_DIG_INF1_DATA:
 552         case RT5645_PDM_OUT_CTRL:
 553         case RT5645_REC_L1_MIXER:
 554         case RT5645_REC_L2_MIXER:
 555         case RT5645_REC_R1_MIXER:
 556         case RT5645_REC_R2_MIXER:
 557         case RT5645_HPMIXL_CTRL:
 558         case RT5645_HPOMIXL_CTRL:
 559         case RT5645_HPMIXR_CTRL:
 560         case RT5645_HPOMIXR_CTRL:
 561         case RT5645_HPO_MIXER:
 562         case RT5645_SPK_L_MIXER:
 563         case RT5645_SPK_R_MIXER:
 564         case RT5645_SPO_MIXER:
 565         case RT5645_SPO_CLSD_RATIO:
 566         case RT5645_OUT_L1_MIXER:
 567         case RT5645_OUT_R1_MIXER:
 568         case RT5645_OUT_L_GAIN1:
 569         case RT5645_OUT_L_GAIN2:
 570         case RT5645_OUT_R_GAIN1:
 571         case RT5645_OUT_R_GAIN2:
 572         case RT5645_LOUT_MIXER:
 573         case RT5645_HAPTIC_CTRL1:
 574         case RT5645_HAPTIC_CTRL2:
 575         case RT5645_HAPTIC_CTRL3:
 576         case RT5645_HAPTIC_CTRL4:
 577         case RT5645_HAPTIC_CTRL5:
 578         case RT5645_HAPTIC_CTRL6:
 579         case RT5645_HAPTIC_CTRL7:
 580         case RT5645_HAPTIC_CTRL8:
 581         case RT5645_HAPTIC_CTRL9:
 582         case RT5645_HAPTIC_CTRL10:
 583         case RT5645_PWR_DIG1:
 584         case RT5645_PWR_DIG2:
 585         case RT5645_PWR_ANLG1:
 586         case RT5645_PWR_ANLG2:
 587         case RT5645_PWR_MIXER:
 588         case RT5645_PWR_VOL:
 589         case RT5645_PRIV_INDEX:
 590         case RT5645_PRIV_DATA:
 591         case RT5645_I2S1_SDP:
 592         case RT5645_I2S2_SDP:
 593         case RT5645_ADDA_CLK1:
 594         case RT5645_ADDA_CLK2:
 595         case RT5645_DMIC_CTRL1:
 596         case RT5645_DMIC_CTRL2:
 597         case RT5645_TDM_CTRL_1:
 598         case RT5645_TDM_CTRL_2:
 599         case RT5645_TDM_CTRL_3:
 600         case RT5650_TDM_CTRL_4:
 601         case RT5645_GLB_CLK:
 602         case RT5645_PLL_CTRL1:
 603         case RT5645_PLL_CTRL2:
 604         case RT5645_ASRC_1:
 605         case RT5645_ASRC_2:
 606         case RT5645_ASRC_3:
 607         case RT5645_ASRC_4:
 608         case RT5645_DEPOP_M1:
 609         case RT5645_DEPOP_M2:
 610         case RT5645_DEPOP_M3:
 611         case RT5645_CHARGE_PUMP:
 612         case RT5645_MICBIAS:
 613         case RT5645_A_JD_CTRL1:
 614         case RT5645_VAD_CTRL4:
 615         case RT5645_CLSD_OUT_CTRL:
 616         case RT5645_ADC_EQ_CTRL1:
 617         case RT5645_ADC_EQ_CTRL2:
 618         case RT5645_EQ_CTRL1:
 619         case RT5645_EQ_CTRL2:
 620         case RT5645_ALC_CTRL_1:
 621         case RT5645_ALC_CTRL_2:
 622         case RT5645_ALC_CTRL_3:
 623         case RT5645_ALC_CTRL_4:
 624         case RT5645_ALC_CTRL_5:
 625         case RT5645_JD_CTRL:
 626         case RT5645_IRQ_CTRL1:
 627         case RT5645_IRQ_CTRL2:
 628         case RT5645_IRQ_CTRL3:
 629         case RT5645_INT_IRQ_ST:
 630         case RT5645_GPIO_CTRL1:
 631         case RT5645_GPIO_CTRL2:
 632         case RT5645_GPIO_CTRL3:
 633         case RT5645_BASS_BACK:
 634         case RT5645_MP3_PLUS1:
 635         case RT5645_MP3_PLUS2:
 636         case RT5645_ADJ_HPF1:
 637         case RT5645_ADJ_HPF2:
 638         case RT5645_HP_CALIB_AMP_DET:
 639         case RT5645_SV_ZCD1:
 640         case RT5645_SV_ZCD2:
 641         case RT5645_IL_CMD:
 642         case RT5645_IL_CMD2:
 643         case RT5645_IL_CMD3:
 644         case RT5650_4BTN_IL_CMD1:
 645         case RT5650_4BTN_IL_CMD2:
 646         case RT5645_DRC1_HL_CTRL1:
 647         case RT5645_DRC2_HL_CTRL1:
 648         case RT5645_ADC_MONO_HP_CTRL1:
 649         case RT5645_ADC_MONO_HP_CTRL2:
 650         case RT5645_DRC2_CTRL1:
 651         case RT5645_DRC2_CTRL2:
 652         case RT5645_DRC2_CTRL3:
 653         case RT5645_DRC2_CTRL4:
 654         case RT5645_DRC2_CTRL5:
 655         case RT5645_JD_CTRL3:
 656         case RT5645_JD_CTRL4:
 657         case RT5645_GEN_CTRL1:
 658         case RT5645_GEN_CTRL2:
 659         case RT5645_GEN_CTRL3:
 660         case RT5645_VENDOR_ID:
 661         case RT5645_VENDOR_ID1:
 662         case RT5645_VENDOR_ID2:
 663                 return true;
 664         default:
 665                 return false;
 666         }
 667 }
 668
 669 static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0);
 670 static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -6525, 75, 0);
 671 static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0);
 672 static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -1725, 75, 0);
 673 static const DECLARE_TLV_DB_SCALE(adc_bst_tlv, 0, 1200, 0);
 674
 675 /* {0, +20, +24, +30, +35, +40, +44, +50, +52} dB */
 676 static const DECLARE_TLV_DB_RANGE(bst_tlv,
 677         0, 0, TLV_DB_SCALE_ITEM(0, 0, 0),
 678         1, 1, TLV_DB_SCALE_ITEM(2000, 0, 0),
 679         2, 2, TLV_DB_SCALE_ITEM(2400, 0, 0),
 680         3, 5, TLV_DB_SCALE_ITEM(3000, 500, 0),
 681         6, 6, TLV_DB_SCALE_ITEM(4400, 0, 0),
 682         7, 7, TLV_DB_SCALE_ITEM(5000, 0, 0),
 683         8, 8, TLV_DB_SCALE_ITEM(5200, 0, 0)
 684 );
 685
 686 /* {-6, -4.5, -3, -1.5, 0, 0.82, 1.58, 2.28} dB */
 687 static const DECLARE_TLV_DB_RANGE(spk_clsd_tlv,
 688         0, 4, TLV_DB_SCALE_ITEM(-600, 150, 0),
 689         5, 5, TLV_DB_SCALE_ITEM(82, 0, 0),
 690         6, 6, TLV_DB_SCALE_ITEM(158, 0, 0),
 691         7, 7, TLV_DB_SCALE_ITEM(228, 0, 0)
 692 );
 693
 694 static int rt5645_hweq_info(struct snd_kcontrol *kcontrol,
 695                          struct snd_ctl_elem_info *uinfo)
 696 {
 697         uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
 698         uinfo->count = RT5645_HWEQ_NUM * sizeof(struct rt5645_eq_param_s);
 699
 700         return 0;
 701 }
 702
 703 static int rt5645_hweq_get(struct snd_kcontrol *kcontrol,
 704                         struct snd_ctl_elem_value *ucontrol)
 705 {
 706         struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
 707         struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
 708         struct rt5645_eq_param_s_be16 *eq_param =
 709                 (struct rt5645_eq_param_s_be16 *)ucontrol->value.bytes.data;
 710         int i;
 711
 712         for (i = 0; i < RT5645_HWEQ_NUM; i++) {
 713                 eq_param[i].reg = cpu_to_be16(rt5645->eq_param[i].reg);
 714                 eq_param[i].val = cpu_to_be16(rt5645->eq_param[i].val);
 715         }
 716
 717         return 0;
 718 }
 719
 720 static bool rt5645_validate_hweq(unsigned short reg)
 721 {
 722         if ((reg >= 0x1a4 && reg <= 0x1cd) || (reg >= 0x1e5 && reg <= 0x1f8) ||
 723                 (reg == RT5645_EQ_CTRL2))
 724                 return true;
 725
 726         return false;
 727 }
 728
 729 static int rt5645_hweq_put(struct snd_kcontrol *kcontrol,
 730                         struct snd_ctl_elem_value *ucontrol)
 731 {
 732         struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
 733         struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
 734         struct rt5645_eq_param_s_be16 *eq_param =
 735                 (struct rt5645_eq_param_s_be16 *)ucontrol->value.bytes.data;
 736         int i;
 737
 738         for (i = 0; i < RT5645_HWEQ_NUM; i++) {
 739                 rt5645->eq_param[i].reg = be16_to_cpu(eq_param[i].reg);
 740                 rt5645->eq_param[i].val = be16_to_cpu(eq_param[i].val);
 741         }
 742
 743         /* The final setting of the table should be RT5645_EQ_CTRL2 */
 744         for (i = RT5645_HWEQ_NUM - 1; i >= 0; i--) {
 745                 if (rt5645->eq_param[i].reg == 0)
 746                         continue;
 747                 else if (rt5645->eq_param[i].reg != RT5645_EQ_CTRL2)
 748                         return 0;
 749                 else
 750                         break;
 751         }
 752
 753         for (i = 0; i < RT5645_HWEQ_NUM; i++) {
 754                 if (!rt5645_validate_hweq(rt5645->eq_param[i].reg) &&
 755                     rt5645->eq_param[i].reg != 0)
 756                         return 0;
 757                 else if (rt5645->eq_param[i].reg == 0)
 758                         break;
 759         }
 760
 761         return 0;
 762 }
 763
 764 #define RT5645_HWEQ(xname) \
 765 {       .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
 766         .info = rt5645_hweq_info, \
 767         .get = rt5645_hweq_get, \
 768         .put = rt5645_hweq_put \
 769 }
 770
 771 static int rt5645_spk_put_volsw(struct snd_kcontrol *kcontrol,
 772                 struct snd_ctl_elem_value *ucontrol)
 773 {
 774         struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
 775         struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
 776         int ret;
 777
 778         regmap_update_bits(rt5645->regmap, RT5645_MICBIAS,
 779                 RT5645_PWR_CLK25M_MASK, RT5645_PWR_CLK25M_PU);
 780
 781         ret = snd_soc_put_volsw(kcontrol, ucontrol);
 782
 783         mod_delayed_work(system_power_efficient_wq, &rt5645->rcclock_work,
 784                 msecs_to_jiffies(200));
 785
 786         return ret;
 787 }
 788
 789 static const char * const rt5645_dac1_vol_ctrl_mode_text[] = {
 790         "immediately", "zero crossing", "soft ramp"
 791 };
 792
 793 static SOC_ENUM_SINGLE_DECL(
 794         rt5645_dac1_vol_ctrl_mode, RT5645_PR_BASE,
 795         RT5645_DA1_ZDET_SFT, rt5645_dac1_vol_ctrl_mode_text);
 796
 797 static const struct snd_kcontrol_new rt5645_snd_controls[] = {
 798         /* Speaker Output Volume */
 799         SOC_DOUBLE("Speaker Channel Switch", RT5645_SPK_VOL,
 800                 RT5645_VOL_L_SFT, RT5645_VOL_R_SFT, 1, 1),
 801         SOC_DOUBLE_EXT_TLV("Speaker Playback Volume", RT5645_SPK_VOL,
 802                 RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 39, 1, snd_soc_get_volsw,
 803                 rt5645_spk_put_volsw, out_vol_tlv),
 804
 805         /* ClassD modulator Speaker Gain Ratio */
 806         SOC_SINGLE_TLV("Speaker ClassD Playback Volume", RT5645_SPO_CLSD_RATIO,
 807                 RT5645_SPK_G_CLSD_SFT, 7, 0, spk_clsd_tlv),
 808
 809         /* Headphone Output Volume */
 810         SOC_DOUBLE("Headphone Channel Switch", RT5645_HP_VOL,
 811                 RT5645_VOL_L_SFT, RT5645_VOL_R_SFT, 1, 1),
 812         SOC_DOUBLE_TLV("Headphone Playback Volume", RT5645_HP_VOL,
 813                 RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 39, 1, out_vol_tlv),
 814
 815         /* OUTPUT Control */
 816         SOC_DOUBLE("OUT Playback Switch", RT5645_LOUT1,
 817                 RT5645_L_MUTE_SFT, RT5645_R_MUTE_SFT, 1, 1),
 818         SOC_DOUBLE("OUT Channel Switch", RT5645_LOUT1,
 819                 RT5645_VOL_L_SFT, RT5645_VOL_R_SFT, 1, 1),
 820         SOC_DOUBLE_TLV("OUT Playback Volume", RT5645_LOUT1,
 821                 RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 39, 1, out_vol_tlv),
 822
 823         /* DAC Digital Volume */
 824         SOC_DOUBLE("DAC2 Playback Switch", RT5645_DAC_CTRL,
 825                 RT5645_M_DAC_L2_VOL_SFT, RT5645_M_DAC_R2_VOL_SFT, 1, 1),
 826         SOC_DOUBLE_TLV("DAC1 Playback Volume", RT5645_DAC1_DIG_VOL,
 827                 RT5645_L_VOL_SFT + 1, RT5645_R_VOL_SFT + 1, 87, 0, dac_vol_tlv),
 828         SOC_DOUBLE_TLV("Mono DAC Playback Volume", RT5645_DAC2_DIG_VOL,
 829                 RT5645_L_VOL_SFT + 1, RT5645_R_VOL_SFT + 1, 87, 0, dac_vol_tlv),
 830
 831         /* IN1/IN2 Control */
 832         SOC_SINGLE_TLV("IN1 Boost", RT5645_IN1_CTRL1,
 833                 RT5645_BST_SFT1, 12, 0, bst_tlv),
 834         SOC_SINGLE_TLV("IN2 Boost", RT5645_IN2_CTRL,
 835                 RT5645_BST_SFT2, 8, 0, bst_tlv),
 836
 837         /* INL/INR Volume Control */
 838         SOC_DOUBLE_TLV("IN Capture Volume", RT5645_INL1_INR1_VOL,
 839                 RT5645_INL_VOL_SFT, RT5645_INR_VOL_SFT, 31, 1, in_vol_tlv),
 840
 841         /* ADC Digital Volume Control */
 842         SOC_DOUBLE("ADC Capture Switch", RT5645_STO1_ADC_DIG_VOL,
 843                 RT5645_L_MUTE_SFT, RT5645_R_MUTE_SFT, 1, 1),
 844         SOC_DOUBLE_TLV("ADC Capture Volume", RT5645_STO1_ADC_DIG_VOL,
 845                 RT5645_L_VOL_SFT + 1, RT5645_R_VOL_SFT + 1, 63, 0, adc_vol_tlv),
 846         SOC_DOUBLE("Mono ADC Capture Switch", RT5645_MONO_ADC_DIG_VOL,
 847                 RT5645_L_MUTE_SFT, RT5645_R_MUTE_SFT, 1, 1),
 848         SOC_DOUBLE_TLV("Mono ADC Capture Volume", RT5645_MONO_ADC_DIG_VOL,
 849                 RT5645_L_VOL_SFT + 1, RT5645_R_VOL_SFT + 1, 63, 0, adc_vol_tlv),
 850
 851         /* ADC Boost Volume Control */
 852         SOC_DOUBLE_TLV("ADC Boost Capture Volume", RT5645_ADC_BST_VOL1,
 853                 RT5645_STO1_ADC_L_BST_SFT, RT5645_STO1_ADC_R_BST_SFT, 3, 0,
 854                 adc_bst_tlv),
 855         SOC_DOUBLE_TLV("Mono ADC Boost Capture Volume", RT5645_ADC_BST_VOL2,
 856                 RT5645_MONO_ADC_L_BST_SFT, RT5645_MONO_ADC_R_BST_SFT, 3, 0,
 857                 adc_bst_tlv),
 858
 859         /* I2S2 function select */
 860         SOC_SINGLE("I2S2 Func Switch", RT5645_GPIO_CTRL1, RT5645_I2S2_SEL_SFT,
 861                 1, 1),
 862         RT5645_HWEQ("Speaker HWEQ"),
 863
 864         /* Digital Soft Volume Control */
 865         SOC_ENUM("DAC1 Digital Volume Control Func", rt5645_dac1_vol_ctrl_mode),
 866 };
 867
 868 /**
 869  * set_dmic_clk - Set parameter of dmic.
 870  *
 871  * @w: DAPM widget.
 872  * @kcontrol: The kcontrol of this widget.
 873  * @event: Event id.
 874  *
 875  */
 876 static int set_dmic_clk(struct snd_soc_dapm_widget *w,
 877         struct snd_kcontrol *kcontrol, int event)
 878 {
 879         struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
 880         struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
 881         int idx, rate;
 882
 883         rate = rt5645->sysclk / rl6231_get_pre_div(rt5645->regmap,
 884                 RT5645_ADDA_CLK1, RT5645_I2S_PD1_SFT);
 885         idx = rl6231_calc_dmic_clk(rate);
 886         if (idx < 0)
 887                 dev_err(component->dev, "Failed to set DMIC clock\n");
 888         else
 889                 snd_soc_component_update_bits(component, RT5645_DMIC_CTRL1,
 890                         RT5645_DMIC_CLK_MASK, idx << RT5645_DMIC_CLK_SFT);
 891         return idx;
 892 }
 893
 894 static int is_sys_clk_from_pll(struct snd_soc_dapm_widget *source,
 895                          struct snd_soc_dapm_widget *sink)
 896 {
 897         struct snd_soc_component *component = snd_soc_dapm_to_component(source->dapm);
 898         unsigned int val;
 899
 900         val = snd_soc_component_read(component, RT5645_GLB_CLK);
 901         val &= RT5645_SCLK_SRC_MASK;
 902         if (val == RT5645_SCLK_SRC_PLL1)
 903                 return 1;
 904         else
 905                 return 0;
 906 }
 907
 908 static int is_using_asrc(struct snd_soc_dapm_widget *source,
 909                          struct snd_soc_dapm_widget *sink)
 910 {
 911         struct snd_soc_component *component = snd_soc_dapm_to_component(source->dapm);
 912         unsigned int reg, shift, val;
 913
 914         switch (source->shift) {
 915         case 0:
 916                 reg = RT5645_ASRC_3;
 917                 shift = 0;
 918                 break;
 919         case 1:
 920                 reg = RT5645_ASRC_3;
 921                 shift = 4;
 922                 break;
 923         case 3:
 924                 reg = RT5645_ASRC_2;
 925                 shift = 0;
 926                 break;
 927         case 8:
 928                 reg = RT5645_ASRC_2;
 929                 shift = 4;
 930                 break;
 931         case 9:
 932                 reg = RT5645_ASRC_2;
 933                 shift = 8;
 934                 break;
 935         case 10:
 936                 reg = RT5645_ASRC_2;
 937                 shift = 12;
 938                 break;
 939         default:
 940                 return 0;
 941         }
 942
 943         val = (snd_soc_component_read(component, reg) >> shift) & 0xf;
 944         switch (val) {
 945         case 1:
 946         case 2:
 947         case 3:
 948         case 4:
 949                 return 1;
 950         default:
 951                 return 0;
 952         }
 953
 954 }
 955
 956 static int rt5645_enable_hweq(struct snd_soc_component *component)
 957 {
 958         struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
 959         int i;
 960
 961         for (i = 0; i < RT5645_HWEQ_NUM; i++) {
 962                 if (rt5645_validate_hweq(rt5645->eq_param[i].reg))
 963                         regmap_write(rt5645->regmap, rt5645->eq_param[i].reg,
 964                                         rt5645->eq_param[i].val);
 965                 else
 966                         break;
 967         }
 968
 969         return 0;
 970 }
 971
 972 /**
 973  * rt5645_sel_asrc_clk_src - select ASRC clock source for a set of filters
 974  * @component: SoC audio component device.
 975  * @filter_mask: mask of filters.
 976  * @clk_src: clock source
 977  *
 978  * The ASRC function is for asynchronous MCLK and LRCK. Also, since RT5645 can
 979  * only support standard 32fs or 64fs i2s format, ASRC should be enabled to
 980  * support special i2s clock format such as Intel's 100fs(100 * sampling rate).
 981  * ASRC function will track i2s clock and generate a corresponding system clock
 982  * for codec. This function provides an API to select the clock source for a
 983  * set of filters specified by the mask. And the codec driver will turn on ASRC
 984  * for these filters if ASRC is selected as their clock source.
 985  */
 986 int rt5645_sel_asrc_clk_src(struct snd_soc_component *component,
 987                 unsigned int filter_mask, unsigned int clk_src)
 988 {
 989         unsigned int asrc2_mask = 0;
 990         unsigned int asrc2_value = 0;
 991         unsigned int asrc3_mask = 0;
 992         unsigned int asrc3_value = 0;
 993
 994         switch (clk_src) {
 995         case RT5645_CLK_SEL_SYS:
 996         case RT5645_CLK_SEL_I2S1_ASRC:
 997         case RT5645_CLK_SEL_I2S2_ASRC:
 998         case RT5645_CLK_SEL_SYS2:
 999                 break;
1000
1001         default:
1002                 return -EINVAL;
1003         }
1004
1005         if (filter_mask & RT5645_DA_STEREO_FILTER) {
1006                 asrc2_mask |= RT5645_DA_STO_CLK_SEL_MASK;
1007                 asrc2_value = (asrc2_value & ~RT5645_DA_STO_CLK_SEL_MASK)
1008                         | (clk_src << RT5645_DA_STO_CLK_SEL_SFT);
1009         }
1010
1011         if (filter_mask & RT5645_DA_MONO_L_FILTER) {
1012                 asrc2_mask |= RT5645_DA_MONOL_CLK_SEL_MASK;
1013                 asrc2_value = (asrc2_value & ~RT5645_DA_MONOL_CLK_SEL_MASK)
1014                         | (clk_src << RT5645_DA_MONOL_CLK_SEL_SFT);
1015         }
1016
1017         if (filter_mask & RT5645_DA_MONO_R_FILTER) {
1018                 asrc2_mask |= RT5645_DA_MONOR_CLK_SEL_MASK;
1019                 asrc2_value = (asrc2_value & ~RT5645_DA_MONOR_CLK_SEL_MASK)
1020                         | (clk_src << RT5645_DA_MONOR_CLK_SEL_SFT);
1021         }
1022
1023         if (filter_mask & RT5645_AD_STEREO_FILTER) {
1024                 asrc2_mask |= RT5645_AD_STO1_CLK_SEL_MASK;
1025                 asrc2_value = (asrc2_value & ~RT5645_AD_STO1_CLK_SEL_MASK)
1026                         | (clk_src << RT5645_AD_STO1_CLK_SEL_SFT);
1027         }
1028
1029         if (filter_mask & RT5645_AD_MONO_L_FILTER) {
1030                 asrc3_mask |= RT5645_AD_MONOL_CLK_SEL_MASK;
1031                 asrc3_value = (asrc3_value & ~RT5645_AD_MONOL_CLK_SEL_MASK)
1032                         | (clk_src << RT5645_AD_MONOL_CLK_SEL_SFT);
1033         }
1034
1035         if (filter_mask & RT5645_AD_MONO_R_FILTER)  {
1036                 asrc3_mask |= RT5645_AD_MONOR_CLK_SEL_MASK;
1037                 asrc3_value = (asrc3_value & ~RT5645_AD_MONOR_CLK_SEL_MASK)
1038                         | (clk_src << RT5645_AD_MONOR_CLK_SEL_SFT);
1039         }
1040
1041         if (asrc2_mask)
1042                 snd_soc_component_update_bits(component, RT5645_ASRC_2,
1043                         asrc2_mask, asrc2_value);
1044
1045         if (asrc3_mask)
1046                 snd_soc_component_update_bits(component, RT5645_ASRC_3,
1047                         asrc3_mask, asrc3_value);
1048
1049         return 0;
1050 }
1051 EXPORT_SYMBOL_GPL(rt5645_sel_asrc_clk_src);
1052
1053 /* Digital Mixer */
1054 static const struct snd_kcontrol_new rt5645_sto1_adc_l_mix[] = {
1055         SOC_DAPM_SINGLE("ADC1 Switch", RT5645_STO1_ADC_MIXER,
1056                         RT5645_M_ADC_L1_SFT, 1, 1),
1057         SOC_DAPM_SINGLE("ADC2 Switch", RT5645_STO1_ADC_MIXER,
1058                         RT5645_M_ADC_L2_SFT, 1, 1),
1059 };
1060
1061 static const struct snd_kcontrol_new rt5645_sto1_adc_r_mix[] = {
1062         SOC_DAPM_SINGLE("ADC1 Switch", RT5645_STO1_ADC_MIXER,
1063                         RT5645_M_ADC_R1_SFT, 1, 1),
1064         SOC_DAPM_SINGLE("ADC2 Switch", RT5645_STO1_ADC_MIXER,
1065                         RT5645_M_ADC_R2_SFT, 1, 1),
1066 };
1067
1068 static const struct snd_kcontrol_new rt5645_mono_adc_l_mix[] = {
1069         SOC_DAPM_SINGLE("ADC1 Switch", RT5645_MONO_ADC_MIXER,
1070                         RT5645_M_MONO_ADC_L1_SFT, 1, 1),
1071         SOC_DAPM_SINGLE("ADC2 Switch", RT5645_MONO_ADC_MIXER,
1072                         RT5645_M_MONO_ADC_L2_SFT, 1, 1),
1073 };
1074
1075 static const struct snd_kcontrol_new rt5645_mono_adc_r_mix[] = {
1076         SOC_DAPM_SINGLE("ADC1 Switch", RT5645_MONO_ADC_MIXER,
1077                         RT5645_M_MONO_ADC_R1_SFT, 1, 1),
1078         SOC_DAPM_SINGLE("ADC2 Switch", RT5645_MONO_ADC_MIXER,
1079                         RT5645_M_MONO_ADC_R2_SFT, 1, 1),
1080 };
1081
1082 static const struct snd_kcontrol_new rt5645_dac_l_mix[] = {
1083         SOC_DAPM_SINGLE("Stereo ADC Switch", RT5645_AD_DA_MIXER,
1084                         RT5645_M_ADCMIX_L_SFT, 1, 1),
1085         SOC_DAPM_SINGLE_AUTODISABLE("DAC1 Switch", RT5645_AD_DA_MIXER,
1086                         RT5645_M_DAC1_L_SFT, 1, 1),
1087 };
1088
1089 static const struct snd_kcontrol_new rt5645_dac_r_mix[] = {
1090         SOC_DAPM_SINGLE("Stereo ADC Switch", RT5645_AD_DA_MIXER,
1091                         RT5645_M_ADCMIX_R_SFT, 1, 1),
1092         SOC_DAPM_SINGLE_AUTODISABLE("DAC1 Switch", RT5645_AD_DA_MIXER,
1093                         RT5645_M_DAC1_R_SFT, 1, 1),
1094 };
1095
1096 static const struct snd_kcontrol_new rt5645_sto_dac_l_mix[] = {
1097         SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_STO_DAC_MIXER,
1098                         RT5645_M_DAC_L1_SFT, 1, 1),
1099         SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_STO_DAC_MIXER,
1100                         RT5645_M_DAC_L2_SFT, 1, 1),
1101         SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_STO_DAC_MIXER,
1102                         RT5645_M_DAC_R1_STO_L_SFT, 1, 1),
1103 };
1104
1105 static const struct snd_kcontrol_new rt5645_sto_dac_r_mix[] = {
1106         SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_STO_DAC_MIXER,
1107                         RT5645_M_DAC_R1_SFT, 1, 1),
1108         SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_STO_DAC_MIXER,
1109                         RT5645_M_DAC_R2_SFT, 1, 1),
1110         SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_STO_DAC_MIXER,
1111                         RT5645_M_DAC_L1_STO_R_SFT, 1, 1),
1112 };
1113
1114 static const struct snd_kcontrol_new rt5645_mono_dac_l_mix[] = {
1115         SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_MONO_DAC_MIXER,
1116                         RT5645_M_DAC_L1_MONO_L_SFT, 1, 1),
1117         SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_MONO_DAC_MIXER,
1118                         RT5645_M_DAC_L2_MONO_L_SFT, 1, 1),
1119         SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_MONO_DAC_MIXER,
1120                         RT5645_M_DAC_R2_MONO_L_SFT, 1, 1),
1121 };
1122
1123 static const struct snd_kcontrol_new rt5645_mono_dac_r_mix[] = {
1124         SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_MONO_DAC_MIXER,
1125                         RT5645_M_DAC_R1_MONO_R_SFT, 1, 1),
1126         SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_MONO_DAC_MIXER,
1127                         RT5645_M_DAC_R2_MONO_R_SFT, 1, 1),
1128         SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_MONO_DAC_MIXER,
1129                         RT5645_M_DAC_L2_MONO_R_SFT, 1, 1),
1130 };
1131
1132 static const struct snd_kcontrol_new rt5645_dig_l_mix[] = {
1133         SOC_DAPM_SINGLE("Sto DAC Mix L Switch", RT5645_DIG_MIXER,
1134                         RT5645_M_STO_L_DAC_L_SFT, 1, 1),
1135         SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_DIG_MIXER,
1136                         RT5645_M_DAC_L2_DAC_L_SFT, 1, 1),
1137         SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_DIG_MIXER,
1138                         RT5645_M_DAC_R2_DAC_L_SFT, 1, 1),
1139 };
1140
1141 static const struct snd_kcontrol_new rt5645_dig_r_mix[] = {
1142         SOC_DAPM_SINGLE("Sto DAC Mix R Switch", RT5645_DIG_MIXER,
1143                         RT5645_M_STO_R_DAC_R_SFT, 1, 1),
1144         SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_DIG_MIXER,
1145                         RT5645_M_DAC_R2_DAC_R_SFT, 1, 1),
1146         SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_DIG_MIXER,
1147                         RT5645_M_DAC_L2_DAC_R_SFT, 1, 1),
1148 };
1149
1150 /* Analog Input Mixer */
1151 static const struct snd_kcontrol_new rt5645_rec_l_mix[] = {
1152         SOC_DAPM_SINGLE("HPOL Switch", RT5645_REC_L2_MIXER,
1153                         RT5645_M_HP_L_RM_L_SFT, 1, 1),
1154         SOC_DAPM_SINGLE("INL Switch", RT5645_REC_L2_MIXER,
1155                         RT5645_M_IN_L_RM_L_SFT, 1, 1),
1156         SOC_DAPM_SINGLE("BST2 Switch", RT5645_REC_L2_MIXER,
1157                         RT5645_M_BST2_RM_L_SFT, 1, 1),
1158         SOC_DAPM_SINGLE("BST1 Switch", RT5645_REC_L2_MIXER,
1159                         RT5645_M_BST1_RM_L_SFT, 1, 1),
1160         SOC_DAPM_SINGLE("OUT MIXL Switch", RT5645_REC_L2_MIXER,
1161                         RT5645_M_OM_L_RM_L_SFT, 1, 1),
1162 };
1163
1164 static const struct snd_kcontrol_new rt5645_rec_r_mix[] = {
1165         SOC_DAPM_SINGLE("HPOR Switch", RT5645_REC_R2_MIXER,
1166                         RT5645_M_HP_R_RM_R_SFT, 1, 1),
1167         SOC_DAPM_SINGLE("INR Switch", RT5645_REC_R2_MIXER,
1168                         RT5645_M_IN_R_RM_R_SFT, 1, 1),
1169         SOC_DAPM_SINGLE("BST2 Switch", RT5645_REC_R2_MIXER,
1170                         RT5645_M_BST2_RM_R_SFT, 1, 1),
1171         SOC_DAPM_SINGLE("BST1 Switch", RT5645_REC_R2_MIXER,
1172                         RT5645_M_BST1_RM_R_SFT, 1, 1),
1173         SOC_DAPM_SINGLE("OUT MIXR Switch", RT5645_REC_R2_MIXER,
1174                         RT5645_M_OM_R_RM_R_SFT, 1, 1),
1175 };
1176
1177 static const struct snd_kcontrol_new rt5645_spk_l_mix[] = {
1178         SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_SPK_L_MIXER,
1179                         RT5645_M_DAC_L1_SM_L_SFT, 1, 1),
1180         SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_SPK_L_MIXER,
1181                         RT5645_M_DAC_L2_SM_L_SFT, 1, 1),
1182         SOC_DAPM_SINGLE("INL Switch", RT5645_SPK_L_MIXER,
1183                         RT5645_M_IN_L_SM_L_SFT, 1, 1),
1184         SOC_DAPM_SINGLE("BST1 Switch", RT5645_SPK_L_MIXER,
1185                         RT5645_M_BST1_L_SM_L_SFT, 1, 1),
1186 };
1187
1188 static const struct snd_kcontrol_new rt5645_spk_r_mix[] = {
1189         SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_SPK_R_MIXER,
1190                         RT5645_M_DAC_R1_SM_R_SFT, 1, 1),
1191         SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_SPK_R_MIXER,
1192                         RT5645_M_DAC_R2_SM_R_SFT, 1, 1),
1193         SOC_DAPM_SINGLE("INR Switch", RT5645_SPK_R_MIXER,
1194                         RT5645_M_IN_R_SM_R_SFT, 1, 1),
1195         SOC_DAPM_SINGLE("BST2 Switch", RT5645_SPK_R_MIXER,
1196                         RT5645_M_BST2_R_SM_R_SFT, 1, 1),
1197 };
1198
1199 static const struct snd_kcontrol_new rt5645_out_l_mix[] = {
1200         SOC_DAPM_SINGLE("BST1 Switch", RT5645_OUT_L1_MIXER,
1201                         RT5645_M_BST1_OM_L_SFT, 1, 1),
1202         SOC_DAPM_SINGLE("INL Switch", RT5645_OUT_L1_MIXER,
1203                         RT5645_M_IN_L_OM_L_SFT, 1, 1),
1204         SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_OUT_L1_MIXER,
1205                         RT5645_M_DAC_L2_OM_L_SFT, 1, 1),
1206         SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_OUT_L1_MIXER,
1207                         RT5645_M_DAC_L1_OM_L_SFT, 1, 1),
1208 };
1209
1210 static const struct snd_kcontrol_new rt5645_out_r_mix[] = {
1211         SOC_DAPM_SINGLE("BST2 Switch", RT5645_OUT_R1_MIXER,
1212                         RT5645_M_BST2_OM_R_SFT, 1, 1),
1213         SOC_DAPM_SINGLE("INR Switch", RT5645_OUT_R1_MIXER,
1214                         RT5645_M_IN_R_OM_R_SFT, 1, 1),
1215         SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_OUT_R1_MIXER,
1216                         RT5645_M_DAC_R2_OM_R_SFT, 1, 1),
1217         SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_OUT_R1_MIXER,
1218                         RT5645_M_DAC_R1_OM_R_SFT, 1, 1),
1219 };
1220
1221 static const struct snd_kcontrol_new rt5645_spo_l_mix[] = {
1222         SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_SPO_MIXER,
1223                         RT5645_M_DAC_R1_SPM_L_SFT, 1, 1),
1224         SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_SPO_MIXER,
1225                         RT5645_M_DAC_L1_SPM_L_SFT, 1, 1),
1226         SOC_DAPM_SINGLE("SPKVOL R Switch", RT5645_SPO_MIXER,
1227                         RT5645_M_SV_R_SPM_L_SFT, 1, 1),
1228         SOC_DAPM_SINGLE("SPKVOL L Switch", RT5645_SPO_MIXER,
1229                         RT5645_M_SV_L_SPM_L_SFT, 1, 1),
1230 };
1231
1232 static const struct snd_kcontrol_new rt5645_spo_r_mix[] = {
1233         SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_SPO_MIXER,
1234                         RT5645_M_DAC_R1_SPM_R_SFT, 1, 1),
1235         SOC_DAPM_SINGLE("SPKVOL R Switch", RT5645_SPO_MIXER,
1236                         RT5645_M_SV_R_SPM_R_SFT, 1, 1),
1237 };
1238
1239 static const struct snd_kcontrol_new rt5645_hpo_mix[] = {
1240         SOC_DAPM_SINGLE("DAC1 Switch", RT5645_HPO_MIXER,
1241                         RT5645_M_DAC1_HM_SFT, 1, 1),
1242         SOC_DAPM_SINGLE("HPVOL Switch", RT5645_HPO_MIXER,
1243                         RT5645_M_HPVOL_HM_SFT, 1, 1),
1244 };
1245
1246 static const struct snd_kcontrol_new rt5645_hpvoll_mix[] = {
1247         SOC_DAPM_SINGLE("DAC1 Switch", RT5645_HPOMIXL_CTRL,
1248                         RT5645_M_DAC1_HV_SFT, 1, 1),
1249         SOC_DAPM_SINGLE("DAC2 Switch", RT5645_HPOMIXL_CTRL,
1250                         RT5645_M_DAC2_HV_SFT, 1, 1),
1251         SOC_DAPM_SINGLE("INL Switch", RT5645_HPOMIXL_CTRL,
1252                         RT5645_M_IN_HV_SFT, 1, 1),
1253         SOC_DAPM_SINGLE("BST1 Switch", RT5645_HPOMIXL_CTRL,
1254                         RT5645_M_BST1_HV_SFT, 1, 1),
1255 };
1256
1257 static const struct snd_kcontrol_new rt5645_hpvolr_mix[] = {
1258         SOC_DAPM_SINGLE("DAC1 Switch", RT5645_HPOMIXR_CTRL,
1259                         RT5645_M_DAC1_HV_SFT, 1, 1),
1260         SOC_DAPM_SINGLE("DAC2 Switch", RT5645_HPOMIXR_CTRL,
1261                         RT5645_M_DAC2_HV_SFT, 1, 1),
1262         SOC_DAPM_SINGLE("INR Switch", RT5645_HPOMIXR_CTRL,
1263                         RT5645_M_IN_HV_SFT, 1, 1),
1264         SOC_DAPM_SINGLE("BST2 Switch", RT5645_HPOMIXR_CTRL,
1265                         RT5645_M_BST2_HV_SFT, 1, 1),
1266 };
1267
1268 static const struct snd_kcontrol_new rt5645_lout_mix[] = {
1269         SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_LOUT_MIXER,
1270                         RT5645_M_DAC_L1_LM_SFT, 1, 1),
1271         SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_LOUT_MIXER,
1272                         RT5645_M_DAC_R1_LM_SFT, 1, 1),
1273         SOC_DAPM_SINGLE("OUTMIX L Switch", RT5645_LOUT_MIXER,
1274                         RT5645_M_OV_L_LM_SFT, 1, 1),
1275         SOC_DAPM_SINGLE("OUTMIX R Switch", RT5645_LOUT_MIXER,
1276                         RT5645_M_OV_R_LM_SFT, 1, 1),
1277 };
1278
1279 /*DAC1 L/R source*/ /* MX-29 [9:8] [11:10] */
1280 static const char * const rt5645_dac1_src[] = {
1281         "IF1 DAC", "IF2 DAC", "IF3 DAC"
1282 };
1283
1284 static SOC_ENUM_SINGLE_DECL(
1285         rt5645_dac1l_enum, RT5645_AD_DA_MIXER,
1286         RT5645_DAC1_L_SEL_SFT, rt5645_dac1_src);
1287
1288 static const struct snd_kcontrol_new rt5645_dac1l_mux =
1289         SOC_DAPM_ENUM("DAC1 L source", rt5645_dac1l_enum);
1290
1291 static SOC_ENUM_SINGLE_DECL(
1292         rt5645_dac1r_enum, RT5645_AD_DA_MIXER,
1293         RT5645_DAC1_R_SEL_SFT, rt5645_dac1_src);
1294
1295 static const struct snd_kcontrol_new rt5645_dac1r_mux =
1296         SOC_DAPM_ENUM("DAC1 R source", rt5645_dac1r_enum);
1297
1298 /*DAC2 L/R source*/ /* MX-1B [6:4] [2:0] */
1299 static const char * const rt5645_dac12_src[] = {
1300         "IF1 DAC", "IF2 DAC", "IF3 DAC", "Mono ADC", "VAD_ADC"
1301 };
1302
1303 static SOC_ENUM_SINGLE_DECL(
1304         rt5645_dac2l_enum, RT5645_DAC_CTRL,
1305         RT5645_DAC2_L_SEL_SFT, rt5645_dac12_src);
1306
1307 static const struct snd_kcontrol_new rt5645_dac_l2_mux =
1308         SOC_DAPM_ENUM("DAC2 L source", rt5645_dac2l_enum);
1309
1310 static const char * const rt5645_dacr2_src[] = {
1311         "IF1 DAC", "IF2 DAC", "IF3 DAC", "Mono ADC", "Haptic"
1312 };
1313
1314 static SOC_ENUM_SINGLE_DECL(
1315         rt5645_dac2r_enum, RT5645_DAC_CTRL,
1316         RT5645_DAC2_R_SEL_SFT, rt5645_dacr2_src);
1317
1318 static const struct snd_kcontrol_new rt5645_dac_r2_mux =
1319         SOC_DAPM_ENUM("DAC2 R source", rt5645_dac2r_enum);
1320
1321 /* Stereo1 ADC source */
1322 /* MX-27 [12] */
1323 static const char * const rt5645_stereo_adc1_src[] = {
1324         "DAC MIX", "ADC"
1325 };
1326
1327 static SOC_ENUM_SINGLE_DECL(
1328         rt5645_stereo1_adc1_enum, RT5645_STO1_ADC_MIXER,
1329         RT5645_ADC_1_SRC_SFT, rt5645_stereo_adc1_src);
1330
1331 static const struct snd_kcontrol_new rt5645_sto_adc1_mux =
1332         SOC_DAPM_ENUM("Stereo1 ADC1 Mux", rt5645_stereo1_adc1_enum);
1333
1334 /* MX-27 [11] */
1335 static const char * const rt5645_stereo_adc2_src[] = {
1336         "DAC MIX", "DMIC"
1337 };
1338
1339 static SOC_ENUM_SINGLE_DECL(
1340         rt5645_stereo1_adc2_enum, RT5645_STO1_ADC_MIXER,
1341         RT5645_ADC_2_SRC_SFT, rt5645_stereo_adc2_src);
1342
1343 static const struct snd_kcontrol_new rt5645_sto_adc2_mux =
1344         SOC_DAPM_ENUM("Stereo1 ADC2 Mux", rt5645_stereo1_adc2_enum);
1345
1346 /* MX-27 [8] */
1347 static const char * const rt5645_stereo_dmic_src[] = {
1348         "DMIC1", "DMIC2"
1349 };
1350
1351 static SOC_ENUM_SINGLE_DECL(
1352         rt5645_stereo1_dmic_enum, RT5645_STO1_ADC_MIXER,
1353         RT5645_DMIC_SRC_SFT, rt5645_stereo_dmic_src);
1354
1355 static const struct snd_kcontrol_new rt5645_sto1_dmic_mux =
1356         SOC_DAPM_ENUM("Stereo1 DMIC source", rt5645_stereo1_dmic_enum);
1357
1358 /* Mono ADC source */
1359 /* MX-28 [12] */
1360 static const char * const rt5645_mono_adc_l1_src[] = {
1361         "Mono DAC MIXL", "ADC"
1362 };
1363
1364 static SOC_ENUM_SINGLE_DECL(
1365         rt5645_mono_adc_l1_enum, RT5645_MONO_ADC_MIXER,
1366         RT5645_MONO_ADC_L1_SRC_SFT, rt5645_mono_adc_l1_src);
1367
1368 static const struct snd_kcontrol_new rt5645_mono_adc_l1_mux =
1369         SOC_DAPM_ENUM("Mono ADC1 left source", rt5645_mono_adc_l1_enum);
1370 /* MX-28 [11] */
1371 static const char * const rt5645_mono_adc_l2_src[] = {
1372         "Mono DAC MIXL", "DMIC"
1373 };
1374
1375 static SOC_ENUM_SINGLE_DECL(
1376         rt5645_mono_adc_l2_enum, RT5645_MONO_ADC_MIXER,
1377         RT5645_MONO_ADC_L2_SRC_SFT, rt5645_mono_adc_l2_src);
1378
1379 static const struct snd_kcontrol_new rt5645_mono_adc_l2_mux =
1380         SOC_DAPM_ENUM("Mono ADC2 left source", rt5645_mono_adc_l2_enum);
1381
1382 /* MX-28 [8] */
1383 static const char * const rt5645_mono_dmic_src[] = {
1384         "DMIC1", "DMIC2"
1385 };
1386
1387 static SOC_ENUM_SINGLE_DECL(
1388         rt5645_mono_dmic_l_enum, RT5645_MONO_ADC_MIXER,
1389         RT5645_MONO_DMIC_L_SRC_SFT, rt5645_mono_dmic_src);
1390
1391 static const struct snd_kcontrol_new rt5645_mono_dmic_l_mux =
1392         SOC_DAPM_ENUM("Mono DMIC left source", rt5645_mono_dmic_l_enum);
1393 /* MX-28 [1:0] */
1394 static SOC_ENUM_SINGLE_DECL(
1395         rt5645_mono_dmic_r_enum, RT5645_MONO_ADC_MIXER,
1396         RT5645_MONO_DMIC_R_SRC_SFT, rt5645_mono_dmic_src);
1397
1398 static const struct snd_kcontrol_new rt5645_mono_dmic_r_mux =
1399         SOC_DAPM_ENUM("Mono DMIC Right source", rt5645_mono_dmic_r_enum);
1400 /* MX-28 [4] */
1401 static const char * const rt5645_mono_adc_r1_src[] = {
1402         "Mono DAC MIXR", "ADC"
1403 };
1404
1405 static SOC_ENUM_SINGLE_DECL(
1406         rt5645_mono_adc_r1_enum, RT5645_MONO_ADC_MIXER,
1407         RT5645_MONO_ADC_R1_SRC_SFT, rt5645_mono_adc_r1_src);
1408
1409 static const struct snd_kcontrol_new rt5645_mono_adc_r1_mux =
1410         SOC_DAPM_ENUM("Mono ADC1 right source", rt5645_mono_adc_r1_enum);
1411 /* MX-28 [3] */
1412 static const char * const rt5645_mono_adc_r2_src[] = {
1413         "Mono DAC MIXR", "DMIC"
1414 };
1415
1416 static SOC_ENUM_SINGLE_DECL(
1417         rt5645_mono_adc_r2_enum, RT5645_MONO_ADC_MIXER,
1418         RT5645_MONO_ADC_R2_SRC_SFT, rt5645_mono_adc_r2_src);
1419
1420 static const struct snd_kcontrol_new rt5645_mono_adc_r2_mux =
1421         SOC_DAPM_ENUM("Mono ADC2 right source", rt5645_mono_adc_r2_enum);
1422
1423 /* MX-77 [9:8] */
1424 static const char * const rt5645_if1_adc_in_src[] = {
1425         "IF_ADC1/IF_ADC2/VAD_ADC", "IF_ADC2/IF_ADC1/VAD_ADC",
1426         "VAD_ADC/IF_ADC1/IF_ADC2", "VAD_ADC/IF_ADC2/IF_ADC1"
1427 };
1428
1429 static SOC_ENUM_SINGLE_DECL(
1430         rt5645_if1_adc_in_enum, RT5645_TDM_CTRL_1,
1431         RT5645_IF1_ADC_IN_SFT, rt5645_if1_adc_in_src);
1432
1433 static const struct snd_kcontrol_new rt5645_if1_adc_in_mux =
1434         SOC_DAPM_ENUM("IF1 ADC IN source", rt5645_if1_adc_in_enum);
1435
1436 /* MX-78 [4:0] */
1437 static const char * const rt5650_if1_adc_in_src[] = {
1438         "IF_ADC1/IF_ADC2/DAC_REF/Null",
1439         "IF_ADC1/IF_ADC2/Null/DAC_REF",
1440         "IF_ADC1/DAC_REF/IF_ADC2/Null",
1441         "IF_ADC1/DAC_REF/Null/IF_ADC2",
1442         "IF_ADC1/Null/DAC_REF/IF_ADC2",
1443         "IF_ADC1/Null/IF_ADC2/DAC_REF",
1444
1445         "IF_ADC2/IF_ADC1/DAC_REF/Null",
1446         "IF_ADC2/IF_ADC1/Null/DAC_REF",
1447         "IF_ADC2/DAC_REF/IF_ADC1/Null",
1448         "IF_ADC2/DAC_REF/Null/IF_ADC1",
1449         "IF_ADC2/Null/DAC_REF/IF_ADC1",
1450         "IF_ADC2/Null/IF_ADC1/DAC_REF",
1451
1452         "DAC_REF/IF_ADC1/IF_ADC2/Null",
1453         "DAC_REF/IF_ADC1/Null/IF_ADC2",
1454         "DAC_REF/IF_ADC2/IF_ADC1/Null",
1455         "DAC_REF/IF_ADC2/Null/IF_ADC1",
1456         "DAC_REF/Null/IF_ADC1/IF_ADC2",
1457         "DAC_REF/Null/IF_ADC2/IF_ADC1",
1458
1459         "Null/IF_ADC1/IF_ADC2/DAC_REF",
1460         "Null/IF_ADC1/DAC_REF/IF_ADC2",
1461         "Null/IF_ADC2/IF_ADC1/DAC_REF",
1462         "Null/IF_ADC2/DAC_REF/IF_ADC1",
1463         "Null/DAC_REF/IF_ADC1/IF_ADC2",
1464         "Null/DAC_REF/IF_ADC2/IF_ADC1",
1465 };
1466
1467 static SOC_ENUM_SINGLE_DECL(
1468         rt5650_if1_adc_in_enum, RT5645_TDM_CTRL_2,
1469         0, rt5650_if1_adc_in_src);
1470
1471 static const struct snd_kcontrol_new rt5650_if1_adc_in_mux =
1472         SOC_DAPM_ENUM("IF1 ADC IN source", rt5650_if1_adc_in_enum);
1473
1474 /* MX-78 [15:14][13:12][11:10] */
1475 static const char * const rt5645_tdm_adc_swap_select[] = {
1476         "L/R", "R/L", "L/L", "R/R"
1477 };
1478
1479 static SOC_ENUM_SINGLE_DECL(rt5650_tdm_adc_slot0_1_enum,
1480         RT5645_TDM_CTRL_2, 14, rt5645_tdm_adc_swap_select);
1481
1482 static const struct snd_kcontrol_new rt5650_if1_adc1_in_mux =
1483         SOC_DAPM_ENUM("IF1 ADC1 IN source", rt5650_tdm_adc_slot0_1_enum);
1484
1485 static SOC_ENUM_SINGLE_DECL(rt5650_tdm_adc_slot2_3_enum,
1486         RT5645_TDM_CTRL_2, 12, rt5645_tdm_adc_swap_select);
1487
1488 static const struct snd_kcontrol_new rt5650_if1_adc2_in_mux =
1489         SOC_DAPM_ENUM("IF1 ADC2 IN source", rt5650_tdm_adc_slot2_3_enum);
1490
1491 static SOC_ENUM_SINGLE_DECL(rt5650_tdm_adc_slot4_5_enum,
1492         RT5645_TDM_CTRL_2, 10, rt5645_tdm_adc_swap_select);
1493
1494 static const struct snd_kcontrol_new rt5650_if1_adc3_in_mux =
1495         SOC_DAPM_ENUM("IF1 ADC3 IN source", rt5650_tdm_adc_slot4_5_enum);
1496
1497 /* MX-77 [7:6][5:4][3:2] */
1498 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_adc_slot0_1_enum,
1499         RT5645_TDM_CTRL_1, 6, rt5645_tdm_adc_swap_select);
1500
1501 static const struct snd_kcontrol_new rt5645_if1_adc1_in_mux =
1502         SOC_DAPM_ENUM("IF1 ADC1 IN source", rt5645_tdm_adc_slot0_1_enum);
1503
1504 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_adc_slot2_3_enum,
1505         RT5645_TDM_CTRL_1, 4, rt5645_tdm_adc_swap_select);
1506
1507 static const struct snd_kcontrol_new rt5645_if1_adc2_in_mux =
1508         SOC_DAPM_ENUM("IF1 ADC2 IN source", rt5645_tdm_adc_slot2_3_enum);
1509
1510 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_adc_slot4_5_enum,
1511         RT5645_TDM_CTRL_1, 2, rt5645_tdm_adc_swap_select);
1512
1513 static const struct snd_kcontrol_new rt5645_if1_adc3_in_mux =
1514         SOC_DAPM_ENUM("IF1 ADC3 IN source", rt5645_tdm_adc_slot4_5_enum);
1515
1516 /* MX-79 [14:12][10:8][6:4][2:0] */
1517 static const char * const rt5645_tdm_dac_swap_select[] = {
1518         "Slot0", "Slot1", "Slot2", "Slot3"
1519 };
1520
1521 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_dac0_enum,
1522         RT5645_TDM_CTRL_3, 12, rt5645_tdm_dac_swap_select);
1523
1524 static const struct snd_kcontrol_new rt5645_if1_dac0_tdm_sel_mux =
1525         SOC_DAPM_ENUM("IF1 DAC0 source", rt5645_tdm_dac0_enum);
1526
1527 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_dac1_enum,
1528         RT5645_TDM_CTRL_3, 8, rt5645_tdm_dac_swap_select);
1529
1530 static const struct snd_kcontrol_new rt5645_if1_dac1_tdm_sel_mux =
1531         SOC_DAPM_ENUM("IF1 DAC1 source", rt5645_tdm_dac1_enum);
1532
1533 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_dac2_enum,
1534         RT5645_TDM_CTRL_3, 4, rt5645_tdm_dac_swap_select);
1535
1536 static const struct snd_kcontrol_new rt5645_if1_dac2_tdm_sel_mux =
1537         SOC_DAPM_ENUM("IF1 DAC2 source", rt5645_tdm_dac2_enum);
1538
1539 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_dac3_enum,
1540         RT5645_TDM_CTRL_3, 0, rt5645_tdm_dac_swap_select);
1541
1542 static const struct snd_kcontrol_new rt5645_if1_dac3_tdm_sel_mux =
1543         SOC_DAPM_ENUM("IF1 DAC3 source", rt5645_tdm_dac3_enum);
1544
1545 /* MX-7a [14:12][10:8][6:4][2:0] */
1546 static SOC_ENUM_SINGLE_DECL(rt5650_tdm_dac0_enum,
1547         RT5650_TDM_CTRL_4, 12, rt5645_tdm_dac_swap_select);
1548
1549 static const struct snd_kcontrol_new rt5650_if1_dac0_tdm_sel_mux =
1550         SOC_DAPM_ENUM("IF1 DAC0 source", rt5650_tdm_dac0_enum);
1551
1552 static SOC_ENUM_SINGLE_DECL(rt5650_tdm_dac1_enum,
1553         RT5650_TDM_CTRL_4, 8, rt5645_tdm_dac_swap_select);
1554
1555 static const struct snd_kcontrol_new rt5650_if1_dac1_tdm_sel_mux =
1556         SOC_DAPM_ENUM("IF1 DAC1 source", rt5650_tdm_dac1_enum);
1557
1558 static SOC_ENUM_SINGLE_DECL(rt5650_tdm_dac2_enum,
1559         RT5650_TDM_CTRL_4, 4, rt5645_tdm_dac_swap_select);
1560
1561 static const struct snd_kcontrol_new rt5650_if1_dac2_tdm_sel_mux =
1562         SOC_DAPM_ENUM("IF1 DAC2 source", rt5650_tdm_dac2_enum);
1563
1564 static SOC_ENUM_SINGLE_DECL(rt5650_tdm_dac3_enum,
1565         RT5650_TDM_CTRL_4, 0, rt5645_tdm_dac_swap_select);
1566
1567 static const struct snd_kcontrol_new rt5650_if1_dac3_tdm_sel_mux =
1568         SOC_DAPM_ENUM("IF1 DAC3 source", rt5650_tdm_dac3_enum);
1569
1570 /* MX-2d [3] [2] */
1571 static const char * const rt5650_a_dac1_src[] = {
1572         "DAC1", "Stereo DAC Mixer"
1573 };
1574
1575 static SOC_ENUM_SINGLE_DECL(
1576         rt5650_a_dac1_l_enum, RT5650_A_DAC_SOUR,
1577         RT5650_A_DAC1_L_IN_SFT, rt5650_a_dac1_src);
1578
1579 static const struct snd_kcontrol_new rt5650_a_dac1_l_mux =
1580         SOC_DAPM_ENUM("A DAC1 L source", rt5650_a_dac1_l_enum);
1581
1582 static SOC_ENUM_SINGLE_DECL(
1583         rt5650_a_dac1_r_enum, RT5650_A_DAC_SOUR,
1584         RT5650_A_DAC1_R_IN_SFT, rt5650_a_dac1_src);
1585
1586 static const struct snd_kcontrol_new rt5650_a_dac1_r_mux =
1587         SOC_DAPM_ENUM("A DAC1 R source", rt5650_a_dac1_r_enum);
1588
1589 /* MX-2d [1] [0] */
1590 static const char * const rt5650_a_dac2_src[] = {
1591         "Stereo DAC Mixer", "Mono DAC Mixer"
1592 };
1593
1594 static SOC_ENUM_SINGLE_DECL(
1595         rt5650_a_dac2_l_enum, RT5650_A_DAC_SOUR,
1596         RT5650_A_DAC2_L_IN_SFT, rt5650_a_dac2_src);
1597
1598 static const struct snd_kcontrol_new rt5650_a_dac2_l_mux =
1599         SOC_DAPM_ENUM("A DAC2 L source", rt5650_a_dac2_l_enum);
1600
1601 static SOC_ENUM_SINGLE_DECL(
1602         rt5650_a_dac2_r_enum, RT5650_A_DAC_SOUR,
1603         RT5650_A_DAC2_R_IN_SFT, rt5650_a_dac2_src);
1604
1605 static const struct snd_kcontrol_new rt5650_a_dac2_r_mux =
1606         SOC_DAPM_ENUM("A DAC2 R source", rt5650_a_dac2_r_enum);
1607
1608 /* MX-2F [13:12] */
1609 static const char * const rt5645_if2_adc_in_src[] = {
1610         "IF_ADC1", "IF_ADC2", "VAD_ADC"
1611 };
1612
1613 static SOC_ENUM_SINGLE_DECL(
1614         rt5645_if2_adc_in_enum, RT5645_DIG_INF1_DATA,
1615         RT5645_IF2_ADC_IN_SFT, rt5645_if2_adc_in_src);
1616
1617 static const struct snd_kcontrol_new rt5645_if2_adc_in_mux =
1618         SOC_DAPM_ENUM("IF2 ADC IN source", rt5645_if2_adc_in_enum);
1619
1620 /* MX-31 [15] [13] [11] [9] */
1621 static const char * const rt5645_pdm_src[] = {
1622         "Mono DAC", "Stereo DAC"
1623 };
1624
1625 static SOC_ENUM_SINGLE_DECL(
1626         rt5645_pdm1_l_enum, RT5645_PDM_OUT_CTRL,
1627         RT5645_PDM1_L_SFT, rt5645_pdm_src);
1628
1629 static const struct snd_kcontrol_new rt5645_pdm1_l_mux =
1630         SOC_DAPM_ENUM("PDM1 L source", rt5645_pdm1_l_enum);
1631
1632 static SOC_ENUM_SINGLE_DECL(
1633         rt5645_pdm1_r_enum, RT5645_PDM_OUT_CTRL,
1634         RT5645_PDM1_R_SFT, rt5645_pdm_src);
1635
1636 static const struct snd_kcontrol_new rt5645_pdm1_r_mux =
1637         SOC_DAPM_ENUM("PDM1 R source", rt5645_pdm1_r_enum);
1638
1639 /* MX-9D [9:8] */
1640 static const char * const rt5645_vad_adc_src[] = {
1641         "Sto1 ADC L", "Mono ADC L", "Mono ADC R"
1642 };
1643
1644 static SOC_ENUM_SINGLE_DECL(
1645         rt5645_vad_adc_enum, RT5645_VAD_CTRL4,
1646         RT5645_VAD_SEL_SFT, rt5645_vad_adc_src);
1647
1648 static const struct snd_kcontrol_new rt5645_vad_adc_mux =
1649         SOC_DAPM_ENUM("VAD ADC source", rt5645_vad_adc_enum);
1650
1651 static const struct snd_kcontrol_new spk_l_vol_control =
1652         SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_SPK_VOL,
1653                 RT5645_L_MUTE_SFT, 1, 1);
1654
1655 static const struct snd_kcontrol_new spk_r_vol_control =
1656         SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_SPK_VOL,
1657                 RT5645_R_MUTE_SFT, 1, 1);
1658
1659 static const struct snd_kcontrol_new hp_l_vol_control =
1660         SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_HP_VOL,
1661                 RT5645_L_MUTE_SFT, 1, 1);
1662
1663 static const struct snd_kcontrol_new hp_r_vol_control =
1664         SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_HP_VOL,
1665                 RT5645_R_MUTE_SFT, 1, 1);
1666
1667 static const struct snd_kcontrol_new pdm1_l_vol_control =
1668         SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_PDM_OUT_CTRL,
1669                 RT5645_M_PDM1_L, 1, 1);
1670
1671 static const struct snd_kcontrol_new pdm1_r_vol_control =
1672         SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_PDM_OUT_CTRL,
1673                 RT5645_M_PDM1_R, 1, 1);
1674
1675 static void hp_amp_power(struct snd_soc_component *component, int on)
1676 {
1677         static int hp_amp_power_count;
1678         struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
1679         int i, val;
1680
1681         if (on) {
1682                 if (hp_amp_power_count <= 0) {
1683                         if (rt5645->codec_type == CODEC_TYPE_RT5650) {
1684                                 snd_soc_component_write(component, RT5645_DEPOP_M2, 0x3100);
1685                                 snd_soc_component_write(component, RT5645_CHARGE_PUMP,
1686                                         0x0e06);
1687                                 snd_soc_component_write(component, RT5645_DEPOP_M1, 0x000d);
1688                                 regmap_write(rt5645->regmap, RT5645_PR_BASE +
1689                                         RT5645_HP_DCC_INT1, 0x9f01);
1690                                 for (i = 0; i < 20; i++) {
1691                                         usleep_range(1000, 1500);
1692                                         regmap_read(rt5645->regmap, RT5645_PR_BASE +
1693                                                 RT5645_HP_DCC_INT1, &val);
1694                                         if (!(val & 0x8000))
1695                                                 break;
1696                                 }
1697                                 snd_soc_component_update_bits(component, RT5645_DEPOP_M1,
1698                                         RT5645_HP_CO_MASK, RT5645_HP_CO_EN);
1699                                 regmap_write(rt5645->regmap, RT5645_PR_BASE +
1700                                         0x3e, 0x7400);
1701                                 snd_soc_component_write(component, RT5645_DEPOP_M3, 0x0737);
1702                                 regmap_write(rt5645->regmap, RT5645_PR_BASE +
1703                                         RT5645_MAMP_INT_REG2, 0xfc00);
1704                                 snd_soc_component_write(component, RT5645_DEPOP_M2, 0x1140);
1705                                 snd_soc_component_update_bits(component, RT5645_PWR_ANLG1,
1706                                         RT5645_PWR_HP_L | RT5645_PWR_HP_R,
1707                                         RT5645_PWR_HP_L | RT5645_PWR_HP_R);
1708                                 msleep(90);
1709                         } else {
1710                                 /* depop parameters */
1711                                 snd_soc_component_update_bits(component, RT5645_DEPOP_M2,
1712                                         RT5645_DEPOP_MASK, RT5645_DEPOP_MAN);
1713                                 snd_soc_component_write(component, RT5645_DEPOP_M1, 0x000d);
1714                                 regmap_write(rt5645->regmap, RT5645_PR_BASE +
1715                                         RT5645_HP_DCC_INT1, 0x9f01);
1716                                 mdelay(150);
1717                                 /* headphone amp power on */
1718                                 snd_soc_component_update_bits(component, RT5645_PWR_ANLG1,
1719                                         RT5645_PWR_FV1 | RT5645_PWR_FV2, 0);
1720                                 snd_soc_component_update_bits(component, RT5645_PWR_VOL,
1721                                         RT5645_PWR_HV_L | RT5645_PWR_HV_R,
1722                                         RT5645_PWR_HV_L | RT5645_PWR_HV_R);
1723                                 snd_soc_component_update_bits(component, RT5645_PWR_ANLG1,
1724                                         RT5645_PWR_HP_L | RT5645_PWR_HP_R |
1725                                         RT5645_PWR_HA,
1726                                         RT5645_PWR_HP_L | RT5645_PWR_HP_R |
1727                                         RT5645_PWR_HA);
1728                                 mdelay(5);
1729                                 snd_soc_component_update_bits(component, RT5645_PWR_ANLG1,
1730                                         RT5645_PWR_FV1 | RT5645_PWR_FV2,
1731                                         RT5645_PWR_FV1 | RT5645_PWR_FV2);
1732
1733                                 snd_soc_component_update_bits(component, RT5645_DEPOP_M1,
1734                                         RT5645_HP_CO_MASK | RT5645_HP_SG_MASK,
1735                                         RT5645_HP_CO_EN | RT5645_HP_SG_EN);
1736                                 regmap_write(rt5645->regmap, RT5645_PR_BASE +
1737                                         0x14, 0x1aaa);
1738                                 regmap_write(rt5645->regmap, RT5645_PR_BASE +
1739                                         0x24, 0x0430);
1740                         }
1741                 }
1742                 hp_amp_power_count++;
1743         } else {
1744                 hp_amp_power_count--;
1745                 if (hp_amp_power_count <= 0) {
1746                         if (rt5645->codec_type == CODEC_TYPE_RT5650) {
1747                                 regmap_write(rt5645->regmap, RT5645_PR_BASE +
1748                                         0x3e, 0x7400);
1749                                 snd_soc_component_write(component, RT5645_DEPOP_M3, 0x0737);
1750                                 regmap_write(rt5645->regmap, RT5645_PR_BASE +
1751                                         RT5645_MAMP_INT_REG2, 0xfc00);
1752                                 snd_soc_component_write(component, RT5645_DEPOP_M2, 0x1140);
1753                                 msleep(100);
1754                                 snd_soc_component_write(component, RT5645_DEPOP_M1, 0x0001);
1755                                 snd_soc_component_update_bits(component, RT5645_PWR_ANLG1,
1756                                         RT5645_PWR_HP_L | RT5645_PWR_HP_R, 0);
1757                         } else {
1758                                 snd_soc_component_update_bits(component, RT5645_DEPOP_M1,
1759                                         RT5645_HP_SG_MASK |
1760                                         RT5645_HP_L_SMT_MASK |
1761                                         RT5645_HP_R_SMT_MASK,
1762                                         RT5645_HP_SG_DIS |
1763                                         RT5645_HP_L_SMT_DIS |
1764                                         RT5645_HP_R_SMT_DIS);
1765                                 /* headphone amp power down */
1766                                 snd_soc_component_write(component, RT5645_DEPOP_M1, 0x0000);
1767                                 snd_soc_component_update_bits(component, RT5645_PWR_ANLG1,
1768                                         RT5645_PWR_HP_L | RT5645_PWR_HP_R |
1769                                         RT5645_PWR_HA, 0);
1770                                 snd_soc_component_update_bits(component, RT5645_DEPOP_M2,
1771                                         RT5645_DEPOP_MASK, 0);
1772                         }
1773                 }
1774         }
1775 }
1776
1777 static int rt5645_hp_event(struct snd_soc_dapm_widget *w,
1778         struct snd_kcontrol *kcontrol, int event)
1779 {
1780         struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1781         struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
1782
1783         switch (event) {
1784         case SND_SOC_DAPM_POST_PMU:
1785                 hp_amp_power(component, 1);
1786                 /* headphone unmute sequence */
1787                 if (rt5645->codec_type == CODEC_TYPE_RT5645) {
1788                         snd_soc_component_update_bits(component, RT5645_DEPOP_M3,
1789                                 RT5645_CP_FQ1_MASK | RT5645_CP_FQ2_MASK |
1790                                 RT5645_CP_FQ3_MASK,
1791                                 (RT5645_CP_FQ_192_KHZ << RT5645_CP_FQ1_SFT) |
1792                                 (RT5645_CP_FQ_12_KHZ << RT5645_CP_FQ2_SFT) |
1793                                 (RT5645_CP_FQ_192_KHZ << RT5645_CP_FQ3_SFT));
1794                         regmap_write(rt5645->regmap, RT5645_PR_BASE +
1795                                 RT5645_MAMP_INT_REG2, 0xfc00);
1796                         snd_soc_component_update_bits(component, RT5645_DEPOP_M1,
1797                                 RT5645_SMT_TRIG_MASK, RT5645_SMT_TRIG_EN);
1798                         snd_soc_component_update_bits(component, RT5645_DEPOP_M1,
1799                                 RT5645_RSTN_MASK, RT5645_RSTN_EN);
1800                         snd_soc_component_update_bits(component, RT5645_DEPOP_M1,
1801                                 RT5645_RSTN_MASK | RT5645_HP_L_SMT_MASK |
1802                                 RT5645_HP_R_SMT_MASK, RT5645_RSTN_DIS |
1803                                 RT5645_HP_L_SMT_EN | RT5645_HP_R_SMT_EN);
1804                         msleep(40);
1805                         snd_soc_component_update_bits(component, RT5645_DEPOP_M1,
1806                                 RT5645_HP_SG_MASK | RT5645_HP_L_SMT_MASK |
1807                                 RT5645_HP_R_SMT_MASK, RT5645_HP_SG_DIS |
1808                                 RT5645_HP_L_SMT_DIS | RT5645_HP_R_SMT_DIS);
1809                 }
1810                 break;
1811
1812         case SND_SOC_DAPM_PRE_PMD:
1813                 /* headphone mute sequence */
1814                 if (rt5645->codec_type == CODEC_TYPE_RT5645) {
1815                         snd_soc_component_update_bits(component, RT5645_DEPOP_M3,
1816                                 RT5645_CP_FQ1_MASK | RT5645_CP_FQ2_MASK |
1817                                 RT5645_CP_FQ3_MASK,
1818                                 (RT5645_CP_FQ_96_KHZ << RT5645_CP_FQ1_SFT) |
1819                                 (RT5645_CP_FQ_12_KHZ << RT5645_CP_FQ2_SFT) |
1820                                 (RT5645_CP_FQ_96_KHZ << RT5645_CP_FQ3_SFT));
1821                         regmap_write(rt5645->regmap, RT5645_PR_BASE +
1822                                 RT5645_MAMP_INT_REG2, 0xfc00);
1823                         snd_soc_component_update_bits(component, RT5645_DEPOP_M1,
1824                                 RT5645_HP_SG_MASK, RT5645_HP_SG_EN);
1825                         snd_soc_component_update_bits(component, RT5645_DEPOP_M1,
1826                                 RT5645_RSTP_MASK, RT5645_RSTP_EN);
1827                         snd_soc_component_update_bits(component, RT5645_DEPOP_M1,
1828                                 RT5645_RSTP_MASK | RT5645_HP_L_SMT_MASK |
1829                                 RT5645_HP_R_SMT_MASK, RT5645_RSTP_DIS |
1830                                 RT5645_HP_L_SMT_EN | RT5645_HP_R_SMT_EN);
1831                         msleep(30);
1832                 }
1833                 hp_amp_power(component, 0);
1834                 break;
1835
1836         default:
1837                 return 0;
1838         }
1839
1840         return 0;
1841 }
1842
1843 static int rt5645_spk_event(struct snd_soc_dapm_widget *w,
1844         struct snd_kcontrol *kcontrol, int event)
1845 {
1846         struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1847
1848         switch (event) {
1849         case SND_SOC_DAPM_POST_PMU:
1850                 rt5645_enable_hweq(component);
1851                 snd_soc_component_update_bits(component, RT5645_PWR_DIG1,
1852                         RT5645_PWR_CLS_D | RT5645_PWR_CLS_D_R |
1853                         RT5645_PWR_CLS_D_L,
1854                         RT5645_PWR_CLS_D | RT5645_PWR_CLS_D_R |
1855                         RT5645_PWR_CLS_D_L);
1856                 snd_soc_component_update_bits(component, RT5645_GEN_CTRL3,
1857                         RT5645_DET_CLK_MASK, RT5645_DET_CLK_MODE1);
1858                 break;
1859
1860         case SND_SOC_DAPM_PRE_PMD:
1861                 snd_soc_component_update_bits(component, RT5645_GEN_CTRL3,
1862                         RT5645_DET_CLK_MASK, RT5645_DET_CLK_DIS);
1863                 snd_soc_component_write(component, RT5645_EQ_CTRL2, 0);
1864                 snd_soc_component_update_bits(component, RT5645_PWR_DIG1,
1865                         RT5645_PWR_CLS_D | RT5645_PWR_CLS_D_R |
1866                         RT5645_PWR_CLS_D_L, 0);
1867                 break;
1868
1869         default:
1870                 return 0;
1871         }
1872
1873         return 0;
1874 }
1875
1876 static int rt5645_lout_event(struct snd_soc_dapm_widget *w,
1877         struct snd_kcontrol *kcontrol, int event)
1878 {
1879         struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1880
1881         switch (event) {
1882         case SND_SOC_DAPM_POST_PMU:
1883                 hp_amp_power(component, 1);
1884                 snd_soc_component_update_bits(component, RT5645_PWR_ANLG1,
1885                         RT5645_PWR_LM, RT5645_PWR_LM);
1886                 snd_soc_component_update_bits(component, RT5645_LOUT1,
1887                         RT5645_L_MUTE | RT5645_R_MUTE, 0);
1888                 break;
1889
1890         case SND_SOC_DAPM_PRE_PMD:
1891                 snd_soc_component_update_bits(component, RT5645_LOUT1,
1892                         RT5645_L_MUTE | RT5645_R_MUTE,
1893                         RT5645_L_MUTE | RT5645_R_MUTE);
1894                 snd_soc_component_update_bits(component, RT5645_PWR_ANLG1,
1895                         RT5645_PWR_LM, 0);
1896                 hp_amp_power(component, 0);
1897                 break;
1898
1899         default:
1900                 return 0;
1901         }
1902
1903         return 0;
1904 }
1905
1906 static int rt5645_bst2_event(struct snd_soc_dapm_widget *w,
1907         struct snd_kcontrol *kcontrol, int event)
1908 {
1909         struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1910
1911         switch (event) {
1912         case SND_SOC_DAPM_POST_PMU:
1913                 snd_soc_component_update_bits(component, RT5645_PWR_ANLG2,
1914                         RT5645_PWR_BST2_P, RT5645_PWR_BST2_P);
1915                 break;
1916
1917         case SND_SOC_DAPM_PRE_PMD:
1918                 snd_soc_component_update_bits(component, RT5645_PWR_ANLG2,
1919                         RT5645_PWR_BST2_P, 0);
1920                 break;
1921
1922         default:
1923                 return 0;
1924         }
1925
1926         return 0;
1927 }
1928
1929 static int rt5645_set_micbias1_event(struct snd_soc_dapm_widget *w,
1930                 struct snd_kcontrol *k, int  event)
1931 {
1932         struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1933
1934         switch (event) {
1935         case SND_SOC_DAPM_PRE_PMU:
1936                 snd_soc_component_update_bits(component, RT5645_GEN_CTRL2,
1937                         RT5645_MICBIAS1_POW_CTRL_SEL_MASK,
1938                         RT5645_MICBIAS1_POW_CTRL_SEL_M);
1939                 break;
1940
1941         case SND_SOC_DAPM_POST_PMD:
1942                 snd_soc_component_update_bits(component, RT5645_GEN_CTRL2,
1943                         RT5645_MICBIAS1_POW_CTRL_SEL_MASK,
1944                         RT5645_MICBIAS1_POW_CTRL_SEL_A);
1945                 break;
1946
1947         default:
1948                 return 0;
1949         }
1950
1951         return 0;
1952 }
1953
1954 static int rt5645_set_micbias2_event(struct snd_soc_dapm_widget *w,
1955                 struct snd_kcontrol *k, int  event)
1956 {
1957         struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1958
1959         switch (event) {
1960         case SND_SOC_DAPM_PRE_PMU:
1961                 snd_soc_component_update_bits(component, RT5645_GEN_CTRL2,
1962                         RT5645_MICBIAS2_POW_CTRL_SEL_MASK,
1963                         RT5645_MICBIAS2_POW_CTRL_SEL_M);
1964                 break;
1965
1966         case SND_SOC_DAPM_POST_PMD:
1967                 snd_soc_component_update_bits(component, RT5645_GEN_CTRL2,
1968                         RT5645_MICBIAS2_POW_CTRL_SEL_MASK,
1969                         RT5645_MICBIAS2_POW_CTRL_SEL_A);
1970                 break;
1971
1972         default:
1973                 return 0;
1974         }
1975
1976         return 0;
1977 }
1978
1979 static const struct snd_soc_dapm_widget rt5645_dapm_widgets[] = {
1980         SND_SOC_DAPM_SUPPLY("LDO2", RT5645_PWR_MIXER,
1981                 RT5645_PWR_LDO2_BIT, 0, NULL, 0),
1982         SND_SOC_DAPM_SUPPLY("PLL1", RT5645_PWR_ANLG2,
1983                 RT5645_PWR_PLL_BIT, 0, NULL, 0),
1984
1985         SND_SOC_DAPM_SUPPLY("JD Power", RT5645_PWR_ANLG2,
1986                 RT5645_PWR_JD1_BIT, 0, NULL, 0),
1987         SND_SOC_DAPM_SUPPLY("Mic Det Power", RT5645_PWR_VOL,
1988                 RT5645_PWR_MIC_DET_BIT, 0, NULL, 0),
1989
1990         /* ASRC */
1991         SND_SOC_DAPM_SUPPLY_S("I2S1 ASRC", 1, RT5645_ASRC_1,
1992                               11, 0, NULL, 0),
1993         SND_SOC_DAPM_SUPPLY_S("I2S2 ASRC", 1, RT5645_ASRC_1,
1994                               12, 0, NULL, 0),
1995         SND_SOC_DAPM_SUPPLY_S("DAC STO ASRC", 1, RT5645_ASRC_1,
1996                               10, 0, NULL, 0),
1997         SND_SOC_DAPM_SUPPLY_S("DAC MONO L ASRC", 1, RT5645_ASRC_1,
1998                               9, 0, NULL, 0),
1999         SND_SOC_DAPM_SUPPLY_S("DAC MONO R ASRC", 1, RT5645_ASRC_1,
2000                               8, 0, NULL, 0),
2001         SND_SOC_DAPM_SUPPLY_S("DMIC STO1 ASRC", 1, RT5645_ASRC_1,
2002                               7, 0, NULL, 0),
2003         SND_SOC_DAPM_SUPPLY_S("DMIC MONO L ASRC", 1, RT5645_ASRC_1,
2004                               5, 0, NULL, 0),
2005         SND_SOC_DAPM_SUPPLY_S("DMIC MONO R ASRC", 1, RT5645_ASRC_1,
2006                               4, 0, NULL, 0),
2007         SND_SOC_DAPM_SUPPLY_S("ADC STO1 ASRC", 1, RT5645_ASRC_1,
2008                               3, 0, NULL, 0),
2009         SND_SOC_DAPM_SUPPLY_S("ADC MONO L ASRC", 1, RT5645_ASRC_1,
2010                               1, 0, NULL, 0),
2011         SND_SOC_DAPM_SUPPLY_S("ADC MONO R ASRC", 1, RT5645_ASRC_1,
2012                               0, 0, NULL, 0),
2013
2014         /* Input Side */
2015         /* micbias */
2016         SND_SOC_DAPM_SUPPLY("micbias1", RT5645_PWR_ANLG2,
2017                         RT5645_PWR_MB1_BIT, 0, rt5645_set_micbias1_event,
2018                         SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
2019         SND_SOC_DAPM_SUPPLY("micbias2", RT5645_PWR_ANLG2,
2020                         RT5645_PWR_MB2_BIT, 0, rt5645_set_micbias2_event,
2021                         SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
2022         /* Input Lines */
2023         SND_SOC_DAPM_INPUT("DMIC L1"),
2024         SND_SOC_DAPM_INPUT("DMIC R1"),
2025         SND_SOC_DAPM_INPUT("DMIC L2"),
2026         SND_SOC_DAPM_INPUT("DMIC R2"),
2027
2028         SND_SOC_DAPM_INPUT("IN1P"),
2029         SND_SOC_DAPM_INPUT("IN1N"),
2030         SND_SOC_DAPM_INPUT("IN2P"),
2031         SND_SOC_DAPM_INPUT("IN2N"),
2032
2033         SND_SOC_DAPM_INPUT("Haptic Generator"),
2034
2035         SND_SOC_DAPM_PGA("DMIC1", SND_SOC_NOPM, 0, 0, NULL, 0),
2036         SND_SOC_DAPM_PGA("DMIC2", SND_SOC_NOPM, 0, 0, NULL, 0),
2037         SND_SOC_DAPM_SUPPLY("DMIC CLK", SND_SOC_NOPM, 0, 0,
2038                 set_dmic_clk, SND_SOC_DAPM_PRE_PMU),
2039         SND_SOC_DAPM_SUPPLY("DMIC1 Power", RT5645_DMIC_CTRL1,
2040                 RT5645_DMIC_1_EN_SFT, 0, NULL, 0),
2041         SND_SOC_DAPM_SUPPLY("DMIC2 Power", RT5645_DMIC_CTRL1,
2042                 RT5645_DMIC_2_EN_SFT, 0, NULL, 0),
2043         /* Boost */
2044         SND_SOC_DAPM_PGA("BST1", RT5645_PWR_ANLG2,
2045                 RT5645_PWR_BST1_BIT, 0, NULL, 0),
2046         SND_SOC_DAPM_PGA_E("BST2", RT5645_PWR_ANLG2,
2047                 RT5645_PWR_BST2_BIT, 0, NULL, 0, rt5645_bst2_event,
2048                 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
2049         /* Input Volume */
2050         SND_SOC_DAPM_PGA("INL VOL", RT5645_PWR_VOL,
2051                 RT5645_PWR_IN_L_BIT, 0, NULL, 0),
2052         SND_SOC_DAPM_PGA("INR VOL", RT5645_PWR_VOL,
2053                 RT5645_PWR_IN_R_BIT, 0, NULL, 0),
2054         /* REC Mixer */
2055         SND_SOC_DAPM_MIXER("RECMIXL", RT5645_PWR_MIXER, RT5645_PWR_RM_L_BIT,
2056                         0, rt5645_rec_l_mix, ARRAY_SIZE(rt5645_rec_l_mix)),
2057         SND_SOC_DAPM_MIXER("RECMIXR", RT5645_PWR_MIXER, RT5645_PWR_RM_R_BIT,
2058                         0, rt5645_rec_r_mix, ARRAY_SIZE(rt5645_rec_r_mix)),
2059         /* ADCs */
2060         SND_SOC_DAPM_ADC("ADC L", NULL, SND_SOC_NOPM, 0, 0),
2061         SND_SOC_DAPM_ADC("ADC R", NULL, SND_SOC_NOPM, 0, 0),
2062
2063         SND_SOC_DAPM_SUPPLY("ADC L power", RT5645_PWR_DIG1,
2064                 RT5645_PWR_ADC_L_BIT, 0, NULL, 0),
2065         SND_SOC_DAPM_SUPPLY("ADC R power", RT5645_PWR_DIG1,
2066                 RT5645_PWR_ADC_R_BIT, 0, NULL, 0),
2067
2068         /* ADC Mux */
2069         SND_SOC_DAPM_MUX("Stereo1 DMIC Mux", SND_SOC_NOPM, 0, 0,
2070                 &rt5645_sto1_dmic_mux),
2071         SND_SOC_DAPM_MUX("Stereo1 ADC L2 Mux", SND_SOC_NOPM, 0, 0,
2072                 &rt5645_sto_adc2_mux),
2073         SND_SOC_DAPM_MUX("Stereo1 ADC R2 Mux", SND_SOC_NOPM, 0, 0,
2074                 &rt5645_sto_adc2_mux),
2075         SND_SOC_DAPM_MUX("Stereo1 ADC L1 Mux", SND_SOC_NOPM, 0, 0,
2076                 &rt5645_sto_adc1_mux),
2077         SND_SOC_DAPM_MUX("Stereo1 ADC R1 Mux", SND_SOC_NOPM, 0, 0,
2078                 &rt5645_sto_adc1_mux),
2079         SND_SOC_DAPM_MUX("Mono DMIC L Mux", SND_SOC_NOPM, 0, 0,
2080                 &rt5645_mono_dmic_l_mux),
2081         SND_SOC_DAPM_MUX("Mono DMIC R Mux", SND_SOC_NOPM, 0, 0,
2082                 &rt5645_mono_dmic_r_mux),
2083         SND_SOC_DAPM_MUX("Mono ADC L2 Mux", SND_SOC_NOPM, 0, 0,
2084                 &rt5645_mono_adc_l2_mux),
2085         SND_SOC_DAPM_MUX("Mono ADC L1 Mux", SND_SOC_NOPM, 0, 0,
2086                 &rt5645_mono_adc_l1_mux),
2087         SND_SOC_DAPM_MUX("Mono ADC R1 Mux", SND_SOC_NOPM, 0, 0,
2088                 &rt5645_mono_adc_r1_mux),
2089         SND_SOC_DAPM_MUX("Mono ADC R2 Mux", SND_SOC_NOPM, 0, 0,
2090                 &rt5645_mono_adc_r2_mux),
2091         /* ADC Mixer */
2092
2093         SND_SOC_DAPM_SUPPLY_S("adc stereo1 filter", 1, RT5645_PWR_DIG2,
2094                 RT5645_PWR_ADC_S1F_BIT, 0, NULL, 0),
2095         SND_SOC_DAPM_MIXER_E("Sto1 ADC MIXL", SND_SOC_NOPM, 0, 0,
2096                 rt5645_sto1_adc_l_mix, ARRAY_SIZE(rt5645_sto1_adc_l_mix),
2097                 NULL, 0),
2098         SND_SOC_DAPM_MIXER_E("Sto1 ADC MIXR", SND_SOC_NOPM, 0, 0,
2099                 rt5645_sto1_adc_r_mix, ARRAY_SIZE(rt5645_sto1_adc_r_mix),
2100                 NULL, 0),
2101         SND_SOC_DAPM_SUPPLY_S("adc mono left filter", 1, RT5645_PWR_DIG2,
2102                 RT5645_PWR_ADC_MF_L_BIT, 0, NULL, 0),
2103         SND_SOC_DAPM_MIXER_E("Mono ADC MIXL", SND_SOC_NOPM, 0, 0,
2104                 rt5645_mono_adc_l_mix, ARRAY_SIZE(rt5645_mono_adc_l_mix),
2105                 NULL, 0),
2106         SND_SOC_DAPM_SUPPLY_S("adc mono right filter", 1, RT5645_PWR_DIG2,
2107                 RT5645_PWR_ADC_MF_R_BIT, 0, NULL, 0),
2108         SND_SOC_DAPM_MIXER_E("Mono ADC MIXR", SND_SOC_NOPM, 0, 0,
2109                 rt5645_mono_adc_r_mix, ARRAY_SIZE(rt5645_mono_adc_r_mix),
2110                 NULL, 0),
2111
2112         /* ADC PGA */
2113         SND_SOC_DAPM_PGA("Stereo1 ADC MIXL", SND_SOC_NOPM, 0, 0, NULL, 0),
2114         SND_SOC_DAPM_PGA("Stereo1 ADC MIXR", SND_SOC_NOPM, 0, 0, NULL, 0),
2115         SND_SOC_DAPM_PGA("Sto2 ADC LR MIX", SND_SOC_NOPM, 0, 0, NULL, 0),
2116         SND_SOC_DAPM_PGA("VAD_ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
2117         SND_SOC_DAPM_PGA("IF_ADC1", SND_SOC_NOPM, 0, 0, NULL, 0),
2118         SND_SOC_DAPM_PGA("IF_ADC2", SND_SOC_NOPM, 0, 0, NULL, 0),
2119         SND_SOC_DAPM_PGA("IF1_ADC1", SND_SOC_NOPM, 0, 0, NULL, 0),
2120         SND_SOC_DAPM_PGA("IF1_ADC2", SND_SOC_NOPM, 0, 0, NULL, 0),
2121         SND_SOC_DAPM_PGA("IF1_ADC3", SND_SOC_NOPM, 0, 0, NULL, 0),
2122         SND_SOC_DAPM_PGA("IF1_ADC4", SND_SOC_NOPM, 0, 0, NULL, 0),
2123
2124         /* IF1 2 Mux */
2125         SND_SOC_DAPM_MUX("IF2 ADC Mux", SND_SOC_NOPM,
2126                 0, 0, &rt5645_if2_adc_in_mux),
2127
2128         /* Digital Interface */
2129         SND_SOC_DAPM_SUPPLY("I2S1", RT5645_PWR_DIG1,
2130                 RT5645_PWR_I2S1_BIT, 0, NULL, 0),
2131         SND_SOC_DAPM_PGA("IF1 DAC0", SND_SOC_NOPM, 0, 0, NULL, 0),
2132         SND_SOC_DAPM_PGA("IF1 DAC1", SND_SOC_NOPM, 0, 0, NULL, 0),
2133         SND_SOC_DAPM_PGA("IF1 DAC2", SND_SOC_NOPM, 0, 0, NULL, 0),
2134         SND_SOC_DAPM_PGA("IF1 DAC3", SND_SOC_NOPM, 0, 0, NULL, 0),
2135         SND_SOC_DAPM_PGA("IF1 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
2136         SND_SOC_DAPM_PGA("IF1 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
2137         SND_SOC_DAPM_PGA("IF1 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
2138         SND_SOC_DAPM_SUPPLY("I2S2", RT5645_PWR_DIG1,
2139                 RT5645_PWR_I2S2_BIT, 0, NULL, 0),
2140         SND_SOC_DAPM_PGA("IF2 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
2141         SND_SOC_DAPM_PGA("IF2 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
2142         SND_SOC_DAPM_PGA("IF2 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
2143         SND_SOC_DAPM_PGA("IF2 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
2144
2145         /* Digital Interface Select */
2146         SND_SOC_DAPM_MUX("VAD ADC Mux", SND_SOC_NOPM,
2147                 0, 0, &rt5645_vad_adc_mux),
2148
2149         /* Audio Interface */
2150         SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
2151         SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0),
2152         SND_SOC_DAPM_AIF_IN("AIF2RX", "AIF2 Playback", 0, SND_SOC_NOPM, 0, 0),
2153         SND_SOC_DAPM_AIF_OUT("AIF2TX", "AIF2 Capture", 0, SND_SOC_NOPM, 0, 0),
2154
2155         /* Output Side */
2156         /* DAC mixer before sound effect  */
2157         SND_SOC_DAPM_MIXER("DAC1 MIXL", SND_SOC_NOPM, 0, 0,
2158                 rt5645_dac_l_mix, ARRAY_SIZE(rt5645_dac_l_mix)),
2159         SND_SOC_DAPM_MIXER("DAC1 MIXR", SND_SOC_NOPM, 0, 0,
2160                 rt5645_dac_r_mix, ARRAY_SIZE(rt5645_dac_r_mix)),
2161
2162         /* DAC2 channel Mux */
2163         SND_SOC_DAPM_MUX("DAC L2 Mux", SND_SOC_NOPM, 0, 0, &rt5645_dac_l2_mux),
2164         SND_SOC_DAPM_MUX("DAC R2 Mux", SND_SOC_NOPM, 0, 0, &rt5645_dac_r2_mux),
2165         SND_SOC_DAPM_PGA("DAC L2 Volume", RT5645_PWR_DIG1,
2166                 RT5645_PWR_DAC_L2_BIT, 0, NULL, 0),
2167         SND_SOC_DAPM_PGA("DAC R2 Volume", RT5645_PWR_DIG1,
2168                 RT5645_PWR_DAC_R2_BIT, 0, NULL, 0),
2169
2170         SND_SOC_DAPM_MUX("DAC1 L Mux", SND_SOC_NOPM, 0, 0, &rt5645_dac1l_mux),
2171         SND_SOC_DAPM_MUX("DAC1 R Mux", SND_SOC_NOPM, 0, 0, &rt5645_dac1r_mux),
2172
2173         /* DAC Mixer */
2174         SND_SOC_DAPM_SUPPLY_S("dac stereo1 filter", 1, RT5645_PWR_DIG2,
2175                 RT5645_PWR_DAC_S1F_BIT, 0, NULL, 0),
2176         SND_SOC_DAPM_SUPPLY_S("dac mono left filter", 1, RT5645_PWR_DIG2,
2177                 RT5645_PWR_DAC_MF_L_BIT, 0, NULL, 0),
2178         SND_SOC_DAPM_SUPPLY_S("dac mono right filter", 1, RT5645_PWR_DIG2,
2179                 RT5645_PWR_DAC_MF_R_BIT, 0, NULL, 0),
2180         SND_SOC_DAPM_MIXER("Stereo DAC MIXL", SND_SOC_NOPM, 0, 0,
2181                 rt5645_sto_dac_l_mix, ARRAY_SIZE(rt5645_sto_dac_l_mix)),
2182         SND_SOC_DAPM_MIXER("Stereo DAC MIXR", SND_SOC_NOPM, 0, 0,
2183                 rt5645_sto_dac_r_mix, ARRAY_SIZE(rt5645_sto_dac_r_mix)),
2184         SND_SOC_DAPM_MIXER("Mono DAC MIXL", SND_SOC_NOPM, 0, 0,
2185                 rt5645_mono_dac_l_mix, ARRAY_SIZE(rt5645_mono_dac_l_mix)),
2186         SND_SOC_DAPM_MIXER("Mono DAC MIXR", SND_SOC_NOPM, 0, 0,
2187                 rt5645_mono_dac_r_mix, ARRAY_SIZE(rt5645_mono_dac_r_mix)),
2188         SND_SOC_DAPM_MIXER("DAC MIXL", SND_SOC_NOPM, 0, 0,
2189                 rt5645_dig_l_mix, ARRAY_SIZE(rt5645_dig_l_mix)),
2190         SND_SOC_DAPM_MIXER("DAC MIXR", SND_SOC_NOPM, 0, 0,
2191                 rt5645_dig_r_mix, ARRAY_SIZE(rt5645_dig_r_mix)),
2192
2193         /* DACs */
2194         SND_SOC_DAPM_DAC("DAC L1", NULL, RT5645_PWR_DIG1, RT5645_PWR_DAC_L1_BIT,
2195                 0),
2196         SND_SOC_DAPM_DAC("DAC L2", NULL, RT5645_PWR_DIG1, RT5645_PWR_DAC_L2_BIT,
2197                 0),
2198         SND_SOC_DAPM_DAC("DAC R1", NULL, RT5645_PWR_DIG1, RT5645_PWR_DAC_R1_BIT,
2199                 0),
2200         SND_SOC_DAPM_DAC("DAC R2", NULL, RT5645_PWR_DIG1, RT5645_PWR_DAC_R2_BIT,
2201                 0),
2202         /* OUT Mixer */
2203         SND_SOC_DAPM_MIXER("SPK MIXL", RT5645_PWR_MIXER, RT5645_PWR_SM_L_BIT,
2204                 0, rt5645_spk_l_mix, ARRAY_SIZE(rt5645_spk_l_mix)),
2205         SND_SOC_DAPM_MIXER("SPK MIXR", RT5645_PWR_MIXER, RT5645_PWR_SM_R_BIT,
2206                 0, rt5645_spk_r_mix, ARRAY_SIZE(rt5645_spk_r_mix)),
2207         SND_SOC_DAPM_MIXER("OUT MIXL", RT5645_PWR_MIXER, RT5645_PWR_OM_L_BIT,
2208                 0, rt5645_out_l_mix, ARRAY_SIZE(rt5645_out_l_mix)),
2209         SND_SOC_DAPM_MIXER("OUT MIXR", RT5645_PWR_MIXER, RT5645_PWR_OM_R_BIT,
2210                 0, rt5645_out_r_mix, ARRAY_SIZE(rt5645_out_r_mix)),
2211         /* Ouput Volume */
2212         SND_SOC_DAPM_SWITCH("SPKVOL L", RT5645_PWR_VOL, RT5645_PWR_SV_L_BIT, 0,
2213                 &spk_l_vol_control),
2214         SND_SOC_DAPM_SWITCH("SPKVOL R", RT5645_PWR_VOL, RT5645_PWR_SV_R_BIT, 0,
2215                 &spk_r_vol_control),
2216         SND_SOC_DAPM_MIXER("HPOVOL MIXL", RT5645_PWR_VOL, RT5645_PWR_HV_L_BIT,
2217                 0, rt5645_hpvoll_mix, ARRAY_SIZE(rt5645_hpvoll_mix)),
2218         SND_SOC_DAPM_MIXER("HPOVOL MIXR", RT5645_PWR_VOL, RT5645_PWR_HV_R_BIT,
2219                 0, rt5645_hpvolr_mix, ARRAY_SIZE(rt5645_hpvolr_mix)),
2220         SND_SOC_DAPM_SUPPLY("HPOVOL MIXL Power", RT5645_PWR_MIXER,
2221                 RT5645_PWR_HM_L_BIT, 0, NULL, 0),
2222         SND_SOC_DAPM_SUPPLY("HPOVOL MIXR Power", RT5645_PWR_MIXER,
2223                 RT5645_PWR_HM_R_BIT, 0, NULL, 0),
2224         SND_SOC_DAPM_PGA("DAC 1", SND_SOC_NOPM, 0, 0, NULL, 0),
2225         SND_SOC_DAPM_PGA("DAC 2", SND_SOC_NOPM, 0, 0, NULL, 0),
2226         SND_SOC_DAPM_PGA("HPOVOL", SND_SOC_NOPM, 0, 0, NULL, 0),
2227         SND_SOC_DAPM_SWITCH("HPOVOL L", SND_SOC_NOPM, 0, 0, &hp_l_vol_control),
2228         SND_SOC_DAPM_SWITCH("HPOVOL R", SND_SOC_NOPM, 0, 0, &hp_r_vol_control),
2229
2230         /* HPO/LOUT/Mono Mixer */
2231         SND_SOC_DAPM_MIXER("SPOL MIX", SND_SOC_NOPM, 0, 0, rt5645_spo_l_mix,
2232                 ARRAY_SIZE(rt5645_spo_l_mix)),
2233         SND_SOC_DAPM_MIXER("SPOR MIX", SND_SOC_NOPM, 0, 0, rt5645_spo_r_mix,
2234                 ARRAY_SIZE(rt5645_spo_r_mix)),
2235         SND_SOC_DAPM_MIXER("HPO MIX", SND_SOC_NOPM, 0, 0, rt5645_hpo_mix,
2236                 ARRAY_SIZE(rt5645_hpo_mix)),
2237         SND_SOC_DAPM_MIXER("LOUT MIX", SND_SOC_NOPM, 0, 0, rt5645_lout_mix,
2238                 ARRAY_SIZE(rt5645_lout_mix)),
2239
2240         SND_SOC_DAPM_PGA_S("HP amp", 1, SND_SOC_NOPM, 0, 0, rt5645_hp_event,
2241                 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
2242         SND_SOC_DAPM_PGA_S("LOUT amp", 1, SND_SOC_NOPM, 0, 0, rt5645_lout_event,
2243                 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
2244         SND_SOC_DAPM_PGA_S("SPK amp", 2, SND_SOC_NOPM, 0, 0, rt5645_spk_event,
2245                 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
2246
2247         /* PDM */
2248         SND_SOC_DAPM_SUPPLY("PDM1 Power", RT5645_PWR_DIG2, RT5645_PWR_PDM1_BIT,
2249                 0, NULL, 0),
2250         SND_SOC_DAPM_MUX("PDM1 L Mux", SND_SOC_NOPM, 0, 0, &rt5645_pdm1_l_mux),
2251         SND_SOC_DAPM_MUX("PDM1 R Mux", SND_SOC_NOPM, 0, 0, &rt5645_pdm1_r_mux),
2252
2253         SND_SOC_DAPM_SWITCH("PDM1 L", SND_SOC_NOPM, 0, 0, &pdm1_l_vol_control),
2254         SND_SOC_DAPM_SWITCH("PDM1 R", SND_SOC_NOPM, 0, 0, &pdm1_r_vol_control),
2255
2256         /* Output Lines */
2257         SND_SOC_DAPM_OUTPUT("HPOL"),
2258         SND_SOC_DAPM_OUTPUT("HPOR"),
2259         SND_SOC_DAPM_OUTPUT("LOUTL"),
2260         SND_SOC_DAPM_OUTPUT("LOUTR"),
2261         SND_SOC_DAPM_OUTPUT("PDM1L"),
2262         SND_SOC_DAPM_OUTPUT("PDM1R"),
2263         SND_SOC_DAPM_OUTPUT("SPOL"),
2264         SND_SOC_DAPM_OUTPUT("SPOR"),
2265 };
2266
2267 static const struct snd_soc_dapm_widget rt5645_specific_dapm_widgets[] = {
2268         SND_SOC_DAPM_MUX("RT5645 IF1 DAC1 L Mux", SND_SOC_NOPM, 0, 0,
2269                 &rt5645_if1_dac0_tdm_sel_mux),
2270         SND_SOC_DAPM_MUX("RT5645 IF1 DAC1 R Mux", SND_SOC_NOPM, 0, 0,
2271                 &rt5645_if1_dac1_tdm_sel_mux),
2272         SND_SOC_DAPM_MUX("RT5645 IF1 DAC2 L Mux", SND_SOC_NOPM, 0, 0,
2273                 &rt5645_if1_dac2_tdm_sel_mux),
2274         SND_SOC_DAPM_MUX("RT5645 IF1 DAC2 R Mux", SND_SOC_NOPM, 0, 0,
2275                 &rt5645_if1_dac3_tdm_sel_mux),
2276         SND_SOC_DAPM_MUX("RT5645 IF1 ADC Mux", SND_SOC_NOPM,
2277                 0, 0, &rt5645_if1_adc_in_mux),
2278         SND_SOC_DAPM_MUX("RT5645 IF1 ADC1 Swap Mux", SND_SOC_NOPM,
2279                 0, 0, &rt5645_if1_adc1_in_mux),
2280         SND_SOC_DAPM_MUX("RT5645 IF1 ADC2 Swap Mux", SND_SOC_NOPM,
2281                 0, 0, &rt5645_if1_adc2_in_mux),
2282         SND_SOC_DAPM_MUX("RT5645 IF1 ADC3 Swap Mux", SND_SOC_NOPM,
2283                 0, 0, &rt5645_if1_adc3_in_mux),
2284 };
2285
2286 static const struct snd_soc_dapm_widget rt5650_specific_dapm_widgets[] = {
2287         SND_SOC_DAPM_MUX("A DAC1 L Mux", SND_SOC_NOPM,
2288                 0, 0, &rt5650_a_dac1_l_mux),
2289         SND_SOC_DAPM_MUX("A DAC1 R Mux", SND_SOC_NOPM,
2290                 0, 0, &rt5650_a_dac1_r_mux),
2291         SND_SOC_DAPM_MUX("A DAC2 L Mux", SND_SOC_NOPM,
2292                 0, 0, &rt5650_a_dac2_l_mux),
2293         SND_SOC_DAPM_MUX("A DAC2 R Mux", SND_SOC_NOPM,
2294                 0, 0, &rt5650_a_dac2_r_mux),
2295
2296         SND_SOC_DAPM_MUX("RT5650 IF1 ADC1 Swap Mux", SND_SOC_NOPM,
2297                 0, 0, &rt5650_if1_adc1_in_mux),
2298         SND_SOC_DAPM_MUX("RT5650 IF1 ADC2 Swap Mux", SND_SOC_NOPM,
2299                 0, 0, &rt5650_if1_adc2_in_mux),
2300         SND_SOC_DAPM_MUX("RT5650 IF1 ADC3 Swap Mux", SND_SOC_NOPM,
2301                 0, 0, &rt5650_if1_adc3_in_mux),
2302         SND_SOC_DAPM_MUX("RT5650 IF1 ADC Mux", SND_SOC_NOPM,
2303                 0, 0, &rt5650_if1_adc_in_mux),
2304
2305         SND_SOC_DAPM_MUX("RT5650 IF1 DAC1 L Mux", SND_SOC_NOPM, 0, 0,
2306                 &rt5650_if1_dac0_tdm_sel_mux),
2307         SND_SOC_DAPM_MUX("RT5650 IF1 DAC1 R Mux", SND_SOC_NOPM, 0, 0,
2308                 &rt5650_if1_dac1_tdm_sel_mux),
2309         SND_SOC_DAPM_MUX("RT5650 IF1 DAC2 L Mux", SND_SOC_NOPM, 0, 0,
2310                 &rt5650_if1_dac2_tdm_sel_mux),
2311         SND_SOC_DAPM_MUX("RT5650 IF1 DAC2 R Mux", SND_SOC_NOPM, 0, 0,
2312                 &rt5650_if1_dac3_tdm_sel_mux),
2313 };
2314
2315 static const struct snd_soc_dapm_route rt5645_dapm_routes[] = {
2316         { "adc stereo1 filter", NULL, "ADC STO1 ASRC", is_using_asrc },
2317         { "adc mono left filter", NULL, "ADC MONO L ASRC", is_using_asrc },
2318         { "adc mono right filter", NULL, "ADC MONO R ASRC", is_using_asrc },
2319         { "dac mono left filter", NULL, "DAC MONO L ASRC", is_using_asrc },
2320         { "dac mono right filter", NULL, "DAC MONO R ASRC", is_using_asrc },
2321         { "dac stereo1 filter", NULL, "DAC STO ASRC", is_using_asrc },
2322
2323         { "I2S1", NULL, "I2S1 ASRC" },
2324         { "I2S2", NULL, "I2S2 ASRC" },
2325
2326         { "IN1P", NULL, "LDO2" },
2327         { "IN2P", NULL, "LDO2" },
2328
2329         { "DMIC1", NULL, "DMIC L1" },
2330         { "DMIC1", NULL, "DMIC R1" },
2331         { "DMIC2", NULL, "DMIC L2" },
2332         { "DMIC2", NULL, "DMIC R2" },
2333
2334         { "BST1", NULL, "IN1P" },
2335         { "BST1", NULL, "IN1N" },
2336         { "BST1", NULL, "JD Power" },
2337         { "BST1", NULL, "Mic Det Power" },
2338         { "BST2", NULL, "IN2P" },
2339         { "BST2", NULL, "IN2N" },
2340
2341         { "INL VOL", NULL, "IN2P" },
2342         { "INR VOL", NULL, "IN2N" },
2343
2344         { "RECMIXL", "HPOL Switch", "HPOL" },
2345         { "RECMIXL", "INL Switch", "INL VOL" },
2346         { "RECMIXL", "BST2 Switch", "BST2" },
2347         { "RECMIXL", "BST1 Switch", "BST1" },
2348         { "RECMIXL", "OUT MIXL Switch", "OUT MIXL" },
2349
2350         { "RECMIXR", "HPOR Switch", "HPOR" },
2351         { "RECMIXR", "INR Switch", "INR VOL" },
2352         { "RECMIXR", "BST2 Switch", "BST2" },
2353         { "RECMIXR", "BST1 Switch", "BST1" },
2354         { "RECMIXR", "OUT MIXR Switch", "OUT MIXR" },
2355
2356         { "ADC L", NULL, "RECMIXL" },
2357         { "ADC L", NULL, "ADC L power" },
2358         { "ADC R", NULL, "RECMIXR" },
2359         { "ADC R", NULL, "ADC R power" },
2360
2361         {"DMIC L1", NULL, "DMIC CLK"},
2362         {"DMIC L1", NULL, "DMIC1 Power"},
2363         {"DMIC R1", NULL, "DMIC CLK"},
2364         {"DMIC R1", NULL, "DMIC1 Power"},
2365         {"DMIC L2", NULL, "DMIC CLK"},
2366         {"DMIC L2", NULL, "DMIC2 Power"},
2367         {"DMIC R2", NULL, "DMIC CLK"},
2368         {"DMIC R2", NULL, "DMIC2 Power"},
2369
2370         { "Stereo1 DMIC Mux", "DMIC1", "DMIC1" },
2371         { "Stereo1 DMIC Mux", "DMIC2", "DMIC2" },
2372         { "Stereo1 DMIC Mux", NULL, "DMIC STO1 ASRC" },
2373
2374         { "Mono DMIC L Mux", "DMIC1", "DMIC L1" },
2375         { "Mono DMIC L Mux", "DMIC2", "DMIC L2" },
2376         { "Mono DMIC L Mux", NULL, "DMIC MONO L ASRC" },
2377
2378         { "Mono DMIC R Mux", "DMIC1", "DMIC R1" },
2379         { "Mono DMIC R Mux", "DMIC2", "DMIC R2" },
2380         { "Mono DMIC R Mux", NULL, "DMIC MONO R ASRC" },
2381
2382         { "Stereo1 ADC L2 Mux", "DMIC", "Stereo1 DMIC Mux" },
2383         { "Stereo1 ADC L2 Mux", "DAC MIX", "DAC MIXL" },
2384         { "Stereo1 ADC L1 Mux", "ADC", "ADC L" },
2385         { "Stereo1 ADC L1 Mux", "DAC MIX", "DAC MIXL" },
2386
2387         { "Stereo1 ADC R1 Mux", "ADC", "ADC R" },
2388         { "Stereo1 ADC R1 Mux", "DAC MIX", "DAC MIXR" },
2389         { "Stereo1 ADC R2 Mux", "DMIC", "Stereo1 DMIC Mux" },
2390         { "Stereo1 ADC R2 Mux", "DAC MIX", "DAC MIXR" },
2391
2392         { "Mono ADC L2 Mux", "DMIC", "Mono DMIC L Mux" },
2393         { "Mono ADC L2 Mux", "Mono DAC MIXL", "Mono DAC MIXL" },
2394         { "Mono ADC L1 Mux", "Mono DAC MIXL", "Mono DAC MIXL" },
2395         { "Mono ADC L1 Mux", "ADC", "ADC L" },
2396
2397         { "Mono ADC R1 Mux", "Mono DAC MIXR", "Mono DAC MIXR" },
2398         { "Mono ADC R1 Mux", "ADC", "ADC R" },
2399         { "Mono ADC R2 Mux", "DMIC", "Mono DMIC R Mux" },
2400         { "Mono ADC R2 Mux", "Mono DAC MIXR", "Mono DAC MIXR" },
2401
2402         { "Sto1 ADC MIXL", "ADC1 Switch", "Stereo1 ADC L1 Mux" },
2403         { "Sto1 ADC MIXL", "ADC2 Switch", "Stereo1 ADC L2 Mux" },
2404         { "Sto1 ADC MIXR", "ADC1 Switch", "Stereo1 ADC R1 Mux" },
2405         { "Sto1 ADC MIXR", "ADC2 Switch", "Stereo1 ADC R2 Mux" },
2406
2407         { "Stereo1 ADC MIXL", NULL, "Sto1 ADC MIXL" },
2408         { "Stereo1 ADC MIXL", NULL, "adc stereo1 filter" },
2409         { "adc stereo1 filter", NULL, "PLL1", is_sys_clk_from_pll },
2410
2411         { "Stereo1 ADC MIXR", NULL, "Sto1 ADC MIXR" },
2412         { "Stereo1 ADC MIXR", NULL, "adc stereo1 filter" },
2413         { "adc stereo1 filter", NULL, "PLL1", is_sys_clk_from_pll },
2414
2415         { "Mono ADC MIXL", "ADC1 Switch", "Mono ADC L1 Mux" },
2416         { "Mono ADC MIXL", "ADC2 Switch", "Mono ADC L2 Mux" },
2417         { "Mono ADC MIXL", NULL, "adc mono left filter" },
2418         { "adc mono left filter", NULL, "PLL1", is_sys_clk_from_pll },
2419
2420         { "Mono ADC MIXR", "ADC1 Switch", "Mono ADC R1 Mux" },
2421         { "Mono ADC MIXR", "ADC2 Switch", "Mono ADC R2 Mux" },
2422         { "Mono ADC MIXR", NULL, "adc mono right filter" },
2423         { "adc mono right filter", NULL, "PLL1", is_sys_clk_from_pll },
2424
2425         { "VAD ADC Mux", "Sto1 ADC L", "Stereo1 ADC MIXL" },
2426         { "VAD ADC Mux", "Mono ADC L", "Mono ADC MIXL" },
2427         { "VAD ADC Mux", "Mono ADC R", "Mono ADC MIXR" },
2428
2429         { "IF_ADC1", NULL, "Stereo1 ADC MIXL" },
2430         { "IF_ADC1", NULL, "Stereo1 ADC MIXR" },
2431         { "IF_ADC2", NULL, "Mono ADC MIXL" },
2432         { "IF_ADC2", NULL, "Mono ADC MIXR" },
2433         { "VAD_ADC", NULL, "VAD ADC Mux" },
2434
2435         { "IF2 ADC Mux", "IF_ADC1", "IF_ADC1" },
2436         { "IF2 ADC Mux", "IF_ADC2", "IF_ADC2" },
2437         { "IF2 ADC Mux", "VAD_ADC", "VAD_ADC" },
2438
2439         { "IF1 ADC", NULL, "I2S1" },
2440         { "IF2 ADC", NULL, "I2S2" },
2441         { "IF2 ADC", NULL, "IF2 ADC Mux" },
2442
2443         { "AIF2TX", NULL, "IF2 ADC" },
2444
2445         { "IF1 DAC0", NULL, "AIF1RX" },
2446         { "IF1 DAC1", NULL, "AIF1RX" },
2447         { "IF1 DAC2", NULL, "AIF1RX" },
2448         { "IF1 DAC3", NULL, "AIF1RX" },
2449         { "IF2 DAC", NULL, "AIF2RX" },
2450
2451         { "IF1 DAC0", NULL, "I2S1" },
2452         { "IF1 DAC1", NULL, "I2S1" },
2453         { "IF1 DAC2", NULL, "I2S1" },
2454         { "IF1 DAC3", NULL, "I2S1" },
2455         { "IF2 DAC", NULL, "I2S2" },
2456
2457         { "IF2 DAC L", NULL, "IF2 DAC" },
2458         { "IF2 DAC R", NULL, "IF2 DAC" },
2459
2460         { "DAC1 L Mux", "IF2 DAC", "IF2 DAC L" },
2461         { "DAC1 R Mux", "IF2 DAC", "IF2 DAC R" },
2462
2463         { "DAC1 MIXL", "Stereo ADC Switch", "Stereo1 ADC MIXL" },
2464         { "DAC1 MIXL", "DAC1 Switch", "DAC1 L Mux" },
2465         { "DAC1 MIXL", NULL, "dac stereo1 filter" },
2466         { "DAC1 MIXR", "Stereo ADC Switch", "Stereo1 ADC MIXR" },
2467         { "DAC1 MIXR", "DAC1 Switch", "DAC1 R Mux" },
2468         { "DAC1 MIXR", NULL, "dac stereo1 filter" },
2469
2470         { "DAC L2 Mux", "IF2 DAC", "IF2 DAC L" },
2471         { "DAC L2 Mux", "Mono ADC", "Mono ADC MIXL" },
2472         { "DAC L2 Mux", "VAD_ADC", "VAD_ADC" },
2473         { "DAC L2 Volume", NULL, "DAC L2 Mux" },
2474         { "DAC L2 Volume", NULL, "dac mono left filter" },
2475
2476         { "DAC R2 Mux", "IF2 DAC", "IF2 DAC R" },
2477         { "DAC R2 Mux", "Mono ADC", "Mono ADC MIXR" },
2478         { "DAC R2 Mux", "Haptic", "Haptic Generator" },
2479         { "DAC R2 Volume", NULL, "DAC R2 Mux" },
2480         { "DAC R2 Volume", NULL, "dac mono right filter" },
2481
2482         { "Stereo DAC MIXL", "DAC L1 Switch", "DAC1 MIXL" },
2483         { "Stereo DAC MIXL", "DAC R1 Switch", "DAC1 MIXR" },
2484         { "Stereo DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" },
2485         { "Stereo DAC MIXL", NULL, "dac stereo1 filter" },
2486         { "Stereo DAC MIXR", "DAC R1 Switch", "DAC1 MIXR" },
2487         { "Stereo DAC MIXR", "DAC L1 Switch", "DAC1 MIXL" },
2488         { "Stereo DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" },
2489         { "Stereo DAC MIXR", NULL, "dac stereo1 filter" },
2490
2491         { "Mono DAC MIXL", "DAC L1 Switch", "DAC1 MIXL" },
2492         { "Mono DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" },
2493         { "Mono DAC MIXL", "DAC R2 Switch", "DAC R2 Volume" },
2494         { "Mono DAC MIXL", NULL, "dac mono left filter" },
2495         { "Mono DAC MIXR", "DAC R1 Switch", "DAC1 MIXR" },
2496         { "Mono DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" },
2497         { "Mono DAC MIXR", "DAC L2 Switch", "DAC L2 Volume" },
2498         { "Mono DAC MIXR", NULL, "dac mono right filter" },
2499
2500         { "DAC MIXL", "Sto DAC Mix L Switch", "Stereo DAC MIXL" },
2501         { "DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" },
2502         { "DAC MIXL", "DAC R2 Switch", "DAC R2 Volume" },
2503         { "DAC MIXR", "Sto DAC Mix R Switch", "Stereo DAC MIXR" },
2504         { "DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" },
2505         { "DAC MIXR", "DAC L2 Switch", "DAC L2 Volume" },
2506
2507         { "DAC L1", NULL, "PLL1", is_sys_clk_from_pll },
2508         { "DAC R1", NULL, "PLL1", is_sys_clk_from_pll },
2509         { "DAC L2", NULL, "PLL1", is_sys_clk_from_pll },
2510         { "DAC R2", NULL, "PLL1", is_sys_clk_from_pll },
2511
2512         { "SPK MIXL", "BST1 Switch", "BST1" },
2513         { "SPK MIXL", "INL Switch", "INL VOL" },
2514         { "SPK MIXL", "DAC L1 Switch", "DAC L1" },
2515         { "SPK MIXL", "DAC L2 Switch", "DAC L2" },
2516         { "SPK MIXR", "BST2 Switch", "BST2" },
2517         { "SPK MIXR", "INR Switch", "INR VOL" },
2518         { "SPK MIXR", "DAC R1 Switch", "DAC R1" },
2519         { "SPK MIXR", "DAC R2 Switch", "DAC R2" },
2520
2521         { "OUT MIXL", "BST1 Switch", "BST1" },
2522         { "OUT MIXL", "INL Switch", "INL VOL" },
2523         { "OUT MIXL", "DAC L2 Switch", "DAC L2" },
2524         { "OUT MIXL", "DAC L1 Switch", "DAC L1" },
2525
2526         { "OUT MIXR", "BST2 Switch", "BST2" },
2527         { "OUT MIXR", "INR Switch", "INR VOL" },
2528         { "OUT MIXR", "DAC R2 Switch", "DAC R2" },
2529         { "OUT MIXR", "DAC R1 Switch", "DAC R1" },
2530
2531         { "HPOVOL MIXL", "DAC1 Switch", "DAC L1" },
2532         { "HPOVOL MIXL", "DAC2 Switch", "DAC L2" },
2533         { "HPOVOL MIXL", "INL Switch", "INL VOL" },
2534         { "HPOVOL MIXL", "BST1 Switch", "BST1" },
2535         { "HPOVOL MIXL", NULL, "HPOVOL MIXL Power" },
2536         { "HPOVOL MIXR", "DAC1 Switch", "DAC R1" },
2537         { "HPOVOL MIXR", "DAC2 Switch", "DAC R2" },
2538         { "HPOVOL MIXR", "INR Switch", "INR VOL" },
2539         { "HPOVOL MIXR", "BST2 Switch", "BST2" },
2540         { "HPOVOL MIXR", NULL, "HPOVOL MIXR Power" },
2541
2542         { "DAC 2", NULL, "DAC L2" },
2543         { "DAC 2", NULL, "DAC R2" },
2544         { "DAC 1", NULL, "DAC L1" },
2545         { "DAC 1", NULL, "DAC R1" },
2546         { "HPOVOL L", "Switch", "HPOVOL MIXL" },
2547         { "HPOVOL R", "Switch", "HPOVOL MIXR" },
2548         { "HPOVOL", NULL, "HPOVOL L" },
2549         { "HPOVOL", NULL, "HPOVOL R" },
2550         { "HPO MIX", "DAC1 Switch", "DAC 1" },
2551         { "HPO MIX", "HPVOL Switch", "HPOVOL" },
2552
2553         { "SPKVOL L", "Switch", "SPK MIXL" },
2554         { "SPKVOL R", "Switch", "SPK MIXR" },
2555
2556         { "SPOL MIX", "DAC L1 Switch", "DAC L1" },
2557         { "SPOL MIX", "SPKVOL L Switch", "SPKVOL L" },
2558         { "SPOR MIX", "DAC R1 Switch", "DAC R1" },
2559         { "SPOR MIX", "SPKVOL R Switch", "SPKVOL R" },
2560
2561         { "LOUT MIX", "DAC L1 Switch", "DAC L1" },
2562         { "LOUT MIX", "DAC R1 Switch", "DAC R1" },
2563         { "LOUT MIX", "OUTMIX L Switch", "OUT MIXL" },
2564         { "LOUT MIX", "OUTMIX R Switch", "OUT MIXR" },
2565
2566         { "PDM1 L Mux", "Stereo DAC", "Stereo DAC MIXL" },
2567         { "PDM1 L Mux", "Mono DAC", "Mono DAC MIXL" },
2568         { "PDM1 L Mux", NULL, "PDM1 Power" },
2569         { "PDM1 R Mux", "Stereo DAC", "Stereo DAC MIXR" },
2570         { "PDM1 R Mux", "Mono DAC", "Mono DAC MIXR" },
2571         { "PDM1 R Mux", NULL, "PDM1 Power" },
2572
2573         { "HP amp", NULL, "HPO MIX" },
2574         { "HP amp", NULL, "JD Power" },
2575         { "HP amp", NULL, "Mic Det Power" },
2576         { "HP amp", NULL, "LDO2" },
2577         { "HPOL", NULL, "HP amp" },
2578         { "HPOR", NULL, "HP amp" },
2579
2580         { "LOUT amp", NULL, "LOUT MIX" },
2581         { "LOUTL", NULL, "LOUT amp" },
2582         { "LOUTR", NULL, "LOUT amp" },
2583
2584         { "PDM1 L", "Switch", "PDM1 L Mux" },
2585         { "PDM1 R", "Switch", "PDM1 R Mux" },
2586
2587         { "PDM1L", NULL, "PDM1 L" },
2588         { "PDM1R", NULL, "PDM1 R" },
2589
2590         { "SPK amp", NULL, "SPOL MIX" },
2591         { "SPK amp", NULL, "SPOR MIX" },
2592         { "SPOL", NULL, "SPK amp" },
2593         { "SPOR", NULL, "SPK amp" },
2594 };
2595
2596 static const struct snd_soc_dapm_route rt5650_specific_dapm_routes[] = {
2597         { "A DAC1 L Mux", "DAC1",  "DAC1 MIXL"},
2598         { "A DAC1 L Mux", "Stereo DAC Mixer", "Stereo DAC MIXL"},
2599         { "A DAC1 R Mux", "DAC1",  "DAC1 MIXR"},
2600         { "A DAC1 R Mux", "Stereo DAC Mixer", "Stereo DAC MIXR"},
2601
2602         { "A DAC2 L Mux", "Stereo DAC Mixer", "Stereo DAC MIXL"},
2603         { "A DAC2 L Mux", "Mono DAC Mixer", "Mono DAC MIXL"},
2604         { "A DAC2 R Mux", "Stereo DAC Mixer", "Stereo DAC MIXR"},
2605         { "A DAC2 R Mux", "Mono DAC Mixer", "Mono DAC MIXR"},
2606
2607         { "DAC L1", NULL, "A DAC1 L Mux" },
2608         { "DAC R1", NULL, "A DAC1 R Mux" },
2609         { "DAC L2", NULL, "A DAC2 L Mux" },
2610         { "DAC R2", NULL, "A DAC2 R Mux" },
2611
2612         { "RT5650 IF1 ADC1 Swap Mux", "L/R", "IF_ADC1" },
2613         { "RT5650 IF1 ADC1 Swap Mux", "R/L", "IF_ADC1" },
2614         { "RT5650 IF1 ADC1 Swap Mux", "L/L", "IF_ADC1" },
2615         { "RT5650 IF1 ADC1 Swap Mux", "R/R", "IF_ADC1" },
2616
2617         { "RT5650 IF1 ADC2 Swap Mux", "L/R", "IF_ADC2" },
2618         { "RT5650 IF1 ADC2 Swap Mux", "R/L", "IF_ADC2" },
2619         { "RT5650 IF1 ADC2 Swap Mux", "L/L", "IF_ADC2" },
2620         { "RT5650 IF1 ADC2 Swap Mux", "R/R", "IF_ADC2" },
2621
2622         { "RT5650 IF1 ADC3 Swap Mux", "L/R", "VAD_ADC" },
2623         { "RT5650 IF1 ADC3 Swap Mux", "R/L", "VAD_ADC" },
2624         { "RT5650 IF1 ADC3 Swap Mux", "L/L", "VAD_ADC" },
2625         { "RT5650 IF1 ADC3 Swap Mux", "R/R", "VAD_ADC" },
2626
2627         { "IF1 ADC", NULL, "RT5650 IF1 ADC1 Swap Mux" },
2628         { "IF1 ADC", NULL, "RT5650 IF1 ADC2 Swap Mux" },
2629         { "IF1 ADC", NULL, "RT5650 IF1 ADC3 Swap Mux" },
2630
2631         { "RT5650 IF1 ADC Mux", "IF_ADC1/IF_ADC2/DAC_REF/Null", "IF1 ADC" },
2632         { "RT5650 IF1 ADC Mux", "IF_ADC1/IF_ADC2/Null/DAC_REF", "IF1 ADC" },
2633         { "RT5650 IF1 ADC Mux", "IF_ADC1/DAC_REF/IF_ADC2/Null", "IF1 ADC" },
2634         { "RT5650 IF1 ADC Mux", "IF_ADC1/DAC_REF/Null/IF_ADC2", "IF1 ADC" },
2635         { "RT5650 IF1 ADC Mux", "IF_ADC1/Null/DAC_REF/IF_ADC2", "IF1 ADC" },
2636         { "RT5650 IF1 ADC Mux", "IF_ADC1/Null/IF_ADC2/DAC_REF", "IF1 ADC" },
2637
2638         { "RT5650 IF1 ADC Mux", "IF_ADC2/IF_ADC1/DAC_REF/Null", "IF1 ADC" },
2639         { "RT5650 IF1 ADC Mux", "IF_ADC2/IF_ADC1/Null/DAC_REF", "IF1 ADC" },
2640         { "RT5650 IF1 ADC Mux", "IF_ADC2/DAC_REF/IF_ADC1/Null", "IF1 ADC" },
2641         { "RT5650 IF1 ADC Mux", "IF_ADC2/DAC_REF/Null/IF_ADC1", "IF1 ADC" },
2642         { "RT5650 IF1 ADC Mux", "IF_ADC2/Null/DAC_REF/IF_ADC1", "IF1 ADC" },
2643         { "RT5650 IF1 ADC Mux", "IF_ADC2/Null/IF_ADC1/DAC_REF", "IF1 ADC" },
2644
2645         { "RT5650 IF1 ADC Mux", "DAC_REF/IF_ADC1/IF_ADC2/Null", "IF1 ADC" },
2646         { "RT5650 IF1 ADC Mux", "DAC_REF/IF_ADC1/Null/IF_ADC2", "IF1 ADC" },
2647         { "RT5650 IF1 ADC Mux", "DAC_REF/IF_ADC2/IF_ADC1/Null", "IF1 ADC" },
2648         { "RT5650 IF1 ADC Mux", "DAC_REF/IF_ADC2/Null/IF_ADC1", "IF1 ADC" },
2649         { "RT5650 IF1 ADC Mux", "DAC_REF/Null/IF_ADC1/IF_ADC2", "IF1 ADC" },
2650         { "RT5650 IF1 ADC Mux", "DAC_REF/Null/IF_ADC2/IF_ADC1", "IF1 ADC" },
2651
2652         { "RT5650 IF1 ADC Mux", "Null/IF_ADC1/IF_ADC2/DAC_REF", "IF1 ADC" },
2653         { "RT5650 IF1 ADC Mux", "Null/IF_ADC1/DAC_REF/IF_ADC2", "IF1 ADC" },
2654         { "RT5650 IF1 ADC Mux", "Null/IF_ADC2/IF_ADC1/DAC_REF", "IF1 ADC" },
2655         { "RT5650 IF1 ADC Mux", "Null/IF_ADC2/DAC_REF/IF_ADC1", "IF1 ADC" },
2656         { "RT5650 IF1 ADC Mux", "Null/DAC_REF/IF_ADC1/IF_ADC2", "IF1 ADC" },
2657         { "RT5650 IF1 ADC Mux", "Null/DAC_REF/IF_ADC2/IF_ADC1", "IF1 ADC" },
2658         { "AIF1TX", NULL, "RT5650 IF1 ADC Mux" },
2659
2660         { "RT5650 IF1 DAC1 L Mux", "Slot0", "IF1 DAC0" },
2661         { "RT5650 IF1 DAC1 L Mux", "Slot1", "IF1 DAC1" },
2662         { "RT5650 IF1 DAC1 L Mux", "Slot2", "IF1 DAC2" },
2663         { "RT5650 IF1 DAC1 L Mux", "Slot3", "IF1 DAC3" },
2664
2665         { "RT5650 IF1 DAC1 R Mux", "Slot0", "IF1 DAC0" },
2666         { "RT5650 IF1 DAC1 R Mux", "Slot1", "IF1 DAC1" },
2667         { "RT5650 IF1 DAC1 R Mux", "Slot2", "IF1 DAC2" },
2668         { "RT5650 IF1 DAC1 R Mux", "Slot3", "IF1 DAC3" },
2669
2670         { "RT5650 IF1 DAC2 L Mux", "Slot0", "IF1 DAC0" },
2671         { "RT5650 IF1 DAC2 L Mux", "Slot1", "IF1 DAC1" },
2672         { "RT5650 IF1 DAC2 L Mux", "Slot2", "IF1 DAC2" },
2673         { "RT5650 IF1 DAC2 L Mux", "Slot3", "IF1 DAC3" },
2674
2675         { "RT5650 IF1 DAC2 R Mux", "Slot0", "IF1 DAC0" },
2676         { "RT5650 IF1 DAC2 R Mux", "Slot1", "IF1 DAC1" },
2677         { "RT5650 IF1 DAC2 R Mux", "Slot2", "IF1 DAC2" },
2678         { "RT5650 IF1 DAC2 R Mux", "Slot3", "IF1 DAC3" },
2679
2680         { "DAC1 L Mux", "IF1 DAC", "RT5650 IF1 DAC1 L Mux" },
2681         { "DAC1 R Mux", "IF1 DAC", "RT5650 IF1 DAC1 R Mux" },
2682
2683         { "DAC L2 Mux", "IF1 DAC", "RT5650 IF1 DAC2 L Mux" },
2684         { "DAC R2 Mux", "IF1 DAC", "RT5650 IF1 DAC2 R Mux" },
2685 };
2686
2687 static const struct snd_soc_dapm_route rt5645_specific_dapm_routes[] = {
2688         { "DAC L1", NULL, "Stereo DAC MIXL" },
2689         { "DAC R1", NULL, "Stereo DAC MIXR" },
2690         { "DAC L2", NULL, "Mono DAC MIXL" },
2691         { "DAC R2", NULL, "Mono DAC MIXR" },
2692
2693         { "RT5645 IF1 ADC1 Swap Mux", "L/R", "IF_ADC1" },
2694         { "RT5645 IF1 ADC1 Swap Mux", "R/L", "IF_ADC1" },
2695         { "RT5645 IF1 ADC1 Swap Mux", "L/L", "IF_ADC1" },
2696         { "RT5645 IF1 ADC1 Swap Mux", "R/R", "IF_ADC1" },
2697
2698         { "RT5645 IF1 ADC2 Swap Mux", "L/R", "IF_ADC2" },
2699         { "RT5645 IF1 ADC2 Swap Mux", "R/L", "IF_ADC2" },
2700         { "RT5645 IF1 ADC2 Swap Mux", "L/L", "IF_ADC2" },
2701         { "RT5645 IF1 ADC2 Swap Mux", "R/R", "IF_ADC2" },
2702
2703         { "RT5645 IF1 ADC3 Swap Mux", "L/R", "VAD_ADC" },
2704         { "RT5645 IF1 ADC3 Swap Mux", "R/L", "VAD_ADC" },
2705         { "RT5645 IF1 ADC3 Swap Mux", "L/L", "VAD_ADC" },
2706         { "RT5645 IF1 ADC3 Swap Mux", "R/R", "VAD_ADC" },
2707
2708         { "IF1 ADC", NULL, "RT5645 IF1 ADC1 Swap Mux" },
2709         { "IF1 ADC", NULL, "RT5645 IF1 ADC2 Swap Mux" },
2710         { "IF1 ADC", NULL, "RT5645 IF1 ADC3 Swap Mux" },
2711
2712         { "RT5645 IF1 ADC Mux", "IF_ADC1/IF_ADC2/VAD_ADC", "IF1 ADC" },
2713         { "RT5645 IF1 ADC Mux", "IF_ADC2/IF_ADC1/VAD_ADC", "IF1 ADC" },
2714         { "RT5645 IF1 ADC Mux", "VAD_ADC/IF_ADC1/IF_ADC2", "IF1 ADC" },
2715         { "RT5645 IF1 ADC Mux", "VAD_ADC/IF_ADC2/IF_ADC1", "IF1 ADC" },
2716         { "AIF1TX", NULL, "RT5645 IF1 ADC Mux" },
2717
2718         { "RT5645 IF1 DAC1 L Mux", "Slot0", "IF1 DAC0" },
2719         { "RT5645 IF1 DAC1 L Mux", "Slot1", "IF1 DAC1" },
2720         { "RT5645 IF1 DAC1 L Mux", "Slot2", "IF1 DAC2" },
2721         { "RT5645 IF1 DAC1 L Mux", "Slot3", "IF1 DAC3" },
2722
2723         { "RT5645 IF1 DAC1 R Mux", "Slot0", "IF1 DAC0" },
2724         { "RT5645 IF1 DAC1 R Mux", "Slot1", "IF1 DAC1" },
2725         { "RT5645 IF1 DAC1 R Mux", "Slot2", "IF1 DAC2" },
2726         { "RT5645 IF1 DAC1 R Mux", "Slot3", "IF1 DAC3" },
2727
2728         { "RT5645 IF1 DAC2 L Mux", "Slot0", "IF1 DAC0" },
2729         { "RT5645 IF1 DAC2 L Mux", "Slot1", "IF1 DAC1" },
2730         { "RT5645 IF1 DAC2 L Mux", "Slot2", "IF1 DAC2" },
2731         { "RT5645 IF1 DAC2 L Mux", "Slot3", "IF1 DAC3" },
2732
2733         { "RT5645 IF1 DAC2 R Mux", "Slot0", "IF1 DAC0" },
2734         { "RT5645 IF1 DAC2 R Mux", "Slot1", "IF1 DAC1" },
2735         { "RT5645 IF1 DAC2 R Mux", "Slot2", "IF1 DAC2" },
2736         { "RT5645 IF1 DAC2 R Mux", "Slot3", "IF1 DAC3" },
2737
2738         { "DAC1 L Mux", "IF1 DAC", "RT5645 IF1 DAC1 L Mux" },
2739         { "DAC1 R Mux", "IF1 DAC", "RT5645 IF1 DAC1 R Mux" },
2740
2741         { "DAC L2 Mux", "IF1 DAC", "RT5645 IF1 DAC2 L Mux" },
2742         { "DAC R2 Mux", "IF1 DAC", "RT5645 IF1 DAC2 R Mux" },
2743 };
2744
2745 static const struct snd_soc_dapm_route rt5645_old_dapm_routes[] = {
2746         { "SPOL MIX", "DAC R1 Switch", "DAC R1" },
2747         { "SPOL MIX", "SPKVOL R Switch", "SPKVOL R" },
2748 };
2749
2750 static int rt5645_hw_params(struct snd_pcm_substream *substream,
2751         struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
2752 {
2753         struct snd_soc_component *component = dai->component;
2754         struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
2755         unsigned int val_len = 0, val_clk, mask_clk, dl_sft;
2756         int pre_div, bclk_ms, frame_size;
2757
2758         rt5645->lrck[dai->id] = params_rate(params);
2759         pre_div = rl6231_get_clk_info(rt5645->sysclk, rt5645->lrck[dai->id]);
2760         if (pre_div < 0) {
2761                 dev_err(component->dev, "Unsupported clock setting\n");
2762                 return -EINVAL;
2763         }
2764         frame_size = snd_soc_params_to_frame_size(params);
2765         if (frame_size < 0) {
2766                 dev_err(component->dev, "Unsupported frame size: %d\n", frame_size);
2767                 return -EINVAL;
2768         }
2769
2770         switch (rt5645->codec_type) {
2771         case CODEC_TYPE_RT5650:
2772                 dl_sft = 4;
2773                 break;
2774         default:
2775                 dl_sft = 2;
2776                 break;
2777         }
2778
2779         bclk_ms = frame_size > 32;
2780         rt5645->bclk[dai->id] = rt5645->lrck[dai->id] * (32 << bclk_ms);
2781
2782         dev_dbg(dai->dev, "bclk is %dHz and lrck is %dHz\n",
2783                 rt5645->bclk[dai->id], rt5645->lrck[dai->id]);
2784         dev_dbg(dai->dev, "bclk_ms is %d and pre_div is %d for iis %d\n",
2785                                 bclk_ms, pre_div, dai->id);
2786
2787         switch (params_width(params)) {
2788         case 16:
2789                 break;
2790         case 20:
2791                 val_len = 0x1;
2792                 break;
2793         case 24:
2794                 val_len = 0x2;
2795                 break;
2796         case 8:
2797                 val_len = 0x3;
2798                 break;
2799         default:
2800                 return -EINVAL;
2801         }
2802
2803         switch (dai->id) {
2804         case RT5645_AIF1:
2805                 mask_clk = RT5645_I2S_PD1_MASK;
2806                 val_clk = pre_div << RT5645_I2S_PD1_SFT;
2807                 snd_soc_component_update_bits(component, RT5645_I2S1_SDP,
2808                         (0x3 << dl_sft), (val_len << dl_sft));
2809                 snd_soc_component_update_bits(component, RT5645_ADDA_CLK1, mask_clk, val_clk);
2810                 break;
2811         case  RT5645_AIF2:
2812                 mask_clk = RT5645_I2S_BCLK_MS2_MASK | RT5645_I2S_PD2_MASK;
2813                 val_clk = bclk_ms << RT5645_I2S_BCLK_MS2_SFT |
2814                         pre_div << RT5645_I2S_PD2_SFT;
2815                 snd_soc_component_update_bits(component, RT5645_I2S2_SDP,
2816                         (0x3 << dl_sft), (val_len << dl_sft));
2817                 snd_soc_component_update_bits(component, RT5645_ADDA_CLK1, mask_clk, val_clk);
2818                 break;
2819         default:
2820                 dev_err(component->dev, "Invalid dai->id: %d\n", dai->id);
2821                 return -EINVAL;
2822         }
2823
2824         return 0;
2825 }
2826
2827 static int rt5645_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
2828 {
2829         struct snd_soc_component *component = dai->component;
2830         struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
2831         unsigned int reg_val = 0, pol_sft;
2832
2833         switch (rt5645->codec_type) {
2834         case CODEC_TYPE_RT5650:
2835                 pol_sft = 8;
2836                 break;
2837         default:
2838                 pol_sft = 7;
2839                 break;
2840         }
2841
2842         switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
2843         case SND_SOC_DAIFMT_CBM_CFM:
2844                 rt5645->master[dai->id] = 1;
2845                 break;
2846         case SND_SOC_DAIFMT_CBS_CFS:
2847                 reg_val |= RT5645_I2S_MS_S;
2848                 rt5645->master[dai->id] = 0;
2849                 break;
2850         default:
2851                 return -EINVAL;
2852         }
2853
2854         switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
2855         case SND_SOC_DAIFMT_NB_NF:
2856                 break;
2857         case SND_SOC_DAIFMT_IB_NF:
2858                 reg_val |= (1 << pol_sft);
2859                 break;
2860         default:
2861                 return -EINVAL;
2862         }
2863
2864         switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
2865         case SND_SOC_DAIFMT_I2S:
2866                 break;
2867         case SND_SOC_DAIFMT_LEFT_J:
2868                 reg_val |= RT5645_I2S_DF_LEFT;
2869                 break;
2870         case SND_SOC_DAIFMT_DSP_A:
2871                 reg_val |= RT5645_I2S_DF_PCM_A;
2872                 break;
2873         case SND_SOC_DAIFMT_DSP_B:
2874                 reg_val |= RT5645_I2S_DF_PCM_B;
2875                 break;
2876         default:
2877                 return -EINVAL;
2878         }
2879         switch (dai->id) {
2880         case RT5645_AIF1:
2881                 snd_soc_component_update_bits(component, RT5645_I2S1_SDP,
2882                         RT5645_I2S_MS_MASK | (1 << pol_sft) |
2883                         RT5645_I2S_DF_MASK, reg_val);
2884                 break;
2885         case RT5645_AIF2:
2886                 snd_soc_component_update_bits(component, RT5645_I2S2_SDP,
2887                         RT5645_I2S_MS_MASK | (1 << pol_sft) |
2888                         RT5645_I2S_DF_MASK, reg_val);
2889                 break;
2890         default:
2891                 dev_err(component->dev, "Invalid dai->id: %d\n", dai->id);
2892                 return -EINVAL;
2893         }
2894         return 0;
2895 }
2896
2897 static int rt5645_set_dai_sysclk(struct snd_soc_dai *dai,
2898                 int clk_id, unsigned int freq, int dir)
2899 {
2900         struct snd_soc_component *component = dai->component;
2901         struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
2902         unsigned int reg_val = 0;
2903
2904         if (freq == rt5645->sysclk && clk_id == rt5645->sysclk_src)
2905                 return 0;
2906
2907         switch (clk_id) {
2908         case RT5645_SCLK_S_MCLK:
2909                 reg_val |= RT5645_SCLK_SRC_MCLK;
2910                 break;
2911         case RT5645_SCLK_S_PLL1:
2912                 reg_val |= RT5645_SCLK_SRC_PLL1;
2913                 break;
2914         case RT5645_SCLK_S_RCCLK:
2915                 reg_val |= RT5645_SCLK_SRC_RCCLK;
2916                 break;
2917         default:
2918                 dev_err(component->dev, "Invalid clock id (%d)\n", clk_id);
2919                 return -EINVAL;
2920         }
2921         snd_soc_component_update_bits(component, RT5645_GLB_CLK,
2922                 RT5645_SCLK_SRC_MASK, reg_val);
2923         rt5645->sysclk = freq;
2924         rt5645->sysclk_src = clk_id;
2925
2926         dev_dbg(dai->dev, "Sysclk is %dHz and clock id is %d\n", freq, clk_id);
2927
2928         return 0;
2929 }
2930
2931 static int rt5645_set_dai_pll(struct snd_soc_dai *dai, int pll_id, int source,
2932                         unsigned int freq_in, unsigned int freq_out)
2933 {
2934         struct snd_soc_component *component = dai->component;
2935         struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
2936         struct rl6231_pll_code pll_code;
2937         int ret;
2938
2939         if (source == rt5645->pll_src && freq_in == rt5645->pll_in &&
2940             freq_out == rt5645->pll_out)
2941                 return 0;
2942
2943         if (!freq_in || !freq_out) {
2944                 dev_dbg(component->dev, "PLL disabled\n");
2945
2946                 rt5645->pll_in = 0;
2947                 rt5645->pll_out = 0;
2948                 snd_soc_component_update_bits(component, RT5645_GLB_CLK,
2949                         RT5645_SCLK_SRC_MASK, RT5645_SCLK_SRC_MCLK);
2950                 return 0;
2951         }
2952
2953         switch (source) {
2954         case RT5645_PLL1_S_MCLK:
2955                 snd_soc_component_update_bits(component, RT5645_GLB_CLK,
2956                         RT5645_PLL1_SRC_MASK, RT5645_PLL1_SRC_MCLK);
2957                 break;
2958         case RT5645_PLL1_S_BCLK1:
2959         case RT5645_PLL1_S_BCLK2:
2960                 switch (dai->id) {
2961                 case RT5645_AIF1:
2962                         snd_soc_component_update_bits(component, RT5645_GLB_CLK,
2963                                 RT5645_PLL1_SRC_MASK, RT5645_PLL1_SRC_BCLK1);
2964                         break;
2965                 case  RT5645_AIF2:
2966                         snd_soc_component_update_bits(component, RT5645_GLB_CLK,
2967                                 RT5645_PLL1_SRC_MASK, RT5645_PLL1_SRC_BCLK2);
2968                         break;
2969                 default:
2970                         dev_err(component->dev, "Invalid dai->id: %d\n", dai->id);
2971                         return -EINVAL;
2972                 }
2973                 break;
2974         default:
2975                 dev_err(component->dev, "Unknown PLL source %d\n", source);
2976                 return -EINVAL;
2977         }
2978
2979         ret = rl6231_pll_calc(freq_in, freq_out, &pll_code);
2980         if (ret < 0) {
2981                 dev_err(component->dev, "Unsupported input clock %d\n", freq_in);
2982                 return ret;
2983         }
2984
2985         dev_dbg(component->dev, "bypass=%d m=%d n=%d k=%d\n",
2986                 pll_code.m_bp, (pll_code.m_bp ? 0 : pll_code.m_code),
2987                 pll_code.n_code, pll_code.k_code);
2988
2989         snd_soc_component_write(component, RT5645_PLL_CTRL1,
2990                 pll_code.n_code << RT5645_PLL_N_SFT | pll_code.k_code);
2991         snd_soc_component_write(component, RT5645_PLL_CTRL2,
2992                 ((pll_code.m_bp ? 0 : pll_code.m_code) << RT5645_PLL_M_SFT) |
2993                 (pll_code.m_bp << RT5645_PLL_M_BP_SFT));
2994
2995         rt5645->pll_in = freq_in;
2996         rt5645->pll_out = freq_out;
2997         rt5645->pll_src = source;
2998
2999         return 0;
3000 }
3001
3002 static int rt5645_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask,
3003                         unsigned int rx_mask, int slots, int slot_width)
3004 {
3005         struct snd_soc_component *component = dai->component;
3006         struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
3007         unsigned int i_slot_sft, o_slot_sft, i_width_sht, o_width_sht, en_sft;
3008         unsigned int mask, val = 0;
3009
3010         switch (rt5645->codec_type) {
3011         case CODEC_TYPE_RT5650:
3012                 en_sft = 15;
3013                 i_slot_sft = 10;
3014                 o_slot_sft = 8;
3015                 i_width_sht = 6;
3016                 o_width_sht = 4;
3017                 mask = 0x8ff0;
3018                 break;
3019         default:
3020                 en_sft = 14;
3021                 i_slot_sft = o_slot_sft = 12;
3022                 i_width_sht = o_width_sht = 10;
3023                 mask = 0x7c00;
3024                 break;
3025         }
3026         if (rx_mask || tx_mask) {
3027                 val |= (1 << en_sft);
3028                 if (rt5645->codec_type == CODEC_TYPE_RT5645)
3029                         snd_soc_component_update_bits(component, RT5645_BASS_BACK,
3030                                 RT5645_G_BB_BST_MASK, RT5645_G_BB_BST_25DB);
3031         }
3032
3033         switch (slots) {
3034         case 4:
3035                 val |= (1 << i_slot_sft) | (1 << o_slot_sft);
3036                 break;
3037         case 6:
3038                 val |= (2 << i_slot_sft) | (2 << o_slot_sft);
3039                 break;
3040         case 8:
3041                 val |= (3 << i_slot_sft) | (3 << o_slot_sft);
3042                 break;
3043         case 2:
3044         default:
3045                 break;
3046         }
3047
3048         switch (slot_width) {
3049         case 20:
3050                 val |= (1 << i_width_sht) | (1 << o_width_sht);
3051                 break;
3052         case 24:
3053                 val |= (2 << i_width_sht) | (2 << o_width_sht);
3054                 break;
3055         case 32:
3056                 val |= (3 << i_width_sht) | (3 << o_width_sht);
3057                 break;
3058         case 16:
3059         default:
3060                 break;
3061         }
3062
3063         snd_soc_component_update_bits(component, RT5645_TDM_CTRL_1, mask, val);
3064
3065         return 0;
3066 }
3067
3068 static int rt5645_set_bias_level(struct snd_soc_component *component,
3069                         enum snd_soc_bias_level level)
3070 {
3071         struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
3072
3073         switch (level) {
3074         case SND_SOC_BIAS_PREPARE:
3075                 if (SND_SOC_BIAS_STANDBY == snd_soc_component_get_bias_level(component)) {
3076                         snd_soc_component_update_bits(component, RT5645_PWR_ANLG1,
3077                                 RT5645_PWR_VREF1 | RT5645_PWR_MB |
3078                                 RT5645_PWR_BG | RT5645_PWR_VREF2,
3079                                 RT5645_PWR_VREF1 | RT5645_PWR_MB |
3080                                 RT5645_PWR_BG | RT5645_PWR_VREF2);
3081                         mdelay(10);
3082                         snd_soc_component_update_bits(component, RT5645_PWR_ANLG1,
3083                                 RT5645_PWR_FV1 | RT5645_PWR_FV2,
3084                                 RT5645_PWR_FV1 | RT5645_PWR_FV2);
3085                         snd_soc_component_update_bits(component, RT5645_GEN_CTRL1,
3086                                 RT5645_DIG_GATE_CTRL, RT5645_DIG_GATE_CTRL);
3087                 }
3088                 break;
3089
3090         case SND_SOC_BIAS_STANDBY:
3091                 snd_soc_component_update_bits(component, RT5645_PWR_ANLG1,
3092                         RT5645_PWR_VREF1 | RT5645_PWR_MB |
3093                         RT5645_PWR_BG | RT5645_PWR_VREF2,
3094                         RT5645_PWR_VREF1 | RT5645_PWR_MB |
3095                         RT5645_PWR_BG | RT5645_PWR_VREF2);
3096                 mdelay(10);
3097                 snd_soc_component_update_bits(component, RT5645_PWR_ANLG1,
3098                         RT5645_PWR_FV1 | RT5645_PWR_FV2,
3099                         RT5645_PWR_FV1 | RT5645_PWR_FV2);
3100                 if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF) {
3101                         snd_soc_component_write(component, RT5645_DEPOP_M2, 0x1140);
3102                         msleep(40);
3103                         if (rt5645->en_button_func)
3104                                 queue_delayed_work(system_power_efficient_wq,
3105                                         &rt5645->jack_detect_work,
3106                                         msecs_to_jiffies(0));
3107                 }
3108                 break;
3109
3110         case SND_SOC_BIAS_OFF:
3111                 snd_soc_component_write(component, RT5645_DEPOP_M2, 0x1100);
3112                 if (!rt5645->en_button_func)
3113                         snd_soc_component_update_bits(component, RT5645_GEN_CTRL1,
3114                                         RT5645_DIG_GATE_CTRL, 0);
3115                 snd_soc_component_update_bits(component, RT5645_PWR_ANLG1,
3116                                 RT5645_PWR_VREF1 | RT5645_PWR_MB |
3117                                 RT5645_PWR_BG | RT5645_PWR_VREF2 |
3118                                 RT5645_PWR_FV1 | RT5645_PWR_FV2, 0x0);
3119                 break;
3120
3121         default:
3122                 break;
3123         }
3124
3125         return 0;
3126 }
3127
3128 static void rt5645_enable_push_button_irq(struct snd_soc_component *component,
3129         bool enable)
3130 {
3131         struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
3132
3133         if (enable) {
3134                 snd_soc_dapm_force_enable_pin(dapm, "ADC L power");
3135                 snd_soc_dapm_force_enable_pin(dapm, "ADC R power");
3136                 snd_soc_dapm_sync(dapm);
3137
3138                 snd_soc_component_update_bits(component, RT5650_4BTN_IL_CMD1, 0x3, 0x3);
3139                 snd_soc_component_update_bits(component,
3140                                         RT5645_INT_IRQ_ST, 0x8, 0x8);
3141                 snd_soc_component_update_bits(component,
3142                                         RT5650_4BTN_IL_CMD2, 0x8000, 0x8000);
3143                 snd_soc_component_read(component, RT5650_4BTN_IL_CMD1);
3144                 pr_debug("%s read %x = %x\n", __func__, RT5650_4BTN_IL_CMD1,
3145                         snd_soc_component_read(component, RT5650_4BTN_IL_CMD1));
3146         } else {
3147                 snd_soc_component_update_bits(component, RT5650_4BTN_IL_CMD2, 0x8000, 0x0);
3148                 snd_soc_component_update_bits(component, RT5645_INT_IRQ_ST, 0x8, 0x0);
3149
3150                 snd_soc_dapm_disable_pin(dapm, "ADC L power");
3151                 snd_soc_dapm_disable_pin(dapm, "ADC R power");
3152                 snd_soc_dapm_sync(dapm);
3153         }
3154 }
3155
3156 static int rt5645_jack_detect(struct snd_soc_component *component, int jack_insert)
3157 {
3158         struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
3159         struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
3160         unsigned int val;
3161
3162         if (jack_insert) {
3163                 regmap_write(rt5645->regmap, RT5645_CHARGE_PUMP, 0x0206);
3164
3165                 /* for jack type detect */
3166                 snd_soc_dapm_force_enable_pin(dapm, "LDO2");
3167                 snd_soc_dapm_force_enable_pin(dapm, "Mic Det Power");
3168                 snd_soc_dapm_sync(dapm);
3169                 if (!snd_soc_card_is_instantiated(dapm->card)) {
3170                         /* Power up necessary bits for JD if dapm is
3171                            not ready yet */
3172                         regmap_update_bits(rt5645->regmap, RT5645_PWR_ANLG1,
3173                                 RT5645_PWR_MB | RT5645_PWR_VREF2,
3174                                 RT5645_PWR_MB | RT5645_PWR_VREF2);
3175                         regmap_update_bits(rt5645->regmap, RT5645_PWR_MIXER,
3176                                 RT5645_PWR_LDO2, RT5645_PWR_LDO2);
3177                         regmap_update_bits(rt5645->regmap, RT5645_PWR_VOL,
3178                                 RT5645_PWR_MIC_DET, RT5645_PWR_MIC_DET);
3179                 }
3180
3181                 regmap_write(rt5645->regmap, RT5645_JD_CTRL3, 0x00f0);
3182                 regmap_update_bits(rt5645->regmap, RT5645_IN1_CTRL2,
3183                         RT5645_CBJ_MN_JD, RT5645_CBJ_MN_JD);
3184                 regmap_update_bits(rt5645->regmap, RT5645_IN1_CTRL1,
3185                         RT5645_CBJ_BST1_EN, RT5645_CBJ_BST1_EN);
3186                 msleep(100);
3187                 regmap_update_bits(rt5645->regmap, RT5645_IN1_CTRL2,
3188                         RT5645_CBJ_MN_JD, 0);
3189
3190                 if (rt5645->gpiod_cbj_sleeve)
3191                         gpiod_set_value(rt5645->gpiod_cbj_sleeve, 1);
3192
3193                 msleep(600);
3194                 regmap_read(rt5645->regmap, RT5645_IN1_CTRL3, &val);
3195                 val &= 0x7;
3196                 dev_dbg(component->dev, "val = %d\n", val);
3197
3198                 if ((val == 1 || val == 2) && !rt5645->pdata.no_headset_mic) {
3199                         rt5645->jack_type = SND_JACK_HEADSET;
3200                         if (rt5645->en_button_func) {
3201                                 rt5645_enable_push_button_irq(component, true);
3202                         }
3203                 } else {
3204                         if (rt5645->en_button_func)
3205                                 rt5645_enable_push_button_irq(component, false);
3206                         snd_soc_dapm_disable_pin(dapm, "Mic Det Power");
3207                         snd_soc_dapm_sync(dapm);
3208                         rt5645->jack_type = SND_JACK_HEADPHONE;
3209                         if (rt5645->gpiod_cbj_sleeve)
3210                                 gpiod_set_value(rt5645->gpiod_cbj_sleeve, 0);
3211                 }
3212                 if (rt5645->pdata.level_trigger_irq)
3213                         regmap_update_bits(rt5645->regmap, RT5645_IRQ_CTRL2,
3214                                 RT5645_JD_1_1_MASK, RT5645_JD_1_1_NOR);
3215
3216                 regmap_write(rt5645->regmap, RT5645_CHARGE_PUMP, 0x0e06);
3217         } else { /* jack out */
3218                 rt5645->jack_type = 0;
3219
3220                 regmap_update_bits(rt5645->regmap, RT5645_HP_VOL,
3221                         RT5645_L_MUTE | RT5645_R_MUTE,
3222                         RT5645_L_MUTE | RT5645_R_MUTE);
3223                 regmap_update_bits(rt5645->regmap, RT5645_IN1_CTRL2,
3224                         RT5645_CBJ_MN_JD, RT5645_CBJ_MN_JD);
3225                 regmap_update_bits(rt5645->regmap, RT5645_IN1_CTRL1,
3226                         RT5645_CBJ_BST1_EN, 0);
3227
3228                 if (rt5645->en_button_func)
3229                         rt5645_enable_push_button_irq(component, false);
3230
3231                 if (rt5645->pdata.jd_mode == 0)
3232                         snd_soc_dapm_disable_pin(dapm, "LDO2");
3233                 snd_soc_dapm_disable_pin(dapm, "Mic Det Power");
3234                 snd_soc_dapm_sync(dapm);
3235                 if (rt5645->pdata.level_trigger_irq)
3236                         regmap_update_bits(rt5645->regmap, RT5645_IRQ_CTRL2,
3237                                 RT5645_JD_1_1_MASK, RT5645_JD_1_1_INV);
3238
3239                 if (rt5645->gpiod_cbj_sleeve)
3240                         gpiod_set_value(rt5645->gpiod_cbj_sleeve, 0);
3241         }
3242
3243         return rt5645->jack_type;
3244 }
3245
3246 static int rt5645_button_detect(struct snd_soc_component *component)
3247 {
3248         int btn_type, val;
3249
3250         val = snd_soc_component_read(component, RT5650_4BTN_IL_CMD1);
3251         pr_debug("val=0x%x\n", val);
3252         btn_type = val & 0xfff0;
3253         snd_soc_component_write(component, RT5650_4BTN_IL_CMD1, val);
3254
3255         return btn_type;
3256 }
3257
3258 static irqreturn_t rt5645_irq(int irq, void *data);
3259
3260 int rt5645_set_jack_detect(struct snd_soc_component *component,
3261         struct snd_soc_jack *hp_jack, struct snd_soc_jack *mic_jack,
3262         struct snd_soc_jack *btn_jack)
3263 {
3264         struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
3265
3266         rt5645->hp_jack = hp_jack;
3267         rt5645->mic_jack = mic_jack;
3268         rt5645->btn_jack = btn_jack;
3269         if (rt5645->btn_jack && rt5645->codec_type == CODEC_TYPE_RT5650) {
3270                 rt5645->en_button_func = true;
3271                 regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
3272                                 RT5645_GP1_PIN_IRQ, RT5645_GP1_PIN_IRQ);
3273                 regmap_update_bits(rt5645->regmap, RT5645_GEN_CTRL1,
3274                                 RT5645_DIG_GATE_CTRL, RT5645_DIG_GATE_CTRL);
3275                 regmap_update_bits(rt5645->regmap, RT5645_DEPOP_M1,
3276                                 RT5645_HP_CB_MASK, RT5645_HP_CB_PU);
3277         }
3278         rt5645_irq(0, rt5645);
3279
3280         return 0;
3281 }
3282 EXPORT_SYMBOL_GPL(rt5645_set_jack_detect);
3283
3284 static int rt5645_component_set_jack(struct snd_soc_component *component,
3285         struct snd_soc_jack *hs_jack, void *data)
3286 {
3287         struct snd_soc_jack *mic_jack = NULL;
3288         struct snd_soc_jack *btn_jack = NULL;
3289         int type;
3290
3291         if (hs_jack) {
3292                 type = *(int *)data;
3293
3294                 if (type & SND_JACK_MICROPHONE)
3295                         mic_jack = hs_jack;
3296                 if (type & (SND_JACK_BTN_0 | SND_JACK_BTN_1 |
3297                         SND_JACK_BTN_2 | SND_JACK_BTN_3))
3298                         btn_jack = hs_jack;
3299         }
3300
3301         return rt5645_set_jack_detect(component, hs_jack, mic_jack, btn_jack);
3302 }
3303
3304 static void rt5645_jack_detect_work(struct work_struct *work)
3305 {
3306         struct rt5645_priv *rt5645 =
3307                 container_of(work, struct rt5645_priv, jack_detect_work.work);
3308         int val, btn_type, gpio_state = 0, report = 0;
3309
3310         if (!rt5645->component)
3311                 return;
3312
3313         mutex_lock(&rt5645->jd_mutex);
3314
3315         switch (rt5645->pdata.jd_mode) {
3316         case 0: /* Not using rt5645 JD */
3317                 if (rt5645->gpiod_hp_det) {
3318                         gpio_state = gpiod_get_value(rt5645->gpiod_hp_det);
3319                         if (rt5645->pdata.inv_hp_pol)
3320                                 gpio_state ^= 1;
3321                         dev_dbg(rt5645->component->dev, "gpio_state = %d\n",
3322                                 gpio_state);
3323                         report = rt5645_jack_detect(rt5645->component, gpio_state);
3324                 }
3325                 snd_soc_jack_report(rt5645->hp_jack,
3326                                     report, SND_JACK_HEADPHONE);
3327                 snd_soc_jack_report(rt5645->mic_jack,
3328                                     report, SND_JACK_MICROPHONE);
3329                 mutex_unlock(&rt5645->jd_mutex);
3330                 return;
3331         case 4:
3332                 val = snd_soc_component_read(rt5645->component, RT5645_A_JD_CTRL1) & 0x0020;
3333                 break;
3334         default: /* read rt5645 jd1_1 status */
3335                 val = snd_soc_component_read(rt5645->component, RT5645_INT_IRQ_ST) & 0x1000;
3336                 break;
3337
3338         }
3339
3340         if (!val && (rt5645->jack_type == 0)) { /* jack in */
3341                 report = rt5645_jack_detect(rt5645->component, 1);
3342         } else if (!val && rt5645->jack_type == SND_JACK_HEADSET) {
3343                 /* for push button and jack out */
3344                 btn_type = 0;
3345                 if (snd_soc_component_read(rt5645->component, RT5645_INT_IRQ_ST) & 0x4) {
3346                         /* button pressed */
3347                         report = SND_JACK_HEADSET;
3348                         btn_type = rt5645_button_detect(rt5645->component);
3349                         /* rt5650 can report three kinds of button behavior,
3350                            one click, double click and hold. However,
3351                            currently we will report button pressed/released
3352                            event. So all the three button behaviors are
3353                            treated as button pressed. */
3354                         switch (btn_type) {
3355                         case 0x8000:
3356                         case 0x4000:
3357                         case 0x2000:
3358                                 report |= SND_JACK_BTN_0;
3359                                 break;
3360                         case 0x1000:
3361                         case 0x0800:
3362                         case 0x0400:
3363                                 report |= SND_JACK_BTN_1;
3364                                 break;
3365                         case 0x0200:
3366                         case 0x0100:
3367                         case 0x0080:
3368                                 report |= SND_JACK_BTN_2;
3369                                 break;
3370                         case 0x0040:
3371                         case 0x0020:
3372                         case 0x0010:
3373                                 report |= SND_JACK_BTN_3;
3374                                 break;
3375                         case 0x0000: /* unpressed */
3376                                 break;
3377                         default:
3378                                 dev_err(rt5645->component->dev,
3379                                         "Unexpected button code 0x%04x\n",
3380                                         btn_type);
3381                                 break;
3382                         }
3383                 }
3384                 if (btn_type == 0)/* button release */
3385                         report =  rt5645->jack_type;
3386                 else {
3387                         mod_timer(&rt5645->btn_check_timer,
3388                                 msecs_to_jiffies(100));
3389                 }
3390         } else {
3391                 /* jack out */
3392                 report = 0;
3393                 snd_soc_component_update_bits(rt5645->component,
3394                                     RT5645_INT_IRQ_ST, 0x1, 0x0);
3395                 rt5645_jack_detect(rt5645->component, 0);
3396         }
3397
3398         mutex_unlock(&rt5645->jd_mutex);
3399
3400         snd_soc_jack_report(rt5645->hp_jack, report, SND_JACK_HEADPHONE);
3401         snd_soc_jack_report(rt5645->mic_jack, report, SND_JACK_MICROPHONE);
3402         if (rt5645->en_button_func)
3403                 snd_soc_jack_report(rt5645->btn_jack,
3404                         report, SND_JACK_BTN_0 | SND_JACK_BTN_1 |
3405                                 SND_JACK_BTN_2 | SND_JACK_BTN_3);
3406 }
3407
3408 static void rt5645_rcclock_work(struct work_struct *work)
3409 {
3410         struct rt5645_priv *rt5645 =
3411                 container_of(work, struct rt5645_priv, rcclock_work.work);
3412
3413         regmap_update_bits(rt5645->regmap, RT5645_MICBIAS,
3414                 RT5645_PWR_CLK25M_MASK, RT5645_PWR_CLK25M_PD);
3415 }
3416
3417 static irqreturn_t rt5645_irq(int irq, void *data)
3418 {
3419         struct rt5645_priv *rt5645 = data;
3420
3421         queue_delayed_work(system_power_efficient_wq,
3422                            &rt5645->jack_detect_work, msecs_to_jiffies(250));
3423
3424         return IRQ_HANDLED;
3425 }
3426
3427 static void rt5645_btn_check_callback(struct timer_list *t)
3428 {
3429         struct rt5645_priv *rt5645 = from_timer(rt5645, t, btn_check_timer);
3430
3431         queue_delayed_work(system_power_efficient_wq,
3432                    &rt5645->jack_detect_work, msecs_to_jiffies(5));
3433 }
3434
3435 static int rt5645_probe(struct snd_soc_component *component)
3436 {
3437         struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
3438         struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
3439
3440         rt5645->component = component;
3441
3442         switch (rt5645->codec_type) {
3443         case CODEC_TYPE_RT5645:
3444                 snd_soc_dapm_new_controls(dapm,
3445                         rt5645_specific_dapm_widgets,
3446                         ARRAY_SIZE(rt5645_specific_dapm_widgets));
3447                 snd_soc_dapm_add_routes(dapm,
3448                         rt5645_specific_dapm_routes,
3449                         ARRAY_SIZE(rt5645_specific_dapm_routes));
3450                 if (rt5645->v_id < 3) {
3451                         snd_soc_dapm_add_routes(dapm,
3452                                 rt5645_old_dapm_routes,
3453                                 ARRAY_SIZE(rt5645_old_dapm_routes));
3454                 }
3455                 break;
3456         case CODEC_TYPE_RT5650:
3457                 snd_soc_dapm_new_controls(dapm,
3458                         rt5650_specific_dapm_widgets,
3459                         ARRAY_SIZE(rt5650_specific_dapm_widgets));
3460                 snd_soc_dapm_add_routes(dapm,
3461                         rt5650_specific_dapm_routes,
3462                         ARRAY_SIZE(rt5650_specific_dapm_routes));
3463                 break;
3464         }
3465
3466         snd_soc_component_force_bias_level(component, SND_SOC_BIAS_OFF);
3467
3468         /* for JD function */
3469         if (rt5645->pdata.jd_mode) {
3470                 snd_soc_dapm_force_enable_pin(dapm, "JD Power");
3471                 snd_soc_dapm_force_enable_pin(dapm, "LDO2");
3472                 snd_soc_dapm_sync(dapm);
3473         }
3474
3475         if (rt5645->pdata.long_name)
3476                 component->card->long_name = rt5645->pdata.long_name;
3477
3478         rt5645->eq_param = devm_kcalloc(component->dev,
3479                 RT5645_HWEQ_NUM, sizeof(struct rt5645_eq_param_s),
3480                 GFP_KERNEL);
3481
3482         if (!rt5645->eq_param)
3483                 return -ENOMEM;
3484
3485         return 0;
3486 }
3487
3488 static void rt5645_remove(struct snd_soc_component *component)
3489 {
3490         rt5645_reset(component);
3491 }
3492
3493 #ifdef CONFIG_PM
3494 static int rt5645_suspend(struct snd_soc_component *component)
3495 {
3496         struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
3497
3498         regcache_cache_only(rt5645->regmap, true);
3499         regcache_mark_dirty(rt5645->regmap);
3500
3501         return 0;
3502 }
3503
3504 static int rt5645_resume(struct snd_soc_component *component)
3505 {
3506         struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
3507
3508         regcache_cache_only(rt5645->regmap, false);
3509         regcache_sync(rt5645->regmap);
3510
3511         return 0;
3512 }
3513 #else
3514 #define rt5645_suspend NULL
3515 #define rt5645_resume NULL
3516 #endif
3517
3518 #define RT5645_STEREO_RATES SNDRV_PCM_RATE_8000_96000
3519 #define RT5645_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
3520                         SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8)
3521
3522 static const struct snd_soc_dai_ops rt5645_aif_dai_ops = {
3523         .hw_params = rt5645_hw_params,
3524         .set_fmt = rt5645_set_dai_fmt,
3525         .set_sysclk = rt5645_set_dai_sysclk,
3526         .set_tdm_slot = rt5645_set_tdm_slot,
3527         .set_pll = rt5645_set_dai_pll,
3528 };
3529
3530 static struct snd_soc_dai_driver rt5645_dai[] = {
3531         {
3532                 .name = "rt5645-aif1",
3533                 .id = RT5645_AIF1,
3534                 .playback = {
3535                         .stream_name = "AIF1 Playback",
3536                         .channels_min = 1,
3537                         .channels_max = 2,
3538                         .rates = RT5645_STEREO_RATES,
3539                         .formats = RT5645_FORMATS,
3540                 },
3541                 .capture = {
3542                         .stream_name = "AIF1 Capture",
3543                         .channels_min = 1,
3544                         .channels_max = 4,
3545                         .rates = RT5645_STEREO_RATES,
3546                         .formats = RT5645_FORMATS,
3547                 },
3548                 .ops = &rt5645_aif_dai_ops,
3549         },
3550         {
3551                 .name = "rt5645-aif2",
3552                 .id = RT5645_AIF2,
3553                 .playback = {
3554                         .stream_name = "AIF2 Playback",
3555                         .channels_min = 1,
3556                         .channels_max = 2,
3557                         .rates = RT5645_STEREO_RATES,
3558                         .formats = RT5645_FORMATS,
3559                 },
3560                 .capture = {
3561                         .stream_name = "AIF2 Capture",
3562                         .channels_min = 1,
3563                         .channels_max = 2,
3564                         .rates = RT5645_STEREO_RATES,
3565                         .formats = RT5645_FORMATS,
3566                 },
3567                 .ops = &rt5645_aif_dai_ops,
3568         },
3569 };
3570
3571 static const struct snd_soc_component_driver soc_component_dev_rt5645 = {
3572         .probe                  = rt5645_probe,
3573         .remove                 = rt5645_remove,
3574         .suspend                = rt5645_suspend,
3575         .resume                 = rt5645_resume,
3576         .set_bias_level         = rt5645_set_bias_level,
3577         .controls               = rt5645_snd_controls,
3578         .num_controls           = ARRAY_SIZE(rt5645_snd_controls),
3579         .dapm_widgets           = rt5645_dapm_widgets,
3580         .num_dapm_widgets       = ARRAY_SIZE(rt5645_dapm_widgets),
3581         .dapm_routes            = rt5645_dapm_routes,
3582         .num_dapm_routes        = ARRAY_SIZE(rt5645_dapm_routes),
3583         .set_jack               = rt5645_component_set_jack,
3584         .use_pmdown_time        = 1,
3585         .endianness             = 1,
3586 };
3587
3588 static const struct regmap_config rt5645_regmap = {
3589         .reg_bits = 8,
3590         .val_bits = 16,
3591         .use_single_read = true,
3592         .use_single_write = true,
3593         .max_register = RT5645_VENDOR_ID2 + 1 + (ARRAY_SIZE(rt5645_ranges) *
3594                                                RT5645_PR_SPACING),
3595         .volatile_reg = rt5645_volatile_register,
3596         .readable_reg = rt5645_readable_register,
3597
3598         .cache_type = REGCACHE_MAPLE,
3599         .reg_defaults = rt5645_reg,
3600         .num_reg_defaults = ARRAY_SIZE(rt5645_reg),
3601         .ranges = rt5645_ranges,
3602         .num_ranges = ARRAY_SIZE(rt5645_ranges),
3603 };
3604
3605 static const struct regmap_config rt5650_regmap = {
3606         .reg_bits = 8,
3607         .val_bits = 16,
3608         .use_single_read = true,
3609         .use_single_write = true,
3610         .max_register = RT5645_VENDOR_ID2 + 1 + (ARRAY_SIZE(rt5645_ranges) *
3611                                                RT5645_PR_SPACING),
3612         .volatile_reg = rt5645_volatile_register,
3613         .readable_reg = rt5645_readable_register,
3614
3615         .cache_type = REGCACHE_MAPLE,
3616         .reg_defaults = rt5650_reg,
3617         .num_reg_defaults = ARRAY_SIZE(rt5650_reg),
3618         .ranges = rt5645_ranges,
3619         .num_ranges = ARRAY_SIZE(rt5645_ranges),
3620 };
3621
3622 static const struct regmap_config temp_regmap = {
3623         .name="nocache",
3624         .reg_bits = 8,
3625         .val_bits = 16,
3626         .use_single_read = true,
3627         .use_single_write = true,
3628         .max_register = RT5645_VENDOR_ID2 + 1,
3629         .cache_type = REGCACHE_NONE,
3630 };
3631
3632 static const struct i2c_device_id rt5645_i2c_id[] = {
3633         { "rt5645", 0 },
3634         { "rt5650", 0 },
3635         { }
3636 };
3637 MODULE_DEVICE_TABLE(i2c, rt5645_i2c_id);
3638
3639 #ifdef CONFIG_OF
3640 static const struct of_device_id rt5645_of_match[] = {
3641         { .compatible = "realtek,rt5645", },
3642         { .compatible = "realtek,rt5650", },
3643         { }
3644 };
3645 MODULE_DEVICE_TABLE(of, rt5645_of_match);
3646 #endif
3647
3648 #ifdef CONFIG_ACPI
3649 static const struct acpi_device_id rt5645_acpi_match[] = {
3650         { "10EC5645", 0 },
3651         { "10EC5648", 0 },
3652         { "10EC5650", 0 },
3653         { "10EC5640", 0 },
3654         { "10EC3270", 0 },
3655         {},
3656 };
3657 MODULE_DEVICE_TABLE(acpi, rt5645_acpi_match);
3658 #endif
3659
3660 static const struct rt5645_platform_data intel_braswell_platform_data = {
3661         .dmic1_data_pin = RT5645_DMIC1_DISABLE,
3662         .dmic2_data_pin = RT5645_DMIC_DATA_IN2P,
3663         .jd_mode = 3,
3664 };
3665
3666 static const struct rt5645_platform_data buddy_platform_data = {
3667         .dmic1_data_pin = RT5645_DMIC_DATA_GPIO5,
3668         .dmic2_data_pin = RT5645_DMIC_DATA_IN2P,
3669         .jd_mode = 4,
3670         .level_trigger_irq = true,
3671 };
3672
3673 static const struct rt5645_platform_data gpd_win_platform_data = {
3674         .jd_mode = 3,
3675         .inv_jd1_1 = true,
3676         .mono_speaker = true,
3677         .long_name = "gpd-win-pocket-rt5645",
3678         /* The GPD pocket has a diff. mic, for the win this does not matter. */
3679         .in2_diff = true,
3680 };
3681
3682 static const struct rt5645_platform_data asus_t100ha_platform_data = {
3683         .dmic1_data_pin = RT5645_DMIC_DATA_IN2N,
3684         .dmic2_data_pin = RT5645_DMIC2_DISABLE,
3685         .jd_mode = 3,
3686         .inv_jd1_1 = true,
3687 };
3688
3689 static const struct rt5645_platform_data asus_t101ha_platform_data = {
3690         .dmic1_data_pin = RT5645_DMIC_DATA_IN2N,
3691         .dmic2_data_pin = RT5645_DMIC2_DISABLE,
3692         .jd_mode = 3,
3693 };
3694
3695 static const struct rt5645_platform_data lenovo_ideapad_miix_310_pdata = {
3696         .jd_mode = 3,
3697         .in2_diff = true,
3698 };
3699
3700 static const struct rt5645_platform_data jd_mode3_monospk_platform_data = {
3701         .jd_mode = 3,
3702         .mono_speaker = true,
3703 };
3704
3705 static const struct rt5645_platform_data jd_mode3_inv_data = {
3706         .jd_mode = 3,
3707         .inv_jd1_1 = true,
3708 };
3709
3710 static const struct rt5645_platform_data jd_mode3_platform_data = {
3711         .jd_mode = 3,
3712 };
3713
3714 static const struct rt5645_platform_data lattepanda_board_platform_data = {
3715         .jd_mode = 2,
3716         .inv_jd1_1 = true
3717 };
3718
3719 static const struct rt5645_platform_data kahlee_platform_data = {
3720         .dmic1_data_pin = RT5645_DMIC_DATA_GPIO5,
3721         .dmic2_data_pin = RT5645_DMIC_DATA_IN2P,
3722         .jd_mode = 3,
3723 };
3724
3725 static const struct rt5645_platform_data ecs_ef20_platform_data = {
3726         .dmic1_data_pin = RT5645_DMIC1_DISABLE,
3727         .dmic2_data_pin = RT5645_DMIC_DATA_IN2P,
3728         .inv_hp_pol = 1,
3729 };
3730
3731 static const struct acpi_gpio_params ef20_hp_detect = { 1, 0, false };
3732
3733 static const struct acpi_gpio_mapping cht_rt5645_ef20_gpios[] = {
3734         { "hp-detect-gpios", &ef20_hp_detect, 1 },
3735         { },
3736 };
3737
3738 static int cht_rt5645_ef20_quirk_cb(const struct dmi_system_id *id)
3739 {
3740         cht_rt5645_gpios = cht_rt5645_ef20_gpios;
3741         return 1;
3742 }
3743
3744 static const struct dmi_system_id dmi_platform_data[] = {
3745         {
3746                 .ident = "Chrome Buddy",
3747                 .matches = {
3748                         DMI_MATCH(DMI_PRODUCT_NAME, "Buddy"),
3749                 },
3750                 .driver_data = (void *)&buddy_platform_data,
3751         },
3752         {
3753                 .ident = "Intel Strago",
3754                 .matches = {
3755                         DMI_MATCH(DMI_PRODUCT_NAME, "Strago"),
3756                 },
3757                 .driver_data = (void *)&intel_braswell_platform_data,
3758         },
3759         {
3760                 .ident = "Google Chrome",
3761                 .matches = {
3762                         DMI_MATCH(DMI_SYS_VENDOR, "GOOGLE"),
3763                 },
3764                 .driver_data = (void *)&intel_braswell_platform_data,
3765         },
3766         {
3767                 .ident = "Google Setzer",
3768                 .matches = {
3769                         DMI_MATCH(DMI_PRODUCT_NAME, "Setzer"),
3770                 },
3771                 .driver_data = (void *)&intel_braswell_platform_data,
3772         },
3773         {
3774                 .ident = "Microsoft Surface 3",
3775                 .matches = {
3776                         DMI_MATCH(DMI_PRODUCT_NAME, "Surface 3"),
3777                 },
3778                 .driver_data = (void *)&intel_braswell_platform_data,
3779         },
3780         {
3781                 /*
3782                  * Match for the GPDwin which unfortunately uses somewhat
3783                  * generic dmi strings, which is why we test for 4 strings.
3784                  * Comparing against 23 other byt/cht boards, board_vendor
3785                  * and board_name are unique to the GPDwin, where as only one
3786                  * other board has the same board_serial and 3 others have
3787                  * the same default product_name. Also the GPDwin is the
3788                  * only device to have both board_ and product_name not set.
3789                  */
3790                 .ident = "GPD Win / Pocket",
3791                 .matches = {
3792                         DMI_MATCH(DMI_BOARD_VENDOR, "AMI Corporation"),
3793                         DMI_MATCH(DMI_BOARD_NAME, "Default string"),
3794                         DMI_MATCH(DMI_BOARD_SERIAL, "Default string"),
3795                         DMI_MATCH(DMI_PRODUCT_NAME, "Default string"),
3796                 },
3797                 .driver_data = (void *)&gpd_win_platform_data,
3798         },
3799         {
3800                 .ident = "ASUS T100HAN",
3801                 .matches = {
3802                         DMI_EXACT_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."),
3803                         DMI_MATCH(DMI_PRODUCT_NAME, "T100HAN"),
3804                 },
3805                 .driver_data = (void *)&asus_t100ha_platform_data,
3806         },
3807         {
3808                 .ident = "ASUS T101HA",
3809                 .matches = {
3810                         DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."),
3811                         DMI_MATCH(DMI_PRODUCT_NAME, "T101HA"),
3812                 },
3813                 .driver_data = (void *)&asus_t101ha_platform_data,
3814         },
3815         {
3816                 .ident = "MINIX Z83-4",
3817                 .matches = {
3818                         DMI_EXACT_MATCH(DMI_SYS_VENDOR, "MINIX"),
3819                         DMI_MATCH(DMI_PRODUCT_NAME, "Z83-4"),
3820                 },
3821                 .driver_data = (void *)&jd_mode3_platform_data,
3822         },
3823         {
3824                 .ident = "Teclast X80 Pro",
3825                 .matches = {
3826                         DMI_MATCH(DMI_SYS_VENDOR, "TECLAST"),
3827                         DMI_MATCH(DMI_PRODUCT_NAME, "X80 Pro"),
3828                 },
3829                 .driver_data = (void *)&jd_mode3_monospk_platform_data,
3830         },
3831         {
3832                 .ident = "Lenovo Ideapad Miix 310",
3833                 .matches = {
3834                   DMI_EXACT_MATCH(DMI_SYS_VENDOR, "LENOVO"),
3835                   DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "80SG"),
3836                   DMI_EXACT_MATCH(DMI_PRODUCT_VERSION, "MIIX 310-10ICR"),
3837                 },
3838                 .driver_data = (void *)&lenovo_ideapad_miix_310_pdata,
3839         },
3840         {
3841                 .ident = "Lenovo Ideapad Miix 320",
3842                 .matches = {
3843                   DMI_EXACT_MATCH(DMI_SYS_VENDOR, "LENOVO"),
3844                   DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "80XF"),
3845                   DMI_EXACT_MATCH(DMI_PRODUCT_VERSION, "Lenovo MIIX 320-10ICR"),
3846                 },
3847                 .driver_data = (void *)&intel_braswell_platform_data,
3848         },
3849         {
3850                 .ident = "LattePanda board",
3851                 .matches = {
3852                   DMI_EXACT_MATCH(DMI_BOARD_VENDOR, "AMI Corporation"),
3853                   DMI_EXACT_MATCH(DMI_BOARD_NAME, "Cherry Trail CR"),
3854                   DMI_EXACT_MATCH(DMI_BOARD_VERSION, "Default string"),
3855                   /*
3856                    * Above strings are too generic, LattePanda BIOS versions for
3857                    * all 4 hw revisions are:
3858                    * DF-BI-7-S70CR100-*
3859                    * DF-BI-7-S70CR110-*
3860                    * DF-BI-7-S70CR200-*
3861                    * LP-BS-7-S70CR700-*
3862                    * Do a partial match for S70CR to avoid false positive matches.
3863                    */
3864                   DMI_MATCH(DMI_BIOS_VERSION, "S70CR"),
3865                 },
3866                 .driver_data = (void *)&lattepanda_board_platform_data,
3867         },
3868         {
3869                 .ident = "Chrome Kahlee",
3870                 .matches = {
3871                         DMI_MATCH(DMI_PRODUCT_NAME, "Kahlee"),
3872                 },
3873                 .driver_data = (void *)&kahlee_platform_data,
3874         },
3875         {
3876                 .ident = "Medion E1239T",
3877                 .matches = {
3878                         DMI_EXACT_MATCH(DMI_SYS_VENDOR, "MEDION"),
3879                         DMI_MATCH(DMI_PRODUCT_NAME, "E1239T MD60568"),
3880                 },
3881                 .driver_data = (void *)&intel_braswell_platform_data,
3882         },
3883         {
3884                 .ident = "EF20",
3885                 .callback = cht_rt5645_ef20_quirk_cb,
3886                 .matches = {
3887                         DMI_MATCH(DMI_PRODUCT_NAME, "EF20"),
3888                 },
3889                 .driver_data = (void *)&ecs_ef20_platform_data,
3890         },
3891         {
3892                 .ident = "Acer Switch V 10 (SW5-017)",
3893                 .matches = {
3894                         DMI_EXACT_MATCH(DMI_SYS_VENDOR, "Acer"),
3895                         DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "SW5-017"),
3896                 },
3897                 .driver_data = (void *)&intel_braswell_platform_data,
3898         },
3899         {
3900                 .ident = "Meegopad T08",
3901                 .matches = {
3902                         DMI_MATCH(DMI_SYS_VENDOR, "Default string"),
3903                         DMI_MATCH(DMI_PRODUCT_NAME, "Default string"),
3904                         DMI_MATCH(DMI_BOARD_NAME, "T3 MRD"),
3905                         DMI_MATCH(DMI_BOARD_VERSION, "V1.1"),
3906                 },
3907                 .driver_data = (void *)&jd_mode3_inv_data,
3908         },
3909         { }
3910 };
3911
3912 static bool rt5645_check_dp(struct device *dev)
3913 {
3914         if (device_property_present(dev, "realtek,in2-differential") ||
3915             device_property_present(dev, "realtek,dmic1-data-pin") ||
3916             device_property_present(dev, "realtek,dmic2-data-pin") ||
3917             device_property_present(dev, "realtek,jd-mode"))
3918                 return true;
3919
3920         return false;
3921 }
3922
3923 static void rt5645_parse_dt(struct device *dev, struct rt5645_platform_data *pdata)
3924 {
3925         pdata->in2_diff = device_property_read_bool(dev, "realtek,in2-differential");
3926         device_property_read_u32(dev, "realtek,dmic1-data-pin", &pdata->dmic1_data_pin);
3927         device_property_read_u32(dev, "realtek,dmic2-data-pin", &pdata->dmic2_data_pin);
3928         device_property_read_u32(dev, "realtek,jd-mode", &pdata->jd_mode);
3929 }
3930
3931 static void rt5645_get_pdata(struct device *codec_dev, struct rt5645_platform_data *pdata)
3932 {
3933         const struct dmi_system_id *dmi_data;
3934
3935         dmi_data = dmi_first_match(dmi_platform_data);
3936         if (dmi_data) {
3937                 dev_info(codec_dev, "Detected %s platform\n", dmi_data->ident);
3938                 *pdata = *((struct rt5645_platform_data *)dmi_data->driver_data);
3939         } else if (rt5645_check_dp(codec_dev)) {
3940                 rt5645_parse_dt(codec_dev, pdata);
3941         } else {
3942                 *pdata = jd_mode3_platform_data;
3943         }
3944
3945         if (quirk != -1) {
3946                 pdata->in2_diff = QUIRK_IN2_DIFF(quirk);
3947                 pdata->level_trigger_irq = QUIRK_LEVEL_IRQ(quirk);
3948                 pdata->inv_jd1_1 = QUIRK_INV_JD1_1(quirk);
3949                 pdata->inv_hp_pol = QUIRK_INV_HP_POL(quirk);
3950                 pdata->jd_mode = QUIRK_JD_MODE(quirk);
3951                 pdata->dmic1_data_pin = QUIRK_DMIC1_DATA_PIN(quirk);
3952                 pdata->dmic2_data_pin = QUIRK_DMIC2_DATA_PIN(quirk);
3953         }
3954 }
3955
3956 const char *rt5645_components(struct device *codec_dev)
3957 {
3958         struct rt5645_platform_data pdata = { };
3959         static char buf[32];
3960         const char *mic;
3961         int spk = 2;
3962
3963         rt5645_get_pdata(codec_dev, &pdata);
3964
3965         if (pdata.mono_speaker)
3966                 spk = 1;
3967
3968         if (pdata.dmic1_data_pin && pdata.dmic2_data_pin)
3969                 mic = "dmics12";
3970         else if (pdata.dmic1_data_pin)
3971                 mic = "dmic1";
3972         else if (pdata.dmic2_data_pin)
3973                 mic = "dmic2";
3974         else
3975                 mic = "in2";
3976
3977         snprintf(buf, sizeof(buf), "cfg-spk:%d cfg-mic:%s", spk, mic);
3978
3979         return buf;
3980 }
3981 EXPORT_SYMBOL_GPL(rt5645_components);
3982
3983 static int rt5645_i2c_probe(struct i2c_client *i2c)
3984 {
3985         struct rt5645_priv *rt5645;
3986         int ret, i;
3987         unsigned int val;
3988         struct regmap *regmap;
3989
3990         rt5645 = devm_kzalloc(&i2c->dev, sizeof(struct rt5645_priv),
3991                                 GFP_KERNEL);
3992         if (rt5645 == NULL)
3993                 return -ENOMEM;
3994
3995         rt5645->i2c = i2c;
3996         i2c_set_clientdata(i2c, rt5645);
3997         rt5645_get_pdata(&i2c->dev, &rt5645->pdata);
3998
3999         if (has_acpi_companion(&i2c->dev)) {
4000                 if (cht_rt5645_gpios) {
4001                         if (devm_acpi_dev_add_driver_gpios(&i2c->dev, cht_rt5645_gpios))
4002                                 dev_dbg(&i2c->dev, "Failed to add driver gpios\n");
4003                 }
4004
4005                 /* The ALC3270 package has the headset-mic pin not-connected */
4006                 if (acpi_dev_hid_uid_match(ACPI_COMPANION(&i2c->dev), "10EC3270", NULL))
4007                         rt5645->pdata.no_headset_mic = true;
4008         }
4009
4010         rt5645->gpiod_hp_det = devm_gpiod_get_optional(&i2c->dev, "hp-detect",
4011                                                        GPIOD_IN);
4012
4013         if (IS_ERR(rt5645->gpiod_hp_det)) {
4014                 dev_info(&i2c->dev, "failed to initialize gpiod\n");
4015                 ret = PTR_ERR(rt5645->gpiod_hp_det);
4016                 /*
4017                  * Continue if optional gpiod is missing, bail for all other
4018                  * errors, including -EPROBE_DEFER
4019                  */
4020                 if (ret != -ENOENT)
4021                         return ret;
4022         }
4023
4024         rt5645->gpiod_cbj_sleeve = devm_gpiod_get_optional(&i2c->dev, "cbj-sleeve",
4025                                                            GPIOD_OUT_LOW);
4026
4027         if (IS_ERR(rt5645->gpiod_cbj_sleeve)) {
4028                 ret = PTR_ERR(rt5645->gpiod_cbj_sleeve);
4029                 dev_info(&i2c->dev, "failed to initialize gpiod, ret=%d\n", ret);
4030                 if (ret != -ENOENT)
4031                         return ret;
4032         }
4033
4034         for (i = 0; i < ARRAY_SIZE(rt5645->supplies); i++)
4035                 rt5645->supplies[i].supply = rt5645_supply_names[i];
4036
4037         ret = devm_regulator_bulk_get(&i2c->dev,
4038                                       ARRAY_SIZE(rt5645->supplies),
4039                                       rt5645->supplies);
4040         if (ret) {
4041                 dev_err(&i2c->dev, "Failed to request supplies: %d\n", ret);
4042                 return ret;
4043         }
4044
4045         ret = regulator_bulk_enable(ARRAY_SIZE(rt5645->supplies),
4046                                     rt5645->supplies);
4047         if (ret) {
4048                 dev_err(&i2c->dev, "Failed to enable supplies: %d\n", ret);
4049                 return ret;
4050         }
4051
4052         regmap = devm_regmap_init_i2c(i2c, &temp_regmap);
4053         if (IS_ERR(regmap)) {
4054                 ret = PTR_ERR(regmap);
4055                 dev_err(&i2c->dev, "Failed to allocate temp register map: %d\n",
4056                         ret);
4057                 goto err_enable;
4058         }
4059
4060         /*
4061          * Read after 400msec, as it is the interval required between
4062          * read and power On.
4063          */
4064         msleep(TIME_TO_POWER_MS);
4065         ret = regmap_read(regmap, RT5645_VENDOR_ID2, &val);
4066         if (ret < 0) {
4067                 dev_err(&i2c->dev, "Failed to read: 0x%02X\n, ret = %d", RT5645_VENDOR_ID2, ret);
4068                 goto err_enable;
4069         }
4070
4071         switch (val) {
4072         case RT5645_DEVICE_ID:
4073                 rt5645->regmap = devm_regmap_init_i2c(i2c, &rt5645_regmap);
4074                 rt5645->codec_type = CODEC_TYPE_RT5645;
4075                 break;
4076         case RT5650_DEVICE_ID:
4077                 rt5645->regmap = devm_regmap_init_i2c(i2c, &rt5650_regmap);
4078                 rt5645->codec_type = CODEC_TYPE_RT5650;
4079                 break;
4080         default:
4081                 dev_err(&i2c->dev,
4082                         "Device with ID register %#x is not rt5645 or rt5650\n",
4083                         val);
4084                 ret = -ENODEV;
4085                 goto err_enable;
4086         }
4087
4088         if (IS_ERR(rt5645->regmap)) {
4089                 ret = PTR_ERR(rt5645->regmap);
4090                 dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
4091                         ret);
4092                 goto err_enable;
4093         }
4094
4095         regmap_write(rt5645->regmap, RT5645_RESET, 0);
4096
4097         regmap_read(regmap, RT5645_VENDOR_ID, &val);
4098         rt5645->v_id = val & 0xff;
4099
4100         regmap_write(rt5645->regmap, RT5645_AD_DA_MIXER, 0x8080);
4101
4102         ret = regmap_multi_reg_write(rt5645->regmap, init_list,
4103                                     ARRAY_SIZE(init_list));
4104         if (ret != 0)
4105                 dev_warn(&i2c->dev, "Failed to apply regmap patch: %d\n", ret);
4106
4107         if (rt5645->codec_type == CODEC_TYPE_RT5650) {
4108                 ret = regmap_multi_reg_write(rt5645->regmap, rt5650_init_list,
4109                                     ARRAY_SIZE(rt5650_init_list));
4110                 if (ret != 0)
4111                         dev_warn(&i2c->dev, "Apply rt5650 patch failed: %d\n",
4112                                            ret);
4113         }
4114
4115         regmap_update_bits(rt5645->regmap, RT5645_CLSD_OUT_CTRL, 0xc0, 0xc0);
4116
4117         if (rt5645->pdata.in2_diff)
4118                 regmap_update_bits(rt5645->regmap, RT5645_IN2_CTRL,
4119                                         RT5645_IN_DF2, RT5645_IN_DF2);
4120
4121         if (rt5645->pdata.dmic1_data_pin || rt5645->pdata.dmic2_data_pin) {
4122                 regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
4123                         RT5645_GP2_PIN_MASK, RT5645_GP2_PIN_DMIC1_SCL);
4124         }
4125         switch (rt5645->pdata.dmic1_data_pin) {
4126         case RT5645_DMIC_DATA_IN2N:
4127                 regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
4128                         RT5645_DMIC_1_DP_MASK, RT5645_DMIC_1_DP_IN2N);
4129                 break;
4130
4131         case RT5645_DMIC_DATA_GPIO5:
4132                 regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
4133                         RT5645_I2S2_DAC_PIN_MASK, RT5645_I2S2_DAC_PIN_GPIO);
4134                 regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
4135                         RT5645_DMIC_1_DP_MASK, RT5645_DMIC_1_DP_GPIO5);
4136                 regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
4137                         RT5645_GP5_PIN_MASK, RT5645_GP5_PIN_DMIC1_SDA);
4138                 break;
4139
4140         case RT5645_DMIC_DATA_GPIO11:
4141                 regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
4142                         RT5645_DMIC_1_DP_MASK, RT5645_DMIC_1_DP_GPIO11);
4143                 regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
4144                         RT5645_GP11_PIN_MASK,
4145                         RT5645_GP11_PIN_DMIC1_SDA);
4146                 break;
4147
4148         default:
4149                 break;
4150         }
4151
4152         switch (rt5645->pdata.dmic2_data_pin) {
4153         case RT5645_DMIC_DATA_IN2P:
4154                 regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
4155                         RT5645_DMIC_2_DP_MASK, RT5645_DMIC_2_DP_IN2P);
4156                 break;
4157
4158         case RT5645_DMIC_DATA_GPIO6:
4159                 regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
4160                         RT5645_DMIC_2_DP_MASK, RT5645_DMIC_2_DP_GPIO6);
4161                 regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
4162                         RT5645_GP6_PIN_MASK, RT5645_GP6_PIN_DMIC2_SDA);
4163                 break;
4164
4165         case RT5645_DMIC_DATA_GPIO10:
4166                 regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
4167                         RT5645_DMIC_2_DP_MASK, RT5645_DMIC_2_DP_GPIO10);
4168                 regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
4169                         RT5645_GP10_PIN_MASK,
4170                         RT5645_GP10_PIN_DMIC2_SDA);
4171                 break;
4172
4173         case RT5645_DMIC_DATA_GPIO12:
4174                 regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
4175                         RT5645_DMIC_2_DP_MASK, RT5645_DMIC_2_DP_GPIO12);
4176                 regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
4177                         RT5645_GP12_PIN_MASK,
4178                         RT5645_GP12_PIN_DMIC2_SDA);
4179                 break;
4180
4181         default:
4182                 break;
4183         }
4184
4185         if (rt5645->pdata.jd_mode) {
4186                 regmap_update_bits(rt5645->regmap, RT5645_GEN_CTRL3,
4187                                    RT5645_IRQ_CLK_GATE_CTRL,
4188                                    RT5645_IRQ_CLK_GATE_CTRL);
4189                 regmap_update_bits(rt5645->regmap, RT5645_MICBIAS,
4190                                    RT5645_IRQ_CLK_INT, RT5645_IRQ_CLK_INT);
4191                 regmap_update_bits(rt5645->regmap, RT5645_IRQ_CTRL2,
4192                                    RT5645_IRQ_JD_1_1_EN, RT5645_IRQ_JD_1_1_EN);
4193                 regmap_update_bits(rt5645->regmap, RT5645_GEN_CTRL3,
4194                                    RT5645_JD_PSV_MODE, RT5645_JD_PSV_MODE);
4195                 regmap_update_bits(rt5645->regmap, RT5645_HPO_MIXER,
4196                                    RT5645_IRQ_PSV_MODE, RT5645_IRQ_PSV_MODE);
4197                 regmap_update_bits(rt5645->regmap, RT5645_MICBIAS,
4198                                    RT5645_MIC2_OVCD_EN, RT5645_MIC2_OVCD_EN);
4199                 regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
4200                                    RT5645_GP1_PIN_IRQ, RT5645_GP1_PIN_IRQ);
4201                 switch (rt5645->pdata.jd_mode) {
4202                 case 1:
4203                         regmap_update_bits(rt5645->regmap, RT5645_A_JD_CTRL1,
4204                                            RT5645_JD1_MODE_MASK,
4205                                            RT5645_JD1_MODE_0);
4206                         break;
4207                 case 2:
4208                         regmap_update_bits(rt5645->regmap, RT5645_A_JD_CTRL1,
4209                                            RT5645_JD1_MODE_MASK,
4210                                            RT5645_JD1_MODE_1);
4211                         break;
4212                 case 3:
4213                 case 4:
4214                         regmap_update_bits(rt5645->regmap, RT5645_A_JD_CTRL1,
4215                                            RT5645_JD1_MODE_MASK,
4216                                            RT5645_JD1_MODE_2);
4217                         break;
4218                 default:
4219                         break;
4220                 }
4221                 if (rt5645->pdata.inv_jd1_1) {
4222                         regmap_update_bits(rt5645->regmap, RT5645_IRQ_CTRL2,
4223                                 RT5645_JD_1_1_MASK, RT5645_JD_1_1_INV);
4224                 }
4225         }
4226
4227         regmap_update_bits(rt5645->regmap, RT5645_ADDA_CLK1,
4228                 RT5645_I2S_PD1_MASK, RT5645_I2S_PD1_2);
4229
4230         if (rt5645->pdata.level_trigger_irq) {
4231                 regmap_update_bits(rt5645->regmap, RT5645_IRQ_CTRL2,
4232                         RT5645_JD_1_1_MASK, RT5645_JD_1_1_INV);
4233         }
4234         timer_setup(&rt5645->btn_check_timer, rt5645_btn_check_callback, 0);
4235
4236         mutex_init(&rt5645->jd_mutex);
4237         INIT_DELAYED_WORK(&rt5645->jack_detect_work, rt5645_jack_detect_work);
4238         INIT_DELAYED_WORK(&rt5645->rcclock_work, rt5645_rcclock_work);
4239
4240         if (rt5645->i2c->irq) {
4241                 ret = request_threaded_irq(rt5645->i2c->irq, NULL, rt5645_irq,
4242                         IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING
4243                         | IRQF_ONESHOT, "rt5645", rt5645);
4244                 if (ret) {
4245                         dev_err(&i2c->dev, "Failed to request IRQ: %d\n", ret);
4246                         goto err_enable;
4247                 }
4248         }
4249
4250         ret = devm_snd_soc_register_component(&i2c->dev, &soc_component_dev_rt5645,
4251                                      rt5645_dai, ARRAY_SIZE(rt5645_dai));
4252         if (ret)
4253                 goto err_irq;
4254
4255         return 0;
4256
4257 err_irq:
4258         if (rt5645->i2c->irq)
4259                 free_irq(rt5645->i2c->irq, rt5645);
4260 err_enable:
4261         regulator_bulk_disable(ARRAY_SIZE(rt5645->supplies), rt5645->supplies);
4262         return ret;
4263 }
4264
4265 static void rt5645_i2c_remove(struct i2c_client *i2c)
4266 {
4267         struct rt5645_priv *rt5645 = i2c_get_clientdata(i2c);
4268
4269         if (i2c->irq)
4270                 free_irq(i2c->irq, rt5645);
4271
4272         /*
4273          * Since the rt5645_btn_check_callback() can queue jack_detect_work,
4274          * the timer need to be delted first
4275          */
4276         del_timer_sync(&rt5645->btn_check_timer);
4277
4278         cancel_delayed_work_sync(&rt5645->jack_detect_work);
4279         cancel_delayed_work_sync(&rt5645->rcclock_work);
4280
4281         if (rt5645->gpiod_cbj_sleeve)
4282                 gpiod_set_value(rt5645->gpiod_cbj_sleeve, 0);
4283
4284         regulator_bulk_disable(ARRAY_SIZE(rt5645->supplies), rt5645->supplies);
4285 }
4286
4287 static void rt5645_i2c_shutdown(struct i2c_client *i2c)
4288 {
4289         struct rt5645_priv *rt5645 = i2c_get_clientdata(i2c);
4290
4291         regmap_update_bits(rt5645->regmap, RT5645_GEN_CTRL3,
4292                 RT5645_RING2_SLEEVE_GND, RT5645_RING2_SLEEVE_GND);
4293         regmap_update_bits(rt5645->regmap, RT5645_IN1_CTRL2, RT5645_CBJ_MN_JD,
4294                 RT5645_CBJ_MN_JD);
4295         regmap_update_bits(rt5645->regmap, RT5645_IN1_CTRL1, RT5645_CBJ_BST1_EN,
4296                 0);
4297         msleep(20);
4298         regmap_write(rt5645->regmap, RT5645_RESET, 0);
4299
4300         if (rt5645->gpiod_cbj_sleeve)
4301                 gpiod_set_value(rt5645->gpiod_cbj_sleeve, 0);
4302 }
4303
4304 static int __maybe_unused rt5645_sys_suspend(struct device *dev)
4305 {
4306         struct rt5645_priv *rt5645 = dev_get_drvdata(dev);
4307
4308         del_timer_sync(&rt5645->btn_check_timer);
4309         cancel_delayed_work_sync(&rt5645->jack_detect_work);
4310         cancel_delayed_work_sync(&rt5645->rcclock_work);
4311
4312         regcache_cache_only(rt5645->regmap, true);
4313         regcache_mark_dirty(rt5645->regmap);
4314         return 0;
4315 }
4316
4317 static int __maybe_unused rt5645_sys_resume(struct device *dev)
4318 {
4319         struct rt5645_priv *rt5645 = dev_get_drvdata(dev);
4320
4321         regcache_cache_only(rt5645->regmap, false);
4322         regcache_sync(rt5645->regmap);
4323
4324         if (rt5645->hp_jack) {
4325                 rt5645->jack_type = 0;
4326                 rt5645_jack_detect_work(&rt5645->jack_detect_work.work);
4327         }
4328         return 0;
4329 }
4330
4331 static const struct dev_pm_ops rt5645_pm = {
4332         SET_SYSTEM_SLEEP_PM_OPS(rt5645_sys_suspend, rt5645_sys_resume)
4333 };
4334
4335 static struct i2c_driver rt5645_i2c_driver = {
4336         .driver = {
4337                 .name = "rt5645",
4338                 .of_match_table = of_match_ptr(rt5645_of_match),
4339                 .acpi_match_table = ACPI_PTR(rt5645_acpi_match),
4340                 .pm = &rt5645_pm,
4341         },
4342         .probe = rt5645_i2c_probe,
4343         .remove = rt5645_i2c_remove,
4344         .shutdown = rt5645_i2c_shutdown,
4345         .id_table = rt5645_i2c_id,
4346 };
4347 module_i2c_driver(rt5645_i2c_driver);
4348
4349 MODULE_DESCRIPTION("ASoC RT5645 driver");
4350 MODULE_AUTHOR("Bard Liao <bardliao@realtek.com>");
4351 MODULE_LICENSE("GPL v2");