2 * rt286.c -- RT286 ALSA SoC audio codec driver
4 * Copyright 2013 Realtek Semiconductor Corp.
5 * Author: Bard Liao <bardliao@realtek.com>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
12 #include <linux/module.h>
13 #include <linux/moduleparam.h>
14 #include <linux/init.h>
15 #include <linux/delay.h>
17 #include <linux/i2c.h>
18 #include <linux/platform_device.h>
19 #include <linux/spi/spi.h>
20 #include <linux/dmi.h>
21 #include <linux/acpi.h>
22 #include <sound/core.h>
23 #include <sound/pcm.h>
24 #include <sound/pcm_params.h>
25 #include <sound/soc.h>
26 #include <sound/soc-dapm.h>
27 #include <sound/initval.h>
28 #include <sound/tlv.h>
29 #include <sound/jack.h>
30 #include <linux/workqueue.h>
31 #include <sound/rt286.h>
36 #define RT286_VENDOR_ID 0x10ec0286
37 #define RT288_VENDOR_ID 0x10ec0288
40 struct reg_default *index_cache;
42 struct regmap *regmap;
43 struct snd_soc_component *component;
44 struct rt286_platform_data pdata;
45 struct i2c_client *i2c;
46 struct snd_soc_jack *jack;
47 struct delayed_work jack_detect_work;
52 static const struct reg_default rt286_index_def[] = {
74 #define INDEX_CACHE_SIZE ARRAY_SIZE(rt286_index_def)
76 static const struct reg_default rt286_reg[] = {
77 { 0x00170500, 0x00000400 },
78 { 0x00220000, 0x00000031 },
79 { 0x00239000, 0x0000007f },
80 { 0x0023a000, 0x0000007f },
81 { 0x00270500, 0x00000400 },
82 { 0x00370500, 0x00000400 },
83 { 0x00870500, 0x00000400 },
84 { 0x00920000, 0x00000031 },
85 { 0x00935000, 0x000000c3 },
86 { 0x00936000, 0x000000c3 },
87 { 0x00970500, 0x00000400 },
88 { 0x00b37000, 0x00000097 },
89 { 0x00b37200, 0x00000097 },
90 { 0x00b37300, 0x00000097 },
91 { 0x00c37000, 0x00000000 },
92 { 0x00c37100, 0x00000080 },
93 { 0x01270500, 0x00000400 },
94 { 0x01370500, 0x00000400 },
95 { 0x01371f00, 0x411111f0 },
96 { 0x01439000, 0x00000080 },
97 { 0x0143a000, 0x00000080 },
98 { 0x01470700, 0x00000000 },
99 { 0x01470500, 0x00000400 },
100 { 0x01470c00, 0x00000000 },
101 { 0x01470100, 0x00000000 },
102 { 0x01837000, 0x00000000 },
103 { 0x01870500, 0x00000400 },
104 { 0x02050000, 0x00000000 },
105 { 0x02139000, 0x00000080 },
106 { 0x0213a000, 0x00000080 },
107 { 0x02170100, 0x00000000 },
108 { 0x02170500, 0x00000400 },
109 { 0x02170700, 0x00000000 },
110 { 0x02270100, 0x00000000 },
111 { 0x02370100, 0x00000000 },
112 { 0x01870700, 0x00000020 },
113 { 0x00830000, 0x000000c3 },
114 { 0x00930000, 0x000000c3 },
115 { 0x01270700, 0x00000000 },
118 static bool rt286_volatile_register(struct device *dev, unsigned int reg)
122 case RT286_GET_PARAM(AC_NODE_ROOT, AC_PAR_VENDOR_ID):
123 case RT286_GET_HP_SENSE:
124 case RT286_GET_MIC1_SENSE:
125 case RT286_PROC_COEF:
134 static bool rt286_readable_register(struct device *dev, unsigned int reg)
138 case RT286_GET_PARAM(AC_NODE_ROOT, AC_PAR_VENDOR_ID):
139 case RT286_GET_HP_SENSE:
140 case RT286_GET_MIC1_SENSE:
141 case RT286_SET_AUDIO_POWER:
142 case RT286_SET_HPO_POWER:
143 case RT286_SET_SPK_POWER:
144 case RT286_SET_DMIC1_POWER:
150 case RT286_SET_PIN_HPO:
151 case RT286_SET_PIN_SPK:
152 case RT286_SET_PIN_DMIC1:
154 case RT286_SET_AMP_GAIN_HPO:
155 case RT286_SET_DMIC2_DEFAULT:
156 case RT286_DACL_GAIN:
157 case RT286_DACR_GAIN:
158 case RT286_ADCL_GAIN:
159 case RT286_ADCR_GAIN:
161 case RT286_SPOL_GAIN:
162 case RT286_SPOR_GAIN:
163 case RT286_HPOL_GAIN:
164 case RT286_HPOR_GAIN:
165 case RT286_F_DAC_SWITCH:
166 case RT286_F_RECMIX_SWITCH:
167 case RT286_REC_MIC_SWITCH:
168 case RT286_REC_I2S_SWITCH:
169 case RT286_REC_LINE_SWITCH:
170 case RT286_REC_BEEP_SWITCH:
171 case RT286_DAC_FORMAT:
172 case RT286_ADC_FORMAT:
173 case RT286_COEF_INDEX:
174 case RT286_PROC_COEF:
175 case RT286_SET_AMP_GAIN_ADC_IN1:
176 case RT286_SET_AMP_GAIN_ADC_IN2:
177 case RT286_SET_GPIO_MASK:
178 case RT286_SET_GPIO_DIRECTION:
179 case RT286_SET_GPIO_DATA:
180 case RT286_SET_POWER(RT286_DAC_OUT1):
181 case RT286_SET_POWER(RT286_DAC_OUT2):
182 case RT286_SET_POWER(RT286_ADC_IN1):
183 case RT286_SET_POWER(RT286_ADC_IN2):
184 case RT286_SET_POWER(RT286_DMIC2):
185 case RT286_SET_POWER(RT286_MIC1):
193 static void rt286_index_sync(struct snd_soc_component *component)
195 struct rt286_priv *rt286 = snd_soc_component_get_drvdata(component);
198 for (i = 0; i < INDEX_CACHE_SIZE; i++) {
199 snd_soc_component_write(component, rt286->index_cache[i].reg,
200 rt286->index_cache[i].def);
205 static int rt286_support_power_controls[] = {
216 #define RT286_POWER_REG_LEN ARRAY_SIZE(rt286_support_power_controls)
218 static int rt286_jack_detect(struct rt286_priv *rt286, bool *hp, bool *mic)
220 struct snd_soc_dapm_context *dapm;
221 unsigned int val, buf;
226 if (!rt286->component)
229 dapm = snd_soc_component_get_dapm(rt286->component);
231 if (rt286->pdata.cbj_en) {
232 regmap_read(rt286->regmap, RT286_GET_HP_SENSE, &buf);
233 *hp = buf & 0x80000000;
235 /* power on HV,VERF */
236 regmap_update_bits(rt286->regmap,
237 RT286_DC_GAIN, 0x200, 0x200);
239 snd_soc_dapm_force_enable_pin(dapm, "HV");
240 snd_soc_dapm_force_enable_pin(dapm, "VREF");
242 snd_soc_dapm_force_enable_pin(dapm, "LDO1");
243 snd_soc_dapm_sync(dapm);
245 regmap_write(rt286->regmap, RT286_SET_MIC1, 0x24);
248 regmap_update_bits(rt286->regmap,
249 RT286_CBJ_CTRL1, 0xfcc0, 0xd400);
251 regmap_read(rt286->regmap, RT286_CBJ_CTRL2, &val);
253 if (0x0070 == (val & 0x0070)) {
256 regmap_update_bits(rt286->regmap,
257 RT286_CBJ_CTRL1, 0xfcc0, 0xe400);
259 regmap_read(rt286->regmap,
260 RT286_CBJ_CTRL2, &val);
261 if (0x0070 == (val & 0x0070))
266 regmap_update_bits(rt286->regmap,
267 RT286_DC_GAIN, 0x200, 0x0);
271 regmap_write(rt286->regmap, RT286_SET_MIC1, 0x20);
272 regmap_update_bits(rt286->regmap,
273 RT286_CBJ_CTRL1, 0x0400, 0x0000);
276 regmap_read(rt286->regmap, RT286_GET_HP_SENSE, &buf);
277 *hp = buf & 0x80000000;
278 regmap_read(rt286->regmap, RT286_GET_MIC1_SENSE, &buf);
279 *mic = buf & 0x80000000;
282 snd_soc_dapm_disable_pin(dapm, "HV");
283 snd_soc_dapm_disable_pin(dapm, "VREF");
286 snd_soc_dapm_disable_pin(dapm, "LDO1");
287 snd_soc_dapm_sync(dapm);
292 static void rt286_jack_detect_work(struct work_struct *work)
294 struct rt286_priv *rt286 =
295 container_of(work, struct rt286_priv, jack_detect_work.work);
300 rt286_jack_detect(rt286, &hp, &mic);
303 status |= SND_JACK_HEADPHONE;
306 status |= SND_JACK_MICROPHONE;
308 snd_soc_jack_report(rt286->jack, status,
309 SND_JACK_MICROPHONE | SND_JACK_HEADPHONE);
312 int rt286_mic_detect(struct snd_soc_component *component, struct snd_soc_jack *jack)
314 struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
315 struct rt286_priv *rt286 = snd_soc_component_get_drvdata(component);
321 if (rt286->jack->status & SND_JACK_HEADPHONE)
322 snd_soc_dapm_force_enable_pin(dapm, "LDO1");
323 regmap_update_bits(rt286->regmap, RT286_IRQ_CTRL, 0x2, 0x2);
324 /* Send an initial empty report */
325 snd_soc_jack_report(rt286->jack, rt286->jack->status,
326 SND_JACK_MICROPHONE | SND_JACK_HEADPHONE);
329 regmap_update_bits(rt286->regmap, RT286_IRQ_CTRL, 0x2, 0x0);
330 snd_soc_dapm_disable_pin(dapm, "LDO1");
332 snd_soc_dapm_sync(dapm);
336 EXPORT_SYMBOL_GPL(rt286_mic_detect);
338 static int is_mclk_mode(struct snd_soc_dapm_widget *source,
339 struct snd_soc_dapm_widget *sink)
341 struct snd_soc_component *component = snd_soc_dapm_to_component(source->dapm);
342 struct rt286_priv *rt286 = snd_soc_component_get_drvdata(component);
344 if (rt286->clk_id == RT286_SCLK_S_MCLK)
350 static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -6350, 50, 0);
351 static const DECLARE_TLV_DB_SCALE(mic_vol_tlv, 0, 1000, 0);
353 static const struct snd_kcontrol_new rt286_snd_controls[] = {
354 SOC_DOUBLE_R_TLV("DAC0 Playback Volume", RT286_DACL_GAIN,
355 RT286_DACR_GAIN, 0, 0x7f, 0, out_vol_tlv),
356 SOC_DOUBLE_R("ADC0 Capture Switch", RT286_ADCL_GAIN,
357 RT286_ADCR_GAIN, 7, 1, 1),
358 SOC_DOUBLE_R_TLV("ADC0 Capture Volume", RT286_ADCL_GAIN,
359 RT286_ADCR_GAIN, 0, 0x7f, 0, out_vol_tlv),
360 SOC_SINGLE_TLV("AMIC Volume", RT286_MIC_GAIN,
361 0, 0x3, 0, mic_vol_tlv),
362 SOC_DOUBLE_R("Speaker Playback Switch", RT286_SPOL_GAIN,
363 RT286_SPOR_GAIN, RT286_MUTE_SFT, 1, 1),
367 static const struct snd_kcontrol_new rt286_front_mix[] = {
368 SOC_DAPM_SINGLE("DAC Switch", RT286_F_DAC_SWITCH,
369 RT286_MUTE_SFT, 1, 1),
370 SOC_DAPM_SINGLE("RECMIX Switch", RT286_F_RECMIX_SWITCH,
371 RT286_MUTE_SFT, 1, 1),
374 /* Analog Input Mixer */
375 static const struct snd_kcontrol_new rt286_rec_mix[] = {
376 SOC_DAPM_SINGLE("Mic1 Switch", RT286_REC_MIC_SWITCH,
377 RT286_MUTE_SFT, 1, 1),
378 SOC_DAPM_SINGLE("I2S Switch", RT286_REC_I2S_SWITCH,
379 RT286_MUTE_SFT, 1, 1),
380 SOC_DAPM_SINGLE("Line1 Switch", RT286_REC_LINE_SWITCH,
381 RT286_MUTE_SFT, 1, 1),
382 SOC_DAPM_SINGLE("Beep Switch", RT286_REC_BEEP_SWITCH,
383 RT286_MUTE_SFT, 1, 1),
386 static const struct snd_kcontrol_new spo_enable_control =
387 SOC_DAPM_SINGLE("Switch", RT286_SET_PIN_SPK,
388 RT286_SET_PIN_SFT, 1, 0);
390 static const struct snd_kcontrol_new hpol_enable_control =
391 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT286_HPOL_GAIN,
392 RT286_MUTE_SFT, 1, 1);
394 static const struct snd_kcontrol_new hpor_enable_control =
395 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT286_HPOR_GAIN,
396 RT286_MUTE_SFT, 1, 1);
399 static const char * const rt286_adc_src[] = {
400 "Mic", "RECMIX", "Dmic"
403 static const int rt286_adc_values[] = {
407 static SOC_VALUE_ENUM_SINGLE_DECL(
408 rt286_adc0_enum, RT286_ADC0_MUX, RT286_ADC_SEL_SFT,
409 RT286_ADC_SEL_MASK, rt286_adc_src, rt286_adc_values);
411 static const struct snd_kcontrol_new rt286_adc0_mux =
412 SOC_DAPM_ENUM("ADC 0 source", rt286_adc0_enum);
414 static SOC_VALUE_ENUM_SINGLE_DECL(
415 rt286_adc1_enum, RT286_ADC1_MUX, RT286_ADC_SEL_SFT,
416 RT286_ADC_SEL_MASK, rt286_adc_src, rt286_adc_values);
418 static const struct snd_kcontrol_new rt286_adc1_mux =
419 SOC_DAPM_ENUM("ADC 1 source", rt286_adc1_enum);
421 static const char * const rt286_dac_src[] = {
425 static SOC_ENUM_SINGLE_DECL(rt286_hpo_enum, RT286_HPO_MUX,
428 static const struct snd_kcontrol_new rt286_hpo_mux =
429 SOC_DAPM_ENUM("HPO source", rt286_hpo_enum);
432 static SOC_ENUM_SINGLE_DECL(rt286_spo_enum, RT286_SPK_MUX,
435 static const struct snd_kcontrol_new rt286_spo_mux =
436 SOC_DAPM_ENUM("SPO source", rt286_spo_enum);
438 static int rt286_spk_event(struct snd_soc_dapm_widget *w,
439 struct snd_kcontrol *kcontrol, int event)
441 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
444 case SND_SOC_DAPM_POST_PMU:
445 snd_soc_component_write(component,
446 RT286_SPK_EAPD, RT286_SET_EAPD_HIGH);
448 case SND_SOC_DAPM_PRE_PMD:
449 snd_soc_component_write(component,
450 RT286_SPK_EAPD, RT286_SET_EAPD_LOW);
460 static int rt286_set_dmic1_event(struct snd_soc_dapm_widget *w,
461 struct snd_kcontrol *kcontrol, int event)
463 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
466 case SND_SOC_DAPM_POST_PMU:
467 snd_soc_component_write(component, RT286_SET_PIN_DMIC1, 0x20);
469 case SND_SOC_DAPM_PRE_PMD:
470 snd_soc_component_write(component, RT286_SET_PIN_DMIC1, 0);
479 static int rt286_ldo2_event(struct snd_soc_dapm_widget *w,
480 struct snd_kcontrol *kcontrol, int event)
482 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
485 case SND_SOC_DAPM_POST_PMU:
486 snd_soc_component_update_bits(component, RT286_POWER_CTRL2, 0x38, 0x08);
488 case SND_SOC_DAPM_PRE_PMD:
489 snd_soc_component_update_bits(component, RT286_POWER_CTRL2, 0x38, 0x30);
498 static int rt286_mic1_event(struct snd_soc_dapm_widget *w,
499 struct snd_kcontrol *kcontrol, int event)
501 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
504 case SND_SOC_DAPM_PRE_PMU:
505 snd_soc_component_update_bits(component,
506 RT286_A_BIAS_CTRL3, 0xc000, 0x8000);
507 snd_soc_component_update_bits(component,
508 RT286_A_BIAS_CTRL2, 0xc000, 0x8000);
510 case SND_SOC_DAPM_POST_PMD:
511 snd_soc_component_update_bits(component,
512 RT286_A_BIAS_CTRL3, 0xc000, 0x0000);
513 snd_soc_component_update_bits(component,
514 RT286_A_BIAS_CTRL2, 0xc000, 0x0000);
523 static const struct snd_soc_dapm_widget rt286_dapm_widgets[] = {
524 SND_SOC_DAPM_SUPPLY_S("HV", 1, RT286_POWER_CTRL1,
526 SND_SOC_DAPM_SUPPLY("VREF", RT286_POWER_CTRL1,
528 SND_SOC_DAPM_SUPPLY_S("LDO1", 1, RT286_POWER_CTRL2,
530 SND_SOC_DAPM_SUPPLY_S("LDO2", 2, RT286_POWER_CTRL1,
531 13, 1, rt286_ldo2_event, SND_SOC_DAPM_PRE_PMD |
532 SND_SOC_DAPM_POST_PMU),
533 SND_SOC_DAPM_SUPPLY("MCLK MODE", RT286_PLL_CTRL1,
535 SND_SOC_DAPM_SUPPLY("MIC1 Input Buffer", SND_SOC_NOPM,
536 0, 0, rt286_mic1_event, SND_SOC_DAPM_PRE_PMU |
537 SND_SOC_DAPM_POST_PMD),
540 SND_SOC_DAPM_INPUT("DMIC1 Pin"),
541 SND_SOC_DAPM_INPUT("DMIC2 Pin"),
542 SND_SOC_DAPM_INPUT("MIC1"),
543 SND_SOC_DAPM_INPUT("LINE1"),
544 SND_SOC_DAPM_INPUT("Beep"),
547 SND_SOC_DAPM_PGA_E("DMIC1", RT286_SET_POWER(RT286_DMIC1), 0, 1,
548 NULL, 0, rt286_set_dmic1_event,
549 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
550 SND_SOC_DAPM_PGA("DMIC2", RT286_SET_POWER(RT286_DMIC2), 0, 1,
552 SND_SOC_DAPM_SUPPLY("DMIC Receiver", SND_SOC_NOPM,
556 SND_SOC_DAPM_MIXER("RECMIX", SND_SOC_NOPM, 0, 0,
557 rt286_rec_mix, ARRAY_SIZE(rt286_rec_mix)),
560 SND_SOC_DAPM_ADC("ADC 0", NULL, SND_SOC_NOPM, 0, 0),
561 SND_SOC_DAPM_ADC("ADC 1", NULL, SND_SOC_NOPM, 0, 0),
564 SND_SOC_DAPM_MUX("ADC 0 Mux", RT286_SET_POWER(RT286_ADC_IN1), 0, 1,
566 SND_SOC_DAPM_MUX("ADC 1 Mux", RT286_SET_POWER(RT286_ADC_IN2), 0, 1,
569 /* Audio Interface */
570 SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
571 SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0),
572 SND_SOC_DAPM_AIF_IN("AIF2RX", "AIF2 Playback", 0, SND_SOC_NOPM, 0, 0),
573 SND_SOC_DAPM_AIF_OUT("AIF2TX", "AIF2 Capture", 0, SND_SOC_NOPM, 0, 0),
577 SND_SOC_DAPM_DAC("DAC 0", NULL, SND_SOC_NOPM, 0, 0),
578 SND_SOC_DAPM_DAC("DAC 1", NULL, SND_SOC_NOPM, 0, 0),
581 SND_SOC_DAPM_MUX("SPK Mux", SND_SOC_NOPM, 0, 0, &rt286_spo_mux),
582 SND_SOC_DAPM_MUX("HPO Mux", SND_SOC_NOPM, 0, 0, &rt286_hpo_mux),
584 SND_SOC_DAPM_SUPPLY("HP Power", RT286_SET_PIN_HPO,
585 RT286_SET_PIN_SFT, 0, NULL, 0),
588 SND_SOC_DAPM_MIXER("Front", RT286_SET_POWER(RT286_DAC_OUT1), 0, 1,
589 rt286_front_mix, ARRAY_SIZE(rt286_front_mix)),
590 SND_SOC_DAPM_PGA("Surround", RT286_SET_POWER(RT286_DAC_OUT2), 0, 1,
594 SND_SOC_DAPM_SWITCH_E("SPO", SND_SOC_NOPM, 0, 0,
595 &spo_enable_control, rt286_spk_event,
596 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
597 SND_SOC_DAPM_SWITCH("HPO L", SND_SOC_NOPM, 0, 0,
598 &hpol_enable_control),
599 SND_SOC_DAPM_SWITCH("HPO R", SND_SOC_NOPM, 0, 0,
600 &hpor_enable_control),
603 SND_SOC_DAPM_OUTPUT("SPOL"),
604 SND_SOC_DAPM_OUTPUT("SPOR"),
605 SND_SOC_DAPM_OUTPUT("HPO Pin"),
606 SND_SOC_DAPM_OUTPUT("SPDIF"),
609 static const struct snd_soc_dapm_route rt286_dapm_routes[] = {
610 {"ADC 0", NULL, "MCLK MODE", is_mclk_mode},
611 {"ADC 1", NULL, "MCLK MODE", is_mclk_mode},
612 {"Front", NULL, "MCLK MODE", is_mclk_mode},
613 {"Surround", NULL, "MCLK MODE", is_mclk_mode},
615 {"HP Power", NULL, "LDO1"},
616 {"HP Power", NULL, "LDO2"},
618 {"MIC1", NULL, "LDO1"},
619 {"MIC1", NULL, "LDO2"},
620 {"MIC1", NULL, "HV"},
621 {"MIC1", NULL, "VREF"},
622 {"MIC1", NULL, "MIC1 Input Buffer"},
624 {"SPO", NULL, "LDO1"},
625 {"SPO", NULL, "LDO2"},
627 {"SPO", NULL, "VREF"},
629 {"DMIC1", NULL, "DMIC1 Pin"},
630 {"DMIC2", NULL, "DMIC2 Pin"},
631 {"DMIC1", NULL, "DMIC Receiver"},
632 {"DMIC2", NULL, "DMIC Receiver"},
634 {"RECMIX", "Beep Switch", "Beep"},
635 {"RECMIX", "Line1 Switch", "LINE1"},
636 {"RECMIX", "Mic1 Switch", "MIC1"},
638 {"ADC 0 Mux", "Dmic", "DMIC1"},
639 {"ADC 0 Mux", "RECMIX", "RECMIX"},
640 {"ADC 0 Mux", "Mic", "MIC1"},
641 {"ADC 1 Mux", "Dmic", "DMIC2"},
642 {"ADC 1 Mux", "RECMIX", "RECMIX"},
643 {"ADC 1 Mux", "Mic", "MIC1"},
645 {"ADC 0", NULL, "ADC 0 Mux"},
646 {"ADC 1", NULL, "ADC 1 Mux"},
648 {"AIF1TX", NULL, "ADC 0"},
649 {"AIF2TX", NULL, "ADC 1"},
651 {"DAC 0", NULL, "AIF1RX"},
652 {"DAC 1", NULL, "AIF2RX"},
654 {"Front", "DAC Switch", "DAC 0"},
655 {"Front", "RECMIX Switch", "RECMIX"},
657 {"Surround", NULL, "DAC 1"},
659 {"SPK Mux", "Front", "Front"},
660 {"SPK Mux", "Surround", "Surround"},
662 {"HPO Mux", "Front", "Front"},
663 {"HPO Mux", "Surround", "Surround"},
665 {"SPO", "Switch", "SPK Mux"},
666 {"HPO L", "Switch", "HPO Mux"},
667 {"HPO R", "Switch", "HPO Mux"},
668 {"HPO L", NULL, "HP Power"},
669 {"HPO R", NULL, "HP Power"},
671 {"SPOL", NULL, "SPO"},
672 {"SPOR", NULL, "SPO"},
673 {"HPO Pin", NULL, "HPO L"},
674 {"HPO Pin", NULL, "HPO R"},
677 static int rt286_hw_params(struct snd_pcm_substream *substream,
678 struct snd_pcm_hw_params *params,
679 struct snd_soc_dai *dai)
681 struct snd_soc_component *component = dai->component;
682 struct rt286_priv *rt286 = snd_soc_component_get_drvdata(component);
683 unsigned int val = 0;
686 switch (params_rate(params)) {
687 /* bit 14 0:48K 1:44.1K */
694 dev_err(component->dev, "Unsupported sample rate %d\n",
695 params_rate(params));
698 switch (rt286->sys_clk) {
701 if (params_rate(params) != 48000) {
702 dev_err(component->dev, "Sys_clk is not matched (%d %d)\n",
703 params_rate(params), rt286->sys_clk);
709 if (params_rate(params) != 44100) {
710 dev_err(component->dev, "Sys_clk is not matched (%d %d)\n",
711 params_rate(params), rt286->sys_clk);
717 if (params_channels(params) <= 16) {
718 /* bit 3:0 Number of Channel */
719 val |= (params_channels(params) - 1);
721 dev_err(component->dev, "Unsupported channels %d\n",
722 params_channels(params));
727 switch (params_width(params)) {
728 /* bit 6:4 Bits per Sample */
752 snd_soc_component_update_bits(component,
753 RT286_I2S_CTRL1, 0x0018, d_len_code << 3);
754 dev_dbg(component->dev, "format val = 0x%x\n", val);
756 snd_soc_component_update_bits(component, RT286_DAC_FORMAT, 0x407f, val);
757 snd_soc_component_update_bits(component, RT286_ADC_FORMAT, 0x407f, val);
762 static int rt286_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
764 struct snd_soc_component *component = dai->component;
766 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
767 case SND_SOC_DAIFMT_CBM_CFM:
768 snd_soc_component_update_bits(component,
769 RT286_I2S_CTRL1, 0x800, 0x800);
771 case SND_SOC_DAIFMT_CBS_CFS:
772 snd_soc_component_update_bits(component,
773 RT286_I2S_CTRL1, 0x800, 0x0);
779 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
780 case SND_SOC_DAIFMT_I2S:
781 snd_soc_component_update_bits(component,
782 RT286_I2S_CTRL1, 0x300, 0x0);
784 case SND_SOC_DAIFMT_LEFT_J:
785 snd_soc_component_update_bits(component,
786 RT286_I2S_CTRL1, 0x300, 0x1 << 8);
788 case SND_SOC_DAIFMT_DSP_A:
789 snd_soc_component_update_bits(component,
790 RT286_I2S_CTRL1, 0x300, 0x2 << 8);
792 case SND_SOC_DAIFMT_DSP_B:
793 snd_soc_component_update_bits(component,
794 RT286_I2S_CTRL1, 0x300, 0x3 << 8);
799 /* bit 15 Stream Type 0:PCM 1:Non-PCM */
800 snd_soc_component_update_bits(component, RT286_DAC_FORMAT, 0x8000, 0);
801 snd_soc_component_update_bits(component, RT286_ADC_FORMAT, 0x8000, 0);
806 static int rt286_set_dai_sysclk(struct snd_soc_dai *dai,
807 int clk_id, unsigned int freq, int dir)
809 struct snd_soc_component *component = dai->component;
810 struct rt286_priv *rt286 = snd_soc_component_get_drvdata(component);
812 dev_dbg(component->dev, "%s freq=%d\n", __func__, freq);
814 if (RT286_SCLK_S_MCLK == clk_id) {
815 snd_soc_component_update_bits(component,
816 RT286_I2S_CTRL2, 0x0100, 0x0);
817 snd_soc_component_update_bits(component,
818 RT286_PLL_CTRL1, 0x20, 0x20);
820 snd_soc_component_update_bits(component,
821 RT286_I2S_CTRL2, 0x0100, 0x0100);
822 snd_soc_component_update_bits(component,
823 RT286_PLL_CTRL, 0x4, 0x4);
824 snd_soc_component_update_bits(component,
825 RT286_PLL_CTRL1, 0x20, 0x0);
830 if (RT286_SCLK_S_MCLK == clk_id) {
831 dev_err(component->dev, "Should not use MCLK\n");
834 snd_soc_component_update_bits(component,
835 RT286_I2S_CTRL2, 0x40, 0x40);
838 if (RT286_SCLK_S_MCLK == clk_id) {
839 dev_err(component->dev, "Should not use MCLK\n");
842 snd_soc_component_update_bits(component,
843 RT286_I2S_CTRL2, 0x40, 0x0);
847 snd_soc_component_update_bits(component,
848 RT286_I2S_CTRL2, 0x8, 0x0);
849 snd_soc_component_update_bits(component,
850 RT286_CLK_DIV, 0xfc1e, 0x0004);
854 snd_soc_component_update_bits(component,
855 RT286_I2S_CTRL2, 0x8, 0x8);
856 snd_soc_component_update_bits(component,
857 RT286_CLK_DIV, 0xfc1e, 0x5406);
860 dev_err(component->dev, "Unsupported system clock\n");
864 rt286->sys_clk = freq;
865 rt286->clk_id = clk_id;
870 static int rt286_set_bclk_ratio(struct snd_soc_dai *dai, unsigned int ratio)
872 struct snd_soc_component *component = dai->component;
874 dev_dbg(component->dev, "%s ratio=%d\n", __func__, ratio);
876 snd_soc_component_update_bits(component,
877 RT286_I2S_CTRL1, 0x1000, 0x1000);
879 snd_soc_component_update_bits(component,
880 RT286_I2S_CTRL1, 0x1000, 0x0);
886 static int rt286_set_bias_level(struct snd_soc_component *component,
887 enum snd_soc_bias_level level)
890 case SND_SOC_BIAS_PREPARE:
891 if (SND_SOC_BIAS_STANDBY == snd_soc_component_get_bias_level(component)) {
892 snd_soc_component_write(component,
893 RT286_SET_AUDIO_POWER, AC_PWRST_D0);
894 snd_soc_component_update_bits(component,
895 RT286_DC_GAIN, 0x200, 0x200);
899 case SND_SOC_BIAS_ON:
901 snd_soc_component_update_bits(component,
902 RT286_DC_GAIN, 0x200, 0x0);
906 case SND_SOC_BIAS_STANDBY:
907 snd_soc_component_write(component,
908 RT286_SET_AUDIO_POWER, AC_PWRST_D3);
918 static irqreturn_t rt286_irq(int irq, void *data)
920 struct rt286_priv *rt286 = data;
925 rt286_jack_detect(rt286, &hp, &mic);
928 regmap_update_bits(rt286->regmap, RT286_IRQ_CTRL, 0x1, 0x1);
931 status |= SND_JACK_HEADPHONE;
934 status |= SND_JACK_MICROPHONE;
936 snd_soc_jack_report(rt286->jack, status,
937 SND_JACK_MICROPHONE | SND_JACK_HEADPHONE);
939 pm_wakeup_event(&rt286->i2c->dev, 300);
944 static int rt286_probe(struct snd_soc_component *component)
946 struct rt286_priv *rt286 = snd_soc_component_get_drvdata(component);
948 rt286->component = component;
950 if (rt286->i2c->irq) {
951 regmap_update_bits(rt286->regmap,
952 RT286_IRQ_CTRL, 0x2, 0x2);
954 INIT_DELAYED_WORK(&rt286->jack_detect_work,
955 rt286_jack_detect_work);
956 schedule_delayed_work(&rt286->jack_detect_work,
957 msecs_to_jiffies(1250));
963 static void rt286_remove(struct snd_soc_component *component)
965 struct rt286_priv *rt286 = snd_soc_component_get_drvdata(component);
967 cancel_delayed_work_sync(&rt286->jack_detect_work);
971 static int rt286_suspend(struct snd_soc_component *component)
973 struct rt286_priv *rt286 = snd_soc_component_get_drvdata(component);
975 regcache_cache_only(rt286->regmap, true);
976 regcache_mark_dirty(rt286->regmap);
981 static int rt286_resume(struct snd_soc_component *component)
983 struct rt286_priv *rt286 = snd_soc_component_get_drvdata(component);
985 regcache_cache_only(rt286->regmap, false);
986 rt286_index_sync(component);
987 regcache_sync(rt286->regmap);
992 #define rt286_suspend NULL
993 #define rt286_resume NULL
996 #define RT286_STEREO_RATES (SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000)
997 #define RT286_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
998 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8)
1000 static const struct snd_soc_dai_ops rt286_aif_dai_ops = {
1001 .hw_params = rt286_hw_params,
1002 .set_fmt = rt286_set_dai_fmt,
1003 .set_sysclk = rt286_set_dai_sysclk,
1004 .set_bclk_ratio = rt286_set_bclk_ratio,
1007 static struct snd_soc_dai_driver rt286_dai[] = {
1009 .name = "rt286-aif1",
1012 .stream_name = "AIF1 Playback",
1015 .rates = RT286_STEREO_RATES,
1016 .formats = RT286_FORMATS,
1019 .stream_name = "AIF1 Capture",
1022 .rates = RT286_STEREO_RATES,
1023 .formats = RT286_FORMATS,
1025 .ops = &rt286_aif_dai_ops,
1026 .symmetric_rates = 1,
1029 .name = "rt286-aif2",
1032 .stream_name = "AIF2 Playback",
1035 .rates = RT286_STEREO_RATES,
1036 .formats = RT286_FORMATS,
1039 .stream_name = "AIF2 Capture",
1042 .rates = RT286_STEREO_RATES,
1043 .formats = RT286_FORMATS,
1045 .ops = &rt286_aif_dai_ops,
1046 .symmetric_rates = 1,
1051 static const struct snd_soc_component_driver soc_component_dev_rt286 = {
1052 .probe = rt286_probe,
1053 .remove = rt286_remove,
1054 .suspend = rt286_suspend,
1055 .resume = rt286_resume,
1056 .set_bias_level = rt286_set_bias_level,
1057 .controls = rt286_snd_controls,
1058 .num_controls = ARRAY_SIZE(rt286_snd_controls),
1059 .dapm_widgets = rt286_dapm_widgets,
1060 .num_dapm_widgets = ARRAY_SIZE(rt286_dapm_widgets),
1061 .dapm_routes = rt286_dapm_routes,
1062 .num_dapm_routes = ARRAY_SIZE(rt286_dapm_routes),
1063 .use_pmdown_time = 1,
1065 .non_legacy_dai_naming = 1,
1068 static const struct regmap_config rt286_regmap = {
1071 .max_register = 0x02370100,
1072 .volatile_reg = rt286_volatile_register,
1073 .readable_reg = rt286_readable_register,
1074 .reg_write = rl6347a_hw_write,
1075 .reg_read = rl6347a_hw_read,
1076 .cache_type = REGCACHE_RBTREE,
1077 .reg_defaults = rt286_reg,
1078 .num_reg_defaults = ARRAY_SIZE(rt286_reg),
1081 static const struct i2c_device_id rt286_i2c_id[] = {
1086 MODULE_DEVICE_TABLE(i2c, rt286_i2c_id);
1088 static const struct acpi_device_id rt286_acpi_match[] = {
1092 MODULE_DEVICE_TABLE(acpi, rt286_acpi_match);
1094 static const struct dmi_system_id force_combo_jack_table[] = {
1096 .ident = "Intel Wilson Beach",
1098 DMI_MATCH(DMI_BOARD_NAME, "Wilson Beach SDS")
1102 .ident = "Intel Skylake RVP",
1104 DMI_MATCH(DMI_PRODUCT_NAME, "Skylake Client platform")
1108 .ident = "Intel Kabylake RVP",
1110 DMI_MATCH(DMI_PRODUCT_NAME, "Kabylake Client platform")
1114 .ident = "Thinkpad Helix 2nd",
1116 DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"),
1117 DMI_MATCH(DMI_PRODUCT_VERSION, "ThinkPad Helix 2nd")
1124 static const struct dmi_system_id dmi_dell[] = {
1128 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
1134 static int rt286_i2c_probe(struct i2c_client *i2c,
1135 const struct i2c_device_id *id)
1137 struct rt286_platform_data *pdata = dev_get_platdata(&i2c->dev);
1138 struct rt286_priv *rt286;
1139 int i, ret, vendor_id;
1141 rt286 = devm_kzalloc(&i2c->dev, sizeof(*rt286),
1146 rt286->regmap = devm_regmap_init(&i2c->dev, NULL, i2c, &rt286_regmap);
1147 if (IS_ERR(rt286->regmap)) {
1148 ret = PTR_ERR(rt286->regmap);
1149 dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
1154 ret = regmap_read(rt286->regmap,
1155 RT286_GET_PARAM(AC_NODE_ROOT, AC_PAR_VENDOR_ID), &vendor_id);
1157 dev_err(&i2c->dev, "I2C error %d\n", ret);
1160 if (vendor_id != RT286_VENDOR_ID && vendor_id != RT288_VENDOR_ID) {
1162 "Device with ID register %#x is not rt286\n",
1167 rt286->index_cache = devm_kmemdup(&i2c->dev, rt286_index_def,
1168 sizeof(rt286_index_def), GFP_KERNEL);
1169 if (!rt286->index_cache)
1172 rt286->index_cache_size = INDEX_CACHE_SIZE;
1174 i2c_set_clientdata(i2c, rt286);
1176 /* restore codec default */
1177 for (i = 0; i < INDEX_CACHE_SIZE; i++)
1178 regmap_write(rt286->regmap, rt286->index_cache[i].reg,
1179 rt286->index_cache[i].def);
1180 for (i = 0; i < ARRAY_SIZE(rt286_reg); i++)
1181 regmap_write(rt286->regmap, rt286_reg[i].reg,
1185 rt286->pdata = *pdata;
1187 if ((vendor_id == RT288_VENDOR_ID && dmi_check_system(dmi_dell)) ||
1188 dmi_check_system(force_combo_jack_table))
1189 rt286->pdata.cbj_en = true;
1191 regmap_write(rt286->regmap, RT286_SET_AUDIO_POWER, AC_PWRST_D3);
1193 for (i = 0; i < RT286_POWER_REG_LEN; i++)
1194 regmap_write(rt286->regmap,
1195 RT286_SET_POWER(rt286_support_power_controls[i]),
1198 if (!rt286->pdata.cbj_en) {
1199 regmap_write(rt286->regmap, RT286_CBJ_CTRL2, 0x0000);
1200 regmap_write(rt286->regmap, RT286_MIC1_DET_CTRL, 0x0816);
1201 regmap_update_bits(rt286->regmap,
1202 RT286_CBJ_CTRL1, 0xf000, 0xb000);
1204 regmap_update_bits(rt286->regmap,
1205 RT286_CBJ_CTRL1, 0xf000, 0x5000);
1210 if (!rt286->pdata.gpio2_en)
1211 regmap_write(rt286->regmap, RT286_SET_DMIC2_DEFAULT, 0x4000);
1213 regmap_write(rt286->regmap, RT286_SET_DMIC2_DEFAULT, 0);
1217 regmap_write(rt286->regmap, RT286_MISC_CTRL1, 0x0000);
1218 /* Power down LDO, VREF */
1219 regmap_update_bits(rt286->regmap, RT286_POWER_CTRL2, 0xc, 0x0);
1220 regmap_update_bits(rt286->regmap, RT286_POWER_CTRL1, 0x1001, 0x1001);
1222 /* Set depop parameter */
1223 regmap_update_bits(rt286->regmap, RT286_DEPOP_CTRL2, 0x403a, 0x401a);
1224 regmap_update_bits(rt286->regmap, RT286_DEPOP_CTRL3, 0xf777, 0x4737);
1225 regmap_update_bits(rt286->regmap, RT286_DEPOP_CTRL4, 0x00ff, 0x003f);
1227 if (vendor_id == RT288_VENDOR_ID && dmi_check_system(dmi_dell)) {
1228 regmap_update_bits(rt286->regmap,
1229 RT286_SET_GPIO_MASK, 0x40, 0x40);
1230 regmap_update_bits(rt286->regmap,
1231 RT286_SET_GPIO_DIRECTION, 0x40, 0x40);
1232 regmap_update_bits(rt286->regmap,
1233 RT286_SET_GPIO_DATA, 0x40, 0x40);
1234 regmap_update_bits(rt286->regmap,
1235 RT286_GPIO_CTRL, 0xc, 0x8);
1238 if (rt286->i2c->irq) {
1239 ret = request_threaded_irq(rt286->i2c->irq, NULL, rt286_irq,
1240 IRQF_TRIGGER_HIGH | IRQF_ONESHOT, "rt286", rt286);
1243 "Failed to reguest IRQ: %d\n", ret);
1248 ret = devm_snd_soc_register_component(&i2c->dev,
1249 &soc_component_dev_rt286,
1250 rt286_dai, ARRAY_SIZE(rt286_dai));
1255 static int rt286_i2c_remove(struct i2c_client *i2c)
1257 struct rt286_priv *rt286 = i2c_get_clientdata(i2c);
1260 free_irq(i2c->irq, rt286);
1266 static struct i2c_driver rt286_i2c_driver = {
1269 .acpi_match_table = ACPI_PTR(rt286_acpi_match),
1271 .probe = rt286_i2c_probe,
1272 .remove = rt286_i2c_remove,
1273 .id_table = rt286_i2c_id,
1276 module_i2c_driver(rt286_i2c_driver);
1278 MODULE_DESCRIPTION("ASoC RT286 driver");
1279 MODULE_AUTHOR("Bard Liao <bardliao@realtek.com>");
1280 MODULE_LICENSE("GPL");