1 // SPDX-License-Identifier: GPL-2.0-only
3 // aw88395_device.c -- AW88395 function for ALSA Audio Driver
5 // Copyright (c) 2022-2023 AWINIC Technology CO., LTD
7 // Author: Bruce zhao <zhaolei@awinic.com>
8 // Author: Ben Yi <yijiangtao@awinic.com>
11 #include <linux/crc32.h>
12 #include <linux/i2c.h>
13 #include <linux/regmap.h>
14 #include "aw88395_device.h"
15 #include "aw88395_reg.h"
17 static int aw_dev_dsp_write_16bit(struct aw_device *aw_dev,
18 unsigned short dsp_addr, unsigned int dsp_data)
22 ret = regmap_write(aw_dev->regmap, AW88395_DSPMADD_REG, dsp_addr);
24 dev_err(aw_dev->dev, "%s write addr error, ret=%d", __func__, ret);
28 ret = regmap_write(aw_dev->regmap, AW88395_DSPMDAT_REG, (u16)dsp_data);
30 dev_err(aw_dev->dev, "%s write data error, ret=%d", __func__, ret);
37 static int aw_dev_dsp_write_32bit(struct aw_device *aw_dev,
38 unsigned short dsp_addr, unsigned int dsp_data)
43 ret = regmap_write(aw_dev->regmap, AW88395_DSPMADD_REG, dsp_addr);
45 dev_err(aw_dev->dev, "%s write addr error, ret=%d", __func__, ret);
49 temp_data = dsp_data & AW88395_DSP_16_DATA_MASK;
50 ret = regmap_write(aw_dev->regmap, AW88395_DSPMDAT_REG, (u16)temp_data);
52 dev_err(aw_dev->dev, "%s write datal error, ret=%d", __func__, ret);
56 temp_data = dsp_data >> 16;
57 ret = regmap_write(aw_dev->regmap, AW88395_DSPMDAT_REG, (u16)temp_data);
59 dev_err(aw_dev->dev, "%s write datah error, ret=%d", __func__, ret);
66 static int aw_dev_dsp_write(struct aw_device *aw_dev,
67 unsigned short dsp_addr, unsigned int dsp_data, unsigned char data_type)
72 mutex_lock(&aw_dev->dsp_lock);
74 case AW88395_DSP_16_DATA:
75 ret = aw_dev_dsp_write_16bit(aw_dev, dsp_addr, dsp_data);
77 dev_err(aw_dev->dev, "write dsp_addr[0x%x] 16-bit dsp_data[0x%x] failed",
78 (u32)dsp_addr, dsp_data);
80 case AW88395_DSP_32_DATA:
81 ret = aw_dev_dsp_write_32bit(aw_dev, dsp_addr, dsp_data);
83 dev_err(aw_dev->dev, "write dsp_addr[0x%x] 32-bit dsp_data[0x%x] failed",
84 (u32)dsp_addr, dsp_data);
87 dev_err(aw_dev->dev, "data type[%d] unsupported", data_type);
92 /* clear dsp chip select state*/
93 if (regmap_read(aw_dev->regmap, AW88395_ID_REG, ®_value))
94 dev_err(aw_dev->dev, "%s fail to clear chip state. Err=%d\n", __func__, ret);
95 mutex_unlock(&aw_dev->dsp_lock);
100 static int aw_dev_dsp_read_16bit(struct aw_device *aw_dev,
101 unsigned short dsp_addr, unsigned int *dsp_data)
103 unsigned int temp_data;
106 ret = regmap_write(aw_dev->regmap, AW88395_DSPMADD_REG, dsp_addr);
108 dev_err(aw_dev->dev, "%s write error, ret=%d", __func__, ret);
112 ret = regmap_read(aw_dev->regmap, AW88395_DSPMDAT_REG, &temp_data);
114 dev_err(aw_dev->dev, "%s read error, ret=%d", __func__, ret);
117 *dsp_data = temp_data;
122 static int aw_dev_dsp_read_32bit(struct aw_device *aw_dev,
123 unsigned short dsp_addr, unsigned int *dsp_data)
125 unsigned int temp_data;
128 ret = regmap_write(aw_dev->regmap, AW88395_DSPMADD_REG, dsp_addr);
130 dev_err(aw_dev->dev, "%s write error, ret=%d", __func__, ret);
134 ret = regmap_read(aw_dev->regmap, AW88395_DSPMDAT_REG, &temp_data);
136 dev_err(aw_dev->dev, "%s read error, ret=%d", __func__, ret);
139 *dsp_data = temp_data;
141 ret = regmap_read(aw_dev->regmap, AW88395_DSPMDAT_REG, &temp_data);
143 dev_err(aw_dev->dev, "%s read error, ret=%d", __func__, ret);
146 *dsp_data |= (temp_data << 16);
151 static int aw_dev_dsp_read(struct aw_device *aw_dev,
152 unsigned short dsp_addr, unsigned int *dsp_data, unsigned char data_type)
157 mutex_lock(&aw_dev->dsp_lock);
159 case AW88395_DSP_16_DATA:
160 ret = aw_dev_dsp_read_16bit(aw_dev, dsp_addr, dsp_data);
162 dev_err(aw_dev->dev, "read dsp_addr[0x%x] 16-bit dsp_data[0x%x] failed",
163 (u32)dsp_addr, *dsp_data);
165 case AW88395_DSP_32_DATA:
166 ret = aw_dev_dsp_read_32bit(aw_dev, dsp_addr, dsp_data);
168 dev_err(aw_dev->dev, "read dsp_addr[0x%x] 32r-bit dsp_data[0x%x] failed",
169 (u32)dsp_addr, *dsp_data);
172 dev_err(aw_dev->dev, "data type[%d] unsupported", data_type);
177 /* clear dsp chip select state*/
178 if (regmap_read(aw_dev->regmap, AW88395_ID_REG, ®_value))
179 dev_err(aw_dev->dev, "%s fail to clear chip state. Err=%d\n", __func__, ret);
180 mutex_unlock(&aw_dev->dsp_lock);
186 static int aw_dev_read_chipid(struct aw_device *aw_dev, u16 *chip_id)
191 ret = regmap_read(aw_dev->regmap, AW88395_CHIP_ID_REG, ®_val);
193 dev_err(aw_dev->dev, "%s read chipid error. ret = %d", __func__, ret);
197 dev_info(aw_dev->dev, "chip id = %x\n", reg_val);
203 static unsigned int reg_val_to_db(unsigned int value)
205 return (((value >> AW88395_VOL_6DB_START) * AW88395_VOLUME_STEP_DB) +
206 ((value & 0x3f) % AW88395_VOLUME_STEP_DB));
209 static unsigned short db_to_reg_val(unsigned short value)
211 return (((value / AW88395_VOLUME_STEP_DB) << AW88395_VOL_6DB_START) +
212 (value % AW88395_VOLUME_STEP_DB));
215 static int aw_dev_dsp_fw_check(struct aw_device *aw_dev)
217 struct aw_sec_data_desc *dsp_fw_desc;
218 struct aw_prof_desc *set_prof_desc;
219 u16 base_addr = AW88395_DSP_FW_ADDR;
220 u16 addr = base_addr;
225 ret = aw88395_dev_get_prof_data(aw_dev, aw_dev->prof_cur, &set_prof_desc);
230 dsp_fw_desc = &set_prof_desc->sec_desc[AW88395_DATA_TYPE_DSP_FW];
232 for (i = 0; i < AW88395_FW_CHECK_PART; i++) {
233 ret = aw_dev_dsp_read(aw_dev, addr, &dsp_val, AW88395_DSP_16_DATA);
235 dev_err(aw_dev->dev, "dsp read failed");
239 bin_val = be16_to_cpup((void *)&dsp_fw_desc->data[2 * (addr - base_addr)]);
241 if (dsp_val != bin_val) {
242 dev_err(aw_dev->dev, "fw check failed, addr[0x%x], read[0x%x] != bindata[0x%x]",
243 addr, dsp_val, bin_val);
247 addr += (dsp_fw_desc->len / 2) / AW88395_FW_CHECK_PART;
248 if ((addr - base_addr) > dsp_fw_desc->len) {
249 dev_err(aw_dev->dev, "fw check failed, addr[0x%x] too large", addr);
257 static int aw_dev_set_volume(struct aw_device *aw_dev, unsigned int value)
259 struct aw_volume_desc *vol_desc = &aw_dev->volume_desc;
260 unsigned int reg_value;
261 u16 real_value, volume;
264 volume = min((value + vol_desc->init_volume), (unsigned int)AW88395_MUTE_VOL);
265 real_value = db_to_reg_val(volume);
268 ret = regmap_read(aw_dev->regmap, AW88395_SYSCTRL2_REG, ®_value);
272 dev_dbg(aw_dev->dev, "value 0x%x , reg:0x%x", value, real_value);
274 /* [15 : 6] volume */
275 real_value = (real_value << AW88395_VOL_START_BIT) | (reg_value & AW88395_VOL_MASK);
278 ret = regmap_write(aw_dev->regmap, AW88395_SYSCTRL2_REG, real_value);
283 void aw88395_dev_set_volume(struct aw_device *aw_dev, unsigned short set_vol)
287 ret = aw_dev_set_volume(aw_dev, set_vol);
289 dev_dbg(aw_dev->dev, "set volume failed");
291 EXPORT_SYMBOL_GPL(aw88395_dev_set_volume);
293 static void aw_dev_fade_in(struct aw_device *aw_dev)
295 struct aw_volume_desc *desc = &aw_dev->volume_desc;
296 u16 fade_in_vol = desc->ctl_volume;
297 int fade_step = aw_dev->fade_step;
300 if (fade_step == 0 || aw_dev->fade_in_time == 0) {
301 aw_dev_set_volume(aw_dev, fade_in_vol);
305 for (i = AW88395_MUTE_VOL; i >= fade_in_vol; i -= fade_step) {
306 aw_dev_set_volume(aw_dev, i);
307 usleep_range(aw_dev->fade_in_time, aw_dev->fade_in_time + 10);
310 if (i != fade_in_vol)
311 aw_dev_set_volume(aw_dev, fade_in_vol);
314 static void aw_dev_fade_out(struct aw_device *aw_dev)
316 struct aw_volume_desc *desc = &aw_dev->volume_desc;
317 int fade_step = aw_dev->fade_step;
320 if (fade_step == 0 || aw_dev->fade_out_time == 0) {
321 aw_dev_set_volume(aw_dev, AW88395_MUTE_VOL);
325 for (i = desc->ctl_volume; i <= AW88395_MUTE_VOL; i += fade_step) {
326 aw_dev_set_volume(aw_dev, i);
327 usleep_range(aw_dev->fade_out_time, aw_dev->fade_out_time + 10);
330 if (i != AW88395_MUTE_VOL) {
331 aw_dev_set_volume(aw_dev, AW88395_MUTE_VOL);
332 usleep_range(aw_dev->fade_out_time, aw_dev->fade_out_time + 10);
336 static int aw_dev_modify_dsp_cfg(struct aw_device *aw_dev,
337 unsigned int addr, unsigned int dsp_data, unsigned char data_type)
339 struct aw_sec_data_desc *crc_dsp_cfg = &aw_dev->crc_dsp_cfg;
340 unsigned int addr_offset;
344 dev_dbg(aw_dev->dev, "addr:0x%x, dsp_data:0x%x", addr, dsp_data);
346 addr_offset = (addr - AW88395_DSP_CFG_ADDR) * 2;
347 if (addr_offset > crc_dsp_cfg->len) {
348 dev_err(aw_dev->dev, "addr_offset[%d] > crc_dsp_cfg->len[%d]",
349 addr_offset, crc_dsp_cfg->len);
353 case AW88395_DSP_16_DATA:
354 data1 = cpu_to_le16((u16)dsp_data);
355 memcpy(crc_dsp_cfg->data + addr_offset, (u8 *)&data1, 2);
357 case AW88395_DSP_32_DATA:
358 data2 = cpu_to_le32(dsp_data);
359 memcpy(crc_dsp_cfg->data + addr_offset, (u8 *)&data2, 4);
362 dev_err(aw_dev->dev, "data type[%d] unsupported", data_type);
369 static int aw_dev_dsp_set_cali_re(struct aw_device *aw_dev)
374 cali_re = AW88395_SHOW_RE_TO_DSP_RE((aw_dev->cali_desc.cali_re +
375 aw_dev->cali_desc.ra), AW88395_DSP_RE_SHIFT);
377 /* set cali re to device */
378 ret = aw_dev_dsp_write(aw_dev,
379 AW88395_DSP_REG_CFG_ADPZ_RE, cali_re, AW88395_DSP_32_DATA);
381 dev_err(aw_dev->dev, "set cali re error");
385 ret = aw_dev_modify_dsp_cfg(aw_dev, AW88395_DSP_REG_CFG_ADPZ_RE,
386 cali_re, AW88395_DSP_32_DATA);
388 dev_err(aw_dev->dev, "modify dsp cfg failed");
393 static void aw_dev_i2s_tx_enable(struct aw_device *aw_dev, bool flag)
398 ret = regmap_update_bits(aw_dev->regmap, AW88395_I2SCFG1_REG,
399 ~AW88395_I2STXEN_MASK, AW88395_I2STXEN_ENABLE_VALUE);
401 ret = regmap_update_bits(aw_dev->regmap, AW88395_I2SCFG1_REG,
402 ~AW88395_I2STXEN_MASK, AW88395_I2STXEN_DISABLE_VALUE);
406 dev_dbg(aw_dev->dev, "%s failed", __func__);
409 static int aw_dev_dsp_set_crc32(struct aw_device *aw_dev)
411 struct aw_sec_data_desc *crc_dsp_cfg = &aw_dev->crc_dsp_cfg;
412 u32 crc_value, crc_data_len;
414 /* get crc data len */
415 crc_data_len = (AW88395_DSP_REG_CRC_ADDR - AW88395_DSP_CFG_ADDR) * 2;
416 if (crc_data_len > crc_dsp_cfg->len) {
417 dev_err(aw_dev->dev, "crc data len :%d > cfg_data len:%d",
418 crc_data_len, crc_dsp_cfg->len);
422 if (crc_data_len & 0x11) {
423 dev_err(aw_dev->dev, "The crc data len :%d unsupport", crc_data_len);
427 crc_value = __crc32c_le(0xFFFFFFFF, crc_dsp_cfg->data, crc_data_len) ^ 0xFFFFFFFF;
429 return aw_dev_dsp_write(aw_dev, AW88395_DSP_REG_CRC_ADDR, crc_value,
430 AW88395_DSP_32_DATA);
433 static void aw_dev_dsp_check_crc_enable(struct aw_device *aw_dev, bool flag)
438 ret = regmap_update_bits(aw_dev->regmap, AW88395_HAGCCFG7_REG,
439 ~AW88395_AGC_DSP_CTL_MASK, AW88395_AGC_DSP_CTL_ENABLE_VALUE);
441 ret = regmap_update_bits(aw_dev->regmap, AW88395_HAGCCFG7_REG,
442 ~AW88395_AGC_DSP_CTL_MASK, AW88395_AGC_DSP_CTL_DISABLE_VALUE);
445 dev_dbg(aw_dev->dev, "%s failed", __func__);
448 static int aw_dev_dsp_check_st(struct aw_device *aw_dev)
450 unsigned int reg_val;
454 for (i = 0; i < AW88395_DSP_ST_CHECK_MAX; i++) {
455 ret = regmap_read(aw_dev->regmap, AW88395_SYSST_REG, ®_val);
457 dev_err(aw_dev->dev, "read reg0x%x failed", AW88395_SYSST_REG);
461 if ((reg_val & (~AW88395_DSPS_MASK)) != AW88395_DSPS_NORMAL_VALUE) {
462 dev_err(aw_dev->dev, "check dsp st fail,reg_val:0x%04x", reg_val);
466 dev_dbg(aw_dev->dev, "dsp st check ok, reg_val:0x%04x", reg_val);
474 static void aw_dev_dsp_enable(struct aw_device *aw_dev, bool is_enable)
479 ret = regmap_update_bits(aw_dev->regmap, AW88395_SYSCTRL_REG,
480 ~AW88395_DSPBY_MASK, AW88395_DSPBY_WORKING_VALUE);
482 dev_dbg(aw_dev->dev, "enable dsp failed");
484 ret = regmap_update_bits(aw_dev->regmap, AW88395_SYSCTRL_REG,
485 ~AW88395_DSPBY_MASK, AW88395_DSPBY_BYPASS_VALUE);
487 dev_dbg(aw_dev->dev, "disable dsp failed");
491 static int aw_dev_dsp_check_crc32(struct aw_device *aw_dev)
495 if (aw_dev->dsp_cfg == AW88395_DEV_DSP_BYPASS) {
496 dev_info(aw_dev->dev, "dsp bypass");
500 ret = aw_dev_dsp_set_crc32(aw_dev);
502 dev_err(aw_dev->dev, "set dsp crc32 failed");
506 aw_dev_dsp_check_crc_enable(aw_dev, true);
509 aw_dev_dsp_enable(aw_dev, true);
510 usleep_range(AW88395_5000_US, AW88395_5000_US + 100);
512 ret = aw_dev_dsp_check_st(aw_dev);
514 dev_err(aw_dev->dev, "check crc32 fail");
516 aw_dev_dsp_check_crc_enable(aw_dev, false);
517 aw_dev->dsp_crc_st = AW88395_DSP_CRC_OK;
523 static void aw_dev_pwd(struct aw_device *aw_dev, bool pwd)
528 ret = regmap_update_bits(aw_dev->regmap, AW88395_SYSCTRL_REG,
529 ~AW88395_PWDN_MASK, AW88395_PWDN_POWER_DOWN_VALUE);
531 ret = regmap_update_bits(aw_dev->regmap, AW88395_SYSCTRL_REG,
532 ~AW88395_PWDN_MASK, AW88395_PWDN_WORKING_VALUE);
535 dev_dbg(aw_dev->dev, "%s failed", __func__);
538 static void aw_dev_amppd(struct aw_device *aw_dev, bool amppd)
543 ret = regmap_update_bits(aw_dev->regmap, AW88395_SYSCTRL_REG,
544 ~AW88395_AMPPD_MASK, AW88395_AMPPD_POWER_DOWN_VALUE);
546 ret = regmap_update_bits(aw_dev->regmap, AW88395_SYSCTRL_REG,
547 ~AW88395_AMPPD_MASK, AW88395_AMPPD_WORKING_VALUE);
550 dev_dbg(aw_dev->dev, "%s failed", __func__);
553 void aw88395_dev_mute(struct aw_device *aw_dev, bool is_mute)
558 aw_dev_fade_out(aw_dev);
559 ret = regmap_update_bits(aw_dev->regmap, AW88395_SYSCTRL_REG,
560 ~AW88395_HMUTE_MASK, AW88395_HMUTE_ENABLE_VALUE);
562 ret = regmap_update_bits(aw_dev->regmap, AW88395_SYSCTRL_REG,
563 ~AW88395_HMUTE_MASK, AW88395_HMUTE_DISABLE_VALUE);
564 aw_dev_fade_in(aw_dev);
568 dev_dbg(aw_dev->dev, "%s failed", __func__);
570 EXPORT_SYMBOL_GPL(aw88395_dev_mute);
572 static int aw_dev_get_icalk(struct aw_device *aw_dev, int16_t *icalk)
574 unsigned int reg_val;
578 ret = regmap_read(aw_dev->regmap, AW88395_EFRM2_REG, ®_val);
582 reg_icalk = reg_val & (~AW88395_EF_ISN_GESLP_MASK);
584 if (reg_icalk & (~AW88395_EF_ISN_GESLP_SIGN_MASK))
585 reg_icalk = reg_icalk | AW88395_EF_ISN_GESLP_SIGN_NEG;
587 *icalk = (int16_t)reg_icalk;
592 static int aw_dev_get_vcalk(struct aw_device *aw_dev, int16_t *vcalk)
594 unsigned int reg_val;
598 ret = regmap_read(aw_dev->regmap, AW88395_EFRH_REG, ®_val);
602 reg_val = reg_val >> AW88395_EF_VSENSE_GAIN_SHIFT;
604 reg_vcalk = (u16)reg_val & (~AW88395_EF_VSN_GESLP_MASK);
606 if (reg_vcalk & (~AW88395_EF_VSN_GESLP_SIGN_MASK))
607 reg_vcalk = reg_vcalk | AW88395_EF_VSN_GESLP_SIGN_NEG;
609 *vcalk = (int16_t)reg_vcalk;
614 static int aw_dev_get_vcalk_dac(struct aw_device *aw_dev, int16_t *vcalk)
616 unsigned int reg_val;
620 ret = regmap_read(aw_dev->regmap, AW88395_EFRM2_REG, ®_val);
624 reg_vcalk = reg_val >> AW88395_EF_DAC_GESLP_SHIFT;
626 if (reg_vcalk & AW88395_EF_DAC_GESLP_SIGN_MASK)
627 reg_vcalk = reg_vcalk | AW88395_EF_DAC_GESLP_SIGN_NEG;
629 *vcalk = (int16_t)reg_vcalk;
634 static int aw_dev_vsense_select(struct aw_device *aw_dev, int *vsense_select)
636 unsigned int vsense_reg_val;
639 ret = regmap_read(aw_dev->regmap, AW88395_I2SCFG3_REG, &vsense_reg_val);
641 dev_err(aw_dev->dev, "read vsense_reg_val failed");
644 dev_dbg(aw_dev->dev, "vsense_reg = 0x%x", vsense_reg_val);
646 if (vsense_reg_val & (~AW88395_VDSEL_MASK)) {
647 *vsense_select = AW88395_DEV_VDSEL_VSENSE;
648 dev_dbg(aw_dev->dev, "vsense outside");
650 *vsense_select = AW88395_DEV_VDSEL_DAC;
651 dev_dbg(aw_dev->dev, "vsense inside");
657 static int aw_dev_set_vcalb(struct aw_device *aw_dev)
659 int16_t icalk_val, vcalk_val;
660 int icalk, vsense_select;
661 u32 vcalb_adj, reg_val;
665 ret = aw_dev_dsp_read(aw_dev, AW88395_DSP_REG_VCALB, &vcalb_adj, AW88395_DSP_16_DATA);
667 dev_err(aw_dev->dev, "read vcalb_adj failed");
671 ret = aw_dev_vsense_select(aw_dev, &vsense_select);
674 dev_dbg(aw_dev->dev, "vsense_select = %d", vsense_select);
676 ret = aw_dev_get_icalk(aw_dev, &icalk_val);
679 icalk = AW88395_CABL_BASE_VALUE + AW88395_ICABLK_FACTOR * icalk_val;
681 switch (vsense_select) {
682 case AW88395_DEV_VDSEL_VSENSE:
683 ret = aw_dev_get_vcalk(aw_dev, &vcalk_val);
686 vcalk = AW88395_CABL_BASE_VALUE + AW88395_VCABLK_FACTOR * vcalk_val;
687 vcalb = AW88395_VCAL_FACTOR * AW88395_VSCAL_FACTOR /
688 AW88395_ISCAL_FACTOR * icalk / vcalk * vcalb_adj;
690 dev_dbg(aw_dev->dev, "vcalk_factor=%d, vscal_factor=%d, icalk=%d, vcalk=%d",
691 AW88395_VCABLK_FACTOR, AW88395_VSCAL_FACTOR, icalk, vcalk);
693 case AW88395_DEV_VDSEL_DAC:
694 ret = aw_dev_get_vcalk_dac(aw_dev, &vcalk_val);
697 vcalk = AW88395_CABL_BASE_VALUE + AW88395_VCABLK_FACTOR_DAC * vcalk_val;
698 vcalb = AW88395_VCAL_FACTOR * AW88395_VSCAL_FACTOR_DAC /
699 AW88395_ISCAL_FACTOR * icalk / vcalk * vcalb_adj;
701 dev_dbg(aw_dev->dev, "vcalk_dac_factor=%d, vscal_dac_factor=%d, icalk=%d, vcalk=%d",
702 AW88395_VCABLK_FACTOR_DAC,
703 AW88395_VSCAL_FACTOR_DAC, icalk, vcalk);
706 dev_err(aw_dev->dev, "unsupport vsense status");
710 if ((vcalk == 0) || (AW88395_ISCAL_FACTOR == 0)) {
711 dev_err(aw_dev->dev, "vcalk:%d or desc->iscal_factor:%d unsupported",
712 vcalk, AW88395_ISCAL_FACTOR);
716 vcalb = vcalb >> AW88395_VCALB_ADJ_FACTOR;
717 reg_val = (u32)vcalb;
719 dev_dbg(aw_dev->dev, "vcalb=%d, reg_val=0x%x, vcalb_adj =0x%x",
720 vcalb, reg_val, vcalb_adj);
722 ret = aw_dev_dsp_write(aw_dev, AW88395_DSP_REG_VCALB, reg_val, AW88395_DSP_16_DATA);
724 dev_err(aw_dev->dev, "write vcalb failed");
728 ret = aw_dev_modify_dsp_cfg(aw_dev, AW88395_DSP_REG_VCALB,
729 (u32)reg_val, AW88395_DSP_16_DATA);
731 dev_err(aw_dev->dev, "modify dsp cfg failed");
736 static int aw_dev_get_cali_f0_delay(struct aw_device *aw_dev)
738 struct aw_cali_delay_desc *desc = &aw_dev->cali_delay_desc;
742 ret = aw_dev_dsp_read(aw_dev,
743 AW88395_DSP_CALI_F0_DELAY, &cali_delay, AW88395_DSP_16_DATA);
745 dev_err(aw_dev->dev, "read cali delay failed, ret=%d", ret);
747 desc->delay = AW88395_CALI_DELAY_CACL(cali_delay);
749 dev_dbg(aw_dev->dev, "read cali delay: %d ms", desc->delay);
754 static void aw_dev_get_int_status(struct aw_device *aw_dev, unsigned short *int_status)
756 unsigned int reg_val;
759 ret = regmap_read(aw_dev->regmap, AW88395_SYSINT_REG, ®_val);
761 dev_err(aw_dev->dev, "read interrupt reg fail, ret=%d", ret);
763 *int_status = reg_val;
765 dev_dbg(aw_dev->dev, "read interrupt reg = 0x%04x", *int_status);
768 static void aw_dev_clear_int_status(struct aw_device *aw_dev)
772 /* read int status and clear */
773 aw_dev_get_int_status(aw_dev, &int_status);
774 /* make sure int status is clear */
775 aw_dev_get_int_status(aw_dev, &int_status);
777 dev_info(aw_dev->dev, "int status(%d) is not cleaned.\n", int_status);
780 static int aw_dev_get_iis_status(struct aw_device *aw_dev)
782 unsigned int reg_val;
785 ret = regmap_read(aw_dev->regmap, AW88395_SYSST_REG, ®_val);
788 if ((reg_val & AW88395_BIT_PLL_CHECK) != AW88395_BIT_PLL_CHECK) {
789 dev_err(aw_dev->dev, "check pll lock fail,reg_val:0x%04x", reg_val);
796 static int aw_dev_check_mode1_pll(struct aw_device *aw_dev)
800 for (i = 0; i < AW88395_DEV_SYSST_CHECK_MAX; i++) {
801 ret = aw_dev_get_iis_status(aw_dev);
803 dev_err(aw_dev->dev, "mode1 iis signal check error");
804 usleep_range(AW88395_2000_US, AW88395_2000_US + 10);
813 static int aw_dev_check_mode2_pll(struct aw_device *aw_dev)
815 unsigned int reg_val;
818 ret = regmap_read(aw_dev->regmap, AW88395_PLLCTRL1_REG, ®_val);
822 reg_val &= (~AW88395_CCO_MUX_MASK);
823 if (reg_val == AW88395_CCO_MUX_DIVIDED_VALUE) {
824 dev_dbg(aw_dev->dev, "CCO_MUX is already divider");
829 ret = regmap_update_bits(aw_dev->regmap, AW88395_PLLCTRL1_REG,
830 ~AW88395_CCO_MUX_MASK, AW88395_CCO_MUX_DIVIDED_VALUE);
834 for (i = 0; i < AW88395_DEV_SYSST_CHECK_MAX; i++) {
835 ret = aw_dev_get_iis_status(aw_dev);
837 dev_err(aw_dev->dev, "mode2 iis signal check error");
838 usleep_range(AW88395_2000_US, AW88395_2000_US + 10);
845 ret = regmap_update_bits(aw_dev->regmap, AW88395_PLLCTRL1_REG,
846 ~AW88395_CCO_MUX_MASK, AW88395_CCO_MUX_BYPASS_VALUE);
848 usleep_range(AW88395_2000_US, AW88395_2000_US + 10);
849 for (i = 0; i < AW88395_DEV_SYSST_CHECK_MAX; i++) {
850 ret = aw_dev_check_mode1_pll(aw_dev);
852 dev_err(aw_dev->dev, "mode2 switch to mode1, iis signal check error");
853 usleep_range(AW88395_2000_US, AW88395_2000_US + 10);
863 static int aw_dev_check_syspll(struct aw_device *aw_dev)
867 ret = aw_dev_check_mode1_pll(aw_dev);
869 dev_dbg(aw_dev->dev, "mode1 check iis failed try switch to mode2 check");
870 ret = aw_dev_check_mode2_pll(aw_dev);
872 dev_err(aw_dev->dev, "mode2 check iis failed");
880 static int aw_dev_check_sysst(struct aw_device *aw_dev)
882 unsigned int check_val;
883 unsigned int reg_val;
886 for (i = 0; i < AW88395_DEV_SYSST_CHECK_MAX; i++) {
887 ret = regmap_read(aw_dev->regmap, AW88395_SYSST_REG, ®_val);
891 check_val = reg_val & (~AW88395_BIT_SYSST_CHECK_MASK)
892 & AW88395_BIT_SYSST_CHECK;
893 if (check_val != AW88395_BIT_SYSST_CHECK) {
894 dev_err(aw_dev->dev, "check sysst fail, cnt=%d, reg_val=0x%04x, check:0x%x",
895 i, reg_val, AW88395_BIT_SYSST_CHECK);
896 usleep_range(AW88395_2000_US, AW88395_2000_US + 10);
905 static int aw_dev_check_sysint(struct aw_device *aw_dev)
909 aw_dev_get_int_status(aw_dev, ®_val);
911 if (reg_val & AW88395_BIT_SYSINT_CHECK) {
912 dev_err(aw_dev->dev, "pa stop check fail:0x%04x", reg_val);
919 static void aw_dev_get_cur_mode_st(struct aw_device *aw_dev)
921 struct aw_profctrl_desc *profctrl_desc = &aw_dev->profctrl_desc;
922 unsigned int reg_val;
925 ret = regmap_read(aw_dev->regmap, AW88395_SYSCTRL_REG, ®_val);
927 dev_dbg(aw_dev->dev, "%s failed", __func__);
930 if ((reg_val & (~AW88395_RCV_MODE_MASK)) == AW88395_RCV_MODE_RECEIVER_VALUE)
931 profctrl_desc->cur_mode = AW88395_RCV_MODE;
933 profctrl_desc->cur_mode = AW88395_NOT_RCV_MODE;
936 static void aw_dev_get_dsp_config(struct aw_device *aw_dev, unsigned char *dsp_cfg)
938 unsigned int reg_val = 0;
941 ret = regmap_read(aw_dev->regmap, AW88395_SYSCTRL_REG, ®_val);
943 dev_dbg(aw_dev->dev, "%s failed", __func__);
946 if (reg_val & (~AW88395_DSPBY_MASK))
947 *dsp_cfg = AW88395_DEV_DSP_BYPASS;
949 *dsp_cfg = AW88395_DEV_DSP_WORK;
952 static void aw_dev_select_memclk(struct aw_device *aw_dev, unsigned char flag)
957 case AW88395_DEV_MEMCLK_PLL:
958 ret = regmap_update_bits(aw_dev->regmap, AW88395_DBGCTRL_REG,
959 ~AW88395_MEM_CLKSEL_MASK,
960 AW88395_MEM_CLKSEL_DAP_HCLK_VALUE);
962 dev_err(aw_dev->dev, "memclk select pll failed");
964 case AW88395_DEV_MEMCLK_OSC:
965 ret = regmap_update_bits(aw_dev->regmap, AW88395_DBGCTRL_REG,
966 ~AW88395_MEM_CLKSEL_MASK,
967 AW88395_MEM_CLKSEL_OSC_CLK_VALUE);
969 dev_err(aw_dev->dev, "memclk select OSC failed");
972 dev_err(aw_dev->dev, "unknown memclk config, flag=0x%x", flag);
977 static int aw_dev_get_dsp_status(struct aw_device *aw_dev)
979 unsigned int reg_val;
982 ret = regmap_read(aw_dev->regmap, AW88395_WDT_REG, ®_val);
985 if (!(reg_val & (~AW88395_WDT_CNT_MASK)))
991 static int aw_dev_get_vmax(struct aw_device *aw_dev, unsigned int *vmax)
993 return aw_dev_dsp_read(aw_dev, AW88395_DSP_REG_VMAX, vmax, AW88395_DSP_16_DATA);
996 static int aw_dev_update_reg_container(struct aw_device *aw_dev,
997 unsigned char *data, unsigned int len)
999 struct aw_volume_desc *vol_desc = &aw_dev->volume_desc;
1000 unsigned int read_val;
1008 reg_data = (int16_t *)data;
1009 data_len = len >> 1;
1011 if (data_len & 0x1) {
1012 dev_err(aw_dev->dev, "data len:%d unsupported", data_len);
1016 for (i = 0; i < data_len; i += 2) {
1017 reg_addr = reg_data[i];
1018 reg_val = reg_data[i + 1];
1020 if (reg_addr == AW88395_SYSCTRL_REG) {
1021 ret = regmap_read(aw_dev->regmap, reg_addr, &read_val);
1024 read_val &= (~AW88395_HMUTE_MASK);
1025 reg_val &= AW88395_HMUTE_MASK;
1026 reg_val |= read_val;
1028 if (reg_addr == AW88395_HAGCCFG7_REG)
1029 reg_val &= AW88395_AGC_DSP_CTL_MASK;
1031 if (reg_addr == AW88395_I2SCFG1_REG) {
1033 reg_val &= AW88395_I2STXEN_MASK;
1034 reg_val |= AW88395_I2STXEN_DISABLE_VALUE;
1037 if (reg_addr == AW88395_SYSCTRL2_REG) {
1038 read_vol = (reg_val & (~AW88395_VOL_MASK)) >>
1039 AW88395_VOL_START_BIT;
1040 aw_dev->volume_desc.init_volume =
1041 reg_val_to_db(read_vol);
1043 ret = regmap_write(aw_dev->regmap, reg_addr, reg_val);
1049 aw_dev_get_cur_mode_st(aw_dev);
1051 if (aw_dev->prof_cur != aw_dev->prof_index) {
1052 /* clear control volume when PA change profile */
1053 vol_desc->ctl_volume = 0;
1055 /* keep control volume when PA start with sync mode */
1056 aw_dev_set_volume(aw_dev, vol_desc->ctl_volume);
1059 aw_dev_get_dsp_config(aw_dev, &aw_dev->dsp_cfg);
1064 static int aw_dev_reg_update(struct aw_device *aw_dev,
1065 unsigned char *data, unsigned int len)
1069 if (!len || !data) {
1070 dev_err(aw_dev->dev, "reg data is null or len is 0");
1074 ret = aw_dev_update_reg_container(aw_dev, data, len);
1076 dev_err(aw_dev->dev, "reg update failed");
1083 static int aw_dev_get_ra(struct aw_cali_desc *cali_desc)
1085 struct aw_device *aw_dev =
1086 container_of(cali_desc, struct aw_device, cali_desc);
1090 ret = aw_dev_dsp_read(aw_dev, AW88395_DSP_REG_CFG_ADPZ_RA,
1091 &dsp_ra, AW88395_DSP_32_DATA);
1093 dev_err(aw_dev->dev, "read ra error");
1097 cali_desc->ra = AW88395_DSP_RE_TO_SHOW_RE(dsp_ra,
1098 AW88395_DSP_RE_SHIFT);
1103 static int aw_dev_dsp_update_container(struct aw_device *aw_dev,
1104 unsigned char *data, unsigned int len, unsigned short base)
1108 #ifdef AW88395_DSP_I2C_WRITES
1111 mutex_lock(&aw_dev->dsp_lock);
1112 ret = regmap_write(aw_dev->regmap, AW88395_DSPMADD_REG, base);
1114 goto error_operation;
1116 for (i = 0; i < len; i += AW88395_MAX_RAM_WRITE_BYTE_SIZE) {
1117 if ((len - i) < AW88395_MAX_RAM_WRITE_BYTE_SIZE)
1120 tmp_len = AW88395_MAX_RAM_WRITE_BYTE_SIZE;
1122 ret = regmap_raw_write(aw_dev->regmap, AW88395_DSPMDAT_REG,
1125 goto error_operation;
1127 mutex_unlock(&aw_dev->dsp_lock);
1131 mutex_lock(&aw_dev->dsp_lock);
1133 ret = regmap_write(aw_dev->regmap, AW88395_DSPMADD_REG, base);
1135 goto error_operation;
1136 for (i = 0; i < len; i += 2) {
1137 reg_val = cpu_to_be16p((u16 *)(data + i));
1138 ret = regmap_write(aw_dev->regmap, AW88395_DSPMDAT_REG,
1141 goto error_operation;
1143 mutex_unlock(&aw_dev->dsp_lock);
1149 mutex_unlock(&aw_dev->dsp_lock);
1153 static int aw_dev_dsp_update_fw(struct aw_device *aw_dev,
1154 unsigned char *data, unsigned int len)
1157 dev_dbg(aw_dev->dev, "dsp firmware len:%d", len);
1159 if (!len || !data) {
1160 dev_err(aw_dev->dev, "dsp firmware data is null or len is 0");
1163 aw_dev_dsp_update_container(aw_dev, data, len, AW88395_DSP_FW_ADDR);
1164 aw_dev->dsp_fw_len = len;
1169 static int aw_dev_copy_to_crc_dsp_cfg(struct aw_device *aw_dev,
1170 unsigned char *data, unsigned int size)
1172 struct aw_sec_data_desc *crc_dsp_cfg = &aw_dev->crc_dsp_cfg;
1174 if (!crc_dsp_cfg->data) {
1175 crc_dsp_cfg->data = devm_kzalloc(aw_dev->dev, size, GFP_KERNEL);
1176 if (!crc_dsp_cfg->data)
1178 crc_dsp_cfg->len = size;
1179 } else if (crc_dsp_cfg->len < size) {
1180 devm_kfree(aw_dev->dev, crc_dsp_cfg->data);
1181 crc_dsp_cfg->data = devm_kzalloc(aw_dev->dev, size, GFP_KERNEL);
1182 if (!crc_dsp_cfg->data)
1184 crc_dsp_cfg->len = size;
1186 memcpy(crc_dsp_cfg->data, data, size);
1187 swab16_array((u16 *)crc_dsp_cfg->data, size >> 1);
1192 static int aw_dev_dsp_update_cfg(struct aw_device *aw_dev,
1193 unsigned char *data, unsigned int len)
1197 dev_dbg(aw_dev->dev, "dsp config len:%d", len);
1199 if (!len || !data) {
1200 dev_err(aw_dev->dev, "dsp config data is null or len is 0");
1204 aw_dev_dsp_update_container(aw_dev, data, len, AW88395_DSP_CFG_ADDR);
1205 aw_dev->dsp_cfg_len = len;
1207 ret = aw_dev_copy_to_crc_dsp_cfg(aw_dev, data, len);
1211 ret = aw_dev_set_vcalb(aw_dev);
1214 ret = aw_dev_get_ra(&aw_dev->cali_desc);
1217 ret = aw_dev_get_cali_f0_delay(aw_dev);
1221 ret = aw_dev_get_vmax(aw_dev, &aw_dev->vmax_desc.init_vmax);
1223 dev_err(aw_dev->dev, "get vmax failed");
1226 dev_dbg(aw_dev->dev, "get init vmax:0x%x", aw_dev->vmax_desc.init_vmax);
1227 aw_dev->dsp_crc_st = AW88395_DSP_CRC_NA;
1232 static int aw_dev_check_sram(struct aw_device *aw_dev)
1234 unsigned int reg_val;
1236 mutex_lock(&aw_dev->dsp_lock);
1237 /* check the odd bits of reg 0x40 */
1238 regmap_write(aw_dev->regmap, AW88395_DSPMADD_REG, AW88395_DSP_ODD_NUM_BIT_TEST);
1239 regmap_read(aw_dev->regmap, AW88395_DSPMADD_REG, ®_val);
1240 if (reg_val != AW88395_DSP_ODD_NUM_BIT_TEST) {
1241 dev_err(aw_dev->dev, "check reg 0x40 odd bit failed, read[0x%x] != write[0x%x]",
1242 reg_val, AW88395_DSP_ODD_NUM_BIT_TEST);
1246 /* check the even bits of reg 0x40 */
1247 regmap_write(aw_dev->regmap, AW88395_DSPMADD_REG, AW88395_DSP_EVEN_NUM_BIT_TEST);
1248 regmap_read(aw_dev->regmap, AW88395_DSPMADD_REG, ®_val);
1249 if (reg_val != AW88395_DSP_EVEN_NUM_BIT_TEST) {
1250 dev_err(aw_dev->dev, "check reg 0x40 even bit failed, read[0x%x] != write[0x%x]",
1251 reg_val, AW88395_DSP_EVEN_NUM_BIT_TEST);
1255 /* check dsp_fw_base_addr */
1256 aw_dev_dsp_write_16bit(aw_dev, AW88395_DSP_FW_ADDR, AW88395_DSP_EVEN_NUM_BIT_TEST);
1257 aw_dev_dsp_read_16bit(aw_dev, AW88395_DSP_FW_ADDR, ®_val);
1258 if (reg_val != AW88395_DSP_EVEN_NUM_BIT_TEST) {
1259 dev_err(aw_dev->dev, "check dsp fw addr failed, read[0x%x] != write[0x%x]",
1260 reg_val, AW88395_DSP_EVEN_NUM_BIT_TEST);
1264 /* check dsp_cfg_base_addr */
1265 aw_dev_dsp_write_16bit(aw_dev, AW88395_DSP_CFG_ADDR, AW88395_DSP_ODD_NUM_BIT_TEST);
1266 aw_dev_dsp_read_16bit(aw_dev, AW88395_DSP_CFG_ADDR, ®_val);
1267 if (reg_val != AW88395_DSP_ODD_NUM_BIT_TEST) {
1268 dev_err(aw_dev->dev, "check dsp cfg failed, read[0x%x] != write[0x%x]",
1269 reg_val, AW88395_DSP_ODD_NUM_BIT_TEST);
1272 mutex_unlock(&aw_dev->dsp_lock);
1277 mutex_unlock(&aw_dev->dsp_lock);
1281 int aw88395_dev_fw_update(struct aw_device *aw_dev, bool up_dsp_fw_en, bool force_up_en)
1283 struct aw_prof_desc *prof_index_desc;
1284 struct aw_sec_data_desc *sec_desc;
1288 if ((aw_dev->prof_cur == aw_dev->prof_index) &&
1289 (force_up_en == AW88395_FORCE_UPDATE_OFF)) {
1290 dev_dbg(aw_dev->dev, "scene no change, not update");
1294 if (aw_dev->fw_status == AW88395_DEV_FW_FAILED) {
1295 dev_err(aw_dev->dev, "fw status[%d] error", aw_dev->fw_status);
1299 ret = aw88395_dev_get_prof_name(aw_dev, aw_dev->prof_index, &prof_name);
1303 dev_dbg(aw_dev->dev, "start update %s", prof_name);
1305 ret = aw88395_dev_get_prof_data(aw_dev, aw_dev->prof_index, &prof_index_desc);
1310 sec_desc = prof_index_desc->sec_desc;
1311 ret = aw_dev_reg_update(aw_dev, sec_desc[AW88395_DATA_TYPE_REG].data,
1312 sec_desc[AW88395_DATA_TYPE_REG].len);
1314 dev_err(aw_dev->dev, "update reg failed");
1318 aw88395_dev_mute(aw_dev, true);
1320 if (aw_dev->dsp_cfg == AW88395_DEV_DSP_WORK)
1321 aw_dev_dsp_enable(aw_dev, false);
1323 aw_dev_select_memclk(aw_dev, AW88395_DEV_MEMCLK_OSC);
1326 ret = aw_dev_check_sram(aw_dev);
1328 dev_err(aw_dev->dev, "check sram failed");
1332 /* update dsp firmware */
1333 dev_dbg(aw_dev->dev, "fw_ver: [%x]", prof_index_desc->fw_ver);
1334 ret = aw_dev_dsp_update_fw(aw_dev, sec_desc[AW88395_DATA_TYPE_DSP_FW].data,
1335 sec_desc[AW88395_DATA_TYPE_DSP_FW].len);
1337 dev_err(aw_dev->dev, "update dsp fw failed");
1342 /* update dsp config */
1343 ret = aw_dev_dsp_update_cfg(aw_dev, sec_desc[AW88395_DATA_TYPE_DSP_CFG].data,
1344 sec_desc[AW88395_DATA_TYPE_DSP_CFG].len);
1346 dev_err(aw_dev->dev, "update dsp cfg failed");
1350 aw_dev_select_memclk(aw_dev, AW88395_DEV_MEMCLK_PLL);
1352 aw_dev->prof_cur = aw_dev->prof_index;
1357 aw_dev_select_memclk(aw_dev, AW88395_DEV_MEMCLK_PLL);
1360 EXPORT_SYMBOL_GPL(aw88395_dev_fw_update);
1362 static int aw_dev_dsp_check(struct aw_device *aw_dev)
1366 switch (aw_dev->dsp_cfg) {
1367 case AW88395_DEV_DSP_BYPASS:
1368 dev_dbg(aw_dev->dev, "dsp bypass");
1371 case AW88395_DEV_DSP_WORK:
1372 aw_dev_dsp_enable(aw_dev, false);
1373 aw_dev_dsp_enable(aw_dev, true);
1374 usleep_range(AW88395_1000_US, AW88395_1000_US + 10);
1375 for (i = 0; i < AW88395_DEV_DSP_CHECK_MAX; i++) {
1376 ret = aw_dev_get_dsp_status(aw_dev);
1378 dev_err(aw_dev->dev, "dsp wdt status error=%d", ret);
1379 usleep_range(AW88395_2000_US, AW88395_2000_US + 10);
1384 dev_err(aw_dev->dev, "unknown dsp cfg=%d", aw_dev->dsp_cfg);
1392 static void aw_dev_update_cali_re(struct aw_cali_desc *cali_desc)
1394 struct aw_device *aw_dev =
1395 container_of(cali_desc, struct aw_device, cali_desc);
1398 if ((aw_dev->cali_desc.cali_re < AW88395_CALI_RE_MAX) &&
1399 (aw_dev->cali_desc.cali_re > AW88395_CALI_RE_MIN)) {
1401 ret = aw_dev_dsp_set_cali_re(aw_dev);
1403 dev_err(aw_dev->dev, "set cali re failed");
1407 int aw88395_dev_start(struct aw_device *aw_dev)
1411 if (aw_dev->status == AW88395_DEV_PW_ON) {
1412 dev_info(aw_dev->dev, "already power on");
1416 aw_dev_pwd(aw_dev, false);
1417 usleep_range(AW88395_2000_US, AW88395_2000_US + 10);
1419 ret = aw_dev_check_syspll(aw_dev);
1421 dev_err(aw_dev->dev, "pll check failed cannot start");
1422 goto pll_check_fail;
1426 aw_dev_amppd(aw_dev, false);
1427 usleep_range(AW88395_1000_US, AW88395_1000_US + 50);
1429 /* check i2s status */
1430 ret = aw_dev_check_sysst(aw_dev);
1432 dev_err(aw_dev->dev, "sysst check failed");
1433 goto sysst_check_fail;
1436 if (aw_dev->dsp_cfg == AW88395_DEV_DSP_WORK) {
1438 aw_dev_dsp_enable(aw_dev, false);
1439 ret = aw_dev_dsp_fw_check(aw_dev);
1441 goto dev_dsp_fw_check_fail;
1443 aw_dev_update_cali_re(&aw_dev->cali_desc);
1445 if (aw_dev->dsp_crc_st != AW88395_DSP_CRC_OK) {
1446 ret = aw_dev_dsp_check_crc32(aw_dev);
1448 dev_err(aw_dev->dev, "dsp crc check failed");
1449 goto crc_check_fail;
1453 ret = aw_dev_dsp_check(aw_dev);
1455 dev_err(aw_dev->dev, "dsp status check failed");
1456 goto dsp_check_fail;
1459 dev_dbg(aw_dev->dev, "start pa with dsp bypass");
1462 /* enable tx feedback */
1463 aw_dev_i2s_tx_enable(aw_dev, true);
1466 aw88395_dev_mute(aw_dev, false);
1467 /* clear inturrupt */
1468 aw_dev_clear_int_status(aw_dev);
1469 aw_dev->status = AW88395_DEV_PW_ON;
1475 aw_dev_dsp_enable(aw_dev, false);
1476 dev_dsp_fw_check_fail:
1478 aw_dev_clear_int_status(aw_dev);
1479 aw_dev_amppd(aw_dev, true);
1481 aw_dev_pwd(aw_dev, true);
1482 aw_dev->status = AW88395_DEV_PW_OFF;
1486 EXPORT_SYMBOL_GPL(aw88395_dev_start);
1488 int aw88395_dev_stop(struct aw_device *aw_dev)
1490 struct aw_sec_data_desc *dsp_cfg =
1491 &aw_dev->prof_info.prof_desc[aw_dev->prof_cur].sec_desc[AW88395_DATA_TYPE_DSP_CFG];
1492 struct aw_sec_data_desc *dsp_fw =
1493 &aw_dev->prof_info.prof_desc[aw_dev->prof_cur].sec_desc[AW88395_DATA_TYPE_DSP_FW];
1497 if (aw_dev->status == AW88395_DEV_PW_OFF) {
1498 dev_info(aw_dev->dev, "already power off");
1502 aw_dev->status = AW88395_DEV_PW_OFF;
1505 aw88395_dev_mute(aw_dev, true);
1506 usleep_range(AW88395_4000_US, AW88395_4000_US + 100);
1508 /* close tx feedback */
1509 aw_dev_i2s_tx_enable(aw_dev, false);
1510 usleep_range(AW88395_1000_US, AW88395_1000_US + 100);
1512 /* check sysint state */
1513 int_st = aw_dev_check_sysint(aw_dev);
1516 aw_dev_dsp_enable(aw_dev, false);
1519 aw_dev_amppd(aw_dev, true);
1522 /* system status anomaly */
1523 aw_dev_select_memclk(aw_dev, AW88395_DEV_MEMCLK_OSC);
1524 ret = aw_dev_dsp_update_fw(aw_dev, dsp_fw->data, dsp_fw->len);
1526 dev_err(aw_dev->dev, "update dsp fw failed");
1527 ret = aw_dev_dsp_update_cfg(aw_dev, dsp_cfg->data, dsp_cfg->len);
1529 dev_err(aw_dev->dev, "update dsp cfg failed");
1530 aw_dev_select_memclk(aw_dev, AW88395_DEV_MEMCLK_PLL);
1533 /* set power down */
1534 aw_dev_pwd(aw_dev, true);
1538 EXPORT_SYMBOL_GPL(aw88395_dev_stop);
1540 int aw88395_dev_init(struct aw_device *aw_dev, struct aw_container *aw_cfg)
1544 if ((!aw_dev) || (!aw_cfg)) {
1545 pr_err("aw_dev is NULL or aw_cfg is NULL");
1548 ret = aw88395_dev_cfg_load(aw_dev, aw_cfg);
1550 dev_err(aw_dev->dev, "aw_dev acf parse failed");
1553 aw_dev->fade_in_time = AW88395_1000_US / 10;
1554 aw_dev->fade_out_time = AW88395_1000_US >> 1;
1555 aw_dev->prof_cur = aw_dev->prof_info.prof_desc[0].id;
1556 aw_dev->prof_index = aw_dev->prof_info.prof_desc[0].id;
1558 ret = aw88395_dev_fw_update(aw_dev, AW88395_FORCE_UPDATE_ON, AW88395_DSP_FW_UPDATE_ON);
1560 dev_err(aw_dev->dev, "fw update failed ret = %d\n", ret);
1565 aw88395_dev_mute(aw_dev, true);
1566 usleep_range(AW88395_4000_US, AW88395_4000_US + 100);
1568 /* close tx feedback */
1569 aw_dev_i2s_tx_enable(aw_dev, false);
1570 usleep_range(AW88395_1000_US, AW88395_1000_US + 100);
1573 aw_dev_dsp_enable(aw_dev, false);
1575 aw_dev_amppd(aw_dev, true);
1576 /* set power down */
1577 aw_dev_pwd(aw_dev, true);
1581 EXPORT_SYMBOL_GPL(aw88395_dev_init);
1583 static void aw88395_parse_channel_dt(struct aw_device *aw_dev)
1585 struct device_node *np = aw_dev->dev->of_node;
1589 ret = of_property_read_u32(np, "awinic,audio-channel", &channel_value);
1591 dev_dbg(aw_dev->dev,
1592 "read audio-channel failed,use default 0");
1593 aw_dev->channel = AW88395_DEV_DEFAULT_CH;
1597 dev_dbg(aw_dev->dev, "read audio-channel value is: %d",
1599 aw_dev->channel = channel_value;
1602 static int aw_dev_init(struct aw_device *aw_dev)
1604 aw_dev->chip_id = AW88395_CHIP_ID;
1605 /* call aw device init func */
1607 aw_dev->prof_info.prof_desc = NULL;
1608 aw_dev->prof_info.count = 0;
1609 aw_dev->prof_info.prof_type = AW88395_DEV_NONE_TYPE_ID;
1610 aw_dev->channel = 0;
1611 aw_dev->fw_status = AW88395_DEV_FW_FAILED;
1613 aw_dev->fade_step = AW88395_VOLUME_STEP_DB;
1614 aw_dev->volume_desc.ctl_volume = AW88395_VOL_DEFAULT_VALUE;
1615 aw88395_parse_channel_dt(aw_dev);
1620 int aw88395_dev_get_profile_count(struct aw_device *aw_dev)
1622 return aw_dev->prof_info.count;
1624 EXPORT_SYMBOL_GPL(aw88395_dev_get_profile_count);
1626 int aw88395_dev_get_profile_index(struct aw_device *aw_dev)
1628 return aw_dev->prof_index;
1630 EXPORT_SYMBOL_GPL(aw88395_dev_get_profile_index);
1632 int aw88395_dev_set_profile_index(struct aw_device *aw_dev, int index)
1634 /* check the index whether is valid */
1635 if ((index >= aw_dev->prof_info.count) || (index < 0))
1637 /* check the index whether change */
1638 if (aw_dev->prof_index == index)
1641 aw_dev->prof_index = index;
1642 dev_dbg(aw_dev->dev, "set prof[%s]",
1643 aw_dev->prof_info.prof_name_list[aw_dev->prof_info.prof_desc[index].id]);
1647 EXPORT_SYMBOL_GPL(aw88395_dev_set_profile_index);
1649 int aw88395_dev_get_prof_name(struct aw_device *aw_dev, int index, char **prof_name)
1651 struct aw_prof_info *prof_info = &aw_dev->prof_info;
1652 struct aw_prof_desc *prof_desc;
1654 if ((index >= aw_dev->prof_info.count) || (index < 0)) {
1655 dev_err(aw_dev->dev, "index[%d] overflow count[%d]",
1656 index, aw_dev->prof_info.count);
1660 prof_desc = &aw_dev->prof_info.prof_desc[index];
1662 *prof_name = prof_info->prof_name_list[prof_desc->id];
1666 EXPORT_SYMBOL_GPL(aw88395_dev_get_prof_name);
1668 int aw88395_dev_get_prof_data(struct aw_device *aw_dev, int index,
1669 struct aw_prof_desc **prof_desc)
1671 if ((index >= aw_dev->prof_info.count) || (index < 0)) {
1672 dev_err(aw_dev->dev, "%s: index[%d] overflow count[%d]\n",
1673 __func__, index, aw_dev->prof_info.count);
1677 *prof_desc = &aw_dev->prof_info.prof_desc[index];
1681 EXPORT_SYMBOL_GPL(aw88395_dev_get_prof_data);
1683 int aw88395_init(struct aw_device **aw_dev, struct i2c_client *i2c, struct regmap *regmap)
1689 dev_info(&i2c->dev, "it should be initialized here.\n");
1691 *aw_dev = devm_kzalloc(&i2c->dev, sizeof(struct aw_device), GFP_KERNEL);
1696 (*aw_dev)->i2c = i2c;
1697 (*aw_dev)->dev = &i2c->dev;
1698 (*aw_dev)->regmap = regmap;
1699 mutex_init(&(*aw_dev)->dsp_lock);
1702 ret = aw_dev_read_chipid((*aw_dev), &chip_id);
1704 dev_err(&i2c->dev, "dev_read_chipid failed ret=%d", ret);
1709 case AW88395_CHIP_ID:
1710 ret = aw_dev_init((*aw_dev));
1714 dev_err((*aw_dev)->dev, "unsupported device");
1720 EXPORT_SYMBOL_GPL(aw88395_init);
1722 MODULE_DESCRIPTION("AW88395 device lib");
1723 MODULE_LICENSE("GPL v2");