1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Common code for ADAU1X61 and ADAU1X81 codecs
5 * Copyright 2011-2014 Analog Devices Inc.
6 * Author: Lars-Peter Clausen <lars@metafoo.de>
9 #include <linux/module.h>
10 #include <linux/init.h>
11 #include <linux/clk.h>
12 #include <linux/delay.h>
13 #include <linux/slab.h>
14 #include <sound/core.h>
15 #include <sound/pcm.h>
16 #include <sound/pcm_params.h>
17 #include <sound/soc.h>
18 #include <sound/tlv.h>
19 #include <linux/i2c.h>
20 #include <linux/spi/spi.h>
21 #include <linux/regmap.h>
22 #include <asm/unaligned.h>
26 #include "adau-utils.h"
28 #define ADAU17X1_SAFELOAD_TARGET_ADDRESS 0x0006
29 #define ADAU17X1_SAFELOAD_TRIGGER 0x0007
30 #define ADAU17X1_SAFELOAD_DATA 0x0001
31 #define ADAU17X1_SAFELOAD_DATA_SIZE 20
32 #define ADAU17X1_WORD_SIZE 4
34 static const char * const adau17x1_capture_mixer_boost_text[] = {
35 "Normal operation", "Boost Level 1", "Boost Level 2", "Boost Level 3",
38 static SOC_ENUM_SINGLE_DECL(adau17x1_capture_boost_enum,
39 ADAU17X1_REC_POWER_MGMT, 5, adau17x1_capture_mixer_boost_text);
41 static const char * const adau17x1_mic_bias_mode_text[] = {
42 "Normal operation", "High performance",
45 static SOC_ENUM_SINGLE_DECL(adau17x1_mic_bias_mode_enum,
46 ADAU17X1_MICBIAS, 3, adau17x1_mic_bias_mode_text);
48 static const DECLARE_TLV_DB_MINMAX(adau17x1_digital_tlv, -9563, 0);
50 static const struct snd_kcontrol_new adau17x1_controls[] = {
51 SOC_DOUBLE_R_TLV("Digital Capture Volume",
52 ADAU17X1_LEFT_INPUT_DIGITAL_VOL,
53 ADAU17X1_RIGHT_INPUT_DIGITAL_VOL,
54 0, 0xff, 1, adau17x1_digital_tlv),
55 SOC_DOUBLE_R_TLV("Digital Playback Volume", ADAU17X1_DAC_CONTROL1,
56 ADAU17X1_DAC_CONTROL2, 0, 0xff, 1, adau17x1_digital_tlv),
58 SOC_SINGLE("ADC High Pass Filter Switch", ADAU17X1_ADC_CONTROL,
60 SOC_SINGLE("Playback De-emphasis Switch", ADAU17X1_DAC_CONTROL0,
63 SOC_ENUM("Capture Boost", adau17x1_capture_boost_enum),
65 SOC_ENUM("Mic Bias Mode", adau17x1_mic_bias_mode_enum),
68 static int adau17x1_setup_firmware(struct snd_soc_component *component,
71 static int adau17x1_pll_event(struct snd_soc_dapm_widget *w,
72 struct snd_kcontrol *kcontrol, int event)
74 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
75 struct adau *adau = snd_soc_component_get_drvdata(component);
77 if (SND_SOC_DAPM_EVENT_ON(event)) {
78 adau->pll_regs[5] = 1;
80 adau->pll_regs[5] = 0;
81 /* Bypass the PLL when disabled, otherwise registers will become
83 regmap_update_bits(adau->regmap, ADAU17X1_CLOCK_CONTROL,
84 ADAU17X1_CLOCK_CONTROL_CORECLK_SRC_PLL, 0);
87 /* The PLL register is 6 bytes long and can only be written at once. */
88 regmap_raw_write(adau->regmap, ADAU17X1_PLL_CONTROL,
89 adau->pll_regs, ARRAY_SIZE(adau->pll_regs));
91 if (SND_SOC_DAPM_EVENT_ON(event)) {
93 regmap_update_bits(adau->regmap, ADAU17X1_CLOCK_CONTROL,
94 ADAU17X1_CLOCK_CONTROL_CORECLK_SRC_PLL,
95 ADAU17X1_CLOCK_CONTROL_CORECLK_SRC_PLL);
101 static int adau17x1_adc_fixup(struct snd_soc_dapm_widget *w,
102 struct snd_kcontrol *kcontrol, int event)
104 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
105 struct adau *adau = snd_soc_component_get_drvdata(component);
108 * If we are capturing, toggle the ADOSR bit in Converter Control 0 to
109 * avoid losing SNR (workaround from ADI). This must be done after
110 * the ADC(s) have been enabled. According to the data sheet, it is
111 * normally illegal to set this bit when the sampling rate is 96 kHz,
112 * but according to ADI it is acceptable for this workaround.
114 regmap_update_bits(adau->regmap, ADAU17X1_CONVERTER0,
115 ADAU17X1_CONVERTER0_ADOSR, ADAU17X1_CONVERTER0_ADOSR);
116 regmap_update_bits(adau->regmap, ADAU17X1_CONVERTER0,
117 ADAU17X1_CONVERTER0_ADOSR, 0);
122 static const char * const adau17x1_mono_stereo_text[] = {
124 "Mono Left Channel (L+R)",
125 "Mono Right Channel (L+R)",
129 static SOC_ENUM_SINGLE_DECL(adau17x1_dac_mode_enum,
130 ADAU17X1_DAC_CONTROL0, 6, adau17x1_mono_stereo_text);
132 static const struct snd_kcontrol_new adau17x1_dac_mode_mux =
133 SOC_DAPM_ENUM("DAC Mono-Stereo-Mode", adau17x1_dac_mode_enum);
135 static const struct snd_soc_dapm_widget adau17x1_dapm_widgets[] = {
136 SND_SOC_DAPM_SUPPLY_S("PLL", 3, SND_SOC_NOPM, 0, 0, adau17x1_pll_event,
137 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
139 SND_SOC_DAPM_SUPPLY("AIFCLK", SND_SOC_NOPM, 0, 0, NULL, 0),
141 SND_SOC_DAPM_SUPPLY("MICBIAS", ADAU17X1_MICBIAS, 0, 0, NULL, 0),
143 SND_SOC_DAPM_SUPPLY("Left Playback Enable", ADAU17X1_PLAY_POWER_MGMT,
145 SND_SOC_DAPM_SUPPLY("Right Playback Enable", ADAU17X1_PLAY_POWER_MGMT,
148 SND_SOC_DAPM_MUX("Left DAC Mode Mux", SND_SOC_NOPM, 0, 0,
149 &adau17x1_dac_mode_mux),
150 SND_SOC_DAPM_MUX("Right DAC Mode Mux", SND_SOC_NOPM, 0, 0,
151 &adau17x1_dac_mode_mux),
153 SND_SOC_DAPM_ADC_E("Left Decimator", NULL, ADAU17X1_ADC_CONTROL, 0, 0,
154 adau17x1_adc_fixup, SND_SOC_DAPM_POST_PMU),
155 SND_SOC_DAPM_ADC("Right Decimator", NULL, ADAU17X1_ADC_CONTROL, 1, 0),
156 SND_SOC_DAPM_DAC("Left DAC", NULL, ADAU17X1_DAC_CONTROL0, 0, 0),
157 SND_SOC_DAPM_DAC("Right DAC", NULL, ADAU17X1_DAC_CONTROL0, 1, 0),
160 static const struct snd_soc_dapm_route adau17x1_dapm_routes[] = {
161 { "Left Decimator", NULL, "SYSCLK" },
162 { "Right Decimator", NULL, "SYSCLK" },
163 { "Left DAC", NULL, "SYSCLK" },
164 { "Right DAC", NULL, "SYSCLK" },
165 { "Capture", NULL, "SYSCLK" },
166 { "Playback", NULL, "SYSCLK" },
168 { "Left DAC", NULL, "Left DAC Mode Mux" },
169 { "Right DAC", NULL, "Right DAC Mode Mux" },
171 { "Capture", NULL, "AIFCLK" },
172 { "Playback", NULL, "AIFCLK" },
175 static const struct snd_soc_dapm_route adau17x1_dapm_pll_route = {
176 "SYSCLK", NULL, "PLL",
180 * The MUX register for the Capture and Playback MUXs selects either DSP as
181 * source/destination or one of the TDM slots. The TDM slot is selected via
182 * snd_soc_dai_set_tdm_slot(), so we only expose whether to go to the DSP or
183 * directly to the DAI interface with this control.
185 static int adau17x1_dsp_mux_enum_put(struct snd_kcontrol *kcontrol,
186 struct snd_ctl_elem_value *ucontrol)
188 struct snd_soc_component *component = snd_soc_dapm_kcontrol_component(kcontrol);
189 struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
190 struct adau *adau = snd_soc_component_get_drvdata(component);
191 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
192 struct snd_soc_dapm_update update = {};
193 unsigned int stream = e->shift_l;
194 unsigned int val, change;
197 if (ucontrol->value.enumerated.item[0] >= e->items)
200 switch (ucontrol->value.enumerated.item[0]) {
203 adau->dsp_bypass[stream] = false;
206 val = (adau->tdm_slot[stream] * 2) + 1;
207 adau->dsp_bypass[stream] = true;
211 if (stream == SNDRV_PCM_STREAM_PLAYBACK)
212 reg = ADAU17X1_SERIAL_INPUT_ROUTE;
214 reg = ADAU17X1_SERIAL_OUTPUT_ROUTE;
216 change = snd_soc_component_test_bits(component, reg, 0xff, val);
218 update.kcontrol = kcontrol;
223 snd_soc_dapm_mux_update_power(dapm, kcontrol,
224 ucontrol->value.enumerated.item[0], e, &update);
230 static int adau17x1_dsp_mux_enum_get(struct snd_kcontrol *kcontrol,
231 struct snd_ctl_elem_value *ucontrol)
233 struct snd_soc_component *component = snd_soc_dapm_kcontrol_component(kcontrol);
234 struct adau *adau = snd_soc_component_get_drvdata(component);
235 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
236 unsigned int stream = e->shift_l;
237 unsigned int reg, val;
240 if (stream == SNDRV_PCM_STREAM_PLAYBACK)
241 reg = ADAU17X1_SERIAL_INPUT_ROUTE;
243 reg = ADAU17X1_SERIAL_OUTPUT_ROUTE;
245 ret = regmap_read(adau->regmap, reg, &val);
251 ucontrol->value.enumerated.item[0] = val;
256 #define DECLARE_ADAU17X1_DSP_MUX_CTRL(_name, _label, _stream, _text) \
257 const struct snd_kcontrol_new _name = \
258 SOC_DAPM_ENUM_EXT(_label, (const struct soc_enum)\
259 SOC_ENUM_SINGLE(SND_SOC_NOPM, _stream, \
260 ARRAY_SIZE(_text), _text), \
261 adau17x1_dsp_mux_enum_get, adau17x1_dsp_mux_enum_put)
263 static const char * const adau17x1_dac_mux_text[] = {
268 static const char * const adau17x1_capture_mux_text[] = {
273 static DECLARE_ADAU17X1_DSP_MUX_CTRL(adau17x1_dac_mux, "DAC Playback Mux",
274 SNDRV_PCM_STREAM_PLAYBACK, adau17x1_dac_mux_text);
276 static DECLARE_ADAU17X1_DSP_MUX_CTRL(adau17x1_capture_mux, "Capture Mux",
277 SNDRV_PCM_STREAM_CAPTURE, adau17x1_capture_mux_text);
279 static const struct snd_soc_dapm_widget adau17x1_dsp_dapm_widgets[] = {
280 SND_SOC_DAPM_PGA("DSP", ADAU17X1_DSP_RUN, 0, 0, NULL, 0),
281 SND_SOC_DAPM_SIGGEN("DSP Siggen"),
283 SND_SOC_DAPM_MUX("DAC Playback Mux", SND_SOC_NOPM, 0, 0,
285 SND_SOC_DAPM_MUX("Capture Mux", SND_SOC_NOPM, 0, 0,
286 &adau17x1_capture_mux),
289 static const struct snd_soc_dapm_route adau17x1_dsp_dapm_routes[] = {
290 { "DAC Playback Mux", "DSP", "DSP" },
291 { "DAC Playback Mux", "AIFIN", "Playback" },
293 { "Left DAC Mode Mux", "Stereo", "DAC Playback Mux" },
294 { "Left DAC Mode Mux", "Mono (L+R)", "DAC Playback Mux" },
295 { "Left DAC Mode Mux", "Mono Left Channel (L+R)", "DAC Playback Mux" },
296 { "Right DAC Mode Mux", "Stereo", "DAC Playback Mux" },
297 { "Right DAC Mode Mux", "Mono (L+R)", "DAC Playback Mux" },
298 { "Right DAC Mode Mux", "Mono Right Channel (L+R)", "DAC Playback Mux" },
300 { "Capture Mux", "DSP", "DSP" },
301 { "Capture Mux", "Decimator", "Left Decimator" },
302 { "Capture Mux", "Decimator", "Right Decimator" },
304 { "Capture", NULL, "Capture Mux" },
306 { "DSP", NULL, "DSP Siggen" },
308 { "DSP", NULL, "Left Decimator" },
309 { "DSP", NULL, "Right Decimator" },
310 { "DSP", NULL, "Playback" },
313 static const struct snd_soc_dapm_route adau17x1_no_dsp_dapm_routes[] = {
314 { "Left DAC Mode Mux", "Stereo", "Playback" },
315 { "Left DAC Mode Mux", "Mono (L+R)", "Playback" },
316 { "Left DAC Mode Mux", "Mono Left Channel (L+R)", "Playback" },
317 { "Right DAC Mode Mux", "Stereo", "Playback" },
318 { "Right DAC Mode Mux", "Mono (L+R)", "Playback" },
319 { "Right DAC Mode Mux", "Mono Right Channel (L+R)", "Playback" },
320 { "Capture", NULL, "Left Decimator" },
321 { "Capture", NULL, "Right Decimator" },
324 static bool adau17x1_has_dsp(struct adau *adau)
326 switch (adau->type) {
336 /* Chip has a DSP but we're pretending it doesn't. */
337 static bool adau17x1_has_disused_dsp(struct adau *adau)
339 switch (adau->type) {
340 case ADAU1761_AS_1361:
347 static bool adau17x1_has_safeload(struct adau *adau)
349 switch (adau->type) {
358 static int adau17x1_set_dai_pll(struct snd_soc_dai *dai, int pll_id,
359 int source, unsigned int freq_in, unsigned int freq_out)
361 struct snd_soc_component *component = dai->component;
362 struct adau *adau = snd_soc_component_get_drvdata(component);
365 if (freq_in < 8000000 || freq_in > 27000000)
368 ret = adau_calc_pll_cfg(freq_in, freq_out, adau->pll_regs);
372 /* The PLL register is 6 bytes long and can only be written at once. */
373 ret = regmap_raw_write(adau->regmap, ADAU17X1_PLL_CONTROL,
374 adau->pll_regs, ARRAY_SIZE(adau->pll_regs));
378 adau->pll_freq = freq_out;
383 static int adau17x1_set_dai_sysclk(struct snd_soc_dai *dai,
384 int clk_id, unsigned int freq, int dir)
386 struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(dai->component);
387 struct adau *adau = snd_soc_component_get_drvdata(dai->component);
392 case ADAU17X1_CLK_SRC_MCLK:
395 case ADAU17X1_CLK_SRC_PLL_AUTO:
399 case ADAU17X1_CLK_SRC_PLL:
406 switch (adau->clk_src) {
407 case ADAU17X1_CLK_SRC_MCLK:
410 case ADAU17X1_CLK_SRC_PLL:
411 case ADAU17X1_CLK_SRC_PLL_AUTO:
420 if (is_pll != was_pll) {
422 snd_soc_dapm_add_routes(dapm,
423 &adau17x1_dapm_pll_route, 1);
425 snd_soc_dapm_del_routes(dapm,
426 &adau17x1_dapm_pll_route, 1);
430 adau->clk_src = clk_id;
435 static int adau17x1_auto_pll(struct snd_soc_dai *dai,
436 struct snd_pcm_hw_params *params)
438 struct adau *adau = snd_soc_dai_get_drvdata(dai);
439 unsigned int pll_rate;
441 switch (params_rate(params)) {
449 pll_rate = 48000 * 1024;
458 pll_rate = 44100 * 1024;
464 return adau17x1_set_dai_pll(dai, ADAU17X1_PLL, ADAU17X1_PLL_SRC_MCLK,
465 clk_get_rate(adau->mclk), pll_rate);
468 static int adau17x1_hw_params(struct snd_pcm_substream *substream,
469 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
471 struct snd_soc_component *component = dai->component;
472 struct adau *adau = snd_soc_component_get_drvdata(component);
473 unsigned int val, div, dsp_div;
477 switch (adau->clk_src) {
478 case ADAU17X1_CLK_SRC_PLL_AUTO:
479 ret = adau17x1_auto_pll(dai, params);
483 case ADAU17X1_CLK_SRC_PLL:
484 freq = adau->pll_freq;
491 if (freq % params_rate(params) != 0)
494 switch (freq / params_rate(params)) {
499 case 6144: /* fs / 6 */
503 case 4096: /* fs / 4 */
507 case 3072: /* fs / 3 */
511 case 2048: /* fs / 2 */
515 case 1536: /* fs / 1.5 */
519 case 512: /* fs / 0.5 */
527 regmap_update_bits(adau->regmap, ADAU17X1_CONVERTER0,
528 ADAU17X1_CONVERTER0_CONVSR_MASK, div);
530 if (adau17x1_has_dsp(adau) || adau17x1_has_disused_dsp(adau))
531 regmap_write(adau->regmap, ADAU17X1_SERIAL_SAMPLING_RATE, div);
532 if (adau17x1_has_dsp(adau))
533 regmap_write(adau->regmap, ADAU17X1_DSP_SAMPLING_RATE, dsp_div);
535 if (adau->sigmadsp) {
536 ret = adau17x1_setup_firmware(component, params_rate(params));
541 if (adau->dai_fmt != SND_SOC_DAIFMT_RIGHT_J)
544 switch (params_width(params)) {
546 val = ADAU17X1_SERIAL_PORT1_DELAY16;
549 val = ADAU17X1_SERIAL_PORT1_DELAY8;
552 val = ADAU17X1_SERIAL_PORT1_DELAY0;
558 return regmap_update_bits(adau->regmap, ADAU17X1_SERIAL_PORT1,
559 ADAU17X1_SERIAL_PORT1_DELAY_MASK, val);
562 static int adau17x1_set_dai_fmt(struct snd_soc_dai *dai,
565 struct adau *adau = snd_soc_component_get_drvdata(dai->component);
566 unsigned int ctrl0, ctrl1;
567 unsigned int ctrl0_mask;
570 switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) {
571 case SND_SOC_DAIFMT_CBP_CFP:
572 ctrl0 = ADAU17X1_SERIAL_PORT0_MASTER;
575 case SND_SOC_DAIFMT_CBC_CFC:
577 adau->master = false;
583 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
584 case SND_SOC_DAIFMT_I2S:
586 ctrl1 = ADAU17X1_SERIAL_PORT1_DELAY1;
588 case SND_SOC_DAIFMT_LEFT_J:
589 case SND_SOC_DAIFMT_RIGHT_J:
591 ctrl1 = ADAU17X1_SERIAL_PORT1_DELAY0;
593 case SND_SOC_DAIFMT_DSP_A:
595 ctrl0 |= ADAU17X1_SERIAL_PORT0_PULSE_MODE;
596 ctrl1 = ADAU17X1_SERIAL_PORT1_DELAY1;
598 case SND_SOC_DAIFMT_DSP_B:
600 ctrl0 |= ADAU17X1_SERIAL_PORT0_PULSE_MODE;
601 ctrl1 = ADAU17X1_SERIAL_PORT1_DELAY0;
607 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
608 case SND_SOC_DAIFMT_NB_NF:
610 case SND_SOC_DAIFMT_IB_NF:
611 ctrl0 |= ADAU17X1_SERIAL_PORT0_BCLK_POL;
613 case SND_SOC_DAIFMT_NB_IF:
614 lrclk_pol = !lrclk_pol;
616 case SND_SOC_DAIFMT_IB_IF:
617 ctrl0 |= ADAU17X1_SERIAL_PORT0_BCLK_POL;
618 lrclk_pol = !lrclk_pol;
625 ctrl0 |= ADAU17X1_SERIAL_PORT0_LRCLK_POL;
627 /* Set the mask to update all relevant bits in ADAU17X1_SERIAL_PORT0 */
628 ctrl0_mask = ADAU17X1_SERIAL_PORT0_MASTER |
629 ADAU17X1_SERIAL_PORT0_LRCLK_POL |
630 ADAU17X1_SERIAL_PORT0_BCLK_POL |
631 ADAU17X1_SERIAL_PORT0_PULSE_MODE;
633 regmap_update_bits(adau->regmap, ADAU17X1_SERIAL_PORT0, ctrl0_mask,
635 regmap_update_bits(adau->regmap, ADAU17X1_SERIAL_PORT1,
636 ADAU17X1_SERIAL_PORT1_DELAY_MASK, ctrl1);
638 adau->dai_fmt = fmt & SND_SOC_DAIFMT_FORMAT_MASK;
643 static int adau17x1_set_dai_tdm_slot(struct snd_soc_dai *dai,
644 unsigned int tx_mask, unsigned int rx_mask, int slots, int slot_width)
646 struct adau *adau = snd_soc_component_get_drvdata(dai->component);
647 unsigned int ser_ctrl0, ser_ctrl1;
648 unsigned int conv_ctrl0, conv_ctrl1;
660 ser_ctrl0 = ADAU17X1_SERIAL_PORT0_STEREO;
663 ser_ctrl0 = ADAU17X1_SERIAL_PORT0_TDM4;
666 if (adau->type == ADAU1361)
669 ser_ctrl0 = ADAU17X1_SERIAL_PORT0_TDM8;
675 switch (slot_width * slots) {
677 if (adau->type == ADAU1761 || adau->type == ADAU1761_AS_1361)
680 ser_ctrl1 = ADAU17X1_SERIAL_PORT1_BCLK32;
683 ser_ctrl1 = ADAU17X1_SERIAL_PORT1_BCLK64;
686 ser_ctrl1 = ADAU17X1_SERIAL_PORT1_BCLK48;
689 ser_ctrl1 = ADAU17X1_SERIAL_PORT1_BCLK128;
692 if (adau->type == ADAU1361)
695 ser_ctrl1 = ADAU17X1_SERIAL_PORT1_BCLK256;
703 conv_ctrl1 = ADAU17X1_CONVERTER1_ADC_PAIR(1);
704 adau->tdm_slot[SNDRV_PCM_STREAM_CAPTURE] = 0;
707 conv_ctrl1 = ADAU17X1_CONVERTER1_ADC_PAIR(2);
708 adau->tdm_slot[SNDRV_PCM_STREAM_CAPTURE] = 1;
711 conv_ctrl1 = ADAU17X1_CONVERTER1_ADC_PAIR(3);
712 adau->tdm_slot[SNDRV_PCM_STREAM_CAPTURE] = 2;
715 conv_ctrl1 = ADAU17X1_CONVERTER1_ADC_PAIR(4);
716 adau->tdm_slot[SNDRV_PCM_STREAM_CAPTURE] = 3;
724 conv_ctrl0 = ADAU17X1_CONVERTER0_DAC_PAIR(1);
725 adau->tdm_slot[SNDRV_PCM_STREAM_PLAYBACK] = 0;
728 conv_ctrl0 = ADAU17X1_CONVERTER0_DAC_PAIR(2);
729 adau->tdm_slot[SNDRV_PCM_STREAM_PLAYBACK] = 1;
732 conv_ctrl0 = ADAU17X1_CONVERTER0_DAC_PAIR(3);
733 adau->tdm_slot[SNDRV_PCM_STREAM_PLAYBACK] = 2;
736 conv_ctrl0 = ADAU17X1_CONVERTER0_DAC_PAIR(4);
737 adau->tdm_slot[SNDRV_PCM_STREAM_PLAYBACK] = 3;
743 regmap_update_bits(adau->regmap, ADAU17X1_CONVERTER0,
744 ADAU17X1_CONVERTER0_DAC_PAIR_MASK, conv_ctrl0);
745 regmap_update_bits(adau->regmap, ADAU17X1_CONVERTER1,
746 ADAU17X1_CONVERTER1_ADC_PAIR_MASK, conv_ctrl1);
747 regmap_update_bits(adau->regmap, ADAU17X1_SERIAL_PORT0,
748 ADAU17X1_SERIAL_PORT0_TDM_MASK, ser_ctrl0);
749 regmap_update_bits(adau->regmap, ADAU17X1_SERIAL_PORT1,
750 ADAU17X1_SERIAL_PORT1_BCLK_MASK, ser_ctrl1);
752 if (!adau17x1_has_dsp(adau) && !adau17x1_has_disused_dsp(adau))
755 if (adau->dsp_bypass[SNDRV_PCM_STREAM_PLAYBACK]) {
756 regmap_write(adau->regmap, ADAU17X1_SERIAL_INPUT_ROUTE,
757 (adau->tdm_slot[SNDRV_PCM_STREAM_PLAYBACK] * 2) + 1);
760 if (adau->dsp_bypass[SNDRV_PCM_STREAM_CAPTURE]) {
761 regmap_write(adau->regmap, ADAU17X1_SERIAL_OUTPUT_ROUTE,
762 (adau->tdm_slot[SNDRV_PCM_STREAM_CAPTURE] * 2) + 1);
768 static int adau17x1_startup(struct snd_pcm_substream *substream,
769 struct snd_soc_dai *dai)
771 struct adau *adau = snd_soc_component_get_drvdata(dai->component);
774 return sigmadsp_restrict_params(adau->sigmadsp, substream);
779 const struct snd_soc_dai_ops adau17x1_dai_ops = {
780 .hw_params = adau17x1_hw_params,
781 .set_sysclk = adau17x1_set_dai_sysclk,
782 .set_fmt = adau17x1_set_dai_fmt,
783 .set_pll = adau17x1_set_dai_pll,
784 .set_tdm_slot = adau17x1_set_dai_tdm_slot,
785 .startup = adau17x1_startup,
787 EXPORT_SYMBOL_GPL(adau17x1_dai_ops);
789 int adau17x1_set_micbias_voltage(struct snd_soc_component *component,
790 enum adau17x1_micbias_voltage micbias)
792 struct adau *adau = snd_soc_component_get_drvdata(component);
795 case ADAU17X1_MICBIAS_0_90_AVDD:
796 case ADAU17X1_MICBIAS_0_65_AVDD:
802 return regmap_write(adau->regmap, ADAU17X1_MICBIAS, micbias << 2);
804 EXPORT_SYMBOL_GPL(adau17x1_set_micbias_voltage);
806 bool adau17x1_precious_register(struct device *dev, unsigned int reg)
808 /* SigmaDSP parameter memory */
814 EXPORT_SYMBOL_GPL(adau17x1_precious_register);
816 bool adau17x1_readable_register(struct device *dev, unsigned int reg)
818 /* SigmaDSP parameter memory */
823 case ADAU17X1_CLOCK_CONTROL:
824 case ADAU17X1_PLL_CONTROL:
825 case ADAU17X1_REC_POWER_MGMT:
826 case ADAU17X1_MICBIAS:
827 case ADAU17X1_SERIAL_PORT0:
828 case ADAU17X1_SERIAL_PORT1:
829 case ADAU17X1_CONVERTER0:
830 case ADAU17X1_CONVERTER1:
831 case ADAU17X1_LEFT_INPUT_DIGITAL_VOL:
832 case ADAU17X1_RIGHT_INPUT_DIGITAL_VOL:
833 case ADAU17X1_ADC_CONTROL:
834 case ADAU17X1_PLAY_POWER_MGMT:
835 case ADAU17X1_DAC_CONTROL0:
836 case ADAU17X1_DAC_CONTROL1:
837 case ADAU17X1_DAC_CONTROL2:
838 case ADAU17X1_SERIAL_PORT_PAD:
839 case ADAU17X1_CONTROL_PORT_PAD0:
840 case ADAU17X1_CONTROL_PORT_PAD1:
841 case ADAU17X1_DSP_SAMPLING_RATE:
842 case ADAU17X1_SERIAL_INPUT_ROUTE:
843 case ADAU17X1_SERIAL_OUTPUT_ROUTE:
844 case ADAU17X1_DSP_ENABLE:
845 case ADAU17X1_DSP_RUN:
846 case ADAU17X1_SERIAL_SAMPLING_RATE:
853 EXPORT_SYMBOL_GPL(adau17x1_readable_register);
855 bool adau17x1_volatile_register(struct device *dev, unsigned int reg)
857 /* SigmaDSP parameter and program memory */
862 /* The PLL register is 6 bytes long */
863 case ADAU17X1_PLL_CONTROL:
864 case ADAU17X1_PLL_CONTROL + 1:
865 case ADAU17X1_PLL_CONTROL + 2:
866 case ADAU17X1_PLL_CONTROL + 3:
867 case ADAU17X1_PLL_CONTROL + 4:
868 case ADAU17X1_PLL_CONTROL + 5:
876 EXPORT_SYMBOL_GPL(adau17x1_volatile_register);
878 static int adau17x1_setup_firmware(struct snd_soc_component *component,
883 struct adau *adau = snd_soc_component_get_drvdata(component);
884 struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
886 /* Check if sample rate is the same as before. If it is there is no
887 * point in performing the below steps as the call to
888 * sigmadsp_setup(...) will return directly when it finds the sample
889 * rate to be the same as before. By checking this we can prevent an
890 * audiable popping noise which occours when toggling DSP_RUN.
892 if (adau->sigmadsp->current_samplerate == rate)
895 snd_soc_dapm_mutex_lock(dapm);
897 ret = regmap_read(adau->regmap, ADAU17X1_DSP_SAMPLING_RATE, &dspsr);
901 ret = regmap_read(adau->regmap, ADAU17X1_DSP_RUN, &dsp_run);
905 regmap_write(adau->regmap, ADAU17X1_DSP_ENABLE, 1);
906 regmap_write(adau->regmap, ADAU17X1_DSP_SAMPLING_RATE, 0xf);
907 regmap_write(adau->regmap, ADAU17X1_DSP_RUN, 0);
909 ret = sigmadsp_setup(adau->sigmadsp, rate);
911 regmap_write(adau->regmap, ADAU17X1_DSP_ENABLE, 0);
914 regmap_write(adau->regmap, ADAU17X1_DSP_SAMPLING_RATE, dspsr);
915 regmap_write(adau->regmap, ADAU17X1_DSP_RUN, dsp_run);
918 snd_soc_dapm_mutex_unlock(dapm);
923 int adau17x1_add_widgets(struct snd_soc_component *component)
925 struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
926 struct adau *adau = snd_soc_component_get_drvdata(component);
929 ret = snd_soc_add_component_controls(component, adau17x1_controls,
930 ARRAY_SIZE(adau17x1_controls));
933 ret = snd_soc_dapm_new_controls(dapm, adau17x1_dapm_widgets,
934 ARRAY_SIZE(adau17x1_dapm_widgets));
938 if (adau17x1_has_dsp(adau)) {
939 ret = snd_soc_dapm_new_controls(dapm, adau17x1_dsp_dapm_widgets,
940 ARRAY_SIZE(adau17x1_dsp_dapm_widgets));
947 ret = sigmadsp_attach(adau->sigmadsp, component);
949 dev_err(component->dev, "Failed to attach firmware: %d\n",
957 EXPORT_SYMBOL_GPL(adau17x1_add_widgets);
959 int adau17x1_add_routes(struct snd_soc_component *component)
961 struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
962 struct adau *adau = snd_soc_component_get_drvdata(component);
965 ret = snd_soc_dapm_add_routes(dapm, adau17x1_dapm_routes,
966 ARRAY_SIZE(adau17x1_dapm_routes));
970 if (adau17x1_has_dsp(adau)) {
971 ret = snd_soc_dapm_add_routes(dapm, adau17x1_dsp_dapm_routes,
972 ARRAY_SIZE(adau17x1_dsp_dapm_routes));
974 ret = snd_soc_dapm_add_routes(dapm, adau17x1_no_dsp_dapm_routes,
975 ARRAY_SIZE(adau17x1_no_dsp_dapm_routes));
978 if (adau->clk_src != ADAU17X1_CLK_SRC_MCLK)
979 snd_soc_dapm_add_routes(dapm, &adau17x1_dapm_pll_route, 1);
983 EXPORT_SYMBOL_GPL(adau17x1_add_routes);
985 int adau17x1_resume(struct snd_soc_component *component)
987 struct adau *adau = snd_soc_component_get_drvdata(component);
989 if (adau->switch_mode)
990 adau->switch_mode(component->dev);
992 regcache_sync(adau->regmap);
996 EXPORT_SYMBOL_GPL(adau17x1_resume);
998 static int adau17x1_safeload(struct sigmadsp *sigmadsp, unsigned int addr,
999 const uint8_t bytes[], size_t len)
1001 uint8_t buf[ADAU17X1_WORD_SIZE];
1002 uint8_t data[ADAU17X1_SAFELOAD_DATA_SIZE];
1003 unsigned int addr_offset;
1004 unsigned int nbr_words;
1007 /* write data to safeload addresses. Check if len is not a multiple of
1008 * 4 bytes, if so we need to zero pad.
1010 nbr_words = len / ADAU17X1_WORD_SIZE;
1011 if ((len - nbr_words * ADAU17X1_WORD_SIZE) == 0) {
1012 ret = regmap_raw_write(sigmadsp->control_data,
1013 ADAU17X1_SAFELOAD_DATA, bytes, len);
1016 memset(data, 0, ADAU17X1_SAFELOAD_DATA_SIZE);
1017 memcpy(data, bytes, len);
1018 ret = regmap_raw_write(sigmadsp->control_data,
1019 ADAU17X1_SAFELOAD_DATA, data,
1020 nbr_words * ADAU17X1_WORD_SIZE);
1026 /* Write target address, target address is offset by 1 */
1027 addr_offset = addr - 1;
1028 put_unaligned_be32(addr_offset, buf);
1029 ret = regmap_raw_write(sigmadsp->control_data,
1030 ADAU17X1_SAFELOAD_TARGET_ADDRESS, buf, ADAU17X1_WORD_SIZE);
1034 /* write nbr of words to trigger address */
1035 put_unaligned_be32(nbr_words, buf);
1036 ret = regmap_raw_write(sigmadsp->control_data,
1037 ADAU17X1_SAFELOAD_TRIGGER, buf, ADAU17X1_WORD_SIZE);
1044 static const struct sigmadsp_ops adau17x1_sigmadsp_ops = {
1045 .safeload = adau17x1_safeload,
1048 int adau17x1_probe(struct device *dev, struct regmap *regmap,
1049 enum adau17x1_type type, void (*switch_mode)(struct device *dev),
1050 const char *firmware_name)
1056 return PTR_ERR(regmap);
1058 adau = devm_kzalloc(dev, sizeof(*adau), GFP_KERNEL);
1062 /* Clock is optional (for the driver) */
1063 adau->mclk = devm_clk_get_optional(dev, "mclk");
1064 if (IS_ERR(adau->mclk))
1065 return PTR_ERR(adau->mclk);
1068 adau->clk_src = ADAU17X1_CLK_SRC_PLL_AUTO;
1071 * Any valid PLL output rate will work at this point, use one
1072 * that is likely to be chosen later as well. The register will
1073 * be written when the PLL is powered up for the first time.
1075 ret = adau_calc_pll_cfg(clk_get_rate(adau->mclk), 48000 * 1024,
1080 ret = clk_prepare_enable(adau->mclk);
1085 adau->regmap = regmap;
1086 adau->switch_mode = switch_mode;
1089 dev_set_drvdata(dev, adau);
1091 if (firmware_name) {
1092 if (adau17x1_has_safeload(adau)) {
1093 adau->sigmadsp = devm_sigmadsp_init_regmap(dev, regmap,
1094 &adau17x1_sigmadsp_ops, firmware_name);
1096 adau->sigmadsp = devm_sigmadsp_init_regmap(dev, regmap,
1097 NULL, firmware_name);
1099 if (IS_ERR(adau->sigmadsp)) {
1100 dev_warn(dev, "Could not find firmware file: %ld\n",
1101 PTR_ERR(adau->sigmadsp));
1102 adau->sigmadsp = NULL;
1111 EXPORT_SYMBOL_GPL(adau17x1_probe);
1113 void adau17x1_remove(struct device *dev)
1115 struct adau *adau = dev_get_drvdata(dev);
1117 clk_disable_unprepare(adau->mclk);
1119 EXPORT_SYMBOL_GPL(adau17x1_remove);
1121 MODULE_DESCRIPTION("ASoC ADAU1X61/ADAU1X81 common code");
1122 MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
1123 MODULE_LICENSE("GPL");