1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Driver for ADAU1701 SigmaDSP processor
5 * Copyright 2011 Analog Devices Inc.
6 * Author: Lars-Peter Clausen <lars@metafoo.de>
7 * based on an inital version by Cliff Cai <cliff.cai@analog.com>
10 #include <linux/module.h>
11 #include <linux/init.h>
12 #include <linux/i2c.h>
13 #include <linux/delay.h>
14 #include <linux/slab.h>
16 #include <linux/gpio/consumer.h>
17 #include <linux/regulator/consumer.h>
18 #include <linux/regmap.h>
19 #include <sound/core.h>
20 #include <sound/pcm.h>
21 #include <sound/pcm_params.h>
22 #include <sound/soc.h>
24 #include <asm/unaligned.h>
29 #define ADAU1701_SAFELOAD_DATA(i) (0x0810 + (i))
30 #define ADAU1701_SAFELOAD_ADDR(i) (0x0815 + (i))
32 #define ADAU1701_DSPCTRL 0x081c
33 #define ADAU1701_SEROCTL 0x081e
34 #define ADAU1701_SERICTL 0x081f
36 #define ADAU1701_AUXNPOW 0x0822
37 #define ADAU1701_PINCONF_0 0x0820
38 #define ADAU1701_PINCONF_1 0x0821
39 #define ADAU1701_AUXNPOW 0x0822
41 #define ADAU1701_OSCIPOW 0x0826
42 #define ADAU1701_DACSET 0x0827
44 #define ADAU1701_MAX_REGISTER 0x0828
46 #define ADAU1701_DSPCTRL_CR (1 << 2)
47 #define ADAU1701_DSPCTRL_DAM (1 << 3)
48 #define ADAU1701_DSPCTRL_ADM (1 << 4)
49 #define ADAU1701_DSPCTRL_IST (1 << 5)
50 #define ADAU1701_DSPCTRL_SR_48 0x00
51 #define ADAU1701_DSPCTRL_SR_96 0x01
52 #define ADAU1701_DSPCTRL_SR_192 0x02
53 #define ADAU1701_DSPCTRL_SR_MASK 0x03
55 #define ADAU1701_SEROCTL_INV_LRCLK 0x2000
56 #define ADAU1701_SEROCTL_INV_BCLK 0x1000
57 #define ADAU1701_SEROCTL_MASTER 0x0800
59 #define ADAU1701_SEROCTL_OBF16 0x0000
60 #define ADAU1701_SEROCTL_OBF8 0x0200
61 #define ADAU1701_SEROCTL_OBF4 0x0400
62 #define ADAU1701_SEROCTL_OBF2 0x0600
63 #define ADAU1701_SEROCTL_OBF_MASK 0x0600
65 #define ADAU1701_SEROCTL_OLF1024 0x0000
66 #define ADAU1701_SEROCTL_OLF512 0x0080
67 #define ADAU1701_SEROCTL_OLF256 0x0100
68 #define ADAU1701_SEROCTL_OLF_MASK 0x0180
70 #define ADAU1701_SEROCTL_MSB_DEALY1 0x0000
71 #define ADAU1701_SEROCTL_MSB_DEALY0 0x0004
72 #define ADAU1701_SEROCTL_MSB_DEALY8 0x0008
73 #define ADAU1701_SEROCTL_MSB_DEALY12 0x000c
74 #define ADAU1701_SEROCTL_MSB_DEALY16 0x0010
75 #define ADAU1701_SEROCTL_MSB_DEALY_MASK 0x001c
77 #define ADAU1701_SEROCTL_WORD_LEN_24 0x0000
78 #define ADAU1701_SEROCTL_WORD_LEN_20 0x0001
79 #define ADAU1701_SEROCTL_WORD_LEN_16 0x0002
80 #define ADAU1701_SEROCTL_WORD_LEN_MASK 0x0003
82 #define ADAU1701_AUXNPOW_VBPD 0x40
83 #define ADAU1701_AUXNPOW_VRPD 0x20
85 #define ADAU1701_SERICTL_I2S 0
86 #define ADAU1701_SERICTL_LEFTJ 1
87 #define ADAU1701_SERICTL_TDM 2
88 #define ADAU1701_SERICTL_RIGHTJ_24 3
89 #define ADAU1701_SERICTL_RIGHTJ_20 4
90 #define ADAU1701_SERICTL_RIGHTJ_18 5
91 #define ADAU1701_SERICTL_RIGHTJ_16 6
92 #define ADAU1701_SERICTL_MODE_MASK 7
93 #define ADAU1701_SERICTL_INV_BCLK BIT(3)
94 #define ADAU1701_SERICTL_INV_LRCLK BIT(4)
96 #define ADAU1701_OSCIPOW_OPD 0x04
97 #define ADAU1701_DACSET_DACINIT 1
99 #define ADAU1707_CLKDIV_UNSET (-1U)
101 #define ADAU1701_FIRMWARE "/*(DEBLOBBED)*/"
103 static const char * const supply_names[] = {
108 struct gpio_desc *gpio_nreset;
109 struct gpio_descs *gpio_pll_mode;
110 unsigned int dai_fmt;
111 unsigned int pll_clkdiv;
113 struct regmap *regmap;
114 struct i2c_client *client;
117 struct sigmadsp *sigmadsp;
118 struct regulator_bulk_data supplies[ARRAY_SIZE(supply_names)];
121 static const struct snd_kcontrol_new adau1701_controls[] = {
122 SOC_SINGLE("Master Capture Switch", ADAU1701_DSPCTRL, 4, 1, 0),
125 static const struct snd_soc_dapm_widget adau1701_dapm_widgets[] = {
126 SND_SOC_DAPM_DAC("DAC0", "Playback", ADAU1701_AUXNPOW, 3, 1),
127 SND_SOC_DAPM_DAC("DAC1", "Playback", ADAU1701_AUXNPOW, 2, 1),
128 SND_SOC_DAPM_DAC("DAC2", "Playback", ADAU1701_AUXNPOW, 1, 1),
129 SND_SOC_DAPM_DAC("DAC3", "Playback", ADAU1701_AUXNPOW, 0, 1),
130 SND_SOC_DAPM_ADC("ADC", "Capture", ADAU1701_AUXNPOW, 7, 1),
132 SND_SOC_DAPM_OUTPUT("OUT0"),
133 SND_SOC_DAPM_OUTPUT("OUT1"),
134 SND_SOC_DAPM_OUTPUT("OUT2"),
135 SND_SOC_DAPM_OUTPUT("OUT3"),
136 SND_SOC_DAPM_INPUT("IN0"),
137 SND_SOC_DAPM_INPUT("IN1"),
140 static const struct snd_soc_dapm_route adau1701_dapm_routes[] = {
141 { "OUT0", NULL, "DAC0" },
142 { "OUT1", NULL, "DAC1" },
143 { "OUT2", NULL, "DAC2" },
144 { "OUT3", NULL, "DAC3" },
146 { "ADC", NULL, "IN0" },
147 { "ADC", NULL, "IN1" },
150 static unsigned int adau1701_register_size(struct device *dev,
154 case ADAU1701_PINCONF_0:
155 case ADAU1701_PINCONF_1:
157 case ADAU1701_DSPCTRL:
158 case ADAU1701_SEROCTL:
159 case ADAU1701_AUXNPOW:
160 case ADAU1701_OSCIPOW:
161 case ADAU1701_DACSET:
163 case ADAU1701_SERICTL:
167 dev_err(dev, "Unsupported register address: %d\n", reg);
171 static bool adau1701_volatile_reg(struct device *dev, unsigned int reg)
174 case ADAU1701_DACSET:
175 case ADAU1701_DSPCTRL:
182 static int adau1701_reg_write(void *context, unsigned int reg,
185 struct i2c_client *client = context;
191 size = adau1701_register_size(&client->dev, reg);
198 for (i = size + 1; i >= 2; --i) {
203 ret = i2c_master_send(client, buf, size + 2);
212 static int adau1701_reg_read(void *context, unsigned int reg,
218 uint8_t send_buf[2], recv_buf[3];
219 struct i2c_client *client = context;
220 struct i2c_msg msgs[2];
222 size = adau1701_register_size(&client->dev, reg);
226 send_buf[0] = reg >> 8;
227 send_buf[1] = reg & 0xff;
229 msgs[0].addr = client->addr;
230 msgs[0].len = sizeof(send_buf);
231 msgs[0].buf = send_buf;
234 msgs[1].addr = client->addr;
236 msgs[1].buf = recv_buf;
237 msgs[1].flags = I2C_M_RD;
239 ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
242 else if (ret != ARRAY_SIZE(msgs))
247 for (i = 0; i < size; i++) {
249 *value |= recv_buf[i];
255 static int adau1701_safeload(struct sigmadsp *sigmadsp, unsigned int addr,
256 const uint8_t bytes[], size_t len)
258 struct i2c_client *client = to_i2c_client(sigmadsp->dev);
259 struct adau1701 *adau1701 = i2c_get_clientdata(client);
265 ret = regmap_read(adau1701->regmap, ADAU1701_DSPCTRL, &val);
269 if (val & ADAU1701_DSPCTRL_IST)
272 for (i = 0; i < len / 4; i++) {
273 put_unaligned_le16(ADAU1701_SAFELOAD_DATA(i), buf);
275 memcpy(buf + 3, bytes + i * 4, 4);
276 ret = i2c_master_send(client, buf, 7);
282 put_unaligned_le16(ADAU1701_SAFELOAD_ADDR(i), buf);
283 put_unaligned_le16(addr + i, buf + 2);
284 ret = i2c_master_send(client, buf, 4);
291 return regmap_update_bits(adau1701->regmap, ADAU1701_DSPCTRL,
292 ADAU1701_DSPCTRL_IST, ADAU1701_DSPCTRL_IST);
295 static const struct sigmadsp_ops adau1701_sigmadsp_ops = {
296 .safeload = adau1701_safeload,
299 static int adau1701_reset(struct snd_soc_component *component, unsigned int clkdiv,
302 struct adau1701 *adau1701 = snd_soc_component_get_drvdata(component);
305 DECLARE_BITMAP(values, 2);
306 sigmadsp_reset(adau1701->sigmadsp);
308 if (clkdiv != ADAU1707_CLKDIV_UNSET && adau1701->gpio_pll_mode) {
311 __assign_bit(0, values, 0);
312 __assign_bit(1, values, 0);
315 __assign_bit(0, values, 0);
316 __assign_bit(1, values, 1);
319 __assign_bit(0, values, 1);
320 __assign_bit(1, values, 0);
322 case 0: /* fallback */
324 __assign_bit(0, values, 1);
325 __assign_bit(1, values, 1);
328 gpiod_set_array_value_cansleep(adau1701->gpio_pll_mode->ndescs,
329 adau1701->gpio_pll_mode->desc, adau1701->gpio_pll_mode->info,
333 adau1701->pll_clkdiv = clkdiv;
335 if (adau1701->gpio_nreset) {
336 gpiod_set_value_cansleep(adau1701->gpio_nreset, 0);
337 /* minimum reset time is 20ns */
339 gpiod_set_value_cansleep(adau1701->gpio_nreset, 1);
340 /* power-up time may be as long as 85ms */
345 * Postpone the firmware download to a point in time when we
346 * know the correct PLL setup
348 if (clkdiv != ADAU1707_CLKDIV_UNSET) {
349 ret = sigmadsp_setup(adau1701->sigmadsp, rate);
351 dev_warn(component->dev, "Failed to load firmware\n");
356 regmap_write(adau1701->regmap, ADAU1701_DACSET, ADAU1701_DACSET_DACINIT);
357 regmap_write(adau1701->regmap, ADAU1701_DSPCTRL, ADAU1701_DSPCTRL_CR);
359 regcache_mark_dirty(adau1701->regmap);
360 regcache_sync(adau1701->regmap);
365 static int adau1701_set_capture_pcm_format(struct snd_soc_component *component,
366 struct snd_pcm_hw_params *params)
368 struct adau1701 *adau1701 = snd_soc_component_get_drvdata(component);
369 unsigned int mask = ADAU1701_SEROCTL_WORD_LEN_MASK;
372 switch (params_width(params)) {
374 val = ADAU1701_SEROCTL_WORD_LEN_16;
377 val = ADAU1701_SEROCTL_WORD_LEN_20;
380 val = ADAU1701_SEROCTL_WORD_LEN_24;
386 if (adau1701->dai_fmt == SND_SOC_DAIFMT_RIGHT_J) {
387 switch (params_width(params)) {
389 val |= ADAU1701_SEROCTL_MSB_DEALY16;
392 val |= ADAU1701_SEROCTL_MSB_DEALY12;
395 val |= ADAU1701_SEROCTL_MSB_DEALY8;
398 mask |= ADAU1701_SEROCTL_MSB_DEALY_MASK;
401 regmap_update_bits(adau1701->regmap, ADAU1701_SEROCTL, mask, val);
406 static int adau1701_set_playback_pcm_format(struct snd_soc_component *component,
407 struct snd_pcm_hw_params *params)
409 struct adau1701 *adau1701 = snd_soc_component_get_drvdata(component);
412 if (adau1701->dai_fmt != SND_SOC_DAIFMT_RIGHT_J)
415 switch (params_width(params)) {
417 val = ADAU1701_SERICTL_RIGHTJ_16;
420 val = ADAU1701_SERICTL_RIGHTJ_20;
423 val = ADAU1701_SERICTL_RIGHTJ_24;
429 regmap_update_bits(adau1701->regmap, ADAU1701_SERICTL,
430 ADAU1701_SERICTL_MODE_MASK, val);
435 static int adau1701_hw_params(struct snd_pcm_substream *substream,
436 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
438 struct snd_soc_component *component = dai->component;
439 struct adau1701 *adau1701 = snd_soc_component_get_drvdata(component);
440 unsigned int clkdiv = adau1701->sysclk / params_rate(params);
445 * If the mclk/lrclk ratio changes, the chip needs updated PLL
446 * mode GPIO settings, and a full reset cycle, including a new
449 if (clkdiv != adau1701->pll_clkdiv) {
450 ret = adau1701_reset(component, clkdiv, params_rate(params));
455 switch (params_rate(params)) {
457 val = ADAU1701_DSPCTRL_SR_192;
460 val = ADAU1701_DSPCTRL_SR_96;
463 val = ADAU1701_DSPCTRL_SR_48;
469 regmap_update_bits(adau1701->regmap, ADAU1701_DSPCTRL,
470 ADAU1701_DSPCTRL_SR_MASK, val);
472 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
473 return adau1701_set_playback_pcm_format(component, params);
475 return adau1701_set_capture_pcm_format(component, params);
478 static int adau1701_set_dai_fmt(struct snd_soc_dai *codec_dai,
481 struct snd_soc_component *component = codec_dai->component;
482 struct adau1701 *adau1701 = snd_soc_component_get_drvdata(component);
483 unsigned int serictl = 0x00, seroctl = 0x00;
486 switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) {
487 case SND_SOC_DAIFMT_CBP_CFP:
488 /* master, 64-bits per sample, 1 frame per sample */
489 seroctl |= ADAU1701_SEROCTL_MASTER | ADAU1701_SEROCTL_OBF16
490 | ADAU1701_SEROCTL_OLF1024;
492 case SND_SOC_DAIFMT_CBC_CFC:
498 /* clock inversion */
499 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
500 case SND_SOC_DAIFMT_NB_NF:
501 invert_lrclk = false;
503 case SND_SOC_DAIFMT_NB_IF:
506 case SND_SOC_DAIFMT_IB_NF:
507 invert_lrclk = false;
508 serictl |= ADAU1701_SERICTL_INV_BCLK;
509 seroctl |= ADAU1701_SEROCTL_INV_BCLK;
511 case SND_SOC_DAIFMT_IB_IF:
513 serictl |= ADAU1701_SERICTL_INV_BCLK;
514 seroctl |= ADAU1701_SEROCTL_INV_BCLK;
520 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
521 case SND_SOC_DAIFMT_I2S:
523 case SND_SOC_DAIFMT_LEFT_J:
524 serictl |= ADAU1701_SERICTL_LEFTJ;
525 seroctl |= ADAU1701_SEROCTL_MSB_DEALY0;
526 invert_lrclk = !invert_lrclk;
528 case SND_SOC_DAIFMT_RIGHT_J:
529 serictl |= ADAU1701_SERICTL_RIGHTJ_24;
530 seroctl |= ADAU1701_SEROCTL_MSB_DEALY8;
531 invert_lrclk = !invert_lrclk;
538 seroctl |= ADAU1701_SEROCTL_INV_LRCLK;
539 serictl |= ADAU1701_SERICTL_INV_LRCLK;
542 adau1701->dai_fmt = fmt & SND_SOC_DAIFMT_FORMAT_MASK;
544 regmap_write(adau1701->regmap, ADAU1701_SERICTL, serictl);
545 regmap_update_bits(adau1701->regmap, ADAU1701_SEROCTL,
546 ~ADAU1701_SEROCTL_WORD_LEN_MASK, seroctl);
551 static int adau1701_set_bias_level(struct snd_soc_component *component,
552 enum snd_soc_bias_level level)
554 unsigned int mask = ADAU1701_AUXNPOW_VBPD | ADAU1701_AUXNPOW_VRPD;
555 struct adau1701 *adau1701 = snd_soc_component_get_drvdata(component);
558 case SND_SOC_BIAS_ON:
560 case SND_SOC_BIAS_PREPARE:
562 case SND_SOC_BIAS_STANDBY:
563 /* Enable VREF and VREF buffer */
564 regmap_update_bits(adau1701->regmap,
565 ADAU1701_AUXNPOW, mask, 0x00);
567 case SND_SOC_BIAS_OFF:
568 /* Disable VREF and VREF buffer */
569 regmap_update_bits(adau1701->regmap,
570 ADAU1701_AUXNPOW, mask, mask);
577 static int adau1701_mute_stream(struct snd_soc_dai *dai, int mute, int direction)
579 struct snd_soc_component *component = dai->component;
580 unsigned int mask = ADAU1701_DSPCTRL_DAM;
581 struct adau1701 *adau1701 = snd_soc_component_get_drvdata(component);
589 regmap_update_bits(adau1701->regmap, ADAU1701_DSPCTRL, mask, val);
594 static int adau1701_set_sysclk(struct snd_soc_component *component, int clk_id,
595 int source, unsigned int freq, int dir)
598 struct adau1701 *adau1701 = snd_soc_component_get_drvdata(component);
601 case ADAU1701_CLK_SRC_OSC:
604 case ADAU1701_CLK_SRC_MCLK:
605 val = ADAU1701_OSCIPOW_OPD;
611 regmap_update_bits(adau1701->regmap, ADAU1701_OSCIPOW,
612 ADAU1701_OSCIPOW_OPD, val);
613 adau1701->sysclk = freq;
618 static int adau1701_startup(struct snd_pcm_substream *substream,
619 struct snd_soc_dai *dai)
621 struct adau1701 *adau1701 = snd_soc_component_get_drvdata(dai->component);
623 return sigmadsp_restrict_params(adau1701->sigmadsp, substream);
626 #define ADAU1701_RATES (SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_96000 | \
627 SNDRV_PCM_RATE_192000)
629 #define ADAU1701_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
630 SNDRV_PCM_FMTBIT_S24_LE)
632 static const struct snd_soc_dai_ops adau1701_dai_ops = {
633 .set_fmt = adau1701_set_dai_fmt,
634 .hw_params = adau1701_hw_params,
635 .mute_stream = adau1701_mute_stream,
636 .startup = adau1701_startup,
637 .no_capture_mute = 1,
640 static struct snd_soc_dai_driver adau1701_dai = {
643 .stream_name = "Playback",
646 .rates = ADAU1701_RATES,
647 .formats = ADAU1701_FORMATS,
650 .stream_name = "Capture",
653 .rates = ADAU1701_RATES,
654 .formats = ADAU1701_FORMATS,
656 .ops = &adau1701_dai_ops,
661 static const struct of_device_id adau1701_dt_ids[] = {
662 { .compatible = "adi,adau1701", },
665 MODULE_DEVICE_TABLE(of, adau1701_dt_ids);
668 static int adau1701_probe(struct snd_soc_component *component)
672 struct adau1701 *adau1701 = snd_soc_component_get_drvdata(component);
674 ret = sigmadsp_attach(adau1701->sigmadsp, component);
678 ret = regulator_bulk_enable(ARRAY_SIZE(adau1701->supplies),
681 dev_err(component->dev, "Failed to enable regulators: %d\n", ret);
686 * Let the pll_clkdiv variable default to something that won't happen
687 * at runtime. That way, we can postpone the firmware download from
688 * adau1701_reset() to a point in time when we know the correct PLL
691 adau1701->pll_clkdiv = ADAU1707_CLKDIV_UNSET;
693 /* initalize with pre-configured pll mode settings */
694 ret = adau1701_reset(component, adau1701->pll_clkdiv, 0);
696 goto exit_regulators_disable;
698 /* set up pin config */
700 for (i = 0; i < 6; i++)
701 val |= adau1701->pin_config[i] << (i * 4);
703 regmap_write(adau1701->regmap, ADAU1701_PINCONF_0, val);
706 for (i = 0; i < 6; i++)
707 val |= adau1701->pin_config[i + 6] << (i * 4);
709 regmap_write(adau1701->regmap, ADAU1701_PINCONF_1, val);
713 exit_regulators_disable:
715 regulator_bulk_disable(ARRAY_SIZE(adau1701->supplies), adau1701->supplies);
719 static void adau1701_remove(struct snd_soc_component *component)
721 struct adau1701 *adau1701 = snd_soc_component_get_drvdata(component);
723 if (adau1701->gpio_nreset)
724 gpiod_set_value_cansleep(adau1701->gpio_nreset, 0);
726 regulator_bulk_disable(ARRAY_SIZE(adau1701->supplies), adau1701->supplies);
730 static int adau1701_suspend(struct snd_soc_component *component)
732 struct adau1701 *adau1701 = snd_soc_component_get_drvdata(component);
734 regulator_bulk_disable(ARRAY_SIZE(adau1701->supplies),
740 static int adau1701_resume(struct snd_soc_component *component)
742 struct adau1701 *adau1701 = snd_soc_component_get_drvdata(component);
745 ret = regulator_bulk_enable(ARRAY_SIZE(adau1701->supplies),
748 dev_err(component->dev, "Failed to enable regulators: %d\n", ret);
752 return adau1701_reset(component, adau1701->pll_clkdiv, 0);
755 #define adau1701_resume NULL
756 #define adau1701_suspend NULL
757 #endif /* CONFIG_PM */
759 static const struct snd_soc_component_driver adau1701_component_drv = {
760 .probe = adau1701_probe,
761 .remove = adau1701_remove,
762 .resume = adau1701_resume,
763 .suspend = adau1701_suspend,
764 .set_bias_level = adau1701_set_bias_level,
765 .controls = adau1701_controls,
766 .num_controls = ARRAY_SIZE(adau1701_controls),
767 .dapm_widgets = adau1701_dapm_widgets,
768 .num_dapm_widgets = ARRAY_SIZE(adau1701_dapm_widgets),
769 .dapm_routes = adau1701_dapm_routes,
770 .num_dapm_routes = ARRAY_SIZE(adau1701_dapm_routes),
771 .set_sysclk = adau1701_set_sysclk,
772 .use_pmdown_time = 1,
776 static const struct regmap_config adau1701_regmap = {
779 .max_register = ADAU1701_MAX_REGISTER,
780 .cache_type = REGCACHE_MAPLE,
781 .volatile_reg = adau1701_volatile_reg,
782 .reg_write = adau1701_reg_write,
783 .reg_read = adau1701_reg_read,
786 static int adau1701_i2c_probe(struct i2c_client *client)
788 struct adau1701 *adau1701;
789 struct device *dev = &client->dev;
792 adau1701 = devm_kzalloc(dev, sizeof(*adau1701), GFP_KERNEL);
796 for (i = 0; i < ARRAY_SIZE(supply_names); i++)
797 adau1701->supplies[i].supply = supply_names[i];
799 ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(adau1701->supplies),
802 dev_err(dev, "Failed to get regulators: %d\n", ret);
806 ret = regulator_bulk_enable(ARRAY_SIZE(adau1701->supplies),
809 dev_err(dev, "Failed to enable regulators: %d\n", ret);
813 adau1701->client = client;
814 adau1701->regmap = devm_regmap_init(dev, NULL, client,
816 if (IS_ERR(adau1701->regmap)) {
817 ret = PTR_ERR(adau1701->regmap);
818 goto exit_regulators_disable;
823 of_property_read_u32(dev->of_node, "adi,pll-clkdiv",
824 &adau1701->pll_clkdiv);
826 of_property_read_u8_array(dev->of_node, "adi,pin-config",
827 adau1701->pin_config,
828 ARRAY_SIZE(adau1701->pin_config));
831 adau1701->gpio_nreset = devm_gpiod_get_optional(dev, "reset", GPIOD_IN);
833 if (IS_ERR(adau1701->gpio_nreset)) {
834 ret = PTR_ERR(adau1701->gpio_nreset);
835 goto exit_regulators_disable;
838 adau1701->gpio_pll_mode = devm_gpiod_get_array_optional(dev, "adi,pll-mode", GPIOD_OUT_LOW);
840 if (IS_ERR(adau1701->gpio_pll_mode)) {
841 ret = PTR_ERR(adau1701->gpio_pll_mode);
842 goto exit_regulators_disable;
845 i2c_set_clientdata(client, adau1701);
847 adau1701->sigmadsp = devm_sigmadsp_init_i2c(client,
848 &adau1701_sigmadsp_ops, ADAU1701_FIRMWARE);
849 if (IS_ERR(adau1701->sigmadsp)) {
850 ret = PTR_ERR(adau1701->sigmadsp);
851 goto exit_regulators_disable;
854 ret = devm_snd_soc_register_component(&client->dev,
855 &adau1701_component_drv,
858 exit_regulators_disable:
860 regulator_bulk_disable(ARRAY_SIZE(adau1701->supplies), adau1701->supplies);
864 static const struct i2c_device_id adau1701_i2c_id[] = {
871 MODULE_DEVICE_TABLE(i2c, adau1701_i2c_id);
873 static struct i2c_driver adau1701_i2c_driver = {
876 .of_match_table = of_match_ptr(adau1701_dt_ids),
878 .probe = adau1701_i2c_probe,
879 .id_table = adau1701_i2c_id,
882 module_i2c_driver(adau1701_i2c_driver);
884 MODULE_DESCRIPTION("ASoC ADAU1701 SigmaDSP driver");
885 MODULE_AUTHOR("Cliff Cai <cliff.cai@analog.com>");
886 MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
887 MODULE_LICENSE("GPL");