1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Driver for ADAU1701 SigmaDSP processor
5 * Copyright 2011 Analog Devices Inc.
6 * Author: Lars-Peter Clausen <lars@metafoo.de>
7 * based on an inital version by Cliff Cai <cliff.cai@analog.com>
10 #include <linux/module.h>
11 #include <linux/init.h>
12 #include <linux/i2c.h>
13 #include <linux/delay.h>
14 #include <linux/slab.h>
16 #include <linux/of_device.h>
17 #include <linux/gpio/consumer.h>
18 #include <linux/regulator/consumer.h>
19 #include <linux/regmap.h>
20 #include <sound/core.h>
21 #include <sound/pcm.h>
22 #include <sound/pcm_params.h>
23 #include <sound/soc.h>
25 #include <asm/unaligned.h>
30 #define ADAU1701_SAFELOAD_DATA(i) (0x0810 + (i))
31 #define ADAU1701_SAFELOAD_ADDR(i) (0x0815 + (i))
33 #define ADAU1701_DSPCTRL 0x081c
34 #define ADAU1701_SEROCTL 0x081e
35 #define ADAU1701_SERICTL 0x081f
37 #define ADAU1701_AUXNPOW 0x0822
38 #define ADAU1701_PINCONF_0 0x0820
39 #define ADAU1701_PINCONF_1 0x0821
40 #define ADAU1701_AUXNPOW 0x0822
42 #define ADAU1701_OSCIPOW 0x0826
43 #define ADAU1701_DACSET 0x0827
45 #define ADAU1701_MAX_REGISTER 0x0828
47 #define ADAU1701_DSPCTRL_CR (1 << 2)
48 #define ADAU1701_DSPCTRL_DAM (1 << 3)
49 #define ADAU1701_DSPCTRL_ADM (1 << 4)
50 #define ADAU1701_DSPCTRL_IST (1 << 5)
51 #define ADAU1701_DSPCTRL_SR_48 0x00
52 #define ADAU1701_DSPCTRL_SR_96 0x01
53 #define ADAU1701_DSPCTRL_SR_192 0x02
54 #define ADAU1701_DSPCTRL_SR_MASK 0x03
56 #define ADAU1701_SEROCTL_INV_LRCLK 0x2000
57 #define ADAU1701_SEROCTL_INV_BCLK 0x1000
58 #define ADAU1701_SEROCTL_MASTER 0x0800
60 #define ADAU1701_SEROCTL_OBF16 0x0000
61 #define ADAU1701_SEROCTL_OBF8 0x0200
62 #define ADAU1701_SEROCTL_OBF4 0x0400
63 #define ADAU1701_SEROCTL_OBF2 0x0600
64 #define ADAU1701_SEROCTL_OBF_MASK 0x0600
66 #define ADAU1701_SEROCTL_OLF1024 0x0000
67 #define ADAU1701_SEROCTL_OLF512 0x0080
68 #define ADAU1701_SEROCTL_OLF256 0x0100
69 #define ADAU1701_SEROCTL_OLF_MASK 0x0180
71 #define ADAU1701_SEROCTL_MSB_DEALY1 0x0000
72 #define ADAU1701_SEROCTL_MSB_DEALY0 0x0004
73 #define ADAU1701_SEROCTL_MSB_DEALY8 0x0008
74 #define ADAU1701_SEROCTL_MSB_DEALY12 0x000c
75 #define ADAU1701_SEROCTL_MSB_DEALY16 0x0010
76 #define ADAU1701_SEROCTL_MSB_DEALY_MASK 0x001c
78 #define ADAU1701_SEROCTL_WORD_LEN_24 0x0000
79 #define ADAU1701_SEROCTL_WORD_LEN_20 0x0001
80 #define ADAU1701_SEROCTL_WORD_LEN_16 0x0002
81 #define ADAU1701_SEROCTL_WORD_LEN_MASK 0x0003
83 #define ADAU1701_AUXNPOW_VBPD 0x40
84 #define ADAU1701_AUXNPOW_VRPD 0x20
86 #define ADAU1701_SERICTL_I2S 0
87 #define ADAU1701_SERICTL_LEFTJ 1
88 #define ADAU1701_SERICTL_TDM 2
89 #define ADAU1701_SERICTL_RIGHTJ_24 3
90 #define ADAU1701_SERICTL_RIGHTJ_20 4
91 #define ADAU1701_SERICTL_RIGHTJ_18 5
92 #define ADAU1701_SERICTL_RIGHTJ_16 6
93 #define ADAU1701_SERICTL_MODE_MASK 7
94 #define ADAU1701_SERICTL_INV_BCLK BIT(3)
95 #define ADAU1701_SERICTL_INV_LRCLK BIT(4)
97 #define ADAU1701_OSCIPOW_OPD 0x04
98 #define ADAU1701_DACSET_DACINIT 1
100 #define ADAU1707_CLKDIV_UNSET (-1U)
102 #define ADAU1701_FIRMWARE "/*(DEBLOBBED)*/"
104 static const char * const supply_names[] = {
109 struct gpio_desc *gpio_nreset;
110 struct gpio_descs *gpio_pll_mode;
111 unsigned int dai_fmt;
112 unsigned int pll_clkdiv;
114 struct regmap *regmap;
115 struct i2c_client *client;
118 struct sigmadsp *sigmadsp;
119 struct regulator_bulk_data supplies[ARRAY_SIZE(supply_names)];
122 static const struct snd_kcontrol_new adau1701_controls[] = {
123 SOC_SINGLE("Master Capture Switch", ADAU1701_DSPCTRL, 4, 1, 0),
126 static const struct snd_soc_dapm_widget adau1701_dapm_widgets[] = {
127 SND_SOC_DAPM_DAC("DAC0", "Playback", ADAU1701_AUXNPOW, 3, 1),
128 SND_SOC_DAPM_DAC("DAC1", "Playback", ADAU1701_AUXNPOW, 2, 1),
129 SND_SOC_DAPM_DAC("DAC2", "Playback", ADAU1701_AUXNPOW, 1, 1),
130 SND_SOC_DAPM_DAC("DAC3", "Playback", ADAU1701_AUXNPOW, 0, 1),
131 SND_SOC_DAPM_ADC("ADC", "Capture", ADAU1701_AUXNPOW, 7, 1),
133 SND_SOC_DAPM_OUTPUT("OUT0"),
134 SND_SOC_DAPM_OUTPUT("OUT1"),
135 SND_SOC_DAPM_OUTPUT("OUT2"),
136 SND_SOC_DAPM_OUTPUT("OUT3"),
137 SND_SOC_DAPM_INPUT("IN0"),
138 SND_SOC_DAPM_INPUT("IN1"),
141 static const struct snd_soc_dapm_route adau1701_dapm_routes[] = {
142 { "OUT0", NULL, "DAC0" },
143 { "OUT1", NULL, "DAC1" },
144 { "OUT2", NULL, "DAC2" },
145 { "OUT3", NULL, "DAC3" },
147 { "ADC", NULL, "IN0" },
148 { "ADC", NULL, "IN1" },
151 static unsigned int adau1701_register_size(struct device *dev,
155 case ADAU1701_PINCONF_0:
156 case ADAU1701_PINCONF_1:
158 case ADAU1701_DSPCTRL:
159 case ADAU1701_SEROCTL:
160 case ADAU1701_AUXNPOW:
161 case ADAU1701_OSCIPOW:
162 case ADAU1701_DACSET:
164 case ADAU1701_SERICTL:
168 dev_err(dev, "Unsupported register address: %d\n", reg);
172 static bool adau1701_volatile_reg(struct device *dev, unsigned int reg)
175 case ADAU1701_DACSET:
176 case ADAU1701_DSPCTRL:
183 static int adau1701_reg_write(void *context, unsigned int reg,
186 struct i2c_client *client = context;
192 size = adau1701_register_size(&client->dev, reg);
199 for (i = size + 1; i >= 2; --i) {
204 ret = i2c_master_send(client, buf, size + 2);
213 static int adau1701_reg_read(void *context, unsigned int reg,
219 uint8_t send_buf[2], recv_buf[3];
220 struct i2c_client *client = context;
221 struct i2c_msg msgs[2];
223 size = adau1701_register_size(&client->dev, reg);
227 send_buf[0] = reg >> 8;
228 send_buf[1] = reg & 0xff;
230 msgs[0].addr = client->addr;
231 msgs[0].len = sizeof(send_buf);
232 msgs[0].buf = send_buf;
235 msgs[1].addr = client->addr;
237 msgs[1].buf = recv_buf;
238 msgs[1].flags = I2C_M_RD;
240 ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
243 else if (ret != ARRAY_SIZE(msgs))
248 for (i = 0; i < size; i++) {
250 *value |= recv_buf[i];
256 static int adau1701_safeload(struct sigmadsp *sigmadsp, unsigned int addr,
257 const uint8_t bytes[], size_t len)
259 struct i2c_client *client = to_i2c_client(sigmadsp->dev);
260 struct adau1701 *adau1701 = i2c_get_clientdata(client);
266 ret = regmap_read(adau1701->regmap, ADAU1701_DSPCTRL, &val);
270 if (val & ADAU1701_DSPCTRL_IST)
273 for (i = 0; i < len / 4; i++) {
274 put_unaligned_le16(ADAU1701_SAFELOAD_DATA(i), buf);
276 memcpy(buf + 3, bytes + i * 4, 4);
277 ret = i2c_master_send(client, buf, 7);
283 put_unaligned_le16(ADAU1701_SAFELOAD_ADDR(i), buf);
284 put_unaligned_le16(addr + i, buf + 2);
285 ret = i2c_master_send(client, buf, 4);
292 return regmap_update_bits(adau1701->regmap, ADAU1701_DSPCTRL,
293 ADAU1701_DSPCTRL_IST, ADAU1701_DSPCTRL_IST);
296 static const struct sigmadsp_ops adau1701_sigmadsp_ops = {
297 .safeload = adau1701_safeload,
300 static int adau1701_reset(struct snd_soc_component *component, unsigned int clkdiv,
303 struct adau1701 *adau1701 = snd_soc_component_get_drvdata(component);
306 DECLARE_BITMAP(values, 2);
307 sigmadsp_reset(adau1701->sigmadsp);
309 if (clkdiv != ADAU1707_CLKDIV_UNSET && adau1701->gpio_pll_mode) {
312 __assign_bit(0, values, 0);
313 __assign_bit(1, values, 0);
316 __assign_bit(0, values, 0);
317 __assign_bit(1, values, 1);
320 __assign_bit(0, values, 1);
321 __assign_bit(1, values, 0);
323 case 0: /* fallback */
325 __assign_bit(0, values, 1);
326 __assign_bit(1, values, 1);
329 gpiod_set_array_value_cansleep(adau1701->gpio_pll_mode->ndescs,
330 adau1701->gpio_pll_mode->desc, adau1701->gpio_pll_mode->info,
334 adau1701->pll_clkdiv = clkdiv;
336 if (adau1701->gpio_nreset) {
337 gpiod_set_value_cansleep(adau1701->gpio_nreset, 0);
338 /* minimum reset time is 20ns */
340 gpiod_set_value_cansleep(adau1701->gpio_nreset, 1);
341 /* power-up time may be as long as 85ms */
346 * Postpone the firmware download to a point in time when we
347 * know the correct PLL setup
349 if (clkdiv != ADAU1707_CLKDIV_UNSET) {
350 ret = sigmadsp_setup(adau1701->sigmadsp, rate);
352 dev_warn(component->dev, "Failed to load firmware\n");
357 regmap_write(adau1701->regmap, ADAU1701_DACSET, ADAU1701_DACSET_DACINIT);
358 regmap_write(adau1701->regmap, ADAU1701_DSPCTRL, ADAU1701_DSPCTRL_CR);
360 regcache_mark_dirty(adau1701->regmap);
361 regcache_sync(adau1701->regmap);
366 static int adau1701_set_capture_pcm_format(struct snd_soc_component *component,
367 struct snd_pcm_hw_params *params)
369 struct adau1701 *adau1701 = snd_soc_component_get_drvdata(component);
370 unsigned int mask = ADAU1701_SEROCTL_WORD_LEN_MASK;
373 switch (params_width(params)) {
375 val = ADAU1701_SEROCTL_WORD_LEN_16;
378 val = ADAU1701_SEROCTL_WORD_LEN_20;
381 val = ADAU1701_SEROCTL_WORD_LEN_24;
387 if (adau1701->dai_fmt == SND_SOC_DAIFMT_RIGHT_J) {
388 switch (params_width(params)) {
390 val |= ADAU1701_SEROCTL_MSB_DEALY16;
393 val |= ADAU1701_SEROCTL_MSB_DEALY12;
396 val |= ADAU1701_SEROCTL_MSB_DEALY8;
399 mask |= ADAU1701_SEROCTL_MSB_DEALY_MASK;
402 regmap_update_bits(adau1701->regmap, ADAU1701_SEROCTL, mask, val);
407 static int adau1701_set_playback_pcm_format(struct snd_soc_component *component,
408 struct snd_pcm_hw_params *params)
410 struct adau1701 *adau1701 = snd_soc_component_get_drvdata(component);
413 if (adau1701->dai_fmt != SND_SOC_DAIFMT_RIGHT_J)
416 switch (params_width(params)) {
418 val = ADAU1701_SERICTL_RIGHTJ_16;
421 val = ADAU1701_SERICTL_RIGHTJ_20;
424 val = ADAU1701_SERICTL_RIGHTJ_24;
430 regmap_update_bits(adau1701->regmap, ADAU1701_SERICTL,
431 ADAU1701_SERICTL_MODE_MASK, val);
436 static int adau1701_hw_params(struct snd_pcm_substream *substream,
437 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
439 struct snd_soc_component *component = dai->component;
440 struct adau1701 *adau1701 = snd_soc_component_get_drvdata(component);
441 unsigned int clkdiv = adau1701->sysclk / params_rate(params);
446 * If the mclk/lrclk ratio changes, the chip needs updated PLL
447 * mode GPIO settings, and a full reset cycle, including a new
450 if (clkdiv != adau1701->pll_clkdiv) {
451 ret = adau1701_reset(component, clkdiv, params_rate(params));
456 switch (params_rate(params)) {
458 val = ADAU1701_DSPCTRL_SR_192;
461 val = ADAU1701_DSPCTRL_SR_96;
464 val = ADAU1701_DSPCTRL_SR_48;
470 regmap_update_bits(adau1701->regmap, ADAU1701_DSPCTRL,
471 ADAU1701_DSPCTRL_SR_MASK, val);
473 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
474 return adau1701_set_playback_pcm_format(component, params);
476 return adau1701_set_capture_pcm_format(component, params);
479 static int adau1701_set_dai_fmt(struct snd_soc_dai *codec_dai,
482 struct snd_soc_component *component = codec_dai->component;
483 struct adau1701 *adau1701 = snd_soc_component_get_drvdata(component);
484 unsigned int serictl = 0x00, seroctl = 0x00;
487 switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) {
488 case SND_SOC_DAIFMT_CBP_CFP:
489 /* master, 64-bits per sample, 1 frame per sample */
490 seroctl |= ADAU1701_SEROCTL_MASTER | ADAU1701_SEROCTL_OBF16
491 | ADAU1701_SEROCTL_OLF1024;
493 case SND_SOC_DAIFMT_CBC_CFC:
499 /* clock inversion */
500 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
501 case SND_SOC_DAIFMT_NB_NF:
502 invert_lrclk = false;
504 case SND_SOC_DAIFMT_NB_IF:
507 case SND_SOC_DAIFMT_IB_NF:
508 invert_lrclk = false;
509 serictl |= ADAU1701_SERICTL_INV_BCLK;
510 seroctl |= ADAU1701_SEROCTL_INV_BCLK;
512 case SND_SOC_DAIFMT_IB_IF:
514 serictl |= ADAU1701_SERICTL_INV_BCLK;
515 seroctl |= ADAU1701_SEROCTL_INV_BCLK;
521 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
522 case SND_SOC_DAIFMT_I2S:
524 case SND_SOC_DAIFMT_LEFT_J:
525 serictl |= ADAU1701_SERICTL_LEFTJ;
526 seroctl |= ADAU1701_SEROCTL_MSB_DEALY0;
527 invert_lrclk = !invert_lrclk;
529 case SND_SOC_DAIFMT_RIGHT_J:
530 serictl |= ADAU1701_SERICTL_RIGHTJ_24;
531 seroctl |= ADAU1701_SEROCTL_MSB_DEALY8;
532 invert_lrclk = !invert_lrclk;
539 seroctl |= ADAU1701_SEROCTL_INV_LRCLK;
540 serictl |= ADAU1701_SERICTL_INV_LRCLK;
543 adau1701->dai_fmt = fmt & SND_SOC_DAIFMT_FORMAT_MASK;
545 regmap_write(adau1701->regmap, ADAU1701_SERICTL, serictl);
546 regmap_update_bits(adau1701->regmap, ADAU1701_SEROCTL,
547 ~ADAU1701_SEROCTL_WORD_LEN_MASK, seroctl);
552 static int adau1701_set_bias_level(struct snd_soc_component *component,
553 enum snd_soc_bias_level level)
555 unsigned int mask = ADAU1701_AUXNPOW_VBPD | ADAU1701_AUXNPOW_VRPD;
556 struct adau1701 *adau1701 = snd_soc_component_get_drvdata(component);
559 case SND_SOC_BIAS_ON:
561 case SND_SOC_BIAS_PREPARE:
563 case SND_SOC_BIAS_STANDBY:
564 /* Enable VREF and VREF buffer */
565 regmap_update_bits(adau1701->regmap,
566 ADAU1701_AUXNPOW, mask, 0x00);
568 case SND_SOC_BIAS_OFF:
569 /* Disable VREF and VREF buffer */
570 regmap_update_bits(adau1701->regmap,
571 ADAU1701_AUXNPOW, mask, mask);
578 static int adau1701_mute_stream(struct snd_soc_dai *dai, int mute, int direction)
580 struct snd_soc_component *component = dai->component;
581 unsigned int mask = ADAU1701_DSPCTRL_DAM;
582 struct adau1701 *adau1701 = snd_soc_component_get_drvdata(component);
590 regmap_update_bits(adau1701->regmap, ADAU1701_DSPCTRL, mask, val);
595 static int adau1701_set_sysclk(struct snd_soc_component *component, int clk_id,
596 int source, unsigned int freq, int dir)
599 struct adau1701 *adau1701 = snd_soc_component_get_drvdata(component);
602 case ADAU1701_CLK_SRC_OSC:
605 case ADAU1701_CLK_SRC_MCLK:
606 val = ADAU1701_OSCIPOW_OPD;
612 regmap_update_bits(adau1701->regmap, ADAU1701_OSCIPOW,
613 ADAU1701_OSCIPOW_OPD, val);
614 adau1701->sysclk = freq;
619 static int adau1701_startup(struct snd_pcm_substream *substream,
620 struct snd_soc_dai *dai)
622 struct adau1701 *adau1701 = snd_soc_component_get_drvdata(dai->component);
624 return sigmadsp_restrict_params(adau1701->sigmadsp, substream);
627 #define ADAU1701_RATES (SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_96000 | \
628 SNDRV_PCM_RATE_192000)
630 #define ADAU1701_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
631 SNDRV_PCM_FMTBIT_S24_LE)
633 static const struct snd_soc_dai_ops adau1701_dai_ops = {
634 .set_fmt = adau1701_set_dai_fmt,
635 .hw_params = adau1701_hw_params,
636 .mute_stream = adau1701_mute_stream,
637 .startup = adau1701_startup,
638 .no_capture_mute = 1,
641 static struct snd_soc_dai_driver adau1701_dai = {
644 .stream_name = "Playback",
647 .rates = ADAU1701_RATES,
648 .formats = ADAU1701_FORMATS,
651 .stream_name = "Capture",
654 .rates = ADAU1701_RATES,
655 .formats = ADAU1701_FORMATS,
657 .ops = &adau1701_dai_ops,
662 static const struct of_device_id adau1701_dt_ids[] = {
663 { .compatible = "adi,adau1701", },
666 MODULE_DEVICE_TABLE(of, adau1701_dt_ids);
669 static int adau1701_probe(struct snd_soc_component *component)
673 struct adau1701 *adau1701 = snd_soc_component_get_drvdata(component);
675 ret = sigmadsp_attach(adau1701->sigmadsp, component);
679 ret = regulator_bulk_enable(ARRAY_SIZE(adau1701->supplies),
682 dev_err(component->dev, "Failed to enable regulators: %d\n", ret);
687 * Let the pll_clkdiv variable default to something that won't happen
688 * at runtime. That way, we can postpone the firmware download from
689 * adau1701_reset() to a point in time when we know the correct PLL
692 adau1701->pll_clkdiv = ADAU1707_CLKDIV_UNSET;
694 /* initalize with pre-configured pll mode settings */
695 ret = adau1701_reset(component, adau1701->pll_clkdiv, 0);
697 goto exit_regulators_disable;
699 /* set up pin config */
701 for (i = 0; i < 6; i++)
702 val |= adau1701->pin_config[i] << (i * 4);
704 regmap_write(adau1701->regmap, ADAU1701_PINCONF_0, val);
707 for (i = 0; i < 6; i++)
708 val |= adau1701->pin_config[i + 6] << (i * 4);
710 regmap_write(adau1701->regmap, ADAU1701_PINCONF_1, val);
714 exit_regulators_disable:
716 regulator_bulk_disable(ARRAY_SIZE(adau1701->supplies), adau1701->supplies);
720 static void adau1701_remove(struct snd_soc_component *component)
722 struct adau1701 *adau1701 = snd_soc_component_get_drvdata(component);
724 if (adau1701->gpio_nreset)
725 gpiod_set_value_cansleep(adau1701->gpio_nreset, 0);
727 regulator_bulk_disable(ARRAY_SIZE(adau1701->supplies), adau1701->supplies);
731 static int adau1701_suspend(struct snd_soc_component *component)
733 struct adau1701 *adau1701 = snd_soc_component_get_drvdata(component);
735 regulator_bulk_disable(ARRAY_SIZE(adau1701->supplies),
741 static int adau1701_resume(struct snd_soc_component *component)
743 struct adau1701 *adau1701 = snd_soc_component_get_drvdata(component);
746 ret = regulator_bulk_enable(ARRAY_SIZE(adau1701->supplies),
749 dev_err(component->dev, "Failed to enable regulators: %d\n", ret);
753 return adau1701_reset(component, adau1701->pll_clkdiv, 0);
756 #define adau1701_resume NULL
757 #define adau1701_suspend NULL
758 #endif /* CONFIG_PM */
760 static const struct snd_soc_component_driver adau1701_component_drv = {
761 .probe = adau1701_probe,
762 .remove = adau1701_remove,
763 .resume = adau1701_resume,
764 .suspend = adau1701_suspend,
765 .set_bias_level = adau1701_set_bias_level,
766 .controls = adau1701_controls,
767 .num_controls = ARRAY_SIZE(adau1701_controls),
768 .dapm_widgets = adau1701_dapm_widgets,
769 .num_dapm_widgets = ARRAY_SIZE(adau1701_dapm_widgets),
770 .dapm_routes = adau1701_dapm_routes,
771 .num_dapm_routes = ARRAY_SIZE(adau1701_dapm_routes),
772 .set_sysclk = adau1701_set_sysclk,
773 .use_pmdown_time = 1,
775 .non_legacy_dai_naming = 1,
778 static const struct regmap_config adau1701_regmap = {
781 .max_register = ADAU1701_MAX_REGISTER,
782 .cache_type = REGCACHE_RBTREE,
783 .volatile_reg = adau1701_volatile_reg,
784 .reg_write = adau1701_reg_write,
785 .reg_read = adau1701_reg_read,
788 static int adau1701_i2c_probe(struct i2c_client *client)
790 struct adau1701 *adau1701;
791 struct device *dev = &client->dev;
794 adau1701 = devm_kzalloc(dev, sizeof(*adau1701), GFP_KERNEL);
798 for (i = 0; i < ARRAY_SIZE(supply_names); i++)
799 adau1701->supplies[i].supply = supply_names[i];
801 ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(adau1701->supplies),
804 dev_err(dev, "Failed to get regulators: %d\n", ret);
808 ret = regulator_bulk_enable(ARRAY_SIZE(adau1701->supplies),
811 dev_err(dev, "Failed to enable regulators: %d\n", ret);
815 adau1701->client = client;
816 adau1701->regmap = devm_regmap_init(dev, NULL, client,
818 if (IS_ERR(adau1701->regmap)) {
819 ret = PTR_ERR(adau1701->regmap);
820 goto exit_regulators_disable;
825 of_property_read_u32(dev->of_node, "adi,pll-clkdiv",
826 &adau1701->pll_clkdiv);
828 of_property_read_u8_array(dev->of_node, "adi,pin-config",
829 adau1701->pin_config,
830 ARRAY_SIZE(adau1701->pin_config));
833 adau1701->gpio_nreset = devm_gpiod_get_optional(dev, "reset", GPIOD_IN);
835 if (IS_ERR(adau1701->gpio_nreset)) {
836 ret = PTR_ERR(adau1701->gpio_nreset);
837 goto exit_regulators_disable;
840 adau1701->gpio_pll_mode = devm_gpiod_get_array_optional(dev, "adi,pll-mode", GPIOD_OUT_LOW);
842 if (IS_ERR(adau1701->gpio_pll_mode)) {
843 ret = PTR_ERR(adau1701->gpio_pll_mode);
844 goto exit_regulators_disable;
847 i2c_set_clientdata(client, adau1701);
849 adau1701->sigmadsp = devm_sigmadsp_init_i2c(client,
850 &adau1701_sigmadsp_ops, ADAU1701_FIRMWARE);
851 if (IS_ERR(adau1701->sigmadsp)) {
852 ret = PTR_ERR(adau1701->sigmadsp);
853 goto exit_regulators_disable;
856 ret = devm_snd_soc_register_component(&client->dev,
857 &adau1701_component_drv,
860 exit_regulators_disable:
862 regulator_bulk_disable(ARRAY_SIZE(adau1701->supplies), adau1701->supplies);
866 static const struct i2c_device_id adau1701_i2c_id[] = {
873 MODULE_DEVICE_TABLE(i2c, adau1701_i2c_id);
875 static struct i2c_driver adau1701_i2c_driver = {
878 .of_match_table = of_match_ptr(adau1701_dt_ids),
880 .probe_new = adau1701_i2c_probe,
881 .id_table = adau1701_i2c_id,
884 module_i2c_driver(adau1701_i2c_driver);
886 MODULE_DESCRIPTION("ASoC ADAU1701 SigmaDSP driver");
887 MODULE_AUTHOR("Cliff Cai <cliff.cai@analog.com>");
888 MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
889 MODULE_LICENSE("GPL");