sound/pci/hda/patch_hdmi.c

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 /*
   3  *
   4  *  patch_hdmi.c - routines for HDMI/DisplayPort codecs
   5  *
   6  *  Copyright(c) 2008-2010 Intel Corporation. All rights reserved.
   7  *  Copyright (c) 2006 ATI Technologies Inc.
   8  *  Copyright (c) 2008 NVIDIA Corp.  All rights reserved.
   9  *  Copyright (c) 2008 Wei Ni <wni@nvidia.com>
  10  *  Copyright (c) 2013 Anssi Hannula <anssi.hannula@iki.fi>
  11  *
  12  *  Authors:
  13  *                      Wu Fengguang <wfg@linux.intel.com>
  14  *
  15  *  Maintained by:
  16  *                      Wu Fengguang <wfg@linux.intel.com>
  17  */
  18
  19 #include <linux/init.h>
  20 #include <linux/delay.h>
  21 #include <linux/pci.h>
  22 #include <linux/slab.h>
  23 #include <linux/module.h>
  24 #include <linux/pm_runtime.h>
  25 #include <sound/core.h>
  26 #include <sound/jack.h>
  27 #include <sound/asoundef.h>
  28 #include <sound/tlv.h>
  29 #include <sound/hdaudio.h>
  30 #include <sound/hda_i915.h>
  31 #include <sound/hda_chmap.h>
  32 #include <sound/hda_codec.h>
  33 #include "hda_local.h"
  34 #include "hda_jack.h"
  35 #include "hda_controller.h"
  36
  37 static bool static_hdmi_pcm;
  38 module_param(static_hdmi_pcm, bool, 0644);
  39 MODULE_PARM_DESC(static_hdmi_pcm, "Don't restrict PCM parameters per ELD info");
  40
  41 #define is_haswell(codec)  ((codec)->core.vendor_id == 0x80862807)
  42 #define is_broadwell(codec)    ((codec)->core.vendor_id == 0x80862808)
  43 #define is_skylake(codec) ((codec)->core.vendor_id == 0x80862809)
  44 #define is_broxton(codec) ((codec)->core.vendor_id == 0x8086280a)
  45 #define is_kabylake(codec) ((codec)->core.vendor_id == 0x8086280b)
  46 #define is_geminilake(codec) (((codec)->core.vendor_id == 0x8086280d) || \
  47                                 ((codec)->core.vendor_id == 0x80862800))
  48 #define is_cannonlake(codec) ((codec)->core.vendor_id == 0x8086280c)
  49 #define is_icelake(codec) ((codec)->core.vendor_id == 0x8086280f)
  50 #define is_tigerlake(codec) ((codec)->core.vendor_id == 0x80862812)
  51 #define is_haswell_plus(codec) (is_haswell(codec) || is_broadwell(codec) \
  52                                 || is_skylake(codec) || is_broxton(codec) \
  53                                 || is_kabylake(codec) || is_geminilake(codec) \
  54                                 || is_cannonlake(codec) || is_icelake(codec) \
  55                                 || is_tigerlake(codec))
  56 #define is_valleyview(codec) ((codec)->core.vendor_id == 0x80862882)
  57 #define is_cherryview(codec) ((codec)->core.vendor_id == 0x80862883)
  58 #define is_valleyview_plus(codec) (is_valleyview(codec) || is_cherryview(codec))
  59
  60 static bool enable_acomp = true;
  61 module_param(enable_acomp, bool, 0444);
  62 MODULE_PARM_DESC(enable_acomp, "Enable audio component binding (default=yes)");
  63
  64 struct hdmi_spec_per_cvt {
  65         hda_nid_t cvt_nid;
  66         int assigned;
  67         unsigned int channels_min;
  68         unsigned int channels_max;
  69         u32 rates;
  70         u64 formats;
  71         unsigned int maxbps;
  72 };
  73
  74 /* max. connections to a widget */
  75 #define HDA_MAX_CONNECTIONS     32
  76
  77 struct hdmi_spec_per_pin {
  78         hda_nid_t pin_nid;
  79         int dev_id;
  80         /* pin idx, different device entries on the same pin use the same idx */
  81         int pin_nid_idx;
  82         int num_mux_nids;
  83         hda_nid_t mux_nids[HDA_MAX_CONNECTIONS];
  84         int mux_idx;
  85         hda_nid_t cvt_nid;
  86
  87         struct hda_codec *codec;
  88         struct hdmi_eld sink_eld;
  89         struct mutex lock;
  90         struct delayed_work work;
  91         struct hdmi_pcm *pcm; /* pointer to spec->pcm_rec[n] dynamically*/
  92         int pcm_idx; /* which pcm is attached. -1 means no pcm is attached */
  93         int repoll_count;
  94         bool setup; /* the stream has been set up by prepare callback */
  95         int channels; /* current number of channels */
  96         bool non_pcm;
  97         bool chmap_set;         /* channel-map override by ALSA API? */
  98         unsigned char chmap[8]; /* ALSA API channel-map */
  99 #ifdef CONFIG_SND_PROC_FS
 100         struct snd_info_entry *proc_entry;
 101 #endif
 102 };
 103
 104 /* operations used by generic code that can be overridden by patches */
 105 struct hdmi_ops {
 106         int (*pin_get_eld)(struct hda_codec *codec, hda_nid_t pin_nid,
 107                            unsigned char *buf, int *eld_size);
 108
 109         void (*pin_setup_infoframe)(struct hda_codec *codec, hda_nid_t pin_nid,
 110                                     int ca, int active_channels, int conn_type);
 111
 112         /* enable/disable HBR (HD passthrough) */
 113         int (*pin_hbr_setup)(struct hda_codec *codec, hda_nid_t pin_nid, bool hbr);
 114
 115         int (*setup_stream)(struct hda_codec *codec, hda_nid_t cvt_nid,
 116                             hda_nid_t pin_nid, u32 stream_tag, int format);
 117
 118         void (*pin_cvt_fixup)(struct hda_codec *codec,
 119                               struct hdmi_spec_per_pin *per_pin,
 120                               hda_nid_t cvt_nid);
 121 };
 122
 123 struct hdmi_pcm {
 124         struct hda_pcm *pcm;
 125         struct snd_jack *jack;
 126         struct snd_kcontrol *eld_ctl;
 127 };
 128
 129 struct hdmi_spec {
 130         struct hda_codec *codec;
 131         int num_cvts;
 132         struct snd_array cvts; /* struct hdmi_spec_per_cvt */
 133         hda_nid_t cvt_nids[4]; /* only for haswell fix */
 134
 135         /*
 136          * num_pins is the number of virtual pins
 137          * for example, there are 3 pins, and each pin
 138          * has 4 device entries, then the num_pins is 12
 139          */
 140         int num_pins;
 141         /*
 142          * num_nids is the number of real pins
 143          * In the above example, num_nids is 3
 144          */
 145         int num_nids;
 146         /*
 147          * dev_num is the number of device entries
 148          * on each pin.
 149          * In the above example, dev_num is 4
 150          */
 151         int dev_num;
 152         struct snd_array pins; /* struct hdmi_spec_per_pin */
 153         struct hdmi_pcm pcm_rec[16];
 154         struct mutex pcm_lock;
 155         struct mutex bind_lock; /* for audio component binding */
 156         /* pcm_bitmap means which pcms have been assigned to pins*/
 157         unsigned long pcm_bitmap;
 158         int pcm_used;   /* counter of pcm_rec[] */
 159         /* bitmap shows whether the pcm is opened in user space
 160          * bit 0 means the first playback PCM (PCM3);
 161          * bit 1 means the second playback PCM, and so on.
 162          */
 163         unsigned long pcm_in_use;
 164
 165         struct hdmi_eld temp_eld;
 166         struct hdmi_ops ops;
 167
 168         bool dyn_pin_out;
 169         bool dyn_pcm_assign;
 170         /*
 171          * Non-generic VIA/NVIDIA specific
 172          */
 173         struct hda_multi_out multiout;
 174         struct hda_pcm_stream pcm_playback;
 175
 176         bool use_jack_detect; /* jack detection enabled */
 177         bool use_acomp_notifier; /* use eld_notify callback for hotplug */
 178         bool acomp_registered; /* audio component registered in this driver */
 179         bool force_connect; /* force connectivity */
 180         struct drm_audio_component_audio_ops drm_audio_ops;
 181         int (*port2pin)(struct hda_codec *, int); /* reverse port/pin mapping */
 182
 183         struct hdac_chmap chmap;
 184         hda_nid_t vendor_nid;
 185         const int *port_map;
 186         int port_num;
 187 };
 188
 189 #ifdef CONFIG_SND_HDA_COMPONENT
 190 static inline bool codec_has_acomp(struct hda_codec *codec)
 191 {
 192         struct hdmi_spec *spec = codec->spec;
 193         return spec->use_acomp_notifier;
 194 }
 195 #else
 196 #define codec_has_acomp(codec)  false
 197 #endif
 198
 199 struct hdmi_audio_infoframe {
 200         u8 type; /* 0x84 */
 201         u8 ver;  /* 0x01 */
 202         u8 len;  /* 0x0a */
 203
 204         u8 checksum;
 205
 206         u8 CC02_CT47;   /* CC in bits 0:2, CT in 4:7 */
 207         u8 SS01_SF24;
 208         u8 CXT04;
 209         u8 CA;
 210         u8 LFEPBL01_LSV36_DM_INH7;
 211 };
 212
 213 struct dp_audio_infoframe {
 214         u8 type; /* 0x84 */
 215         u8 len;  /* 0x1b */
 216         u8 ver;  /* 0x11 << 2 */
 217
 218         u8 CC02_CT47;   /* match with HDMI infoframe from this on */
 219         u8 SS01_SF24;
 220         u8 CXT04;
 221         u8 CA;
 222         u8 LFEPBL01_LSV36_DM_INH7;
 223 };
 224
 225 union audio_infoframe {
 226         struct hdmi_audio_infoframe hdmi;
 227         struct dp_audio_infoframe dp;
 228         u8 bytes[0];
 229 };
 230
 231 /*
 232  * HDMI routines
 233  */
 234
 235 #define get_pin(spec, idx) \
 236         ((struct hdmi_spec_per_pin *)snd_array_elem(&spec->pins, idx))
 237 #define get_cvt(spec, idx) \
 238         ((struct hdmi_spec_per_cvt  *)snd_array_elem(&spec->cvts, idx))
 239 /* obtain hdmi_pcm object assigned to idx */
 240 #define get_hdmi_pcm(spec, idx) (&(spec)->pcm_rec[idx])
 241 /* obtain hda_pcm object assigned to idx */
 242 #define get_pcm_rec(spec, idx)  (get_hdmi_pcm(spec, idx)->pcm)
 243
 244 static int pin_id_to_pin_index(struct hda_codec *codec,
 245                                hda_nid_t pin_nid, int dev_id)
 246 {
 247         struct hdmi_spec *spec = codec->spec;
 248         int pin_idx;
 249         struct hdmi_spec_per_pin *per_pin;
 250
 251         /*
 252          * (dev_id == -1) means it is NON-MST pin
 253          * return the first virtual pin on this port
 254          */
 255         if (dev_id == -1)
 256                 dev_id = 0;
 257
 258         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
 259                 per_pin = get_pin(spec, pin_idx);
 260                 if ((per_pin->pin_nid == pin_nid) &&
 261                         (per_pin->dev_id == dev_id))
 262                         return pin_idx;
 263         }
 264
 265         codec_warn(codec, "HDMI: pin nid %d not registered\n", pin_nid);
 266         return -EINVAL;
 267 }
 268
 269 static int hinfo_to_pcm_index(struct hda_codec *codec,
 270                         struct hda_pcm_stream *hinfo)
 271 {
 272         struct hdmi_spec *spec = codec->spec;
 273         int pcm_idx;
 274
 275         for (pcm_idx = 0; pcm_idx < spec->pcm_used; pcm_idx++)
 276                 if (get_pcm_rec(spec, pcm_idx)->stream == hinfo)
 277                         return pcm_idx;
 278
 279         codec_warn(codec, "HDMI: hinfo %p not registered\n", hinfo);
 280         return -EINVAL;
 281 }
 282
 283 static int hinfo_to_pin_index(struct hda_codec *codec,
 284                               struct hda_pcm_stream *hinfo)
 285 {
 286         struct hdmi_spec *spec = codec->spec;
 287         struct hdmi_spec_per_pin *per_pin;
 288         int pin_idx;
 289
 290         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
 291                 per_pin = get_pin(spec, pin_idx);
 292                 if (per_pin->pcm &&
 293                         per_pin->pcm->pcm->stream == hinfo)
 294                         return pin_idx;
 295         }
 296
 297         codec_dbg(codec, "HDMI: hinfo %p not registered\n", hinfo);
 298         return -EINVAL;
 299 }
 300
 301 static struct hdmi_spec_per_pin *pcm_idx_to_pin(struct hdmi_spec *spec,
 302                                                 int pcm_idx)
 303 {
 304         int i;
 305         struct hdmi_spec_per_pin *per_pin;
 306
 307         for (i = 0; i < spec->num_pins; i++) {
 308                 per_pin = get_pin(spec, i);
 309                 if (per_pin->pcm_idx == pcm_idx)
 310                         return per_pin;
 311         }
 312         return NULL;
 313 }
 314
 315 static int cvt_nid_to_cvt_index(struct hda_codec *codec, hda_nid_t cvt_nid)
 316 {
 317         struct hdmi_spec *spec = codec->spec;
 318         int cvt_idx;
 319
 320         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++)
 321                 if (get_cvt(spec, cvt_idx)->cvt_nid == cvt_nid)
 322                         return cvt_idx;
 323
 324         codec_warn(codec, "HDMI: cvt nid %d not registered\n", cvt_nid);
 325         return -EINVAL;
 326 }
 327
 328 static int hdmi_eld_ctl_info(struct snd_kcontrol *kcontrol,
 329                         struct snd_ctl_elem_info *uinfo)
 330 {
 331         struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
 332         struct hdmi_spec *spec = codec->spec;
 333         struct hdmi_spec_per_pin *per_pin;
 334         struct hdmi_eld *eld;
 335         int pcm_idx;
 336
 337         uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
 338
 339         pcm_idx = kcontrol->private_value;
 340         mutex_lock(&spec->pcm_lock);
 341         per_pin = pcm_idx_to_pin(spec, pcm_idx);
 342         if (!per_pin) {
 343                 /* no pin is bound to the pcm */
 344                 uinfo->count = 0;
 345                 goto unlock;
 346         }
 347         eld = &per_pin->sink_eld;
 348         uinfo->count = eld->eld_valid ? eld->eld_size : 0;
 349
 350  unlock:
 351         mutex_unlock(&spec->pcm_lock);
 352         return 0;
 353 }
 354
 355 static int hdmi_eld_ctl_get(struct snd_kcontrol *kcontrol,
 356                         struct snd_ctl_elem_value *ucontrol)
 357 {
 358         struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
 359         struct hdmi_spec *spec = codec->spec;
 360         struct hdmi_spec_per_pin *per_pin;
 361         struct hdmi_eld *eld;
 362         int pcm_idx;
 363         int err = 0;
 364
 365         pcm_idx = kcontrol->private_value;
 366         mutex_lock(&spec->pcm_lock);
 367         per_pin = pcm_idx_to_pin(spec, pcm_idx);
 368         if (!per_pin) {
 369                 /* no pin is bound to the pcm */
 370                 memset(ucontrol->value.bytes.data, 0,
 371                        ARRAY_SIZE(ucontrol->value.bytes.data));
 372                 goto unlock;
 373         }
 374
 375         eld = &per_pin->sink_eld;
 376         if (eld->eld_size > ARRAY_SIZE(ucontrol->value.bytes.data) ||
 377             eld->eld_size > ELD_MAX_SIZE) {
 378                 snd_BUG();
 379                 err = -EINVAL;
 380                 goto unlock;
 381         }
 382
 383         memset(ucontrol->value.bytes.data, 0,
 384                ARRAY_SIZE(ucontrol->value.bytes.data));
 385         if (eld->eld_valid)
 386                 memcpy(ucontrol->value.bytes.data, eld->eld_buffer,
 387                        eld->eld_size);
 388
 389  unlock:
 390         mutex_unlock(&spec->pcm_lock);
 391         return err;
 392 }
 393
 394 static const struct snd_kcontrol_new eld_bytes_ctl = {
 395         .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
 396         .iface = SNDRV_CTL_ELEM_IFACE_PCM,
 397         .name = "ELD",
 398         .info = hdmi_eld_ctl_info,
 399         .get = hdmi_eld_ctl_get,
 400 };
 401
 402 static int hdmi_create_eld_ctl(struct hda_codec *codec, int pcm_idx,
 403                         int device)
 404 {
 405         struct snd_kcontrol *kctl;
 406         struct hdmi_spec *spec = codec->spec;
 407         int err;
 408
 409         kctl = snd_ctl_new1(&eld_bytes_ctl, codec);
 410         if (!kctl)
 411                 return -ENOMEM;
 412         kctl->private_value = pcm_idx;
 413         kctl->id.device = device;
 414
 415         /* no pin nid is associated with the kctl now
 416          * tbd: associate pin nid to eld ctl later
 417          */
 418         err = snd_hda_ctl_add(codec, 0, kctl);
 419         if (err < 0)
 420                 return err;
 421
 422         get_hdmi_pcm(spec, pcm_idx)->eld_ctl = kctl;
 423         return 0;
 424 }
 425
 426 #ifdef BE_PARANOID
 427 static void hdmi_get_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
 428                                 int *packet_index, int *byte_index)
 429 {
 430         int val;
 431
 432         val = snd_hda_codec_read(codec, pin_nid, 0,
 433                                  AC_VERB_GET_HDMI_DIP_INDEX, 0);
 434
 435         *packet_index = val >> 5;
 436         *byte_index = val & 0x1f;
 437 }
 438 #endif
 439
 440 static void hdmi_set_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
 441                                 int packet_index, int byte_index)
 442 {
 443         int val;
 444
 445         val = (packet_index << 5) | (byte_index & 0x1f);
 446
 447         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_INDEX, val);
 448 }
 449
 450 static void hdmi_write_dip_byte(struct hda_codec *codec, hda_nid_t pin_nid,
 451                                 unsigned char val)
 452 {
 453         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_DATA, val);
 454 }
 455
 456 static void hdmi_init_pin(struct hda_codec *codec, hda_nid_t pin_nid)
 457 {
 458         struct hdmi_spec *spec = codec->spec;
 459         int pin_out;
 460
 461         /* Unmute */
 462         if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP)
 463                 snd_hda_codec_write(codec, pin_nid, 0,
 464                                 AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE);
 465
 466         if (spec->dyn_pin_out)
 467                 /* Disable pin out until stream is active */
 468                 pin_out = 0;
 469         else
 470                 /* Enable pin out: some machines with GM965 gets broken output
 471                  * when the pin is disabled or changed while using with HDMI
 472                  */
 473                 pin_out = PIN_OUT;
 474
 475         snd_hda_codec_write(codec, pin_nid, 0,
 476                             AC_VERB_SET_PIN_WIDGET_CONTROL, pin_out);
 477 }
 478
 479 /*
 480  * ELD proc files
 481  */
 482
 483 #ifdef CONFIG_SND_PROC_FS
 484 static void print_eld_info(struct snd_info_entry *entry,
 485                            struct snd_info_buffer *buffer)
 486 {
 487         struct hdmi_spec_per_pin *per_pin = entry->private_data;
 488
 489         mutex_lock(&per_pin->lock);
 490         snd_hdmi_print_eld_info(&per_pin->sink_eld, buffer);
 491         mutex_unlock(&per_pin->lock);
 492 }
 493
 494 static void write_eld_info(struct snd_info_entry *entry,
 495                            struct snd_info_buffer *buffer)
 496 {
 497         struct hdmi_spec_per_pin *per_pin = entry->private_data;
 498
 499         mutex_lock(&per_pin->lock);
 500         snd_hdmi_write_eld_info(&per_pin->sink_eld, buffer);
 501         mutex_unlock(&per_pin->lock);
 502 }
 503
 504 static int eld_proc_new(struct hdmi_spec_per_pin *per_pin, int index)
 505 {
 506         char name[32];
 507         struct hda_codec *codec = per_pin->codec;
 508         struct snd_info_entry *entry;
 509         int err;
 510
 511         snprintf(name, sizeof(name), "eld#%d.%d", codec->addr, index);
 512         err = snd_card_proc_new(codec->card, name, &entry);
 513         if (err < 0)
 514                 return err;
 515
 516         snd_info_set_text_ops(entry, per_pin, print_eld_info);
 517         entry->c.text.write = write_eld_info;
 518         entry->mode |= 0200;
 519         per_pin->proc_entry = entry;
 520
 521         return 0;
 522 }
 523
 524 static void eld_proc_free(struct hdmi_spec_per_pin *per_pin)
 525 {
 526         if (!per_pin->codec->bus->shutdown) {
 527                 snd_info_free_entry(per_pin->proc_entry);
 528                 per_pin->proc_entry = NULL;
 529         }
 530 }
 531 #else
 532 static inline int eld_proc_new(struct hdmi_spec_per_pin *per_pin,
 533                                int index)
 534 {
 535         return 0;
 536 }
 537 static inline void eld_proc_free(struct hdmi_spec_per_pin *per_pin)
 538 {
 539 }
 540 #endif
 541
 542 /*
 543  * Audio InfoFrame routines
 544  */
 545
 546 /*
 547  * Enable Audio InfoFrame Transmission
 548  */
 549 static void hdmi_start_infoframe_trans(struct hda_codec *codec,
 550                                        hda_nid_t pin_nid)
 551 {
 552         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 553         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
 554                                                 AC_DIPXMIT_BEST);
 555 }
 556
 557 /*
 558  * Disable Audio InfoFrame Transmission
 559  */
 560 static void hdmi_stop_infoframe_trans(struct hda_codec *codec,
 561                                       hda_nid_t pin_nid)
 562 {
 563         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 564         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
 565                                                 AC_DIPXMIT_DISABLE);
 566 }
 567
 568 static void hdmi_debug_dip_size(struct hda_codec *codec, hda_nid_t pin_nid)
 569 {
 570 #ifdef CONFIG_SND_DEBUG_VERBOSE
 571         int i;
 572         int size;
 573
 574         size = snd_hdmi_get_eld_size(codec, pin_nid);
 575         codec_dbg(codec, "HDMI: ELD buf size is %d\n", size);
 576
 577         for (i = 0; i < 8; i++) {
 578                 size = snd_hda_codec_read(codec, pin_nid, 0,
 579                                                 AC_VERB_GET_HDMI_DIP_SIZE, i);
 580                 codec_dbg(codec, "HDMI: DIP GP[%d] buf size is %d\n", i, size);
 581         }
 582 #endif
 583 }
 584
 585 static void hdmi_clear_dip_buffers(struct hda_codec *codec, hda_nid_t pin_nid)
 586 {
 587 #ifdef BE_PARANOID
 588         int i, j;
 589         int size;
 590         int pi, bi;
 591         for (i = 0; i < 8; i++) {
 592                 size = snd_hda_codec_read(codec, pin_nid, 0,
 593                                                 AC_VERB_GET_HDMI_DIP_SIZE, i);
 594                 if (size == 0)
 595                         continue;
 596
 597                 hdmi_set_dip_index(codec, pin_nid, i, 0x0);
 598                 for (j = 1; j < 1000; j++) {
 599                         hdmi_write_dip_byte(codec, pin_nid, 0x0);
 600                         hdmi_get_dip_index(codec, pin_nid, &pi, &bi);
 601                         if (pi != i)
 602                                 codec_dbg(codec, "dip index %d: %d != %d\n",
 603                                                 bi, pi, i);
 604                         if (bi == 0) /* byte index wrapped around */
 605                                 break;
 606                 }
 607                 codec_dbg(codec,
 608                         "HDMI: DIP GP[%d] buf reported size=%d, written=%d\n",
 609                         i, size, j);
 610         }
 611 #endif
 612 }
 613
 614 static void hdmi_checksum_audio_infoframe(struct hdmi_audio_infoframe *hdmi_ai)
 615 {
 616         u8 *bytes = (u8 *)hdmi_ai;
 617         u8 sum = 0;
 618         int i;
 619
 620         hdmi_ai->checksum = 0;
 621
 622         for (i = 0; i < sizeof(*hdmi_ai); i++)
 623                 sum += bytes[i];
 624
 625         hdmi_ai->checksum = -sum;
 626 }
 627
 628 static void hdmi_fill_audio_infoframe(struct hda_codec *codec,
 629                                       hda_nid_t pin_nid,
 630                                       u8 *dip, int size)
 631 {
 632         int i;
 633
 634         hdmi_debug_dip_size(codec, pin_nid);
 635         hdmi_clear_dip_buffers(codec, pin_nid); /* be paranoid */
 636
 637         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 638         for (i = 0; i < size; i++)
 639                 hdmi_write_dip_byte(codec, pin_nid, dip[i]);
 640 }
 641
 642 static bool hdmi_infoframe_uptodate(struct hda_codec *codec, hda_nid_t pin_nid,
 643                                     u8 *dip, int size)
 644 {
 645         u8 val;
 646         int i;
 647
 648         if (snd_hda_codec_read(codec, pin_nid, 0, AC_VERB_GET_HDMI_DIP_XMIT, 0)
 649                                                             != AC_DIPXMIT_BEST)
 650                 return false;
 651
 652         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 653         for (i = 0; i < size; i++) {
 654                 val = snd_hda_codec_read(codec, pin_nid, 0,
 655                                          AC_VERB_GET_HDMI_DIP_DATA, 0);
 656                 if (val != dip[i])
 657                         return false;
 658         }
 659
 660         return true;
 661 }
 662
 663 static void hdmi_pin_setup_infoframe(struct hda_codec *codec,
 664                                      hda_nid_t pin_nid,
 665                                      int ca, int active_channels,
 666                                      int conn_type)
 667 {
 668         union audio_infoframe ai;
 669
 670         memset(&ai, 0, sizeof(ai));
 671         if (conn_type == 0) { /* HDMI */
 672                 struct hdmi_audio_infoframe *hdmi_ai = &ai.hdmi;
 673
 674                 hdmi_ai->type           = 0x84;
 675                 hdmi_ai->ver            = 0x01;
 676                 hdmi_ai->len            = 0x0a;
 677                 hdmi_ai->CC02_CT47      = active_channels - 1;
 678                 hdmi_ai->CA             = ca;
 679                 hdmi_checksum_audio_infoframe(hdmi_ai);
 680         } else if (conn_type == 1) { /* DisplayPort */
 681                 struct dp_audio_infoframe *dp_ai = &ai.dp;
 682
 683                 dp_ai->type             = 0x84;
 684                 dp_ai->len              = 0x1b;
 685                 dp_ai->ver              = 0x11 << 2;
 686                 dp_ai->CC02_CT47        = active_channels - 1;
 687                 dp_ai->CA               = ca;
 688         } else {
 689                 codec_dbg(codec, "HDMI: unknown connection type at pin %d\n",
 690                             pin_nid);
 691                 return;
 692         }
 693
 694         /*
 695          * sizeof(ai) is used instead of sizeof(*hdmi_ai) or
 696          * sizeof(*dp_ai) to avoid partial match/update problems when
 697          * the user switches between HDMI/DP monitors.
 698          */
 699         if (!hdmi_infoframe_uptodate(codec, pin_nid, ai.bytes,
 700                                         sizeof(ai))) {
 701                 codec_dbg(codec,
 702                           "hdmi_pin_setup_infoframe: pin=%d channels=%d ca=0x%02x\n",
 703                             pin_nid,
 704                             active_channels, ca);
 705                 hdmi_stop_infoframe_trans(codec, pin_nid);
 706                 hdmi_fill_audio_infoframe(codec, pin_nid,
 707                                             ai.bytes, sizeof(ai));
 708                 hdmi_start_infoframe_trans(codec, pin_nid);
 709         }
 710 }
 711
 712 static void hdmi_setup_audio_infoframe(struct hda_codec *codec,
 713                                        struct hdmi_spec_per_pin *per_pin,
 714                                        bool non_pcm)
 715 {
 716         struct hdmi_spec *spec = codec->spec;
 717         struct hdac_chmap *chmap = &spec->chmap;
 718         hda_nid_t pin_nid = per_pin->pin_nid;
 719         int channels = per_pin->channels;
 720         int active_channels;
 721         struct hdmi_eld *eld;
 722         int ca;
 723
 724         if (!channels)
 725                 return;
 726
 727         /* some HW (e.g. HSW+) needs reprogramming the amp at each time */
 728         if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP)
 729                 snd_hda_codec_write(codec, pin_nid, 0,
 730                                             AC_VERB_SET_AMP_GAIN_MUTE,
 731                                             AMP_OUT_UNMUTE);
 732
 733         eld = &per_pin->sink_eld;
 734
 735         ca = snd_hdac_channel_allocation(&codec->core,
 736                         eld->info.spk_alloc, channels,
 737                         per_pin->chmap_set, non_pcm, per_pin->chmap);
 738
 739         active_channels = snd_hdac_get_active_channels(ca);
 740
 741         chmap->ops.set_channel_count(&codec->core, per_pin->cvt_nid,
 742                                                 active_channels);
 743
 744         /*
 745          * always configure channel mapping, it may have been changed by the
 746          * user in the meantime
 747          */
 748         snd_hdac_setup_channel_mapping(&spec->chmap,
 749                                 pin_nid, non_pcm, ca, channels,
 750                                 per_pin->chmap, per_pin->chmap_set);
 751
 752         spec->ops.pin_setup_infoframe(codec, pin_nid, ca, active_channels,
 753                                       eld->info.conn_type);
 754
 755         per_pin->non_pcm = non_pcm;
 756 }
 757
 758 /*
 759  * Unsolicited events
 760  */
 761
 762 static bool hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll);
 763
 764 static void check_presence_and_report(struct hda_codec *codec, hda_nid_t nid,
 765                                       int dev_id)
 766 {
 767         struct hdmi_spec *spec = codec->spec;
 768         int pin_idx = pin_id_to_pin_index(codec, nid, dev_id);
 769
 770         if (pin_idx < 0)
 771                 return;
 772         mutex_lock(&spec->pcm_lock);
 773         if (hdmi_present_sense(get_pin(spec, pin_idx), 1))
 774                 snd_hda_jack_report_sync(codec);
 775         mutex_unlock(&spec->pcm_lock);
 776 }
 777
 778 static void jack_callback(struct hda_codec *codec,
 779                           struct hda_jack_callback *jack)
 780 {
 781         /* stop polling when notification is enabled */
 782         if (codec_has_acomp(codec))
 783                 return;
 784
 785         /* hda_jack don't support DP MST */
 786         check_presence_and_report(codec, jack->nid, 0);
 787 }
 788
 789 static void hdmi_intrinsic_event(struct hda_codec *codec, unsigned int res)
 790 {
 791         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
 792         struct hda_jack_tbl *jack;
 793         int dev_entry = (res & AC_UNSOL_RES_DE) >> AC_UNSOL_RES_DE_SHIFT;
 794
 795         /*
 796          * assume DP MST uses dyn_pcm_assign and acomp and
 797          * never comes here
 798          * if DP MST supports unsol event, below code need
 799          * consider dev_entry
 800          */
 801         jack = snd_hda_jack_tbl_get_from_tag(codec, tag);
 802         if (!jack)
 803                 return;
 804         jack->jack_dirty = 1;
 805
 806         codec_dbg(codec,
 807                 "HDMI hot plug event: Codec=%d Pin=%d Device=%d Inactive=%d Presence_Detect=%d ELD_Valid=%d\n",
 808                 codec->addr, jack->nid, dev_entry, !!(res & AC_UNSOL_RES_IA),
 809                 !!(res & AC_UNSOL_RES_PD), !!(res & AC_UNSOL_RES_ELDV));
 810
 811         /* hda_jack don't support DP MST */
 812         check_presence_and_report(codec, jack->nid, 0);
 813 }
 814
 815 static void hdmi_non_intrinsic_event(struct hda_codec *codec, unsigned int res)
 816 {
 817         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
 818         int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
 819         int cp_state = !!(res & AC_UNSOL_RES_CP_STATE);
 820         int cp_ready = !!(res & AC_UNSOL_RES_CP_READY);
 821
 822         codec_info(codec,
 823                 "HDMI CP event: CODEC=%d TAG=%d SUBTAG=0x%x CP_STATE=%d CP_READY=%d\n",
 824                 codec->addr,
 825                 tag,
 826                 subtag,
 827                 cp_state,
 828                 cp_ready);
 829
 830         /* TODO */
 831         if (cp_state)
 832                 ;
 833         if (cp_ready)
 834                 ;
 835 }
 836
 837
 838 static void hdmi_unsol_event(struct hda_codec *codec, unsigned int res)
 839 {
 840         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
 841         int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
 842
 843         if (codec_has_acomp(codec))
 844                 return;
 845
 846         if (!snd_hda_jack_tbl_get_from_tag(codec, tag)) {
 847                 codec_dbg(codec, "Unexpected HDMI event tag 0x%x\n", tag);
 848                 return;
 849         }
 850
 851         if (subtag == 0)
 852                 hdmi_intrinsic_event(codec, res);
 853         else
 854                 hdmi_non_intrinsic_event(codec, res);
 855 }
 856
 857 static void haswell_verify_D0(struct hda_codec *codec,
 858                 hda_nid_t cvt_nid, hda_nid_t nid)
 859 {
 860         int pwr;
 861
 862         /* For Haswell, the converter 1/2 may keep in D3 state after bootup,
 863          * thus pins could only choose converter 0 for use. Make sure the
 864          * converters are in correct power state */
 865         if (!snd_hda_check_power_state(codec, cvt_nid, AC_PWRST_D0))
 866                 snd_hda_codec_write(codec, cvt_nid, 0, AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
 867
 868         if (!snd_hda_check_power_state(codec, nid, AC_PWRST_D0)) {
 869                 snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_POWER_STATE,
 870                                     AC_PWRST_D0);
 871                 msleep(40);
 872                 pwr = snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_POWER_STATE, 0);
 873                 pwr = (pwr & AC_PWRST_ACTUAL) >> AC_PWRST_ACTUAL_SHIFT;
 874                 codec_dbg(codec, "Haswell HDMI audio: Power for pin 0x%x is now D%d\n", nid, pwr);
 875         }
 876 }
 877
 878 /*
 879  * Callbacks
 880  */
 881
 882 /* HBR should be Non-PCM, 8 channels */
 883 #define is_hbr_format(format) \
 884         ((format & AC_FMT_TYPE_NON_PCM) && (format & AC_FMT_CHAN_MASK) == 7)
 885
 886 static int hdmi_pin_hbr_setup(struct hda_codec *codec, hda_nid_t pin_nid,
 887                               bool hbr)
 888 {
 889         int pinctl, new_pinctl;
 890
 891         if (snd_hda_query_pin_caps(codec, pin_nid) & AC_PINCAP_HBR) {
 892                 pinctl = snd_hda_codec_read(codec, pin_nid, 0,
 893                                             AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
 894
 895                 if (pinctl < 0)
 896                         return hbr ? -EINVAL : 0;
 897
 898                 new_pinctl = pinctl & ~AC_PINCTL_EPT;
 899                 if (hbr)
 900                         new_pinctl |= AC_PINCTL_EPT_HBR;
 901                 else
 902                         new_pinctl |= AC_PINCTL_EPT_NATIVE;
 903
 904                 codec_dbg(codec,
 905                           "hdmi_pin_hbr_setup: NID=0x%x, %spinctl=0x%x\n",
 906                             pin_nid,
 907                             pinctl == new_pinctl ? "" : "new-",
 908                             new_pinctl);
 909
 910                 if (pinctl != new_pinctl)
 911                         snd_hda_codec_write(codec, pin_nid, 0,
 912                                             AC_VERB_SET_PIN_WIDGET_CONTROL,
 913                                             new_pinctl);
 914         } else if (hbr)
 915                 return -EINVAL;
 916
 917         return 0;
 918 }
 919
 920 static int hdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
 921                               hda_nid_t pin_nid, u32 stream_tag, int format)
 922 {
 923         struct hdmi_spec *spec = codec->spec;
 924         unsigned int param;
 925         int err;
 926
 927         err = spec->ops.pin_hbr_setup(codec, pin_nid, is_hbr_format(format));
 928
 929         if (err) {
 930                 codec_dbg(codec, "hdmi_setup_stream: HBR is not supported\n");
 931                 return err;
 932         }
 933
 934         if (is_haswell_plus(codec)) {
 935
 936                 /*
 937                  * on recent platforms IEC Coding Type is required for HBR
 938                  * support, read current Digital Converter settings and set
 939                  * ICT bitfield if needed.
 940                  */
 941                 param = snd_hda_codec_read(codec, cvt_nid, 0,
 942                                            AC_VERB_GET_DIGI_CONVERT_1, 0);
 943
 944                 param = (param >> 16) & ~(AC_DIG3_ICT);
 945
 946                 /* on recent platforms ICT mode is required for HBR support */
 947                 if (is_hbr_format(format))
 948                         param |= 0x1;
 949
 950                 snd_hda_codec_write(codec, cvt_nid, 0,
 951                                     AC_VERB_SET_DIGI_CONVERT_3, param);
 952         }
 953
 954         snd_hda_codec_setup_stream(codec, cvt_nid, stream_tag, 0, format);
 955         return 0;
 956 }
 957
 958 /* Try to find an available converter
 959  * If pin_idx is less then zero, just try to find an available converter.
 960  * Otherwise, try to find an available converter and get the cvt mux index
 961  * of the pin.
 962  */
 963 static int hdmi_choose_cvt(struct hda_codec *codec,
 964                            int pin_idx, int *cvt_id)
 965 {
 966         struct hdmi_spec *spec = codec->spec;
 967         struct hdmi_spec_per_pin *per_pin;
 968         struct hdmi_spec_per_cvt *per_cvt = NULL;
 969         int cvt_idx, mux_idx = 0;
 970
 971         /* pin_idx < 0 means no pin will be bound to the converter */
 972         if (pin_idx < 0)
 973                 per_pin = NULL;
 974         else
 975                 per_pin = get_pin(spec, pin_idx);
 976
 977         /* Dynamically assign converter to stream */
 978         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
 979                 per_cvt = get_cvt(spec, cvt_idx);
 980
 981                 /* Must not already be assigned */
 982                 if (per_cvt->assigned)
 983                         continue;
 984                 if (per_pin == NULL)
 985                         break;
 986                 /* Must be in pin's mux's list of converters */
 987                 for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++)
 988                         if (per_pin->mux_nids[mux_idx] == per_cvt->cvt_nid)
 989                                 break;
 990                 /* Not in mux list */
 991                 if (mux_idx == per_pin->num_mux_nids)
 992                         continue;
 993                 break;
 994         }
 995
 996         /* No free converters */
 997         if (cvt_idx == spec->num_cvts)
 998                 return -EBUSY;
 999
1000         if (per_pin != NULL)
1001                 per_pin->mux_idx = mux_idx;
1002
1003         if (cvt_id)
1004                 *cvt_id = cvt_idx;
1005
1006         return 0;
1007 }
1008
1009 /* Assure the pin select the right convetor */
1010 static void intel_verify_pin_cvt_connect(struct hda_codec *codec,
1011                         struct hdmi_spec_per_pin *per_pin)
1012 {
1013         hda_nid_t pin_nid = per_pin->pin_nid;
1014         int mux_idx, curr;
1015
1016         mux_idx = per_pin->mux_idx;
1017         curr = snd_hda_codec_read(codec, pin_nid, 0,
1018                                           AC_VERB_GET_CONNECT_SEL, 0);
1019         if (curr != mux_idx)
1020                 snd_hda_codec_write_cache(codec, pin_nid, 0,
1021                                             AC_VERB_SET_CONNECT_SEL,
1022                                             mux_idx);
1023 }
1024
1025 /* get the mux index for the converter of the pins
1026  * converter's mux index is the same for all pins on Intel platform
1027  */
1028 static int intel_cvt_id_to_mux_idx(struct hdmi_spec *spec,
1029                         hda_nid_t cvt_nid)
1030 {
1031         int i;
1032
1033         for (i = 0; i < spec->num_cvts; i++)
1034                 if (spec->cvt_nids[i] == cvt_nid)
1035                         return i;
1036         return -EINVAL;
1037 }
1038
1039 /* Intel HDMI workaround to fix audio routing issue:
1040  * For some Intel display codecs, pins share the same connection list.
1041  * So a conveter can be selected by multiple pins and playback on any of these
1042  * pins will generate sound on the external display, because audio flows from
1043  * the same converter to the display pipeline. Also muting one pin may make
1044  * other pins have no sound output.
1045  * So this function assures that an assigned converter for a pin is not selected
1046  * by any other pins.
1047  */
1048 static void intel_not_share_assigned_cvt(struct hda_codec *codec,
1049                                          hda_nid_t pin_nid,
1050                                          int dev_id, int mux_idx)
1051 {
1052         struct hdmi_spec *spec = codec->spec;
1053         hda_nid_t nid;
1054         int cvt_idx, curr;
1055         struct hdmi_spec_per_cvt *per_cvt;
1056         struct hdmi_spec_per_pin *per_pin;
1057         int pin_idx;
1058
1059         /* configure the pins connections */
1060         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1061                 int dev_id_saved;
1062                 int dev_num;
1063
1064                 per_pin = get_pin(spec, pin_idx);
1065                 /*
1066                  * pin not connected to monitor
1067                  * no need to operate on it
1068                  */
1069                 if (!per_pin->pcm)
1070                         continue;
1071
1072                 if ((per_pin->pin_nid == pin_nid) &&
1073                         (per_pin->dev_id == dev_id))
1074                         continue;
1075
1076                 /*
1077                  * if per_pin->dev_id >= dev_num,
1078                  * snd_hda_get_dev_select() will fail,
1079                  * and the following operation is unpredictable.
1080                  * So skip this situation.
1081                  */
1082                 dev_num = snd_hda_get_num_devices(codec, per_pin->pin_nid) + 1;
1083                 if (per_pin->dev_id >= dev_num)
1084                         continue;
1085
1086                 nid = per_pin->pin_nid;
1087
1088                 /*
1089                  * Calling this function should not impact
1090                  * on the device entry selection
1091                  * So let's save the dev id for each pin,
1092                  * and restore it when return
1093                  */
1094                 dev_id_saved = snd_hda_get_dev_select(codec, nid);
1095                 snd_hda_set_dev_select(codec, nid, per_pin->dev_id);
1096                 curr = snd_hda_codec_read(codec, nid, 0,
1097                                           AC_VERB_GET_CONNECT_SEL, 0);
1098                 if (curr != mux_idx) {
1099                         snd_hda_set_dev_select(codec, nid, dev_id_saved);
1100                         continue;
1101                 }
1102
1103
1104                 /* choose an unassigned converter. The conveters in the
1105                  * connection list are in the same order as in the codec.
1106                  */
1107                 for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
1108                         per_cvt = get_cvt(spec, cvt_idx);
1109                         if (!per_cvt->assigned) {
1110                                 codec_dbg(codec,
1111                                           "choose cvt %d for pin nid %d\n",
1112                                         cvt_idx, nid);
1113                                 snd_hda_codec_write_cache(codec, nid, 0,
1114                                             AC_VERB_SET_CONNECT_SEL,
1115                                             cvt_idx);
1116                                 break;
1117                         }
1118                 }
1119                 snd_hda_set_dev_select(codec, nid, dev_id_saved);
1120         }
1121 }
1122
1123 /* A wrapper of intel_not_share_asigned_cvt() */
1124 static void intel_not_share_assigned_cvt_nid(struct hda_codec *codec,
1125                         hda_nid_t pin_nid, int dev_id, hda_nid_t cvt_nid)
1126 {
1127         int mux_idx;
1128         struct hdmi_spec *spec = codec->spec;
1129
1130         /* On Intel platform, the mapping of converter nid to
1131          * mux index of the pins are always the same.
1132          * The pin nid may be 0, this means all pins will not
1133          * share the converter.
1134          */
1135         mux_idx = intel_cvt_id_to_mux_idx(spec, cvt_nid);
1136         if (mux_idx >= 0)
1137                 intel_not_share_assigned_cvt(codec, pin_nid, dev_id, mux_idx);
1138 }
1139
1140 /* skeleton caller of pin_cvt_fixup ops */
1141 static void pin_cvt_fixup(struct hda_codec *codec,
1142                           struct hdmi_spec_per_pin *per_pin,
1143                           hda_nid_t cvt_nid)
1144 {
1145         struct hdmi_spec *spec = codec->spec;
1146
1147         if (spec->ops.pin_cvt_fixup)
1148                 spec->ops.pin_cvt_fixup(codec, per_pin, cvt_nid);
1149 }
1150
1151 /* called in hdmi_pcm_open when no pin is assigned to the PCM
1152  * in dyn_pcm_assign mode.
1153  */
1154 static int hdmi_pcm_open_no_pin(struct hda_pcm_stream *hinfo,
1155                          struct hda_codec *codec,
1156                          struct snd_pcm_substream *substream)
1157 {
1158         struct hdmi_spec *spec = codec->spec;
1159         struct snd_pcm_runtime *runtime = substream->runtime;
1160         int cvt_idx, pcm_idx;
1161         struct hdmi_spec_per_cvt *per_cvt = NULL;
1162         int err;
1163
1164         pcm_idx = hinfo_to_pcm_index(codec, hinfo);
1165         if (pcm_idx < 0)
1166                 return -EINVAL;
1167
1168         err = hdmi_choose_cvt(codec, -1, &cvt_idx);
1169         if (err)
1170                 return err;
1171
1172         per_cvt = get_cvt(spec, cvt_idx);
1173         per_cvt->assigned = 1;
1174         hinfo->nid = per_cvt->cvt_nid;
1175
1176         pin_cvt_fixup(codec, NULL, per_cvt->cvt_nid);
1177
1178         set_bit(pcm_idx, &spec->pcm_in_use);
1179         /* todo: setup spdif ctls assign */
1180
1181         /* Initially set the converter's capabilities */
1182         hinfo->channels_min = per_cvt->channels_min;
1183         hinfo->channels_max = per_cvt->channels_max;
1184         hinfo->rates = per_cvt->rates;
1185         hinfo->formats = per_cvt->formats;
1186         hinfo->maxbps = per_cvt->maxbps;
1187
1188         /* Store the updated parameters */
1189         runtime->hw.channels_min = hinfo->channels_min;
1190         runtime->hw.channels_max = hinfo->channels_max;
1191         runtime->hw.formats = hinfo->formats;
1192         runtime->hw.rates = hinfo->rates;
1193
1194         snd_pcm_hw_constraint_step(substream->runtime, 0,
1195                                    SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1196         return 0;
1197 }
1198
1199 /*
1200  * HDA PCM callbacks
1201  */
1202 static int hdmi_pcm_open(struct hda_pcm_stream *hinfo,
1203                          struct hda_codec *codec,
1204                          struct snd_pcm_substream *substream)
1205 {
1206         struct hdmi_spec *spec = codec->spec;
1207         struct snd_pcm_runtime *runtime = substream->runtime;
1208         int pin_idx, cvt_idx, pcm_idx;
1209         struct hdmi_spec_per_pin *per_pin;
1210         struct hdmi_eld *eld;
1211         struct hdmi_spec_per_cvt *per_cvt = NULL;
1212         int err;
1213
1214         /* Validate hinfo */
1215         pcm_idx = hinfo_to_pcm_index(codec, hinfo);
1216         if (pcm_idx < 0)
1217                 return -EINVAL;
1218
1219         mutex_lock(&spec->pcm_lock);
1220         pin_idx = hinfo_to_pin_index(codec, hinfo);
1221         if (!spec->dyn_pcm_assign) {
1222                 if (snd_BUG_ON(pin_idx < 0)) {
1223                         err = -EINVAL;
1224                         goto unlock;
1225                 }
1226         } else {
1227                 /* no pin is assigned to the PCM
1228                  * PA need pcm open successfully when probe
1229                  */
1230                 if (pin_idx < 0) {
1231                         err = hdmi_pcm_open_no_pin(hinfo, codec, substream);
1232                         goto unlock;
1233                 }
1234         }
1235
1236         err = hdmi_choose_cvt(codec, pin_idx, &cvt_idx);
1237         if (err < 0)
1238                 goto unlock;
1239
1240         per_cvt = get_cvt(spec, cvt_idx);
1241         /* Claim converter */
1242         per_cvt->assigned = 1;
1243
1244         set_bit(pcm_idx, &spec->pcm_in_use);
1245         per_pin = get_pin(spec, pin_idx);
1246         per_pin->cvt_nid = per_cvt->cvt_nid;
1247         hinfo->nid = per_cvt->cvt_nid;
1248
1249         /* flip stripe flag for the assigned stream if supported */
1250         if (get_wcaps(codec, per_cvt->cvt_nid) & AC_WCAP_STRIPE)
1251                 azx_stream(get_azx_dev(substream))->stripe = 1;
1252
1253         snd_hda_set_dev_select(codec, per_pin->pin_nid, per_pin->dev_id);
1254         snd_hda_codec_write_cache(codec, per_pin->pin_nid, 0,
1255                             AC_VERB_SET_CONNECT_SEL,
1256                             per_pin->mux_idx);
1257
1258         /* configure unused pins to choose other converters */
1259         pin_cvt_fixup(codec, per_pin, 0);
1260
1261         snd_hda_spdif_ctls_assign(codec, pcm_idx, per_cvt->cvt_nid);
1262
1263         /* Initially set the converter's capabilities */
1264         hinfo->channels_min = per_cvt->channels_min;
1265         hinfo->channels_max = per_cvt->channels_max;
1266         hinfo->rates = per_cvt->rates;
1267         hinfo->formats = per_cvt->formats;
1268         hinfo->maxbps = per_cvt->maxbps;
1269
1270         eld = &per_pin->sink_eld;
1271         /* Restrict capabilities by ELD if this isn't disabled */
1272         if (!static_hdmi_pcm && eld->eld_valid) {
1273                 snd_hdmi_eld_update_pcm_info(&eld->info, hinfo);
1274                 if (hinfo->channels_min > hinfo->channels_max ||
1275                     !hinfo->rates || !hinfo->formats) {
1276                         per_cvt->assigned = 0;
1277                         hinfo->nid = 0;
1278                         snd_hda_spdif_ctls_unassign(codec, pcm_idx);
1279                         err = -ENODEV;
1280                         goto unlock;
1281                 }
1282         }
1283
1284         /* Store the updated parameters */
1285         runtime->hw.channels_min = hinfo->channels_min;
1286         runtime->hw.channels_max = hinfo->channels_max;
1287         runtime->hw.formats = hinfo->formats;
1288         runtime->hw.rates = hinfo->rates;
1289
1290         snd_pcm_hw_constraint_step(substream->runtime, 0,
1291                                    SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1292  unlock:
1293         mutex_unlock(&spec->pcm_lock);
1294         return err;
1295 }
1296
1297 /*
1298  * HDA/HDMI auto parsing
1299  */
1300 static int hdmi_read_pin_conn(struct hda_codec *codec, int pin_idx)
1301 {
1302         struct hdmi_spec *spec = codec->spec;
1303         struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1304         hda_nid_t pin_nid = per_pin->pin_nid;
1305
1306         if (!(get_wcaps(codec, pin_nid) & AC_WCAP_CONN_LIST)) {
1307                 codec_warn(codec,
1308                            "HDMI: pin %d wcaps %#x does not support connection list\n",
1309                            pin_nid, get_wcaps(codec, pin_nid));
1310                 return -EINVAL;
1311         }
1312
1313         /* all the device entries on the same pin have the same conn list */
1314         per_pin->num_mux_nids = snd_hda_get_connections(codec, pin_nid,
1315                                                         per_pin->mux_nids,
1316                                                         HDA_MAX_CONNECTIONS);
1317
1318         return 0;
1319 }
1320
1321 static int hdmi_find_pcm_slot(struct hdmi_spec *spec,
1322                                 struct hdmi_spec_per_pin *per_pin)
1323 {
1324         int i;
1325
1326         /* try the prefer PCM */
1327         if (!test_bit(per_pin->pin_nid_idx, &spec->pcm_bitmap))
1328                 return per_pin->pin_nid_idx;
1329
1330         /* have a second try; check the "reserved area" over num_pins */
1331         for (i = spec->num_nids; i < spec->pcm_used; i++) {
1332                 if (!test_bit(i, &spec->pcm_bitmap))
1333                         return i;
1334         }
1335
1336         /* the last try; check the empty slots in pins */
1337         for (i = 0; i < spec->num_nids; i++) {
1338                 if (!test_bit(i, &spec->pcm_bitmap))
1339                         return i;
1340         }
1341         return -EBUSY;
1342 }
1343
1344 static void hdmi_attach_hda_pcm(struct hdmi_spec *spec,
1345                                 struct hdmi_spec_per_pin *per_pin)
1346 {
1347         int idx;
1348
1349         /* pcm already be attached to the pin */
1350         if (per_pin->pcm)
1351                 return;
1352         idx = hdmi_find_pcm_slot(spec, per_pin);
1353         if (idx == -EBUSY)
1354                 return;
1355         per_pin->pcm_idx = idx;
1356         per_pin->pcm = get_hdmi_pcm(spec, idx);
1357         set_bit(idx, &spec->pcm_bitmap);
1358 }
1359
1360 static void hdmi_detach_hda_pcm(struct hdmi_spec *spec,
1361                                 struct hdmi_spec_per_pin *per_pin)
1362 {
1363         int idx;
1364
1365         /* pcm already be detached from the pin */
1366         if (!per_pin->pcm)
1367                 return;
1368         idx = per_pin->pcm_idx;
1369         per_pin->pcm_idx = -1;
1370         per_pin->pcm = NULL;
1371         if (idx >= 0 && idx < spec->pcm_used)
1372                 clear_bit(idx, &spec->pcm_bitmap);
1373 }
1374
1375 static int hdmi_get_pin_cvt_mux(struct hdmi_spec *spec,
1376                 struct hdmi_spec_per_pin *per_pin, hda_nid_t cvt_nid)
1377 {
1378         int mux_idx;
1379
1380         for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++)
1381                 if (per_pin->mux_nids[mux_idx] == cvt_nid)
1382                         break;
1383         return mux_idx;
1384 }
1385
1386 static bool check_non_pcm_per_cvt(struct hda_codec *codec, hda_nid_t cvt_nid);
1387
1388 static void hdmi_pcm_setup_pin(struct hdmi_spec *spec,
1389                            struct hdmi_spec_per_pin *per_pin)
1390 {
1391         struct hda_codec *codec = per_pin->codec;
1392         struct hda_pcm *pcm;
1393         struct hda_pcm_stream *hinfo;
1394         struct snd_pcm_substream *substream;
1395         int mux_idx;
1396         bool non_pcm;
1397
1398         if (per_pin->pcm_idx >= 0 && per_pin->pcm_idx < spec->pcm_used)
1399                 pcm = get_pcm_rec(spec, per_pin->pcm_idx);
1400         else
1401                 return;
1402         if (!pcm->pcm)
1403                 return;
1404         if (!test_bit(per_pin->pcm_idx, &spec->pcm_in_use))
1405                 return;
1406
1407         /* hdmi audio only uses playback and one substream */
1408         hinfo = pcm->stream;
1409         substream = pcm->pcm->streams[0].substream;
1410
1411         per_pin->cvt_nid = hinfo->nid;
1412
1413         mux_idx = hdmi_get_pin_cvt_mux(spec, per_pin, hinfo->nid);
1414         if (mux_idx < per_pin->num_mux_nids) {
1415                 snd_hda_set_dev_select(codec, per_pin->pin_nid,
1416                                    per_pin->dev_id);
1417                 snd_hda_codec_write_cache(codec, per_pin->pin_nid, 0,
1418                                 AC_VERB_SET_CONNECT_SEL,
1419                                 mux_idx);
1420         }
1421         snd_hda_spdif_ctls_assign(codec, per_pin->pcm_idx, hinfo->nid);
1422
1423         non_pcm = check_non_pcm_per_cvt(codec, hinfo->nid);
1424         if (substream->runtime)
1425                 per_pin->channels = substream->runtime->channels;
1426         per_pin->setup = true;
1427         per_pin->mux_idx = mux_idx;
1428
1429         hdmi_setup_audio_infoframe(codec, per_pin, non_pcm);
1430 }
1431
1432 static void hdmi_pcm_reset_pin(struct hdmi_spec *spec,
1433                            struct hdmi_spec_per_pin *per_pin)
1434 {
1435         if (per_pin->pcm_idx >= 0 && per_pin->pcm_idx < spec->pcm_used)
1436                 snd_hda_spdif_ctls_unassign(per_pin->codec, per_pin->pcm_idx);
1437
1438         per_pin->chmap_set = false;
1439         memset(per_pin->chmap, 0, sizeof(per_pin->chmap));
1440
1441         per_pin->setup = false;
1442         per_pin->channels = 0;
1443 }
1444
1445 /* update per_pin ELD from the given new ELD;
1446  * setup info frame and notification accordingly
1447  */
1448 static bool update_eld(struct hda_codec *codec,
1449                        struct hdmi_spec_per_pin *per_pin,
1450                        struct hdmi_eld *eld)
1451 {
1452         struct hdmi_eld *pin_eld = &per_pin->sink_eld;
1453         struct hdmi_spec *spec = codec->spec;
1454         bool old_eld_valid = pin_eld->eld_valid;
1455         bool eld_changed;
1456         int pcm_idx;
1457
1458         /* for monitor disconnection, save pcm_idx firstly */
1459         pcm_idx = per_pin->pcm_idx;
1460         if (spec->dyn_pcm_assign) {
1461                 if (eld->eld_valid) {
1462                         hdmi_attach_hda_pcm(spec, per_pin);
1463                         hdmi_pcm_setup_pin(spec, per_pin);
1464                 } else {
1465                         hdmi_pcm_reset_pin(spec, per_pin);
1466                         hdmi_detach_hda_pcm(spec, per_pin);
1467                 }
1468         }
1469         /* if pcm_idx == -1, it means this is in monitor connection event
1470          * we can get the correct pcm_idx now.
1471          */
1472         if (pcm_idx == -1)
1473                 pcm_idx = per_pin->pcm_idx;
1474
1475         if (eld->eld_valid)
1476                 snd_hdmi_show_eld(codec, &eld->info);
1477
1478         eld_changed = (pin_eld->eld_valid != eld->eld_valid);
1479         eld_changed |= (pin_eld->monitor_present != eld->monitor_present);
1480         if (!eld_changed && eld->eld_valid && pin_eld->eld_valid)
1481                 if (pin_eld->eld_size != eld->eld_size ||
1482                     memcmp(pin_eld->eld_buffer, eld->eld_buffer,
1483                            eld->eld_size) != 0)
1484                         eld_changed = true;
1485
1486         if (eld_changed) {
1487                 pin_eld->monitor_present = eld->monitor_present;
1488                 pin_eld->eld_valid = eld->eld_valid;
1489                 pin_eld->eld_size = eld->eld_size;
1490                 if (eld->eld_valid)
1491                         memcpy(pin_eld->eld_buffer, eld->eld_buffer,
1492                                eld->eld_size);
1493                 pin_eld->info = eld->info;
1494         }
1495
1496         /*
1497          * Re-setup pin and infoframe. This is needed e.g. when
1498          * - sink is first plugged-in
1499          * - transcoder can change during stream playback on Haswell
1500          *   and this can make HW reset converter selection on a pin.
1501          */
1502         if (eld->eld_valid && !old_eld_valid && per_pin->setup) {
1503                 pin_cvt_fixup(codec, per_pin, 0);
1504                 hdmi_setup_audio_infoframe(codec, per_pin, per_pin->non_pcm);
1505         }
1506
1507         if (eld_changed && pcm_idx >= 0)
1508                 snd_ctl_notify(codec->card,
1509                                SNDRV_CTL_EVENT_MASK_VALUE |
1510                                SNDRV_CTL_EVENT_MASK_INFO,
1511                                &get_hdmi_pcm(spec, pcm_idx)->eld_ctl->id);
1512         return eld_changed;
1513 }
1514
1515 /* update ELD and jack state via HD-audio verbs */
1516 static bool hdmi_present_sense_via_verbs(struct hdmi_spec_per_pin *per_pin,
1517                                          int repoll)
1518 {
1519         struct hda_jack_tbl *jack;
1520         struct hda_codec *codec = per_pin->codec;
1521         struct hdmi_spec *spec = codec->spec;
1522         struct hdmi_eld *eld = &spec->temp_eld;
1523         hda_nid_t pin_nid = per_pin->pin_nid;
1524         /*
1525          * Always execute a GetPinSense verb here, even when called from
1526          * hdmi_intrinsic_event; for some NVIDIA HW, the unsolicited
1527          * response's PD bit is not the real PD value, but indicates that
1528          * the real PD value changed. An older version of the HD-audio
1529          * specification worked this way. Hence, we just ignore the data in
1530          * the unsolicited response to avoid custom WARs.
1531          */
1532         int present;
1533         bool ret;
1534         bool do_repoll = false;
1535
1536         present = snd_hda_pin_sense(codec, pin_nid);
1537
1538         mutex_lock(&per_pin->lock);
1539         eld->monitor_present = !!(present & AC_PINSENSE_PRESENCE);
1540         if (eld->monitor_present)
1541                 eld->eld_valid  = !!(present & AC_PINSENSE_ELDV);
1542         else
1543                 eld->eld_valid = false;
1544
1545         codec_dbg(codec,
1546                 "HDMI status: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
1547                 codec->addr, pin_nid, eld->monitor_present, eld->eld_valid);
1548
1549         if (eld->eld_valid) {
1550                 if (spec->ops.pin_get_eld(codec, pin_nid, eld->eld_buffer,
1551                                                      &eld->eld_size) < 0)
1552                         eld->eld_valid = false;
1553                 else {
1554                         if (snd_hdmi_parse_eld(codec, &eld->info, eld->eld_buffer,
1555                                                     eld->eld_size) < 0)
1556                                 eld->eld_valid = false;
1557                 }
1558                 if (!eld->eld_valid && repoll)
1559                         do_repoll = true;
1560         }
1561
1562         if (do_repoll)
1563                 schedule_delayed_work(&per_pin->work, msecs_to_jiffies(300));
1564         else
1565                 update_eld(codec, per_pin, eld);
1566
1567         ret = !repoll || !eld->monitor_present || eld->eld_valid;
1568
1569         jack = snd_hda_jack_tbl_get(codec, pin_nid);
1570         if (jack) {
1571                 jack->block_report = !ret;
1572                 jack->pin_sense = (eld->monitor_present && eld->eld_valid) ?
1573                         AC_PINSENSE_PRESENCE : 0;
1574         }
1575         mutex_unlock(&per_pin->lock);
1576         return ret;
1577 }
1578
1579 static struct snd_jack *pin_idx_to_jack(struct hda_codec *codec,
1580                                  struct hdmi_spec_per_pin *per_pin)
1581 {
1582         struct hdmi_spec *spec = codec->spec;
1583         struct snd_jack *jack = NULL;
1584         struct hda_jack_tbl *jack_tbl;
1585
1586         /* if !dyn_pcm_assign, get jack from hda_jack_tbl
1587          * in !dyn_pcm_assign case, spec->pcm_rec[].jack is not
1588          * NULL even after snd_hda_jack_tbl_clear() is called to
1589          * free snd_jack. This may cause access invalid memory
1590          * when calling snd_jack_report
1591          */
1592         if (per_pin->pcm_idx >= 0 && spec->dyn_pcm_assign)
1593                 jack = spec->pcm_rec[per_pin->pcm_idx].jack;
1594         else if (!spec->dyn_pcm_assign) {
1595                 /*
1596                  * jack tbl doesn't support DP MST
1597                  * DP MST will use dyn_pcm_assign,
1598                  * so DP MST will never come here
1599                  */
1600                 jack_tbl = snd_hda_jack_tbl_get(codec, per_pin->pin_nid);
1601                 if (jack_tbl)
1602                         jack = jack_tbl->jack;
1603         }
1604         return jack;
1605 }
1606
1607 /* update ELD and jack state via audio component */
1608 static void sync_eld_via_acomp(struct hda_codec *codec,
1609                                struct hdmi_spec_per_pin *per_pin)
1610 {
1611         struct hdmi_spec *spec = codec->spec;
1612         struct hdmi_eld *eld = &spec->temp_eld;
1613         struct snd_jack *jack = NULL;
1614         bool changed;
1615         int size;
1616
1617         mutex_lock(&per_pin->lock);
1618         eld->monitor_present = false;
1619         size = snd_hdac_acomp_get_eld(&codec->core, per_pin->pin_nid,
1620                                       per_pin->dev_id, &eld->monitor_present,
1621                                       eld->eld_buffer, ELD_MAX_SIZE);
1622         if (size > 0) {
1623                 size = min(size, ELD_MAX_SIZE);
1624                 if (snd_hdmi_parse_eld(codec, &eld->info,
1625                                        eld->eld_buffer, size) < 0)
1626                         size = -EINVAL;
1627         }
1628
1629         if (size > 0) {
1630                 eld->eld_valid = true;
1631                 eld->eld_size = size;
1632         } else {
1633                 eld->eld_valid = false;
1634                 eld->eld_size = 0;
1635         }
1636
1637         /* pcm_idx >=0 before update_eld() means it is in monitor
1638          * disconnected event. Jack must be fetched before update_eld()
1639          */
1640         jack = pin_idx_to_jack(codec, per_pin);
1641         changed = update_eld(codec, per_pin, eld);
1642         if (jack == NULL)
1643                 jack = pin_idx_to_jack(codec, per_pin);
1644         if (changed && jack)
1645                 snd_jack_report(jack,
1646                                 (eld->monitor_present && eld->eld_valid) ?
1647                                 SND_JACK_AVOUT : 0);
1648         mutex_unlock(&per_pin->lock);
1649 }
1650
1651 static bool hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll)
1652 {
1653         struct hda_codec *codec = per_pin->codec;
1654         int ret;
1655
1656         /* no temporary power up/down needed for component notifier */
1657         if (!codec_has_acomp(codec)) {
1658                 ret = snd_hda_power_up_pm(codec);
1659                 if (ret < 0 && pm_runtime_suspended(hda_codec_dev(codec))) {
1660                         snd_hda_power_down_pm(codec);
1661                         return false;
1662                 }
1663                 ret = hdmi_present_sense_via_verbs(per_pin, repoll);
1664                 snd_hda_power_down_pm(codec);
1665         } else {
1666                 sync_eld_via_acomp(codec, per_pin);
1667                 ret = false; /* don't call snd_hda_jack_report_sync() */
1668         }
1669
1670         return ret;
1671 }
1672
1673 static void hdmi_repoll_eld(struct work_struct *work)
1674 {
1675         struct hdmi_spec_per_pin *per_pin =
1676         container_of(to_delayed_work(work), struct hdmi_spec_per_pin, work);
1677         struct hda_codec *codec = per_pin->codec;
1678         struct hdmi_spec *spec = codec->spec;
1679         struct hda_jack_tbl *jack;
1680
1681         jack = snd_hda_jack_tbl_get(codec, per_pin->pin_nid);
1682         if (jack)
1683                 jack->jack_dirty = 1;
1684
1685         if (per_pin->repoll_count++ > 6)
1686                 per_pin->repoll_count = 0;
1687
1688         mutex_lock(&spec->pcm_lock);
1689         if (hdmi_present_sense(per_pin, per_pin->repoll_count))
1690                 snd_hda_jack_report_sync(per_pin->codec);
1691         mutex_unlock(&spec->pcm_lock);
1692 }
1693
1694 static void intel_haswell_fixup_connect_list(struct hda_codec *codec,
1695                                              hda_nid_t nid);
1696
1697 static int hdmi_add_pin(struct hda_codec *codec, hda_nid_t pin_nid)
1698 {
1699         struct hdmi_spec *spec = codec->spec;
1700         unsigned int caps, config;
1701         int pin_idx;
1702         struct hdmi_spec_per_pin *per_pin;
1703         int err;
1704         int dev_num, i;
1705
1706         caps = snd_hda_query_pin_caps(codec, pin_nid);
1707         if (!(caps & (AC_PINCAP_HDMI | AC_PINCAP_DP)))
1708                 return 0;
1709
1710         /*
1711          * For DP MST audio, Configuration Default is the same for
1712          * all device entries on the same pin
1713          */
1714         config = snd_hda_codec_get_pincfg(codec, pin_nid);
1715         if (get_defcfg_connect(config) == AC_JACK_PORT_NONE &&
1716             !spec->force_connect)
1717                 return 0;
1718
1719         /*
1720          * To simplify the implementation, malloc all
1721          * the virtual pins in the initialization statically
1722          */
1723         if (is_haswell_plus(codec)) {
1724                 /*
1725                  * On Intel platforms, device entries number is
1726                  * changed dynamically. If there is a DP MST
1727                  * hub connected, the device entries number is 3.
1728                  * Otherwise, it is 1.
1729                  * Here we manually set dev_num to 3, so that
1730                  * we can initialize all the device entries when
1731                  * bootup statically.
1732                  */
1733                 dev_num = 3;
1734                 spec->dev_num = 3;
1735         } else if (spec->dyn_pcm_assign && codec->dp_mst) {
1736                 dev_num = snd_hda_get_num_devices(codec, pin_nid) + 1;
1737                 /*
1738                  * spec->dev_num is the maxinum number of device entries
1739                  * among all the pins
1740                  */
1741                 spec->dev_num = (spec->dev_num > dev_num) ?
1742                         spec->dev_num : dev_num;
1743         } else {
1744                 /*
1745                  * If the platform doesn't support DP MST,
1746                  * manually set dev_num to 1. This means
1747                  * the pin has only one device entry.
1748                  */
1749                 dev_num = 1;
1750                 spec->dev_num = 1;
1751         }
1752
1753         for (i = 0; i < dev_num; i++) {
1754                 pin_idx = spec->num_pins;
1755                 per_pin = snd_array_new(&spec->pins);
1756
1757                 if (!per_pin)
1758                         return -ENOMEM;
1759
1760                 if (spec->dyn_pcm_assign) {
1761                         per_pin->pcm = NULL;
1762                         per_pin->pcm_idx = -1;
1763                 } else {
1764                         per_pin->pcm = get_hdmi_pcm(spec, pin_idx);
1765                         per_pin->pcm_idx = pin_idx;
1766                 }
1767                 per_pin->pin_nid = pin_nid;
1768                 per_pin->pin_nid_idx = spec->num_nids;
1769                 per_pin->dev_id = i;
1770                 per_pin->non_pcm = false;
1771                 snd_hda_set_dev_select(codec, pin_nid, i);
1772                 if (is_haswell_plus(codec))
1773                         intel_haswell_fixup_connect_list(codec, pin_nid);
1774                 err = hdmi_read_pin_conn(codec, pin_idx);
1775                 if (err < 0)
1776                         return err;
1777                 spec->num_pins++;
1778         }
1779         spec->num_nids++;
1780
1781         return 0;
1782 }
1783
1784 static int hdmi_add_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
1785 {
1786         struct hdmi_spec *spec = codec->spec;
1787         struct hdmi_spec_per_cvt *per_cvt;
1788         unsigned int chans;
1789         int err;
1790
1791         chans = get_wcaps(codec, cvt_nid);
1792         chans = get_wcaps_channels(chans);
1793
1794         per_cvt = snd_array_new(&spec->cvts);
1795         if (!per_cvt)
1796                 return -ENOMEM;
1797
1798         per_cvt->cvt_nid = cvt_nid;
1799         per_cvt->channels_min = 2;
1800         if (chans <= 16) {
1801                 per_cvt->channels_max = chans;
1802                 if (chans > spec->chmap.channels_max)
1803                         spec->chmap.channels_max = chans;
1804         }
1805
1806         err = snd_hda_query_supported_pcm(codec, cvt_nid,
1807                                           &per_cvt->rates,
1808                                           &per_cvt->formats,
1809                                           &per_cvt->maxbps);
1810         if (err < 0)
1811                 return err;
1812
1813         if (spec->num_cvts < ARRAY_SIZE(spec->cvt_nids))
1814                 spec->cvt_nids[spec->num_cvts] = cvt_nid;
1815         spec->num_cvts++;
1816
1817         return 0;
1818 }
1819
1820 static const struct snd_pci_quirk force_connect_list[] = {
1821         SND_PCI_QUIRK(0x103c, 0x870f, "HP", 1),
1822         SND_PCI_QUIRK(0x103c, 0x871a, "HP", 1),
1823         SND_PCI_QUIRK(0x103c, 0x8711, "HP", 1),
1824         SND_PCI_QUIRK(0x103c, 0x8715, "HP", 1),
1825         SND_PCI_QUIRK(0x1462, 0xec94, "MS-7C94", 1),
1826         {}
1827 };
1828
1829 static int hdmi_parse_codec(struct hda_codec *codec)
1830 {
1831         struct hdmi_spec *spec = codec->spec;
1832         hda_nid_t start_nid;
1833         unsigned int caps;
1834         int i, nodes;
1835         const struct snd_pci_quirk *q;
1836
1837         nodes = snd_hda_get_sub_nodes(codec, codec->core.afg, &start_nid);
1838         if (!start_nid || nodes < 0) {
1839                 codec_warn(codec, "HDMI: failed to get afg sub nodes\n");
1840                 return -EINVAL;
1841         }
1842
1843         q = snd_pci_quirk_lookup(codec->bus->pci, force_connect_list);
1844
1845         if (q && q->value)
1846                 spec->force_connect = true;
1847
1848         /*
1849          * hdmi_add_pin() assumes total amount of converters to
1850          * be known, so first discover all converters
1851          */
1852         for (i = 0; i < nodes; i++) {
1853                 hda_nid_t nid = start_nid + i;
1854
1855                 caps = get_wcaps(codec, nid);
1856
1857                 if (!(caps & AC_WCAP_DIGITAL))
1858                         continue;
1859
1860                 if (get_wcaps_type(caps) == AC_WID_AUD_OUT)
1861                         hdmi_add_cvt(codec, nid);
1862         }
1863
1864         /* discover audio pins */
1865         for (i = 0; i < nodes; i++) {
1866                 hda_nid_t nid = start_nid + i;
1867
1868                 caps = get_wcaps(codec, nid);
1869
1870                 if (!(caps & AC_WCAP_DIGITAL))
1871                         continue;
1872
1873                 if (get_wcaps_type(caps) == AC_WID_PIN)
1874                         hdmi_add_pin(codec, nid);
1875         }
1876
1877         return 0;
1878 }
1879
1880 /*
1881  */
1882 static bool check_non_pcm_per_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
1883 {
1884         struct hda_spdif_out *spdif;
1885         bool non_pcm;
1886
1887         mutex_lock(&codec->spdif_mutex);
1888         spdif = snd_hda_spdif_out_of_nid(codec, cvt_nid);
1889         /* Add sanity check to pass klockwork check.
1890          * This should never happen.
1891          */
1892         if (WARN_ON(spdif == NULL)) {
1893                 mutex_unlock(&codec->spdif_mutex);
1894                 return true;
1895         }
1896         non_pcm = !!(spdif->status & IEC958_AES0_NONAUDIO);
1897         mutex_unlock(&codec->spdif_mutex);
1898         return non_pcm;
1899 }
1900
1901 /*
1902  * HDMI callbacks
1903  */
1904
1905 static int generic_hdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1906                                            struct hda_codec *codec,
1907                                            unsigned int stream_tag,
1908                                            unsigned int format,
1909                                            struct snd_pcm_substream *substream)
1910 {
1911         hda_nid_t cvt_nid = hinfo->nid;
1912         struct hdmi_spec *spec = codec->spec;
1913         int pin_idx;
1914         struct hdmi_spec_per_pin *per_pin;
1915         hda_nid_t pin_nid;
1916         struct snd_pcm_runtime *runtime = substream->runtime;
1917         bool non_pcm;
1918         int pinctl, stripe;
1919         int err = 0;
1920
1921         mutex_lock(&spec->pcm_lock);
1922         pin_idx = hinfo_to_pin_index(codec, hinfo);
1923         if (spec->dyn_pcm_assign && pin_idx < 0) {
1924                 /* when dyn_pcm_assign and pcm is not bound to a pin
1925                  * skip pin setup and return 0 to make audio playback
1926                  * be ongoing
1927                  */
1928                 pin_cvt_fixup(codec, NULL, cvt_nid);
1929                 snd_hda_codec_setup_stream(codec, cvt_nid,
1930                                         stream_tag, 0, format);
1931                 goto unlock;
1932         }
1933
1934         if (snd_BUG_ON(pin_idx < 0)) {
1935                 err = -EINVAL;
1936                 goto unlock;
1937         }
1938         per_pin = get_pin(spec, pin_idx);
1939         pin_nid = per_pin->pin_nid;
1940
1941         /* Verify pin:cvt selections to avoid silent audio after S3.
1942          * After S3, the audio driver restores pin:cvt selections
1943          * but this can happen before gfx is ready and such selection
1944          * is overlooked by HW. Thus multiple pins can share a same
1945          * default convertor and mute control will affect each other,
1946          * which can cause a resumed audio playback become silent
1947          * after S3.
1948          */
1949         pin_cvt_fixup(codec, per_pin, 0);
1950
1951         /* Call sync_audio_rate to set the N/CTS/M manually if necessary */
1952         /* Todo: add DP1.2 MST audio support later */
1953         if (codec_has_acomp(codec))
1954                 snd_hdac_sync_audio_rate(&codec->core, pin_nid, per_pin->dev_id,
1955                                          runtime->rate);
1956
1957         non_pcm = check_non_pcm_per_cvt(codec, cvt_nid);
1958         mutex_lock(&per_pin->lock);
1959         per_pin->channels = substream->runtime->channels;
1960         per_pin->setup = true;
1961
1962         if (get_wcaps(codec, cvt_nid) & AC_WCAP_STRIPE) {
1963                 stripe = snd_hdac_get_stream_stripe_ctl(&codec->bus->core,
1964                                                         substream);
1965                 snd_hda_codec_write(codec, cvt_nid, 0,
1966                                     AC_VERB_SET_STRIPE_CONTROL,
1967                                     stripe);
1968         }
1969
1970         hdmi_setup_audio_infoframe(codec, per_pin, non_pcm);
1971         mutex_unlock(&per_pin->lock);
1972         if (spec->dyn_pin_out) {
1973                 pinctl = snd_hda_codec_read(codec, pin_nid, 0,
1974                                             AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
1975                 snd_hda_codec_write(codec, pin_nid, 0,
1976                                     AC_VERB_SET_PIN_WIDGET_CONTROL,
1977                                     pinctl | PIN_OUT);
1978         }
1979
1980         /* snd_hda_set_dev_select() has been called before */
1981         err = spec->ops.setup_stream(codec, cvt_nid, pin_nid,
1982                                  stream_tag, format);
1983  unlock:
1984         mutex_unlock(&spec->pcm_lock);
1985         return err;
1986 }
1987
1988 static int generic_hdmi_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
1989                                              struct hda_codec *codec,
1990                                              struct snd_pcm_substream *substream)
1991 {
1992         snd_hda_codec_cleanup_stream(codec, hinfo->nid);
1993         return 0;
1994 }
1995
1996 static int hdmi_pcm_close(struct hda_pcm_stream *hinfo,
1997                           struct hda_codec *codec,
1998                           struct snd_pcm_substream *substream)
1999 {
2000         struct hdmi_spec *spec = codec->spec;
2001         int cvt_idx, pin_idx, pcm_idx;
2002         struct hdmi_spec_per_cvt *per_cvt;
2003         struct hdmi_spec_per_pin *per_pin;
2004         int pinctl;
2005         int err = 0;
2006
2007         mutex_lock(&spec->pcm_lock);
2008         if (hinfo->nid) {
2009                 pcm_idx = hinfo_to_pcm_index(codec, hinfo);
2010                 if (snd_BUG_ON(pcm_idx < 0)) {
2011                         err = -EINVAL;
2012                         goto unlock;
2013                 }
2014                 cvt_idx = cvt_nid_to_cvt_index(codec, hinfo->nid);
2015                 if (snd_BUG_ON(cvt_idx < 0)) {
2016                         err = -EINVAL;
2017                         goto unlock;
2018                 }
2019                 per_cvt = get_cvt(spec, cvt_idx);
2020                 snd_BUG_ON(!per_cvt->assigned);
2021                 per_cvt->assigned = 0;
2022                 hinfo->nid = 0;
2023
2024                 azx_stream(get_azx_dev(substream))->stripe = 0;
2025
2026                 snd_hda_spdif_ctls_unassign(codec, pcm_idx);
2027                 clear_bit(pcm_idx, &spec->pcm_in_use);
2028                 pin_idx = hinfo_to_pin_index(codec, hinfo);
2029                 if (spec->dyn_pcm_assign && pin_idx < 0)
2030                         goto unlock;
2031
2032                 if (snd_BUG_ON(pin_idx < 0)) {
2033                         err = -EINVAL;
2034                         goto unlock;
2035                 }
2036                 per_pin = get_pin(spec, pin_idx);
2037
2038                 if (spec->dyn_pin_out) {
2039                         pinctl = snd_hda_codec_read(codec, per_pin->pin_nid, 0,
2040                                         AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
2041                         snd_hda_codec_write(codec, per_pin->pin_nid, 0,
2042                                             AC_VERB_SET_PIN_WIDGET_CONTROL,
2043                                             pinctl & ~PIN_OUT);
2044                 }
2045
2046                 mutex_lock(&per_pin->lock);
2047                 per_pin->chmap_set = false;
2048                 memset(per_pin->chmap, 0, sizeof(per_pin->chmap));
2049
2050                 per_pin->setup = false;
2051                 per_pin->channels = 0;
2052                 mutex_unlock(&per_pin->lock);
2053         }
2054
2055 unlock:
2056         mutex_unlock(&spec->pcm_lock);
2057
2058         return err;
2059 }
2060
2061 static const struct hda_pcm_ops generic_ops = {
2062         .open = hdmi_pcm_open,
2063         .close = hdmi_pcm_close,
2064         .prepare = generic_hdmi_playback_pcm_prepare,
2065         .cleanup = generic_hdmi_playback_pcm_cleanup,
2066 };
2067
2068 static int hdmi_get_spk_alloc(struct hdac_device *hdac, int pcm_idx)
2069 {
2070         struct hda_codec *codec = container_of(hdac, struct hda_codec, core);
2071         struct hdmi_spec *spec = codec->spec;
2072         struct hdmi_spec_per_pin *per_pin = pcm_idx_to_pin(spec, pcm_idx);
2073
2074         if (!per_pin)
2075                 return 0;
2076
2077         return per_pin->sink_eld.info.spk_alloc;
2078 }
2079
2080 static void hdmi_get_chmap(struct hdac_device *hdac, int pcm_idx,
2081                                         unsigned char *chmap)
2082 {
2083         struct hda_codec *codec = container_of(hdac, struct hda_codec, core);
2084         struct hdmi_spec *spec = codec->spec;
2085         struct hdmi_spec_per_pin *per_pin = pcm_idx_to_pin(spec, pcm_idx);
2086
2087         /* chmap is already set to 0 in caller */
2088         if (!per_pin)
2089                 return;
2090
2091         memcpy(chmap, per_pin->chmap, ARRAY_SIZE(per_pin->chmap));
2092 }
2093
2094 static void hdmi_set_chmap(struct hdac_device *hdac, int pcm_idx,
2095                                 unsigned char *chmap, int prepared)
2096 {
2097         struct hda_codec *codec = container_of(hdac, struct hda_codec, core);
2098         struct hdmi_spec *spec = codec->spec;
2099         struct hdmi_spec_per_pin *per_pin = pcm_idx_to_pin(spec, pcm_idx);
2100
2101         if (!per_pin)
2102                 return;
2103         mutex_lock(&per_pin->lock);
2104         per_pin->chmap_set = true;
2105         memcpy(per_pin->chmap, chmap, ARRAY_SIZE(per_pin->chmap));
2106         if (prepared)
2107                 hdmi_setup_audio_infoframe(codec, per_pin, per_pin->non_pcm);
2108         mutex_unlock(&per_pin->lock);
2109 }
2110
2111 static bool is_hdmi_pcm_attached(struct hdac_device *hdac, int pcm_idx)
2112 {
2113         struct hda_codec *codec = container_of(hdac, struct hda_codec, core);
2114         struct hdmi_spec *spec = codec->spec;
2115         struct hdmi_spec_per_pin *per_pin = pcm_idx_to_pin(spec, pcm_idx);
2116
2117         return per_pin ? true:false;
2118 }
2119
2120 static int generic_hdmi_build_pcms(struct hda_codec *codec)
2121 {
2122         struct hdmi_spec *spec = codec->spec;
2123         int idx;
2124
2125         /*
2126          * for non-mst mode, pcm number is the same as before
2127          * for DP MST mode, pcm number is (nid number + dev_num - 1)
2128          *  dev_num is the device entry number in a pin
2129          *
2130          */
2131         for (idx = 0; idx < spec->num_nids + spec->dev_num - 1; idx++) {
2132                 struct hda_pcm *info;
2133                 struct hda_pcm_stream *pstr;
2134
2135                 info = snd_hda_codec_pcm_new(codec, "HDMI %d", idx);
2136                 if (!info)
2137                         return -ENOMEM;
2138
2139                 spec->pcm_rec[idx].pcm = info;
2140                 spec->pcm_used++;
2141                 info->pcm_type = HDA_PCM_TYPE_HDMI;
2142                 info->own_chmap = true;
2143
2144                 pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
2145                 pstr->substreams = 1;
2146                 pstr->ops = generic_ops;
2147                 /* pcm number is less than 16 */
2148                 if (spec->pcm_used >= 16)
2149                         break;
2150                 /* other pstr fields are set in open */
2151         }
2152
2153         return 0;
2154 }
2155
2156 static void free_hdmi_jack_priv(struct snd_jack *jack)
2157 {
2158         struct hdmi_pcm *pcm = jack->private_data;
2159
2160         pcm->jack = NULL;
2161 }
2162
2163 static int add_hdmi_jack_kctl(struct hda_codec *codec,
2164                                struct hdmi_spec *spec,
2165                                int pcm_idx,
2166                                const char *name)
2167 {
2168         struct snd_jack *jack;
2169         int err;
2170
2171         err = snd_jack_new(codec->card, name, SND_JACK_AVOUT, &jack,
2172                            true, false);
2173         if (err < 0)
2174                 return err;
2175
2176         spec->pcm_rec[pcm_idx].jack = jack;
2177         jack->private_data = &spec->pcm_rec[pcm_idx];
2178         jack->private_free = free_hdmi_jack_priv;
2179         return 0;
2180 }
2181
2182 static int generic_hdmi_build_jack(struct hda_codec *codec, int pcm_idx)
2183 {
2184         char hdmi_str[32] = "HDMI/DP";
2185         struct hdmi_spec *spec = codec->spec;
2186         struct hdmi_spec_per_pin *per_pin;
2187         struct hda_jack_tbl *jack;
2188         int pcmdev = get_pcm_rec(spec, pcm_idx)->device;
2189         bool phantom_jack;
2190         int ret;
2191
2192         if (pcmdev > 0)
2193                 sprintf(hdmi_str + strlen(hdmi_str), ",pcm=%d", pcmdev);
2194
2195         if (spec->dyn_pcm_assign)
2196                 return add_hdmi_jack_kctl(codec, spec, pcm_idx, hdmi_str);
2197
2198         /* for !dyn_pcm_assign, we still use hda_jack for compatibility */
2199         /* if !dyn_pcm_assign, it must be non-MST mode.
2200          * This means pcms and pins are statically mapped.
2201          * And pcm_idx is pin_idx.
2202          */
2203         per_pin = get_pin(spec, pcm_idx);
2204         phantom_jack = !is_jack_detectable(codec, per_pin->pin_nid);
2205         if (phantom_jack)
2206                 strncat(hdmi_str, " Phantom",
2207                         sizeof(hdmi_str) - strlen(hdmi_str) - 1);
2208         ret = snd_hda_jack_add_kctl(codec, per_pin->pin_nid, hdmi_str,
2209                                     phantom_jack, 0, NULL);
2210         if (ret < 0)
2211                 return ret;
2212         jack = snd_hda_jack_tbl_get(codec, per_pin->pin_nid);
2213         if (jack == NULL)
2214                 return 0;
2215         /* assign jack->jack to pcm_rec[].jack to
2216          * align with dyn_pcm_assign mode
2217          */
2218         spec->pcm_rec[pcm_idx].jack = jack->jack;
2219         return 0;
2220 }
2221
2222 static int generic_hdmi_build_controls(struct hda_codec *codec)
2223 {
2224         struct hdmi_spec *spec = codec->spec;
2225         int dev, err;
2226         int pin_idx, pcm_idx;
2227
2228         for (pcm_idx = 0; pcm_idx < spec->pcm_used; pcm_idx++) {
2229                 if (!get_pcm_rec(spec, pcm_idx)->pcm) {
2230                         /* no PCM: mark this for skipping permanently */
2231                         set_bit(pcm_idx, &spec->pcm_bitmap);
2232                         continue;
2233                 }
2234
2235                 err = generic_hdmi_build_jack(codec, pcm_idx);
2236                 if (err < 0)
2237                         return err;
2238
2239                 /* create the spdif for each pcm
2240                  * pin will be bound when monitor is connected
2241                  */
2242                 if (spec->dyn_pcm_assign)
2243                         err = snd_hda_create_dig_out_ctls(codec,
2244                                           0, spec->cvt_nids[0],
2245                                           HDA_PCM_TYPE_HDMI);
2246                 else {
2247                         struct hdmi_spec_per_pin *per_pin =
2248                                 get_pin(spec, pcm_idx);
2249                         err = snd_hda_create_dig_out_ctls(codec,
2250                                                   per_pin->pin_nid,
2251                                                   per_pin->mux_nids[0],
2252                                                   HDA_PCM_TYPE_HDMI);
2253                 }
2254                 if (err < 0)
2255                         return err;
2256                 snd_hda_spdif_ctls_unassign(codec, pcm_idx);
2257
2258                 dev = get_pcm_rec(spec, pcm_idx)->device;
2259                 if (dev != SNDRV_PCM_INVALID_DEVICE) {
2260                         /* add control for ELD Bytes */
2261                         err = hdmi_create_eld_ctl(codec, pcm_idx, dev);
2262                         if (err < 0)
2263                                 return err;
2264                 }
2265         }
2266
2267         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2268                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2269                 struct hdmi_eld *pin_eld = &per_pin->sink_eld;
2270
2271                 pin_eld->eld_valid = false;
2272                 hdmi_present_sense(per_pin, 0);
2273         }
2274
2275         /* add channel maps */
2276         for (pcm_idx = 0; pcm_idx < spec->pcm_used; pcm_idx++) {
2277                 struct hda_pcm *pcm;
2278
2279                 pcm = get_pcm_rec(spec, pcm_idx);
2280                 if (!pcm || !pcm->pcm)
2281                         break;
2282                 err = snd_hdac_add_chmap_ctls(pcm->pcm, pcm_idx, &spec->chmap);
2283                 if (err < 0)
2284                         return err;
2285         }
2286
2287         return 0;
2288 }
2289
2290 static int generic_hdmi_init_per_pins(struct hda_codec *codec)
2291 {
2292         struct hdmi_spec *spec = codec->spec;
2293         int pin_idx;
2294
2295         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2296                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2297
2298                 per_pin->codec = codec;
2299                 mutex_init(&per_pin->lock);
2300                 INIT_DELAYED_WORK(&per_pin->work, hdmi_repoll_eld);
2301                 eld_proc_new(per_pin, pin_idx);
2302         }
2303         return 0;
2304 }
2305
2306 static int generic_hdmi_init(struct hda_codec *codec)
2307 {
2308         struct hdmi_spec *spec = codec->spec;
2309         int pin_idx;
2310
2311         mutex_lock(&spec->bind_lock);
2312         spec->use_jack_detect = !codec->jackpoll_interval;
2313         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2314                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2315                 hda_nid_t pin_nid = per_pin->pin_nid;
2316                 int dev_id = per_pin->dev_id;
2317
2318                 snd_hda_set_dev_select(codec, pin_nid, dev_id);
2319                 hdmi_init_pin(codec, pin_nid);
2320                 if (codec_has_acomp(codec))
2321                         continue;
2322                 if (spec->use_jack_detect)
2323                         snd_hda_jack_detect_enable(codec, pin_nid);
2324                 else
2325                         snd_hda_jack_detect_enable_callback(codec, pin_nid,
2326                                                             jack_callback);
2327         }
2328         mutex_unlock(&spec->bind_lock);
2329         return 0;
2330 }
2331
2332 static void hdmi_array_init(struct hdmi_spec *spec, int nums)
2333 {
2334         snd_array_init(&spec->pins, sizeof(struct hdmi_spec_per_pin), nums);
2335         snd_array_init(&spec->cvts, sizeof(struct hdmi_spec_per_cvt), nums);
2336 }
2337
2338 static void hdmi_array_free(struct hdmi_spec *spec)
2339 {
2340         snd_array_free(&spec->pins);
2341         snd_array_free(&spec->cvts);
2342 }
2343
2344 static void generic_spec_free(struct hda_codec *codec)
2345 {
2346         struct hdmi_spec *spec = codec->spec;
2347
2348         if (spec) {
2349                 hdmi_array_free(spec);
2350                 kfree(spec);
2351                 codec->spec = NULL;
2352         }
2353         codec->dp_mst = false;
2354 }
2355
2356 static void generic_hdmi_free(struct hda_codec *codec)
2357 {
2358         struct hdmi_spec *spec = codec->spec;
2359         int pin_idx, pcm_idx;
2360
2361         if (spec->acomp_registered) {
2362                 snd_hdac_acomp_exit(&codec->bus->core);
2363         } else if (codec_has_acomp(codec)) {
2364                 snd_hdac_acomp_register_notifier(&codec->bus->core, NULL);
2365                 codec->relaxed_resume = 0;
2366         }
2367
2368         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2369                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2370                 cancel_delayed_work_sync(&per_pin->work);
2371                 eld_proc_free(per_pin);
2372         }
2373
2374         for (pcm_idx = 0; pcm_idx < spec->pcm_used; pcm_idx++) {
2375                 if (spec->pcm_rec[pcm_idx].jack == NULL)
2376                         continue;
2377                 if (spec->dyn_pcm_assign)
2378                         snd_device_free(codec->card,
2379                                         spec->pcm_rec[pcm_idx].jack);
2380                 else
2381                         spec->pcm_rec[pcm_idx].jack = NULL;
2382         }
2383
2384         generic_spec_free(codec);
2385 }
2386
2387 #ifdef CONFIG_PM
2388 static int generic_hdmi_suspend(struct hda_codec *codec)
2389 {
2390         struct hdmi_spec *spec = codec->spec;
2391         int pin_idx;
2392
2393         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2394                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2395                 cancel_delayed_work_sync(&per_pin->work);
2396         }
2397         return 0;
2398 }
2399
2400 static int generic_hdmi_resume(struct hda_codec *codec)
2401 {
2402         struct hdmi_spec *spec = codec->spec;
2403         int pin_idx;
2404
2405         codec->patch_ops.init(codec);
2406         snd_hda_regmap_sync(codec);
2407
2408         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2409                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2410                 hdmi_present_sense(per_pin, 1);
2411         }
2412         return 0;
2413 }
2414 #endif
2415
2416 static const struct hda_codec_ops generic_hdmi_patch_ops = {
2417         .init                   = generic_hdmi_init,
2418         .free                   = generic_hdmi_free,
2419         .build_pcms             = generic_hdmi_build_pcms,
2420         .build_controls         = generic_hdmi_build_controls,
2421         .unsol_event            = hdmi_unsol_event,
2422 #ifdef CONFIG_PM
2423         .suspend                = generic_hdmi_suspend,
2424         .resume                 = generic_hdmi_resume,
2425 #endif
2426 };
2427
2428 static const struct hdmi_ops generic_standard_hdmi_ops = {
2429         .pin_get_eld                            = snd_hdmi_get_eld,
2430         .pin_setup_infoframe                    = hdmi_pin_setup_infoframe,
2431         .pin_hbr_setup                          = hdmi_pin_hbr_setup,
2432         .setup_stream                           = hdmi_setup_stream,
2433 };
2434
2435 /* allocate codec->spec and assign/initialize generic parser ops */
2436 static int alloc_generic_hdmi(struct hda_codec *codec)
2437 {
2438         struct hdmi_spec *spec;
2439
2440         spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2441         if (!spec)
2442                 return -ENOMEM;
2443
2444         spec->codec = codec;
2445         spec->ops = generic_standard_hdmi_ops;
2446         spec->dev_num = 1;      /* initialize to 1 */
2447         mutex_init(&spec->pcm_lock);
2448         mutex_init(&spec->bind_lock);
2449         snd_hdac_register_chmap_ops(&codec->core, &spec->chmap);
2450
2451         spec->chmap.ops.get_chmap = hdmi_get_chmap;
2452         spec->chmap.ops.set_chmap = hdmi_set_chmap;
2453         spec->chmap.ops.is_pcm_attached = is_hdmi_pcm_attached;
2454         spec->chmap.ops.get_spk_alloc = hdmi_get_spk_alloc,
2455
2456         codec->spec = spec;
2457         hdmi_array_init(spec, 4);
2458
2459         codec->patch_ops = generic_hdmi_patch_ops;
2460
2461         return 0;
2462 }
2463
2464 /* generic HDMI parser */
2465 static int patch_generic_hdmi(struct hda_codec *codec)
2466 {
2467         int err;
2468
2469         err = alloc_generic_hdmi(codec);
2470         if (err < 0)
2471                 return err;
2472
2473         err = hdmi_parse_codec(codec);
2474         if (err < 0) {
2475                 generic_spec_free(codec);
2476                 return err;
2477         }
2478
2479         generic_hdmi_init_per_pins(codec);
2480         return 0;
2481 }
2482
2483 /*
2484  * generic audio component binding
2485  */
2486
2487 /* turn on / off the unsol event jack detection dynamically */
2488 static void reprogram_jack_detect(struct hda_codec *codec, hda_nid_t nid,
2489                                   bool use_acomp)
2490 {
2491         struct hda_jack_tbl *tbl;
2492
2493         tbl = snd_hda_jack_tbl_get(codec, nid);
2494         if (tbl) {
2495                 /* clear unsol even if component notifier is used, or re-enable
2496                  * if notifier is cleared
2497                  */
2498                 unsigned int val = use_acomp ? 0 : (AC_USRSP_EN | tbl->tag);
2499                 snd_hda_codec_write_cache(codec, nid, 0,
2500                                           AC_VERB_SET_UNSOLICITED_ENABLE, val);
2501         } else {
2502                 /* if no jack entry was defined beforehand, create a new one
2503                  * at need (i.e. only when notifier is cleared)
2504                  */
2505                 if (!use_acomp)
2506                         snd_hda_jack_detect_enable(codec, nid);
2507         }
2508 }
2509
2510 /* set up / clear component notifier dynamically */
2511 static void generic_acomp_notifier_set(struct drm_audio_component *acomp,
2512                                        bool use_acomp)
2513 {
2514         struct hdmi_spec *spec;
2515         int i;
2516
2517         spec = container_of(acomp->audio_ops, struct hdmi_spec, drm_audio_ops);
2518         mutex_lock(&spec->bind_lock);
2519         spec->use_acomp_notifier = use_acomp;
2520         spec->codec->relaxed_resume = use_acomp;
2521         spec->codec->bus->keep_power = 0;
2522         /* reprogram each jack detection logic depending on the notifier */
2523         if (spec->use_jack_detect) {
2524                 for (i = 0; i < spec->num_pins; i++)
2525                         reprogram_jack_detect(spec->codec,
2526                                               get_pin(spec, i)->pin_nid,
2527                                               use_acomp);
2528         }
2529         mutex_unlock(&spec->bind_lock);
2530 }
2531
2532 /* enable / disable the notifier via master bind / unbind */
2533 static int generic_acomp_master_bind(struct device *dev,
2534                                      struct drm_audio_component *acomp)
2535 {
2536         generic_acomp_notifier_set(acomp, true);
2537         return 0;
2538 }
2539
2540 static void generic_acomp_master_unbind(struct device *dev,
2541                                         struct drm_audio_component *acomp)
2542 {
2543         generic_acomp_notifier_set(acomp, false);
2544 }
2545
2546 /* check whether both HD-audio and DRM PCI devices belong to the same bus */
2547 static int match_bound_vga(struct device *dev, int subtype, void *data)
2548 {
2549         struct hdac_bus *bus = data;
2550         struct pci_dev *pci, *master;
2551
2552         if (!dev_is_pci(dev) || !dev_is_pci(bus->dev))
2553                 return 0;
2554         master = to_pci_dev(bus->dev);
2555         pci = to_pci_dev(dev);
2556         return master->bus == pci->bus;
2557 }
2558
2559 /* audio component notifier for AMD/Nvidia HDMI codecs */
2560 static void generic_acomp_pin_eld_notify(void *audio_ptr, int port, int dev_id)
2561 {
2562         struct hda_codec *codec = audio_ptr;
2563         struct hdmi_spec *spec = codec->spec;
2564         hda_nid_t pin_nid = spec->port2pin(codec, port);
2565
2566         if (!pin_nid)
2567                 return;
2568         if (get_wcaps_type(get_wcaps(codec, pin_nid)) != AC_WID_PIN)
2569                 return;
2570         /* skip notification during system suspend (but not in runtime PM);
2571          * the state will be updated at resume
2572          */
2573         if (codec->core.dev.power.power_state.event == PM_EVENT_SUSPEND)
2574                 return;
2575
2576         check_presence_and_report(codec, pin_nid, dev_id);
2577 }
2578
2579 /* set up the private drm_audio_ops from the template */
2580 static void setup_drm_audio_ops(struct hda_codec *codec,
2581                                 const struct drm_audio_component_audio_ops *ops)
2582 {
2583         struct hdmi_spec *spec = codec->spec;
2584
2585         spec->drm_audio_ops.audio_ptr = codec;
2586         /* intel_audio_codec_enable() or intel_audio_codec_disable()
2587          * will call pin_eld_notify with using audio_ptr pointer
2588          * We need make sure audio_ptr is really setup
2589          */
2590         wmb();
2591         spec->drm_audio_ops.pin2port = ops->pin2port;
2592         spec->drm_audio_ops.pin_eld_notify = ops->pin_eld_notify;
2593         spec->drm_audio_ops.master_bind = ops->master_bind;
2594         spec->drm_audio_ops.master_unbind = ops->master_unbind;
2595 }
2596
2597 /* initialize the generic HDMI audio component */
2598 static void generic_acomp_init(struct hda_codec *codec,
2599                                const struct drm_audio_component_audio_ops *ops,
2600                                int (*port2pin)(struct hda_codec *, int))
2601 {
2602         struct hdmi_spec *spec = codec->spec;
2603
2604         if (!enable_acomp) {
2605                 codec_info(codec, "audio component disabled by module option\n");
2606                 return;
2607         }
2608
2609         spec->port2pin = port2pin;
2610         setup_drm_audio_ops(codec, ops);
2611         if (!snd_hdac_acomp_init(&codec->bus->core, &spec->drm_audio_ops,
2612                                  match_bound_vga, 0)) {
2613                 spec->acomp_registered = true;
2614         }
2615 }
2616
2617 /*
2618  * Intel codec parsers and helpers
2619  */
2620
2621 static void intel_haswell_fixup_connect_list(struct hda_codec *codec,
2622                                              hda_nid_t nid)
2623 {
2624         struct hdmi_spec *spec = codec->spec;
2625         hda_nid_t conns[4];
2626         int nconns;
2627
2628         nconns = snd_hda_get_connections(codec, nid, conns, ARRAY_SIZE(conns));
2629         if (nconns == spec->num_cvts &&
2630             !memcmp(conns, spec->cvt_nids, spec->num_cvts * sizeof(hda_nid_t)))
2631                 return;
2632
2633         /* override pins connection list */
2634         codec_dbg(codec, "hdmi: haswell: override pin connection 0x%x\n", nid);
2635         snd_hda_override_conn_list(codec, nid, spec->num_cvts, spec->cvt_nids);
2636 }
2637
2638 #define INTEL_GET_VENDOR_VERB   0xf81
2639 #define INTEL_SET_VENDOR_VERB   0x781
2640 #define INTEL_EN_DP12           0x02    /* enable DP 1.2 features */
2641 #define INTEL_EN_ALL_PIN_CVTS   0x01    /* enable 2nd & 3rd pins and convertors */
2642
2643 static void intel_haswell_enable_all_pins(struct hda_codec *codec,
2644                                           bool update_tree)
2645 {
2646         unsigned int vendor_param;
2647         struct hdmi_spec *spec = codec->spec;
2648
2649         vendor_param = snd_hda_codec_read(codec, spec->vendor_nid, 0,
2650                                 INTEL_GET_VENDOR_VERB, 0);
2651         if (vendor_param == -1 || vendor_param & INTEL_EN_ALL_PIN_CVTS)
2652                 return;
2653
2654         vendor_param |= INTEL_EN_ALL_PIN_CVTS;
2655         vendor_param = snd_hda_codec_read(codec, spec->vendor_nid, 0,
2656                                 INTEL_SET_VENDOR_VERB, vendor_param);
2657         if (vendor_param == -1)
2658                 return;
2659
2660         if (update_tree)
2661                 snd_hda_codec_update_widgets(codec);
2662 }
2663
2664 static void intel_haswell_fixup_enable_dp12(struct hda_codec *codec)
2665 {
2666         unsigned int vendor_param;
2667         struct hdmi_spec *spec = codec->spec;
2668
2669         vendor_param = snd_hda_codec_read(codec, spec->vendor_nid, 0,
2670                                 INTEL_GET_VENDOR_VERB, 0);
2671         if (vendor_param == -1 || vendor_param & INTEL_EN_DP12)
2672                 return;
2673
2674         /* enable DP1.2 mode */
2675         vendor_param |= INTEL_EN_DP12;
2676         snd_hdac_regmap_add_vendor_verb(&codec->core, INTEL_SET_VENDOR_VERB);
2677         snd_hda_codec_write_cache(codec, spec->vendor_nid, 0,
2678                                 INTEL_SET_VENDOR_VERB, vendor_param);
2679 }
2680
2681 /* Haswell needs to re-issue the vendor-specific verbs before turning to D0.
2682  * Otherwise you may get severe h/w communication errors.
2683  */
2684 static void haswell_set_power_state(struct hda_codec *codec, hda_nid_t fg,
2685                                 unsigned int power_state)
2686 {
2687         if (power_state == AC_PWRST_D0) {
2688                 intel_haswell_enable_all_pins(codec, false);
2689                 intel_haswell_fixup_enable_dp12(codec);
2690         }
2691
2692         snd_hda_codec_read(codec, fg, 0, AC_VERB_SET_POWER_STATE, power_state);
2693         snd_hda_codec_set_power_to_all(codec, fg, power_state);
2694 }
2695
2696 /* There is a fixed mapping between audio pin node and display port.
2697  * on SNB, IVY, HSW, BSW, SKL, BXT, KBL:
2698  * Pin Widget 5 - PORT B (port = 1 in i915 driver)
2699  * Pin Widget 6 - PORT C (port = 2 in i915 driver)
2700  * Pin Widget 7 - PORT D (port = 3 in i915 driver)
2701  *
2702  * on VLV, ILK:
2703  * Pin Widget 4 - PORT B (port = 1 in i915 driver)
2704  * Pin Widget 5 - PORT C (port = 2 in i915 driver)
2705  * Pin Widget 6 - PORT D (port = 3 in i915 driver)
2706  */
2707 static int intel_base_nid(struct hda_codec *codec)
2708 {
2709         switch (codec->core.vendor_id) {
2710         case 0x80860054: /* ILK */
2711         case 0x80862804: /* ILK */
2712         case 0x80862882: /* VLV */
2713                 return 4;
2714         default:
2715                 return 5;
2716         }
2717 }
2718
2719 static int intel_pin2port(void *audio_ptr, int pin_nid)
2720 {
2721         struct hda_codec *codec = audio_ptr;
2722         struct hdmi_spec *spec = codec->spec;
2723         int base_nid, i;
2724
2725         if (!spec->port_num) {
2726                 base_nid = intel_base_nid(codec);
2727                 if (WARN_ON(pin_nid < base_nid || pin_nid >= base_nid + 3))
2728                         return -1;
2729                 return pin_nid - base_nid + 1; /* intel port is 1-based */
2730         }
2731
2732         /*
2733          * looking for the pin number in the mapping table and return
2734          * the index which indicate the port number
2735          */
2736         for (i = 0; i < spec->port_num; i++) {
2737                 if (pin_nid == spec->port_map[i])
2738                         return i + 1;
2739         }
2740
2741         /* return -1 if pin number exceeds our expectation */
2742         codec_info(codec, "Can't find the HDMI/DP port for pin %d\n", pin_nid);
2743         return -1;
2744 }
2745
2746 static int intel_port2pin(struct hda_codec *codec, int port)
2747 {
2748         struct hdmi_spec *spec = codec->spec;
2749
2750         if (!spec->port_num) {
2751                 /* we assume only from port-B to port-D */
2752                 if (port < 1 || port > 3)
2753                         return 0;
2754                 /* intel port is 1-based */
2755                 return port + intel_base_nid(codec) - 1;
2756         }
2757
2758         if (port < 1 || port > spec->port_num)
2759                 return 0;
2760         return spec->port_map[port - 1];
2761 }
2762
2763 static void intel_pin_eld_notify(void *audio_ptr, int port, int pipe)
2764 {
2765         struct hda_codec *codec = audio_ptr;
2766         int pin_nid;
2767         int dev_id = pipe;
2768
2769         pin_nid = intel_port2pin(codec, port);
2770         if (!pin_nid)
2771                 return;
2772         /* skip notification during system suspend (but not in runtime PM);
2773          * the state will be updated at resume
2774          */
2775         if (codec->core.dev.power.power_state.event == PM_EVENT_SUSPEND)
2776                 return;
2777
2778         snd_hdac_i915_set_bclk(&codec->bus->core);
2779         check_presence_and_report(codec, pin_nid, dev_id);
2780 }
2781
2782 static const struct drm_audio_component_audio_ops intel_audio_ops = {
2783         .pin2port = intel_pin2port,
2784         .pin_eld_notify = intel_pin_eld_notify,
2785 };
2786
2787 /* register i915 component pin_eld_notify callback */
2788 static void register_i915_notifier(struct hda_codec *codec)
2789 {
2790         struct hdmi_spec *spec = codec->spec;
2791
2792         spec->use_acomp_notifier = true;
2793         spec->port2pin = intel_port2pin;
2794         setup_drm_audio_ops(codec, &intel_audio_ops);
2795         snd_hdac_acomp_register_notifier(&codec->bus->core,
2796                                         &spec->drm_audio_ops);
2797         /* no need for forcible resume for jack check thanks to notifier */
2798         codec->relaxed_resume = 1;
2799 }
2800
2801 /* setup_stream ops override for HSW+ */
2802 static int i915_hsw_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
2803                                  hda_nid_t pin_nid, u32 stream_tag, int format)
2804 {
2805         haswell_verify_D0(codec, cvt_nid, pin_nid);
2806         return hdmi_setup_stream(codec, cvt_nid, pin_nid, stream_tag, format);
2807 }
2808
2809 /* pin_cvt_fixup ops override for HSW+ and VLV+ */
2810 static void i915_pin_cvt_fixup(struct hda_codec *codec,
2811                                struct hdmi_spec_per_pin *per_pin,
2812                                hda_nid_t cvt_nid)
2813 {
2814         if (per_pin) {
2815                 haswell_verify_D0(codec, per_pin->cvt_nid, per_pin->pin_nid);
2816                 snd_hda_set_dev_select(codec, per_pin->pin_nid,
2817                                per_pin->dev_id);
2818                 intel_verify_pin_cvt_connect(codec, per_pin);
2819                 intel_not_share_assigned_cvt(codec, per_pin->pin_nid,
2820                                      per_pin->dev_id, per_pin->mux_idx);
2821         } else {
2822                 intel_not_share_assigned_cvt_nid(codec, 0, 0, cvt_nid);
2823         }
2824 }
2825
2826 /* precondition and allocation for Intel codecs */
2827 static int alloc_intel_hdmi(struct hda_codec *codec)
2828 {
2829         int err;
2830
2831         /* requires i915 binding */
2832         if (!codec->bus->core.audio_component) {
2833                 codec_info(codec, "No i915 binding for Intel HDMI/DP codec\n");
2834                 /* set probe_id here to prevent generic fallback binding */
2835                 codec->probe_id = HDA_CODEC_ID_SKIP_PROBE;
2836                 return -ENODEV;
2837         }
2838
2839         err = alloc_generic_hdmi(codec);
2840         if (err < 0)
2841                 return err;
2842         /* no need to handle unsol events */
2843         codec->patch_ops.unsol_event = NULL;
2844         return 0;
2845 }
2846
2847 /* parse and post-process for Intel codecs */
2848 static int parse_intel_hdmi(struct hda_codec *codec)
2849 {
2850         int err, retries = 3;
2851
2852         do {
2853                 err = hdmi_parse_codec(codec);
2854         } while (err < 0 && retries--);
2855
2856         if (err < 0) {
2857                 generic_spec_free(codec);
2858                 return err;
2859         }
2860
2861         generic_hdmi_init_per_pins(codec);
2862         register_i915_notifier(codec);
2863         return 0;
2864 }
2865
2866 /* Intel Haswell and onwards; audio component with eld notifier */
2867 static int intel_hsw_common_init(struct hda_codec *codec, hda_nid_t vendor_nid,
2868                                  const int *port_map, int port_num)
2869 {
2870         struct hdmi_spec *spec;
2871         int err;
2872
2873         err = alloc_intel_hdmi(codec);
2874         if (err < 0)
2875                 return err;
2876         spec = codec->spec;
2877         codec->dp_mst = true;
2878         spec->dyn_pcm_assign = true;
2879         spec->vendor_nid = vendor_nid;
2880         spec->port_map = port_map;
2881         spec->port_num = port_num;
2882
2883         intel_haswell_enable_all_pins(codec, true);
2884         intel_haswell_fixup_enable_dp12(codec);
2885
2886         codec->display_power_control = 1;
2887
2888         codec->patch_ops.set_power_state = haswell_set_power_state;
2889         codec->depop_delay = 0;
2890         codec->auto_runtime_pm = 1;
2891
2892         spec->ops.setup_stream = i915_hsw_setup_stream;
2893         spec->ops.pin_cvt_fixup = i915_pin_cvt_fixup;
2894
2895         return parse_intel_hdmi(codec);
2896 }
2897
2898 static int patch_i915_hsw_hdmi(struct hda_codec *codec)
2899 {
2900         return intel_hsw_common_init(codec, 0x08, NULL, 0);
2901 }
2902
2903 static int patch_i915_glk_hdmi(struct hda_codec *codec)
2904 {
2905         return intel_hsw_common_init(codec, 0x0b, NULL, 0);
2906 }
2907
2908 static int patch_i915_icl_hdmi(struct hda_codec *codec)
2909 {
2910         /*
2911          * pin to port mapping table where the value indicate the pin number and
2912          * the index indicate the port number with 1 base.
2913          */
2914         static const int map[] = {0x4, 0x6, 0x8, 0xa, 0xb};
2915
2916         return intel_hsw_common_init(codec, 0x02, map, ARRAY_SIZE(map));
2917 }
2918
2919 static int patch_i915_tgl_hdmi(struct hda_codec *codec)
2920 {
2921         /*
2922          * pin to port mapping table where the value indicate the pin number and
2923          * the index indicate the port number with 1 base.
2924          */
2925         static const int map[] = {0x4, 0x6, 0x8, 0xa, 0xb, 0xc, 0xd, 0xe, 0xf};
2926
2927         return intel_hsw_common_init(codec, 0x02, map, ARRAY_SIZE(map));
2928 }
2929
2930
2931 /* Intel Baytrail and Braswell; with eld notifier */
2932 static int patch_i915_byt_hdmi(struct hda_codec *codec)
2933 {
2934         struct hdmi_spec *spec;
2935         int err;
2936
2937         err = alloc_intel_hdmi(codec);
2938         if (err < 0)
2939                 return err;
2940         spec = codec->spec;
2941
2942         /* For Valleyview/Cherryview, only the display codec is in the display
2943          * power well and can use link_power ops to request/release the power.
2944          */
2945         codec->display_power_control = 1;
2946
2947         codec->depop_delay = 0;
2948         codec->auto_runtime_pm = 1;
2949
2950         spec->ops.pin_cvt_fixup = i915_pin_cvt_fixup;
2951
2952         return parse_intel_hdmi(codec);
2953 }
2954
2955 /* Intel IronLake, SandyBridge and IvyBridge; with eld notifier */
2956 static int patch_i915_cpt_hdmi(struct hda_codec *codec)
2957 {
2958         int err;
2959
2960         err = alloc_intel_hdmi(codec);
2961         if (err < 0)
2962                 return err;
2963         return parse_intel_hdmi(codec);
2964 }
2965
2966 /*
2967  * Shared non-generic implementations
2968  */
2969
2970 static int simple_playback_build_pcms(struct hda_codec *codec)
2971 {
2972         struct hdmi_spec *spec = codec->spec;
2973         struct hda_pcm *info;
2974         unsigned int chans;
2975         struct hda_pcm_stream *pstr;
2976         struct hdmi_spec_per_cvt *per_cvt;
2977
2978         per_cvt = get_cvt(spec, 0);
2979         chans = get_wcaps(codec, per_cvt->cvt_nid);
2980         chans = get_wcaps_channels(chans);
2981
2982         info = snd_hda_codec_pcm_new(codec, "HDMI 0");
2983         if (!info)
2984                 return -ENOMEM;
2985         spec->pcm_rec[0].pcm = info;
2986         info->pcm_type = HDA_PCM_TYPE_HDMI;
2987         pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
2988         *pstr = spec->pcm_playback;
2989         pstr->nid = per_cvt->cvt_nid;
2990         if (pstr->channels_max <= 2 && chans && chans <= 16)
2991                 pstr->channels_max = chans;
2992
2993         return 0;
2994 }
2995
2996 /* unsolicited event for jack sensing */
2997 static void simple_hdmi_unsol_event(struct hda_codec *codec,
2998                                     unsigned int res)
2999 {
3000         snd_hda_jack_set_dirty_all(codec);
3001         snd_hda_jack_report_sync(codec);
3002 }
3003
3004 /* generic_hdmi_build_jack can be used for simple_hdmi, too,
3005  * as long as spec->pins[] is set correctly
3006  */
3007 #define simple_hdmi_build_jack  generic_hdmi_build_jack
3008
3009 static int simple_playback_build_controls(struct hda_codec *codec)
3010 {
3011         struct hdmi_spec *spec = codec->spec;
3012         struct hdmi_spec_per_cvt *per_cvt;
3013         int err;
3014
3015         per_cvt = get_cvt(spec, 0);
3016         err = snd_hda_create_dig_out_ctls(codec, per_cvt->cvt_nid,
3017                                           per_cvt->cvt_nid,
3018                                           HDA_PCM_TYPE_HDMI);
3019         if (err < 0)
3020                 return err;
3021         return simple_hdmi_build_jack(codec, 0);
3022 }
3023
3024 static int simple_playback_init(struct hda_codec *codec)
3025 {
3026         struct hdmi_spec *spec = codec->spec;
3027         struct hdmi_spec_per_pin *per_pin = get_pin(spec, 0);
3028         hda_nid_t pin = per_pin->pin_nid;
3029
3030         snd_hda_codec_write(codec, pin, 0,
3031                             AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
3032         /* some codecs require to unmute the pin */
3033         if (get_wcaps(codec, pin) & AC_WCAP_OUT_AMP)
3034                 snd_hda_codec_write(codec, pin, 0, AC_VERB_SET_AMP_GAIN_MUTE,
3035                                     AMP_OUT_UNMUTE);
3036         snd_hda_jack_detect_enable(codec, pin);
3037         return 0;
3038 }
3039
3040 static void simple_playback_free(struct hda_codec *codec)
3041 {
3042         struct hdmi_spec *spec = codec->spec;
3043
3044         hdmi_array_free(spec);
3045         kfree(spec);
3046 }
3047
3048 /*
3049  * Nvidia specific implementations
3050  */
3051
3052 #define Nv_VERB_SET_Channel_Allocation          0xF79
3053 #define Nv_VERB_SET_Info_Frame_Checksum         0xF7A
3054 #define Nv_VERB_SET_Audio_Protection_On         0xF98
3055 #define Nv_VERB_SET_Audio_Protection_Off        0xF99
3056
3057 #define nvhdmi_master_con_nid_7x        0x04
3058 #define nvhdmi_master_pin_nid_7x        0x05
3059
3060 static const hda_nid_t nvhdmi_con_nids_7x[4] = {
3061         /*front, rear, clfe, rear_surr */
3062         0x6, 0x8, 0xa, 0xc,
3063 };
3064
3065 static const struct hda_verb nvhdmi_basic_init_7x_2ch[] = {
3066         /* set audio protect on */
3067         { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
3068         /* enable digital output on pin widget */
3069         { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
3070         {} /* terminator */
3071 };
3072
3073 static const struct hda_verb nvhdmi_basic_init_7x_8ch[] = {
3074         /* set audio protect on */
3075         { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
3076         /* enable digital output on pin widget */
3077         { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
3078         { 0x7, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
3079         { 0x9, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
3080         { 0xb, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
3081         { 0xd, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
3082         {} /* terminator */
3083 };
3084
3085 #ifdef LIMITED_RATE_FMT_SUPPORT
3086 /* support only the safe format and rate */
3087 #define SUPPORTED_RATES         SNDRV_PCM_RATE_48000
3088 #define SUPPORTED_MAXBPS        16
3089 #define SUPPORTED_FORMATS       SNDRV_PCM_FMTBIT_S16_LE
3090 #else
3091 /* support all rates and formats */
3092 #define SUPPORTED_RATES \
3093         (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
3094         SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |\
3095          SNDRV_PCM_RATE_192000)
3096 #define SUPPORTED_MAXBPS        24
3097 #define SUPPORTED_FORMATS \
3098         (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
3099 #endif
3100
3101 static int nvhdmi_7x_init_2ch(struct hda_codec *codec)
3102 {
3103         snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_2ch);
3104         return 0;
3105 }
3106
3107 static int nvhdmi_7x_init_8ch(struct hda_codec *codec)
3108 {
3109         snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_8ch);
3110         return 0;
3111 }
3112
3113 static const unsigned int channels_2_6_8[] = {
3114         2, 6, 8
3115 };
3116
3117 static const unsigned int channels_2_8[] = {
3118         2, 8
3119 };
3120
3121 static const struct snd_pcm_hw_constraint_list hw_constraints_2_6_8_channels = {
3122         .count = ARRAY_SIZE(channels_2_6_8),
3123         .list = channels_2_6_8,
3124         .mask = 0,
3125 };
3126
3127 static const struct snd_pcm_hw_constraint_list hw_constraints_2_8_channels = {
3128         .count = ARRAY_SIZE(channels_2_8),
3129         .list = channels_2_8,
3130         .mask = 0,
3131 };
3132
3133 static int simple_playback_pcm_open(struct hda_pcm_stream *hinfo,
3134                                     struct hda_codec *codec,
3135                                     struct snd_pcm_substream *substream)
3136 {
3137         struct hdmi_spec *spec = codec->spec;
3138         const struct snd_pcm_hw_constraint_list *hw_constraints_channels = NULL;
3139
3140         switch (codec->preset->vendor_id) {
3141         case 0x10de0002:
3142         case 0x10de0003:
3143         case 0x10de0005:
3144         case 0x10de0006:
3145                 hw_constraints_channels = &hw_constraints_2_8_channels;
3146                 break;
3147         case 0x10de0007:
3148                 hw_constraints_channels = &hw_constraints_2_6_8_channels;
3149                 break;
3150         default:
3151                 break;
3152         }
3153
3154         if (hw_constraints_channels != NULL) {
3155                 snd_pcm_hw_constraint_list(substream->runtime, 0,
3156                                 SNDRV_PCM_HW_PARAM_CHANNELS,
3157                                 hw_constraints_channels);
3158         } else {
3159                 snd_pcm_hw_constraint_step(substream->runtime, 0,
3160                                            SNDRV_PCM_HW_PARAM_CHANNELS, 2);
3161         }
3162
3163         return snd_hda_multi_out_dig_open(codec, &spec->multiout);
3164 }
3165
3166 static int simple_playback_pcm_close(struct hda_pcm_stream *hinfo,
3167                                      struct hda_codec *codec,
3168                                      struct snd_pcm_substream *substream)
3169 {
3170         struct hdmi_spec *spec = codec->spec;
3171         return snd_hda_multi_out_dig_close(codec, &spec->multiout);
3172 }
3173
3174 static int simple_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
3175                                        struct hda_codec *codec,
3176                                        unsigned int stream_tag,
3177                                        unsigned int format,
3178                                        struct snd_pcm_substream *substream)
3179 {
3180         struct hdmi_spec *spec = codec->spec;
3181         return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
3182                                              stream_tag, format, substream);
3183 }
3184
3185 static const struct hda_pcm_stream simple_pcm_playback = {
3186         .substreams = 1,
3187         .channels_min = 2,
3188         .channels_max = 2,
3189         .ops = {
3190                 .open = simple_playback_pcm_open,
3191                 .close = simple_playback_pcm_close,
3192                 .prepare = simple_playback_pcm_prepare
3193         },
3194 };
3195
3196 static const struct hda_codec_ops simple_hdmi_patch_ops = {
3197         .build_controls = simple_playback_build_controls,
3198         .build_pcms = simple_playback_build_pcms,
3199         .init = simple_playback_init,
3200         .free = simple_playback_free,
3201         .unsol_event = simple_hdmi_unsol_event,
3202 };
3203
3204 static int patch_simple_hdmi(struct hda_codec *codec,
3205                              hda_nid_t cvt_nid, hda_nid_t pin_nid)
3206 {
3207         struct hdmi_spec *spec;
3208         struct hdmi_spec_per_cvt *per_cvt;
3209         struct hdmi_spec_per_pin *per_pin;
3210
3211         spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3212         if (!spec)
3213                 return -ENOMEM;
3214
3215         spec->codec = codec;
3216         codec->spec = spec;
3217         hdmi_array_init(spec, 1);
3218
3219         spec->multiout.num_dacs = 0;  /* no analog */
3220         spec->multiout.max_channels = 2;
3221         spec->multiout.dig_out_nid = cvt_nid;
3222         spec->num_cvts = 1;
3223         spec->num_pins = 1;
3224         per_pin = snd_array_new(&spec->pins);
3225         per_cvt = snd_array_new(&spec->cvts);
3226         if (!per_pin || !per_cvt) {
3227                 simple_playback_free(codec);
3228                 return -ENOMEM;
3229         }
3230         per_cvt->cvt_nid = cvt_nid;
3231         per_pin->pin_nid = pin_nid;
3232         spec->pcm_playback = simple_pcm_playback;
3233
3234         codec->patch_ops = simple_hdmi_patch_ops;
3235
3236         return 0;
3237 }
3238
3239 static void nvhdmi_8ch_7x_set_info_frame_parameters(struct hda_codec *codec,
3240                                                     int channels)
3241 {
3242         unsigned int chanmask;
3243         int chan = channels ? (channels - 1) : 1;
3244
3245         switch (channels) {
3246         default:
3247         case 0:
3248         case 2:
3249                 chanmask = 0x00;
3250                 break;
3251         case 4:
3252                 chanmask = 0x08;
3253                 break;
3254         case 6:
3255                 chanmask = 0x0b;
3256                 break;
3257         case 8:
3258                 chanmask = 0x13;
3259                 break;
3260         }
3261
3262         /* Set the audio infoframe channel allocation and checksum fields.  The
3263          * channel count is computed implicitly by the hardware. */
3264         snd_hda_codec_write(codec, 0x1, 0,
3265                         Nv_VERB_SET_Channel_Allocation, chanmask);
3266
3267         snd_hda_codec_write(codec, 0x1, 0,
3268                         Nv_VERB_SET_Info_Frame_Checksum,
3269                         (0x71 - chan - chanmask));
3270 }
3271
3272 static int nvhdmi_8ch_7x_pcm_close(struct hda_pcm_stream *hinfo,
3273                                    struct hda_codec *codec,
3274                                    struct snd_pcm_substream *substream)
3275 {
3276         struct hdmi_spec *spec = codec->spec;
3277         int i;
3278
3279         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x,
3280                         0, AC_VERB_SET_CHANNEL_STREAMID, 0);
3281         for (i = 0; i < 4; i++) {
3282                 /* set the stream id */
3283                 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
3284                                 AC_VERB_SET_CHANNEL_STREAMID, 0);
3285                 /* set the stream format */
3286                 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
3287                                 AC_VERB_SET_STREAM_FORMAT, 0);
3288         }
3289
3290         /* The audio hardware sends a channel count of 0x7 (8ch) when all the
3291          * streams are disabled. */
3292         nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
3293
3294         return snd_hda_multi_out_dig_close(codec, &spec->multiout);
3295 }
3296
3297 static int nvhdmi_8ch_7x_pcm_prepare(struct hda_pcm_stream *hinfo,
3298                                      struct hda_codec *codec,
3299                                      unsigned int stream_tag,
3300                                      unsigned int format,
3301                                      struct snd_pcm_substream *substream)
3302 {
3303         int chs;
3304         unsigned int dataDCC2, channel_id;
3305         int i;
3306         struct hdmi_spec *spec = codec->spec;
3307         struct hda_spdif_out *spdif;
3308         struct hdmi_spec_per_cvt *per_cvt;
3309
3310         mutex_lock(&codec->spdif_mutex);
3311         per_cvt = get_cvt(spec, 0);
3312         spdif = snd_hda_spdif_out_of_nid(codec, per_cvt->cvt_nid);
3313
3314         chs = substream->runtime->channels;
3315
3316         dataDCC2 = 0x2;
3317
3318         /* turn off SPDIF once; otherwise the IEC958 bits won't be updated */
3319         if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE))
3320                 snd_hda_codec_write(codec,
3321                                 nvhdmi_master_con_nid_7x,
3322                                 0,
3323                                 AC_VERB_SET_DIGI_CONVERT_1,
3324                                 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
3325
3326         /* set the stream id */
3327         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
3328                         AC_VERB_SET_CHANNEL_STREAMID, (stream_tag << 4) | 0x0);
3329
3330         /* set the stream format */
3331         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
3332                         AC_VERB_SET_STREAM_FORMAT, format);
3333
3334         /* turn on again (if needed) */
3335         /* enable and set the channel status audio/data flag */
3336         if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE)) {
3337                 snd_hda_codec_write(codec,
3338                                 nvhdmi_master_con_nid_7x,
3339                                 0,
3340                                 AC_VERB_SET_DIGI_CONVERT_1,
3341                                 spdif->ctls & 0xff);
3342                 snd_hda_codec_write(codec,
3343                                 nvhdmi_master_con_nid_7x,
3344                                 0,
3345                                 AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
3346         }
3347
3348         for (i = 0; i < 4; i++) {
3349                 if (chs == 2)
3350                         channel_id = 0;
3351                 else
3352                         channel_id = i * 2;
3353
3354                 /* turn off SPDIF once;
3355                  *otherwise the IEC958 bits won't be updated
3356                  */
3357                 if (codec->spdif_status_reset &&
3358                 (spdif->ctls & AC_DIG1_ENABLE))
3359                         snd_hda_codec_write(codec,
3360                                 nvhdmi_con_nids_7x[i],
3361                                 0,
3362                                 AC_VERB_SET_DIGI_CONVERT_1,
3363                                 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
3364                 /* set the stream id */
3365                 snd_hda_codec_write(codec,
3366                                 nvhdmi_con_nids_7x[i],
3367                                 0,
3368                                 AC_VERB_SET_CHANNEL_STREAMID,
3369                                 (stream_tag << 4) | channel_id);
3370                 /* set the stream format */
3371                 snd_hda_codec_write(codec,
3372                                 nvhdmi_con_nids_7x[i],
3373                                 0,
3374                                 AC_VERB_SET_STREAM_FORMAT,
3375                                 format);
3376                 /* turn on again (if needed) */
3377                 /* enable and set the channel status audio/data flag */
3378                 if (codec->spdif_status_reset &&
3379                 (spdif->ctls & AC_DIG1_ENABLE)) {
3380                         snd_hda_codec_write(codec,
3381                                         nvhdmi_con_nids_7x[i],
3382                                         0,
3383                                         AC_VERB_SET_DIGI_CONVERT_1,
3384                                         spdif->ctls & 0xff);
3385                         snd_hda_codec_write(codec,
3386                                         nvhdmi_con_nids_7x[i],
3387                                         0,
3388                                         AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
3389                 }
3390         }
3391
3392         nvhdmi_8ch_7x_set_info_frame_parameters(codec, chs);
3393
3394         mutex_unlock(&codec->spdif_mutex);
3395         return 0;
3396 }
3397
3398 static const struct hda_pcm_stream nvhdmi_pcm_playback_8ch_7x = {
3399         .substreams = 1,
3400         .channels_min = 2,
3401         .channels_max = 8,
3402         .nid = nvhdmi_master_con_nid_7x,
3403         .rates = SUPPORTED_RATES,
3404         .maxbps = SUPPORTED_MAXBPS,
3405         .formats = SUPPORTED_FORMATS,
3406         .ops = {
3407                 .open = simple_playback_pcm_open,
3408                 .close = nvhdmi_8ch_7x_pcm_close,
3409                 .prepare = nvhdmi_8ch_7x_pcm_prepare
3410         },
3411 };
3412
3413 static int patch_nvhdmi_2ch(struct hda_codec *codec)
3414 {
3415         struct hdmi_spec *spec;
3416         int err = patch_simple_hdmi(codec, nvhdmi_master_con_nid_7x,
3417                                     nvhdmi_master_pin_nid_7x);
3418         if (err < 0)
3419                 return err;
3420
3421         codec->patch_ops.init = nvhdmi_7x_init_2ch;
3422         /* override the PCM rates, etc, as the codec doesn't give full list */
3423         spec = codec->spec;
3424         spec->pcm_playback.rates = SUPPORTED_RATES;
3425         spec->pcm_playback.maxbps = SUPPORTED_MAXBPS;
3426         spec->pcm_playback.formats = SUPPORTED_FORMATS;
3427         return 0;
3428 }
3429
3430 static int nvhdmi_7x_8ch_build_pcms(struct hda_codec *codec)
3431 {
3432         struct hdmi_spec *spec = codec->spec;
3433         int err = simple_playback_build_pcms(codec);
3434         if (!err) {
3435                 struct hda_pcm *info = get_pcm_rec(spec, 0);
3436                 info->own_chmap = true;
3437         }
3438         return err;
3439 }
3440
3441 static int nvhdmi_7x_8ch_build_controls(struct hda_codec *codec)
3442 {
3443         struct hdmi_spec *spec = codec->spec;
3444         struct hda_pcm *info;
3445         struct snd_pcm_chmap *chmap;
3446         int err;
3447
3448         err = simple_playback_build_controls(codec);
3449         if (err < 0)
3450                 return err;
3451
3452         /* add channel maps */
3453         info = get_pcm_rec(spec, 0);
3454         err = snd_pcm_add_chmap_ctls(info->pcm,
3455                                      SNDRV_PCM_STREAM_PLAYBACK,
3456                                      snd_pcm_alt_chmaps, 8, 0, &chmap);
3457         if (err < 0)
3458                 return err;
3459         switch (codec->preset->vendor_id) {
3460         case 0x10de0002:
3461         case 0x10de0003:
3462         case 0x10de0005:
3463         case 0x10de0006:
3464                 chmap->channel_mask = (1U << 2) | (1U << 8);
3465                 break;
3466         case 0x10de0007:
3467                 chmap->channel_mask = (1U << 2) | (1U << 6) | (1U << 8);
3468         }
3469         return 0;
3470 }
3471
3472 static int patch_nvhdmi_8ch_7x(struct hda_codec *codec)
3473 {
3474         struct hdmi_spec *spec;
3475         int err = patch_nvhdmi_2ch(codec);
3476         if (err < 0)
3477                 return err;
3478         spec = codec->spec;
3479         spec->multiout.max_channels = 8;
3480         spec->pcm_playback = nvhdmi_pcm_playback_8ch_7x;
3481         codec->patch_ops.init = nvhdmi_7x_init_8ch;
3482         codec->patch_ops.build_pcms = nvhdmi_7x_8ch_build_pcms;
3483         codec->patch_ops.build_controls = nvhdmi_7x_8ch_build_controls;
3484
3485         /* Initialize the audio infoframe channel mask and checksum to something
3486          * valid */
3487         nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
3488
3489         return 0;
3490 }
3491
3492 /*
3493  * NVIDIA codecs ignore ASP mapping for 2ch - confirmed on:
3494  * - 0x10de0015
3495  * - 0x10de0040
3496  */
3497 static int nvhdmi_chmap_cea_alloc_validate_get_type(struct hdac_chmap *chmap,
3498                 struct hdac_cea_channel_speaker_allocation *cap, int channels)
3499 {
3500         if (cap->ca_index == 0x00 && channels == 2)
3501                 return SNDRV_CTL_TLVT_CHMAP_FIXED;
3502
3503         /* If the speaker allocation matches the channel count, it is OK. */
3504         if (cap->channels != channels)
3505                 return -1;
3506
3507         /* all channels are remappable freely */
3508         return SNDRV_CTL_TLVT_CHMAP_VAR;
3509 }
3510
3511 static int nvhdmi_chmap_validate(struct hdac_chmap *chmap,
3512                 int ca, int chs, unsigned char *map)
3513 {
3514         if (ca == 0x00 && (map[0] != SNDRV_CHMAP_FL || map[1] != SNDRV_CHMAP_FR))
3515                 return -EINVAL;
3516
3517         return 0;
3518 }
3519
3520 static int patch_nvhdmi(struct hda_codec *codec)
3521 {
3522         struct hdmi_spec *spec;
3523         int err;
3524
3525         err = patch_generic_hdmi(codec);
3526         if (err)
3527                 return err;
3528
3529         spec = codec->spec;
3530         spec->dyn_pin_out = true;
3531
3532         spec->chmap.ops.chmap_cea_alloc_validate_get_type =
3533                 nvhdmi_chmap_cea_alloc_validate_get_type;
3534         spec->chmap.ops.chmap_validate = nvhdmi_chmap_validate;
3535
3536         codec->link_down_at_suspend = 1;
3537
3538         return 0;
3539 }
3540
3541 /*
3542  * The HDA codec on NVIDIA Tegra contains two scratch registers that are
3543  * accessed using vendor-defined verbs. These registers can be used for
3544  * interoperability between the HDA and HDMI drivers.
3545  */
3546
3547 /* Audio Function Group node */
3548 #define NVIDIA_AFG_NID 0x01
3549
3550 /*
3551  * The SCRATCH0 register is used to notify the HDMI codec of changes in audio
3552  * format. On Tegra, bit 31 is used as a trigger that causes an interrupt to
3553  * be raised in the HDMI codec. The remainder of the bits is arbitrary. This
3554  * implementation stores the HDA format (see AC_FMT_*) in bits [15:0] and an
3555  * additional bit (at position 30) to signal the validity of the format.
3556  *
3557  * | 31      | 30    | 29  16 | 15   0 |
3558  * +---------+-------+--------+--------+
3559  * | TRIGGER | VALID | UNUSED | FORMAT |
3560  * +-----------------------------------|
3561  *
3562  * Note that for the trigger bit to take effect it needs to change value
3563  * (i.e. it needs to be toggled).
3564  */
3565 #define NVIDIA_GET_SCRATCH0             0xfa6
3566 #define NVIDIA_SET_SCRATCH0_BYTE0       0xfa7
3567 #define NVIDIA_SET_SCRATCH0_BYTE1       0xfa8
3568 #define NVIDIA_SET_SCRATCH0_BYTE2       0xfa9
3569 #define NVIDIA_SET_SCRATCH0_BYTE3       0xfaa
3570 #define NVIDIA_SCRATCH_TRIGGER (1 << 7)
3571 #define NVIDIA_SCRATCH_VALID   (1 << 6)
3572
3573 #define NVIDIA_GET_SCRATCH1             0xfab
3574 #define NVIDIA_SET_SCRATCH1_BYTE0       0xfac
3575 #define NVIDIA_SET_SCRATCH1_BYTE1       0xfad
3576 #define NVIDIA_SET_SCRATCH1_BYTE2       0xfae
3577 #define NVIDIA_SET_SCRATCH1_BYTE3       0xfaf
3578
3579 /*
3580  * The format parameter is the HDA audio format (see AC_FMT_*). If set to 0,
3581  * the format is invalidated so that the HDMI codec can be disabled.
3582  */
3583 static void tegra_hdmi_set_format(struct hda_codec *codec, unsigned int format)
3584 {
3585         unsigned int value;
3586
3587         /* bits [31:30] contain the trigger and valid bits */
3588         value = snd_hda_codec_read(codec, NVIDIA_AFG_NID, 0,
3589                                    NVIDIA_GET_SCRATCH0, 0);
3590         value = (value >> 24) & 0xff;
3591
3592         /* bits [15:0] are used to store the HDA format */
3593         snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
3594                             NVIDIA_SET_SCRATCH0_BYTE0,
3595                             (format >> 0) & 0xff);
3596         snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
3597                             NVIDIA_SET_SCRATCH0_BYTE1,
3598                             (format >> 8) & 0xff);
3599
3600         /* bits [16:24] are unused */
3601         snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
3602                             NVIDIA_SET_SCRATCH0_BYTE2, 0);
3603
3604         /*
3605          * Bit 30 signals that the data is valid and hence that HDMI audio can
3606          * be enabled.
3607          */
3608         if (format == 0)
3609                 value &= ~NVIDIA_SCRATCH_VALID;
3610         else
3611                 value |= NVIDIA_SCRATCH_VALID;
3612
3613         /*
3614          * Whenever the trigger bit is toggled, an interrupt is raised in the
3615          * HDMI codec. The HDMI driver will use that as trigger to update its
3616          * configuration.
3617          */
3618         value ^= NVIDIA_SCRATCH_TRIGGER;
3619
3620         snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
3621                             NVIDIA_SET_SCRATCH0_BYTE3, value);
3622 }
3623
3624 static int tegra_hdmi_pcm_prepare(struct hda_pcm_stream *hinfo,
3625                                   struct hda_codec *codec,
3626                                   unsigned int stream_tag,
3627                                   unsigned int format,
3628                                   struct snd_pcm_substream *substream)
3629 {
3630         int err;
3631
3632         err = generic_hdmi_playback_pcm_prepare(hinfo, codec, stream_tag,
3633                                                 format, substream);
3634         if (err < 0)
3635                 return err;
3636
3637         /* notify the HDMI codec of the format change */
3638         tegra_hdmi_set_format(codec, format);
3639
3640         return 0;
3641 }
3642
3643 static int tegra_hdmi_pcm_cleanup(struct hda_pcm_stream *hinfo,
3644                                   struct hda_codec *codec,
3645                                   struct snd_pcm_substream *substream)
3646 {
3647         /* invalidate the format in the HDMI codec */
3648         tegra_hdmi_set_format(codec, 0);
3649
3650         return generic_hdmi_playback_pcm_cleanup(hinfo, codec, substream);
3651 }
3652
3653 static struct hda_pcm *hda_find_pcm_by_type(struct hda_codec *codec, int type)
3654 {
3655         struct hdmi_spec *spec = codec->spec;
3656         unsigned int i;
3657
3658         for (i = 0; i < spec->num_pins; i++) {
3659                 struct hda_pcm *pcm = get_pcm_rec(spec, i);
3660
3661                 if (pcm->pcm_type == type)
3662                         return pcm;
3663         }
3664
3665         return NULL;
3666 }
3667
3668 static int tegra_hdmi_build_pcms(struct hda_codec *codec)
3669 {
3670         struct hda_pcm_stream *stream;
3671         struct hda_pcm *pcm;
3672         int err;
3673
3674         err = generic_hdmi_build_pcms(codec);
3675         if (err < 0)
3676                 return err;
3677
3678         pcm = hda_find_pcm_by_type(codec, HDA_PCM_TYPE_HDMI);
3679         if (!pcm)
3680                 return -ENODEV;
3681
3682         /*
3683          * Override ->prepare() and ->cleanup() operations to notify the HDMI
3684          * codec about format changes.
3685          */
3686         stream = &pcm->stream[SNDRV_PCM_STREAM_PLAYBACK];
3687         stream->ops.prepare = tegra_hdmi_pcm_prepare;
3688         stream->ops.cleanup = tegra_hdmi_pcm_cleanup;
3689
3690         return 0;
3691 }
3692
3693 static int patch_tegra_hdmi(struct hda_codec *codec)
3694 {
3695         struct hdmi_spec *spec;
3696         int err;
3697
3698         err = patch_generic_hdmi(codec);
3699         if (err)
3700                 return err;
3701
3702         codec->depop_delay = 10;
3703         codec->patch_ops.build_pcms = tegra_hdmi_build_pcms;
3704         spec = codec->spec;
3705         spec->chmap.ops.chmap_cea_alloc_validate_get_type =
3706                 nvhdmi_chmap_cea_alloc_validate_get_type;
3707         spec->chmap.ops.chmap_validate = nvhdmi_chmap_validate;
3708
3709         return 0;
3710 }
3711
3712 /*
3713  * ATI/AMD-specific implementations
3714  */
3715
3716 #define is_amdhdmi_rev3_or_later(codec) \
3717         ((codec)->core.vendor_id == 0x1002aa01 && \
3718          ((codec)->core.revision_id & 0xff00) >= 0x0300)
3719 #define has_amd_full_remap_support(codec) is_amdhdmi_rev3_or_later(codec)
3720
3721 /* ATI/AMD specific HDA pin verbs, see the AMD HDA Verbs specification */
3722 #define ATI_VERB_SET_CHANNEL_ALLOCATION 0x771
3723 #define ATI_VERB_SET_DOWNMIX_INFO       0x772
3724 #define ATI_VERB_SET_MULTICHANNEL_01    0x777
3725 #define ATI_VERB_SET_MULTICHANNEL_23    0x778
3726 #define ATI_VERB_SET_MULTICHANNEL_45    0x779
3727 #define ATI_VERB_SET_MULTICHANNEL_67    0x77a
3728 #define ATI_VERB_SET_HBR_CONTROL        0x77c
3729 #define ATI_VERB_SET_MULTICHANNEL_1     0x785
3730 #define ATI_VERB_SET_MULTICHANNEL_3     0x786
3731 #define ATI_VERB_SET_MULTICHANNEL_5     0x787
3732 #define ATI_VERB_SET_MULTICHANNEL_7     0x788
3733 #define ATI_VERB_SET_MULTICHANNEL_MODE  0x789
3734 #define ATI_VERB_GET_CHANNEL_ALLOCATION 0xf71
3735 #define ATI_VERB_GET_DOWNMIX_INFO       0xf72
3736 #define ATI_VERB_GET_MULTICHANNEL_01    0xf77
3737 #define ATI_VERB_GET_MULTICHANNEL_23    0xf78
3738 #define ATI_VERB_GET_MULTICHANNEL_45    0xf79
3739 #define ATI_VERB_GET_MULTICHANNEL_67    0xf7a
3740 #define ATI_VERB_GET_HBR_CONTROL        0xf7c
3741 #define ATI_VERB_GET_MULTICHANNEL_1     0xf85
3742 #define ATI_VERB_GET_MULTICHANNEL_3     0xf86
3743 #define ATI_VERB_GET_MULTICHANNEL_5     0xf87
3744 #define ATI_VERB_GET_MULTICHANNEL_7     0xf88
3745 #define ATI_VERB_GET_MULTICHANNEL_MODE  0xf89
3746
3747 /* AMD specific HDA cvt verbs */
3748 #define ATI_VERB_SET_RAMP_RATE          0x770
3749 #define ATI_VERB_GET_RAMP_RATE          0xf70
3750
3751 #define ATI_OUT_ENABLE 0x1
3752
3753 #define ATI_MULTICHANNEL_MODE_PAIRED    0
3754 #define ATI_MULTICHANNEL_MODE_SINGLE    1
3755
3756 #define ATI_HBR_CAPABLE 0x01
3757 #define ATI_HBR_ENABLE 0x10
3758
3759 static int atihdmi_pin_get_eld(struct hda_codec *codec, hda_nid_t nid,
3760                            unsigned char *buf, int *eld_size)
3761 {
3762         /* call hda_eld.c ATI/AMD-specific function */
3763         return snd_hdmi_get_eld_ati(codec, nid, buf, eld_size,
3764                                     is_amdhdmi_rev3_or_later(codec));
3765 }
3766
3767 static void atihdmi_pin_setup_infoframe(struct hda_codec *codec, hda_nid_t pin_nid, int ca,
3768                                         int active_channels, int conn_type)
3769 {
3770         snd_hda_codec_write(codec, pin_nid, 0, ATI_VERB_SET_CHANNEL_ALLOCATION, ca);
3771 }
3772
3773 static int atihdmi_paired_swap_fc_lfe(int pos)
3774 {
3775         /*
3776          * ATI/AMD have automatic FC/LFE swap built-in
3777          * when in pairwise mapping mode.
3778          */
3779
3780         switch (pos) {
3781                 /* see channel_allocations[].speakers[] */
3782                 case 2: return 3;
3783                 case 3: return 2;
3784                 default: break;
3785         }
3786
3787         return pos;
3788 }
3789
3790 static int atihdmi_paired_chmap_validate(struct hdac_chmap *chmap,
3791                         int ca, int chs, unsigned char *map)
3792 {
3793         struct hdac_cea_channel_speaker_allocation *cap;
3794         int i, j;
3795
3796         /* check that only channel pairs need to be remapped on old pre-rev3 ATI/AMD */
3797
3798         cap = snd_hdac_get_ch_alloc_from_ca(ca);
3799         for (i = 0; i < chs; ++i) {
3800                 int mask = snd_hdac_chmap_to_spk_mask(map[i]);
3801                 bool ok = false;
3802                 bool companion_ok = false;
3803
3804                 if (!mask)
3805                         continue;
3806
3807                 for (j = 0 + i % 2; j < 8; j += 2) {
3808                         int chan_idx = 7 - atihdmi_paired_swap_fc_lfe(j);
3809                         if (cap->speakers[chan_idx] == mask) {
3810                                 /* channel is in a supported position */
3811                                 ok = true;
3812
3813                                 if (i % 2 == 0 && i + 1 < chs) {
3814                                         /* even channel, check the odd companion */
3815                                         int comp_chan_idx = 7 - atihdmi_paired_swap_fc_lfe(j + 1);
3816                                         int comp_mask_req = snd_hdac_chmap_to_spk_mask(map[i+1]);
3817                                         int comp_mask_act = cap->speakers[comp_chan_idx];
3818
3819                                         if (comp_mask_req == comp_mask_act)
3820                                                 companion_ok = true;
3821                                         else
3822                                                 return -EINVAL;
3823                                 }
3824                                 break;
3825                         }
3826                 }
3827
3828                 if (!ok)
3829                         return -EINVAL;
3830
3831                 if (companion_ok)
3832                         i++; /* companion channel already checked */
3833         }
3834
3835         return 0;
3836 }
3837
3838 static int atihdmi_pin_set_slot_channel(struct hdac_device *hdac,
3839                 hda_nid_t pin_nid, int hdmi_slot, int stream_channel)
3840 {
3841         struct hda_codec *codec = container_of(hdac, struct hda_codec, core);
3842         int verb;
3843         int ati_channel_setup = 0;
3844
3845         if (hdmi_slot > 7)
3846                 return -EINVAL;
3847
3848         if (!has_amd_full_remap_support(codec)) {
3849                 hdmi_slot = atihdmi_paired_swap_fc_lfe(hdmi_slot);
3850
3851                 /* In case this is an odd slot but without stream channel, do not
3852                  * disable the slot since the corresponding even slot could have a
3853                  * channel. In case neither have a channel, the slot pair will be
3854                  * disabled when this function is called for the even slot. */
3855                 if (hdmi_slot % 2 != 0 && stream_channel == 0xf)
3856                         return 0;
3857
3858                 hdmi_slot -= hdmi_slot % 2;
3859
3860                 if (stream_channel != 0xf)
3861                         stream_channel -= stream_channel % 2;
3862         }
3863
3864         verb = ATI_VERB_SET_MULTICHANNEL_01 + hdmi_slot/2 + (hdmi_slot % 2) * 0x00e;
3865
3866         /* ati_channel_setup format: [7..4] = stream_channel_id, [1] = mute, [0] = enable */
3867
3868         if (stream_channel != 0xf)
3869                 ati_channel_setup = (stream_channel << 4) | ATI_OUT_ENABLE;
3870
3871         return snd_hda_codec_write(codec, pin_nid, 0, verb, ati_channel_setup);
3872 }
3873
3874 static int atihdmi_pin_get_slot_channel(struct hdac_device *hdac,
3875                                 hda_nid_t pin_nid, int asp_slot)
3876 {
3877         struct hda_codec *codec = container_of(hdac, struct hda_codec, core);
3878         bool was_odd = false;
3879         int ati_asp_slot = asp_slot;
3880         int verb;
3881         int ati_channel_setup;
3882
3883         if (asp_slot > 7)
3884                 return -EINVAL;
3885
3886         if (!has_amd_full_remap_support(codec)) {
3887                 ati_asp_slot = atihdmi_paired_swap_fc_lfe(asp_slot);
3888                 if (ati_asp_slot % 2 != 0) {
3889                         ati_asp_slot -= 1;
3890                         was_odd = true;
3891                 }
3892         }
3893
3894         verb = ATI_VERB_GET_MULTICHANNEL_01 + ati_asp_slot/2 + (ati_asp_slot % 2) * 0x00e;
3895
3896         ati_channel_setup = snd_hda_codec_read(codec, pin_nid, 0, verb, 0);
3897
3898         if (!(ati_channel_setup & ATI_OUT_ENABLE))
3899                 return 0xf;
3900
3901         return ((ati_channel_setup & 0xf0) >> 4) + !!was_odd;
3902 }
3903
3904 static int atihdmi_paired_chmap_cea_alloc_validate_get_type(
3905                 struct hdac_chmap *chmap,
3906                 struct hdac_cea_channel_speaker_allocation *cap,
3907                 int channels)
3908 {
3909         int c;
3910
3911         /*
3912          * Pre-rev3 ATI/AMD codecs operate in a paired channel mode, so
3913          * we need to take that into account (a single channel may take 2
3914          * channel slots if we need to carry a silent channel next to it).
3915          * On Rev3+ AMD codecs this function is not used.
3916          */
3917         int chanpairs = 0;
3918
3919         /* We only produce even-numbered channel count TLVs */
3920         if ((channels % 2) != 0)
3921                 return -1;
3922
3923         for (c = 0; c < 7; c += 2) {
3924                 if (cap->speakers[c] || cap->speakers[c+1])
3925                         chanpairs++;
3926         }
3927
3928         if (chanpairs * 2 != channels)
3929                 return -1;
3930
3931         return SNDRV_CTL_TLVT_CHMAP_PAIRED;
3932 }
3933
3934 static void atihdmi_paired_cea_alloc_to_tlv_chmap(struct hdac_chmap *hchmap,
3935                 struct hdac_cea_channel_speaker_allocation *cap,
3936                 unsigned int *chmap, int channels)
3937 {
3938         /* produce paired maps for pre-rev3 ATI/AMD codecs */
3939         int count = 0;
3940         int c;
3941
3942         for (c = 7; c >= 0; c--) {
3943                 int chan = 7 - atihdmi_paired_swap_fc_lfe(7 - c);
3944                 int spk = cap->speakers[chan];
3945                 if (!spk) {
3946                         /* add N/A channel if the companion channel is occupied */
3947                         if (cap->speakers[chan + (chan % 2 ? -1 : 1)])
3948                                 chmap[count++] = SNDRV_CHMAP_NA;
3949
3950                         continue;
3951                 }
3952
3953                 chmap[count++] = snd_hdac_spk_to_chmap(spk);
3954         }
3955
3956         WARN_ON(count != channels);
3957 }
3958
3959 static int atihdmi_pin_hbr_setup(struct hda_codec *codec, hda_nid_t pin_nid,
3960                                  bool hbr)
3961 {
3962         int hbr_ctl, hbr_ctl_new;
3963
3964         hbr_ctl = snd_hda_codec_read(codec, pin_nid, 0, ATI_VERB_GET_HBR_CONTROL, 0);
3965         if (hbr_ctl >= 0 && (hbr_ctl & ATI_HBR_CAPABLE)) {
3966                 if (hbr)
3967                         hbr_ctl_new = hbr_ctl | ATI_HBR_ENABLE;
3968                 else
3969                         hbr_ctl_new = hbr_ctl & ~ATI_HBR_ENABLE;
3970
3971                 codec_dbg(codec,
3972                           "atihdmi_pin_hbr_setup: NID=0x%x, %shbr-ctl=0x%x\n",
3973                                 pin_nid,
3974                                 hbr_ctl == hbr_ctl_new ? "" : "new-",
3975                                 hbr_ctl_new);
3976
3977                 if (hbr_ctl != hbr_ctl_new)
3978                         snd_hda_codec_write(codec, pin_nid, 0,
3979                                                 ATI_VERB_SET_HBR_CONTROL,
3980                                                 hbr_ctl_new);
3981
3982         } else if (hbr)
3983                 return -EINVAL;
3984
3985         return 0;
3986 }
3987
3988 static int atihdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
3989                                 hda_nid_t pin_nid, u32 stream_tag, int format)
3990 {
3991
3992         if (is_amdhdmi_rev3_or_later(codec)) {
3993                 int ramp_rate = 180; /* default as per AMD spec */
3994                 /* disable ramp-up/down for non-pcm as per AMD spec */
3995                 if (format & AC_FMT_TYPE_NON_PCM)
3996                         ramp_rate = 0;
3997
3998                 snd_hda_codec_write(codec, cvt_nid, 0, ATI_VERB_SET_RAMP_RATE, ramp_rate);
3999         }
4000
4001         return hdmi_setup_stream(codec, cvt_nid, pin_nid, stream_tag, format);
4002 }
4003
4004
4005 static int atihdmi_init(struct hda_codec *codec)
4006 {
4007         struct hdmi_spec *spec = codec->spec;
4008         int pin_idx, err;
4009
4010         err = generic_hdmi_init(codec);
4011
4012         if (err)
4013                 return err;
4014
4015         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
4016                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
4017
4018                 /* make sure downmix information in infoframe is zero */
4019                 snd_hda_codec_write(codec, per_pin->pin_nid, 0, ATI_VERB_SET_DOWNMIX_INFO, 0);
4020
4021                 /* enable channel-wise remap mode if supported */
4022                 if (has_amd_full_remap_support(codec))
4023                         snd_hda_codec_write(codec, per_pin->pin_nid, 0,
4024                                             ATI_VERB_SET_MULTICHANNEL_MODE,
4025                                             ATI_MULTICHANNEL_MODE_SINGLE);
4026         }
4027
4028         return 0;
4029 }
4030
4031 /* map from pin NID to port; port is 0-based */
4032 /* for AMD: assume widget NID starting from 3, with step 2 (3, 5, 7, ...) */
4033 static int atihdmi_pin2port(void *audio_ptr, int pin_nid)
4034 {
4035         return pin_nid / 2 - 1;
4036 }
4037
4038 /* reverse-map from port to pin NID: see above */
4039 static int atihdmi_port2pin(struct hda_codec *codec, int port)
4040 {
4041         return port * 2 + 3;
4042 }
4043
4044 static const struct drm_audio_component_audio_ops atihdmi_audio_ops = {
4045         .pin2port = atihdmi_pin2port,
4046         .pin_eld_notify = generic_acomp_pin_eld_notify,
4047         .master_bind = generic_acomp_master_bind,
4048         .master_unbind = generic_acomp_master_unbind,
4049 };
4050
4051 static int patch_atihdmi(struct hda_codec *codec)
4052 {
4053         struct hdmi_spec *spec;
4054         struct hdmi_spec_per_cvt *per_cvt;
4055         int err, cvt_idx;
4056
4057         err = patch_generic_hdmi(codec);
4058
4059         if (err)
4060                 return err;
4061
4062         codec->patch_ops.init = atihdmi_init;
4063
4064         spec = codec->spec;
4065
4066         spec->ops.pin_get_eld = atihdmi_pin_get_eld;
4067         spec->ops.pin_setup_infoframe = atihdmi_pin_setup_infoframe;
4068         spec->ops.pin_hbr_setup = atihdmi_pin_hbr_setup;
4069         spec->ops.setup_stream = atihdmi_setup_stream;
4070
4071         spec->chmap.ops.pin_get_slot_channel = atihdmi_pin_get_slot_channel;
4072         spec->chmap.ops.pin_set_slot_channel = atihdmi_pin_set_slot_channel;
4073
4074         if (!has_amd_full_remap_support(codec)) {
4075                 /* override to ATI/AMD-specific versions with pairwise mapping */
4076                 spec->chmap.ops.chmap_cea_alloc_validate_get_type =
4077                         atihdmi_paired_chmap_cea_alloc_validate_get_type;
4078                 spec->chmap.ops.cea_alloc_to_tlv_chmap =
4079                                 atihdmi_paired_cea_alloc_to_tlv_chmap;
4080                 spec->chmap.ops.chmap_validate = atihdmi_paired_chmap_validate;
4081         }
4082
4083         /* ATI/AMD converters do not advertise all of their capabilities */
4084         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
4085                 per_cvt = get_cvt(spec, cvt_idx);
4086                 per_cvt->channels_max = max(per_cvt->channels_max, 8u);
4087                 per_cvt->rates |= SUPPORTED_RATES;
4088                 per_cvt->formats |= SUPPORTED_FORMATS;
4089                 per_cvt->maxbps = max(per_cvt->maxbps, 24u);
4090         }
4091
4092         spec->chmap.channels_max = max(spec->chmap.channels_max, 8u);
4093
4094         /* AMD GPUs have neither EPSS nor CLKSTOP bits, hence preventing
4095          * the link-down as is.  Tell the core to allow it.
4096          */
4097         codec->link_down_at_suspend = 1;
4098
4099         generic_acomp_init(codec, &atihdmi_audio_ops, atihdmi_port2pin);
4100
4101         return 0;
4102 }
4103
4104 /* VIA HDMI Implementation */
4105 #define VIAHDMI_CVT_NID 0x02    /* audio converter1 */
4106 #define VIAHDMI_PIN_NID 0x03    /* HDMI output pin1 */
4107
4108 static int patch_via_hdmi(struct hda_codec *codec)
4109 {
4110         return patch_simple_hdmi(codec, VIAHDMI_CVT_NID, VIAHDMI_PIN_NID);
4111 }
4112
4113 /*
4114  * patch entries
4115  */
4116 static const struct hda_device_id snd_hda_id_hdmi[] = {
4117 HDA_CODEC_ENTRY(0x1002793c, "RS600 HDMI",       patch_atihdmi),
4118 HDA_CODEC_ENTRY(0x10027919, "RS600 HDMI",       patch_atihdmi),
4119 HDA_CODEC_ENTRY(0x1002791a, "RS690/780 HDMI",   patch_atihdmi),
4120 HDA_CODEC_ENTRY(0x1002aa01, "R6xx HDMI",        patch_atihdmi),
4121 HDA_CODEC_ENTRY(0x10951390, "SiI1390 HDMI",     patch_generic_hdmi),
4122 HDA_CODEC_ENTRY(0x10951392, "SiI1392 HDMI",     patch_generic_hdmi),
4123 HDA_CODEC_ENTRY(0x17e80047, "Chrontel HDMI",    patch_generic_hdmi),
4124 HDA_CODEC_ENTRY(0x10de0001, "MCP73 HDMI",       patch_nvhdmi_2ch),
4125 HDA_CODEC_ENTRY(0x10de0002, "MCP77/78 HDMI",    patch_nvhdmi_8ch_7x),
4126 HDA_CODEC_ENTRY(0x10de0003, "MCP77/78 HDMI",    patch_nvhdmi_8ch_7x),
4127 HDA_CODEC_ENTRY(0x10de0004, "GPU 04 HDMI",      patch_nvhdmi_8ch_7x),
4128 HDA_CODEC_ENTRY(0x10de0005, "MCP77/78 HDMI",    patch_nvhdmi_8ch_7x),
4129 HDA_CODEC_ENTRY(0x10de0006, "MCP77/78 HDMI",    patch_nvhdmi_8ch_7x),
4130 HDA_CODEC_ENTRY(0x10de0007, "MCP79/7A HDMI",    patch_nvhdmi_8ch_7x),
4131 HDA_CODEC_ENTRY(0x10de0008, "GPU 08 HDMI/DP",   patch_nvhdmi),
4132 HDA_CODEC_ENTRY(0x10de0009, "GPU 09 HDMI/DP",   patch_nvhdmi),
4133 HDA_CODEC_ENTRY(0x10de000a, "GPU 0a HDMI/DP",   patch_nvhdmi),
4134 HDA_CODEC_ENTRY(0x10de000b, "GPU 0b HDMI/DP",   patch_nvhdmi),
4135 HDA_CODEC_ENTRY(0x10de000c, "MCP89 HDMI",       patch_nvhdmi),
4136 HDA_CODEC_ENTRY(0x10de000d, "GPU 0d HDMI/DP",   patch_nvhdmi),
4137 HDA_CODEC_ENTRY(0x10de0010, "GPU 10 HDMI/DP",   patch_nvhdmi),
4138 HDA_CODEC_ENTRY(0x10de0011, "GPU 11 HDMI/DP",   patch_nvhdmi),
4139 HDA_CODEC_ENTRY(0x10de0012, "GPU 12 HDMI/DP",   patch_nvhdmi),
4140 HDA_CODEC_ENTRY(0x10de0013, "GPU 13 HDMI/DP",   patch_nvhdmi),
4141 HDA_CODEC_ENTRY(0x10de0014, "GPU 14 HDMI/DP",   patch_nvhdmi),
4142 HDA_CODEC_ENTRY(0x10de0015, "GPU 15 HDMI/DP",   patch_nvhdmi),
4143 HDA_CODEC_ENTRY(0x10de0016, "GPU 16 HDMI/DP",   patch_nvhdmi),
4144 /* 17 is known to be absent */
4145 HDA_CODEC_ENTRY(0x10de0018, "GPU 18 HDMI/DP",   patch_nvhdmi),
4146 HDA_CODEC_ENTRY(0x10de0019, "GPU 19 HDMI/DP",   patch_nvhdmi),
4147 HDA_CODEC_ENTRY(0x10de001a, "GPU 1a HDMI/DP",   patch_nvhdmi),
4148 HDA_CODEC_ENTRY(0x10de001b, "GPU 1b HDMI/DP",   patch_nvhdmi),
4149 HDA_CODEC_ENTRY(0x10de001c, "GPU 1c HDMI/DP",   patch_nvhdmi),
4150 HDA_CODEC_ENTRY(0x10de0020, "Tegra30 HDMI",     patch_tegra_hdmi),
4151 HDA_CODEC_ENTRY(0x10de0022, "Tegra114 HDMI",    patch_tegra_hdmi),
4152 HDA_CODEC_ENTRY(0x10de0028, "Tegra124 HDMI",    patch_tegra_hdmi),
4153 HDA_CODEC_ENTRY(0x10de0029, "Tegra210 HDMI/DP", patch_tegra_hdmi),
4154 HDA_CODEC_ENTRY(0x10de002d, "Tegra186 HDMI/DP0", patch_tegra_hdmi),
4155 HDA_CODEC_ENTRY(0x10de002e, "Tegra186 HDMI/DP1", patch_tegra_hdmi),
4156 HDA_CODEC_ENTRY(0x10de002f, "Tegra194 HDMI/DP2", patch_tegra_hdmi),
4157 HDA_CODEC_ENTRY(0x10de0030, "Tegra194 HDMI/DP3", patch_tegra_hdmi),
4158 HDA_CODEC_ENTRY(0x10de0040, "GPU 40 HDMI/DP",   patch_nvhdmi),
4159 HDA_CODEC_ENTRY(0x10de0041, "GPU 41 HDMI/DP",   patch_nvhdmi),
4160 HDA_CODEC_ENTRY(0x10de0042, "GPU 42 HDMI/DP",   patch_nvhdmi),
4161 HDA_CODEC_ENTRY(0x10de0043, "GPU 43 HDMI/DP",   patch_nvhdmi),
4162 HDA_CODEC_ENTRY(0x10de0044, "GPU 44 HDMI/DP",   patch_nvhdmi),
4163 HDA_CODEC_ENTRY(0x10de0045, "GPU 45 HDMI/DP",   patch_nvhdmi),
4164 HDA_CODEC_ENTRY(0x10de0050, "GPU 50 HDMI/DP",   patch_nvhdmi),
4165 HDA_CODEC_ENTRY(0x10de0051, "GPU 51 HDMI/DP",   patch_nvhdmi),
4166 HDA_CODEC_ENTRY(0x10de0052, "GPU 52 HDMI/DP",   patch_nvhdmi),
4167 HDA_CODEC_ENTRY(0x10de0060, "GPU 60 HDMI/DP",   patch_nvhdmi),
4168 HDA_CODEC_ENTRY(0x10de0061, "GPU 61 HDMI/DP",   patch_nvhdmi),
4169 HDA_CODEC_ENTRY(0x10de0062, "GPU 62 HDMI/DP",   patch_nvhdmi),
4170 HDA_CODEC_ENTRY(0x10de0067, "MCP67 HDMI",       patch_nvhdmi_2ch),
4171 HDA_CODEC_ENTRY(0x10de0070, "GPU 70 HDMI/DP",   patch_nvhdmi),
4172 HDA_CODEC_ENTRY(0x10de0071, "GPU 71 HDMI/DP",   patch_nvhdmi),
4173 HDA_CODEC_ENTRY(0x10de0072, "GPU 72 HDMI/DP",   patch_nvhdmi),
4174 HDA_CODEC_ENTRY(0x10de0073, "GPU 73 HDMI/DP",   patch_nvhdmi),
4175 HDA_CODEC_ENTRY(0x10de0074, "GPU 74 HDMI/DP",   patch_nvhdmi),
4176 HDA_CODEC_ENTRY(0x10de0076, "GPU 76 HDMI/DP",   patch_nvhdmi),
4177 HDA_CODEC_ENTRY(0x10de007b, "GPU 7b HDMI/DP",   patch_nvhdmi),
4178 HDA_CODEC_ENTRY(0x10de007c, "GPU 7c HDMI/DP",   patch_nvhdmi),
4179 HDA_CODEC_ENTRY(0x10de007d, "GPU 7d HDMI/DP",   patch_nvhdmi),
4180 HDA_CODEC_ENTRY(0x10de007e, "GPU 7e HDMI/DP",   patch_nvhdmi),
4181 HDA_CODEC_ENTRY(0x10de0080, "GPU 80 HDMI/DP",   patch_nvhdmi),
4182 HDA_CODEC_ENTRY(0x10de0081, "GPU 81 HDMI/DP",   patch_nvhdmi),
4183 HDA_CODEC_ENTRY(0x10de0082, "GPU 82 HDMI/DP",   patch_nvhdmi),
4184 HDA_CODEC_ENTRY(0x10de0083, "GPU 83 HDMI/DP",   patch_nvhdmi),
4185 HDA_CODEC_ENTRY(0x10de0084, "GPU 84 HDMI/DP",   patch_nvhdmi),
4186 HDA_CODEC_ENTRY(0x10de0090, "GPU 90 HDMI/DP",   patch_nvhdmi),
4187 HDA_CODEC_ENTRY(0x10de0091, "GPU 91 HDMI/DP",   patch_nvhdmi),
4188 HDA_CODEC_ENTRY(0x10de0092, "GPU 92 HDMI/DP",   patch_nvhdmi),
4189 HDA_CODEC_ENTRY(0x10de0093, "GPU 93 HDMI/DP",   patch_nvhdmi),
4190 HDA_CODEC_ENTRY(0x10de0094, "GPU 94 HDMI/DP",   patch_nvhdmi),
4191 HDA_CODEC_ENTRY(0x10de0095, "GPU 95 HDMI/DP",   patch_nvhdmi),
4192 HDA_CODEC_ENTRY(0x10de0097, "GPU 97 HDMI/DP",   patch_nvhdmi),
4193 HDA_CODEC_ENTRY(0x10de0098, "GPU 98 HDMI/DP",   patch_nvhdmi),
4194 HDA_CODEC_ENTRY(0x10de0099, "GPU 99 HDMI/DP",   patch_nvhdmi),
4195 HDA_CODEC_ENTRY(0x10de009a, "GPU 9a HDMI/DP",   patch_nvhdmi),
4196 HDA_CODEC_ENTRY(0x10de009d, "GPU 9d HDMI/DP",   patch_nvhdmi),
4197 HDA_CODEC_ENTRY(0x10de009e, "GPU 9e HDMI/DP",   patch_nvhdmi),
4198 HDA_CODEC_ENTRY(0x10de009f, "GPU 9f HDMI/DP",   patch_nvhdmi),
4199 HDA_CODEC_ENTRY(0x10de00a0, "GPU a0 HDMI/DP",   patch_nvhdmi),
4200 HDA_CODEC_ENTRY(0x10de00a3, "GPU a3 HDMI/DP",   patch_nvhdmi),
4201 HDA_CODEC_ENTRY(0x10de00a4, "GPU a4 HDMI/DP",   patch_nvhdmi),
4202 HDA_CODEC_ENTRY(0x10de00a5, "GPU a5 HDMI/DP",   patch_nvhdmi),
4203 HDA_CODEC_ENTRY(0x10de00a6, "GPU a6 HDMI/DP",   patch_nvhdmi),
4204 HDA_CODEC_ENTRY(0x10de00a7, "GPU a7 HDMI/DP",   patch_nvhdmi),
4205 HDA_CODEC_ENTRY(0x10de8001, "MCP73 HDMI",       patch_nvhdmi_2ch),
4206 HDA_CODEC_ENTRY(0x10de8067, "MCP67/68 HDMI",    patch_nvhdmi_2ch),
4207 HDA_CODEC_ENTRY(0x11069f80, "VX900 HDMI/DP",    patch_via_hdmi),
4208 HDA_CODEC_ENTRY(0x11069f81, "VX900 HDMI/DP",    patch_via_hdmi),
4209 HDA_CODEC_ENTRY(0x11069f84, "VX11 HDMI/DP",     patch_generic_hdmi),
4210 HDA_CODEC_ENTRY(0x11069f85, "VX11 HDMI/DP",     patch_generic_hdmi),
4211 HDA_CODEC_ENTRY(0x80860054, "IbexPeak HDMI",    patch_i915_cpt_hdmi),
4212 HDA_CODEC_ENTRY(0x80862800, "Geminilake HDMI",  patch_i915_glk_hdmi),
4213 HDA_CODEC_ENTRY(0x80862801, "Bearlake HDMI",    patch_generic_hdmi),
4214 HDA_CODEC_ENTRY(0x80862802, "Cantiga HDMI",     patch_generic_hdmi),
4215 HDA_CODEC_ENTRY(0x80862803, "Eaglelake HDMI",   patch_generic_hdmi),
4216 HDA_CODEC_ENTRY(0x80862804, "IbexPeak HDMI",    patch_i915_cpt_hdmi),
4217 HDA_CODEC_ENTRY(0x80862805, "CougarPoint HDMI", patch_i915_cpt_hdmi),
4218 HDA_CODEC_ENTRY(0x80862806, "PantherPoint HDMI", patch_i915_cpt_hdmi),
4219 HDA_CODEC_ENTRY(0x80862807, "Haswell HDMI",     patch_i915_hsw_hdmi),
4220 HDA_CODEC_ENTRY(0x80862808, "Broadwell HDMI",   patch_i915_hsw_hdmi),
4221 HDA_CODEC_ENTRY(0x80862809, "Skylake HDMI",     patch_i915_hsw_hdmi),
4222 HDA_CODEC_ENTRY(0x8086280a, "Broxton HDMI",     patch_i915_hsw_hdmi),
4223 HDA_CODEC_ENTRY(0x8086280b, "Kabylake HDMI",    patch_i915_hsw_hdmi),
4224 HDA_CODEC_ENTRY(0x8086280c, "Cannonlake HDMI",  patch_i915_glk_hdmi),
4225 HDA_CODEC_ENTRY(0x8086280d, "Geminilake HDMI",  patch_i915_glk_hdmi),
4226 HDA_CODEC_ENTRY(0x8086280f, "Icelake HDMI",     patch_i915_icl_hdmi),
4227 HDA_CODEC_ENTRY(0x80862812, "Tigerlake HDMI",   patch_i915_tgl_hdmi),
4228 HDA_CODEC_ENTRY(0x80862814, "DG1 HDMI", patch_i915_tgl_hdmi),
4229 HDA_CODEC_ENTRY(0x80862815, "Alderlake HDMI",   patch_i915_tgl_hdmi),
4230 HDA_CODEC_ENTRY(0x80862816, "Rocketlake HDMI",  patch_i915_tgl_hdmi),
4231 HDA_CODEC_ENTRY(0x80862819, "DG2 HDMI", patch_i915_tgl_hdmi),
4232 HDA_CODEC_ENTRY(0x8086281a, "Jasperlake HDMI",  patch_i915_icl_hdmi),
4233 HDA_CODEC_ENTRY(0x80862880, "CedarTrail HDMI",  patch_generic_hdmi),
4234 HDA_CODEC_ENTRY(0x80862882, "Valleyview2 HDMI", patch_i915_byt_hdmi),
4235 HDA_CODEC_ENTRY(0x80862883, "Braswell HDMI",    patch_i915_byt_hdmi),
4236 HDA_CODEC_ENTRY(0x808629fb, "Crestline HDMI",   patch_generic_hdmi),
4237 /* special ID for generic HDMI */
4238 HDA_CODEC_ENTRY(HDA_CODEC_ID_GENERIC_HDMI, "Generic HDMI", patch_generic_hdmi),
4239 {} /* terminator */
4240 };
4241 MODULE_DEVICE_TABLE(hdaudio, snd_hda_id_hdmi);
4242
4243 MODULE_LICENSE("GPL");
4244 MODULE_DESCRIPTION("HDMI HD-audio codec");
4245 MODULE_ALIAS("snd-hda-codec-intelhdmi");
4246 MODULE_ALIAS("snd-hda-codec-nvhdmi");
4247 MODULE_ALIAS("snd-hda-codec-atihdmi");
4248
4249 static struct hda_codec_driver hdmi_driver = {
4250         .id = snd_hda_id_hdmi,
4251 };
4252
4253 module_hda_codec_driver(hdmi_driver);