sound/pci/hda/patch_hdmi.c

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 /*
   3  *
   4  *  patch_hdmi.c - routines for HDMI/DisplayPort codecs
   5  *
   6  *  Copyright(c) 2008-2010 Intel Corporation. All rights reserved.
   7  *  Copyright (c) 2006 ATI Technologies Inc.
   8  *  Copyright (c) 2008 NVIDIA Corp.  All rights reserved.
   9  *  Copyright (c) 2008 Wei Ni <wni@nvidia.com>
  10  *  Copyright (c) 2013 Anssi Hannula <anssi.hannula@iki.fi>
  11  *
  12  *  Authors:
  13  *                      Wu Fengguang <wfg@linux.intel.com>
  14  *
  15  *  Maintained by:
  16  *                      Wu Fengguang <wfg@linux.intel.com>
  17  */
  18
  19 #include <linux/init.h>
  20 #include <linux/delay.h>
  21 #include <linux/pci.h>
  22 #include <linux/slab.h>
  23 #include <linux/module.h>
  24 #include <linux/pm_runtime.h>
  25 #include <sound/core.h>
  26 #include <sound/jack.h>
  27 #include <sound/asoundef.h>
  28 #include <sound/tlv.h>
  29 #include <sound/hdaudio.h>
  30 #include <sound/hda_i915.h>
  31 #include <sound/hda_chmap.h>
  32 #include <sound/hda_codec.h>
  33 #include "hda_local.h"
  34 #include "hda_jack.h"
  35 #include "hda_controller.h"
  36
  37 static bool static_hdmi_pcm;
  38 module_param(static_hdmi_pcm, bool, 0644);
  39 MODULE_PARM_DESC(static_hdmi_pcm, "Don't restrict PCM parameters per ELD info");
  40
  41 static bool enable_acomp = true;
  42 module_param(enable_acomp, bool, 0444);
  43 MODULE_PARM_DESC(enable_acomp, "Enable audio component binding (default=yes)");
  44
  45 static bool enable_silent_stream =
  46 IS_ENABLED(CONFIG_SND_HDA_INTEL_HDMI_SILENT_STREAM);
  47 module_param(enable_silent_stream, bool, 0644);
  48 MODULE_PARM_DESC(enable_silent_stream, "Enable Silent Stream for HDMI devices");
  49
  50 static bool enable_all_pins;
  51 module_param(enable_all_pins, bool, 0444);
  52 MODULE_PARM_DESC(enable_all_pins, "Forcibly enable all pins");
  53
  54 struct hdmi_spec_per_cvt {
  55         hda_nid_t cvt_nid;
  56         int assigned;
  57         unsigned int channels_min;
  58         unsigned int channels_max;
  59         u32 rates;
  60         u64 formats;
  61         unsigned int maxbps;
  62 };
  63
  64 /* max. connections to a widget */
  65 #define HDA_MAX_CONNECTIONS     32
  66
  67 struct hdmi_spec_per_pin {
  68         hda_nid_t pin_nid;
  69         int dev_id;
  70         /* pin idx, different device entries on the same pin use the same idx */
  71         int pin_nid_idx;
  72         int num_mux_nids;
  73         hda_nid_t mux_nids[HDA_MAX_CONNECTIONS];
  74         int mux_idx;
  75         hda_nid_t cvt_nid;
  76
  77         struct hda_codec *codec;
  78         struct hdmi_eld sink_eld;
  79         struct mutex lock;
  80         struct delayed_work work;
  81         struct hdmi_pcm *pcm; /* pointer to spec->pcm_rec[n] dynamically*/
  82         int pcm_idx; /* which pcm is attached. -1 means no pcm is attached */
  83         int repoll_count;
  84         bool setup; /* the stream has been set up by prepare callback */
  85         bool silent_stream;
  86         int channels; /* current number of channels */
  87         bool non_pcm;
  88         bool chmap_set;         /* channel-map override by ALSA API? */
  89         unsigned char chmap[8]; /* ALSA API channel-map */
  90 #ifdef CONFIG_SND_PROC_FS
  91         struct snd_info_entry *proc_entry;
  92 #endif
  93 };
  94
  95 /* operations used by generic code that can be overridden by patches */
  96 struct hdmi_ops {
  97         int (*pin_get_eld)(struct hda_codec *codec, hda_nid_t pin_nid,
  98                            int dev_id, unsigned char *buf, int *eld_size);
  99
 100         void (*pin_setup_infoframe)(struct hda_codec *codec, hda_nid_t pin_nid,
 101                                     int dev_id,
 102                                     int ca, int active_channels, int conn_type);
 103
 104         /* enable/disable HBR (HD passthrough) */
 105         int (*pin_hbr_setup)(struct hda_codec *codec, hda_nid_t pin_nid,
 106                              int dev_id, bool hbr);
 107
 108         int (*setup_stream)(struct hda_codec *codec, hda_nid_t cvt_nid,
 109                             hda_nid_t pin_nid, int dev_id, u32 stream_tag,
 110                             int format);
 111
 112         void (*pin_cvt_fixup)(struct hda_codec *codec,
 113                               struct hdmi_spec_per_pin *per_pin,
 114                               hda_nid_t cvt_nid);
 115 };
 116
 117 struct hdmi_pcm {
 118         struct hda_pcm *pcm;
 119         struct snd_jack *jack;
 120         struct snd_kcontrol *eld_ctl;
 121 };
 122
 123 struct hdmi_spec {
 124         struct hda_codec *codec;
 125         int num_cvts;
 126         struct snd_array cvts; /* struct hdmi_spec_per_cvt */
 127         hda_nid_t cvt_nids[4]; /* only for haswell fix */
 128
 129         /*
 130          * num_pins is the number of virtual pins
 131          * for example, there are 3 pins, and each pin
 132          * has 4 device entries, then the num_pins is 12
 133          */
 134         int num_pins;
 135         /*
 136          * num_nids is the number of real pins
 137          * In the above example, num_nids is 3
 138          */
 139         int num_nids;
 140         /*
 141          * dev_num is the number of device entries
 142          * on each pin.
 143          * In the above example, dev_num is 4
 144          */
 145         int dev_num;
 146         struct snd_array pins; /* struct hdmi_spec_per_pin */
 147         struct hdmi_pcm pcm_rec[16];
 148         struct mutex pcm_lock;
 149         struct mutex bind_lock; /* for audio component binding */
 150         /* pcm_bitmap means which pcms have been assigned to pins*/
 151         unsigned long pcm_bitmap;
 152         int pcm_used;   /* counter of pcm_rec[] */
 153         /* bitmap shows whether the pcm is opened in user space
 154          * bit 0 means the first playback PCM (PCM3);
 155          * bit 1 means the second playback PCM, and so on.
 156          */
 157         unsigned long pcm_in_use;
 158
 159         struct hdmi_eld temp_eld;
 160         struct hdmi_ops ops;
 161
 162         bool dyn_pin_out;
 163         bool dyn_pcm_assign;
 164         bool dyn_pcm_no_legacy;
 165         bool nv_dp_workaround; /* workaround DP audio infoframe for Nvidia */
 166
 167         bool intel_hsw_fixup;   /* apply Intel platform-specific fixups */
 168         /*
 169          * Non-generic VIA/NVIDIA specific
 170          */
 171         struct hda_multi_out multiout;
 172         struct hda_pcm_stream pcm_playback;
 173
 174         bool use_acomp_notifier; /* use eld_notify callback for hotplug */
 175         bool acomp_registered; /* audio component registered in this driver */
 176         bool force_connect; /* force connectivity */
 177         struct drm_audio_component_audio_ops drm_audio_ops;
 178         int (*port2pin)(struct hda_codec *, int); /* reverse port/pin mapping */
 179
 180         struct hdac_chmap chmap;
 181         hda_nid_t vendor_nid;
 182         const int *port_map;
 183         int port_num;
 184         bool send_silent_stream; /* Flag to enable silent stream feature */
 185 };
 186
 187 #ifdef CONFIG_SND_HDA_COMPONENT
 188 static inline bool codec_has_acomp(struct hda_codec *codec)
 189 {
 190         struct hdmi_spec *spec = codec->spec;
 191         return spec->use_acomp_notifier;
 192 }
 193 #else
 194 #define codec_has_acomp(codec)  false
 195 #endif
 196
 197 struct hdmi_audio_infoframe {
 198         u8 type; /* 0x84 */
 199         u8 ver;  /* 0x01 */
 200         u8 len;  /* 0x0a */
 201
 202         u8 checksum;
 203
 204         u8 CC02_CT47;   /* CC in bits 0:2, CT in 4:7 */
 205         u8 SS01_SF24;
 206         u8 CXT04;
 207         u8 CA;
 208         u8 LFEPBL01_LSV36_DM_INH7;
 209 };
 210
 211 struct dp_audio_infoframe {
 212         u8 type; /* 0x84 */
 213         u8 len;  /* 0x1b */
 214         u8 ver;  /* 0x11 << 2 */
 215
 216         u8 CC02_CT47;   /* match with HDMI infoframe from this on */
 217         u8 SS01_SF24;
 218         u8 CXT04;
 219         u8 CA;
 220         u8 LFEPBL01_LSV36_DM_INH7;
 221 };
 222
 223 union audio_infoframe {
 224         struct hdmi_audio_infoframe hdmi;
 225         struct dp_audio_infoframe dp;
 226         u8 bytes[0];
 227 };
 228
 229 /*
 230  * HDMI routines
 231  */
 232
 233 #define get_pin(spec, idx) \
 234         ((struct hdmi_spec_per_pin *)snd_array_elem(&spec->pins, idx))
 235 #define get_cvt(spec, idx) \
 236         ((struct hdmi_spec_per_cvt  *)snd_array_elem(&spec->cvts, idx))
 237 /* obtain hdmi_pcm object assigned to idx */
 238 #define get_hdmi_pcm(spec, idx) (&(spec)->pcm_rec[idx])
 239 /* obtain hda_pcm object assigned to idx */
 240 #define get_pcm_rec(spec, idx)  (get_hdmi_pcm(spec, idx)->pcm)
 241
 242 static int pin_id_to_pin_index(struct hda_codec *codec,
 243                                hda_nid_t pin_nid, int dev_id)
 244 {
 245         struct hdmi_spec *spec = codec->spec;
 246         int pin_idx;
 247         struct hdmi_spec_per_pin *per_pin;
 248
 249         /*
 250          * (dev_id == -1) means it is NON-MST pin
 251          * return the first virtual pin on this port
 252          */
 253         if (dev_id == -1)
 254                 dev_id = 0;
 255
 256         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
 257                 per_pin = get_pin(spec, pin_idx);
 258                 if ((per_pin->pin_nid == pin_nid) &&
 259                         (per_pin->dev_id == dev_id))
 260                         return pin_idx;
 261         }
 262
 263         codec_warn(codec, "HDMI: pin NID 0x%x not registered\n", pin_nid);
 264         return -EINVAL;
 265 }
 266
 267 static int hinfo_to_pcm_index(struct hda_codec *codec,
 268                         struct hda_pcm_stream *hinfo)
 269 {
 270         struct hdmi_spec *spec = codec->spec;
 271         int pcm_idx;
 272
 273         for (pcm_idx = 0; pcm_idx < spec->pcm_used; pcm_idx++)
 274                 if (get_pcm_rec(spec, pcm_idx)->stream == hinfo)
 275                         return pcm_idx;
 276
 277         codec_warn(codec, "HDMI: hinfo %p not tied to a PCM\n", hinfo);
 278         return -EINVAL;
 279 }
 280
 281 static int hinfo_to_pin_index(struct hda_codec *codec,
 282                               struct hda_pcm_stream *hinfo)
 283 {
 284         struct hdmi_spec *spec = codec->spec;
 285         struct hdmi_spec_per_pin *per_pin;
 286         int pin_idx;
 287
 288         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
 289                 per_pin = get_pin(spec, pin_idx);
 290                 if (per_pin->pcm &&
 291                         per_pin->pcm->pcm->stream == hinfo)
 292                         return pin_idx;
 293         }
 294
 295         codec_dbg(codec, "HDMI: hinfo %p (pcm %d) not registered\n", hinfo,
 296                   hinfo_to_pcm_index(codec, hinfo));
 297         return -EINVAL;
 298 }
 299
 300 static struct hdmi_spec_per_pin *pcm_idx_to_pin(struct hdmi_spec *spec,
 301                                                 int pcm_idx)
 302 {
 303         int i;
 304         struct hdmi_spec_per_pin *per_pin;
 305
 306         for (i = 0; i < spec->num_pins; i++) {
 307                 per_pin = get_pin(spec, i);
 308                 if (per_pin->pcm_idx == pcm_idx)
 309                         return per_pin;
 310         }
 311         return NULL;
 312 }
 313
 314 static int cvt_nid_to_cvt_index(struct hda_codec *codec, hda_nid_t cvt_nid)
 315 {
 316         struct hdmi_spec *spec = codec->spec;
 317         int cvt_idx;
 318
 319         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++)
 320                 if (get_cvt(spec, cvt_idx)->cvt_nid == cvt_nid)
 321                         return cvt_idx;
 322
 323         codec_warn(codec, "HDMI: cvt NID 0x%x not registered\n", cvt_nid);
 324         return -EINVAL;
 325 }
 326
 327 static int hdmi_eld_ctl_info(struct snd_kcontrol *kcontrol,
 328                         struct snd_ctl_elem_info *uinfo)
 329 {
 330         struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
 331         struct hdmi_spec *spec = codec->spec;
 332         struct hdmi_spec_per_pin *per_pin;
 333         struct hdmi_eld *eld;
 334         int pcm_idx;
 335
 336         uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
 337
 338         pcm_idx = kcontrol->private_value;
 339         mutex_lock(&spec->pcm_lock);
 340         per_pin = pcm_idx_to_pin(spec, pcm_idx);
 341         if (!per_pin) {
 342                 /* no pin is bound to the pcm */
 343                 uinfo->count = 0;
 344                 goto unlock;
 345         }
 346         eld = &per_pin->sink_eld;
 347         uinfo->count = eld->eld_valid ? eld->eld_size : 0;
 348
 349  unlock:
 350         mutex_unlock(&spec->pcm_lock);
 351         return 0;
 352 }
 353
 354 static int hdmi_eld_ctl_get(struct snd_kcontrol *kcontrol,
 355                         struct snd_ctl_elem_value *ucontrol)
 356 {
 357         struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
 358         struct hdmi_spec *spec = codec->spec;
 359         struct hdmi_spec_per_pin *per_pin;
 360         struct hdmi_eld *eld;
 361         int pcm_idx;
 362         int err = 0;
 363
 364         pcm_idx = kcontrol->private_value;
 365         mutex_lock(&spec->pcm_lock);
 366         per_pin = pcm_idx_to_pin(spec, pcm_idx);
 367         if (!per_pin) {
 368                 /* no pin is bound to the pcm */
 369                 memset(ucontrol->value.bytes.data, 0,
 370                        ARRAY_SIZE(ucontrol->value.bytes.data));
 371                 goto unlock;
 372         }
 373
 374         eld = &per_pin->sink_eld;
 375         if (eld->eld_size > ARRAY_SIZE(ucontrol->value.bytes.data) ||
 376             eld->eld_size > ELD_MAX_SIZE) {
 377                 snd_BUG();
 378                 err = -EINVAL;
 379                 goto unlock;
 380         }
 381
 382         memset(ucontrol->value.bytes.data, 0,
 383                ARRAY_SIZE(ucontrol->value.bytes.data));
 384         if (eld->eld_valid)
 385                 memcpy(ucontrol->value.bytes.data, eld->eld_buffer,
 386                        eld->eld_size);
 387
 388  unlock:
 389         mutex_unlock(&spec->pcm_lock);
 390         return err;
 391 }
 392
 393 static const struct snd_kcontrol_new eld_bytes_ctl = {
 394         .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE |
 395                 SNDRV_CTL_ELEM_ACCESS_SKIP_CHECK,
 396         .iface = SNDRV_CTL_ELEM_IFACE_PCM,
 397         .name = "ELD",
 398         .info = hdmi_eld_ctl_info,
 399         .get = hdmi_eld_ctl_get,
 400 };
 401
 402 static int hdmi_create_eld_ctl(struct hda_codec *codec, int pcm_idx,
 403                         int device)
 404 {
 405         struct snd_kcontrol *kctl;
 406         struct hdmi_spec *spec = codec->spec;
 407         int err;
 408
 409         kctl = snd_ctl_new1(&eld_bytes_ctl, codec);
 410         if (!kctl)
 411                 return -ENOMEM;
 412         kctl->private_value = pcm_idx;
 413         kctl->id.device = device;
 414
 415         /* no pin nid is associated with the kctl now
 416          * tbd: associate pin nid to eld ctl later
 417          */
 418         err = snd_hda_ctl_add(codec, 0, kctl);
 419         if (err < 0)
 420                 return err;
 421
 422         get_hdmi_pcm(spec, pcm_idx)->eld_ctl = kctl;
 423         return 0;
 424 }
 425
 426 #ifdef BE_PARANOID
 427 static void hdmi_get_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
 428                                 int *packet_index, int *byte_index)
 429 {
 430         int val;
 431
 432         val = snd_hda_codec_read(codec, pin_nid, 0,
 433                                  AC_VERB_GET_HDMI_DIP_INDEX, 0);
 434
 435         *packet_index = val >> 5;
 436         *byte_index = val & 0x1f;
 437 }
 438 #endif
 439
 440 static void hdmi_set_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
 441                                 int packet_index, int byte_index)
 442 {
 443         int val;
 444
 445         val = (packet_index << 5) | (byte_index & 0x1f);
 446
 447         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_INDEX, val);
 448 }
 449
 450 static void hdmi_write_dip_byte(struct hda_codec *codec, hda_nid_t pin_nid,
 451                                 unsigned char val)
 452 {
 453         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_DATA, val);
 454 }
 455
 456 static void hdmi_init_pin(struct hda_codec *codec, hda_nid_t pin_nid)
 457 {
 458         struct hdmi_spec *spec = codec->spec;
 459         int pin_out;
 460
 461         /* Unmute */
 462         if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP)
 463                 snd_hda_codec_write(codec, pin_nid, 0,
 464                                 AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE);
 465
 466         if (spec->dyn_pin_out)
 467                 /* Disable pin out until stream is active */
 468                 pin_out = 0;
 469         else
 470                 /* Enable pin out: some machines with GM965 gets broken output
 471                  * when the pin is disabled or changed while using with HDMI
 472                  */
 473                 pin_out = PIN_OUT;
 474
 475         snd_hda_codec_write(codec, pin_nid, 0,
 476                             AC_VERB_SET_PIN_WIDGET_CONTROL, pin_out);
 477 }
 478
 479 /*
 480  * ELD proc files
 481  */
 482
 483 #ifdef CONFIG_SND_PROC_FS
 484 static void print_eld_info(struct snd_info_entry *entry,
 485                            struct snd_info_buffer *buffer)
 486 {
 487         struct hdmi_spec_per_pin *per_pin = entry->private_data;
 488
 489         mutex_lock(&per_pin->lock);
 490         snd_hdmi_print_eld_info(&per_pin->sink_eld, buffer);
 491         mutex_unlock(&per_pin->lock);
 492 }
 493
 494 static void write_eld_info(struct snd_info_entry *entry,
 495                            struct snd_info_buffer *buffer)
 496 {
 497         struct hdmi_spec_per_pin *per_pin = entry->private_data;
 498
 499         mutex_lock(&per_pin->lock);
 500         snd_hdmi_write_eld_info(&per_pin->sink_eld, buffer);
 501         mutex_unlock(&per_pin->lock);
 502 }
 503
 504 static int eld_proc_new(struct hdmi_spec_per_pin *per_pin, int index)
 505 {
 506         char name[32];
 507         struct hda_codec *codec = per_pin->codec;
 508         struct snd_info_entry *entry;
 509         int err;
 510
 511         snprintf(name, sizeof(name), "eld#%d.%d", codec->addr, index);
 512         err = snd_card_proc_new(codec->card, name, &entry);
 513         if (err < 0)
 514                 return err;
 515
 516         snd_info_set_text_ops(entry, per_pin, print_eld_info);
 517         entry->c.text.write = write_eld_info;
 518         entry->mode |= 0200;
 519         per_pin->proc_entry = entry;
 520
 521         return 0;
 522 }
 523
 524 static void eld_proc_free(struct hdmi_spec_per_pin *per_pin)
 525 {
 526         if (!per_pin->codec->bus->shutdown) {
 527                 snd_info_free_entry(per_pin->proc_entry);
 528                 per_pin->proc_entry = NULL;
 529         }
 530 }
 531 #else
 532 static inline int eld_proc_new(struct hdmi_spec_per_pin *per_pin,
 533                                int index)
 534 {
 535         return 0;
 536 }
 537 static inline void eld_proc_free(struct hdmi_spec_per_pin *per_pin)
 538 {
 539 }
 540 #endif
 541
 542 /*
 543  * Audio InfoFrame routines
 544  */
 545
 546 /*
 547  * Enable Audio InfoFrame Transmission
 548  */
 549 static void hdmi_start_infoframe_trans(struct hda_codec *codec,
 550                                        hda_nid_t pin_nid)
 551 {
 552         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 553         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
 554                                                 AC_DIPXMIT_BEST);
 555 }
 556
 557 /*
 558  * Disable Audio InfoFrame Transmission
 559  */
 560 static void hdmi_stop_infoframe_trans(struct hda_codec *codec,
 561                                       hda_nid_t pin_nid)
 562 {
 563         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 564         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
 565                                                 AC_DIPXMIT_DISABLE);
 566 }
 567
 568 static void hdmi_debug_dip_size(struct hda_codec *codec, hda_nid_t pin_nid)
 569 {
 570 #ifdef CONFIG_SND_DEBUG_VERBOSE
 571         int i;
 572         int size;
 573
 574         size = snd_hdmi_get_eld_size(codec, pin_nid);
 575         codec_dbg(codec, "HDMI: ELD buf size is %d\n", size);
 576
 577         for (i = 0; i < 8; i++) {
 578                 size = snd_hda_codec_read(codec, pin_nid, 0,
 579                                                 AC_VERB_GET_HDMI_DIP_SIZE, i);
 580                 codec_dbg(codec, "HDMI: DIP GP[%d] buf size is %d\n", i, size);
 581         }
 582 #endif
 583 }
 584
 585 static void hdmi_clear_dip_buffers(struct hda_codec *codec, hda_nid_t pin_nid)
 586 {
 587 #ifdef BE_PARANOID
 588         int i, j;
 589         int size;
 590         int pi, bi;
 591         for (i = 0; i < 8; i++) {
 592                 size = snd_hda_codec_read(codec, pin_nid, 0,
 593                                                 AC_VERB_GET_HDMI_DIP_SIZE, i);
 594                 if (size == 0)
 595                         continue;
 596
 597                 hdmi_set_dip_index(codec, pin_nid, i, 0x0);
 598                 for (j = 1; j < 1000; j++) {
 599                         hdmi_write_dip_byte(codec, pin_nid, 0x0);
 600                         hdmi_get_dip_index(codec, pin_nid, &pi, &bi);
 601                         if (pi != i)
 602                                 codec_dbg(codec, "dip index %d: %d != %d\n",
 603                                                 bi, pi, i);
 604                         if (bi == 0) /* byte index wrapped around */
 605                                 break;
 606                 }
 607                 codec_dbg(codec,
 608                         "HDMI: DIP GP[%d] buf reported size=%d, written=%d\n",
 609                         i, size, j);
 610         }
 611 #endif
 612 }
 613
 614 static void hdmi_checksum_audio_infoframe(struct hdmi_audio_infoframe *hdmi_ai)
 615 {
 616         u8 *bytes = (u8 *)hdmi_ai;
 617         u8 sum = 0;
 618         int i;
 619
 620         hdmi_ai->checksum = 0;
 621
 622         for (i = 0; i < sizeof(*hdmi_ai); i++)
 623                 sum += bytes[i];
 624
 625         hdmi_ai->checksum = -sum;
 626 }
 627
 628 static void hdmi_fill_audio_infoframe(struct hda_codec *codec,
 629                                       hda_nid_t pin_nid,
 630                                       u8 *dip, int size)
 631 {
 632         int i;
 633
 634         hdmi_debug_dip_size(codec, pin_nid);
 635         hdmi_clear_dip_buffers(codec, pin_nid); /* be paranoid */
 636
 637         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 638         for (i = 0; i < size; i++)
 639                 hdmi_write_dip_byte(codec, pin_nid, dip[i]);
 640 }
 641
 642 static bool hdmi_infoframe_uptodate(struct hda_codec *codec, hda_nid_t pin_nid,
 643                                     u8 *dip, int size)
 644 {
 645         u8 val;
 646         int i;
 647
 648         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 649         if (snd_hda_codec_read(codec, pin_nid, 0, AC_VERB_GET_HDMI_DIP_XMIT, 0)
 650                                                             != AC_DIPXMIT_BEST)
 651                 return false;
 652
 653         for (i = 0; i < size; i++) {
 654                 val = snd_hda_codec_read(codec, pin_nid, 0,
 655                                          AC_VERB_GET_HDMI_DIP_DATA, 0);
 656                 if (val != dip[i])
 657                         return false;
 658         }
 659
 660         return true;
 661 }
 662
 663 static int hdmi_pin_get_eld(struct hda_codec *codec, hda_nid_t nid,
 664                             int dev_id, unsigned char *buf, int *eld_size)
 665 {
 666         snd_hda_set_dev_select(codec, nid, dev_id);
 667
 668         return snd_hdmi_get_eld(codec, nid, buf, eld_size);
 669 }
 670
 671 static void hdmi_pin_setup_infoframe(struct hda_codec *codec,
 672                                      hda_nid_t pin_nid, int dev_id,
 673                                      int ca, int active_channels,
 674                                      int conn_type)
 675 {
 676         struct hdmi_spec *spec = codec->spec;
 677         union audio_infoframe ai;
 678
 679         memset(&ai, 0, sizeof(ai));
 680         if ((conn_type == 0) || /* HDMI */
 681                 /* Nvidia DisplayPort: Nvidia HW expects same layout as HDMI */
 682                 (conn_type == 1 && spec->nv_dp_workaround)) {
 683                 struct hdmi_audio_infoframe *hdmi_ai = &ai.hdmi;
 684
 685                 if (conn_type == 0) { /* HDMI */
 686                         hdmi_ai->type           = 0x84;
 687                         hdmi_ai->ver            = 0x01;
 688                         hdmi_ai->len            = 0x0a;
 689                 } else {/* Nvidia DP */
 690                         hdmi_ai->type           = 0x84;
 691                         hdmi_ai->ver            = 0x1b;
 692                         hdmi_ai->len            = 0x11 << 2;
 693                 }
 694                 hdmi_ai->CC02_CT47      = active_channels - 1;
 695                 hdmi_ai->CA             = ca;
 696                 hdmi_checksum_audio_infoframe(hdmi_ai);
 697         } else if (conn_type == 1) { /* DisplayPort */
 698                 struct dp_audio_infoframe *dp_ai = &ai.dp;
 699
 700                 dp_ai->type             = 0x84;
 701                 dp_ai->len              = 0x1b;
 702                 dp_ai->ver              = 0x11 << 2;
 703                 dp_ai->CC02_CT47        = active_channels - 1;
 704                 dp_ai->CA               = ca;
 705         } else {
 706                 codec_dbg(codec, "HDMI: unknown connection type at pin NID 0x%x\n", pin_nid);
 707                 return;
 708         }
 709
 710         snd_hda_set_dev_select(codec, pin_nid, dev_id);
 711
 712         /*
 713          * sizeof(ai) is used instead of sizeof(*hdmi_ai) or
 714          * sizeof(*dp_ai) to avoid partial match/update problems when
 715          * the user switches between HDMI/DP monitors.
 716          */
 717         if (!hdmi_infoframe_uptodate(codec, pin_nid, ai.bytes,
 718                                         sizeof(ai))) {
 719                 codec_dbg(codec, "%s: pin NID=0x%x channels=%d ca=0x%02x\n",
 720                           __func__, pin_nid, active_channels, ca);
 721                 hdmi_stop_infoframe_trans(codec, pin_nid);
 722                 hdmi_fill_audio_infoframe(codec, pin_nid,
 723                                             ai.bytes, sizeof(ai));
 724                 hdmi_start_infoframe_trans(codec, pin_nid);
 725         }
 726 }
 727
 728 static void hdmi_setup_audio_infoframe(struct hda_codec *codec,
 729                                        struct hdmi_spec_per_pin *per_pin,
 730                                        bool non_pcm)
 731 {
 732         struct hdmi_spec *spec = codec->spec;
 733         struct hdac_chmap *chmap = &spec->chmap;
 734         hda_nid_t pin_nid = per_pin->pin_nid;
 735         int dev_id = per_pin->dev_id;
 736         int channels = per_pin->channels;
 737         int active_channels;
 738         struct hdmi_eld *eld;
 739         int ca;
 740
 741         if (!channels)
 742                 return;
 743
 744         snd_hda_set_dev_select(codec, pin_nid, dev_id);
 745
 746         /* some HW (e.g. HSW+) needs reprogramming the amp at each time */
 747         if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP)
 748                 snd_hda_codec_write(codec, pin_nid, 0,
 749                                             AC_VERB_SET_AMP_GAIN_MUTE,
 750                                             AMP_OUT_UNMUTE);
 751
 752         eld = &per_pin->sink_eld;
 753
 754         ca = snd_hdac_channel_allocation(&codec->core,
 755                         eld->info.spk_alloc, channels,
 756                         per_pin->chmap_set, non_pcm, per_pin->chmap);
 757
 758         active_channels = snd_hdac_get_active_channels(ca);
 759
 760         chmap->ops.set_channel_count(&codec->core, per_pin->cvt_nid,
 761                                                 active_channels);
 762
 763         /*
 764          * always configure channel mapping, it may have been changed by the
 765          * user in the meantime
 766          */
 767         snd_hdac_setup_channel_mapping(&spec->chmap,
 768                                 pin_nid, non_pcm, ca, channels,
 769                                 per_pin->chmap, per_pin->chmap_set);
 770
 771         spec->ops.pin_setup_infoframe(codec, pin_nid, dev_id,
 772                                       ca, active_channels, eld->info.conn_type);
 773
 774         per_pin->non_pcm = non_pcm;
 775 }
 776
 777 /*
 778  * Unsolicited events
 779  */
 780
 781 static void hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll);
 782
 783 static void check_presence_and_report(struct hda_codec *codec, hda_nid_t nid,
 784                                       int dev_id)
 785 {
 786         struct hdmi_spec *spec = codec->spec;
 787         int pin_idx = pin_id_to_pin_index(codec, nid, dev_id);
 788
 789         if (pin_idx < 0)
 790                 return;
 791         mutex_lock(&spec->pcm_lock);
 792         hdmi_present_sense(get_pin(spec, pin_idx), 1);
 793         mutex_unlock(&spec->pcm_lock);
 794 }
 795
 796 static void jack_callback(struct hda_codec *codec,
 797                           struct hda_jack_callback *jack)
 798 {
 799         /* stop polling when notification is enabled */
 800         if (codec_has_acomp(codec))
 801                 return;
 802
 803         check_presence_and_report(codec, jack->nid, jack->dev_id);
 804 }
 805
 806 static void hdmi_intrinsic_event(struct hda_codec *codec, unsigned int res,
 807                                  struct hda_jack_tbl *jack)
 808 {
 809         jack->jack_dirty = 1;
 810
 811         codec_dbg(codec,
 812                 "HDMI hot plug event: Codec=%d NID=0x%x Device=%d Inactive=%d Presence_Detect=%d ELD_Valid=%d\n",
 813                 codec->addr, jack->nid, jack->dev_id, !!(res & AC_UNSOL_RES_IA),
 814                 !!(res & AC_UNSOL_RES_PD), !!(res & AC_UNSOL_RES_ELDV));
 815
 816         check_presence_and_report(codec, jack->nid, jack->dev_id);
 817 }
 818
 819 static void hdmi_non_intrinsic_event(struct hda_codec *codec, unsigned int res)
 820 {
 821         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
 822         int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
 823         int cp_state = !!(res & AC_UNSOL_RES_CP_STATE);
 824         int cp_ready = !!(res & AC_UNSOL_RES_CP_READY);
 825
 826         codec_info(codec,
 827                 "HDMI CP event: CODEC=%d TAG=%d SUBTAG=0x%x CP_STATE=%d CP_READY=%d\n",
 828                 codec->addr,
 829                 tag,
 830                 subtag,
 831                 cp_state,
 832                 cp_ready);
 833
 834         /* TODO */
 835         if (cp_state) {
 836                 ;
 837         }
 838         if (cp_ready) {
 839                 ;
 840         }
 841 }
 842
 843
 844 static void hdmi_unsol_event(struct hda_codec *codec, unsigned int res)
 845 {
 846         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
 847         int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
 848         struct hda_jack_tbl *jack;
 849
 850         if (codec_has_acomp(codec))
 851                 return;
 852
 853         if (codec->dp_mst) {
 854                 int dev_entry =
 855                         (res & AC_UNSOL_RES_DE) >> AC_UNSOL_RES_DE_SHIFT;
 856
 857                 jack = snd_hda_jack_tbl_get_from_tag(codec, tag, dev_entry);
 858         } else {
 859                 jack = snd_hda_jack_tbl_get_from_tag(codec, tag, 0);
 860         }
 861
 862         if (!jack) {
 863                 codec_dbg(codec, "Unexpected HDMI event tag 0x%x\n", tag);
 864                 return;
 865         }
 866
 867         if (subtag == 0)
 868                 hdmi_intrinsic_event(codec, res, jack);
 869         else
 870                 hdmi_non_intrinsic_event(codec, res);
 871 }
 872
 873 static void haswell_verify_D0(struct hda_codec *codec,
 874                 hda_nid_t cvt_nid, hda_nid_t nid)
 875 {
 876         int pwr;
 877
 878         /* For Haswell, the converter 1/2 may keep in D3 state after bootup,
 879          * thus pins could only choose converter 0 for use. Make sure the
 880          * converters are in correct power state */
 881         if (!snd_hda_check_power_state(codec, cvt_nid, AC_PWRST_D0))
 882                 snd_hda_codec_write(codec, cvt_nid, 0, AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
 883
 884         if (!snd_hda_check_power_state(codec, nid, AC_PWRST_D0)) {
 885                 snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_POWER_STATE,
 886                                     AC_PWRST_D0);
 887                 msleep(40);
 888                 pwr = snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_POWER_STATE, 0);
 889                 pwr = (pwr & AC_PWRST_ACTUAL) >> AC_PWRST_ACTUAL_SHIFT;
 890                 codec_dbg(codec, "Haswell HDMI audio: Power for NID 0x%x is now D%d\n", nid, pwr);
 891         }
 892 }
 893
 894 /*
 895  * Callbacks
 896  */
 897
 898 /* HBR should be Non-PCM, 8 channels */
 899 #define is_hbr_format(format) \
 900         ((format & AC_FMT_TYPE_NON_PCM) && (format & AC_FMT_CHAN_MASK) == 7)
 901
 902 static int hdmi_pin_hbr_setup(struct hda_codec *codec, hda_nid_t pin_nid,
 903                               int dev_id, bool hbr)
 904 {
 905         int pinctl, new_pinctl;
 906
 907         if (snd_hda_query_pin_caps(codec, pin_nid) & AC_PINCAP_HBR) {
 908                 snd_hda_set_dev_select(codec, pin_nid, dev_id);
 909                 pinctl = snd_hda_codec_read(codec, pin_nid, 0,
 910                                             AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
 911
 912                 if (pinctl < 0)
 913                         return hbr ? -EINVAL : 0;
 914
 915                 new_pinctl = pinctl & ~AC_PINCTL_EPT;
 916                 if (hbr)
 917                         new_pinctl |= AC_PINCTL_EPT_HBR;
 918                 else
 919                         new_pinctl |= AC_PINCTL_EPT_NATIVE;
 920
 921                 codec_dbg(codec,
 922                           "hdmi_pin_hbr_setup: NID=0x%x, %spinctl=0x%x\n",
 923                             pin_nid,
 924                             pinctl == new_pinctl ? "" : "new-",
 925                             new_pinctl);
 926
 927                 if (pinctl != new_pinctl)
 928                         snd_hda_codec_write(codec, pin_nid, 0,
 929                                             AC_VERB_SET_PIN_WIDGET_CONTROL,
 930                                             new_pinctl);
 931         } else if (hbr)
 932                 return -EINVAL;
 933
 934         return 0;
 935 }
 936
 937 static int hdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
 938                               hda_nid_t pin_nid, int dev_id,
 939                               u32 stream_tag, int format)
 940 {
 941         struct hdmi_spec *spec = codec->spec;
 942         unsigned int param;
 943         int err;
 944
 945         err = spec->ops.pin_hbr_setup(codec, pin_nid, dev_id,
 946                                       is_hbr_format(format));
 947
 948         if (err) {
 949                 codec_dbg(codec, "hdmi_setup_stream: HBR is not supported\n");
 950                 return err;
 951         }
 952
 953         if (spec->intel_hsw_fixup) {
 954
 955                 /*
 956                  * on recent platforms IEC Coding Type is required for HBR
 957                  * support, read current Digital Converter settings and set
 958                  * ICT bitfield if needed.
 959                  */
 960                 param = snd_hda_codec_read(codec, cvt_nid, 0,
 961                                            AC_VERB_GET_DIGI_CONVERT_1, 0);
 962
 963                 param = (param >> 16) & ~(AC_DIG3_ICT);
 964
 965                 /* on recent platforms ICT mode is required for HBR support */
 966                 if (is_hbr_format(format))
 967                         param |= 0x1;
 968
 969                 snd_hda_codec_write(codec, cvt_nid, 0,
 970                                     AC_VERB_SET_DIGI_CONVERT_3, param);
 971         }
 972
 973         snd_hda_codec_setup_stream(codec, cvt_nid, stream_tag, 0, format);
 974         return 0;
 975 }
 976
 977 /* Try to find an available converter
 978  * If pin_idx is less then zero, just try to find an available converter.
 979  * Otherwise, try to find an available converter and get the cvt mux index
 980  * of the pin.
 981  */
 982 static int hdmi_choose_cvt(struct hda_codec *codec,
 983                            int pin_idx, int *cvt_id)
 984 {
 985         struct hdmi_spec *spec = codec->spec;
 986         struct hdmi_spec_per_pin *per_pin;
 987         struct hdmi_spec_per_cvt *per_cvt = NULL;
 988         int cvt_idx, mux_idx = 0;
 989
 990         /* pin_idx < 0 means no pin will be bound to the converter */
 991         if (pin_idx < 0)
 992                 per_pin = NULL;
 993         else
 994                 per_pin = get_pin(spec, pin_idx);
 995
 996         if (per_pin && per_pin->silent_stream) {
 997                 cvt_idx = cvt_nid_to_cvt_index(codec, per_pin->cvt_nid);
 998                 if (cvt_id)
 999                         *cvt_id = cvt_idx;
1000                 return 0;
1001         }
1002
1003         /* Dynamically assign converter to stream */
1004         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
1005                 per_cvt = get_cvt(spec, cvt_idx);
1006
1007                 /* Must not already be assigned */
1008                 if (per_cvt->assigned)
1009                         continue;
1010                 if (per_pin == NULL)
1011                         break;
1012                 /* Must be in pin's mux's list of converters */
1013                 for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++)
1014                         if (per_pin->mux_nids[mux_idx] == per_cvt->cvt_nid)
1015                                 break;
1016                 /* Not in mux list */
1017                 if (mux_idx == per_pin->num_mux_nids)
1018                         continue;
1019                 break;
1020         }
1021
1022         /* No free converters */
1023         if (cvt_idx == spec->num_cvts)
1024                 return -EBUSY;
1025
1026         if (per_pin != NULL)
1027                 per_pin->mux_idx = mux_idx;
1028
1029         if (cvt_id)
1030                 *cvt_id = cvt_idx;
1031
1032         return 0;
1033 }
1034
1035 /* Assure the pin select the right convetor */
1036 static void intel_verify_pin_cvt_connect(struct hda_codec *codec,
1037                         struct hdmi_spec_per_pin *per_pin)
1038 {
1039         hda_nid_t pin_nid = per_pin->pin_nid;
1040         int mux_idx, curr;
1041
1042         mux_idx = per_pin->mux_idx;
1043         curr = snd_hda_codec_read(codec, pin_nid, 0,
1044                                           AC_VERB_GET_CONNECT_SEL, 0);
1045         if (curr != mux_idx)
1046                 snd_hda_codec_write_cache(codec, pin_nid, 0,
1047                                             AC_VERB_SET_CONNECT_SEL,
1048                                             mux_idx);
1049 }
1050
1051 /* get the mux index for the converter of the pins
1052  * converter's mux index is the same for all pins on Intel platform
1053  */
1054 static int intel_cvt_id_to_mux_idx(struct hdmi_spec *spec,
1055                         hda_nid_t cvt_nid)
1056 {
1057         int i;
1058
1059         for (i = 0; i < spec->num_cvts; i++)
1060                 if (spec->cvt_nids[i] == cvt_nid)
1061                         return i;
1062         return -EINVAL;
1063 }
1064
1065 /* Intel HDMI workaround to fix audio routing issue:
1066  * For some Intel display codecs, pins share the same connection list.
1067  * So a conveter can be selected by multiple pins and playback on any of these
1068  * pins will generate sound on the external display, because audio flows from
1069  * the same converter to the display pipeline. Also muting one pin may make
1070  * other pins have no sound output.
1071  * So this function assures that an assigned converter for a pin is not selected
1072  * by any other pins.
1073  */
1074 static void intel_not_share_assigned_cvt(struct hda_codec *codec,
1075                                          hda_nid_t pin_nid,
1076                                          int dev_id, int mux_idx)
1077 {
1078         struct hdmi_spec *spec = codec->spec;
1079         hda_nid_t nid;
1080         int cvt_idx, curr;
1081         struct hdmi_spec_per_cvt *per_cvt;
1082         struct hdmi_spec_per_pin *per_pin;
1083         int pin_idx;
1084
1085         /* configure the pins connections */
1086         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1087                 int dev_id_saved;
1088                 int dev_num;
1089
1090                 per_pin = get_pin(spec, pin_idx);
1091                 /*
1092                  * pin not connected to monitor
1093                  * no need to operate on it
1094                  */
1095                 if (!per_pin->pcm)
1096                         continue;
1097
1098                 if ((per_pin->pin_nid == pin_nid) &&
1099                         (per_pin->dev_id == dev_id))
1100                         continue;
1101
1102                 /*
1103                  * if per_pin->dev_id >= dev_num,
1104                  * snd_hda_get_dev_select() will fail,
1105                  * and the following operation is unpredictable.
1106                  * So skip this situation.
1107                  */
1108                 dev_num = snd_hda_get_num_devices(codec, per_pin->pin_nid) + 1;
1109                 if (per_pin->dev_id >= dev_num)
1110                         continue;
1111
1112                 nid = per_pin->pin_nid;
1113
1114                 /*
1115                  * Calling this function should not impact
1116                  * on the device entry selection
1117                  * So let's save the dev id for each pin,
1118                  * and restore it when return
1119                  */
1120                 dev_id_saved = snd_hda_get_dev_select(codec, nid);
1121                 snd_hda_set_dev_select(codec, nid, per_pin->dev_id);
1122                 curr = snd_hda_codec_read(codec, nid, 0,
1123                                           AC_VERB_GET_CONNECT_SEL, 0);
1124                 if (curr != mux_idx) {
1125                         snd_hda_set_dev_select(codec, nid, dev_id_saved);
1126                         continue;
1127                 }
1128
1129
1130                 /* choose an unassigned converter. The conveters in the
1131                  * connection list are in the same order as in the codec.
1132                  */
1133                 for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
1134                         per_cvt = get_cvt(spec, cvt_idx);
1135                         if (!per_cvt->assigned) {
1136                                 codec_dbg(codec,
1137                                           "choose cvt %d for pin NID 0x%x\n",
1138                                           cvt_idx, nid);
1139                                 snd_hda_codec_write_cache(codec, nid, 0,
1140                                             AC_VERB_SET_CONNECT_SEL,
1141                                             cvt_idx);
1142                                 break;
1143                         }
1144                 }
1145                 snd_hda_set_dev_select(codec, nid, dev_id_saved);
1146         }
1147 }
1148
1149 /* A wrapper of intel_not_share_asigned_cvt() */
1150 static void intel_not_share_assigned_cvt_nid(struct hda_codec *codec,
1151                         hda_nid_t pin_nid, int dev_id, hda_nid_t cvt_nid)
1152 {
1153         int mux_idx;
1154         struct hdmi_spec *spec = codec->spec;
1155
1156         /* On Intel platform, the mapping of converter nid to
1157          * mux index of the pins are always the same.
1158          * The pin nid may be 0, this means all pins will not
1159          * share the converter.
1160          */
1161         mux_idx = intel_cvt_id_to_mux_idx(spec, cvt_nid);
1162         if (mux_idx >= 0)
1163                 intel_not_share_assigned_cvt(codec, pin_nid, dev_id, mux_idx);
1164 }
1165
1166 /* skeleton caller of pin_cvt_fixup ops */
1167 static void pin_cvt_fixup(struct hda_codec *codec,
1168                           struct hdmi_spec_per_pin *per_pin,
1169                           hda_nid_t cvt_nid)
1170 {
1171         struct hdmi_spec *spec = codec->spec;
1172
1173         if (spec->ops.pin_cvt_fixup)
1174                 spec->ops.pin_cvt_fixup(codec, per_pin, cvt_nid);
1175 }
1176
1177 /* called in hdmi_pcm_open when no pin is assigned to the PCM
1178  * in dyn_pcm_assign mode.
1179  */
1180 static int hdmi_pcm_open_no_pin(struct hda_pcm_stream *hinfo,
1181                          struct hda_codec *codec,
1182                          struct snd_pcm_substream *substream)
1183 {
1184         struct hdmi_spec *spec = codec->spec;
1185         struct snd_pcm_runtime *runtime = substream->runtime;
1186         int cvt_idx, pcm_idx;
1187         struct hdmi_spec_per_cvt *per_cvt = NULL;
1188         int err;
1189
1190         pcm_idx = hinfo_to_pcm_index(codec, hinfo);
1191         if (pcm_idx < 0)
1192                 return -EINVAL;
1193
1194         err = hdmi_choose_cvt(codec, -1, &cvt_idx);
1195         if (err)
1196                 return err;
1197
1198         per_cvt = get_cvt(spec, cvt_idx);
1199         per_cvt->assigned = 1;
1200         hinfo->nid = per_cvt->cvt_nid;
1201
1202         pin_cvt_fixup(codec, NULL, per_cvt->cvt_nid);
1203
1204         set_bit(pcm_idx, &spec->pcm_in_use);
1205         /* todo: setup spdif ctls assign */
1206
1207         /* Initially set the converter's capabilities */
1208         hinfo->channels_min = per_cvt->channels_min;
1209         hinfo->channels_max = per_cvt->channels_max;
1210         hinfo->rates = per_cvt->rates;
1211         hinfo->formats = per_cvt->formats;
1212         hinfo->maxbps = per_cvt->maxbps;
1213
1214         /* Store the updated parameters */
1215         runtime->hw.channels_min = hinfo->channels_min;
1216         runtime->hw.channels_max = hinfo->channels_max;
1217         runtime->hw.formats = hinfo->formats;
1218         runtime->hw.rates = hinfo->rates;
1219
1220         snd_pcm_hw_constraint_step(substream->runtime, 0,
1221                                    SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1222         return 0;
1223 }
1224
1225 /*
1226  * HDA PCM callbacks
1227  */
1228 static int hdmi_pcm_open(struct hda_pcm_stream *hinfo,
1229                          struct hda_codec *codec,
1230                          struct snd_pcm_substream *substream)
1231 {
1232         struct hdmi_spec *spec = codec->spec;
1233         struct snd_pcm_runtime *runtime = substream->runtime;
1234         int pin_idx, cvt_idx, pcm_idx;
1235         struct hdmi_spec_per_pin *per_pin;
1236         struct hdmi_eld *eld;
1237         struct hdmi_spec_per_cvt *per_cvt = NULL;
1238         int err;
1239
1240         /* Validate hinfo */
1241         pcm_idx = hinfo_to_pcm_index(codec, hinfo);
1242         if (pcm_idx < 0)
1243                 return -EINVAL;
1244
1245         mutex_lock(&spec->pcm_lock);
1246         pin_idx = hinfo_to_pin_index(codec, hinfo);
1247         if (!spec->dyn_pcm_assign) {
1248                 if (snd_BUG_ON(pin_idx < 0)) {
1249                         err = -EINVAL;
1250                         goto unlock;
1251                 }
1252         } else {
1253                 /* no pin is assigned to the PCM
1254                  * PA need pcm open successfully when probe
1255                  */
1256                 if (pin_idx < 0) {
1257                         err = hdmi_pcm_open_no_pin(hinfo, codec, substream);
1258                         goto unlock;
1259                 }
1260         }
1261
1262         err = hdmi_choose_cvt(codec, pin_idx, &cvt_idx);
1263         if (err < 0)
1264                 goto unlock;
1265
1266         per_cvt = get_cvt(spec, cvt_idx);
1267         /* Claim converter */
1268         per_cvt->assigned = 1;
1269
1270         set_bit(pcm_idx, &spec->pcm_in_use);
1271         per_pin = get_pin(spec, pin_idx);
1272         per_pin->cvt_nid = per_cvt->cvt_nid;
1273         per_pin->silent_stream = false;
1274         hinfo->nid = per_cvt->cvt_nid;
1275
1276         /* flip stripe flag for the assigned stream if supported */
1277         if (get_wcaps(codec, per_cvt->cvt_nid) & AC_WCAP_STRIPE)
1278                 azx_stream(get_azx_dev(substream))->stripe = 1;
1279
1280         snd_hda_set_dev_select(codec, per_pin->pin_nid, per_pin->dev_id);
1281         snd_hda_codec_write_cache(codec, per_pin->pin_nid, 0,
1282                             AC_VERB_SET_CONNECT_SEL,
1283                             per_pin->mux_idx);
1284
1285         /* configure unused pins to choose other converters */
1286         pin_cvt_fixup(codec, per_pin, 0);
1287
1288         snd_hda_spdif_ctls_assign(codec, pcm_idx, per_cvt->cvt_nid);
1289
1290         /* Initially set the converter's capabilities */
1291         hinfo->channels_min = per_cvt->channels_min;
1292         hinfo->channels_max = per_cvt->channels_max;
1293         hinfo->rates = per_cvt->rates;
1294         hinfo->formats = per_cvt->formats;
1295         hinfo->maxbps = per_cvt->maxbps;
1296
1297         eld = &per_pin->sink_eld;
1298         /* Restrict capabilities by ELD if this isn't disabled */
1299         if (!static_hdmi_pcm && eld->eld_valid) {
1300                 snd_hdmi_eld_update_pcm_info(&eld->info, hinfo);
1301                 if (hinfo->channels_min > hinfo->channels_max ||
1302                     !hinfo->rates || !hinfo->formats) {
1303                         per_cvt->assigned = 0;
1304                         hinfo->nid = 0;
1305                         snd_hda_spdif_ctls_unassign(codec, pcm_idx);
1306                         err = -ENODEV;
1307                         goto unlock;
1308                 }
1309         }
1310
1311         /* Store the updated parameters */
1312         runtime->hw.channels_min = hinfo->channels_min;
1313         runtime->hw.channels_max = hinfo->channels_max;
1314         runtime->hw.formats = hinfo->formats;
1315         runtime->hw.rates = hinfo->rates;
1316
1317         snd_pcm_hw_constraint_step(substream->runtime, 0,
1318                                    SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1319  unlock:
1320         mutex_unlock(&spec->pcm_lock);
1321         return err;
1322 }
1323
1324 /*
1325  * HDA/HDMI auto parsing
1326  */
1327 static int hdmi_read_pin_conn(struct hda_codec *codec, int pin_idx)
1328 {
1329         struct hdmi_spec *spec = codec->spec;
1330         struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1331         hda_nid_t pin_nid = per_pin->pin_nid;
1332         int dev_id = per_pin->dev_id;
1333         int conns;
1334
1335         if (!(get_wcaps(codec, pin_nid) & AC_WCAP_CONN_LIST)) {
1336                 codec_warn(codec,
1337                            "HDMI: pin NID 0x%x wcaps %#x does not support connection list\n",
1338                            pin_nid, get_wcaps(codec, pin_nid));
1339                 return -EINVAL;
1340         }
1341
1342         snd_hda_set_dev_select(codec, pin_nid, dev_id);
1343
1344         if (spec->intel_hsw_fixup) {
1345                 conns = spec->num_cvts;
1346                 memcpy(per_pin->mux_nids, spec->cvt_nids,
1347                        sizeof(hda_nid_t) * conns);
1348         } else {
1349                 conns = snd_hda_get_raw_connections(codec, pin_nid,
1350                                                     per_pin->mux_nids,
1351                                                     HDA_MAX_CONNECTIONS);
1352         }
1353
1354         /* all the device entries on the same pin have the same conn list */
1355         per_pin->num_mux_nids = conns;
1356
1357         return 0;
1358 }
1359
1360 static int hdmi_find_pcm_slot(struct hdmi_spec *spec,
1361                               struct hdmi_spec_per_pin *per_pin)
1362 {
1363         int i;
1364
1365         /* on the new machines, try to assign the pcm slot dynamically,
1366          * not use the preferred fixed map (legacy way) anymore.
1367          */
1368         if (spec->dyn_pcm_no_legacy)
1369                 goto last_try;
1370
1371         /*
1372          * generic_hdmi_build_pcms() may allocate extra PCMs on some
1373          * platforms (with maximum of 'num_nids + dev_num - 1')
1374          *
1375          * The per_pin of pin_nid_idx=n and dev_id=m prefers to get pcm-n
1376          * if m==0. This guarantees that dynamic pcm assignments are compatible
1377          * with the legacy static per_pin-pcm assignment that existed in the
1378          * days before DP-MST.
1379          *
1380          * Intel DP-MST prefers this legacy behavior for compatibility, too.
1381          *
1382          * per_pin of m!=0 prefers to get pcm=(num_nids + (m - 1)).
1383          */
1384
1385         if (per_pin->dev_id == 0 || spec->intel_hsw_fixup) {
1386                 if (!test_bit(per_pin->pin_nid_idx, &spec->pcm_bitmap))
1387                         return per_pin->pin_nid_idx;
1388         } else {
1389                 i = spec->num_nids + (per_pin->dev_id - 1);
1390                 if (i < spec->pcm_used && !(test_bit(i, &spec->pcm_bitmap)))
1391                         return i;
1392         }
1393
1394         /* have a second try; check the area over num_nids */
1395         for (i = spec->num_nids; i < spec->pcm_used; i++) {
1396                 if (!test_bit(i, &spec->pcm_bitmap))
1397                         return i;
1398         }
1399
1400  last_try:
1401         /* the last try; check the empty slots in pins */
1402         for (i = 0; i < spec->pcm_used; i++) {
1403                 if (!test_bit(i, &spec->pcm_bitmap))
1404                         return i;
1405         }
1406         return -EBUSY;
1407 }
1408
1409 static void hdmi_attach_hda_pcm(struct hdmi_spec *spec,
1410                                 struct hdmi_spec_per_pin *per_pin)
1411 {
1412         int idx;
1413
1414         /* pcm already be attached to the pin */
1415         if (per_pin->pcm)
1416                 return;
1417         idx = hdmi_find_pcm_slot(spec, per_pin);
1418         if (idx == -EBUSY)
1419                 return;
1420         per_pin->pcm_idx = idx;
1421         per_pin->pcm = get_hdmi_pcm(spec, idx);
1422         set_bit(idx, &spec->pcm_bitmap);
1423 }
1424
1425 static void hdmi_detach_hda_pcm(struct hdmi_spec *spec,
1426                                 struct hdmi_spec_per_pin *per_pin)
1427 {
1428         int idx;
1429
1430         /* pcm already be detached from the pin */
1431         if (!per_pin->pcm)
1432                 return;
1433         idx = per_pin->pcm_idx;
1434         per_pin->pcm_idx = -1;
1435         per_pin->pcm = NULL;
1436         if (idx >= 0 && idx < spec->pcm_used)
1437                 clear_bit(idx, &spec->pcm_bitmap);
1438 }
1439
1440 static int hdmi_get_pin_cvt_mux(struct hdmi_spec *spec,
1441                 struct hdmi_spec_per_pin *per_pin, hda_nid_t cvt_nid)
1442 {
1443         int mux_idx;
1444
1445         for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++)
1446                 if (per_pin->mux_nids[mux_idx] == cvt_nid)
1447                         break;
1448         return mux_idx;
1449 }
1450
1451 static bool check_non_pcm_per_cvt(struct hda_codec *codec, hda_nid_t cvt_nid);
1452
1453 static void hdmi_pcm_setup_pin(struct hdmi_spec *spec,
1454                            struct hdmi_spec_per_pin *per_pin)
1455 {
1456         struct hda_codec *codec = per_pin->codec;
1457         struct hda_pcm *pcm;
1458         struct hda_pcm_stream *hinfo;
1459         struct snd_pcm_substream *substream;
1460         int mux_idx;
1461         bool non_pcm;
1462
1463         if (per_pin->pcm_idx >= 0 && per_pin->pcm_idx < spec->pcm_used)
1464                 pcm = get_pcm_rec(spec, per_pin->pcm_idx);
1465         else
1466                 return;
1467         if (!pcm->pcm)
1468                 return;
1469         if (!test_bit(per_pin->pcm_idx, &spec->pcm_in_use))
1470                 return;
1471
1472         /* hdmi audio only uses playback and one substream */
1473         hinfo = pcm->stream;
1474         substream = pcm->pcm->streams[0].substream;
1475
1476         per_pin->cvt_nid = hinfo->nid;
1477
1478         mux_idx = hdmi_get_pin_cvt_mux(spec, per_pin, hinfo->nid);
1479         if (mux_idx < per_pin->num_mux_nids) {
1480                 snd_hda_set_dev_select(codec, per_pin->pin_nid,
1481                                    per_pin->dev_id);
1482                 snd_hda_codec_write_cache(codec, per_pin->pin_nid, 0,
1483                                 AC_VERB_SET_CONNECT_SEL,
1484                                 mux_idx);
1485         }
1486         snd_hda_spdif_ctls_assign(codec, per_pin->pcm_idx, hinfo->nid);
1487
1488         non_pcm = check_non_pcm_per_cvt(codec, hinfo->nid);
1489         if (substream->runtime)
1490                 per_pin->channels = substream->runtime->channels;
1491         per_pin->setup = true;
1492         per_pin->mux_idx = mux_idx;
1493
1494         hdmi_setup_audio_infoframe(codec, per_pin, non_pcm);
1495 }
1496
1497 static void hdmi_pcm_reset_pin(struct hdmi_spec *spec,
1498                            struct hdmi_spec_per_pin *per_pin)
1499 {
1500         if (per_pin->pcm_idx >= 0 && per_pin->pcm_idx < spec->pcm_used)
1501                 snd_hda_spdif_ctls_unassign(per_pin->codec, per_pin->pcm_idx);
1502
1503         per_pin->chmap_set = false;
1504         memset(per_pin->chmap, 0, sizeof(per_pin->chmap));
1505
1506         per_pin->setup = false;
1507         per_pin->channels = 0;
1508 }
1509
1510 static struct snd_jack *pin_idx_to_pcm_jack(struct hda_codec *codec,
1511                                             struct hdmi_spec_per_pin *per_pin)
1512 {
1513         struct hdmi_spec *spec = codec->spec;
1514
1515         if (per_pin->pcm_idx >= 0)
1516                 return spec->pcm_rec[per_pin->pcm_idx].jack;
1517         else
1518                 return NULL;
1519 }
1520
1521 /* update per_pin ELD from the given new ELD;
1522  * setup info frame and notification accordingly
1523  * also notify ELD kctl and report jack status changes
1524  */
1525 static void update_eld(struct hda_codec *codec,
1526                        struct hdmi_spec_per_pin *per_pin,
1527                        struct hdmi_eld *eld,
1528                        int repoll)
1529 {
1530         struct hdmi_eld *pin_eld = &per_pin->sink_eld;
1531         struct hdmi_spec *spec = codec->spec;
1532         struct snd_jack *pcm_jack;
1533         bool old_eld_valid = pin_eld->eld_valid;
1534         bool eld_changed;
1535         int pcm_idx;
1536
1537         if (eld->eld_valid) {
1538                 if (eld->eld_size <= 0 ||
1539                     snd_hdmi_parse_eld(codec, &eld->info, eld->eld_buffer,
1540                                        eld->eld_size) < 0) {
1541                         eld->eld_valid = false;
1542                         if (repoll) {
1543                                 schedule_delayed_work(&per_pin->work,
1544                                                       msecs_to_jiffies(300));
1545                                 return;
1546                         }
1547                 }
1548         }
1549
1550         if (!eld->eld_valid || eld->eld_size <= 0) {
1551                 eld->eld_valid = false;
1552                 eld->eld_size = 0;
1553         }
1554
1555         /* for monitor disconnection, save pcm_idx firstly */
1556         pcm_idx = per_pin->pcm_idx;
1557
1558         /*
1559          * pcm_idx >=0 before update_eld() means it is in monitor
1560          * disconnected event. Jack must be fetched before update_eld().
1561          */
1562         pcm_jack = pin_idx_to_pcm_jack(codec, per_pin);
1563
1564         if (spec->dyn_pcm_assign) {
1565                 if (eld->eld_valid) {
1566                         hdmi_attach_hda_pcm(spec, per_pin);
1567                         hdmi_pcm_setup_pin(spec, per_pin);
1568                 } else {
1569                         hdmi_pcm_reset_pin(spec, per_pin);
1570                         hdmi_detach_hda_pcm(spec, per_pin);
1571                 }
1572         }
1573         /* if pcm_idx == -1, it means this is in monitor connection event
1574          * we can get the correct pcm_idx now.
1575          */
1576         if (pcm_idx == -1)
1577                 pcm_idx = per_pin->pcm_idx;
1578         if (!pcm_jack)
1579                 pcm_jack = pin_idx_to_pcm_jack(codec, per_pin);
1580
1581         if (eld->eld_valid)
1582                 snd_hdmi_show_eld(codec, &eld->info);
1583
1584         eld_changed = (pin_eld->eld_valid != eld->eld_valid);
1585         eld_changed |= (pin_eld->monitor_present != eld->monitor_present);
1586         if (!eld_changed && eld->eld_valid && pin_eld->eld_valid)
1587                 if (pin_eld->eld_size != eld->eld_size ||
1588                     memcmp(pin_eld->eld_buffer, eld->eld_buffer,
1589                            eld->eld_size) != 0)
1590                         eld_changed = true;
1591
1592         if (eld_changed) {
1593                 pin_eld->monitor_present = eld->monitor_present;
1594                 pin_eld->eld_valid = eld->eld_valid;
1595                 pin_eld->eld_size = eld->eld_size;
1596                 if (eld->eld_valid)
1597                         memcpy(pin_eld->eld_buffer, eld->eld_buffer,
1598                                eld->eld_size);
1599                 pin_eld->info = eld->info;
1600         }
1601
1602         /*
1603          * Re-setup pin and infoframe. This is needed e.g. when
1604          * - sink is first plugged-in
1605          * - transcoder can change during stream playback on Haswell
1606          *   and this can make HW reset converter selection on a pin.
1607          */
1608         if (eld->eld_valid && !old_eld_valid && per_pin->setup) {
1609                 pin_cvt_fixup(codec, per_pin, 0);
1610                 hdmi_setup_audio_infoframe(codec, per_pin, per_pin->non_pcm);
1611         }
1612
1613         if (eld_changed && pcm_idx >= 0)
1614                 snd_ctl_notify(codec->card,
1615                                SNDRV_CTL_EVENT_MASK_VALUE |
1616                                SNDRV_CTL_EVENT_MASK_INFO,
1617                                &get_hdmi_pcm(spec, pcm_idx)->eld_ctl->id);
1618
1619         if (eld_changed && pcm_jack)
1620                 snd_jack_report(pcm_jack,
1621                                 (eld->monitor_present && eld->eld_valid) ?
1622                                 SND_JACK_AVOUT : 0);
1623 }
1624
1625 /* update ELD and jack state via HD-audio verbs */
1626 static void hdmi_present_sense_via_verbs(struct hdmi_spec_per_pin *per_pin,
1627                                          int repoll)
1628 {
1629         struct hda_codec *codec = per_pin->codec;
1630         struct hdmi_spec *spec = codec->spec;
1631         struct hdmi_eld *eld = &spec->temp_eld;
1632         struct device *dev = hda_codec_dev(codec);
1633         hda_nid_t pin_nid = per_pin->pin_nid;
1634         int dev_id = per_pin->dev_id;
1635         /*
1636          * Always execute a GetPinSense verb here, even when called from
1637          * hdmi_intrinsic_event; for some NVIDIA HW, the unsolicited
1638          * response's PD bit is not the real PD value, but indicates that
1639          * the real PD value changed. An older version of the HD-audio
1640          * specification worked this way. Hence, we just ignore the data in
1641          * the unsolicited response to avoid custom WARs.
1642          */
1643         int present;
1644         int ret;
1645
1646 #ifdef  CONFIG_PM
1647         if (dev->power.runtime_status == RPM_SUSPENDING)
1648                 return;
1649 #endif
1650
1651         ret = snd_hda_power_up_pm(codec);
1652         if (ret < 0 && pm_runtime_suspended(dev))
1653                 goto out;
1654
1655         present = snd_hda_jack_pin_sense(codec, pin_nid, dev_id);
1656
1657         mutex_lock(&per_pin->lock);
1658         eld->monitor_present = !!(present & AC_PINSENSE_PRESENCE);
1659         if (eld->monitor_present)
1660                 eld->eld_valid  = !!(present & AC_PINSENSE_ELDV);
1661         else
1662                 eld->eld_valid = false;
1663
1664         codec_dbg(codec,
1665                 "HDMI status: Codec=%d NID=0x%x Presence_Detect=%d ELD_Valid=%d\n",
1666                 codec->addr, pin_nid, eld->monitor_present, eld->eld_valid);
1667
1668         if (eld->eld_valid) {
1669                 if (spec->ops.pin_get_eld(codec, pin_nid, dev_id,
1670                                           eld->eld_buffer, &eld->eld_size) < 0)
1671                         eld->eld_valid = false;
1672         }
1673
1674         update_eld(codec, per_pin, eld, repoll);
1675         mutex_unlock(&per_pin->lock);
1676  out:
1677         snd_hda_power_down_pm(codec);
1678 }
1679
1680 #define I915_SILENT_RATE                48000
1681 #define I915_SILENT_CHANNELS            2
1682 #define I915_SILENT_FORMAT              SNDRV_PCM_FORMAT_S16_LE
1683 #define I915_SILENT_FORMAT_BITS 16
1684 #define I915_SILENT_FMT_MASK            0xf
1685
1686 static void silent_stream_enable(struct hda_codec *codec,
1687                                  struct hdmi_spec_per_pin *per_pin)
1688 {
1689         struct hdmi_spec *spec = codec->spec;
1690         struct hdmi_spec_per_cvt *per_cvt;
1691         int cvt_idx, pin_idx, err;
1692         unsigned int format;
1693
1694         mutex_lock(&per_pin->lock);
1695
1696         if (per_pin->setup) {
1697                 codec_dbg(codec, "hdmi: PCM already open, no silent stream\n");
1698                 goto unlock_out;
1699         }
1700
1701         pin_idx = pin_id_to_pin_index(codec, per_pin->pin_nid, per_pin->dev_id);
1702         err = hdmi_choose_cvt(codec, pin_idx, &cvt_idx);
1703         if (err) {
1704                 codec_err(codec, "hdmi: no free converter to enable silent mode\n");
1705                 goto unlock_out;
1706         }
1707
1708         per_cvt = get_cvt(spec, cvt_idx);
1709         per_cvt->assigned = 1;
1710         per_pin->cvt_nid = per_cvt->cvt_nid;
1711         per_pin->silent_stream = true;
1712
1713         codec_dbg(codec, "hdmi: enabling silent stream pin-NID=0x%x cvt-NID=0x%x\n",
1714                   per_pin->pin_nid, per_cvt->cvt_nid);
1715
1716         snd_hda_set_dev_select(codec, per_pin->pin_nid, per_pin->dev_id);
1717         snd_hda_codec_write_cache(codec, per_pin->pin_nid, 0,
1718                                   AC_VERB_SET_CONNECT_SEL,
1719                                   per_pin->mux_idx);
1720
1721         /* configure unused pins to choose other converters */
1722         pin_cvt_fixup(codec, per_pin, 0);
1723
1724         snd_hdac_sync_audio_rate(&codec->core, per_pin->pin_nid,
1725                                  per_pin->dev_id, I915_SILENT_RATE);
1726
1727         /* trigger silent stream generation in hw */
1728         format = snd_hdac_calc_stream_format(I915_SILENT_RATE, I915_SILENT_CHANNELS,
1729                                              I915_SILENT_FORMAT, I915_SILENT_FORMAT_BITS, 0);
1730         snd_hda_codec_setup_stream(codec, per_pin->cvt_nid,
1731                                    I915_SILENT_FMT_MASK, I915_SILENT_FMT_MASK, format);
1732         usleep_range(100, 200);
1733         snd_hda_codec_setup_stream(codec, per_pin->cvt_nid, I915_SILENT_FMT_MASK, 0, format);
1734
1735         per_pin->channels = I915_SILENT_CHANNELS;
1736         hdmi_setup_audio_infoframe(codec, per_pin, per_pin->non_pcm);
1737
1738  unlock_out:
1739         mutex_unlock(&per_pin->lock);
1740 }
1741
1742 static void silent_stream_disable(struct hda_codec *codec,
1743                                   struct hdmi_spec_per_pin *per_pin)
1744 {
1745         struct hdmi_spec *spec = codec->spec;
1746         struct hdmi_spec_per_cvt *per_cvt;
1747         int cvt_idx;
1748
1749         mutex_lock(&per_pin->lock);
1750         if (!per_pin->silent_stream)
1751                 goto unlock_out;
1752
1753         codec_dbg(codec, "HDMI: disable silent stream on pin-NID=0x%x cvt-NID=0x%x\n",
1754                   per_pin->pin_nid, per_pin->cvt_nid);
1755
1756         cvt_idx = cvt_nid_to_cvt_index(codec, per_pin->cvt_nid);
1757         if (cvt_idx >= 0 && cvt_idx < spec->num_cvts) {
1758                 per_cvt = get_cvt(spec, cvt_idx);
1759                 per_cvt->assigned = 0;
1760         }
1761
1762         per_pin->cvt_nid = 0;
1763         per_pin->silent_stream = false;
1764
1765  unlock_out:
1766         mutex_unlock(&per_pin->lock);
1767 }
1768
1769 /* update ELD and jack state via audio component */
1770 static void sync_eld_via_acomp(struct hda_codec *codec,
1771                                struct hdmi_spec_per_pin *per_pin)
1772 {
1773         struct hdmi_spec *spec = codec->spec;
1774         struct hdmi_eld *eld = &spec->temp_eld;
1775         bool monitor_prev, monitor_next;
1776
1777         mutex_lock(&per_pin->lock);
1778         eld->monitor_present = false;
1779         monitor_prev = per_pin->sink_eld.monitor_present;
1780         eld->eld_size = snd_hdac_acomp_get_eld(&codec->core, per_pin->pin_nid,
1781                                       per_pin->dev_id, &eld->monitor_present,
1782                                       eld->eld_buffer, ELD_MAX_SIZE);
1783         eld->eld_valid = (eld->eld_size > 0);
1784         update_eld(codec, per_pin, eld, 0);
1785         monitor_next = per_pin->sink_eld.monitor_present;
1786         mutex_unlock(&per_pin->lock);
1787
1788         /*
1789          * Power-up will call hdmi_present_sense, so the PM calls
1790          * have to be done without mutex held.
1791          */
1792
1793         if (spec->send_silent_stream) {
1794                 int pm_ret;
1795
1796                 if (!monitor_prev && monitor_next) {
1797                         pm_ret = snd_hda_power_up_pm(codec);
1798                         if (pm_ret < 0)
1799                                 codec_err(codec,
1800                                 "Monitor plugged-in, Failed to power up codec ret=[%d]\n",
1801                                 pm_ret);
1802                         silent_stream_enable(codec, per_pin);
1803                 } else if (monitor_prev && !monitor_next) {
1804                         silent_stream_disable(codec, per_pin);
1805                         pm_ret = snd_hda_power_down_pm(codec);
1806                         if (pm_ret < 0)
1807                                 codec_err(codec,
1808                                 "Monitor plugged-out, Failed to power down codec ret=[%d]\n",
1809                                 pm_ret);
1810                 }
1811         }
1812 }
1813
1814 static void hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll)
1815 {
1816         struct hda_codec *codec = per_pin->codec;
1817
1818         if (!codec_has_acomp(codec))
1819                 hdmi_present_sense_via_verbs(per_pin, repoll);
1820         else
1821                 sync_eld_via_acomp(codec, per_pin);
1822 }
1823
1824 static void hdmi_repoll_eld(struct work_struct *work)
1825 {
1826         struct hdmi_spec_per_pin *per_pin =
1827         container_of(to_delayed_work(work), struct hdmi_spec_per_pin, work);
1828         struct hda_codec *codec = per_pin->codec;
1829         struct hdmi_spec *spec = codec->spec;
1830         struct hda_jack_tbl *jack;
1831
1832         jack = snd_hda_jack_tbl_get_mst(codec, per_pin->pin_nid,
1833                                         per_pin->dev_id);
1834         if (jack)
1835                 jack->jack_dirty = 1;
1836
1837         if (per_pin->repoll_count++ > 6)
1838                 per_pin->repoll_count = 0;
1839
1840         mutex_lock(&spec->pcm_lock);
1841         hdmi_present_sense(per_pin, per_pin->repoll_count);
1842         mutex_unlock(&spec->pcm_lock);
1843 }
1844
1845 static int hdmi_add_pin(struct hda_codec *codec, hda_nid_t pin_nid)
1846 {
1847         struct hdmi_spec *spec = codec->spec;
1848         unsigned int caps, config;
1849         int pin_idx;
1850         struct hdmi_spec_per_pin *per_pin;
1851         int err;
1852         int dev_num, i;
1853
1854         caps = snd_hda_query_pin_caps(codec, pin_nid);
1855         if (!(caps & (AC_PINCAP_HDMI | AC_PINCAP_DP)))
1856                 return 0;
1857
1858         /*
1859          * For DP MST audio, Configuration Default is the same for
1860          * all device entries on the same pin
1861          */
1862         config = snd_hda_codec_get_pincfg(codec, pin_nid);
1863         if (get_defcfg_connect(config) == AC_JACK_PORT_NONE &&
1864             !spec->force_connect)
1865                 return 0;
1866
1867         /*
1868          * To simplify the implementation, malloc all
1869          * the virtual pins in the initialization statically
1870          */
1871         if (spec->intel_hsw_fixup) {
1872                 /*
1873                  * On Intel platforms, device entries count returned
1874                  * by AC_PAR_DEVLIST_LEN is dynamic, and depends on
1875                  * the type of receiver that is connected. Allocate pin
1876                  * structures based on worst case.
1877                  */
1878                 dev_num = spec->dev_num;
1879         } else if (spec->dyn_pcm_assign && codec->dp_mst) {
1880                 dev_num = snd_hda_get_num_devices(codec, pin_nid) + 1;
1881                 /*
1882                  * spec->dev_num is the maxinum number of device entries
1883                  * among all the pins
1884                  */
1885                 spec->dev_num = (spec->dev_num > dev_num) ?
1886                         spec->dev_num : dev_num;
1887         } else {
1888                 /*
1889                  * If the platform doesn't support DP MST,
1890                  * manually set dev_num to 1. This means
1891                  * the pin has only one device entry.
1892                  */
1893                 dev_num = 1;
1894                 spec->dev_num = 1;
1895         }
1896
1897         for (i = 0; i < dev_num; i++) {
1898                 pin_idx = spec->num_pins;
1899                 per_pin = snd_array_new(&spec->pins);
1900
1901                 if (!per_pin)
1902                         return -ENOMEM;
1903
1904                 if (spec->dyn_pcm_assign) {
1905                         per_pin->pcm = NULL;
1906                         per_pin->pcm_idx = -1;
1907                 } else {
1908                         per_pin->pcm = get_hdmi_pcm(spec, pin_idx);
1909                         per_pin->pcm_idx = pin_idx;
1910                 }
1911                 per_pin->pin_nid = pin_nid;
1912                 per_pin->pin_nid_idx = spec->num_nids;
1913                 per_pin->dev_id = i;
1914                 per_pin->non_pcm = false;
1915                 snd_hda_set_dev_select(codec, pin_nid, i);
1916                 err = hdmi_read_pin_conn(codec, pin_idx);
1917                 if (err < 0)
1918                         return err;
1919                 spec->num_pins++;
1920         }
1921         spec->num_nids++;
1922
1923         return 0;
1924 }
1925
1926 static int hdmi_add_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
1927 {
1928         struct hdmi_spec *spec = codec->spec;
1929         struct hdmi_spec_per_cvt *per_cvt;
1930         unsigned int chans;
1931         int err;
1932
1933         chans = get_wcaps(codec, cvt_nid);
1934         chans = get_wcaps_channels(chans);
1935
1936         per_cvt = snd_array_new(&spec->cvts);
1937         if (!per_cvt)
1938                 return -ENOMEM;
1939
1940         per_cvt->cvt_nid = cvt_nid;
1941         per_cvt->channels_min = 2;
1942         if (chans <= 16) {
1943                 per_cvt->channels_max = chans;
1944                 if (chans > spec->chmap.channels_max)
1945                         spec->chmap.channels_max = chans;
1946         }
1947
1948         err = snd_hda_query_supported_pcm(codec, cvt_nid,
1949                                           &per_cvt->rates,
1950                                           &per_cvt->formats,
1951                                           &per_cvt->maxbps);
1952         if (err < 0)
1953                 return err;
1954
1955         if (spec->num_cvts < ARRAY_SIZE(spec->cvt_nids))
1956                 spec->cvt_nids[spec->num_cvts] = cvt_nid;
1957         spec->num_cvts++;
1958
1959         return 0;
1960 }
1961
1962 static const struct snd_pci_quirk force_connect_list[] = {
1963         SND_PCI_QUIRK(0x103c, 0x870f, "HP", 1),
1964         SND_PCI_QUIRK(0x103c, 0x871a, "HP", 1),
1965         SND_PCI_QUIRK(0x103c, 0x8711, "HP", 1),
1966         SND_PCI_QUIRK(0x103c, 0x8715, "HP", 1),
1967         SND_PCI_QUIRK(0x1462, 0xec94, "MS-7C94", 1),
1968         SND_PCI_QUIRK(0x8086, 0x2081, "Intel NUC 10", 1),
1969         {}
1970 };
1971
1972 static int hdmi_parse_codec(struct hda_codec *codec)
1973 {
1974         struct hdmi_spec *spec = codec->spec;
1975         hda_nid_t start_nid;
1976         unsigned int caps;
1977         int i, nodes;
1978         const struct snd_pci_quirk *q;
1979
1980         nodes = snd_hda_get_sub_nodes(codec, codec->core.afg, &start_nid);
1981         if (!start_nid || nodes < 0) {
1982                 codec_warn(codec, "HDMI: failed to get afg sub nodes\n");
1983                 return -EINVAL;
1984         }
1985
1986         if (enable_all_pins)
1987                 spec->force_connect = true;
1988
1989         q = snd_pci_quirk_lookup(codec->bus->pci, force_connect_list);
1990
1991         if (q && q->value)
1992                 spec->force_connect = true;
1993
1994         /*
1995          * hdmi_add_pin() assumes total amount of converters to
1996          * be known, so first discover all converters
1997          */
1998         for (i = 0; i < nodes; i++) {
1999                 hda_nid_t nid = start_nid + i;
2000
2001                 caps = get_wcaps(codec, nid);
2002
2003                 if (!(caps & AC_WCAP_DIGITAL))
2004                         continue;
2005
2006                 if (get_wcaps_type(caps) == AC_WID_AUD_OUT)
2007                         hdmi_add_cvt(codec, nid);
2008         }
2009
2010         /* discover audio pins */
2011         for (i = 0; i < nodes; i++) {
2012                 hda_nid_t nid = start_nid + i;
2013
2014                 caps = get_wcaps(codec, nid);
2015
2016                 if (!(caps & AC_WCAP_DIGITAL))
2017                         continue;
2018
2019                 if (get_wcaps_type(caps) == AC_WID_PIN)
2020                         hdmi_add_pin(codec, nid);
2021         }
2022
2023         return 0;
2024 }
2025
2026 /*
2027  */
2028 static bool check_non_pcm_per_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
2029 {
2030         struct hda_spdif_out *spdif;
2031         bool non_pcm;
2032
2033         mutex_lock(&codec->spdif_mutex);
2034         spdif = snd_hda_spdif_out_of_nid(codec, cvt_nid);
2035         /* Add sanity check to pass klockwork check.
2036          * This should never happen.
2037          */
2038         if (WARN_ON(spdif == NULL)) {
2039                 mutex_unlock(&codec->spdif_mutex);
2040                 return true;
2041         }
2042         non_pcm = !!(spdif->status & IEC958_AES0_NONAUDIO);
2043         mutex_unlock(&codec->spdif_mutex);
2044         return non_pcm;
2045 }
2046
2047 /*
2048  * HDMI callbacks
2049  */
2050
2051 static int generic_hdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2052                                            struct hda_codec *codec,
2053                                            unsigned int stream_tag,
2054                                            unsigned int format,
2055                                            struct snd_pcm_substream *substream)
2056 {
2057         hda_nid_t cvt_nid = hinfo->nid;
2058         struct hdmi_spec *spec = codec->spec;
2059         int pin_idx;
2060         struct hdmi_spec_per_pin *per_pin;
2061         struct snd_pcm_runtime *runtime = substream->runtime;
2062         bool non_pcm;
2063         int pinctl, stripe;
2064         int err = 0;
2065
2066         mutex_lock(&spec->pcm_lock);
2067         pin_idx = hinfo_to_pin_index(codec, hinfo);
2068         if (spec->dyn_pcm_assign && pin_idx < 0) {
2069                 /* when dyn_pcm_assign and pcm is not bound to a pin
2070                  * skip pin setup and return 0 to make audio playback
2071                  * be ongoing
2072                  */
2073                 pin_cvt_fixup(codec, NULL, cvt_nid);
2074                 snd_hda_codec_setup_stream(codec, cvt_nid,
2075                                         stream_tag, 0, format);
2076                 goto unlock;
2077         }
2078
2079         if (snd_BUG_ON(pin_idx < 0)) {
2080                 err = -EINVAL;
2081                 goto unlock;
2082         }
2083         per_pin = get_pin(spec, pin_idx);
2084
2085         /* Verify pin:cvt selections to avoid silent audio after S3.
2086          * After S3, the audio driver restores pin:cvt selections
2087          * but this can happen before gfx is ready and such selection
2088          * is overlooked by HW. Thus multiple pins can share a same
2089          * default convertor and mute control will affect each other,
2090          * which can cause a resumed audio playback become silent
2091          * after S3.
2092          */
2093         pin_cvt_fixup(codec, per_pin, 0);
2094
2095         /* Call sync_audio_rate to set the N/CTS/M manually if necessary */
2096         /* Todo: add DP1.2 MST audio support later */
2097         if (codec_has_acomp(codec))
2098                 snd_hdac_sync_audio_rate(&codec->core, per_pin->pin_nid,
2099                                          per_pin->dev_id, runtime->rate);
2100
2101         non_pcm = check_non_pcm_per_cvt(codec, cvt_nid);
2102         mutex_lock(&per_pin->lock);
2103         per_pin->channels = substream->runtime->channels;
2104         per_pin->setup = true;
2105
2106         if (get_wcaps(codec, cvt_nid) & AC_WCAP_STRIPE) {
2107                 stripe = snd_hdac_get_stream_stripe_ctl(&codec->bus->core,
2108                                                         substream);
2109                 snd_hda_codec_write(codec, cvt_nid, 0,
2110                                     AC_VERB_SET_STRIPE_CONTROL,
2111                                     stripe);
2112         }
2113
2114         hdmi_setup_audio_infoframe(codec, per_pin, non_pcm);
2115         mutex_unlock(&per_pin->lock);
2116         if (spec->dyn_pin_out) {
2117                 snd_hda_set_dev_select(codec, per_pin->pin_nid,
2118                                        per_pin->dev_id);
2119                 pinctl = snd_hda_codec_read(codec, per_pin->pin_nid, 0,
2120                                             AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
2121                 snd_hda_codec_write(codec, per_pin->pin_nid, 0,
2122                                     AC_VERB_SET_PIN_WIDGET_CONTROL,
2123                                     pinctl | PIN_OUT);
2124         }
2125
2126         /* snd_hda_set_dev_select() has been called before */
2127         err = spec->ops.setup_stream(codec, cvt_nid, per_pin->pin_nid,
2128                                      per_pin->dev_id, stream_tag, format);
2129  unlock:
2130         mutex_unlock(&spec->pcm_lock);
2131         return err;
2132 }
2133
2134 static int generic_hdmi_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
2135                                              struct hda_codec *codec,
2136                                              struct snd_pcm_substream *substream)
2137 {
2138         snd_hda_codec_cleanup_stream(codec, hinfo->nid);
2139         return 0;
2140 }
2141
2142 static int hdmi_pcm_close(struct hda_pcm_stream *hinfo,
2143                           struct hda_codec *codec,
2144                           struct snd_pcm_substream *substream)
2145 {
2146         struct hdmi_spec *spec = codec->spec;
2147         int cvt_idx, pin_idx, pcm_idx;
2148         struct hdmi_spec_per_cvt *per_cvt;
2149         struct hdmi_spec_per_pin *per_pin;
2150         int pinctl;
2151         int err = 0;
2152
2153         mutex_lock(&spec->pcm_lock);
2154         if (hinfo->nid) {
2155                 pcm_idx = hinfo_to_pcm_index(codec, hinfo);
2156                 if (snd_BUG_ON(pcm_idx < 0)) {
2157                         err = -EINVAL;
2158                         goto unlock;
2159                 }
2160                 cvt_idx = cvt_nid_to_cvt_index(codec, hinfo->nid);
2161                 if (snd_BUG_ON(cvt_idx < 0)) {
2162                         err = -EINVAL;
2163                         goto unlock;
2164                 }
2165                 per_cvt = get_cvt(spec, cvt_idx);
2166                 per_cvt->assigned = 0;
2167                 hinfo->nid = 0;
2168
2169                 azx_stream(get_azx_dev(substream))->stripe = 0;
2170
2171                 snd_hda_spdif_ctls_unassign(codec, pcm_idx);
2172                 clear_bit(pcm_idx, &spec->pcm_in_use);
2173                 pin_idx = hinfo_to_pin_index(codec, hinfo);
2174                 if (spec->dyn_pcm_assign && pin_idx < 0)
2175                         goto unlock;
2176
2177                 if (snd_BUG_ON(pin_idx < 0)) {
2178                         err = -EINVAL;
2179                         goto unlock;
2180                 }
2181                 per_pin = get_pin(spec, pin_idx);
2182
2183                 if (spec->dyn_pin_out) {
2184                         snd_hda_set_dev_select(codec, per_pin->pin_nid,
2185                                                per_pin->dev_id);
2186                         pinctl = snd_hda_codec_read(codec, per_pin->pin_nid, 0,
2187                                         AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
2188                         snd_hda_codec_write(codec, per_pin->pin_nid, 0,
2189                                             AC_VERB_SET_PIN_WIDGET_CONTROL,
2190                                             pinctl & ~PIN_OUT);
2191                 }
2192
2193                 mutex_lock(&per_pin->lock);
2194                 per_pin->chmap_set = false;
2195                 memset(per_pin->chmap, 0, sizeof(per_pin->chmap));
2196
2197                 per_pin->setup = false;
2198                 per_pin->channels = 0;
2199                 mutex_unlock(&per_pin->lock);
2200         }
2201
2202 unlock:
2203         mutex_unlock(&spec->pcm_lock);
2204
2205         return err;
2206 }
2207
2208 static const struct hda_pcm_ops generic_ops = {
2209         .open = hdmi_pcm_open,
2210         .close = hdmi_pcm_close,
2211         .prepare = generic_hdmi_playback_pcm_prepare,
2212         .cleanup = generic_hdmi_playback_pcm_cleanup,
2213 };
2214
2215 static int hdmi_get_spk_alloc(struct hdac_device *hdac, int pcm_idx)
2216 {
2217         struct hda_codec *codec = hdac_to_hda_codec(hdac);
2218         struct hdmi_spec *spec = codec->spec;
2219         struct hdmi_spec_per_pin *per_pin = pcm_idx_to_pin(spec, pcm_idx);
2220
2221         if (!per_pin)
2222                 return 0;
2223
2224         return per_pin->sink_eld.info.spk_alloc;
2225 }
2226
2227 static void hdmi_get_chmap(struct hdac_device *hdac, int pcm_idx,
2228                                         unsigned char *chmap)
2229 {
2230         struct hda_codec *codec = hdac_to_hda_codec(hdac);
2231         struct hdmi_spec *spec = codec->spec;
2232         struct hdmi_spec_per_pin *per_pin = pcm_idx_to_pin(spec, pcm_idx);
2233
2234         /* chmap is already set to 0 in caller */
2235         if (!per_pin)
2236                 return;
2237
2238         memcpy(chmap, per_pin->chmap, ARRAY_SIZE(per_pin->chmap));
2239 }
2240
2241 static void hdmi_set_chmap(struct hdac_device *hdac, int pcm_idx,
2242                                 unsigned char *chmap, int prepared)
2243 {
2244         struct hda_codec *codec = hdac_to_hda_codec(hdac);
2245         struct hdmi_spec *spec = codec->spec;
2246         struct hdmi_spec_per_pin *per_pin = pcm_idx_to_pin(spec, pcm_idx);
2247
2248         if (!per_pin)
2249                 return;
2250         mutex_lock(&per_pin->lock);
2251         per_pin->chmap_set = true;
2252         memcpy(per_pin->chmap, chmap, ARRAY_SIZE(per_pin->chmap));
2253         if (prepared)
2254                 hdmi_setup_audio_infoframe(codec, per_pin, per_pin->non_pcm);
2255         mutex_unlock(&per_pin->lock);
2256 }
2257
2258 static bool is_hdmi_pcm_attached(struct hdac_device *hdac, int pcm_idx)
2259 {
2260         struct hda_codec *codec = hdac_to_hda_codec(hdac);
2261         struct hdmi_spec *spec = codec->spec;
2262         struct hdmi_spec_per_pin *per_pin = pcm_idx_to_pin(spec, pcm_idx);
2263
2264         return per_pin ? true:false;
2265 }
2266
2267 static int generic_hdmi_build_pcms(struct hda_codec *codec)
2268 {
2269         struct hdmi_spec *spec = codec->spec;
2270         int idx, pcm_num;
2271
2272         /*
2273          * for non-mst mode, pcm number is the same as before
2274          * for DP MST mode without extra PCM, pcm number is same
2275          * for DP MST mode with extra PCMs, pcm number is
2276          *  (nid number + dev_num - 1)
2277          * dev_num is the device entry number in a pin
2278          */
2279
2280         if (spec->dyn_pcm_no_legacy && codec->mst_no_extra_pcms)
2281                 pcm_num = spec->num_cvts;
2282         else if (codec->mst_no_extra_pcms)
2283                 pcm_num = spec->num_nids;
2284         else
2285                 pcm_num = spec->num_nids + spec->dev_num - 1;
2286
2287         codec_dbg(codec, "hdmi: pcm_num set to %d\n", pcm_num);
2288
2289         for (idx = 0; idx < pcm_num; idx++) {
2290                 struct hda_pcm *info;
2291                 struct hda_pcm_stream *pstr;
2292
2293                 info = snd_hda_codec_pcm_new(codec, "HDMI %d", idx);
2294                 if (!info)
2295                         return -ENOMEM;
2296
2297                 spec->pcm_rec[idx].pcm = info;
2298                 spec->pcm_used++;
2299                 info->pcm_type = HDA_PCM_TYPE_HDMI;
2300                 info->own_chmap = true;
2301
2302                 pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
2303                 pstr->substreams = 1;
2304                 pstr->ops = generic_ops;
2305                 /* pcm number is less than 16 */
2306                 if (spec->pcm_used >= 16)
2307                         break;
2308                 /* other pstr fields are set in open */
2309         }
2310
2311         return 0;
2312 }
2313
2314 static void free_hdmi_jack_priv(struct snd_jack *jack)
2315 {
2316         struct hdmi_pcm *pcm = jack->private_data;
2317
2318         pcm->jack = NULL;
2319 }
2320
2321 static int generic_hdmi_build_jack(struct hda_codec *codec, int pcm_idx)
2322 {
2323         char hdmi_str[32] = "HDMI/DP";
2324         struct hdmi_spec *spec = codec->spec;
2325         struct hdmi_spec_per_pin *per_pin = get_pin(spec, pcm_idx);
2326         struct snd_jack *jack;
2327         int pcmdev = get_pcm_rec(spec, pcm_idx)->device;
2328         int err;
2329
2330         if (pcmdev > 0)
2331                 sprintf(hdmi_str + strlen(hdmi_str), ",pcm=%d", pcmdev);
2332         if (!spec->dyn_pcm_assign &&
2333             !is_jack_detectable(codec, per_pin->pin_nid))
2334                 strncat(hdmi_str, " Phantom",
2335                         sizeof(hdmi_str) - strlen(hdmi_str) - 1);
2336
2337         err = snd_jack_new(codec->card, hdmi_str, SND_JACK_AVOUT, &jack,
2338                            true, false);
2339         if (err < 0)
2340                 return err;
2341
2342         spec->pcm_rec[pcm_idx].jack = jack;
2343         jack->private_data = &spec->pcm_rec[pcm_idx];
2344         jack->private_free = free_hdmi_jack_priv;
2345         return 0;
2346 }
2347
2348 static int generic_hdmi_build_controls(struct hda_codec *codec)
2349 {
2350         struct hdmi_spec *spec = codec->spec;
2351         int dev, err;
2352         int pin_idx, pcm_idx;
2353
2354         for (pcm_idx = 0; pcm_idx < spec->pcm_used; pcm_idx++) {
2355                 if (!get_pcm_rec(spec, pcm_idx)->pcm) {
2356                         /* no PCM: mark this for skipping permanently */
2357                         set_bit(pcm_idx, &spec->pcm_bitmap);
2358                         continue;
2359                 }
2360
2361                 err = generic_hdmi_build_jack(codec, pcm_idx);
2362                 if (err < 0)
2363                         return err;
2364
2365                 /* create the spdif for each pcm
2366                  * pin will be bound when monitor is connected
2367                  */
2368                 if (spec->dyn_pcm_assign)
2369                         err = snd_hda_create_dig_out_ctls(codec,
2370                                           0, spec->cvt_nids[0],
2371                                           HDA_PCM_TYPE_HDMI);
2372                 else {
2373                         struct hdmi_spec_per_pin *per_pin =
2374                                 get_pin(spec, pcm_idx);
2375                         err = snd_hda_create_dig_out_ctls(codec,
2376                                                   per_pin->pin_nid,
2377                                                   per_pin->mux_nids[0],
2378                                                   HDA_PCM_TYPE_HDMI);
2379                 }
2380                 if (err < 0)
2381                         return err;
2382                 snd_hda_spdif_ctls_unassign(codec, pcm_idx);
2383
2384                 dev = get_pcm_rec(spec, pcm_idx)->device;
2385                 if (dev != SNDRV_PCM_INVALID_DEVICE) {
2386                         /* add control for ELD Bytes */
2387                         err = hdmi_create_eld_ctl(codec, pcm_idx, dev);
2388                         if (err < 0)
2389                                 return err;
2390                 }
2391         }
2392
2393         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2394                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2395                 struct hdmi_eld *pin_eld = &per_pin->sink_eld;
2396
2397                 pin_eld->eld_valid = false;
2398                 hdmi_present_sense(per_pin, 0);
2399         }
2400
2401         /* add channel maps */
2402         for (pcm_idx = 0; pcm_idx < spec->pcm_used; pcm_idx++) {
2403                 struct hda_pcm *pcm;
2404
2405                 pcm = get_pcm_rec(spec, pcm_idx);
2406                 if (!pcm || !pcm->pcm)
2407                         break;
2408                 err = snd_hdac_add_chmap_ctls(pcm->pcm, pcm_idx, &spec->chmap);
2409                 if (err < 0)
2410                         return err;
2411         }
2412
2413         return 0;
2414 }
2415
2416 static int generic_hdmi_init_per_pins(struct hda_codec *codec)
2417 {
2418         struct hdmi_spec *spec = codec->spec;
2419         int pin_idx;
2420
2421         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2422                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2423
2424                 per_pin->codec = codec;
2425                 mutex_init(&per_pin->lock);
2426                 INIT_DELAYED_WORK(&per_pin->work, hdmi_repoll_eld);
2427                 eld_proc_new(per_pin, pin_idx);
2428         }
2429         return 0;
2430 }
2431
2432 static int generic_hdmi_init(struct hda_codec *codec)
2433 {
2434         struct hdmi_spec *spec = codec->spec;
2435         int pin_idx;
2436
2437         mutex_lock(&spec->bind_lock);
2438         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2439                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2440                 hda_nid_t pin_nid = per_pin->pin_nid;
2441                 int dev_id = per_pin->dev_id;
2442
2443                 snd_hda_set_dev_select(codec, pin_nid, dev_id);
2444                 hdmi_init_pin(codec, pin_nid);
2445                 if (codec_has_acomp(codec))
2446                         continue;
2447                 snd_hda_jack_detect_enable_callback_mst(codec, pin_nid, dev_id,
2448                                                         jack_callback);
2449         }
2450         mutex_unlock(&spec->bind_lock);
2451         return 0;
2452 }
2453
2454 static void hdmi_array_init(struct hdmi_spec *spec, int nums)
2455 {
2456         snd_array_init(&spec->pins, sizeof(struct hdmi_spec_per_pin), nums);
2457         snd_array_init(&spec->cvts, sizeof(struct hdmi_spec_per_cvt), nums);
2458 }
2459
2460 static void hdmi_array_free(struct hdmi_spec *spec)
2461 {
2462         snd_array_free(&spec->pins);
2463         snd_array_free(&spec->cvts);
2464 }
2465
2466 static void generic_spec_free(struct hda_codec *codec)
2467 {
2468         struct hdmi_spec *spec = codec->spec;
2469
2470         if (spec) {
2471                 hdmi_array_free(spec);
2472                 kfree(spec);
2473                 codec->spec = NULL;
2474         }
2475         codec->dp_mst = false;
2476 }
2477
2478 static void generic_hdmi_free(struct hda_codec *codec)
2479 {
2480         struct hdmi_spec *spec = codec->spec;
2481         int pin_idx, pcm_idx;
2482
2483         if (spec->acomp_registered) {
2484                 snd_hdac_acomp_exit(&codec->bus->core);
2485         } else if (codec_has_acomp(codec)) {
2486                 snd_hdac_acomp_register_notifier(&codec->bus->core, NULL);
2487         }
2488         codec->relaxed_resume = 0;
2489
2490         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2491                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2492                 cancel_delayed_work_sync(&per_pin->work);
2493                 eld_proc_free(per_pin);
2494         }
2495
2496         for (pcm_idx = 0; pcm_idx < spec->pcm_used; pcm_idx++) {
2497                 if (spec->pcm_rec[pcm_idx].jack == NULL)
2498                         continue;
2499                 if (spec->dyn_pcm_assign)
2500                         snd_device_free(codec->card,
2501                                         spec->pcm_rec[pcm_idx].jack);
2502                 else
2503                         spec->pcm_rec[pcm_idx].jack = NULL;
2504         }
2505
2506         generic_spec_free(codec);
2507 }
2508
2509 #ifdef CONFIG_PM
2510 static int generic_hdmi_suspend(struct hda_codec *codec)
2511 {
2512         struct hdmi_spec *spec = codec->spec;
2513         int pin_idx;
2514
2515         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2516                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2517                 cancel_delayed_work_sync(&per_pin->work);
2518         }
2519         return 0;
2520 }
2521
2522 static int generic_hdmi_resume(struct hda_codec *codec)
2523 {
2524         struct hdmi_spec *spec = codec->spec;
2525         int pin_idx;
2526
2527         codec->patch_ops.init(codec);
2528         snd_hda_regmap_sync(codec);
2529
2530         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2531                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2532                 hdmi_present_sense(per_pin, 1);
2533         }
2534         return 0;
2535 }
2536 #endif
2537
2538 static const struct hda_codec_ops generic_hdmi_patch_ops = {
2539         .init                   = generic_hdmi_init,
2540         .free                   = generic_hdmi_free,
2541         .build_pcms             = generic_hdmi_build_pcms,
2542         .build_controls         = generic_hdmi_build_controls,
2543         .unsol_event            = hdmi_unsol_event,
2544 #ifdef CONFIG_PM
2545         .suspend                = generic_hdmi_suspend,
2546         .resume                 = generic_hdmi_resume,
2547 #endif
2548 };
2549
2550 static const struct hdmi_ops generic_standard_hdmi_ops = {
2551         .pin_get_eld                            = hdmi_pin_get_eld,
2552         .pin_setup_infoframe                    = hdmi_pin_setup_infoframe,
2553         .pin_hbr_setup                          = hdmi_pin_hbr_setup,
2554         .setup_stream                           = hdmi_setup_stream,
2555 };
2556
2557 /* allocate codec->spec and assign/initialize generic parser ops */
2558 static int alloc_generic_hdmi(struct hda_codec *codec)
2559 {
2560         struct hdmi_spec *spec;
2561
2562         spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2563         if (!spec)
2564                 return -ENOMEM;
2565
2566         spec->codec = codec;
2567         spec->ops = generic_standard_hdmi_ops;
2568         spec->dev_num = 1;      /* initialize to 1 */
2569         mutex_init(&spec->pcm_lock);
2570         mutex_init(&spec->bind_lock);
2571         snd_hdac_register_chmap_ops(&codec->core, &spec->chmap);
2572
2573         spec->chmap.ops.get_chmap = hdmi_get_chmap;
2574         spec->chmap.ops.set_chmap = hdmi_set_chmap;
2575         spec->chmap.ops.is_pcm_attached = is_hdmi_pcm_attached;
2576         spec->chmap.ops.get_spk_alloc = hdmi_get_spk_alloc;
2577
2578         codec->spec = spec;
2579         hdmi_array_init(spec, 4);
2580
2581         codec->patch_ops = generic_hdmi_patch_ops;
2582
2583         return 0;
2584 }
2585
2586 /* generic HDMI parser */
2587 static int patch_generic_hdmi(struct hda_codec *codec)
2588 {
2589         int err;
2590
2591         err = alloc_generic_hdmi(codec);
2592         if (err < 0)
2593                 return err;
2594
2595         err = hdmi_parse_codec(codec);
2596         if (err < 0) {
2597                 generic_spec_free(codec);
2598                 return err;
2599         }
2600
2601         generic_hdmi_init_per_pins(codec);
2602         return 0;
2603 }
2604
2605 /*
2606  * generic audio component binding
2607  */
2608
2609 /* turn on / off the unsol event jack detection dynamically */
2610 static void reprogram_jack_detect(struct hda_codec *codec, hda_nid_t nid,
2611                                   int dev_id, bool use_acomp)
2612 {
2613         struct hda_jack_tbl *tbl;
2614
2615         tbl = snd_hda_jack_tbl_get_mst(codec, nid, dev_id);
2616         if (tbl) {
2617                 /* clear unsol even if component notifier is used, or re-enable
2618                  * if notifier is cleared
2619                  */
2620                 unsigned int val = use_acomp ? 0 : (AC_USRSP_EN | tbl->tag);
2621                 snd_hda_codec_write_cache(codec, nid, 0,
2622                                           AC_VERB_SET_UNSOLICITED_ENABLE, val);
2623         }
2624 }
2625
2626 /* set up / clear component notifier dynamically */
2627 static void generic_acomp_notifier_set(struct drm_audio_component *acomp,
2628                                        bool use_acomp)
2629 {
2630         struct hdmi_spec *spec;
2631         int i;
2632
2633         spec = container_of(acomp->audio_ops, struct hdmi_spec, drm_audio_ops);
2634         mutex_lock(&spec->bind_lock);
2635         spec->use_acomp_notifier = use_acomp;
2636         spec->codec->relaxed_resume = use_acomp;
2637         spec->codec->bus->keep_power = 0;
2638         /* reprogram each jack detection logic depending on the notifier */
2639         for (i = 0; i < spec->num_pins; i++)
2640                 reprogram_jack_detect(spec->codec,
2641                                       get_pin(spec, i)->pin_nid,
2642                                       get_pin(spec, i)->dev_id,
2643                                       use_acomp);
2644         mutex_unlock(&spec->bind_lock);
2645 }
2646
2647 /* enable / disable the notifier via master bind / unbind */
2648 static int generic_acomp_master_bind(struct device *dev,
2649                                      struct drm_audio_component *acomp)
2650 {
2651         generic_acomp_notifier_set(acomp, true);
2652         return 0;
2653 }
2654
2655 static void generic_acomp_master_unbind(struct device *dev,
2656                                         struct drm_audio_component *acomp)
2657 {
2658         generic_acomp_notifier_set(acomp, false);
2659 }
2660
2661 /* check whether both HD-audio and DRM PCI devices belong to the same bus */
2662 static int match_bound_vga(struct device *dev, int subtype, void *data)
2663 {
2664         struct hdac_bus *bus = data;
2665         struct pci_dev *pci, *master;
2666
2667         if (!dev_is_pci(dev) || !dev_is_pci(bus->dev))
2668                 return 0;
2669         master = to_pci_dev(bus->dev);
2670         pci = to_pci_dev(dev);
2671         return master->bus == pci->bus;
2672 }
2673
2674 /* audio component notifier for AMD/Nvidia HDMI codecs */
2675 static void generic_acomp_pin_eld_notify(void *audio_ptr, int port, int dev_id)
2676 {
2677         struct hda_codec *codec = audio_ptr;
2678         struct hdmi_spec *spec = codec->spec;
2679         hda_nid_t pin_nid = spec->port2pin(codec, port);
2680
2681         if (!pin_nid)
2682                 return;
2683         if (get_wcaps_type(get_wcaps(codec, pin_nid)) != AC_WID_PIN)
2684                 return;
2685         /* skip notification during system suspend (but not in runtime PM);
2686          * the state will be updated at resume
2687          */
2688         if (codec->core.dev.power.power_state.event == PM_EVENT_SUSPEND)
2689                 return;
2690
2691         check_presence_and_report(codec, pin_nid, dev_id);
2692 }
2693
2694 /* set up the private drm_audio_ops from the template */
2695 static void setup_drm_audio_ops(struct hda_codec *codec,
2696                                 const struct drm_audio_component_audio_ops *ops)
2697 {
2698         struct hdmi_spec *spec = codec->spec;
2699
2700         spec->drm_audio_ops.audio_ptr = codec;
2701         /* intel_audio_codec_enable() or intel_audio_codec_disable()
2702          * will call pin_eld_notify with using audio_ptr pointer
2703          * We need make sure audio_ptr is really setup
2704          */
2705         wmb();
2706         spec->drm_audio_ops.pin2port = ops->pin2port;
2707         spec->drm_audio_ops.pin_eld_notify = ops->pin_eld_notify;
2708         spec->drm_audio_ops.master_bind = ops->master_bind;
2709         spec->drm_audio_ops.master_unbind = ops->master_unbind;
2710 }
2711
2712 /* initialize the generic HDMI audio component */
2713 static void generic_acomp_init(struct hda_codec *codec,
2714                                const struct drm_audio_component_audio_ops *ops,
2715                                int (*port2pin)(struct hda_codec *, int))
2716 {
2717         struct hdmi_spec *spec = codec->spec;
2718
2719         if (!enable_acomp) {
2720                 codec_info(codec, "audio component disabled by module option\n");
2721                 return;
2722         }
2723
2724         spec->port2pin = port2pin;
2725         setup_drm_audio_ops(codec, ops);
2726         if (!snd_hdac_acomp_init(&codec->bus->core, &spec->drm_audio_ops,
2727                                  match_bound_vga, 0)) {
2728                 spec->acomp_registered = true;
2729         }
2730 }
2731
2732 /*
2733  * Intel codec parsers and helpers
2734  */
2735
2736 #define INTEL_GET_VENDOR_VERB   0xf81
2737 #define INTEL_SET_VENDOR_VERB   0x781
2738 #define INTEL_EN_DP12           0x02    /* enable DP 1.2 features */
2739 #define INTEL_EN_ALL_PIN_CVTS   0x01    /* enable 2nd & 3rd pins and convertors */
2740
2741 static void intel_haswell_enable_all_pins(struct hda_codec *codec,
2742                                           bool update_tree)
2743 {
2744         unsigned int vendor_param;
2745         struct hdmi_spec *spec = codec->spec;
2746
2747         vendor_param = snd_hda_codec_read(codec, spec->vendor_nid, 0,
2748                                 INTEL_GET_VENDOR_VERB, 0);
2749         if (vendor_param == -1 || vendor_param & INTEL_EN_ALL_PIN_CVTS)
2750                 return;
2751
2752         vendor_param |= INTEL_EN_ALL_PIN_CVTS;
2753         vendor_param = snd_hda_codec_read(codec, spec->vendor_nid, 0,
2754                                 INTEL_SET_VENDOR_VERB, vendor_param);
2755         if (vendor_param == -1)
2756                 return;
2757
2758         if (update_tree)
2759                 snd_hda_codec_update_widgets(codec);
2760 }
2761
2762 static void intel_haswell_fixup_enable_dp12(struct hda_codec *codec)
2763 {
2764         unsigned int vendor_param;
2765         struct hdmi_spec *spec = codec->spec;
2766
2767         vendor_param = snd_hda_codec_read(codec, spec->vendor_nid, 0,
2768                                 INTEL_GET_VENDOR_VERB, 0);
2769         if (vendor_param == -1 || vendor_param & INTEL_EN_DP12)
2770                 return;
2771
2772         /* enable DP1.2 mode */
2773         vendor_param |= INTEL_EN_DP12;
2774         snd_hdac_regmap_add_vendor_verb(&codec->core, INTEL_SET_VENDOR_VERB);
2775         snd_hda_codec_write_cache(codec, spec->vendor_nid, 0,
2776                                 INTEL_SET_VENDOR_VERB, vendor_param);
2777 }
2778
2779 /* Haswell needs to re-issue the vendor-specific verbs before turning to D0.
2780  * Otherwise you may get severe h/w communication errors.
2781  */
2782 static void haswell_set_power_state(struct hda_codec *codec, hda_nid_t fg,
2783                                 unsigned int power_state)
2784 {
2785         if (power_state == AC_PWRST_D0) {
2786                 intel_haswell_enable_all_pins(codec, false);
2787                 intel_haswell_fixup_enable_dp12(codec);
2788         }
2789
2790         snd_hda_codec_read(codec, fg, 0, AC_VERB_SET_POWER_STATE, power_state);
2791         snd_hda_codec_set_power_to_all(codec, fg, power_state);
2792 }
2793
2794 /* There is a fixed mapping between audio pin node and display port.
2795  * on SNB, IVY, HSW, BSW, SKL, BXT, KBL:
2796  * Pin Widget 5 - PORT B (port = 1 in i915 driver)
2797  * Pin Widget 6 - PORT C (port = 2 in i915 driver)
2798  * Pin Widget 7 - PORT D (port = 3 in i915 driver)
2799  *
2800  * on VLV, ILK:
2801  * Pin Widget 4 - PORT B (port = 1 in i915 driver)
2802  * Pin Widget 5 - PORT C (port = 2 in i915 driver)
2803  * Pin Widget 6 - PORT D (port = 3 in i915 driver)
2804  */
2805 static int intel_base_nid(struct hda_codec *codec)
2806 {
2807         switch (codec->core.vendor_id) {
2808         case 0x80860054: /* ILK */
2809         case 0x80862804: /* ILK */
2810         case 0x80862882: /* VLV */
2811                 return 4;
2812         default:
2813                 return 5;
2814         }
2815 }
2816
2817 static int intel_pin2port(void *audio_ptr, int pin_nid)
2818 {
2819         struct hda_codec *codec = audio_ptr;
2820         struct hdmi_spec *spec = codec->spec;
2821         int base_nid, i;
2822
2823         if (!spec->port_num) {
2824                 base_nid = intel_base_nid(codec);
2825                 if (WARN_ON(pin_nid < base_nid || pin_nid >= base_nid + 3))
2826                         return -1;
2827                 return pin_nid - base_nid + 1;
2828         }
2829
2830         /*
2831          * looking for the pin number in the mapping table and return
2832          * the index which indicate the port number
2833          */
2834         for (i = 0; i < spec->port_num; i++) {
2835                 if (pin_nid == spec->port_map[i])
2836                         return i;
2837         }
2838
2839         codec_info(codec, "Can't find the HDMI/DP port for pin NID 0x%x\n", pin_nid);
2840         return -1;
2841 }
2842
2843 static int intel_port2pin(struct hda_codec *codec, int port)
2844 {
2845         struct hdmi_spec *spec = codec->spec;
2846
2847         if (!spec->port_num) {
2848                 /* we assume only from port-B to port-D */
2849                 if (port < 1 || port > 3)
2850                         return 0;
2851                 return port + intel_base_nid(codec) - 1;
2852         }
2853
2854         if (port < 0 || port >= spec->port_num)
2855                 return 0;
2856         return spec->port_map[port];
2857 }
2858
2859 static void intel_pin_eld_notify(void *audio_ptr, int port, int pipe)
2860 {
2861         struct hda_codec *codec = audio_ptr;
2862         int pin_nid;
2863         int dev_id = pipe;
2864
2865         pin_nid = intel_port2pin(codec, port);
2866         if (!pin_nid)
2867                 return;
2868         /* skip notification during system suspend (but not in runtime PM);
2869          * the state will be updated at resume
2870          */
2871         if (codec->core.dev.power.power_state.event == PM_EVENT_SUSPEND)
2872                 return;
2873
2874         snd_hdac_i915_set_bclk(&codec->bus->core);
2875         check_presence_and_report(codec, pin_nid, dev_id);
2876 }
2877
2878 static const struct drm_audio_component_audio_ops intel_audio_ops = {
2879         .pin2port = intel_pin2port,
2880         .pin_eld_notify = intel_pin_eld_notify,
2881 };
2882
2883 /* register i915 component pin_eld_notify callback */
2884 static void register_i915_notifier(struct hda_codec *codec)
2885 {
2886         struct hdmi_spec *spec = codec->spec;
2887
2888         spec->use_acomp_notifier = true;
2889         spec->port2pin = intel_port2pin;
2890         setup_drm_audio_ops(codec, &intel_audio_ops);
2891         snd_hdac_acomp_register_notifier(&codec->bus->core,
2892                                         &spec->drm_audio_ops);
2893         /* no need for forcible resume for jack check thanks to notifier */
2894         codec->relaxed_resume = 1;
2895 }
2896
2897 /* setup_stream ops override for HSW+ */
2898 static int i915_hsw_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
2899                                  hda_nid_t pin_nid, int dev_id, u32 stream_tag,
2900                                  int format)
2901 {
2902         haswell_verify_D0(codec, cvt_nid, pin_nid);
2903         return hdmi_setup_stream(codec, cvt_nid, pin_nid, dev_id,
2904                                  stream_tag, format);
2905 }
2906
2907 /* pin_cvt_fixup ops override for HSW+ and VLV+ */
2908 static void i915_pin_cvt_fixup(struct hda_codec *codec,
2909                                struct hdmi_spec_per_pin *per_pin,
2910                                hda_nid_t cvt_nid)
2911 {
2912         if (per_pin) {
2913                 haswell_verify_D0(codec, per_pin->cvt_nid, per_pin->pin_nid);
2914                 snd_hda_set_dev_select(codec, per_pin->pin_nid,
2915                                per_pin->dev_id);
2916                 intel_verify_pin_cvt_connect(codec, per_pin);
2917                 intel_not_share_assigned_cvt(codec, per_pin->pin_nid,
2918                                      per_pin->dev_id, per_pin->mux_idx);
2919         } else {
2920                 intel_not_share_assigned_cvt_nid(codec, 0, 0, cvt_nid);
2921         }
2922 }
2923
2924 /* precondition and allocation for Intel codecs */
2925 static int alloc_intel_hdmi(struct hda_codec *codec)
2926 {
2927         int err;
2928
2929         /* requires i915 binding */
2930         if (!codec->bus->core.audio_component) {
2931                 codec_info(codec, "No i915 binding for Intel HDMI/DP codec\n");
2932                 /* set probe_id here to prevent generic fallback binding */
2933                 codec->probe_id = HDA_CODEC_ID_SKIP_PROBE;
2934                 return -ENODEV;
2935         }
2936
2937         err = alloc_generic_hdmi(codec);
2938         if (err < 0)
2939                 return err;
2940         /* no need to handle unsol events */
2941         codec->patch_ops.unsol_event = NULL;
2942         return 0;
2943 }
2944
2945 /* parse and post-process for Intel codecs */
2946 static int parse_intel_hdmi(struct hda_codec *codec)
2947 {
2948         int err, retries = 3;
2949
2950         do {
2951                 err = hdmi_parse_codec(codec);
2952         } while (err < 0 && retries--);
2953
2954         if (err < 0) {
2955                 generic_spec_free(codec);
2956                 return err;
2957         }
2958
2959         generic_hdmi_init_per_pins(codec);
2960         register_i915_notifier(codec);
2961         return 0;
2962 }
2963
2964 /* Intel Haswell and onwards; audio component with eld notifier */
2965 static int intel_hsw_common_init(struct hda_codec *codec, hda_nid_t vendor_nid,
2966                                  const int *port_map, int port_num, int dev_num,
2967                                  bool send_silent_stream)
2968 {
2969         struct hdmi_spec *spec;
2970         int err;
2971
2972         err = alloc_intel_hdmi(codec);
2973         if (err < 0)
2974                 return err;
2975         spec = codec->spec;
2976         codec->dp_mst = true;
2977         spec->dyn_pcm_assign = true;
2978         spec->vendor_nid = vendor_nid;
2979         spec->port_map = port_map;
2980         spec->port_num = port_num;
2981         spec->intel_hsw_fixup = true;
2982         spec->dev_num = dev_num;
2983
2984         intel_haswell_enable_all_pins(codec, true);
2985         intel_haswell_fixup_enable_dp12(codec);
2986
2987         codec->display_power_control = 1;
2988
2989         codec->patch_ops.set_power_state = haswell_set_power_state;
2990         codec->depop_delay = 0;
2991         codec->auto_runtime_pm = 1;
2992
2993         spec->ops.setup_stream = i915_hsw_setup_stream;
2994         spec->ops.pin_cvt_fixup = i915_pin_cvt_fixup;
2995
2996         /*
2997          * Enable silent stream feature, if it is enabled via
2998          * module param or Kconfig option
2999          */
3000         if (send_silent_stream)
3001                 spec->send_silent_stream = true;
3002
3003         return parse_intel_hdmi(codec);
3004 }
3005
3006 static int patch_i915_hsw_hdmi(struct hda_codec *codec)
3007 {
3008         return intel_hsw_common_init(codec, 0x08, NULL, 0, 3,
3009                                      enable_silent_stream);
3010 }
3011
3012 static int patch_i915_glk_hdmi(struct hda_codec *codec)
3013 {
3014         /*
3015          * Silent stream calls audio component .get_power() from
3016          * .pin_eld_notify(). On GLK this will deadlock in i915 due
3017          * to the audio vs. CDCLK workaround.
3018          */
3019         return intel_hsw_common_init(codec, 0x0b, NULL, 0, 3, false);
3020 }
3021
3022 static int patch_i915_icl_hdmi(struct hda_codec *codec)
3023 {
3024         /*
3025          * pin to port mapping table where the value indicate the pin number and
3026          * the index indicate the port number.
3027          */
3028         static const int map[] = {0x0, 0x4, 0x6, 0x8, 0xa, 0xb};
3029
3030         return intel_hsw_common_init(codec, 0x02, map, ARRAY_SIZE(map), 3,
3031                                      enable_silent_stream);
3032 }
3033
3034 static int patch_i915_tgl_hdmi(struct hda_codec *codec)
3035 {
3036         /*
3037          * pin to port mapping table where the value indicate the pin number and
3038          * the index indicate the port number.
3039          */
3040         static const int map[] = {0x4, 0x6, 0x8, 0xa, 0xb, 0xc, 0xd, 0xe, 0xf};
3041         int ret;
3042
3043         ret = intel_hsw_common_init(codec, 0x02, map, ARRAY_SIZE(map), 4,
3044                                     enable_silent_stream);
3045         if (!ret) {
3046                 struct hdmi_spec *spec = codec->spec;
3047
3048                 spec->dyn_pcm_no_legacy = true;
3049         }
3050
3051         return ret;
3052 }
3053
3054 /* Intel Baytrail and Braswell; with eld notifier */
3055 static int patch_i915_byt_hdmi(struct hda_codec *codec)
3056 {
3057         struct hdmi_spec *spec;
3058         int err;
3059
3060         err = alloc_intel_hdmi(codec);
3061         if (err < 0)
3062                 return err;
3063         spec = codec->spec;
3064
3065         /* For Valleyview/Cherryview, only the display codec is in the display
3066          * power well and can use link_power ops to request/release the power.
3067          */
3068         codec->display_power_control = 1;
3069
3070         codec->depop_delay = 0;
3071         codec->auto_runtime_pm = 1;
3072
3073         spec->ops.pin_cvt_fixup = i915_pin_cvt_fixup;
3074
3075         return parse_intel_hdmi(codec);
3076 }
3077
3078 /* Intel IronLake, SandyBridge and IvyBridge; with eld notifier */
3079 static int patch_i915_cpt_hdmi(struct hda_codec *codec)
3080 {
3081         int err;
3082
3083         err = alloc_intel_hdmi(codec);
3084         if (err < 0)
3085                 return err;
3086         return parse_intel_hdmi(codec);
3087 }
3088
3089 /*
3090  * Shared non-generic implementations
3091  */
3092
3093 static int simple_playback_build_pcms(struct hda_codec *codec)
3094 {
3095         struct hdmi_spec *spec = codec->spec;
3096         struct hda_pcm *info;
3097         unsigned int chans;
3098         struct hda_pcm_stream *pstr;
3099         struct hdmi_spec_per_cvt *per_cvt;
3100
3101         per_cvt = get_cvt(spec, 0);
3102         chans = get_wcaps(codec, per_cvt->cvt_nid);
3103         chans = get_wcaps_channels(chans);
3104
3105         info = snd_hda_codec_pcm_new(codec, "HDMI 0");
3106         if (!info)
3107                 return -ENOMEM;
3108         spec->pcm_rec[0].pcm = info;
3109         info->pcm_type = HDA_PCM_TYPE_HDMI;
3110         pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
3111         *pstr = spec->pcm_playback;
3112         pstr->nid = per_cvt->cvt_nid;
3113         if (pstr->channels_max <= 2 && chans && chans <= 16)
3114                 pstr->channels_max = chans;
3115
3116         return 0;
3117 }
3118
3119 /* unsolicited event for jack sensing */
3120 static void simple_hdmi_unsol_event(struct hda_codec *codec,
3121                                     unsigned int res)
3122 {
3123         snd_hda_jack_set_dirty_all(codec);
3124         snd_hda_jack_report_sync(codec);
3125 }
3126
3127 /* generic_hdmi_build_jack can be used for simple_hdmi, too,
3128  * as long as spec->pins[] is set correctly
3129  */
3130 #define simple_hdmi_build_jack  generic_hdmi_build_jack
3131
3132 static int simple_playback_build_controls(struct hda_codec *codec)
3133 {
3134         struct hdmi_spec *spec = codec->spec;
3135         struct hdmi_spec_per_cvt *per_cvt;
3136         int err;
3137
3138         per_cvt = get_cvt(spec, 0);
3139         err = snd_hda_create_dig_out_ctls(codec, per_cvt->cvt_nid,
3140                                           per_cvt->cvt_nid,
3141                                           HDA_PCM_TYPE_HDMI);
3142         if (err < 0)
3143                 return err;
3144         return simple_hdmi_build_jack(codec, 0);
3145 }
3146
3147 static int simple_playback_init(struct hda_codec *codec)
3148 {
3149         struct hdmi_spec *spec = codec->spec;
3150         struct hdmi_spec_per_pin *per_pin = get_pin(spec, 0);
3151         hda_nid_t pin = per_pin->pin_nid;
3152
3153         snd_hda_codec_write(codec, pin, 0,
3154                             AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
3155         /* some codecs require to unmute the pin */
3156         if (get_wcaps(codec, pin) & AC_WCAP_OUT_AMP)
3157                 snd_hda_codec_write(codec, pin, 0, AC_VERB_SET_AMP_GAIN_MUTE,
3158                                     AMP_OUT_UNMUTE);
3159         snd_hda_jack_detect_enable(codec, pin, per_pin->dev_id);
3160         return 0;
3161 }
3162
3163 static void simple_playback_free(struct hda_codec *codec)
3164 {
3165         struct hdmi_spec *spec = codec->spec;
3166
3167         hdmi_array_free(spec);
3168         kfree(spec);
3169 }
3170
3171 /*
3172  * Nvidia specific implementations
3173  */
3174
3175 #define Nv_VERB_SET_Channel_Allocation          0xF79
3176 #define Nv_VERB_SET_Info_Frame_Checksum         0xF7A
3177 #define Nv_VERB_SET_Audio_Protection_On         0xF98
3178 #define Nv_VERB_SET_Audio_Protection_Off        0xF99
3179
3180 #define nvhdmi_master_con_nid_7x        0x04
3181 #define nvhdmi_master_pin_nid_7x        0x05
3182
3183 static const hda_nid_t nvhdmi_con_nids_7x[4] = {
3184         /*front, rear, clfe, rear_surr */
3185         0x6, 0x8, 0xa, 0xc,
3186 };
3187
3188 static const struct hda_verb nvhdmi_basic_init_7x_2ch[] = {
3189         /* set audio protect on */
3190         { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
3191         /* enable digital output on pin widget */
3192         { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
3193         {} /* terminator */
3194 };
3195
3196 static const struct hda_verb nvhdmi_basic_init_7x_8ch[] = {
3197         /* set audio protect on */
3198         { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
3199         /* enable digital output on pin widget */
3200         { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
3201         { 0x7, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
3202         { 0x9, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
3203         { 0xb, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
3204         { 0xd, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
3205         {} /* terminator */
3206 };
3207
3208 #ifdef LIMITED_RATE_FMT_SUPPORT
3209 /* support only the safe format and rate */
3210 #define SUPPORTED_RATES         SNDRV_PCM_RATE_48000
3211 #define SUPPORTED_MAXBPS        16
3212 #define SUPPORTED_FORMATS       SNDRV_PCM_FMTBIT_S16_LE
3213 #else
3214 /* support all rates and formats */
3215 #define SUPPORTED_RATES \
3216         (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
3217         SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |\
3218          SNDRV_PCM_RATE_192000)
3219 #define SUPPORTED_MAXBPS        24
3220 #define SUPPORTED_FORMATS \
3221         (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
3222 #endif
3223
3224 static int nvhdmi_7x_init_2ch(struct hda_codec *codec)
3225 {
3226         snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_2ch);
3227         return 0;
3228 }
3229
3230 static int nvhdmi_7x_init_8ch(struct hda_codec *codec)
3231 {
3232         snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_8ch);
3233         return 0;
3234 }
3235
3236 static const unsigned int channels_2_6_8[] = {
3237         2, 6, 8
3238 };
3239
3240 static const unsigned int channels_2_8[] = {
3241         2, 8
3242 };
3243
3244 static const struct snd_pcm_hw_constraint_list hw_constraints_2_6_8_channels = {
3245         .count = ARRAY_SIZE(channels_2_6_8),
3246         .list = channels_2_6_8,
3247         .mask = 0,
3248 };
3249
3250 static const struct snd_pcm_hw_constraint_list hw_constraints_2_8_channels = {
3251         .count = ARRAY_SIZE(channels_2_8),
3252         .list = channels_2_8,
3253         .mask = 0,
3254 };
3255
3256 static int simple_playback_pcm_open(struct hda_pcm_stream *hinfo,
3257                                     struct hda_codec *codec,
3258                                     struct snd_pcm_substream *substream)
3259 {
3260         struct hdmi_spec *spec = codec->spec;
3261         const struct snd_pcm_hw_constraint_list *hw_constraints_channels = NULL;
3262
3263         switch (codec->preset->vendor_id) {
3264         case 0x10de0002:
3265         case 0x10de0003:
3266         case 0x10de0005:
3267         case 0x10de0006:
3268                 hw_constraints_channels = &hw_constraints_2_8_channels;
3269                 break;
3270         case 0x10de0007:
3271                 hw_constraints_channels = &hw_constraints_2_6_8_channels;
3272                 break;
3273         default:
3274                 break;
3275         }
3276
3277         if (hw_constraints_channels != NULL) {
3278                 snd_pcm_hw_constraint_list(substream->runtime, 0,
3279                                 SNDRV_PCM_HW_PARAM_CHANNELS,
3280                                 hw_constraints_channels);
3281         } else {
3282                 snd_pcm_hw_constraint_step(substream->runtime, 0,
3283                                            SNDRV_PCM_HW_PARAM_CHANNELS, 2);
3284         }
3285
3286         return snd_hda_multi_out_dig_open(codec, &spec->multiout);
3287 }
3288
3289 static int simple_playback_pcm_close(struct hda_pcm_stream *hinfo,
3290                                      struct hda_codec *codec,
3291                                      struct snd_pcm_substream *substream)
3292 {
3293         struct hdmi_spec *spec = codec->spec;
3294         return snd_hda_multi_out_dig_close(codec, &spec->multiout);
3295 }
3296
3297 static int simple_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
3298                                        struct hda_codec *codec,
3299                                        unsigned int stream_tag,
3300                                        unsigned int format,
3301                                        struct snd_pcm_substream *substream)
3302 {
3303         struct hdmi_spec *spec = codec->spec;
3304         return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
3305                                              stream_tag, format, substream);
3306 }
3307
3308 static const struct hda_pcm_stream simple_pcm_playback = {
3309         .substreams = 1,
3310         .channels_min = 2,
3311         .channels_max = 2,
3312         .ops = {
3313                 .open = simple_playback_pcm_open,
3314                 .close = simple_playback_pcm_close,
3315                 .prepare = simple_playback_pcm_prepare
3316         },
3317 };
3318
3319 static const struct hda_codec_ops simple_hdmi_patch_ops = {
3320         .build_controls = simple_playback_build_controls,
3321         .build_pcms = simple_playback_build_pcms,
3322         .init = simple_playback_init,
3323         .free = simple_playback_free,
3324         .unsol_event = simple_hdmi_unsol_event,
3325 };
3326
3327 static int patch_simple_hdmi(struct hda_codec *codec,
3328                              hda_nid_t cvt_nid, hda_nid_t pin_nid)
3329 {
3330         struct hdmi_spec *spec;
3331         struct hdmi_spec_per_cvt *per_cvt;
3332         struct hdmi_spec_per_pin *per_pin;
3333
3334         spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3335         if (!spec)
3336                 return -ENOMEM;
3337
3338         spec->codec = codec;
3339         codec->spec = spec;
3340         hdmi_array_init(spec, 1);
3341
3342         spec->multiout.num_dacs = 0;  /* no analog */
3343         spec->multiout.max_channels = 2;
3344         spec->multiout.dig_out_nid = cvt_nid;
3345         spec->num_cvts = 1;
3346         spec->num_pins = 1;
3347         per_pin = snd_array_new(&spec->pins);
3348         per_cvt = snd_array_new(&spec->cvts);
3349         if (!per_pin || !per_cvt) {
3350                 simple_playback_free(codec);
3351                 return -ENOMEM;
3352         }
3353         per_cvt->cvt_nid = cvt_nid;
3354         per_pin->pin_nid = pin_nid;
3355         spec->pcm_playback = simple_pcm_playback;
3356
3357         codec->patch_ops = simple_hdmi_patch_ops;
3358
3359         return 0;
3360 }
3361
3362 static void nvhdmi_8ch_7x_set_info_frame_parameters(struct hda_codec *codec,
3363                                                     int channels)
3364 {
3365         unsigned int chanmask;
3366         int chan = channels ? (channels - 1) : 1;
3367
3368         switch (channels) {
3369         default:
3370         case 0:
3371         case 2:
3372                 chanmask = 0x00;
3373                 break;
3374         case 4:
3375                 chanmask = 0x08;
3376                 break;
3377         case 6:
3378                 chanmask = 0x0b;
3379                 break;
3380         case 8:
3381                 chanmask = 0x13;
3382                 break;
3383         }
3384
3385         /* Set the audio infoframe channel allocation and checksum fields.  The
3386          * channel count is computed implicitly by the hardware. */
3387         snd_hda_codec_write(codec, 0x1, 0,
3388                         Nv_VERB_SET_Channel_Allocation, chanmask);
3389
3390         snd_hda_codec_write(codec, 0x1, 0,
3391                         Nv_VERB_SET_Info_Frame_Checksum,
3392                         (0x71 - chan - chanmask));
3393 }
3394
3395 static int nvhdmi_8ch_7x_pcm_close(struct hda_pcm_stream *hinfo,
3396                                    struct hda_codec *codec,
3397                                    struct snd_pcm_substream *substream)
3398 {
3399         struct hdmi_spec *spec = codec->spec;
3400         int i;
3401
3402         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x,
3403                         0, AC_VERB_SET_CHANNEL_STREAMID, 0);
3404         for (i = 0; i < 4; i++) {
3405                 /* set the stream id */
3406                 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
3407                                 AC_VERB_SET_CHANNEL_STREAMID, 0);
3408                 /* set the stream format */
3409                 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
3410                                 AC_VERB_SET_STREAM_FORMAT, 0);
3411         }
3412
3413         /* The audio hardware sends a channel count of 0x7 (8ch) when all the
3414          * streams are disabled. */
3415         nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
3416
3417         return snd_hda_multi_out_dig_close(codec, &spec->multiout);
3418 }
3419
3420 static int nvhdmi_8ch_7x_pcm_prepare(struct hda_pcm_stream *hinfo,
3421                                      struct hda_codec *codec,
3422                                      unsigned int stream_tag,
3423                                      unsigned int format,
3424                                      struct snd_pcm_substream *substream)
3425 {
3426         int chs;
3427         unsigned int dataDCC2, channel_id;
3428         int i;
3429         struct hdmi_spec *spec = codec->spec;
3430         struct hda_spdif_out *spdif;
3431         struct hdmi_spec_per_cvt *per_cvt;
3432
3433         mutex_lock(&codec->spdif_mutex);
3434         per_cvt = get_cvt(spec, 0);
3435         spdif = snd_hda_spdif_out_of_nid(codec, per_cvt->cvt_nid);
3436
3437         chs = substream->runtime->channels;
3438
3439         dataDCC2 = 0x2;
3440
3441         /* turn off SPDIF once; otherwise the IEC958 bits won't be updated */
3442         if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE))
3443                 snd_hda_codec_write(codec,
3444                                 nvhdmi_master_con_nid_7x,
3445                                 0,
3446                                 AC_VERB_SET_DIGI_CONVERT_1,
3447                                 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
3448
3449         /* set the stream id */
3450         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
3451                         AC_VERB_SET_CHANNEL_STREAMID, (stream_tag << 4) | 0x0);
3452
3453         /* set the stream format */
3454         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
3455                         AC_VERB_SET_STREAM_FORMAT, format);
3456
3457         /* turn on again (if needed) */
3458         /* enable and set the channel status audio/data flag */
3459         if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE)) {
3460                 snd_hda_codec_write(codec,
3461                                 nvhdmi_master_con_nid_7x,
3462                                 0,
3463                                 AC_VERB_SET_DIGI_CONVERT_1,
3464                                 spdif->ctls & 0xff);
3465                 snd_hda_codec_write(codec,
3466                                 nvhdmi_master_con_nid_7x,
3467                                 0,
3468                                 AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
3469         }
3470
3471         for (i = 0; i < 4; i++) {
3472                 if (chs == 2)
3473                         channel_id = 0;
3474                 else
3475                         channel_id = i * 2;
3476
3477                 /* turn off SPDIF once;
3478                  *otherwise the IEC958 bits won't be updated
3479                  */
3480                 if (codec->spdif_status_reset &&
3481                 (spdif->ctls & AC_DIG1_ENABLE))
3482                         snd_hda_codec_write(codec,
3483                                 nvhdmi_con_nids_7x[i],
3484                                 0,
3485                                 AC_VERB_SET_DIGI_CONVERT_1,
3486                                 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
3487                 /* set the stream id */
3488                 snd_hda_codec_write(codec,
3489                                 nvhdmi_con_nids_7x[i],
3490                                 0,
3491                                 AC_VERB_SET_CHANNEL_STREAMID,
3492                                 (stream_tag << 4) | channel_id);
3493                 /* set the stream format */
3494                 snd_hda_codec_write(codec,
3495                                 nvhdmi_con_nids_7x[i],
3496                                 0,
3497                                 AC_VERB_SET_STREAM_FORMAT,
3498                                 format);
3499                 /* turn on again (if needed) */
3500                 /* enable and set the channel status audio/data flag */
3501                 if (codec->spdif_status_reset &&
3502                 (spdif->ctls & AC_DIG1_ENABLE)) {
3503                         snd_hda_codec_write(codec,
3504                                         nvhdmi_con_nids_7x[i],
3505                                         0,
3506                                         AC_VERB_SET_DIGI_CONVERT_1,
3507                                         spdif->ctls & 0xff);
3508                         snd_hda_codec_write(codec,
3509                                         nvhdmi_con_nids_7x[i],
3510                                         0,
3511                                         AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
3512                 }
3513         }
3514
3515         nvhdmi_8ch_7x_set_info_frame_parameters(codec, chs);
3516
3517         mutex_unlock(&codec->spdif_mutex);
3518         return 0;
3519 }
3520
3521 static const struct hda_pcm_stream nvhdmi_pcm_playback_8ch_7x = {
3522         .substreams = 1,
3523         .channels_min = 2,
3524         .channels_max = 8,
3525         .nid = nvhdmi_master_con_nid_7x,
3526         .rates = SUPPORTED_RATES,
3527         .maxbps = SUPPORTED_MAXBPS,
3528         .formats = SUPPORTED_FORMATS,
3529         .ops = {
3530                 .open = simple_playback_pcm_open,
3531                 .close = nvhdmi_8ch_7x_pcm_close,
3532                 .prepare = nvhdmi_8ch_7x_pcm_prepare
3533         },
3534 };
3535
3536 static int patch_nvhdmi_2ch(struct hda_codec *codec)
3537 {
3538         struct hdmi_spec *spec;
3539         int err = patch_simple_hdmi(codec, nvhdmi_master_con_nid_7x,
3540                                     nvhdmi_master_pin_nid_7x);
3541         if (err < 0)
3542                 return err;
3543
3544         codec->patch_ops.init = nvhdmi_7x_init_2ch;
3545         /* override the PCM rates, etc, as the codec doesn't give full list */
3546         spec = codec->spec;
3547         spec->pcm_playback.rates = SUPPORTED_RATES;
3548         spec->pcm_playback.maxbps = SUPPORTED_MAXBPS;
3549         spec->pcm_playback.formats = SUPPORTED_FORMATS;
3550         spec->nv_dp_workaround = true;
3551         return 0;
3552 }
3553
3554 static int nvhdmi_7x_8ch_build_pcms(struct hda_codec *codec)
3555 {
3556         struct hdmi_spec *spec = codec->spec;
3557         int err = simple_playback_build_pcms(codec);
3558         if (!err) {
3559                 struct hda_pcm *info = get_pcm_rec(spec, 0);
3560                 info->own_chmap = true;
3561         }
3562         return err;
3563 }
3564
3565 static int nvhdmi_7x_8ch_build_controls(struct hda_codec *codec)
3566 {
3567         struct hdmi_spec *spec = codec->spec;
3568         struct hda_pcm *info;
3569         struct snd_pcm_chmap *chmap;
3570         int err;
3571
3572         err = simple_playback_build_controls(codec);
3573         if (err < 0)
3574                 return err;
3575
3576         /* add channel maps */
3577         info = get_pcm_rec(spec, 0);
3578         err = snd_pcm_add_chmap_ctls(info->pcm,
3579                                      SNDRV_PCM_STREAM_PLAYBACK,
3580                                      snd_pcm_alt_chmaps, 8, 0, &chmap);
3581         if (err < 0)
3582                 return err;
3583         switch (codec->preset->vendor_id) {
3584         case 0x10de0002:
3585         case 0x10de0003:
3586         case 0x10de0005:
3587         case 0x10de0006:
3588                 chmap->channel_mask = (1U << 2) | (1U << 8);
3589                 break;
3590         case 0x10de0007:
3591                 chmap->channel_mask = (1U << 2) | (1U << 6) | (1U << 8);
3592         }
3593         return 0;
3594 }
3595
3596 static int patch_nvhdmi_8ch_7x(struct hda_codec *codec)
3597 {
3598         struct hdmi_spec *spec;
3599         int err = patch_nvhdmi_2ch(codec);
3600         if (err < 0)
3601                 return err;
3602         spec = codec->spec;
3603         spec->multiout.max_channels = 8;
3604         spec->pcm_playback = nvhdmi_pcm_playback_8ch_7x;
3605         codec->patch_ops.init = nvhdmi_7x_init_8ch;
3606         codec->patch_ops.build_pcms = nvhdmi_7x_8ch_build_pcms;
3607         codec->patch_ops.build_controls = nvhdmi_7x_8ch_build_controls;
3608
3609         /* Initialize the audio infoframe channel mask and checksum to something
3610          * valid */
3611         nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
3612
3613         return 0;
3614 }
3615
3616 /*
3617  * NVIDIA codecs ignore ASP mapping for 2ch - confirmed on:
3618  * - 0x10de0015
3619  * - 0x10de0040
3620  */
3621 static int nvhdmi_chmap_cea_alloc_validate_get_type(struct hdac_chmap *chmap,
3622                 struct hdac_cea_channel_speaker_allocation *cap, int channels)
3623 {
3624         if (cap->ca_index == 0x00 && channels == 2)
3625                 return SNDRV_CTL_TLVT_CHMAP_FIXED;
3626
3627         /* If the speaker allocation matches the channel count, it is OK. */
3628         if (cap->channels != channels)
3629                 return -1;
3630
3631         /* all channels are remappable freely */
3632         return SNDRV_CTL_TLVT_CHMAP_VAR;
3633 }
3634
3635 static int nvhdmi_chmap_validate(struct hdac_chmap *chmap,
3636                 int ca, int chs, unsigned char *map)
3637 {
3638         if (ca == 0x00 && (map[0] != SNDRV_CHMAP_FL || map[1] != SNDRV_CHMAP_FR))
3639                 return -EINVAL;
3640
3641         return 0;
3642 }
3643
3644 /* map from pin NID to port; port is 0-based */
3645 /* for Nvidia: assume widget NID starting from 4, with step 1 (4, 5, 6, ...) */
3646 static int nvhdmi_pin2port(void *audio_ptr, int pin_nid)
3647 {
3648         return pin_nid - 4;
3649 }
3650
3651 /* reverse-map from port to pin NID: see above */
3652 static int nvhdmi_port2pin(struct hda_codec *codec, int port)
3653 {
3654         return port + 4;
3655 }
3656
3657 static const struct drm_audio_component_audio_ops nvhdmi_audio_ops = {
3658         .pin2port = nvhdmi_pin2port,
3659         .pin_eld_notify = generic_acomp_pin_eld_notify,
3660         .master_bind = generic_acomp_master_bind,
3661         .master_unbind = generic_acomp_master_unbind,
3662 };
3663
3664 static int patch_nvhdmi(struct hda_codec *codec)
3665 {
3666         struct hdmi_spec *spec;
3667         int err;
3668
3669         err = alloc_generic_hdmi(codec);
3670         if (err < 0)
3671                 return err;
3672         codec->dp_mst = true;
3673
3674         spec = codec->spec;
3675         spec->dyn_pcm_assign = true;
3676
3677         err = hdmi_parse_codec(codec);
3678         if (err < 0) {
3679                 generic_spec_free(codec);
3680                 return err;
3681         }
3682
3683         generic_hdmi_init_per_pins(codec);
3684
3685         spec->dyn_pin_out = true;
3686
3687         spec->chmap.ops.chmap_cea_alloc_validate_get_type =
3688                 nvhdmi_chmap_cea_alloc_validate_get_type;
3689         spec->chmap.ops.chmap_validate = nvhdmi_chmap_validate;
3690         spec->nv_dp_workaround = true;
3691
3692         codec->link_down_at_suspend = 1;
3693
3694         generic_acomp_init(codec, &nvhdmi_audio_ops, nvhdmi_port2pin);
3695
3696         return 0;
3697 }
3698
3699 static int patch_nvhdmi_legacy(struct hda_codec *codec)
3700 {
3701         struct hdmi_spec *spec;
3702         int err;
3703
3704         err = patch_generic_hdmi(codec);
3705         if (err)
3706                 return err;
3707
3708         spec = codec->spec;
3709         spec->dyn_pin_out = true;
3710
3711         spec->chmap.ops.chmap_cea_alloc_validate_get_type =
3712                 nvhdmi_chmap_cea_alloc_validate_get_type;
3713         spec->chmap.ops.chmap_validate = nvhdmi_chmap_validate;
3714         spec->nv_dp_workaround = true;
3715
3716         codec->link_down_at_suspend = 1;
3717
3718         return 0;
3719 }
3720
3721 /*
3722  * The HDA codec on NVIDIA Tegra contains two scratch registers that are
3723  * accessed using vendor-defined verbs. These registers can be used for
3724  * interoperability between the HDA and HDMI drivers.
3725  */
3726
3727 /* Audio Function Group node */
3728 #define NVIDIA_AFG_NID 0x01
3729
3730 /*
3731  * The SCRATCH0 register is used to notify the HDMI codec of changes in audio
3732  * format. On Tegra, bit 31 is used as a trigger that causes an interrupt to
3733  * be raised in the HDMI codec. The remainder of the bits is arbitrary. This
3734  * implementation stores the HDA format (see AC_FMT_*) in bits [15:0] and an
3735  * additional bit (at position 30) to signal the validity of the format.
3736  *
3737  * | 31      | 30    | 29  16 | 15   0 |
3738  * +---------+-------+--------+--------+
3739  * | TRIGGER | VALID | UNUSED | FORMAT |
3740  * +-----------------------------------|
3741  *
3742  * Note that for the trigger bit to take effect it needs to change value
3743  * (i.e. it needs to be toggled).
3744  */
3745 #define NVIDIA_GET_SCRATCH0             0xfa6
3746 #define NVIDIA_SET_SCRATCH0_BYTE0       0xfa7
3747 #define NVIDIA_SET_SCRATCH0_BYTE1       0xfa8
3748 #define NVIDIA_SET_SCRATCH0_BYTE2       0xfa9
3749 #define NVIDIA_SET_SCRATCH0_BYTE3       0xfaa
3750 #define NVIDIA_SCRATCH_TRIGGER (1 << 7)
3751 #define NVIDIA_SCRATCH_VALID   (1 << 6)
3752
3753 #define NVIDIA_GET_SCRATCH1             0xfab
3754 #define NVIDIA_SET_SCRATCH1_BYTE0       0xfac
3755 #define NVIDIA_SET_SCRATCH1_BYTE1       0xfad
3756 #define NVIDIA_SET_SCRATCH1_BYTE2       0xfae
3757 #define NVIDIA_SET_SCRATCH1_BYTE3       0xfaf
3758
3759 /*
3760  * The format parameter is the HDA audio format (see AC_FMT_*). If set to 0,
3761  * the format is invalidated so that the HDMI codec can be disabled.
3762  */
3763 static void tegra_hdmi_set_format(struct hda_codec *codec, unsigned int format)
3764 {
3765         unsigned int value;
3766
3767         /* bits [31:30] contain the trigger and valid bits */
3768         value = snd_hda_codec_read(codec, NVIDIA_AFG_NID, 0,
3769                                    NVIDIA_GET_SCRATCH0, 0);
3770         value = (value >> 24) & 0xff;
3771
3772         /* bits [15:0] are used to store the HDA format */
3773         snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
3774                             NVIDIA_SET_SCRATCH0_BYTE0,
3775                             (format >> 0) & 0xff);
3776         snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
3777                             NVIDIA_SET_SCRATCH0_BYTE1,
3778                             (format >> 8) & 0xff);
3779
3780         /* bits [16:24] are unused */
3781         snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
3782                             NVIDIA_SET_SCRATCH0_BYTE2, 0);
3783
3784         /*
3785          * Bit 30 signals that the data is valid and hence that HDMI audio can
3786          * be enabled.
3787          */
3788         if (format == 0)
3789                 value &= ~NVIDIA_SCRATCH_VALID;
3790         else
3791                 value |= NVIDIA_SCRATCH_VALID;
3792
3793         /*
3794          * Whenever the trigger bit is toggled, an interrupt is raised in the
3795          * HDMI codec. The HDMI driver will use that as trigger to update its
3796          * configuration.
3797          */
3798         value ^= NVIDIA_SCRATCH_TRIGGER;
3799
3800         snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
3801                             NVIDIA_SET_SCRATCH0_BYTE3, value);
3802 }
3803
3804 static int tegra_hdmi_pcm_prepare(struct hda_pcm_stream *hinfo,
3805                                   struct hda_codec *codec,
3806                                   unsigned int stream_tag,
3807                                   unsigned int format,
3808                                   struct snd_pcm_substream *substream)
3809 {
3810         int err;
3811
3812         err = generic_hdmi_playback_pcm_prepare(hinfo, codec, stream_tag,
3813                                                 format, substream);
3814         if (err < 0)
3815                 return err;
3816
3817         /* notify the HDMI codec of the format change */
3818         tegra_hdmi_set_format(codec, format);
3819
3820         return 0;
3821 }
3822
3823 static int tegra_hdmi_pcm_cleanup(struct hda_pcm_stream *hinfo,
3824                                   struct hda_codec *codec,
3825                                   struct snd_pcm_substream *substream)
3826 {
3827         /* invalidate the format in the HDMI codec */
3828         tegra_hdmi_set_format(codec, 0);
3829
3830         return generic_hdmi_playback_pcm_cleanup(hinfo, codec, substream);
3831 }
3832
3833 static struct hda_pcm *hda_find_pcm_by_type(struct hda_codec *codec, int type)
3834 {
3835         struct hdmi_spec *spec = codec->spec;
3836         unsigned int i;
3837
3838         for (i = 0; i < spec->num_pins; i++) {
3839                 struct hda_pcm *pcm = get_pcm_rec(spec, i);
3840
3841                 if (pcm->pcm_type == type)
3842                         return pcm;
3843         }
3844
3845         return NULL;
3846 }
3847
3848 static int tegra_hdmi_build_pcms(struct hda_codec *codec)
3849 {
3850         struct hda_pcm_stream *stream;
3851         struct hda_pcm *pcm;
3852         int err;
3853
3854         err = generic_hdmi_build_pcms(codec);
3855         if (err < 0)
3856                 return err;
3857
3858         pcm = hda_find_pcm_by_type(codec, HDA_PCM_TYPE_HDMI);
3859         if (!pcm)
3860                 return -ENODEV;
3861
3862         /*
3863          * Override ->prepare() and ->cleanup() operations to notify the HDMI
3864          * codec about format changes.
3865          */
3866         stream = &pcm->stream[SNDRV_PCM_STREAM_PLAYBACK];
3867         stream->ops.prepare = tegra_hdmi_pcm_prepare;
3868         stream->ops.cleanup = tegra_hdmi_pcm_cleanup;
3869
3870         return 0;
3871 }
3872
3873 static int patch_tegra_hdmi(struct hda_codec *codec)
3874 {
3875         struct hdmi_spec *spec;
3876         int err;
3877
3878         err = patch_generic_hdmi(codec);
3879         if (err)
3880                 return err;
3881
3882         codec->depop_delay = 10;
3883         codec->patch_ops.build_pcms = tegra_hdmi_build_pcms;
3884         spec = codec->spec;
3885         spec->chmap.ops.chmap_cea_alloc_validate_get_type =
3886                 nvhdmi_chmap_cea_alloc_validate_get_type;
3887         spec->chmap.ops.chmap_validate = nvhdmi_chmap_validate;
3888         spec->nv_dp_workaround = true;
3889
3890         return 0;
3891 }
3892
3893 /*
3894  * ATI/AMD-specific implementations
3895  */
3896
3897 #define is_amdhdmi_rev3_or_later(codec) \
3898         ((codec)->core.vendor_id == 0x1002aa01 && \
3899          ((codec)->core.revision_id & 0xff00) >= 0x0300)
3900 #define has_amd_full_remap_support(codec) is_amdhdmi_rev3_or_later(codec)
3901
3902 /* ATI/AMD specific HDA pin verbs, see the AMD HDA Verbs specification */
3903 #define ATI_VERB_SET_CHANNEL_ALLOCATION 0x771
3904 #define ATI_VERB_SET_DOWNMIX_INFO       0x772
3905 #define ATI_VERB_SET_MULTICHANNEL_01    0x777
3906 #define ATI_VERB_SET_MULTICHANNEL_23    0x778
3907 #define ATI_VERB_SET_MULTICHANNEL_45    0x779
3908 #define ATI_VERB_SET_MULTICHANNEL_67    0x77a
3909 #define ATI_VERB_SET_HBR_CONTROL        0x77c
3910 #define ATI_VERB_SET_MULTICHANNEL_1     0x785
3911 #define ATI_VERB_SET_MULTICHANNEL_3     0x786
3912 #define ATI_VERB_SET_MULTICHANNEL_5     0x787
3913 #define ATI_VERB_SET_MULTICHANNEL_7     0x788
3914 #define ATI_VERB_SET_MULTICHANNEL_MODE  0x789
3915 #define ATI_VERB_GET_CHANNEL_ALLOCATION 0xf71
3916 #define ATI_VERB_GET_DOWNMIX_INFO       0xf72
3917 #define ATI_VERB_GET_MULTICHANNEL_01    0xf77
3918 #define ATI_VERB_GET_MULTICHANNEL_23    0xf78
3919 #define ATI_VERB_GET_MULTICHANNEL_45    0xf79
3920 #define ATI_VERB_GET_MULTICHANNEL_67    0xf7a
3921 #define ATI_VERB_GET_HBR_CONTROL        0xf7c
3922 #define ATI_VERB_GET_MULTICHANNEL_1     0xf85
3923 #define ATI_VERB_GET_MULTICHANNEL_3     0xf86
3924 #define ATI_VERB_GET_MULTICHANNEL_5     0xf87
3925 #define ATI_VERB_GET_MULTICHANNEL_7     0xf88
3926 #define ATI_VERB_GET_MULTICHANNEL_MODE  0xf89
3927
3928 /* AMD specific HDA cvt verbs */
3929 #define ATI_VERB_SET_RAMP_RATE          0x770
3930 #define ATI_VERB_GET_RAMP_RATE          0xf70
3931
3932 #define ATI_OUT_ENABLE 0x1
3933
3934 #define ATI_MULTICHANNEL_MODE_PAIRED    0
3935 #define ATI_MULTICHANNEL_MODE_SINGLE    1
3936
3937 #define ATI_HBR_CAPABLE 0x01
3938 #define ATI_HBR_ENABLE 0x10
3939
3940 static int atihdmi_pin_get_eld(struct hda_codec *codec, hda_nid_t nid,
3941                                int dev_id, unsigned char *buf, int *eld_size)
3942 {
3943         WARN_ON(dev_id != 0);
3944         /* call hda_eld.c ATI/AMD-specific function */
3945         return snd_hdmi_get_eld_ati(codec, nid, buf, eld_size,
3946                                     is_amdhdmi_rev3_or_later(codec));
3947 }
3948
3949 static void atihdmi_pin_setup_infoframe(struct hda_codec *codec,
3950                                         hda_nid_t pin_nid, int dev_id, int ca,
3951                                         int active_channels, int conn_type)
3952 {
3953         WARN_ON(dev_id != 0);
3954         snd_hda_codec_write(codec, pin_nid, 0, ATI_VERB_SET_CHANNEL_ALLOCATION, ca);
3955 }
3956
3957 static int atihdmi_paired_swap_fc_lfe(int pos)
3958 {
3959         /*
3960          * ATI/AMD have automatic FC/LFE swap built-in
3961          * when in pairwise mapping mode.
3962          */
3963
3964         switch (pos) {
3965                 /* see channel_allocations[].speakers[] */
3966                 case 2: return 3;
3967                 case 3: return 2;
3968                 default: break;
3969         }
3970
3971         return pos;
3972 }
3973
3974 static int atihdmi_paired_chmap_validate(struct hdac_chmap *chmap,
3975                         int ca, int chs, unsigned char *map)
3976 {
3977         struct hdac_cea_channel_speaker_allocation *cap;
3978         int i, j;
3979
3980         /* check that only channel pairs need to be remapped on old pre-rev3 ATI/AMD */
3981
3982         cap = snd_hdac_get_ch_alloc_from_ca(ca);
3983         for (i = 0; i < chs; ++i) {
3984                 int mask = snd_hdac_chmap_to_spk_mask(map[i]);
3985                 bool ok = false;
3986                 bool companion_ok = false;
3987
3988                 if (!mask)
3989                         continue;
3990
3991                 for (j = 0 + i % 2; j < 8; j += 2) {
3992                         int chan_idx = 7 - atihdmi_paired_swap_fc_lfe(j);
3993                         if (cap->speakers[chan_idx] == mask) {
3994                                 /* channel is in a supported position */
3995                                 ok = true;
3996
3997                                 if (i % 2 == 0 && i + 1 < chs) {
3998                                         /* even channel, check the odd companion */
3999                                         int comp_chan_idx = 7 - atihdmi_paired_swap_fc_lfe(j + 1);
4000                                         int comp_mask_req = snd_hdac_chmap_to_spk_mask(map[i+1]);
4001                                         int comp_mask_act = cap->speakers[comp_chan_idx];
4002
4003                                         if (comp_mask_req == comp_mask_act)
4004                                                 companion_ok = true;
4005                                         else
4006                                                 return -EINVAL;
4007                                 }
4008                                 break;
4009                         }
4010                 }
4011
4012                 if (!ok)
4013                         return -EINVAL;
4014
4015                 if (companion_ok)
4016                         i++; /* companion channel already checked */
4017         }
4018
4019         return 0;
4020 }
4021
4022 static int atihdmi_pin_set_slot_channel(struct hdac_device *hdac,
4023                 hda_nid_t pin_nid, int hdmi_slot, int stream_channel)
4024 {
4025         struct hda_codec *codec = hdac_to_hda_codec(hdac);
4026         int verb;
4027         int ati_channel_setup = 0;
4028
4029         if (hdmi_slot > 7)
4030                 return -EINVAL;
4031
4032         if (!has_amd_full_remap_support(codec)) {
4033                 hdmi_slot = atihdmi_paired_swap_fc_lfe(hdmi_slot);
4034
4035                 /* In case this is an odd slot but without stream channel, do not
4036                  * disable the slot since the corresponding even slot could have a
4037                  * channel. In case neither have a channel, the slot pair will be
4038                  * disabled when this function is called for the even slot. */
4039                 if (hdmi_slot % 2 != 0 && stream_channel == 0xf)
4040                         return 0;
4041
4042                 hdmi_slot -= hdmi_slot % 2;
4043
4044                 if (stream_channel != 0xf)
4045                         stream_channel -= stream_channel % 2;
4046         }
4047
4048         verb = ATI_VERB_SET_MULTICHANNEL_01 + hdmi_slot/2 + (hdmi_slot % 2) * 0x00e;
4049
4050         /* ati_channel_setup format: [7..4] = stream_channel_id, [1] = mute, [0] = enable */
4051
4052         if (stream_channel != 0xf)
4053                 ati_channel_setup = (stream_channel << 4) | ATI_OUT_ENABLE;
4054
4055         return snd_hda_codec_write(codec, pin_nid, 0, verb, ati_channel_setup);
4056 }
4057
4058 static int atihdmi_pin_get_slot_channel(struct hdac_device *hdac,
4059                                 hda_nid_t pin_nid, int asp_slot)
4060 {
4061         struct hda_codec *codec = hdac_to_hda_codec(hdac);
4062         bool was_odd = false;
4063         int ati_asp_slot = asp_slot;
4064         int verb;
4065         int ati_channel_setup;
4066
4067         if (asp_slot > 7)
4068                 return -EINVAL;
4069
4070         if (!has_amd_full_remap_support(codec)) {
4071                 ati_asp_slot = atihdmi_paired_swap_fc_lfe(asp_slot);
4072                 if (ati_asp_slot % 2 != 0) {
4073                         ati_asp_slot -= 1;
4074                         was_odd = true;
4075                 }
4076         }
4077
4078         verb = ATI_VERB_GET_MULTICHANNEL_01 + ati_asp_slot/2 + (ati_asp_slot % 2) * 0x00e;
4079
4080         ati_channel_setup = snd_hda_codec_read(codec, pin_nid, 0, verb, 0);
4081
4082         if (!(ati_channel_setup & ATI_OUT_ENABLE))
4083                 return 0xf;
4084
4085         return ((ati_channel_setup & 0xf0) >> 4) + !!was_odd;
4086 }
4087
4088 static int atihdmi_paired_chmap_cea_alloc_validate_get_type(
4089                 struct hdac_chmap *chmap,
4090                 struct hdac_cea_channel_speaker_allocation *cap,
4091                 int channels)
4092 {
4093         int c;
4094
4095         /*
4096          * Pre-rev3 ATI/AMD codecs operate in a paired channel mode, so
4097          * we need to take that into account (a single channel may take 2
4098          * channel slots if we need to carry a silent channel next to it).
4099          * On Rev3+ AMD codecs this function is not used.
4100          */
4101         int chanpairs = 0;
4102
4103         /* We only produce even-numbered channel count TLVs */
4104         if ((channels % 2) != 0)
4105                 return -1;
4106
4107         for (c = 0; c < 7; c += 2) {
4108                 if (cap->speakers[c] || cap->speakers[c+1])
4109                         chanpairs++;
4110         }
4111
4112         if (chanpairs * 2 != channels)
4113                 return -1;
4114
4115         return SNDRV_CTL_TLVT_CHMAP_PAIRED;
4116 }
4117
4118 static void atihdmi_paired_cea_alloc_to_tlv_chmap(struct hdac_chmap *hchmap,
4119                 struct hdac_cea_channel_speaker_allocation *cap,
4120                 unsigned int *chmap, int channels)
4121 {
4122         /* produce paired maps for pre-rev3 ATI/AMD codecs */
4123         int count = 0;
4124         int c;
4125
4126         for (c = 7; c >= 0; c--) {
4127                 int chan = 7 - atihdmi_paired_swap_fc_lfe(7 - c);
4128                 int spk = cap->speakers[chan];
4129                 if (!spk) {
4130                         /* add N/A channel if the companion channel is occupied */
4131                         if (cap->speakers[chan + (chan % 2 ? -1 : 1)])
4132                                 chmap[count++] = SNDRV_CHMAP_NA;
4133
4134                         continue;
4135                 }
4136
4137                 chmap[count++] = snd_hdac_spk_to_chmap(spk);
4138         }
4139
4140         WARN_ON(count != channels);
4141 }
4142
4143 static int atihdmi_pin_hbr_setup(struct hda_codec *codec, hda_nid_t pin_nid,
4144                                  int dev_id, bool hbr)
4145 {
4146         int hbr_ctl, hbr_ctl_new;
4147
4148         WARN_ON(dev_id != 0);
4149
4150         hbr_ctl = snd_hda_codec_read(codec, pin_nid, 0, ATI_VERB_GET_HBR_CONTROL, 0);
4151         if (hbr_ctl >= 0 && (hbr_ctl & ATI_HBR_CAPABLE)) {
4152                 if (hbr)
4153                         hbr_ctl_new = hbr_ctl | ATI_HBR_ENABLE;
4154                 else
4155                         hbr_ctl_new = hbr_ctl & ~ATI_HBR_ENABLE;
4156
4157                 codec_dbg(codec,
4158                           "atihdmi_pin_hbr_setup: NID=0x%x, %shbr-ctl=0x%x\n",
4159                                 pin_nid,
4160                                 hbr_ctl == hbr_ctl_new ? "" : "new-",
4161                                 hbr_ctl_new);
4162
4163                 if (hbr_ctl != hbr_ctl_new)
4164                         snd_hda_codec_write(codec, pin_nid, 0,
4165                                                 ATI_VERB_SET_HBR_CONTROL,
4166                                                 hbr_ctl_new);
4167
4168         } else if (hbr)
4169                 return -EINVAL;
4170
4171         return 0;
4172 }
4173
4174 static int atihdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
4175                                 hda_nid_t pin_nid, int dev_id,
4176                                 u32 stream_tag, int format)
4177 {
4178         if (is_amdhdmi_rev3_or_later(codec)) {
4179                 int ramp_rate = 180; /* default as per AMD spec */
4180                 /* disable ramp-up/down for non-pcm as per AMD spec */
4181                 if (format & AC_FMT_TYPE_NON_PCM)
4182                         ramp_rate = 0;
4183
4184                 snd_hda_codec_write(codec, cvt_nid, 0, ATI_VERB_SET_RAMP_RATE, ramp_rate);
4185         }
4186
4187         return hdmi_setup_stream(codec, cvt_nid, pin_nid, dev_id,
4188                                  stream_tag, format);
4189 }
4190
4191
4192 static int atihdmi_init(struct hda_codec *codec)
4193 {
4194         struct hdmi_spec *spec = codec->spec;
4195         int pin_idx, err;
4196
4197         err = generic_hdmi_init(codec);
4198
4199         if (err)
4200                 return err;
4201
4202         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
4203                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
4204
4205                 /* make sure downmix information in infoframe is zero */
4206                 snd_hda_codec_write(codec, per_pin->pin_nid, 0, ATI_VERB_SET_DOWNMIX_INFO, 0);
4207
4208                 /* enable channel-wise remap mode if supported */
4209                 if (has_amd_full_remap_support(codec))
4210                         snd_hda_codec_write(codec, per_pin->pin_nid, 0,
4211                                             ATI_VERB_SET_MULTICHANNEL_MODE,
4212                                             ATI_MULTICHANNEL_MODE_SINGLE);
4213         }
4214         codec->auto_runtime_pm = 1;
4215
4216         return 0;
4217 }
4218
4219 /* map from pin NID to port; port is 0-based */
4220 /* for AMD: assume widget NID starting from 3, with step 2 (3, 5, 7, ...) */
4221 static int atihdmi_pin2port(void *audio_ptr, int pin_nid)
4222 {
4223         return pin_nid / 2 - 1;
4224 }
4225
4226 /* reverse-map from port to pin NID: see above */
4227 static int atihdmi_port2pin(struct hda_codec *codec, int port)
4228 {
4229         return port * 2 + 3;
4230 }
4231
4232 static const struct drm_audio_component_audio_ops atihdmi_audio_ops = {
4233         .pin2port = atihdmi_pin2port,
4234         .pin_eld_notify = generic_acomp_pin_eld_notify,
4235         .master_bind = generic_acomp_master_bind,
4236         .master_unbind = generic_acomp_master_unbind,
4237 };
4238
4239 static int patch_atihdmi(struct hda_codec *codec)
4240 {
4241         struct hdmi_spec *spec;
4242         struct hdmi_spec_per_cvt *per_cvt;
4243         int err, cvt_idx;
4244
4245         err = patch_generic_hdmi(codec);
4246
4247         if (err)
4248                 return err;
4249
4250         codec->patch_ops.init = atihdmi_init;
4251
4252         spec = codec->spec;
4253
4254         spec->ops.pin_get_eld = atihdmi_pin_get_eld;
4255         spec->ops.pin_setup_infoframe = atihdmi_pin_setup_infoframe;
4256         spec->ops.pin_hbr_setup = atihdmi_pin_hbr_setup;
4257         spec->ops.setup_stream = atihdmi_setup_stream;
4258
4259         spec->chmap.ops.pin_get_slot_channel = atihdmi_pin_get_slot_channel;
4260         spec->chmap.ops.pin_set_slot_channel = atihdmi_pin_set_slot_channel;
4261
4262         if (!has_amd_full_remap_support(codec)) {
4263                 /* override to ATI/AMD-specific versions with pairwise mapping */
4264                 spec->chmap.ops.chmap_cea_alloc_validate_get_type =
4265                         atihdmi_paired_chmap_cea_alloc_validate_get_type;
4266                 spec->chmap.ops.cea_alloc_to_tlv_chmap =
4267                                 atihdmi_paired_cea_alloc_to_tlv_chmap;
4268                 spec->chmap.ops.chmap_validate = atihdmi_paired_chmap_validate;
4269         }
4270
4271         /* ATI/AMD converters do not advertise all of their capabilities */
4272         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
4273                 per_cvt = get_cvt(spec, cvt_idx);
4274                 per_cvt->channels_max = max(per_cvt->channels_max, 8u);
4275                 per_cvt->rates |= SUPPORTED_RATES;
4276                 per_cvt->formats |= SUPPORTED_FORMATS;
4277                 per_cvt->maxbps = max(per_cvt->maxbps, 24u);
4278         }
4279
4280         spec->chmap.channels_max = max(spec->chmap.channels_max, 8u);
4281
4282         /* AMD GPUs have neither EPSS nor CLKSTOP bits, hence preventing
4283          * the link-down as is.  Tell the core to allow it.
4284          */
4285         codec->link_down_at_suspend = 1;
4286
4287         generic_acomp_init(codec, &atihdmi_audio_ops, atihdmi_port2pin);
4288
4289         return 0;
4290 }
4291
4292 /* VIA HDMI Implementation */
4293 #define VIAHDMI_CVT_NID 0x02    /* audio converter1 */
4294 #define VIAHDMI_PIN_NID 0x03    /* HDMI output pin1 */
4295
4296 static int patch_via_hdmi(struct hda_codec *codec)
4297 {
4298         return patch_simple_hdmi(codec, VIAHDMI_CVT_NID, VIAHDMI_PIN_NID);
4299 }
4300
4301 static int patch_gf_hdmi(struct hda_codec *codec)
4302 {
4303         int err;
4304
4305         err = patch_generic_hdmi(codec);
4306         if (err)
4307                 return err;
4308
4309         /*
4310          * Glenfly GPUs have two codecs, stream switches from one codec to
4311          * another, need to do actual clean-ups in codec_cleanup_stream
4312          */
4313         codec->no_sticky_stream = 1;
4314         return 0;
4315 }
4316
4317 /*
4318  * patch entries
4319  */
4320 static const struct hda_device_id snd_hda_id_hdmi[] = {
4321 HDA_CODEC_ENTRY(0x1002793c, "RS600 HDMI",       patch_atihdmi),
4322 HDA_CODEC_ENTRY(0x10027919, "RS600 HDMI",       patch_atihdmi),
4323 HDA_CODEC_ENTRY(0x1002791a, "RS690/780 HDMI",   patch_atihdmi),
4324 HDA_CODEC_ENTRY(0x1002aa01, "R6xx HDMI",        patch_atihdmi),
4325 HDA_CODEC_ENTRY(0x10951390, "SiI1390 HDMI",     patch_generic_hdmi),
4326 HDA_CODEC_ENTRY(0x10951392, "SiI1392 HDMI",     patch_generic_hdmi),
4327 HDA_CODEC_ENTRY(0x17e80047, "Chrontel HDMI",    patch_generic_hdmi),
4328 HDA_CODEC_ENTRY(0x10de0001, "MCP73 HDMI",       patch_nvhdmi_2ch),
4329 HDA_CODEC_ENTRY(0x10de0002, "MCP77/78 HDMI",    patch_nvhdmi_8ch_7x),
4330 HDA_CODEC_ENTRY(0x10de0003, "MCP77/78 HDMI",    patch_nvhdmi_8ch_7x),
4331 HDA_CODEC_ENTRY(0x10de0004, "GPU 04 HDMI",      patch_nvhdmi_8ch_7x),
4332 HDA_CODEC_ENTRY(0x10de0005, "MCP77/78 HDMI",    patch_nvhdmi_8ch_7x),
4333 HDA_CODEC_ENTRY(0x10de0006, "MCP77/78 HDMI",    patch_nvhdmi_8ch_7x),
4334 HDA_CODEC_ENTRY(0x10de0007, "MCP79/7A HDMI",    patch_nvhdmi_8ch_7x),
4335 HDA_CODEC_ENTRY(0x10de0008, "GPU 08 HDMI/DP",   patch_nvhdmi_legacy),
4336 HDA_CODEC_ENTRY(0x10de0009, "GPU 09 HDMI/DP",   patch_nvhdmi_legacy),
4337 HDA_CODEC_ENTRY(0x10de000a, "GPU 0a HDMI/DP",   patch_nvhdmi_legacy),
4338 HDA_CODEC_ENTRY(0x10de000b, "GPU 0b HDMI/DP",   patch_nvhdmi_legacy),
4339 HDA_CODEC_ENTRY(0x10de000c, "MCP89 HDMI",       patch_nvhdmi_legacy),
4340 HDA_CODEC_ENTRY(0x10de000d, "GPU 0d HDMI/DP",   patch_nvhdmi_legacy),
4341 HDA_CODEC_ENTRY(0x10de0010, "GPU 10 HDMI/DP",   patch_nvhdmi_legacy),
4342 HDA_CODEC_ENTRY(0x10de0011, "GPU 11 HDMI/DP",   patch_nvhdmi_legacy),
4343 HDA_CODEC_ENTRY(0x10de0012, "GPU 12 HDMI/DP",   patch_nvhdmi_legacy),
4344 HDA_CODEC_ENTRY(0x10de0013, "GPU 13 HDMI/DP",   patch_nvhdmi_legacy),
4345 HDA_CODEC_ENTRY(0x10de0014, "GPU 14 HDMI/DP",   patch_nvhdmi_legacy),
4346 HDA_CODEC_ENTRY(0x10de0015, "GPU 15 HDMI/DP",   patch_nvhdmi_legacy),
4347 HDA_CODEC_ENTRY(0x10de0016, "GPU 16 HDMI/DP",   patch_nvhdmi_legacy),
4348 /* 17 is known to be absent */
4349 HDA_CODEC_ENTRY(0x10de0018, "GPU 18 HDMI/DP",   patch_nvhdmi_legacy),
4350 HDA_CODEC_ENTRY(0x10de0019, "GPU 19 HDMI/DP",   patch_nvhdmi_legacy),
4351 HDA_CODEC_ENTRY(0x10de001a, "GPU 1a HDMI/DP",   patch_nvhdmi_legacy),
4352 HDA_CODEC_ENTRY(0x10de001b, "GPU 1b HDMI/DP",   patch_nvhdmi_legacy),
4353 HDA_CODEC_ENTRY(0x10de001c, "GPU 1c HDMI/DP",   patch_nvhdmi_legacy),
4354 HDA_CODEC_ENTRY(0x10de0020, "Tegra30 HDMI",     patch_tegra_hdmi),
4355 HDA_CODEC_ENTRY(0x10de0022, "Tegra114 HDMI",    patch_tegra_hdmi),
4356 HDA_CODEC_ENTRY(0x10de0028, "Tegra124 HDMI",    patch_tegra_hdmi),
4357 HDA_CODEC_ENTRY(0x10de0029, "Tegra210 HDMI/DP", patch_tegra_hdmi),
4358 HDA_CODEC_ENTRY(0x10de002d, "Tegra186 HDMI/DP0", patch_tegra_hdmi),
4359 HDA_CODEC_ENTRY(0x10de002e, "Tegra186 HDMI/DP1", patch_tegra_hdmi),
4360 HDA_CODEC_ENTRY(0x10de002f, "Tegra194 HDMI/DP2", patch_tegra_hdmi),
4361 HDA_CODEC_ENTRY(0x10de0030, "Tegra194 HDMI/DP3", patch_tegra_hdmi),
4362 HDA_CODEC_ENTRY(0x10de0040, "GPU 40 HDMI/DP",   patch_nvhdmi),
4363 HDA_CODEC_ENTRY(0x10de0041, "GPU 41 HDMI/DP",   patch_nvhdmi),
4364 HDA_CODEC_ENTRY(0x10de0042, "GPU 42 HDMI/DP",   patch_nvhdmi),
4365 HDA_CODEC_ENTRY(0x10de0043, "GPU 43 HDMI/DP",   patch_nvhdmi),
4366 HDA_CODEC_ENTRY(0x10de0044, "GPU 44 HDMI/DP",   patch_nvhdmi),
4367 HDA_CODEC_ENTRY(0x10de0045, "GPU 45 HDMI/DP",   patch_nvhdmi),
4368 HDA_CODEC_ENTRY(0x10de0050, "GPU 50 HDMI/DP",   patch_nvhdmi),
4369 HDA_CODEC_ENTRY(0x10de0051, "GPU 51 HDMI/DP",   patch_nvhdmi),
4370 HDA_CODEC_ENTRY(0x10de0052, "GPU 52 HDMI/DP",   patch_nvhdmi),
4371 HDA_CODEC_ENTRY(0x10de0060, "GPU 60 HDMI/DP",   patch_nvhdmi),
4372 HDA_CODEC_ENTRY(0x10de0061, "GPU 61 HDMI/DP",   patch_nvhdmi),
4373 HDA_CODEC_ENTRY(0x10de0062, "GPU 62 HDMI/DP",   patch_nvhdmi),
4374 HDA_CODEC_ENTRY(0x10de0067, "MCP67 HDMI",       patch_nvhdmi_2ch),
4375 HDA_CODEC_ENTRY(0x10de0070, "GPU 70 HDMI/DP",   patch_nvhdmi),
4376 HDA_CODEC_ENTRY(0x10de0071, "GPU 71 HDMI/DP",   patch_nvhdmi),
4377 HDA_CODEC_ENTRY(0x10de0072, "GPU 72 HDMI/DP",   patch_nvhdmi),
4378 HDA_CODEC_ENTRY(0x10de0073, "GPU 73 HDMI/DP",   patch_nvhdmi),
4379 HDA_CODEC_ENTRY(0x10de0074, "GPU 74 HDMI/DP",   patch_nvhdmi),
4380 HDA_CODEC_ENTRY(0x10de0076, "GPU 76 HDMI/DP",   patch_nvhdmi),
4381 HDA_CODEC_ENTRY(0x10de007b, "GPU 7b HDMI/DP",   patch_nvhdmi),
4382 HDA_CODEC_ENTRY(0x10de007c, "GPU 7c HDMI/DP",   patch_nvhdmi),
4383 HDA_CODEC_ENTRY(0x10de007d, "GPU 7d HDMI/DP",   patch_nvhdmi),
4384 HDA_CODEC_ENTRY(0x10de007e, "GPU 7e HDMI/DP",   patch_nvhdmi),
4385 HDA_CODEC_ENTRY(0x10de0080, "GPU 80 HDMI/DP",   patch_nvhdmi),
4386 HDA_CODEC_ENTRY(0x10de0081, "GPU 81 HDMI/DP",   patch_nvhdmi),
4387 HDA_CODEC_ENTRY(0x10de0082, "GPU 82 HDMI/DP",   patch_nvhdmi),
4388 HDA_CODEC_ENTRY(0x10de0083, "GPU 83 HDMI/DP",   patch_nvhdmi),
4389 HDA_CODEC_ENTRY(0x10de0084, "GPU 84 HDMI/DP",   patch_nvhdmi),
4390 HDA_CODEC_ENTRY(0x10de0090, "GPU 90 HDMI/DP",   patch_nvhdmi),
4391 HDA_CODEC_ENTRY(0x10de0091, "GPU 91 HDMI/DP",   patch_nvhdmi),
4392 HDA_CODEC_ENTRY(0x10de0092, "GPU 92 HDMI/DP",   patch_nvhdmi),
4393 HDA_CODEC_ENTRY(0x10de0093, "GPU 93 HDMI/DP",   patch_nvhdmi),
4394 HDA_CODEC_ENTRY(0x10de0094, "GPU 94 HDMI/DP",   patch_nvhdmi),
4395 HDA_CODEC_ENTRY(0x10de0095, "GPU 95 HDMI/DP",   patch_nvhdmi),
4396 HDA_CODEC_ENTRY(0x10de0097, "GPU 97 HDMI/DP",   patch_nvhdmi),
4397 HDA_CODEC_ENTRY(0x10de0098, "GPU 98 HDMI/DP",   patch_nvhdmi),
4398 HDA_CODEC_ENTRY(0x10de0099, "GPU 99 HDMI/DP",   patch_nvhdmi),
4399 HDA_CODEC_ENTRY(0x10de009a, "GPU 9a HDMI/DP",   patch_nvhdmi),
4400 HDA_CODEC_ENTRY(0x10de009d, "GPU 9d HDMI/DP",   patch_nvhdmi),
4401 HDA_CODEC_ENTRY(0x10de009e, "GPU 9e HDMI/DP",   patch_nvhdmi),
4402 HDA_CODEC_ENTRY(0x10de009f, "GPU 9f HDMI/DP",   patch_nvhdmi),
4403 HDA_CODEC_ENTRY(0x10de00a0, "GPU a0 HDMI/DP",   patch_nvhdmi),
4404 HDA_CODEC_ENTRY(0x10de00a3, "GPU a3 HDMI/DP",   patch_nvhdmi),
4405 HDA_CODEC_ENTRY(0x10de00a4, "GPU a4 HDMI/DP",   patch_nvhdmi),
4406 HDA_CODEC_ENTRY(0x10de00a5, "GPU a5 HDMI/DP",   patch_nvhdmi),
4407 HDA_CODEC_ENTRY(0x10de00a6, "GPU a6 HDMI/DP",   patch_nvhdmi),
4408 HDA_CODEC_ENTRY(0x10de00a7, "GPU a7 HDMI/DP",   patch_nvhdmi),
4409 HDA_CODEC_ENTRY(0x10de8001, "MCP73 HDMI",       patch_nvhdmi_2ch),
4410 HDA_CODEC_ENTRY(0x10de8067, "MCP67/68 HDMI",    patch_nvhdmi_2ch),
4411 HDA_CODEC_ENTRY(0x67663d82, "Arise 82 HDMI/DP", patch_gf_hdmi),
4412 HDA_CODEC_ENTRY(0x67663d83, "Arise 83 HDMI/DP", patch_gf_hdmi),
4413 HDA_CODEC_ENTRY(0x67663d84, "Arise 84 HDMI/DP", patch_gf_hdmi),
4414 HDA_CODEC_ENTRY(0x67663d85, "Arise 85 HDMI/DP", patch_gf_hdmi),
4415 HDA_CODEC_ENTRY(0x67663d86, "Arise 86 HDMI/DP", patch_gf_hdmi),
4416 HDA_CODEC_ENTRY(0x67663d87, "Arise 87 HDMI/DP", patch_gf_hdmi),
4417 HDA_CODEC_ENTRY(0x11069f80, "VX900 HDMI/DP",    patch_via_hdmi),
4418 HDA_CODEC_ENTRY(0x11069f81, "VX900 HDMI/DP",    patch_via_hdmi),
4419 HDA_CODEC_ENTRY(0x11069f84, "VX11 HDMI/DP",     patch_generic_hdmi),
4420 HDA_CODEC_ENTRY(0x11069f85, "VX11 HDMI/DP",     patch_generic_hdmi),
4421 HDA_CODEC_ENTRY(0x80860054, "IbexPeak HDMI",    patch_i915_cpt_hdmi),
4422 HDA_CODEC_ENTRY(0x80862800, "Geminilake HDMI",  patch_i915_glk_hdmi),
4423 HDA_CODEC_ENTRY(0x80862801, "Bearlake HDMI",    patch_generic_hdmi),
4424 HDA_CODEC_ENTRY(0x80862802, "Cantiga HDMI",     patch_generic_hdmi),
4425 HDA_CODEC_ENTRY(0x80862803, "Eaglelake HDMI",   patch_generic_hdmi),
4426 HDA_CODEC_ENTRY(0x80862804, "IbexPeak HDMI",    patch_i915_cpt_hdmi),
4427 HDA_CODEC_ENTRY(0x80862805, "CougarPoint HDMI", patch_i915_cpt_hdmi),
4428 HDA_CODEC_ENTRY(0x80862806, "PantherPoint HDMI", patch_i915_cpt_hdmi),
4429 HDA_CODEC_ENTRY(0x80862807, "Haswell HDMI",     patch_i915_hsw_hdmi),
4430 HDA_CODEC_ENTRY(0x80862808, "Broadwell HDMI",   patch_i915_hsw_hdmi),
4431 HDA_CODEC_ENTRY(0x80862809, "Skylake HDMI",     patch_i915_hsw_hdmi),
4432 HDA_CODEC_ENTRY(0x8086280a, "Broxton HDMI",     patch_i915_hsw_hdmi),
4433 HDA_CODEC_ENTRY(0x8086280b, "Kabylake HDMI",    patch_i915_hsw_hdmi),
4434 HDA_CODEC_ENTRY(0x8086280c, "Cannonlake HDMI",  patch_i915_glk_hdmi),
4435 HDA_CODEC_ENTRY(0x8086280d, "Geminilake HDMI",  patch_i915_glk_hdmi),
4436 HDA_CODEC_ENTRY(0x8086280f, "Icelake HDMI",     patch_i915_icl_hdmi),
4437 HDA_CODEC_ENTRY(0x80862812, "Tigerlake HDMI",   patch_i915_tgl_hdmi),
4438 HDA_CODEC_ENTRY(0x80862814, "DG1 HDMI", patch_i915_tgl_hdmi),
4439 HDA_CODEC_ENTRY(0x80862815, "Alderlake HDMI",   patch_i915_tgl_hdmi),
4440 HDA_CODEC_ENTRY(0x80862816, "Rocketlake HDMI",  patch_i915_tgl_hdmi),
4441 HDA_CODEC_ENTRY(0x80862819, "DG2 HDMI", patch_i915_tgl_hdmi),
4442 HDA_CODEC_ENTRY(0x8086281a, "Jasperlake HDMI",  patch_i915_icl_hdmi),
4443 HDA_CODEC_ENTRY(0x8086281b, "Elkhartlake HDMI", patch_i915_icl_hdmi),
4444 HDA_CODEC_ENTRY(0x8086281c, "Alderlake-P HDMI", patch_i915_tgl_hdmi),
4445 HDA_CODEC_ENTRY(0x80862880, "CedarTrail HDMI",  patch_generic_hdmi),
4446 HDA_CODEC_ENTRY(0x80862882, "Valleyview2 HDMI", patch_i915_byt_hdmi),
4447 HDA_CODEC_ENTRY(0x80862883, "Braswell HDMI",    patch_i915_byt_hdmi),
4448 HDA_CODEC_ENTRY(0x808629fb, "Crestline HDMI",   patch_generic_hdmi),
4449 /* special ID for generic HDMI */
4450 HDA_CODEC_ENTRY(HDA_CODEC_ID_GENERIC_HDMI, "Generic HDMI", patch_generic_hdmi),
4451 {} /* terminator */
4452 };
4453 MODULE_DEVICE_TABLE(hdaudio, snd_hda_id_hdmi);
4454
4455 MODULE_LICENSE("GPL");
4456 MODULE_DESCRIPTION("HDMI HD-audio codec");
4457 MODULE_ALIAS("snd-hda-codec-intelhdmi");
4458 MODULE_ALIAS("snd-hda-codec-nvhdmi");
4459 MODULE_ALIAS("snd-hda-codec-atihdmi");
4460
4461 static struct hda_codec_driver hdmi_driver = {
4462         .id = snd_hda_id_hdmi,
4463 };
4464
4465 module_hda_codec_driver(hdmi_driver);