sound/pci/hda/hda_tegra.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  *
   4  * Implementation of primary ALSA driver code base for NVIDIA Tegra HDA.
   5  */
   6
   7 #include <linux/clk.h>
   8 #include <linux/clocksource.h>
   9 #include <linux/completion.h>
  10 #include <linux/delay.h>
  11 #include <linux/dma-mapping.h>
  12 #include <linux/init.h>
  13 #include <linux/interrupt.h>
  14 #include <linux/io.h>
  15 #include <linux/kernel.h>
  16 #include <linux/module.h>
  17 #include <linux/moduleparam.h>
  18 #include <linux/mutex.h>
  19 #include <linux/of_device.h>
  20 #include <linux/slab.h>
  21 #include <linux/time.h>
  22 #include <linux/string.h>
  23 #include <linux/pm_runtime.h>
  24
  25 #include <sound/core.h>
  26 #include <sound/initval.h>
  27
  28 #include <sound/hda_codec.h>
  29 #include "hda_controller.h"
  30
  31 /* Defines for Nvidia Tegra HDA support */
  32 #define HDA_BAR0           0x8000
  33
  34 #define HDA_CFG_CMD        0x1004
  35 #define HDA_CFG_BAR0       0x1010
  36
  37 #define HDA_ENABLE_IO_SPACE       (1 << 0)
  38 #define HDA_ENABLE_MEM_SPACE      (1 << 1)
  39 #define HDA_ENABLE_BUS_MASTER     (1 << 2)
  40 #define HDA_ENABLE_SERR           (1 << 8)
  41 #define HDA_DISABLE_INTR          (1 << 10)
  42 #define HDA_BAR0_INIT_PROGRAM     0xFFFFFFFF
  43 #define HDA_BAR0_FINAL_PROGRAM    (1 << 14)
  44
  45 /* IPFS */
  46 #define HDA_IPFS_CONFIG           0x180
  47 #define HDA_IPFS_EN_FPCI          0x1
  48
  49 #define HDA_IPFS_FPCI_BAR0        0x80
  50 #define HDA_FPCI_BAR0_START       0x40
  51
  52 #define HDA_IPFS_INTR_MASK        0x188
  53 #define HDA_IPFS_EN_INTR          (1 << 16)
  54
  55 /* max number of SDs */
  56 #define NUM_CAPTURE_SD 1
  57 #define NUM_PLAYBACK_SD 1
  58
  59 struct hda_tegra {
  60         struct azx chip;
  61         struct device *dev;
  62         struct clk *hda_clk;
  63         struct clk *hda2codec_2x_clk;
  64         struct clk *hda2hdmi_clk;
  65         void __iomem *regs;
  66         struct work_struct probe_work;
  67 };
  68
  69 #ifdef CONFIG_PM
  70 static int power_save = CONFIG_SND_HDA_POWER_SAVE_DEFAULT;
  71 module_param(power_save, bint, 0644);
  72 MODULE_PARM_DESC(power_save,
  73                  "Automatic power-saving timeout (in seconds, 0 = disable).");
  74 #else
  75 #define power_save      0
  76 #endif
  77
  78 static const struct hda_controller_ops hda_tegra_ops; /* nothing special */
  79
  80 static void hda_tegra_init(struct hda_tegra *hda)
  81 {
  82         u32 v;
  83
  84         /* Enable PCI access */
  85         v = readl(hda->regs + HDA_IPFS_CONFIG);
  86         v |= HDA_IPFS_EN_FPCI;
  87         writel(v, hda->regs + HDA_IPFS_CONFIG);
  88
  89         /* Enable MEM/IO space and bus master */
  90         v = readl(hda->regs + HDA_CFG_CMD);
  91         v &= ~HDA_DISABLE_INTR;
  92         v |= HDA_ENABLE_MEM_SPACE | HDA_ENABLE_IO_SPACE |
  93                 HDA_ENABLE_BUS_MASTER | HDA_ENABLE_SERR;
  94         writel(v, hda->regs + HDA_CFG_CMD);
  95
  96         writel(HDA_BAR0_INIT_PROGRAM, hda->regs + HDA_CFG_BAR0);
  97         writel(HDA_BAR0_FINAL_PROGRAM, hda->regs + HDA_CFG_BAR0);
  98         writel(HDA_FPCI_BAR0_START, hda->regs + HDA_IPFS_FPCI_BAR0);
  99
 100         v = readl(hda->regs + HDA_IPFS_INTR_MASK);
 101         v |= HDA_IPFS_EN_INTR;
 102         writel(v, hda->regs + HDA_IPFS_INTR_MASK);
 103 }
 104
 105 static int hda_tegra_enable_clocks(struct hda_tegra *data)
 106 {
 107         int rc;
 108
 109         rc = clk_prepare_enable(data->hda_clk);
 110         if (rc)
 111                 return rc;
 112         rc = clk_prepare_enable(data->hda2codec_2x_clk);
 113         if (rc)
 114                 goto disable_hda;
 115         rc = clk_prepare_enable(data->hda2hdmi_clk);
 116         if (rc)
 117                 goto disable_codec_2x;
 118
 119         return 0;
 120
 121 disable_codec_2x:
 122         clk_disable_unprepare(data->hda2codec_2x_clk);
 123 disable_hda:
 124         clk_disable_unprepare(data->hda_clk);
 125         return rc;
 126 }
 127
 128 static void hda_tegra_disable_clocks(struct hda_tegra *data)
 129 {
 130         clk_disable_unprepare(data->hda2hdmi_clk);
 131         clk_disable_unprepare(data->hda2codec_2x_clk);
 132         clk_disable_unprepare(data->hda_clk);
 133 }
 134
 135 /*
 136  * power management
 137  */
 138 static int __maybe_unused hda_tegra_suspend(struct device *dev)
 139 {
 140         struct snd_card *card = dev_get_drvdata(dev);
 141         int rc;
 142
 143         rc = pm_runtime_force_suspend(dev);
 144         if (rc < 0)
 145                 return rc;
 146         snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
 147
 148         return 0;
 149 }
 150
 151 static int __maybe_unused hda_tegra_resume(struct device *dev)
 152 {
 153         struct snd_card *card = dev_get_drvdata(dev);
 154         int rc;
 155
 156         rc = pm_runtime_force_resume(dev);
 157         if (rc < 0)
 158                 return rc;
 159         snd_power_change_state(card, SNDRV_CTL_POWER_D0);
 160
 161         return 0;
 162 }
 163
 164 static int __maybe_unused hda_tegra_runtime_suspend(struct device *dev)
 165 {
 166         struct snd_card *card = dev_get_drvdata(dev);
 167         struct azx *chip = card->private_data;
 168         struct hda_tegra *hda = container_of(chip, struct hda_tegra, chip);
 169         struct hdac_bus *bus = azx_bus(chip);
 170
 171         if (chip && chip->running) {
 172                 /* enable controller wake up event */
 173                 azx_writew(chip, WAKEEN, azx_readw(chip, WAKEEN) |
 174                            STATESTS_INT_MASK);
 175
 176                 azx_stop_chip(chip);
 177                 synchronize_irq(bus->irq);
 178                 azx_enter_link_reset(chip);
 179         }
 180         hda_tegra_disable_clocks(hda);
 181
 182         return 0;
 183 }
 184
 185 static int __maybe_unused hda_tegra_runtime_resume(struct device *dev)
 186 {
 187         struct snd_card *card = dev_get_drvdata(dev);
 188         struct azx *chip = card->private_data;
 189         struct hda_tegra *hda = container_of(chip, struct hda_tegra, chip);
 190         int rc;
 191
 192         rc = hda_tegra_enable_clocks(hda);
 193         if (rc != 0)
 194                 return rc;
 195         if (chip && chip->running) {
 196                 hda_tegra_init(hda);
 197                 azx_init_chip(chip, 1);
 198                 /* disable controller wake up event*/
 199                 azx_writew(chip, WAKEEN, azx_readw(chip, WAKEEN) &
 200                            ~STATESTS_INT_MASK);
 201         }
 202
 203         return 0;
 204 }
 205
 206 static const struct dev_pm_ops hda_tegra_pm = {
 207         SET_SYSTEM_SLEEP_PM_OPS(hda_tegra_suspend, hda_tegra_resume)
 208         SET_RUNTIME_PM_OPS(hda_tegra_runtime_suspend,
 209                            hda_tegra_runtime_resume,
 210                            NULL)
 211 };
 212
 213 static int hda_tegra_dev_disconnect(struct snd_device *device)
 214 {
 215         struct azx *chip = device->device_data;
 216
 217         chip->bus.shutdown = 1;
 218         return 0;
 219 }
 220
 221 /*
 222  * destructor
 223  */
 224 static int hda_tegra_dev_free(struct snd_device *device)
 225 {
 226         struct azx *chip = device->device_data;
 227         struct hda_tegra *hda = container_of(chip, struct hda_tegra, chip);
 228
 229         cancel_work_sync(&hda->probe_work);
 230         if (azx_bus(chip)->chip_init) {
 231                 azx_stop_all_streams(chip);
 232                 azx_stop_chip(chip);
 233         }
 234
 235         azx_free_stream_pages(chip);
 236         azx_free_streams(chip);
 237         snd_hdac_bus_exit(azx_bus(chip));
 238
 239         return 0;
 240 }
 241
 242 static int hda_tegra_init_chip(struct azx *chip, struct platform_device *pdev)
 243 {
 244         struct hda_tegra *hda = container_of(chip, struct hda_tegra, chip);
 245         struct hdac_bus *bus = azx_bus(chip);
 246         struct device *dev = hda->dev;
 247         struct resource *res;
 248
 249         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 250         hda->regs = devm_ioremap_resource(dev, res);
 251         if (IS_ERR(hda->regs))
 252                 return PTR_ERR(hda->regs);
 253
 254         bus->remap_addr = hda->regs + HDA_BAR0;
 255         bus->addr = res->start + HDA_BAR0;
 256
 257         hda_tegra_init(hda);
 258
 259         return 0;
 260 }
 261
 262 static int hda_tegra_init_clk(struct hda_tegra *hda)
 263 {
 264         struct device *dev = hda->dev;
 265
 266         hda->hda_clk = devm_clk_get(dev, "hda");
 267         if (IS_ERR(hda->hda_clk)) {
 268                 dev_err(dev, "failed to get hda clock\n");
 269                 return PTR_ERR(hda->hda_clk);
 270         }
 271         hda->hda2codec_2x_clk = devm_clk_get(dev, "hda2codec_2x");
 272         if (IS_ERR(hda->hda2codec_2x_clk)) {
 273                 dev_err(dev, "failed to get hda2codec_2x clock\n");
 274                 return PTR_ERR(hda->hda2codec_2x_clk);
 275         }
 276         hda->hda2hdmi_clk = devm_clk_get(dev, "hda2hdmi");
 277         if (IS_ERR(hda->hda2hdmi_clk)) {
 278                 dev_err(dev, "failed to get hda2hdmi clock\n");
 279                 return PTR_ERR(hda->hda2hdmi_clk);
 280         }
 281
 282         return 0;
 283 }
 284
 285 static int hda_tegra_first_init(struct azx *chip, struct platform_device *pdev)
 286 {
 287         struct hdac_bus *bus = azx_bus(chip);
 288         struct snd_card *card = chip->card;
 289         int err;
 290         unsigned short gcap;
 291         int irq_id = platform_get_irq(pdev, 0);
 292         const char *sname, *drv_name = "tegra-hda";
 293         struct device_node *np = pdev->dev.of_node;
 294
 295         if (irq_id < 0)
 296                 return irq_id;
 297
 298         err = hda_tegra_init_chip(chip, pdev);
 299         if (err)
 300                 return err;
 301
 302         err = devm_request_irq(chip->card->dev, irq_id, azx_interrupt,
 303                              IRQF_SHARED, KBUILD_MODNAME, chip);
 304         if (err) {
 305                 dev_err(chip->card->dev,
 306                         "unable to request IRQ %d, disabling device\n",
 307                         irq_id);
 308                 return err;
 309         }
 310         bus->irq = irq_id;
 311
 312         synchronize_irq(bus->irq);
 313
 314         gcap = azx_readw(chip, GCAP);
 315         dev_dbg(card->dev, "chipset global capabilities = 0x%x\n", gcap);
 316
 317         /* read number of streams from GCAP register instead of using
 318          * hardcoded value
 319          */
 320         chip->capture_streams = (gcap >> 8) & 0x0f;
 321         chip->playback_streams = (gcap >> 12) & 0x0f;
 322         if (!chip->playback_streams && !chip->capture_streams) {
 323                 /* gcap didn't give any info, switching to old method */
 324                 chip->playback_streams = NUM_PLAYBACK_SD;
 325                 chip->capture_streams = NUM_CAPTURE_SD;
 326         }
 327         chip->capture_index_offset = 0;
 328         chip->playback_index_offset = chip->capture_streams;
 329         chip->num_streams = chip->playback_streams + chip->capture_streams;
 330
 331         /* initialize streams */
 332         err = azx_init_streams(chip);
 333         if (err < 0) {
 334                 dev_err(card->dev, "failed to initialize streams: %d\n", err);
 335                 return err;
 336         }
 337
 338         err = azx_alloc_stream_pages(chip);
 339         if (err < 0) {
 340                 dev_err(card->dev, "failed to allocate stream pages: %d\n",
 341                         err);
 342                 return err;
 343         }
 344
 345         /* initialize chip */
 346         azx_init_chip(chip, 1);
 347
 348         /* codec detection */
 349         if (!bus->codec_mask) {
 350                 dev_err(card->dev, "no codecs found!\n");
 351                 return -ENODEV;
 352         }
 353
 354         /* driver name */
 355         strncpy(card->driver, drv_name, sizeof(card->driver));
 356         /* shortname for card */
 357         sname = of_get_property(np, "nvidia,model", NULL);
 358         if (!sname)
 359                 sname = drv_name;
 360         if (strlen(sname) > sizeof(card->shortname))
 361                 dev_info(card->dev, "truncating shortname for card\n");
 362         strncpy(card->shortname, sname, sizeof(card->shortname));
 363
 364         /* longname for card */
 365         snprintf(card->longname, sizeof(card->longname),
 366                  "%s at 0x%lx irq %i",
 367                  card->shortname, bus->addr, bus->irq);
 368
 369         return 0;
 370 }
 371
 372 /*
 373  * constructor
 374  */
 375
 376 static void hda_tegra_probe_work(struct work_struct *work);
 377
 378 static int hda_tegra_create(struct snd_card *card,
 379                             unsigned int driver_caps,
 380                             struct hda_tegra *hda)
 381 {
 382         static struct snd_device_ops ops = {
 383                 .dev_disconnect = hda_tegra_dev_disconnect,
 384                 .dev_free = hda_tegra_dev_free,
 385         };
 386         struct azx *chip;
 387         int err;
 388
 389         chip = &hda->chip;
 390
 391         mutex_init(&chip->open_mutex);
 392         chip->card = card;
 393         chip->ops = &hda_tegra_ops;
 394         chip->driver_caps = driver_caps;
 395         chip->driver_type = driver_caps & 0xff;
 396         chip->dev_index = 0;
 397         INIT_LIST_HEAD(&chip->pcm_list);
 398
 399         chip->codec_probe_mask = -1;
 400
 401         chip->single_cmd = false;
 402         chip->snoop = true;
 403
 404         INIT_WORK(&hda->probe_work, hda_tegra_probe_work);
 405
 406         err = azx_bus_init(chip, NULL);
 407         if (err < 0)
 408                 return err;
 409
 410         chip->bus.needs_damn_long_delay = 1;
 411         chip->bus.core.aligned_mmio = 1;
 412
 413         err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops);
 414         if (err < 0) {
 415                 dev_err(card->dev, "Error creating device\n");
 416                 return err;
 417         }
 418
 419         return 0;
 420 }
 421
 422 static const struct of_device_id hda_tegra_match[] = {
 423         { .compatible = "nvidia,tegra30-hda" },
 424         {},
 425 };
 426 MODULE_DEVICE_TABLE(of, hda_tegra_match);
 427
 428 static int hda_tegra_probe(struct platform_device *pdev)
 429 {
 430         const unsigned int driver_flags = AZX_DCAPS_CORBRP_SELF_CLEAR |
 431                                           AZX_DCAPS_PM_RUNTIME |
 432                                           AZX_DCAPS_4K_BDLE_BOUNDARY;
 433         struct snd_card *card;
 434         struct azx *chip;
 435         struct hda_tegra *hda;
 436         int err;
 437
 438         hda = devm_kzalloc(&pdev->dev, sizeof(*hda), GFP_KERNEL);
 439         if (!hda)
 440                 return -ENOMEM;
 441         hda->dev = &pdev->dev;
 442         chip = &hda->chip;
 443
 444         err = snd_card_new(&pdev->dev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1,
 445                            THIS_MODULE, 0, &card);
 446         if (err < 0) {
 447                 dev_err(&pdev->dev, "Error creating card!\n");
 448                 return err;
 449         }
 450
 451         err = hda_tegra_init_clk(hda);
 452         if (err < 0)
 453                 goto out_free;
 454
 455         err = hda_tegra_create(card, driver_flags, hda);
 456         if (err < 0)
 457                 goto out_free;
 458         card->private_data = chip;
 459
 460         dev_set_drvdata(&pdev->dev, card);
 461
 462         pm_runtime_enable(hda->dev);
 463         if (!azx_has_pm_runtime(chip))
 464                 pm_runtime_forbid(hda->dev);
 465
 466         schedule_work(&hda->probe_work);
 467
 468         return 0;
 469
 470 out_free:
 471         snd_card_free(card);
 472         return err;
 473 }
 474
 475 static void hda_tegra_probe_work(struct work_struct *work)
 476 {
 477         struct hda_tegra *hda = container_of(work, struct hda_tegra, probe_work);
 478         struct azx *chip = &hda->chip;
 479         struct platform_device *pdev = to_platform_device(hda->dev);
 480         int err;
 481
 482         pm_runtime_get_sync(hda->dev);
 483         err = hda_tegra_first_init(chip, pdev);
 484         if (err < 0)
 485                 goto out_free;
 486
 487         /* create codec instances */
 488         err = azx_probe_codecs(chip, 8);
 489         if (err < 0)
 490                 goto out_free;
 491
 492         err = azx_codec_configure(chip);
 493         if (err < 0)
 494                 goto out_free;
 495
 496         err = snd_card_register(chip->card);
 497         if (err < 0)
 498                 goto out_free;
 499
 500         chip->running = 1;
 501         snd_hda_set_power_save(&chip->bus, power_save * 1000);
 502
 503  out_free:
 504         pm_runtime_put(hda->dev);
 505         return; /* no error return from async probe */
 506 }
 507
 508 static int hda_tegra_remove(struct platform_device *pdev)
 509 {
 510         int ret;
 511
 512         ret = snd_card_free(dev_get_drvdata(&pdev->dev));
 513         pm_runtime_disable(&pdev->dev);
 514
 515         return ret;
 516 }
 517
 518 static void hda_tegra_shutdown(struct platform_device *pdev)
 519 {
 520         struct snd_card *card = dev_get_drvdata(&pdev->dev);
 521         struct azx *chip;
 522
 523         if (!card)
 524                 return;
 525         chip = card->private_data;
 526         if (chip && chip->running)
 527                 azx_stop_chip(chip);
 528 }
 529
 530 static struct platform_driver tegra_platform_hda = {
 531         .driver = {
 532                 .name = "tegra-hda",
 533                 .pm = &hda_tegra_pm,
 534                 .of_match_table = hda_tegra_match,
 535         },
 536         .probe = hda_tegra_probe,
 537         .remove = hda_tegra_remove,
 538         .shutdown = hda_tegra_shutdown,
 539 };
 540 module_platform_driver(tegra_platform_hda);
 541
 542 MODULE_DESCRIPTION("Tegra HDA bus driver");
 543 MODULE_LICENSE("GPL v2");