1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (c) by Jaroslav Kysela <perex@perex.cz>
5 * Routines for control of EMU10K1 chips
7 * Copyright (c) by James Courtier-Dutton <James@superbug.co.uk>
8 * Added support for Audigy 2 Value.
9 * Added EMU 1010 support.
10 * General bug fixes and enhancements.
19 #include <linux/sched.h>
20 #include <linux/delay.h>
21 #include <linux/init.h>
22 #include <linux/module.h>
23 #include <linux/interrupt.h>
24 #include <linux/iommu.h>
25 #include <linux/pci.h>
26 #include <linux/slab.h>
27 #include <linux/vmalloc.h>
28 #include <linux/mutex.h>
31 #include <sound/core.h>
32 #include <sound/emu10k1.h>
33 #include <linux/firmware.h>
39 #define HANA_FILENAME "/*(DEBLOBBED)*/"
40 #define DOCK_FILENAME "/*(DEBLOBBED)*/"
41 #define EMU1010B_FILENAME "/*(DEBLOBBED)*/"
42 #define MICRO_DOCK_FILENAME "/*(DEBLOBBED)*/"
43 #define EMU0404_FILENAME "/*(DEBLOBBED)*/"
44 #define EMU1010_NOTEBOOK_FILENAME "/*(DEBLOBBED)*/"
49 /*************************************************************************
51 *************************************************************************/
53 void snd_emu10k1_voice_init(struct snd_emu10k1 *emu, int ch)
55 snd_emu10k1_ptr_write(emu, DCYSUSV, ch, 0);
56 snd_emu10k1_ptr_write(emu, IP, ch, 0);
57 snd_emu10k1_ptr_write(emu, VTFT, ch, 0xffff);
58 snd_emu10k1_ptr_write(emu, CVCF, ch, 0xffff);
59 snd_emu10k1_ptr_write(emu, PTRX, ch, 0);
60 snd_emu10k1_ptr_write(emu, CPF, ch, 0);
61 snd_emu10k1_ptr_write(emu, CCR, ch, 0);
63 snd_emu10k1_ptr_write(emu, PSST, ch, 0);
64 snd_emu10k1_ptr_write(emu, DSL, ch, 0x10);
65 snd_emu10k1_ptr_write(emu, CCCA, ch, 0);
66 snd_emu10k1_ptr_write(emu, Z1, ch, 0);
67 snd_emu10k1_ptr_write(emu, Z2, ch, 0);
68 snd_emu10k1_ptr_write(emu, FXRT, ch, 0x32100000);
70 snd_emu10k1_ptr_write(emu, ATKHLDM, ch, 0);
71 snd_emu10k1_ptr_write(emu, DCYSUSM, ch, 0);
72 snd_emu10k1_ptr_write(emu, IFATN, ch, 0xffff);
73 snd_emu10k1_ptr_write(emu, PEFE, ch, 0);
74 snd_emu10k1_ptr_write(emu, FMMOD, ch, 0);
75 snd_emu10k1_ptr_write(emu, TREMFRQ, ch, 24); /* 1 Hz */
76 snd_emu10k1_ptr_write(emu, FM2FRQ2, ch, 24); /* 1 Hz */
77 snd_emu10k1_ptr_write(emu, TEMPENV, ch, 0);
79 /*** these are last so OFF prevents writing ***/
80 snd_emu10k1_ptr_write(emu, LFOVAL2, ch, 0);
81 snd_emu10k1_ptr_write(emu, LFOVAL1, ch, 0);
82 snd_emu10k1_ptr_write(emu, ATKHLDV, ch, 0);
83 snd_emu10k1_ptr_write(emu, ENVVOL, ch, 0);
84 snd_emu10k1_ptr_write(emu, ENVVAL, ch, 0);
86 /* Audigy extra stuffs */
88 snd_emu10k1_ptr_write(emu, 0x4c, ch, 0); /* ?? */
89 snd_emu10k1_ptr_write(emu, 0x4d, ch, 0); /* ?? */
90 snd_emu10k1_ptr_write(emu, 0x4e, ch, 0); /* ?? */
91 snd_emu10k1_ptr_write(emu, 0x4f, ch, 0); /* ?? */
92 snd_emu10k1_ptr_write(emu, A_FXRT1, ch, 0x03020100);
93 snd_emu10k1_ptr_write(emu, A_FXRT2, ch, 0x3f3f3f3f);
94 snd_emu10k1_ptr_write(emu, A_SENDAMOUNTS, ch, 0);
98 static const unsigned int spi_dac_init[] = {
122 static const unsigned int i2c_adc_init[][2] = {
123 { 0x17, 0x00 }, /* Reset */
124 { 0x07, 0x00 }, /* Timeout */
125 { 0x0b, 0x22 }, /* Interface control */
126 { 0x0c, 0x22 }, /* Master mode control */
127 { 0x0d, 0x08 }, /* Powerdown control */
128 { 0x0e, 0xcf }, /* Attenuation Left 0x01 = -103dB, 0xff = 24dB */
129 { 0x0f, 0xcf }, /* Attenuation Right 0.5dB steps */
130 { 0x10, 0x7b }, /* ALC Control 1 */
131 { 0x11, 0x00 }, /* ALC Control 2 */
132 { 0x12, 0x32 }, /* ALC Control 3 */
133 { 0x13, 0x00 }, /* Noise gate control */
134 { 0x14, 0xa6 }, /* Limiter control */
135 { 0x15, ADC_MUX_2 }, /* ADC Mixer control. Mic for A2ZS Notebook */
138 static int snd_emu10k1_init(struct snd_emu10k1 *emu, int enable_ir, int resume)
140 unsigned int silent_page;
144 /* disable audio and lock cache */
145 outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK |
146 HCFG_MUTEBUTTONENABLE, emu->port + HCFG);
148 /* reset recording buffers */
149 snd_emu10k1_ptr_write(emu, MICBS, 0, ADCBS_BUFSIZE_NONE);
150 snd_emu10k1_ptr_write(emu, MICBA, 0, 0);
151 snd_emu10k1_ptr_write(emu, FXBS, 0, ADCBS_BUFSIZE_NONE);
152 snd_emu10k1_ptr_write(emu, FXBA, 0, 0);
153 snd_emu10k1_ptr_write(emu, ADCBS, 0, ADCBS_BUFSIZE_NONE);
154 snd_emu10k1_ptr_write(emu, ADCBA, 0, 0);
156 /* disable channel interrupt */
157 outl(0, emu->port + INTE);
158 snd_emu10k1_ptr_write(emu, CLIEL, 0, 0);
159 snd_emu10k1_ptr_write(emu, CLIEH, 0, 0);
160 snd_emu10k1_ptr_write(emu, SOLEL, 0, 0);
161 snd_emu10k1_ptr_write(emu, SOLEH, 0, 0);
164 /* set SPDIF bypass mode */
165 snd_emu10k1_ptr_write(emu, SPBYPASS, 0, SPBYPASS_FORMAT);
166 /* enable rear left + rear right AC97 slots */
167 snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_REAR_RIGHT |
171 /* init envelope engine */
172 for (ch = 0; ch < NUM_G; ch++)
173 snd_emu10k1_voice_init(emu, ch);
175 snd_emu10k1_ptr_write(emu, SPCS0, 0, emu->spdif_bits[0]);
176 snd_emu10k1_ptr_write(emu, SPCS1, 0, emu->spdif_bits[1]);
177 snd_emu10k1_ptr_write(emu, SPCS2, 0, emu->spdif_bits[2]);
179 if (emu->card_capabilities->ca0151_chip) { /* audigy2 */
180 /* Hacks for Alice3 to work independent of haP16V driver */
181 /* Setup SRCMulti_I2S SamplingRate */
182 tmp = snd_emu10k1_ptr_read(emu, A_SPDIF_SAMPLERATE, 0);
185 snd_emu10k1_ptr_write(emu, A_SPDIF_SAMPLERATE, 0, tmp);
187 /* Setup SRCSel (Enable Spdif,I2S SRCMulti) */
188 snd_emu10k1_ptr20_write(emu, SRCSel, 0, 0x14);
189 /* Setup SRCMulti Input Audio Enable */
190 /* Use 0xFFFFFFFF to enable P16V sounds. */
191 snd_emu10k1_ptr20_write(emu, SRCMULTI_ENABLE, 0, 0xFFFFFFFF);
193 /* Enabled Phased (8-channel) P16V playback */
194 outl(0x0201, emu->port + HCFG2);
195 /* Set playback routing. */
196 snd_emu10k1_ptr20_write(emu, CAPTURE_P16V_SOURCE, 0, 0x78e4);
198 if (emu->card_capabilities->ca0108_chip) { /* audigy2 Value */
199 /* Hacks for Alice3 to work independent of haP16V driver */
200 dev_info(emu->card->dev, "Audigy2 value: Special config.\n");
201 /* Setup SRCMulti_I2S SamplingRate */
202 tmp = snd_emu10k1_ptr_read(emu, A_SPDIF_SAMPLERATE, 0);
205 snd_emu10k1_ptr_write(emu, A_SPDIF_SAMPLERATE, 0, tmp);
207 /* Setup SRCSel (Enable Spdif,I2S SRCMulti) */
208 outl(0x600000, emu->port + 0x20);
209 outl(0x14, emu->port + 0x24);
211 /* Setup SRCMulti Input Audio Enable */
212 outl(0x7b0000, emu->port + 0x20);
213 outl(0xFF000000, emu->port + 0x24);
215 /* Setup SPDIF Out Audio Enable */
216 /* The Audigy 2 Value has a separate SPDIF out,
217 * so no need for a mixer switch
219 outl(0x7a0000, emu->port + 0x20);
220 outl(0xFF000000, emu->port + 0x24);
221 tmp = inl(emu->port + A_IOCFG) & ~0x8; /* Clear bit 3 */
222 outl(tmp, emu->port + A_IOCFG);
224 if (emu->card_capabilities->spi_dac) { /* Audigy 2 ZS Notebook with DAC Wolfson WM8768/WM8568 */
227 size = ARRAY_SIZE(spi_dac_init);
228 for (n = 0; n < size; n++)
229 snd_emu10k1_spi_write(emu, spi_dac_init[n]);
231 snd_emu10k1_ptr20_write(emu, 0x60, 0, 0x10);
234 * GPIO1: Speakers-enabled.
237 * GPIO4: IEC958 Output on.
242 outl(0x76, emu->port + A_IOCFG); /* Windows uses 0x3f76 */
244 if (emu->card_capabilities->i2c_adc) { /* Audigy 2 ZS Notebook with ADC Wolfson WM8775 */
247 snd_emu10k1_ptr20_write(emu, P17V_I2S_SRC_SEL, 0, 0x2020205f);
248 tmp = inl(emu->port + A_IOCFG);
249 outl(tmp | 0x4, emu->port + A_IOCFG); /* Set bit 2 for mic input */
250 tmp = inl(emu->port + A_IOCFG);
251 size = ARRAY_SIZE(i2c_adc_init);
252 for (n = 0; n < size; n++)
253 snd_emu10k1_i2c_write(emu, i2c_adc_init[n][0], i2c_adc_init[n][1]);
254 for (n = 0; n < 4; n++) {
255 emu->i2c_capture_volume[n][0] = 0xcf;
256 emu->i2c_capture_volume[n][1] = 0xcf;
261 snd_emu10k1_ptr_write(emu, PTB, 0, emu->ptb_pages.addr);
262 snd_emu10k1_ptr_write(emu, TCB, 0, 0); /* taken from original driver */
263 snd_emu10k1_ptr_write(emu, TCBS, 0, 4); /* taken from original driver */
265 silent_page = (emu->silent_page.addr << emu->address_mode) | (emu->address_mode ? MAP_PTI_MASK1 : MAP_PTI_MASK0);
266 for (ch = 0; ch < NUM_G; ch++) {
267 snd_emu10k1_ptr_write(emu, MAPA, ch, silent_page);
268 snd_emu10k1_ptr_write(emu, MAPB, ch, silent_page);
271 if (emu->card_capabilities->emu_model) {
272 outl(HCFG_AUTOMUTE_ASYNC |
274 HCFG_AUDIOENABLE, emu->port + HCFG);
277 * Mute Disable Audio = 0
278 * Lock Tank Memory = 1
279 * Lock Sound Memory = 0
282 } else if (emu->audigy) {
283 if (emu->revision == 4) /* audigy2 */
284 outl(HCFG_AUDIOENABLE |
285 HCFG_AC3ENABLE_CDSPDIF |
286 HCFG_AC3ENABLE_GPSPDIF |
287 HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
289 outl(HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
290 /* FIXME: Remove all these emu->model and replace it with a card recognition parameter,
291 * e.g. card_capabilities->joystick */
292 } else if (emu->model == 0x20 ||
293 emu->model == 0xc400 ||
294 (emu->model == 0x21 && emu->revision < 6))
295 outl(HCFG_LOCKTANKCACHE_MASK | HCFG_AUTOMUTE, emu->port + HCFG);
297 /* With on-chip joystick */
298 outl(HCFG_LOCKTANKCACHE_MASK | HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
300 if (enable_ir) { /* enable IR for SB Live */
301 if (emu->card_capabilities->emu_model) {
302 ; /* Disable all access to A_IOCFG for the emu1010 */
303 } else if (emu->card_capabilities->i2c_adc) {
304 ; /* Disable A_IOCFG for Audigy 2 ZS Notebook */
305 } else if (emu->audigy) {
306 unsigned int reg = inl(emu->port + A_IOCFG);
307 outl(reg | A_IOCFG_GPOUT2, emu->port + A_IOCFG);
309 outl(reg | A_IOCFG_GPOUT1 | A_IOCFG_GPOUT2, emu->port + A_IOCFG);
311 outl(reg, emu->port + A_IOCFG);
313 unsigned int reg = inl(emu->port + HCFG);
314 outl(reg | HCFG_GPOUT2, emu->port + HCFG);
316 outl(reg | HCFG_GPOUT1 | HCFG_GPOUT2, emu->port + HCFG);
318 outl(reg, emu->port + HCFG);
322 if (emu->card_capabilities->emu_model) {
323 ; /* Disable all access to A_IOCFG for the emu1010 */
324 } else if (emu->card_capabilities->i2c_adc) {
325 ; /* Disable A_IOCFG for Audigy 2 ZS Notebook */
326 } else if (emu->audigy) { /* enable analog output */
327 unsigned int reg = inl(emu->port + A_IOCFG);
328 outl(reg | A_IOCFG_GPOUT0, emu->port + A_IOCFG);
331 if (emu->address_mode == 0) {
333 outl(inl(emu->port + HCFG) | HCFG_EXPANDED_MEM, emu->port + HCFG);
339 static void snd_emu10k1_audio_enable(struct snd_emu10k1 *emu)
342 * Enable the audio bit
344 outl(inl(emu->port + HCFG) | HCFG_AUDIOENABLE, emu->port + HCFG);
346 /* Enable analog/digital outs on audigy */
347 if (emu->card_capabilities->emu_model) {
348 ; /* Disable all access to A_IOCFG for the emu1010 */
349 } else if (emu->card_capabilities->i2c_adc) {
350 ; /* Disable A_IOCFG for Audigy 2 ZS Notebook */
351 } else if (emu->audigy) {
352 outl(inl(emu->port + A_IOCFG) & ~0x44, emu->port + A_IOCFG);
354 if (emu->card_capabilities->ca0151_chip) { /* audigy2 */
355 /* Unmute Analog now. Set GPO6 to 1 for Apollo.
356 * This has to be done after init ALice3 I2SOut beyond 48KHz.
357 * So, sequence is important. */
358 outl(inl(emu->port + A_IOCFG) | 0x0040, emu->port + A_IOCFG);
359 } else if (emu->card_capabilities->ca0108_chip) { /* audigy2 value */
360 /* Unmute Analog now. */
361 outl(inl(emu->port + A_IOCFG) | 0x0060, emu->port + A_IOCFG);
363 /* Disable routing from AC97 line out to Front speakers */
364 outl(inl(emu->port + A_IOCFG) | 0x0080, emu->port + A_IOCFG);
371 /* FIXME: the following routine disables LiveDrive-II !! */
372 /* TOSLink detection */
374 tmp = inl(emu->port + HCFG);
375 if (tmp & (HCFG_GPINPUT0 | HCFG_GPINPUT1)) {
376 outl(tmp|0x800, emu->port + HCFG);
378 if (tmp != (inl(emu->port + HCFG) & ~0x800)) {
380 outl(tmp, emu->port + HCFG);
386 snd_emu10k1_intr_enable(emu, INTE_PCIERRORENABLE);
389 int snd_emu10k1_done(struct snd_emu10k1 *emu)
393 outl(0, emu->port + INTE);
398 for (ch = 0; ch < NUM_G; ch++)
399 snd_emu10k1_ptr_write(emu, DCYSUSV, ch, 0);
400 for (ch = 0; ch < NUM_G; ch++) {
401 snd_emu10k1_ptr_write(emu, VTFT, ch, 0);
402 snd_emu10k1_ptr_write(emu, CVCF, ch, 0);
403 snd_emu10k1_ptr_write(emu, PTRX, ch, 0);
404 snd_emu10k1_ptr_write(emu, CPF, ch, 0);
407 /* reset recording buffers */
408 snd_emu10k1_ptr_write(emu, MICBS, 0, 0);
409 snd_emu10k1_ptr_write(emu, MICBA, 0, 0);
410 snd_emu10k1_ptr_write(emu, FXBS, 0, 0);
411 snd_emu10k1_ptr_write(emu, FXBA, 0, 0);
412 snd_emu10k1_ptr_write(emu, FXWC, 0, 0);
413 snd_emu10k1_ptr_write(emu, ADCBS, 0, ADCBS_BUFSIZE_NONE);
414 snd_emu10k1_ptr_write(emu, ADCBA, 0, 0);
415 snd_emu10k1_ptr_write(emu, TCBS, 0, TCBS_BUFFSIZE_16K);
416 snd_emu10k1_ptr_write(emu, TCB, 0, 0);
418 snd_emu10k1_ptr_write(emu, A_DBG, 0, A_DBG_SINGLE_STEP);
420 snd_emu10k1_ptr_write(emu, DBG, 0, EMU10K1_DBG_SINGLE_STEP);
422 /* disable channel interrupt */
423 snd_emu10k1_ptr_write(emu, CLIEL, 0, 0);
424 snd_emu10k1_ptr_write(emu, CLIEH, 0, 0);
425 snd_emu10k1_ptr_write(emu, SOLEL, 0, 0);
426 snd_emu10k1_ptr_write(emu, SOLEH, 0, 0);
428 /* disable audio and lock cache */
429 outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | HCFG_MUTEBUTTONENABLE, emu->port + HCFG);
430 snd_emu10k1_ptr_write(emu, PTB, 0, 0);
435 /*************************************************************************
436 * ECARD functional implementation
437 *************************************************************************/
439 /* In A1 Silicon, these bits are in the HC register */
440 #define HOOKN_BIT (1L << 12)
441 #define HANDN_BIT (1L << 11)
442 #define PULSEN_BIT (1L << 10)
444 #define EC_GDI1 (1 << 13)
445 #define EC_GDI0 (1 << 14)
447 #define EC_NUM_CONTROL_BITS 20
449 #define EC_AC3_DATA_SELN 0x0001L
450 #define EC_EE_DATA_SEL 0x0002L
451 #define EC_EE_CNTRL_SELN 0x0004L
452 #define EC_EECLK 0x0008L
453 #define EC_EECS 0x0010L
454 #define EC_EESDO 0x0020L
455 #define EC_TRIM_CSN 0x0040L
456 #define EC_TRIM_SCLK 0x0080L
457 #define EC_TRIM_SDATA 0x0100L
458 #define EC_TRIM_MUTEN 0x0200L
459 #define EC_ADCCAL 0x0400L
460 #define EC_ADCRSTN 0x0800L
461 #define EC_DACCAL 0x1000L
462 #define EC_DACMUTEN 0x2000L
463 #define EC_LEDN 0x4000L
465 #define EC_SPDIF0_SEL_SHIFT 15
466 #define EC_SPDIF1_SEL_SHIFT 17
467 #define EC_SPDIF0_SEL_MASK (0x3L << EC_SPDIF0_SEL_SHIFT)
468 #define EC_SPDIF1_SEL_MASK (0x7L << EC_SPDIF1_SEL_SHIFT)
469 #define EC_SPDIF0_SELECT(_x) (((_x) << EC_SPDIF0_SEL_SHIFT) & EC_SPDIF0_SEL_MASK)
470 #define EC_SPDIF1_SELECT(_x) (((_x) << EC_SPDIF1_SEL_SHIFT) & EC_SPDIF1_SEL_MASK)
471 #define EC_CURRENT_PROM_VERSION 0x01 /* Self-explanatory. This should
472 * be incremented any time the EEPROM's
473 * format is changed. */
475 #define EC_EEPROM_SIZE 0x40 /* ECARD EEPROM has 64 16-bit words */
477 /* Addresses for special values stored in to EEPROM */
478 #define EC_PROM_VERSION_ADDR 0x20 /* Address of the current prom version */
479 #define EC_BOARDREV0_ADDR 0x21 /* LSW of board rev */
480 #define EC_BOARDREV1_ADDR 0x22 /* MSW of board rev */
482 #define EC_LAST_PROMFILE_ADDR 0x2f
484 #define EC_SERIALNUM_ADDR 0x30 /* First word of serial number. The
485 * can be up to 30 characters in length
486 * and is stored as a NULL-terminated
487 * ASCII string. Any unused bytes must be
488 * filled with zeros */
489 #define EC_CHECKSUM_ADDR 0x3f /* Location at which checksum is stored */
492 /* Most of this stuff is pretty self-evident. According to the hardware
493 * dudes, we need to leave the ADCCAL bit low in order to avoid a DC
494 * offset problem. Weird.
496 #define EC_RAW_RUN_MODE (EC_DACMUTEN | EC_ADCRSTN | EC_TRIM_MUTEN | \
500 #define EC_DEFAULT_ADC_GAIN 0xC4C4
501 #define EC_DEFAULT_SPDIF0_SEL 0x0
502 #define EC_DEFAULT_SPDIF1_SEL 0x4
504 /**************************************************************************
505 * @func Clock bits into the Ecard's control latch. The Ecard uses a
506 * control latch will is loaded bit-serially by toggling the Modem control
507 * lines from function 2 on the E8010. This function hides these details
508 * and presents the illusion that we are actually writing to a distinct
512 static void snd_emu10k1_ecard_write(struct snd_emu10k1 *emu, unsigned int value)
514 unsigned short count;
516 unsigned long hc_port;
517 unsigned int hc_value;
519 hc_port = emu->port + HCFG;
520 hc_value = inl(hc_port) & ~(HOOKN_BIT | HANDN_BIT | PULSEN_BIT);
521 outl(hc_value, hc_port);
523 for (count = 0; count < EC_NUM_CONTROL_BITS; count++) {
525 /* Set up the value */
526 data = ((value & 0x1) ? PULSEN_BIT : 0);
529 outl(hc_value | data, hc_port);
531 /* Clock the shift register */
532 outl(hc_value | data | HANDN_BIT, hc_port);
533 outl(hc_value | data, hc_port);
537 outl(hc_value | HOOKN_BIT, hc_port);
538 outl(hc_value, hc_port);
541 /**************************************************************************
542 * @func Set the gain of the ECARD's CS3310 Trim/gain controller. The
543 * trim value consists of a 16bit value which is composed of two
544 * 8 bit gain/trim values, one for the left channel and one for the
545 * right channel. The following table maps from the Gain/Attenuation
546 * value in decibels into the corresponding bit pattern for a single
550 static void snd_emu10k1_ecard_setadcgain(struct snd_emu10k1 *emu,
555 /* Enable writing to the TRIM registers */
556 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl & ~EC_TRIM_CSN);
558 /* Do it again to insure that we meet hold time requirements */
559 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl & ~EC_TRIM_CSN);
561 for (bit = (1 << 15); bit; bit >>= 1) {
564 value = emu->ecard_ctrl & ~(EC_TRIM_CSN | EC_TRIM_SDATA);
567 value |= EC_TRIM_SDATA;
570 snd_emu10k1_ecard_write(emu, value);
571 snd_emu10k1_ecard_write(emu, value | EC_TRIM_SCLK);
572 snd_emu10k1_ecard_write(emu, value);
575 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl);
578 static int snd_emu10k1_ecard_init(struct snd_emu10k1 *emu)
580 unsigned int hc_value;
582 /* Set up the initial settings */
583 emu->ecard_ctrl = EC_RAW_RUN_MODE |
584 EC_SPDIF0_SELECT(EC_DEFAULT_SPDIF0_SEL) |
585 EC_SPDIF1_SELECT(EC_DEFAULT_SPDIF1_SEL);
587 /* Step 0: Set the codec type in the hardware control register
588 * and enable audio output */
589 hc_value = inl(emu->port + HCFG);
590 outl(hc_value | HCFG_AUDIOENABLE | HCFG_CODECFORMAT_I2S, emu->port + HCFG);
591 inl(emu->port + HCFG);
593 /* Step 1: Turn off the led and deassert TRIM_CS */
594 snd_emu10k1_ecard_write(emu, EC_ADCCAL | EC_LEDN | EC_TRIM_CSN);
596 /* Step 2: Calibrate the ADC and DAC */
597 snd_emu10k1_ecard_write(emu, EC_DACCAL | EC_LEDN | EC_TRIM_CSN);
599 /* Step 3: Wait for awhile; XXX We can't get away with this
600 * under a real operating system; we'll need to block and wait that
602 snd_emu10k1_wait(emu, 48000);
604 /* Step 4: Switch off the DAC and ADC calibration. Note
605 * That ADC_CAL is actually an inverted signal, so we assert
606 * it here to stop calibration. */
607 snd_emu10k1_ecard_write(emu, EC_ADCCAL | EC_LEDN | EC_TRIM_CSN);
609 /* Step 4: Switch into run mode */
610 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl);
612 /* Step 5: Set the analog input gain */
613 snd_emu10k1_ecard_setadcgain(emu, EC_DEFAULT_ADC_GAIN);
618 static int snd_emu10k1_cardbus_init(struct snd_emu10k1 *emu)
620 unsigned long special_port;
621 __always_unused unsigned int value;
623 /* Special initialisation routine
624 * before the rest of the IO-Ports become active.
626 special_port = emu->port + 0x38;
627 value = inl(special_port);
628 outl(0x00d00000, special_port);
629 value = inl(special_port);
630 outl(0x00d00001, special_port);
631 value = inl(special_port);
632 outl(0x00d0005f, special_port);
633 value = inl(special_port);
634 outl(0x00d0007f, special_port);
635 value = inl(special_port);
636 outl(0x0090007f, special_port);
637 value = inl(special_port);
639 snd_emu10k1_ptr20_write(emu, TINA2_VOLUME, 0, 0xfefefefe); /* Defaults to 0x30303030 */
640 /* Delay to give time for ADC chip to switch on. It needs 113ms */
645 static int snd_emu1010_load_firmware_entry(struct snd_emu10k1 *emu,
646 const struct firmware *fw_entry)
651 __always_unused unsigned int write_post;
657 /* The FPGA is a Xilinx Spartan IIE XC2S50E */
658 /* GPIO7 -> FPGA PGMN
661 * FPGA CONFIG OFF -> FPGA PGMN
663 spin_lock_irqsave(&emu->emu_lock, flags);
664 outl(0x00, emu->port + A_IOCFG); /* Set PGMN low for 1uS. */
665 write_post = inl(emu->port + A_IOCFG);
667 outl(0x80, emu->port + A_IOCFG); /* Leave bit 7 set during netlist setup. */
668 write_post = inl(emu->port + A_IOCFG);
669 udelay(100); /* Allow FPGA memory to clean */
670 for (n = 0; n < fw_entry->size; n++) {
671 value = fw_entry->data[n];
672 for (i = 0; i < 8; i++) {
677 outl(reg, emu->port + A_IOCFG);
678 write_post = inl(emu->port + A_IOCFG);
679 outl(reg | 0x40, emu->port + A_IOCFG);
680 write_post = inl(emu->port + A_IOCFG);
683 /* After programming, set GPIO bit 4 high again. */
684 outl(0x10, emu->port + A_IOCFG);
685 write_post = inl(emu->port + A_IOCFG);
686 spin_unlock_irqrestore(&emu->emu_lock, flags);
691 /* firmware file names, per model, init-fw and dock-fw (optional) */
692 static const char * const firmware_names[5][2] = {
693 [EMU_MODEL_EMU1010] = {
694 HANA_FILENAME, DOCK_FILENAME
696 [EMU_MODEL_EMU1010B] = {
697 EMU1010B_FILENAME, MICRO_DOCK_FILENAME
699 [EMU_MODEL_EMU1616] = {
700 EMU1010_NOTEBOOK_FILENAME, MICRO_DOCK_FILENAME
702 [EMU_MODEL_EMU0404] = {
703 EMU0404_FILENAME, NULL
707 static int snd_emu1010_load_firmware(struct snd_emu10k1 *emu, int dock,
708 const struct firmware **fw)
710 const char *filename;
714 filename = firmware_names[emu->card_capabilities->emu_model][dock];
717 err = reject_firmware(fw, filename, &emu->pci->dev);
722 return snd_emu1010_load_firmware_entry(emu, *fw);
725 static void emu1010_firmware_work(struct work_struct *work)
727 struct snd_emu10k1 *emu;
731 emu = container_of(work, struct snd_emu10k1,
732 emu1010.firmware_work.work);
733 if (emu->card->shutdown)
735 #ifdef CONFIG_PM_SLEEP
739 snd_emu1010_fpga_read(emu, EMU_HANA_IRQ_STATUS, &tmp); /* IRQ Status */
740 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, ®); /* OPTIONS: Which cards are attached to the EMU */
741 if (reg & EMU_HANA_OPTION_DOCK_OFFLINE) {
742 /* Audio Dock attached */
743 /* Return to Audio Dock programming mode */
744 dev_info(emu->card->dev,
745 "emu1010: Loading Audio Dock Firmware\n");
746 snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG,
747 EMU_HANA_FPGA_CONFIG_AUDIODOCK);
748 err = snd_emu1010_load_firmware(emu, 1, &emu->dock_fw);
752 snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, 0);
753 snd_emu1010_fpga_read(emu, EMU_HANA_IRQ_STATUS, &tmp);
754 dev_info(emu->card->dev,
755 "emu1010: EMU_HANA+DOCK_IRQ_STATUS = 0x%x\n", tmp);
756 /* ID, should read & 0x7f = 0x55 when FPGA programmed. */
757 snd_emu1010_fpga_read(emu, EMU_HANA_ID, &tmp);
758 dev_info(emu->card->dev,
759 "emu1010: EMU_HANA+DOCK_ID = 0x%x\n", tmp);
760 if ((tmp & 0x1f) != 0x15) {
761 /* FPGA failed to be programmed */
762 dev_info(emu->card->dev,
763 "emu1010: Loading Audio Dock Firmware file failed, reg = 0x%x\n",
767 dev_info(emu->card->dev,
768 "emu1010: Audio Dock Firmware loaded\n");
769 snd_emu1010_fpga_read(emu, EMU_DOCK_MAJOR_REV, &tmp);
770 snd_emu1010_fpga_read(emu, EMU_DOCK_MINOR_REV, &tmp2);
771 dev_info(emu->card->dev, "Audio Dock ver: %u.%u\n", tmp, tmp2);
772 /* Sync clocking between 1010 and Dock */
773 /* Allow DLL to settle */
775 /* Unmute all. Default is muted after a firmware load */
776 snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, EMU_UNMUTE);
777 } else if (!reg && emu->emu1010.last_reg) {
778 /* Audio Dock removed */
779 dev_info(emu->card->dev, "emu1010: Audio Dock detached\n");
781 snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, EMU_UNMUTE);
785 emu->emu1010.last_reg = reg;
786 if (!emu->card->shutdown)
787 schedule_delayed_work(&emu->emu1010.firmware_work,
788 msecs_to_jiffies(1000));
792 * EMU-1010 - details found out from this driver, official MS Win drivers,
795 * Audigy2 (aka Alice2):
796 * ---------------------
797 * * communication over PCI
798 * * conversion of 32-bit data coming over EMU32 links from HANA FPGA
799 * to 2 x 16-bit, using internal DSP instructions
800 * * slave mode, clock supplied by HANA
801 * * linked to HANA using:
802 * 32 x 32-bit serial EMU32 output channels
803 * 16 x EMU32 input channels
804 * (?) x I2S I/O channels (?)
808 * * provides all (?) physical inputs and outputs of the card
809 * (ADC, DAC, SPDIF I/O, ADAT I/O, etc.)
810 * * provides clock signal for the card and Alice2
811 * * two crystals - for 44.1kHz and 48kHz multiples
812 * * provides internal routing of signal sources to signal destinations
813 * * inputs/outputs to Alice2 - see above
815 * Current status of the driver:
816 * ----------------------------
817 * * only 44.1/48kHz supported (the MS Win driver supports up to 192 kHz)
818 * * PCM device nb. 2:
819 * 16 x 16-bit playback - snd_emu10k1_fx8010_playback_ops
820 * 16 x 32-bit capture - snd_emu10k1_capture_efx_ops
822 static int snd_emu10k1_emu1010_init(struct snd_emu10k1 *emu)
828 dev_info(emu->card->dev, "emu1010: Special config.\n");
829 /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave,
830 * Lock Sound Memory Cache, Lock Tank Memory Cache,
833 outl(0x0005a00c, emu->port + HCFG);
834 /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave,
835 * Lock Tank Memory Cache,
838 outl(0x0005a004, emu->port + HCFG);
839 /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave,
842 outl(0x0005a000, emu->port + HCFG);
843 /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave,
846 outl(0x0005a000, emu->port + HCFG);
848 /* Disable 48Volt power to Audio Dock */
849 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, 0);
851 /* ID, should read & 0x7f = 0x55. (Bit 7 is the IRQ bit) */
852 snd_emu1010_fpga_read(emu, EMU_HANA_ID, ®);
853 dev_dbg(emu->card->dev, "reg1 = 0x%x\n", reg);
854 if ((reg & 0x3f) == 0x15) {
855 /* FPGA netlist already present so clear it */
856 /* Return to programming mode */
858 snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, 0x02);
860 snd_emu1010_fpga_read(emu, EMU_HANA_ID, ®);
861 dev_dbg(emu->card->dev, "reg2 = 0x%x\n", reg);
862 if ((reg & 0x3f) == 0x15) {
863 /* FPGA failed to return to programming mode */
864 dev_info(emu->card->dev,
865 "emu1010: FPGA failed to return to programming mode\n");
868 dev_info(emu->card->dev, "emu1010: EMU_HANA_ID = 0x%x\n", reg);
870 err = snd_emu1010_load_firmware(emu, 0, &emu->firmware);
872 dev_info(emu->card->dev, "emu1010: Loading Firmware failed\n");
876 /* ID, should read & 0x7f = 0x55 when FPGA programmed. */
877 snd_emu1010_fpga_read(emu, EMU_HANA_ID, ®);
878 if ((reg & 0x3f) != 0x15) {
879 /* FPGA failed to be programmed */
880 dev_info(emu->card->dev,
881 "emu1010: Loading Hana Firmware file failed, reg = 0x%x\n",
886 dev_info(emu->card->dev, "emu1010: Hana Firmware loaded\n");
887 snd_emu1010_fpga_read(emu, EMU_HANA_MAJOR_REV, &tmp);
888 snd_emu1010_fpga_read(emu, EMU_HANA_MINOR_REV, &tmp2);
889 dev_info(emu->card->dev, "emu1010: Hana version: %u.%u\n", tmp, tmp2);
890 /* Enable 48Volt power to Audio Dock */
891 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, EMU_HANA_DOCK_PWR_ON);
893 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, ®);
894 dev_info(emu->card->dev, "emu1010: Card options = 0x%x\n", reg);
895 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, ®);
896 dev_info(emu->card->dev, "emu1010: Card options = 0x%x\n", reg);
897 snd_emu1010_fpga_read(emu, EMU_HANA_OPTICAL_TYPE, &tmp);
898 /* Optical -> ADAT I/O */
902 emu->emu1010.optical_in = 1; /* IN_ADAT */
903 emu->emu1010.optical_out = 1; /* IN_ADAT */
905 tmp = (emu->emu1010.optical_in ? EMU_HANA_OPTICAL_IN_ADAT : 0) |
906 (emu->emu1010.optical_out ? EMU_HANA_OPTICAL_OUT_ADAT : 0);
907 snd_emu1010_fpga_write(emu, EMU_HANA_OPTICAL_TYPE, tmp);
908 snd_emu1010_fpga_read(emu, EMU_HANA_ADC_PADS, &tmp);
909 /* Set no attenuation on Audio Dock pads. */
910 snd_emu1010_fpga_write(emu, EMU_HANA_ADC_PADS, 0x00);
911 emu->emu1010.adc_pads = 0x00;
912 snd_emu1010_fpga_read(emu, EMU_HANA_DOCK_MISC, &tmp);
913 /* Unmute Audio dock DACs, Headphone source DAC-4. */
914 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_MISC, 0x30);
915 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_LEDS_2, 0x12);
916 snd_emu1010_fpga_read(emu, EMU_HANA_DAC_PADS, &tmp);
918 snd_emu1010_fpga_write(emu, EMU_HANA_DAC_PADS, 0x0f);
919 emu->emu1010.dac_pads = 0x0f;
920 snd_emu1010_fpga_read(emu, EMU_HANA_DOCK_MISC, &tmp);
921 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_MISC, 0x30);
922 snd_emu1010_fpga_read(emu, EMU_HANA_SPDIF_MODE, &tmp);
923 /* SPDIF Format. Set Consumer mode, 24bit, copy enable */
924 snd_emu1010_fpga_write(emu, EMU_HANA_SPDIF_MODE, 0x10);
926 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_IN, 0x19);
928 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_OUT, 0x0c);
929 /* IRQ Enable: All on */
930 /* snd_emu1010_fpga_write(emu, 0x09, 0x0f ); */
931 /* IRQ Enable: All off */
932 snd_emu1010_fpga_write(emu, EMU_HANA_IRQ_ENABLE, 0x00);
934 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, ®);
935 dev_info(emu->card->dev, "emu1010: Card options3 = 0x%x\n", reg);
936 /* Default WCLK set to 48kHz. */
937 snd_emu1010_fpga_write(emu, EMU_HANA_DEFCLOCK, 0x00);
938 /* Word Clock source, Internal 48kHz x1 */
939 snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K);
940 /* snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K | EMU_HANA_WCLOCK_4X); */
941 /* Audio Dock LEDs. */
942 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_LEDS_2, 0x12);
946 snd_emu1010_fpga_link_dst_src_write(emu,
947 EMU_DST_ALICE2_EMU32_0, EMU_SRC_HAMOA_ADC_LEFT1);
948 snd_emu1010_fpga_link_dst_src_write(emu,
949 EMU_DST_ALICE2_EMU32_1, EMU_SRC_HAMOA_ADC_RIGHT1);
950 snd_emu1010_fpga_link_dst_src_write(emu,
951 EMU_DST_ALICE2_EMU32_4, EMU_SRC_HAMOA_ADC_LEFT2);
952 snd_emu1010_fpga_link_dst_src_write(emu,
953 EMU_DST_ALICE2_EMU32_5, EMU_SRC_HAMOA_ADC_RIGHT2);
957 snd_emu1010_fpga_link_dst_src_write(emu,
958 EMU_DST_ALICE2_EMU32_0, EMU_SRC_HAMOA_ADC_LEFT1);
959 snd_emu1010_fpga_link_dst_src_write(emu,
960 EMU_DST_ALICE2_EMU32_1, EMU_SRC_HAMOA_ADC_RIGHT1);
961 snd_emu1010_fpga_link_dst_src_write(emu,
962 EMU_DST_ALICE2_EMU32_2, EMU_SRC_HAMOA_ADC_LEFT2);
963 snd_emu1010_fpga_link_dst_src_write(emu,
964 EMU_DST_ALICE2_EMU32_3, EMU_SRC_HAMOA_ADC_RIGHT2);
965 snd_emu1010_fpga_link_dst_src_write(emu,
966 EMU_DST_ALICE2_EMU32_4, EMU_SRC_HAMOA_ADC_LEFT3);
967 snd_emu1010_fpga_link_dst_src_write(emu,
968 EMU_DST_ALICE2_EMU32_5, EMU_SRC_HAMOA_ADC_RIGHT3);
969 snd_emu1010_fpga_link_dst_src_write(emu,
970 EMU_DST_ALICE2_EMU32_6, EMU_SRC_HAMOA_ADC_LEFT4);
971 snd_emu1010_fpga_link_dst_src_write(emu,
972 EMU_DST_ALICE2_EMU32_7, EMU_SRC_HAMOA_ADC_RIGHT4);
976 snd_emu1010_fpga_link_dst_src_write(emu,
977 EMU_DST_ALICE2_EMU32_0, EMU_SRC_DOCK_MIC_A1);
978 snd_emu1010_fpga_link_dst_src_write(emu,
979 EMU_DST_ALICE2_EMU32_1, EMU_SRC_DOCK_MIC_B1);
980 snd_emu1010_fpga_link_dst_src_write(emu,
981 EMU_DST_ALICE2_EMU32_2, EMU_SRC_HAMOA_ADC_LEFT2);
982 snd_emu1010_fpga_link_dst_src_write(emu,
983 EMU_DST_ALICE2_EMU32_3, EMU_SRC_HAMOA_ADC_LEFT2);
984 snd_emu1010_fpga_link_dst_src_write(emu,
985 EMU_DST_ALICE2_EMU32_4, EMU_SRC_DOCK_ADC1_LEFT1);
986 snd_emu1010_fpga_link_dst_src_write(emu,
987 EMU_DST_ALICE2_EMU32_5, EMU_SRC_DOCK_ADC1_RIGHT1);
988 snd_emu1010_fpga_link_dst_src_write(emu,
989 EMU_DST_ALICE2_EMU32_6, EMU_SRC_DOCK_ADC2_LEFT1);
990 snd_emu1010_fpga_link_dst_src_write(emu,
991 EMU_DST_ALICE2_EMU32_7, EMU_SRC_DOCK_ADC2_RIGHT1);
992 /* Pavel Hofman - setting defaults for 8 more capture channels
993 * Defaults only, users will set their own values anyways, let's
997 snd_emu1010_fpga_link_dst_src_write(emu,
998 EMU_DST_ALICE2_EMU32_8, EMU_SRC_DOCK_MIC_A1);
999 snd_emu1010_fpga_link_dst_src_write(emu,
1000 EMU_DST_ALICE2_EMU32_9, EMU_SRC_DOCK_MIC_B1);
1001 snd_emu1010_fpga_link_dst_src_write(emu,
1002 EMU_DST_ALICE2_EMU32_A, EMU_SRC_HAMOA_ADC_LEFT2);
1003 snd_emu1010_fpga_link_dst_src_write(emu,
1004 EMU_DST_ALICE2_EMU32_B, EMU_SRC_HAMOA_ADC_LEFT2);
1005 snd_emu1010_fpga_link_dst_src_write(emu,
1006 EMU_DST_ALICE2_EMU32_C, EMU_SRC_DOCK_ADC1_LEFT1);
1007 snd_emu1010_fpga_link_dst_src_write(emu,
1008 EMU_DST_ALICE2_EMU32_D, EMU_SRC_DOCK_ADC1_RIGHT1);
1009 snd_emu1010_fpga_link_dst_src_write(emu,
1010 EMU_DST_ALICE2_EMU32_E, EMU_SRC_DOCK_ADC2_LEFT1);
1011 snd_emu1010_fpga_link_dst_src_write(emu,
1012 EMU_DST_ALICE2_EMU32_F, EMU_SRC_DOCK_ADC2_RIGHT1);
1016 snd_emu1010_fpga_link_dst_src_write(emu,
1017 EMU_DST_ALICE2_EMU32_4, EMU_SRC_HANA_ADAT);
1018 snd_emu1010_fpga_link_dst_src_write(emu,
1019 EMU_DST_ALICE2_EMU32_5, EMU_SRC_HANA_ADAT + 1);
1020 snd_emu1010_fpga_link_dst_src_write(emu,
1021 EMU_DST_ALICE2_EMU32_6, EMU_SRC_HANA_ADAT + 2);
1022 snd_emu1010_fpga_link_dst_src_write(emu,
1023 EMU_DST_ALICE2_EMU32_7, EMU_SRC_HANA_ADAT + 3);
1024 snd_emu1010_fpga_link_dst_src_write(emu,
1025 EMU_DST_ALICE2_EMU32_8, EMU_SRC_HANA_ADAT + 4);
1026 snd_emu1010_fpga_link_dst_src_write(emu,
1027 EMU_DST_ALICE2_EMU32_9, EMU_SRC_HANA_ADAT + 5);
1028 snd_emu1010_fpga_link_dst_src_write(emu,
1029 EMU_DST_ALICE2_EMU32_A, EMU_SRC_HANA_ADAT + 6);
1030 snd_emu1010_fpga_link_dst_src_write(emu,
1031 EMU_DST_ALICE2_EMU32_B, EMU_SRC_HANA_ADAT + 7);
1032 snd_emu1010_fpga_link_dst_src_write(emu,
1033 EMU_DST_ALICE2_EMU32_C, EMU_SRC_DOCK_MIC_A1);
1034 snd_emu1010_fpga_link_dst_src_write(emu,
1035 EMU_DST_ALICE2_EMU32_D, EMU_SRC_DOCK_MIC_B1);
1036 snd_emu1010_fpga_link_dst_src_write(emu,
1037 EMU_DST_ALICE2_EMU32_E, EMU_SRC_HAMOA_ADC_LEFT2);
1038 snd_emu1010_fpga_link_dst_src_write(emu,
1039 EMU_DST_ALICE2_EMU32_F, EMU_SRC_HAMOA_ADC_LEFT2);
1041 for (i = 0; i < 0x20; i++) {
1042 /* AudioDock Elink <- Silence */
1043 snd_emu1010_fpga_link_dst_src_write(emu, 0x0100 + i, EMU_SRC_SILENCE);
1045 for (i = 0; i < 4; i++) {
1046 /* Hana SPDIF Out <- Silence */
1047 snd_emu1010_fpga_link_dst_src_write(emu, 0x0200 + i, EMU_SRC_SILENCE);
1049 for (i = 0; i < 7; i++) {
1050 /* Hamoa DAC <- Silence */
1051 snd_emu1010_fpga_link_dst_src_write(emu, 0x0300 + i, EMU_SRC_SILENCE);
1053 for (i = 0; i < 7; i++) {
1054 /* Hana ADAT Out <- Silence */
1055 snd_emu1010_fpga_link_dst_src_write(emu, EMU_DST_HANA_ADAT + i, EMU_SRC_SILENCE);
1057 snd_emu1010_fpga_link_dst_src_write(emu,
1058 EMU_DST_ALICE_I2S0_LEFT, EMU_SRC_DOCK_ADC1_LEFT1);
1059 snd_emu1010_fpga_link_dst_src_write(emu,
1060 EMU_DST_ALICE_I2S0_RIGHT, EMU_SRC_DOCK_ADC1_RIGHT1);
1061 snd_emu1010_fpga_link_dst_src_write(emu,
1062 EMU_DST_ALICE_I2S1_LEFT, EMU_SRC_DOCK_ADC2_LEFT1);
1063 snd_emu1010_fpga_link_dst_src_write(emu,
1064 EMU_DST_ALICE_I2S1_RIGHT, EMU_SRC_DOCK_ADC2_RIGHT1);
1065 snd_emu1010_fpga_link_dst_src_write(emu,
1066 EMU_DST_ALICE_I2S2_LEFT, EMU_SRC_DOCK_ADC3_LEFT1);
1067 snd_emu1010_fpga_link_dst_src_write(emu,
1068 EMU_DST_ALICE_I2S2_RIGHT, EMU_SRC_DOCK_ADC3_RIGHT1);
1069 snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, 0x01); /* Unmute all */
1071 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &tmp);
1073 /* AC97 1.03, Any 32Meg of 2Gig address, Auto-Mute, EMU32 Slave,
1074 * Lock Sound Memory Cache, Lock Tank Memory Cache,
1077 outl(0x0000a000, emu->port + HCFG);
1078 /* AC97 1.03, Any 32Meg of 2Gig address, Auto-Mute, EMU32 Slave,
1079 * Lock Sound Memory Cache, Lock Tank Memory Cache,
1080 * Un-Mute all codecs.
1082 outl(0x0000a001, emu->port + HCFG);
1084 /* Initial boot complete. Now patches */
1086 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &tmp);
1087 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_IN, 0x19); /* MIDI Route */
1088 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_OUT, 0x0c); /* Unknown */
1089 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_IN, 0x19); /* MIDI Route */
1090 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_OUT, 0x0c); /* Unknown */
1091 snd_emu1010_fpga_read(emu, EMU_HANA_SPDIF_MODE, &tmp);
1092 snd_emu1010_fpga_write(emu, EMU_HANA_SPDIF_MODE, 0x10); /* SPDIF Format spdif (or 0x11 for aes/ebu) */
1095 snd_emu1010_fpga_link_dst_src_write(emu,
1096 EMU_DST_HAMOA_DAC_LEFT1, EMU_SRC_ALICE_EMU32B + 2); /* ALICE2 bus 0xa2 */
1097 snd_emu1010_fpga_link_dst_src_write(emu,
1098 EMU_DST_HAMOA_DAC_RIGHT1, EMU_SRC_ALICE_EMU32B + 3); /* ALICE2 bus 0xa3 */
1099 snd_emu1010_fpga_link_dst_src_write(emu,
1100 EMU_DST_HANA_SPDIF_LEFT1, EMU_SRC_ALICE_EMU32A + 2); /* ALICE2 bus 0xb2 */
1101 snd_emu1010_fpga_link_dst_src_write(emu,
1102 EMU_DST_HANA_SPDIF_RIGHT1, EMU_SRC_ALICE_EMU32A + 3); /* ALICE2 bus 0xb3 */
1104 /* Default outputs */
1105 if (emu->card_capabilities->emu_model == EMU_MODEL_EMU1616) {
1106 /* 1616(M) cardbus default outputs */
1107 /* ALICE2 bus 0xa0 */
1108 snd_emu1010_fpga_link_dst_src_write(emu,
1109 EMU_DST_DOCK_DAC1_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1110 emu->emu1010.output_source[0] = 17;
1111 snd_emu1010_fpga_link_dst_src_write(emu,
1112 EMU_DST_DOCK_DAC1_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1113 emu->emu1010.output_source[1] = 18;
1114 snd_emu1010_fpga_link_dst_src_write(emu,
1115 EMU_DST_DOCK_DAC2_LEFT1, EMU_SRC_ALICE_EMU32A + 2);
1116 emu->emu1010.output_source[2] = 19;
1117 snd_emu1010_fpga_link_dst_src_write(emu,
1118 EMU_DST_DOCK_DAC2_RIGHT1, EMU_SRC_ALICE_EMU32A + 3);
1119 emu->emu1010.output_source[3] = 20;
1120 snd_emu1010_fpga_link_dst_src_write(emu,
1121 EMU_DST_DOCK_DAC3_LEFT1, EMU_SRC_ALICE_EMU32A + 4);
1122 emu->emu1010.output_source[4] = 21;
1123 snd_emu1010_fpga_link_dst_src_write(emu,
1124 EMU_DST_DOCK_DAC3_RIGHT1, EMU_SRC_ALICE_EMU32A + 5);
1125 emu->emu1010.output_source[5] = 22;
1126 /* ALICE2 bus 0xa0 */
1127 snd_emu1010_fpga_link_dst_src_write(emu,
1128 EMU_DST_MANA_DAC_LEFT, EMU_SRC_ALICE_EMU32A + 0);
1129 emu->emu1010.output_source[16] = 17;
1130 snd_emu1010_fpga_link_dst_src_write(emu,
1131 EMU_DST_MANA_DAC_RIGHT, EMU_SRC_ALICE_EMU32A + 1);
1132 emu->emu1010.output_source[17] = 18;
1134 /* ALICE2 bus 0xa0 */
1135 snd_emu1010_fpga_link_dst_src_write(emu,
1136 EMU_DST_DOCK_DAC1_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1137 emu->emu1010.output_source[0] = 21;
1138 snd_emu1010_fpga_link_dst_src_write(emu,
1139 EMU_DST_DOCK_DAC1_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1140 emu->emu1010.output_source[1] = 22;
1141 snd_emu1010_fpga_link_dst_src_write(emu,
1142 EMU_DST_DOCK_DAC2_LEFT1, EMU_SRC_ALICE_EMU32A + 2);
1143 emu->emu1010.output_source[2] = 23;
1144 snd_emu1010_fpga_link_dst_src_write(emu,
1145 EMU_DST_DOCK_DAC2_RIGHT1, EMU_SRC_ALICE_EMU32A + 3);
1146 emu->emu1010.output_source[3] = 24;
1147 snd_emu1010_fpga_link_dst_src_write(emu,
1148 EMU_DST_DOCK_DAC3_LEFT1, EMU_SRC_ALICE_EMU32A + 4);
1149 emu->emu1010.output_source[4] = 25;
1150 snd_emu1010_fpga_link_dst_src_write(emu,
1151 EMU_DST_DOCK_DAC3_RIGHT1, EMU_SRC_ALICE_EMU32A + 5);
1152 emu->emu1010.output_source[5] = 26;
1153 snd_emu1010_fpga_link_dst_src_write(emu,
1154 EMU_DST_DOCK_DAC4_LEFT1, EMU_SRC_ALICE_EMU32A + 6);
1155 emu->emu1010.output_source[6] = 27;
1156 snd_emu1010_fpga_link_dst_src_write(emu,
1157 EMU_DST_DOCK_DAC4_RIGHT1, EMU_SRC_ALICE_EMU32A + 7);
1158 emu->emu1010.output_source[7] = 28;
1159 /* ALICE2 bus 0xa0 */
1160 snd_emu1010_fpga_link_dst_src_write(emu,
1161 EMU_DST_DOCK_PHONES_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1162 emu->emu1010.output_source[8] = 21;
1163 snd_emu1010_fpga_link_dst_src_write(emu,
1164 EMU_DST_DOCK_PHONES_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1165 emu->emu1010.output_source[9] = 22;
1166 /* ALICE2 bus 0xa0 */
1167 snd_emu1010_fpga_link_dst_src_write(emu,
1168 EMU_DST_DOCK_SPDIF_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1169 emu->emu1010.output_source[10] = 21;
1170 snd_emu1010_fpga_link_dst_src_write(emu,
1171 EMU_DST_DOCK_SPDIF_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1172 emu->emu1010.output_source[11] = 22;
1173 /* ALICE2 bus 0xa0 */
1174 snd_emu1010_fpga_link_dst_src_write(emu,
1175 EMU_DST_HANA_SPDIF_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1176 emu->emu1010.output_source[12] = 21;
1177 snd_emu1010_fpga_link_dst_src_write(emu,
1178 EMU_DST_HANA_SPDIF_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1179 emu->emu1010.output_source[13] = 22;
1180 /* ALICE2 bus 0xa0 */
1181 snd_emu1010_fpga_link_dst_src_write(emu,
1182 EMU_DST_HAMOA_DAC_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1183 emu->emu1010.output_source[14] = 21;
1184 snd_emu1010_fpga_link_dst_src_write(emu,
1185 EMU_DST_HAMOA_DAC_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1186 emu->emu1010.output_source[15] = 22;
1187 /* ALICE2 bus 0xa0 */
1188 snd_emu1010_fpga_link_dst_src_write(emu,
1189 EMU_DST_HANA_ADAT, EMU_SRC_ALICE_EMU32A + 0);
1190 emu->emu1010.output_source[16] = 21;
1191 snd_emu1010_fpga_link_dst_src_write(emu,
1192 EMU_DST_HANA_ADAT + 1, EMU_SRC_ALICE_EMU32A + 1);
1193 emu->emu1010.output_source[17] = 22;
1194 snd_emu1010_fpga_link_dst_src_write(emu,
1195 EMU_DST_HANA_ADAT + 2, EMU_SRC_ALICE_EMU32A + 2);
1196 emu->emu1010.output_source[18] = 23;
1197 snd_emu1010_fpga_link_dst_src_write(emu,
1198 EMU_DST_HANA_ADAT + 3, EMU_SRC_ALICE_EMU32A + 3);
1199 emu->emu1010.output_source[19] = 24;
1200 snd_emu1010_fpga_link_dst_src_write(emu,
1201 EMU_DST_HANA_ADAT + 4, EMU_SRC_ALICE_EMU32A + 4);
1202 emu->emu1010.output_source[20] = 25;
1203 snd_emu1010_fpga_link_dst_src_write(emu,
1204 EMU_DST_HANA_ADAT + 5, EMU_SRC_ALICE_EMU32A + 5);
1205 emu->emu1010.output_source[21] = 26;
1206 snd_emu1010_fpga_link_dst_src_write(emu,
1207 EMU_DST_HANA_ADAT + 6, EMU_SRC_ALICE_EMU32A + 6);
1208 emu->emu1010.output_source[22] = 27;
1209 snd_emu1010_fpga_link_dst_src_write(emu,
1210 EMU_DST_HANA_ADAT + 7, EMU_SRC_ALICE_EMU32A + 7);
1211 emu->emu1010.output_source[23] = 28;
1213 /* TEMP: Select SPDIF in/out */
1214 /* snd_emu1010_fpga_write(emu, EMU_HANA_OPTICAL_TYPE, 0x0); */ /* Output spdif */
1216 /* TEMP: Select 48kHz SPDIF out */
1217 snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, 0x0); /* Mute all */
1218 snd_emu1010_fpga_write(emu, EMU_HANA_DEFCLOCK, 0x0); /* Default fallback clock 48kHz */
1219 /* Word Clock source, Internal 48kHz x1 */
1220 snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K);
1221 /* snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K | EMU_HANA_WCLOCK_4X); */
1222 emu->emu1010.internal_clock = 1; /* 48000 */
1223 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_LEDS_2, 0x12); /* Set LEDs on Audio Dock */
1224 snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, 0x1); /* Unmute all */
1225 /* snd_emu1010_fpga_write(emu, 0x7, 0x0); */ /* Mute all */
1226 /* snd_emu1010_fpga_write(emu, 0x7, 0x1); */ /* Unmute all */
1227 /* snd_emu1010_fpga_write(emu, 0xe, 0x12); */ /* Set LEDs on Audio Dock */
1232 * Create the EMU10K1 instance
1235 #ifdef CONFIG_PM_SLEEP
1236 static int alloc_pm_buffer(struct snd_emu10k1 *emu);
1237 static void free_pm_buffer(struct snd_emu10k1 *emu);
1240 static void snd_emu10k1_free(struct snd_card *card)
1242 struct snd_emu10k1 *emu = card->private_data;
1244 if (emu->port) { /* avoid access to already used hardware */
1245 snd_emu10k1_fx8010_tram_setup(emu, 0);
1246 snd_emu10k1_done(emu);
1247 snd_emu10k1_free_efx(emu);
1249 if (emu->card_capabilities->emu_model == EMU_MODEL_EMU1010) {
1250 /* Disable 48Volt power to Audio Dock */
1251 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, 0);
1253 cancel_delayed_work_sync(&emu->emu1010.firmware_work);
1254 release_firmware(emu->firmware);
1255 release_firmware(emu->dock_fw);
1256 snd_util_memhdr_free(emu->memhdr);
1257 if (emu->silent_page.area)
1258 snd_dma_free_pages(&emu->silent_page);
1259 if (emu->ptb_pages.area)
1260 snd_dma_free_pages(&emu->ptb_pages);
1261 vfree(emu->page_ptr_table);
1262 vfree(emu->page_addr_table);
1263 #ifdef CONFIG_PM_SLEEP
1264 free_pm_buffer(emu);
1268 static const struct snd_emu_chip_details emu_chip_details[] = {
1269 /* Audigy 5/Rx SB1550 */
1270 /* Tested by michael@gernoth.net 28 Mar 2015 */
1271 /* DSP: CA10300-IAT LF
1272 * DAC: Cirrus Logic CS4382-KQZ
1273 * ADC: Philips 1361T
1274 * AC97: Sigmatel STAC9750
1277 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10241102,
1278 .driver = "Audigy2", .name = "SB Audigy 5/Rx [SB1550]",
1283 .adc_1361t = 1, /* 24 bit capture instead of 16bit */
1285 /* Audigy4 (Not PRO) SB0610 */
1286 /* Tested by James@superbug.co.uk 4th April 2006 */
1292 * 3: 0 - Digital Out, 1 - Line in
1300 * A: Green jack sense (Front)
1302 * C: Black jack sense (Rear/Side Right)
1303 * D: Yellow jack sense (Center/LFE/Side Left)
1307 * Digital Out/Line in switch using A_IOCFG bit 3 (0x08)
1311 /* Mic input not tested.
1312 * Analog CD input not tested
1313 * Digital Out not tested.
1315 * Audio output 5.1 working. Side outputs not working.
1317 /* DSP: CA10300-IAT LF
1318 * DAC: Cirrus Logic CS4382-KQZ
1319 * ADC: Philips 1361T
1320 * AC97: Sigmatel STAC9750
1323 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10211102,
1324 .driver = "Audigy2", .name = "SB Audigy 4 [SB0610]",
1329 .adc_1361t = 1, /* 24 bit capture instead of 16bit */
1331 /* Audigy 2 Value AC3 out does not work yet.
1332 * Need to find out how to turn off interpolators.
1334 /* Tested by James@superbug.co.uk 3rd July 2005 */
1337 * ADC: Philips 1361T
1341 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10011102,
1342 .driver = "Audigy2", .name = "SB Audigy 2 Value [SB0400]",
1348 /* Audigy 2 ZS Notebook Cardbus card.*/
1349 /* Tested by James@superbug.co.uk 6th November 2006 */
1350 /* Audio output 7.1/Headphones working.
1351 * Digital output working. (AC3 not checked, only PCM)
1352 * Audio Mic/Line inputs working.
1353 * Digital input not tested.
1356 * DAC: Wolfson WM8768/WM8568
1357 * ADC: Wolfson WM8775
1361 /* Tested by James@superbug.co.uk 4th April 2006 */
1365 * 1: 0 = Mute all the 7.1 channel out. 1 = unmute.
1366 * 2: Analog input 0 = line in, 1 = mic in
1368 * 4: Digital output 0 = off, 1 = on.
1373 * All bits 1 (0x3fxx) means nothing plugged in.
1374 * 8-9: 0 = Line in/Mic, 2 = Optical in, 3 = Nothing.
1375 * A-B: 0 = Headphones, 2 = Optical out, 3 = Nothing.
1376 * C-D: 2 = Front/Rear/etc, 3 = nothing.
1380 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x20011102,
1381 .driver = "Audigy2", .name = "Audigy 2 ZS Notebook [SB0530]",
1385 .ca_cardbus_chip = 1,
1389 /* Tested by James@superbug.co.uk 4th Nov 2007. */
1390 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x42011102,
1391 .driver = "Audigy2", .name = "E-mu 1010 Notebook [MAEM8950]",
1395 .ca_cardbus_chip = 1,
1397 .emu_model = EMU_MODEL_EMU1616},
1398 /* Tested by James@superbug.co.uk 4th Nov 2007. */
1399 /* This is MAEM8960, 0202 is MAEM 8980 */
1400 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40041102,
1401 .driver = "Audigy2", .name = "E-mu 1010b PCI [MAEM8960]",
1406 .emu_model = EMU_MODEL_EMU1010B}, /* EMU 1010 new revision */
1407 /* Tested by Maxim Kachur <mcdebugger@duganet.ru> 17th Oct 2012. */
1408 /* This is MAEM8986, 0202 is MAEM8980 */
1409 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40071102,
1410 .driver = "Audigy2", .name = "E-mu 1010 PCIe [MAEM8986]",
1415 .emu_model = EMU_MODEL_EMU1010B}, /* EMU 1010 PCIe */
1416 /* Tested by James@superbug.co.uk 8th July 2005. */
1417 /* This is MAEM8810, 0202 is MAEM8820 */
1418 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x40011102,
1419 .driver = "Audigy2", .name = "E-mu 1010 [MAEM8810]",
1424 .emu_model = EMU_MODEL_EMU1010}, /* EMU 1010 old revision */
1426 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40021102,
1427 .driver = "Audigy2", .name = "E-mu 0404b PCI [MAEM8852]",
1432 .emu_model = EMU_MODEL_EMU0404}, /* EMU 0404 new revision */
1433 /* Tested by James@superbug.co.uk 20-3-2007. */
1434 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x40021102,
1435 .driver = "Audigy2", .name = "E-mu 0404 [MAEM8850]",
1440 .emu_model = EMU_MODEL_EMU0404}, /* EMU 0404 */
1442 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40051102,
1443 .driver = "Audigy2", .name = "E-mu 0404 PCIe [MAEM8984]",
1448 .emu_model = EMU_MODEL_EMU0404}, /* EMU 0404 PCIe ver_03 */
1449 /* Note that all E-mu cards require kernel 2.6 or newer. */
1450 {.vendor = 0x1102, .device = 0x0008,
1451 .driver = "Audigy2", .name = "SB Audigy 2 Value [Unknown]",
1456 /* Tested by James@superbug.co.uk 3rd July 2005 */
1457 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20071102,
1458 .driver = "Audigy2", .name = "SB Audigy 4 PRO [SB0380]",
1466 /* Tested by shane-alsa@cm.nu 5th Nov 2005 */
1467 /* The 0x20061102 does have SB0350 written on it
1468 * Just like 0x20021102
1470 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20061102,
1471 .driver = "Audigy2", .name = "SB Audigy 2 [SB0350b]",
1478 .invert_shared_spdif = 1, /* digital/analog switch swapped */
1480 /* 0x20051102 also has SB0350 written on it, treated as Audigy 2 ZS by
1481 Creative's Windows driver */
1482 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20051102,
1483 .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0350a]",
1490 .invert_shared_spdif = 1, /* digital/analog switch swapped */
1492 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20021102,
1493 .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0350]",
1500 .invert_shared_spdif = 1, /* digital/analog switch swapped */
1502 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20011102,
1503 .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0360]",
1510 .invert_shared_spdif = 1, /* digital/analog switch swapped */
1513 /* Tested by James@superbug.co.uk 3rd July 2005 */
1516 * ADC: Philips 1361T
1520 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10071102,
1521 .driver = "Audigy2", .name = "SB Audigy 2 [SB0240]",
1528 .adc_1361t = 1, /* 24 bit capture instead of 16bit */
1530 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10051102,
1531 .driver = "Audigy2", .name = "Audigy 2 Platinum EX [SB0280]",
1538 /* Dell OEM/Creative Labs Audigy 2 ZS */
1539 /* See ALSA bug#1365 */
1540 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10031102,
1541 .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0353]",
1548 .invert_shared_spdif = 1, /* digital/analog switch swapped */
1550 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10021102,
1551 .driver = "Audigy2", .name = "SB Audigy 2 Platinum [SB0240P]",
1558 .invert_shared_spdif = 1, /* digital/analog switch swapped */
1559 .adc_1361t = 1, /* 24 bit capture instead of 16bit. Fixes ALSA bug#324 */
1561 {.vendor = 0x1102, .device = 0x0004, .revision = 0x04,
1562 .driver = "Audigy2", .name = "SB Audigy 2 [Unknown]",
1569 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00531102,
1570 .driver = "Audigy", .name = "SB Audigy 1 [SB0092]",
1575 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00521102,
1576 .driver = "Audigy", .name = "SB Audigy 1 ES [SB0160]",
1582 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00511102,
1583 .driver = "Audigy", .name = "SB Audigy 1 [SB0090]",
1588 {.vendor = 0x1102, .device = 0x0004,
1589 .driver = "Audigy", .name = "Audigy 1 [Unknown]",
1594 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x100a1102,
1595 .driver = "EMU10K1", .name = "SB Live! 5.1 [SB0220]",
1600 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x806b1102,
1601 .driver = "EMU10K1", .name = "SB Live! [SB0105]",
1606 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x806a1102,
1607 .driver = "EMU10K1", .name = "SB Live! Value [SB0103]",
1612 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80691102,
1613 .driver = "EMU10K1", .name = "SB Live! Value [SB0101]",
1618 /* Tested by ALSA bug#1680 26th December 2005 */
1619 /* note: It really has SB0220 written on the card, */
1620 /* but it's SB0228 according to kx.inf */
1621 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80661102,
1622 .driver = "EMU10K1", .name = "SB Live! 5.1 Dell OEM [SB0228]",
1627 /* Tested by Thomas Zehetbauer 27th Aug 2005 */
1628 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80651102,
1629 .driver = "EMU10K1", .name = "SB Live! 5.1 [SB0220]",
1634 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80641102,
1635 .driver = "EMU10K1", .name = "SB Live! 5.1",
1640 /* Tested by alsa bugtrack user "hus" bug #1297 12th Aug 2005 */
1641 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80611102,
1642 .driver = "EMU10K1", .name = "SB Live! 5.1 [SB0060]",
1645 .ac97_chip = 2, /* ac97 is optional; both SBLive 5.1 and platinum
1646 * share the same IDs!
1649 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80511102,
1650 .driver = "EMU10K1", .name = "SB Live! Value [CT4850]",
1655 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80401102,
1656 .driver = "EMU10K1", .name = "SB Live! Platinum [CT4760P]",
1660 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80321102,
1661 .driver = "EMU10K1", .name = "SB Live! Value [CT4871]",
1666 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80311102,
1667 .driver = "EMU10K1", .name = "SB Live! Value [CT4831]",
1672 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80281102,
1673 .driver = "EMU10K1", .name = "SB Live! Value [CT4870]",
1678 /* Tested by James@superbug.co.uk 3rd July 2005 */
1679 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80271102,
1680 .driver = "EMU10K1", .name = "SB Live! Value [CT4832]",
1685 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80261102,
1686 .driver = "EMU10K1", .name = "SB Live! Value [CT4830]",
1691 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80231102,
1692 .driver = "EMU10K1", .name = "SB PCI512 [CT4790]",
1697 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80221102,
1698 .driver = "EMU10K1", .name = "SB Live! Value [CT4780]",
1703 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x40011102,
1704 .driver = "EMU10K1", .name = "E-mu APS [PC545]",
1708 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x00211102,
1709 .driver = "EMU10K1", .name = "SB Live! [CT4620]",
1714 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x00201102,
1715 .driver = "EMU10K1", .name = "SB Live! Value [CT4670]",
1720 {.vendor = 0x1102, .device = 0x0002,
1721 .driver = "EMU10K1", .name = "SB Live! [Unknown]",
1726 { } /* terminator */
1730 * The chip (at least the Audigy 2 CA0102 chip, but most likely others, too)
1731 * has a problem that from time to time it likes to do few DMA reads a bit
1732 * beyond its normal allocation and gets very confused if these reads get
1733 * blocked by a IOMMU.
1735 * This behaviour has been observed for the first (reserved) page
1736 * (for which it happens multiple times at every playback), often for various
1737 * synth pages and sometimes for PCM playback buffers and the page table
1740 * As a workaround let's widen these DMA allocations by an extra page if we
1741 * detect that the device is behind a non-passthrough IOMMU.
1743 static void snd_emu10k1_detect_iommu(struct snd_emu10k1 *emu)
1745 struct iommu_domain *domain;
1747 emu->iommu_workaround = false;
1749 if (!iommu_present(emu->card->dev->bus))
1752 domain = iommu_get_domain_for_dev(emu->card->dev);
1753 if (domain && domain->type == IOMMU_DOMAIN_IDENTITY)
1756 dev_notice(emu->card->dev,
1757 "non-passthrough IOMMU detected, widening DMA allocations");
1758 emu->iommu_workaround = true;
1761 int snd_emu10k1_create(struct snd_card *card,
1762 struct pci_dev *pci,
1763 unsigned short extin_mask,
1764 unsigned short extout_mask,
1765 long max_cache_bytes,
1769 struct snd_emu10k1 *emu = card->private_data;
1772 size_t page_table_size;
1774 unsigned int silent_page;
1775 const struct snd_emu_chip_details *c;
1777 /* enable PCI device */
1778 err = pcim_enable_device(pci);
1782 card->private_free = snd_emu10k1_free;
1784 spin_lock_init(&emu->reg_lock);
1785 spin_lock_init(&emu->emu_lock);
1786 spin_lock_init(&emu->spi_lock);
1787 spin_lock_init(&emu->i2c_lock);
1788 spin_lock_init(&emu->voice_lock);
1789 spin_lock_init(&emu->synth_lock);
1790 spin_lock_init(&emu->memblk_lock);
1791 mutex_init(&emu->fx8010.lock);
1792 INIT_LIST_HEAD(&emu->mapped_link_head);
1793 INIT_LIST_HEAD(&emu->mapped_order_link_head);
1797 emu->get_synth_voice = NULL;
1798 INIT_DELAYED_WORK(&emu->emu1010.firmware_work, emu1010_firmware_work);
1799 /* read revision & serial */
1800 emu->revision = pci->revision;
1801 pci_read_config_dword(pci, PCI_SUBSYSTEM_VENDOR_ID, &emu->serial);
1802 pci_read_config_word(pci, PCI_SUBSYSTEM_ID, &emu->model);
1804 "vendor = 0x%x, device = 0x%x, subsystem_vendor_id = 0x%x, subsystem_id = 0x%x\n",
1805 pci->vendor, pci->device, emu->serial, emu->model);
1807 for (c = emu_chip_details; c->vendor; c++) {
1808 if (c->vendor == pci->vendor && c->device == pci->device) {
1810 if (c->subsystem && (c->subsystem == subsystem))
1815 if (c->subsystem && (c->subsystem != emu->serial))
1817 if (c->revision && c->revision != emu->revision)
1823 if (c->vendor == 0) {
1824 dev_err(card->dev, "emu10k1: Card not recognised\n");
1827 emu->card_capabilities = c;
1828 if (c->subsystem && !subsystem)
1829 dev_dbg(card->dev, "Sound card name = %s\n", c->name);
1831 dev_dbg(card->dev, "Sound card name = %s, "
1832 "vendor = 0x%x, device = 0x%x, subsystem = 0x%x. "
1833 "Forced to subsystem = 0x%x\n", c->name,
1834 pci->vendor, pci->device, emu->serial, c->subsystem);
1836 dev_dbg(card->dev, "Sound card name = %s, "
1837 "vendor = 0x%x, device = 0x%x, subsystem = 0x%x.\n",
1838 c->name, pci->vendor, pci->device,
1841 if (!*card->id && c->id)
1842 strscpy(card->id, c->id, sizeof(card->id));
1844 is_audigy = emu->audigy = c->emu10k2_chip;
1846 snd_emu10k1_detect_iommu(emu);
1848 /* set addressing mode */
1849 emu->address_mode = is_audigy ? 0 : 1;
1850 /* set the DMA transfer mask */
1851 emu->dma_mask = emu->address_mode ? EMU10K1_DMA_MASK : AUDIGY_DMA_MASK;
1852 if (dma_set_mask_and_coherent(&pci->dev, emu->dma_mask) < 0) {
1854 "architecture does not support PCI busmaster DMA with mask 0x%lx\n",
1859 emu->gpr_base = A_FXGPREGBASE;
1861 emu->gpr_base = FXGPREGBASE;
1863 err = pci_request_regions(pci, "EMU10K1");
1866 emu->port = pci_resource_start(pci, 0);
1868 emu->max_cache_pages = max_cache_bytes >> PAGE_SHIFT;
1870 page_table_size = sizeof(u32) * (emu->address_mode ? MAXPAGES1 :
1872 if (snd_emu10k1_alloc_pages_maybe_wider(emu, page_table_size,
1873 &emu->ptb_pages) < 0)
1875 dev_dbg(card->dev, "page table address range is %.8lx:%.8lx\n",
1876 (unsigned long)emu->ptb_pages.addr,
1877 (unsigned long)(emu->ptb_pages.addr + emu->ptb_pages.bytes));
1879 emu->page_ptr_table = vmalloc(array_size(sizeof(void *),
1880 emu->max_cache_pages));
1881 emu->page_addr_table = vmalloc(array_size(sizeof(unsigned long),
1882 emu->max_cache_pages));
1883 if (!emu->page_ptr_table || !emu->page_addr_table)
1886 if (snd_emu10k1_alloc_pages_maybe_wider(emu, EMUPAGESIZE,
1887 &emu->silent_page) < 0)
1889 dev_dbg(card->dev, "silent page range is %.8lx:%.8lx\n",
1890 (unsigned long)emu->silent_page.addr,
1891 (unsigned long)(emu->silent_page.addr +
1892 emu->silent_page.bytes));
1894 emu->memhdr = snd_util_memhdr_new(emu->max_cache_pages * PAGE_SIZE);
1897 emu->memhdr->block_extra_size = sizeof(struct snd_emu10k1_memblk) -
1898 sizeof(struct snd_util_memblk);
1900 pci_set_master(pci);
1902 emu->fx8010.fxbus_mask = 0x303f;
1903 if (extin_mask == 0)
1904 extin_mask = 0x3fcf;
1905 if (extout_mask == 0)
1906 extout_mask = 0x7fff;
1907 emu->fx8010.extin_mask = extin_mask;
1908 emu->fx8010.extout_mask = extout_mask;
1909 emu->enable_ir = enable_ir;
1911 if (emu->card_capabilities->ca_cardbus_chip) {
1912 err = snd_emu10k1_cardbus_init(emu);
1916 if (emu->card_capabilities->ecard) {
1917 err = snd_emu10k1_ecard_init(emu);
1920 } else if (emu->card_capabilities->emu_model) {
1921 err = snd_emu10k1_emu1010_init(emu);
1925 /* 5.1: Enable the additional AC97 Slots. If the emu10k1 version
1926 does not support this, it shouldn't do any harm */
1927 snd_emu10k1_ptr_write(emu, AC97SLOT, 0,
1928 AC97SLOT_CNTR|AC97SLOT_LFE);
1931 /* initialize TRAM setup */
1932 emu->fx8010.itram_size = (16 * 1024)/2;
1933 emu->fx8010.etram_pages.area = NULL;
1934 emu->fx8010.etram_pages.bytes = 0;
1936 /* irq handler must be registered after I/O ports are activated */
1937 if (devm_request_irq(&pci->dev, pci->irq, snd_emu10k1_interrupt,
1938 IRQF_SHARED, KBUILD_MODNAME, emu))
1940 emu->irq = pci->irq;
1941 card->sync_irq = emu->irq;
1944 * Init to 0x02109204 :
1945 * Clock accuracy = 0 (1000ppm)
1946 * Sample Rate = 2 (48kHz)
1947 * Audio Channel = 1 (Left of 2)
1948 * Source Number = 0 (Unspecified)
1949 * Generation Status = 1 (Original for Cat Code 12)
1950 * Cat Code = 12 (Digital Signal Mixer)
1952 * Emphasis = 0 (None)
1953 * CP = 1 (Copyright unasserted)
1954 * AN = 0 (Audio data)
1957 emu->spdif_bits[0] = emu->spdif_bits[1] =
1958 emu->spdif_bits[2] = SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
1959 SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC |
1960 SPCS_GENERATIONSTATUS | 0x00001200 |
1961 0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT;
1963 /* Clear silent pages and set up pointers */
1964 memset(emu->silent_page.area, 0, emu->silent_page.bytes);
1965 silent_page = emu->silent_page.addr << emu->address_mode;
1966 pgtbl = (__le32 *)emu->ptb_pages.area;
1967 for (idx = 0; idx < (emu->address_mode ? MAXPAGES1 : MAXPAGES0); idx++)
1968 pgtbl[idx] = cpu_to_le32(silent_page | idx);
1970 /* set up voice indices */
1971 for (idx = 0; idx < NUM_G; idx++) {
1972 emu->voices[idx].emu = emu;
1973 emu->voices[idx].number = idx;
1976 err = snd_emu10k1_init(emu, enable_ir, 0);
1979 #ifdef CONFIG_PM_SLEEP
1980 err = alloc_pm_buffer(emu);
1985 /* Initialize the effect engine */
1986 err = snd_emu10k1_init_efx(emu);
1989 snd_emu10k1_audio_enable(emu);
1991 #ifdef CONFIG_SND_PROC_FS
1992 snd_emu10k1_proc_init(emu);
1997 #ifdef CONFIG_PM_SLEEP
1998 static const unsigned char saved_regs[] = {
1999 CPF, PTRX, CVCF, VTFT, Z1, Z2, PSST, DSL, CCCA, CCR, CLP,
2000 FXRT, MAPA, MAPB, ENVVOL, ATKHLDV, DCYSUSV, LFOVAL1, ENVVAL,
2001 ATKHLDM, DCYSUSM, LFOVAL2, IP, IFATN, PEFE, FMMOD, TREMFRQ, FM2FRQ2,
2002 TEMPENV, ADCCR, FXWC, MICBA, ADCBA, FXBA,
2003 MICBS, ADCBS, FXBS, CDCS, GPSCS, SPCS0, SPCS1, SPCS2,
2004 SPBYPASS, AC97SLOT, CDSRCS, GPSRCS, ZVSRCS, MICIDX, ADCIDX, FXIDX,
2007 static const unsigned char saved_regs_audigy[] = {
2008 A_ADCIDX, A_MICIDX, A_FXWC1, A_FXWC2, A_SAMPLE_RATE,
2009 A_FXRT2, A_SENDAMOUNTS, A_FXRT1,
2013 static int alloc_pm_buffer(struct snd_emu10k1 *emu)
2017 size = ARRAY_SIZE(saved_regs);
2019 size += ARRAY_SIZE(saved_regs_audigy);
2020 emu->saved_ptr = vmalloc(array3_size(4, NUM_G, size));
2021 if (!emu->saved_ptr)
2023 if (snd_emu10k1_efx_alloc_pm_buffer(emu) < 0)
2025 if (emu->card_capabilities->ca0151_chip &&
2026 snd_p16v_alloc_pm_buffer(emu) < 0)
2031 static void free_pm_buffer(struct snd_emu10k1 *emu)
2033 vfree(emu->saved_ptr);
2034 snd_emu10k1_efx_free_pm_buffer(emu);
2035 if (emu->card_capabilities->ca0151_chip)
2036 snd_p16v_free_pm_buffer(emu);
2039 void snd_emu10k1_suspend_regs(struct snd_emu10k1 *emu)
2042 const unsigned char *reg;
2045 val = emu->saved_ptr;
2046 for (reg = saved_regs; *reg != 0xff; reg++)
2047 for (i = 0; i < NUM_G; i++, val++)
2048 *val = snd_emu10k1_ptr_read(emu, *reg, i);
2050 for (reg = saved_regs_audigy; *reg != 0xff; reg++)
2051 for (i = 0; i < NUM_G; i++, val++)
2052 *val = snd_emu10k1_ptr_read(emu, *reg, i);
2055 emu->saved_a_iocfg = inl(emu->port + A_IOCFG);
2056 emu->saved_hcfg = inl(emu->port + HCFG);
2059 void snd_emu10k1_resume_init(struct snd_emu10k1 *emu)
2061 if (emu->card_capabilities->ca_cardbus_chip)
2062 snd_emu10k1_cardbus_init(emu);
2063 if (emu->card_capabilities->ecard)
2064 snd_emu10k1_ecard_init(emu);
2065 else if (emu->card_capabilities->emu_model)
2066 snd_emu10k1_emu1010_init(emu);
2068 snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_CNTR|AC97SLOT_LFE);
2069 snd_emu10k1_init(emu, emu->enable_ir, 1);
2072 void snd_emu10k1_resume_regs(struct snd_emu10k1 *emu)
2075 const unsigned char *reg;
2078 snd_emu10k1_audio_enable(emu);
2080 /* resore for spdif */
2082 outl(emu->saved_a_iocfg, emu->port + A_IOCFG);
2083 outl(emu->saved_hcfg, emu->port + HCFG);
2085 val = emu->saved_ptr;
2086 for (reg = saved_regs; *reg != 0xff; reg++)
2087 for (i = 0; i < NUM_G; i++, val++)
2088 snd_emu10k1_ptr_write(emu, *reg, i, *val);
2090 for (reg = saved_regs_audigy; *reg != 0xff; reg++)
2091 for (i = 0; i < NUM_G; i++, val++)
2092 snd_emu10k1_ptr_write(emu, *reg, i, *val);