2 * Copyright (c) by Jaroslav Kysela <perex@perex.cz>
4 * Routines for control of EMU10K1 chips
6 * Copyright (c) by James Courtier-Dutton <James@superbug.co.uk>
7 * Added support for Audigy 2 Value.
8 * Added EMU 1010 support.
9 * General bug fixes and enhancements.
18 * This program is free software; you can redistribute it and/or modify
19 * it under the terms of the GNU General Public License as published by
20 * the Free Software Foundation; either version 2 of the License, or
21 * (at your option) any later version.
23 * This program is distributed in the hope that it will be useful,
24 * but WITHOUT ANY WARRANTY; without even the implied warranty of
25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26 * GNU General Public License for more details.
28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
34 #include <linux/sched.h>
35 #include <linux/kthread.h>
36 #include <linux/delay.h>
37 #include <linux/init.h>
38 #include <linux/module.h>
39 #include <linux/interrupt.h>
40 #include <linux/pci.h>
41 #include <linux/slab.h>
42 #include <linux/vmalloc.h>
43 #include <linux/mutex.h>
46 #include <sound/core.h>
47 #include <sound/emu10k1.h>
48 #include <linux/firmware.h>
54 #define HANA_FILENAME "/*(DEBLOBBED)*/"
55 #define DOCK_FILENAME "/*(DEBLOBBED)*/"
56 #define EMU1010B_FILENAME "/*(DEBLOBBED)*/"
57 #define MICRO_DOCK_FILENAME "/*(DEBLOBBED)*/"
58 #define EMU0404_FILENAME "/*(DEBLOBBED)*/"
59 #define EMU1010_NOTEBOOK_FILENAME "/*(DEBLOBBED)*/"
64 /*************************************************************************
66 *************************************************************************/
68 void snd_emu10k1_voice_init(struct snd_emu10k1 *emu, int ch)
70 snd_emu10k1_ptr_write(emu, DCYSUSV, ch, 0);
71 snd_emu10k1_ptr_write(emu, IP, ch, 0);
72 snd_emu10k1_ptr_write(emu, VTFT, ch, 0xffff);
73 snd_emu10k1_ptr_write(emu, CVCF, ch, 0xffff);
74 snd_emu10k1_ptr_write(emu, PTRX, ch, 0);
75 snd_emu10k1_ptr_write(emu, CPF, ch, 0);
76 snd_emu10k1_ptr_write(emu, CCR, ch, 0);
78 snd_emu10k1_ptr_write(emu, PSST, ch, 0);
79 snd_emu10k1_ptr_write(emu, DSL, ch, 0x10);
80 snd_emu10k1_ptr_write(emu, CCCA, ch, 0);
81 snd_emu10k1_ptr_write(emu, Z1, ch, 0);
82 snd_emu10k1_ptr_write(emu, Z2, ch, 0);
83 snd_emu10k1_ptr_write(emu, FXRT, ch, 0x32100000);
85 snd_emu10k1_ptr_write(emu, ATKHLDM, ch, 0);
86 snd_emu10k1_ptr_write(emu, DCYSUSM, ch, 0);
87 snd_emu10k1_ptr_write(emu, IFATN, ch, 0xffff);
88 snd_emu10k1_ptr_write(emu, PEFE, ch, 0);
89 snd_emu10k1_ptr_write(emu, FMMOD, ch, 0);
90 snd_emu10k1_ptr_write(emu, TREMFRQ, ch, 24); /* 1 Hz */
91 snd_emu10k1_ptr_write(emu, FM2FRQ2, ch, 24); /* 1 Hz */
92 snd_emu10k1_ptr_write(emu, TEMPENV, ch, 0);
94 /*** these are last so OFF prevents writing ***/
95 snd_emu10k1_ptr_write(emu, LFOVAL2, ch, 0);
96 snd_emu10k1_ptr_write(emu, LFOVAL1, ch, 0);
97 snd_emu10k1_ptr_write(emu, ATKHLDV, ch, 0);
98 snd_emu10k1_ptr_write(emu, ENVVOL, ch, 0);
99 snd_emu10k1_ptr_write(emu, ENVVAL, ch, 0);
101 /* Audigy extra stuffs */
103 snd_emu10k1_ptr_write(emu, 0x4c, ch, 0); /* ?? */
104 snd_emu10k1_ptr_write(emu, 0x4d, ch, 0); /* ?? */
105 snd_emu10k1_ptr_write(emu, 0x4e, ch, 0); /* ?? */
106 snd_emu10k1_ptr_write(emu, 0x4f, ch, 0); /* ?? */
107 snd_emu10k1_ptr_write(emu, A_FXRT1, ch, 0x03020100);
108 snd_emu10k1_ptr_write(emu, A_FXRT2, ch, 0x3f3f3f3f);
109 snd_emu10k1_ptr_write(emu, A_SENDAMOUNTS, ch, 0);
113 static unsigned int spi_dac_init[] = {
137 static unsigned int i2c_adc_init[][2] = {
138 { 0x17, 0x00 }, /* Reset */
139 { 0x07, 0x00 }, /* Timeout */
140 { 0x0b, 0x22 }, /* Interface control */
141 { 0x0c, 0x22 }, /* Master mode control */
142 { 0x0d, 0x08 }, /* Powerdown control */
143 { 0x0e, 0xcf }, /* Attenuation Left 0x01 = -103dB, 0xff = 24dB */
144 { 0x0f, 0xcf }, /* Attenuation Right 0.5dB steps */
145 { 0x10, 0x7b }, /* ALC Control 1 */
146 { 0x11, 0x00 }, /* ALC Control 2 */
147 { 0x12, 0x32 }, /* ALC Control 3 */
148 { 0x13, 0x00 }, /* Noise gate control */
149 { 0x14, 0xa6 }, /* Limiter control */
150 { 0x15, ADC_MUX_2 }, /* ADC Mixer control. Mic for A2ZS Notebook */
153 static int snd_emu10k1_init(struct snd_emu10k1 *emu, int enable_ir, int resume)
155 unsigned int silent_page;
159 /* disable audio and lock cache */
160 outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK |
161 HCFG_MUTEBUTTONENABLE, emu->port + HCFG);
163 /* reset recording buffers */
164 snd_emu10k1_ptr_write(emu, MICBS, 0, ADCBS_BUFSIZE_NONE);
165 snd_emu10k1_ptr_write(emu, MICBA, 0, 0);
166 snd_emu10k1_ptr_write(emu, FXBS, 0, ADCBS_BUFSIZE_NONE);
167 snd_emu10k1_ptr_write(emu, FXBA, 0, 0);
168 snd_emu10k1_ptr_write(emu, ADCBS, 0, ADCBS_BUFSIZE_NONE);
169 snd_emu10k1_ptr_write(emu, ADCBA, 0, 0);
171 /* disable channel interrupt */
172 outl(0, emu->port + INTE);
173 snd_emu10k1_ptr_write(emu, CLIEL, 0, 0);
174 snd_emu10k1_ptr_write(emu, CLIEH, 0, 0);
175 snd_emu10k1_ptr_write(emu, SOLEL, 0, 0);
176 snd_emu10k1_ptr_write(emu, SOLEH, 0, 0);
179 /* set SPDIF bypass mode */
180 snd_emu10k1_ptr_write(emu, SPBYPASS, 0, SPBYPASS_FORMAT);
181 /* enable rear left + rear right AC97 slots */
182 snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_REAR_RIGHT |
186 /* init envelope engine */
187 for (ch = 0; ch < NUM_G; ch++)
188 snd_emu10k1_voice_init(emu, ch);
190 snd_emu10k1_ptr_write(emu, SPCS0, 0, emu->spdif_bits[0]);
191 snd_emu10k1_ptr_write(emu, SPCS1, 0, emu->spdif_bits[1]);
192 snd_emu10k1_ptr_write(emu, SPCS2, 0, emu->spdif_bits[2]);
194 if (emu->card_capabilities->ca0151_chip) { /* audigy2 */
195 /* Hacks for Alice3 to work independent of haP16V driver */
196 /* Setup SRCMulti_I2S SamplingRate */
197 tmp = snd_emu10k1_ptr_read(emu, A_SPDIF_SAMPLERATE, 0);
200 snd_emu10k1_ptr_write(emu, A_SPDIF_SAMPLERATE, 0, tmp);
202 /* Setup SRCSel (Enable Spdif,I2S SRCMulti) */
203 snd_emu10k1_ptr20_write(emu, SRCSel, 0, 0x14);
204 /* Setup SRCMulti Input Audio Enable */
205 /* Use 0xFFFFFFFF to enable P16V sounds. */
206 snd_emu10k1_ptr20_write(emu, SRCMULTI_ENABLE, 0, 0xFFFFFFFF);
208 /* Enabled Phased (8-channel) P16V playback */
209 outl(0x0201, emu->port + HCFG2);
210 /* Set playback routing. */
211 snd_emu10k1_ptr20_write(emu, CAPTURE_P16V_SOURCE, 0, 0x78e4);
213 if (emu->card_capabilities->ca0108_chip) { /* audigy2 Value */
214 /* Hacks for Alice3 to work independent of haP16V driver */
215 dev_info(emu->card->dev, "Audigy2 value: Special config.\n");
216 /* Setup SRCMulti_I2S SamplingRate */
217 tmp = snd_emu10k1_ptr_read(emu, A_SPDIF_SAMPLERATE, 0);
220 snd_emu10k1_ptr_write(emu, A_SPDIF_SAMPLERATE, 0, tmp);
222 /* Setup SRCSel (Enable Spdif,I2S SRCMulti) */
223 outl(0x600000, emu->port + 0x20);
224 outl(0x14, emu->port + 0x24);
226 /* Setup SRCMulti Input Audio Enable */
227 outl(0x7b0000, emu->port + 0x20);
228 outl(0xFF000000, emu->port + 0x24);
230 /* Setup SPDIF Out Audio Enable */
231 /* The Audigy 2 Value has a separate SPDIF out,
232 * so no need for a mixer switch
234 outl(0x7a0000, emu->port + 0x20);
235 outl(0xFF000000, emu->port + 0x24);
236 tmp = inl(emu->port + A_IOCFG) & ~0x8; /* Clear bit 3 */
237 outl(tmp, emu->port + A_IOCFG);
239 if (emu->card_capabilities->spi_dac) { /* Audigy 2 ZS Notebook with DAC Wolfson WM8768/WM8568 */
242 size = ARRAY_SIZE(spi_dac_init);
243 for (n = 0; n < size; n++)
244 snd_emu10k1_spi_write(emu, spi_dac_init[n]);
246 snd_emu10k1_ptr20_write(emu, 0x60, 0, 0x10);
249 * GPIO1: Speakers-enabled.
252 * GPIO4: IEC958 Output on.
257 outl(0x76, emu->port + A_IOCFG); /* Windows uses 0x3f76 */
259 if (emu->card_capabilities->i2c_adc) { /* Audigy 2 ZS Notebook with ADC Wolfson WM8775 */
262 snd_emu10k1_ptr20_write(emu, P17V_I2S_SRC_SEL, 0, 0x2020205f);
263 tmp = inl(emu->port + A_IOCFG);
264 outl(tmp | 0x4, emu->port + A_IOCFG); /* Set bit 2 for mic input */
265 tmp = inl(emu->port + A_IOCFG);
266 size = ARRAY_SIZE(i2c_adc_init);
267 for (n = 0; n < size; n++)
268 snd_emu10k1_i2c_write(emu, i2c_adc_init[n][0], i2c_adc_init[n][1]);
269 for (n = 0; n < 4; n++) {
270 emu->i2c_capture_volume[n][0] = 0xcf;
271 emu->i2c_capture_volume[n][1] = 0xcf;
276 snd_emu10k1_ptr_write(emu, PTB, 0, emu->ptb_pages.addr);
277 snd_emu10k1_ptr_write(emu, TCB, 0, 0); /* taken from original driver */
278 snd_emu10k1_ptr_write(emu, TCBS, 0, 4); /* taken from original driver */
280 silent_page = (emu->silent_page.addr << emu->address_mode) | (emu->address_mode ? MAP_PTI_MASK1 : MAP_PTI_MASK0);
281 for (ch = 0; ch < NUM_G; ch++) {
282 snd_emu10k1_ptr_write(emu, MAPA, ch, silent_page);
283 snd_emu10k1_ptr_write(emu, MAPB, ch, silent_page);
286 if (emu->card_capabilities->emu_model) {
287 outl(HCFG_AUTOMUTE_ASYNC |
289 HCFG_AUDIOENABLE, emu->port + HCFG);
292 * Mute Disable Audio = 0
293 * Lock Tank Memory = 1
294 * Lock Sound Memory = 0
297 } else if (emu->audigy) {
298 if (emu->revision == 4) /* audigy2 */
299 outl(HCFG_AUDIOENABLE |
300 HCFG_AC3ENABLE_CDSPDIF |
301 HCFG_AC3ENABLE_GPSPDIF |
302 HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
304 outl(HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
305 /* FIXME: Remove all these emu->model and replace it with a card recognition parameter,
306 * e.g. card_capabilities->joystick */
307 } else if (emu->model == 0x20 ||
308 emu->model == 0xc400 ||
309 (emu->model == 0x21 && emu->revision < 6))
310 outl(HCFG_LOCKTANKCACHE_MASK | HCFG_AUTOMUTE, emu->port + HCFG);
312 /* With on-chip joystick */
313 outl(HCFG_LOCKTANKCACHE_MASK | HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
315 if (enable_ir) { /* enable IR for SB Live */
316 if (emu->card_capabilities->emu_model) {
317 ; /* Disable all access to A_IOCFG for the emu1010 */
318 } else if (emu->card_capabilities->i2c_adc) {
319 ; /* Disable A_IOCFG for Audigy 2 ZS Notebook */
320 } else if (emu->audigy) {
321 unsigned int reg = inl(emu->port + A_IOCFG);
322 outl(reg | A_IOCFG_GPOUT2, emu->port + A_IOCFG);
324 outl(reg | A_IOCFG_GPOUT1 | A_IOCFG_GPOUT2, emu->port + A_IOCFG);
326 outl(reg, emu->port + A_IOCFG);
328 unsigned int reg = inl(emu->port + HCFG);
329 outl(reg | HCFG_GPOUT2, emu->port + HCFG);
331 outl(reg | HCFG_GPOUT1 | HCFG_GPOUT2, emu->port + HCFG);
333 outl(reg, emu->port + HCFG);
337 if (emu->card_capabilities->emu_model) {
338 ; /* Disable all access to A_IOCFG for the emu1010 */
339 } else if (emu->card_capabilities->i2c_adc) {
340 ; /* Disable A_IOCFG for Audigy 2 ZS Notebook */
341 } else if (emu->audigy) { /* enable analog output */
342 unsigned int reg = inl(emu->port + A_IOCFG);
343 outl(reg | A_IOCFG_GPOUT0, emu->port + A_IOCFG);
346 if (emu->address_mode == 0) {
348 outl(inl(emu->port + HCFG) | HCFG_EXPANDED_MEM, emu->port + HCFG);
354 static void snd_emu10k1_audio_enable(struct snd_emu10k1 *emu)
357 * Enable the audio bit
359 outl(inl(emu->port + HCFG) | HCFG_AUDIOENABLE, emu->port + HCFG);
361 /* Enable analog/digital outs on audigy */
362 if (emu->card_capabilities->emu_model) {
363 ; /* Disable all access to A_IOCFG for the emu1010 */
364 } else if (emu->card_capabilities->i2c_adc) {
365 ; /* Disable A_IOCFG for Audigy 2 ZS Notebook */
366 } else if (emu->audigy) {
367 outl(inl(emu->port + A_IOCFG) & ~0x44, emu->port + A_IOCFG);
369 if (emu->card_capabilities->ca0151_chip) { /* audigy2 */
370 /* Unmute Analog now. Set GPO6 to 1 for Apollo.
371 * This has to be done after init ALice3 I2SOut beyond 48KHz.
372 * So, sequence is important. */
373 outl(inl(emu->port + A_IOCFG) | 0x0040, emu->port + A_IOCFG);
374 } else if (emu->card_capabilities->ca0108_chip) { /* audigy2 value */
375 /* Unmute Analog now. */
376 outl(inl(emu->port + A_IOCFG) | 0x0060, emu->port + A_IOCFG);
378 /* Disable routing from AC97 line out to Front speakers */
379 outl(inl(emu->port + A_IOCFG) | 0x0080, emu->port + A_IOCFG);
386 /* FIXME: the following routine disables LiveDrive-II !! */
387 /* TOSLink detection */
389 tmp = inl(emu->port + HCFG);
390 if (tmp & (HCFG_GPINPUT0 | HCFG_GPINPUT1)) {
391 outl(tmp|0x800, emu->port + HCFG);
393 if (tmp != (inl(emu->port + HCFG) & ~0x800)) {
395 outl(tmp, emu->port + HCFG);
401 snd_emu10k1_intr_enable(emu, INTE_PCIERRORENABLE);
404 int snd_emu10k1_done(struct snd_emu10k1 *emu)
408 outl(0, emu->port + INTE);
413 for (ch = 0; ch < NUM_G; ch++)
414 snd_emu10k1_ptr_write(emu, DCYSUSV, ch, 0);
415 for (ch = 0; ch < NUM_G; ch++) {
416 snd_emu10k1_ptr_write(emu, VTFT, ch, 0);
417 snd_emu10k1_ptr_write(emu, CVCF, ch, 0);
418 snd_emu10k1_ptr_write(emu, PTRX, ch, 0);
419 snd_emu10k1_ptr_write(emu, CPF, ch, 0);
422 /* reset recording buffers */
423 snd_emu10k1_ptr_write(emu, MICBS, 0, 0);
424 snd_emu10k1_ptr_write(emu, MICBA, 0, 0);
425 snd_emu10k1_ptr_write(emu, FXBS, 0, 0);
426 snd_emu10k1_ptr_write(emu, FXBA, 0, 0);
427 snd_emu10k1_ptr_write(emu, FXWC, 0, 0);
428 snd_emu10k1_ptr_write(emu, ADCBS, 0, ADCBS_BUFSIZE_NONE);
429 snd_emu10k1_ptr_write(emu, ADCBA, 0, 0);
430 snd_emu10k1_ptr_write(emu, TCBS, 0, TCBS_BUFFSIZE_16K);
431 snd_emu10k1_ptr_write(emu, TCB, 0, 0);
433 snd_emu10k1_ptr_write(emu, A_DBG, 0, A_DBG_SINGLE_STEP);
435 snd_emu10k1_ptr_write(emu, DBG, 0, EMU10K1_DBG_SINGLE_STEP);
437 /* disable channel interrupt */
438 snd_emu10k1_ptr_write(emu, CLIEL, 0, 0);
439 snd_emu10k1_ptr_write(emu, CLIEH, 0, 0);
440 snd_emu10k1_ptr_write(emu, SOLEL, 0, 0);
441 snd_emu10k1_ptr_write(emu, SOLEH, 0, 0);
443 /* disable audio and lock cache */
444 outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | HCFG_MUTEBUTTONENABLE, emu->port + HCFG);
445 snd_emu10k1_ptr_write(emu, PTB, 0, 0);
450 /*************************************************************************
451 * ECARD functional implementation
452 *************************************************************************/
454 /* In A1 Silicon, these bits are in the HC register */
455 #define HOOKN_BIT (1L << 12)
456 #define HANDN_BIT (1L << 11)
457 #define PULSEN_BIT (1L << 10)
459 #define EC_GDI1 (1 << 13)
460 #define EC_GDI0 (1 << 14)
462 #define EC_NUM_CONTROL_BITS 20
464 #define EC_AC3_DATA_SELN 0x0001L
465 #define EC_EE_DATA_SEL 0x0002L
466 #define EC_EE_CNTRL_SELN 0x0004L
467 #define EC_EECLK 0x0008L
468 #define EC_EECS 0x0010L
469 #define EC_EESDO 0x0020L
470 #define EC_TRIM_CSN 0x0040L
471 #define EC_TRIM_SCLK 0x0080L
472 #define EC_TRIM_SDATA 0x0100L
473 #define EC_TRIM_MUTEN 0x0200L
474 #define EC_ADCCAL 0x0400L
475 #define EC_ADCRSTN 0x0800L
476 #define EC_DACCAL 0x1000L
477 #define EC_DACMUTEN 0x2000L
478 #define EC_LEDN 0x4000L
480 #define EC_SPDIF0_SEL_SHIFT 15
481 #define EC_SPDIF1_SEL_SHIFT 17
482 #define EC_SPDIF0_SEL_MASK (0x3L << EC_SPDIF0_SEL_SHIFT)
483 #define EC_SPDIF1_SEL_MASK (0x7L << EC_SPDIF1_SEL_SHIFT)
484 #define EC_SPDIF0_SELECT(_x) (((_x) << EC_SPDIF0_SEL_SHIFT) & EC_SPDIF0_SEL_MASK)
485 #define EC_SPDIF1_SELECT(_x) (((_x) << EC_SPDIF1_SEL_SHIFT) & EC_SPDIF1_SEL_MASK)
486 #define EC_CURRENT_PROM_VERSION 0x01 /* Self-explanatory. This should
487 * be incremented any time the EEPROM's
488 * format is changed. */
490 #define EC_EEPROM_SIZE 0x40 /* ECARD EEPROM has 64 16-bit words */
492 /* Addresses for special values stored in to EEPROM */
493 #define EC_PROM_VERSION_ADDR 0x20 /* Address of the current prom version */
494 #define EC_BOARDREV0_ADDR 0x21 /* LSW of board rev */
495 #define EC_BOARDREV1_ADDR 0x22 /* MSW of board rev */
497 #define EC_LAST_PROMFILE_ADDR 0x2f
499 #define EC_SERIALNUM_ADDR 0x30 /* First word of serial number. The
500 * can be up to 30 characters in length
501 * and is stored as a NULL-terminated
502 * ASCII string. Any unused bytes must be
503 * filled with zeros */
504 #define EC_CHECKSUM_ADDR 0x3f /* Location at which checksum is stored */
507 /* Most of this stuff is pretty self-evident. According to the hardware
508 * dudes, we need to leave the ADCCAL bit low in order to avoid a DC
509 * offset problem. Weird.
511 #define EC_RAW_RUN_MODE (EC_DACMUTEN | EC_ADCRSTN | EC_TRIM_MUTEN | \
515 #define EC_DEFAULT_ADC_GAIN 0xC4C4
516 #define EC_DEFAULT_SPDIF0_SEL 0x0
517 #define EC_DEFAULT_SPDIF1_SEL 0x4
519 /**************************************************************************
520 * @func Clock bits into the Ecard's control latch. The Ecard uses a
521 * control latch will is loaded bit-serially by toggling the Modem control
522 * lines from function 2 on the E8010. This function hides these details
523 * and presents the illusion that we are actually writing to a distinct
527 static void snd_emu10k1_ecard_write(struct snd_emu10k1 *emu, unsigned int value)
529 unsigned short count;
531 unsigned long hc_port;
532 unsigned int hc_value;
534 hc_port = emu->port + HCFG;
535 hc_value = inl(hc_port) & ~(HOOKN_BIT | HANDN_BIT | PULSEN_BIT);
536 outl(hc_value, hc_port);
538 for (count = 0; count < EC_NUM_CONTROL_BITS; count++) {
540 /* Set up the value */
541 data = ((value & 0x1) ? PULSEN_BIT : 0);
544 outl(hc_value | data, hc_port);
546 /* Clock the shift register */
547 outl(hc_value | data | HANDN_BIT, hc_port);
548 outl(hc_value | data, hc_port);
552 outl(hc_value | HOOKN_BIT, hc_port);
553 outl(hc_value, hc_port);
556 /**************************************************************************
557 * @func Set the gain of the ECARD's CS3310 Trim/gain controller. The
558 * trim value consists of a 16bit value which is composed of two
559 * 8 bit gain/trim values, one for the left channel and one for the
560 * right channel. The following table maps from the Gain/Attenuation
561 * value in decibels into the corresponding bit pattern for a single
565 static void snd_emu10k1_ecard_setadcgain(struct snd_emu10k1 *emu,
570 /* Enable writing to the TRIM registers */
571 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl & ~EC_TRIM_CSN);
573 /* Do it again to insure that we meet hold time requirements */
574 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl & ~EC_TRIM_CSN);
576 for (bit = (1 << 15); bit; bit >>= 1) {
579 value = emu->ecard_ctrl & ~(EC_TRIM_CSN | EC_TRIM_SDATA);
582 value |= EC_TRIM_SDATA;
585 snd_emu10k1_ecard_write(emu, value);
586 snd_emu10k1_ecard_write(emu, value | EC_TRIM_SCLK);
587 snd_emu10k1_ecard_write(emu, value);
590 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl);
593 static int snd_emu10k1_ecard_init(struct snd_emu10k1 *emu)
595 unsigned int hc_value;
597 /* Set up the initial settings */
598 emu->ecard_ctrl = EC_RAW_RUN_MODE |
599 EC_SPDIF0_SELECT(EC_DEFAULT_SPDIF0_SEL) |
600 EC_SPDIF1_SELECT(EC_DEFAULT_SPDIF1_SEL);
602 /* Step 0: Set the codec type in the hardware control register
603 * and enable audio output */
604 hc_value = inl(emu->port + HCFG);
605 outl(hc_value | HCFG_AUDIOENABLE | HCFG_CODECFORMAT_I2S, emu->port + HCFG);
606 inl(emu->port + HCFG);
608 /* Step 1: Turn off the led and deassert TRIM_CS */
609 snd_emu10k1_ecard_write(emu, EC_ADCCAL | EC_LEDN | EC_TRIM_CSN);
611 /* Step 2: Calibrate the ADC and DAC */
612 snd_emu10k1_ecard_write(emu, EC_DACCAL | EC_LEDN | EC_TRIM_CSN);
614 /* Step 3: Wait for awhile; XXX We can't get away with this
615 * under a real operating system; we'll need to block and wait that
617 snd_emu10k1_wait(emu, 48000);
619 /* Step 4: Switch off the DAC and ADC calibration. Note
620 * That ADC_CAL is actually an inverted signal, so we assert
621 * it here to stop calibration. */
622 snd_emu10k1_ecard_write(emu, EC_ADCCAL | EC_LEDN | EC_TRIM_CSN);
624 /* Step 4: Switch into run mode */
625 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl);
627 /* Step 5: Set the analog input gain */
628 snd_emu10k1_ecard_setadcgain(emu, EC_DEFAULT_ADC_GAIN);
633 static int snd_emu10k1_cardbus_init(struct snd_emu10k1 *emu)
635 unsigned long special_port;
638 /* Special initialisation routine
639 * before the rest of the IO-Ports become active.
641 special_port = emu->port + 0x38;
642 value = inl(special_port);
643 outl(0x00d00000, special_port);
644 value = inl(special_port);
645 outl(0x00d00001, special_port);
646 value = inl(special_port);
647 outl(0x00d0005f, special_port);
648 value = inl(special_port);
649 outl(0x00d0007f, special_port);
650 value = inl(special_port);
651 outl(0x0090007f, special_port);
652 value = inl(special_port);
654 snd_emu10k1_ptr20_write(emu, TINA2_VOLUME, 0, 0xfefefefe); /* Defaults to 0x30303030 */
655 /* Delay to give time for ADC chip to switch on. It needs 113ms */
660 static int snd_emu1010_load_firmware(struct snd_emu10k1 *emu,
661 const struct firmware *fw_entry)
666 unsigned int write_post;
672 /* The FPGA is a Xilinx Spartan IIE XC2S50E */
673 /* GPIO7 -> FPGA PGMN
676 * FPGA CONFIG OFF -> FPGA PGMN
678 spin_lock_irqsave(&emu->emu_lock, flags);
679 outl(0x00, emu->port + A_IOCFG); /* Set PGMN low for 1uS. */
680 write_post = inl(emu->port + A_IOCFG);
682 outl(0x80, emu->port + A_IOCFG); /* Leave bit 7 set during netlist setup. */
683 write_post = inl(emu->port + A_IOCFG);
684 udelay(100); /* Allow FPGA memory to clean */
685 for (n = 0; n < fw_entry->size; n++) {
686 value = fw_entry->data[n];
687 for (i = 0; i < 8; i++) {
692 outl(reg, emu->port + A_IOCFG);
693 write_post = inl(emu->port + A_IOCFG);
694 outl(reg | 0x40, emu->port + A_IOCFG);
695 write_post = inl(emu->port + A_IOCFG);
698 /* After programming, set GPIO bit 4 high again. */
699 outl(0x10, emu->port + A_IOCFG);
700 write_post = inl(emu->port + A_IOCFG);
701 spin_unlock_irqrestore(&emu->emu_lock, flags);
706 static int emu1010_firmware_thread(void *data)
708 struct snd_emu10k1 *emu = data;
714 /* Delay to allow Audio Dock to settle */
715 msleep_interruptible(1000);
716 if (kthread_should_stop())
718 #ifdef CONFIG_PM_SLEEP
722 snd_emu1010_fpga_read(emu, EMU_HANA_IRQ_STATUS, &tmp); /* IRQ Status */
723 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, ®); /* OPTIONS: Which cards are attached to the EMU */
724 if (reg & EMU_HANA_OPTION_DOCK_OFFLINE) {
725 /* Audio Dock attached */
726 /* Return to Audio Dock programming mode */
727 dev_info(emu->card->dev,
728 "emu1010: Loading Audio Dock Firmware\n");
729 snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, EMU_HANA_FPGA_CONFIG_AUDIODOCK);
732 const char *filename = NULL;
733 switch (emu->card_capabilities->emu_model) {
734 case EMU_MODEL_EMU1010:
735 filename = DOCK_FILENAME;
737 case EMU_MODEL_EMU1010B:
738 filename = MICRO_DOCK_FILENAME;
740 case EMU_MODEL_EMU1616:
741 filename = MICRO_DOCK_FILENAME;
745 err = reject_firmware(&emu->dock_fw,
754 err = snd_emu1010_load_firmware(emu, emu->dock_fw);
759 snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, 0);
760 snd_emu1010_fpga_read(emu, EMU_HANA_IRQ_STATUS, ®);
761 dev_info(emu->card->dev,
762 "emu1010: EMU_HANA+DOCK_IRQ_STATUS = 0x%x\n",
764 /* ID, should read & 0x7f = 0x55 when FPGA programmed. */
765 snd_emu1010_fpga_read(emu, EMU_HANA_ID, ®);
766 dev_info(emu->card->dev,
767 "emu1010: EMU_HANA+DOCK_ID = 0x%x\n", reg);
768 if ((reg & 0x1f) != 0x15) {
769 /* FPGA failed to be programmed */
770 dev_info(emu->card->dev,
771 "emu1010: Loading Audio Dock Firmware file failed, reg = 0x%x\n",
775 dev_info(emu->card->dev,
776 "emu1010: Audio Dock Firmware loaded\n");
777 snd_emu1010_fpga_read(emu, EMU_DOCK_MAJOR_REV, &tmp);
778 snd_emu1010_fpga_read(emu, EMU_DOCK_MINOR_REV, &tmp2);
779 dev_info(emu->card->dev, "Audio Dock ver: %u.%u\n",
781 /* Sync clocking between 1010 and Dock */
782 /* Allow DLL to settle */
784 /* Unmute all. Default is muted after a firmware load */
785 snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, EMU_UNMUTE);
786 } else if (!reg && last_reg) {
787 /* Audio Dock removed */
788 dev_info(emu->card->dev,
789 "emu1010: Audio Dock detached\n");
791 snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, EMU_UNMUTE);
796 dev_info(emu->card->dev, "emu1010: firmware thread stopping\n");
801 * EMU-1010 - details found out from this driver, official MS Win drivers,
804 * Audigy2 (aka Alice2):
805 * ---------------------
806 * * communication over PCI
807 * * conversion of 32-bit data coming over EMU32 links from HANA FPGA
808 * to 2 x 16-bit, using internal DSP instructions
809 * * slave mode, clock supplied by HANA
810 * * linked to HANA using:
811 * 32 x 32-bit serial EMU32 output channels
812 * 16 x EMU32 input channels
813 * (?) x I2S I/O channels (?)
817 * * provides all (?) physical inputs and outputs of the card
818 * (ADC, DAC, SPDIF I/O, ADAT I/O, etc.)
819 * * provides clock signal for the card and Alice2
820 * * two crystals - for 44.1kHz and 48kHz multiples
821 * * provides internal routing of signal sources to signal destinations
822 * * inputs/outputs to Alice2 - see above
824 * Current status of the driver:
825 * ----------------------------
826 * * only 44.1/48kHz supported (the MS Win driver supports up to 192 kHz)
827 * * PCM device nb. 2:
828 * 16 x 16-bit playback - snd_emu10k1_fx8010_playback_ops
829 * 16 x 32-bit capture - snd_emu10k1_capture_efx_ops
831 static int snd_emu10k1_emu1010_init(struct snd_emu10k1 *emu)
837 dev_info(emu->card->dev, "emu1010: Special config.\n");
838 /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave,
839 * Lock Sound Memory Cache, Lock Tank Memory Cache,
842 outl(0x0005a00c, emu->port + HCFG);
843 /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave,
844 * Lock Tank Memory Cache,
847 outl(0x0005a004, emu->port + HCFG);
848 /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave,
851 outl(0x0005a000, emu->port + HCFG);
852 /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave,
855 outl(0x0005a000, emu->port + HCFG);
857 /* Disable 48Volt power to Audio Dock */
858 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, 0);
860 /* ID, should read & 0x7f = 0x55. (Bit 7 is the IRQ bit) */
861 snd_emu1010_fpga_read(emu, EMU_HANA_ID, ®);
862 dev_dbg(emu->card->dev, "reg1 = 0x%x\n", reg);
863 if ((reg & 0x3f) == 0x15) {
864 /* FPGA netlist already present so clear it */
865 /* Return to programming mode */
867 snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, 0x02);
869 snd_emu1010_fpga_read(emu, EMU_HANA_ID, ®);
870 dev_dbg(emu->card->dev, "reg2 = 0x%x\n", reg);
871 if ((reg & 0x3f) == 0x15) {
872 /* FPGA failed to return to programming mode */
873 dev_info(emu->card->dev,
874 "emu1010: FPGA failed to return to programming mode\n");
877 dev_info(emu->card->dev, "emu1010: EMU_HANA_ID = 0x%x\n", reg);
879 if (!emu->firmware) {
880 const char *filename;
881 switch (emu->card_capabilities->emu_model) {
882 case EMU_MODEL_EMU1010:
883 filename = HANA_FILENAME;
885 case EMU_MODEL_EMU1010B:
886 filename = EMU1010B_FILENAME;
888 case EMU_MODEL_EMU1616:
889 filename = EMU1010_NOTEBOOK_FILENAME;
891 case EMU_MODEL_EMU0404:
892 filename = EMU0404_FILENAME;
898 err = reject_firmware(&emu->firmware, filename, &emu->pci->dev);
900 dev_info(emu->card->dev,
901 "emu1010: firmware: %s not found. Err = %d\n",
905 dev_info(emu->card->dev,
906 "emu1010: firmware file = %s, size = 0x%zx\n",
907 filename, emu->firmware->size);
910 err = snd_emu1010_load_firmware(emu, emu->firmware);
912 dev_info(emu->card->dev, "emu1010: Loading Firmware failed\n");
916 /* ID, should read & 0x7f = 0x55 when FPGA programmed. */
917 snd_emu1010_fpga_read(emu, EMU_HANA_ID, ®);
918 if ((reg & 0x3f) != 0x15) {
919 /* FPGA failed to be programmed */
920 dev_info(emu->card->dev,
921 "emu1010: Loading Hana Firmware file failed, reg = 0x%x\n",
926 dev_info(emu->card->dev, "emu1010: Hana Firmware loaded\n");
927 snd_emu1010_fpga_read(emu, EMU_HANA_MAJOR_REV, &tmp);
928 snd_emu1010_fpga_read(emu, EMU_HANA_MINOR_REV, &tmp2);
929 dev_info(emu->card->dev, "emu1010: Hana version: %u.%u\n", tmp, tmp2);
930 /* Enable 48Volt power to Audio Dock */
931 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, EMU_HANA_DOCK_PWR_ON);
933 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, ®);
934 dev_info(emu->card->dev, "emu1010: Card options = 0x%x\n", reg);
935 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, ®);
936 dev_info(emu->card->dev, "emu1010: Card options = 0x%x\n", reg);
937 snd_emu1010_fpga_read(emu, EMU_HANA_OPTICAL_TYPE, &tmp);
938 /* Optical -> ADAT I/O */
942 emu->emu1010.optical_in = 1; /* IN_ADAT */
943 emu->emu1010.optical_out = 1; /* IN_ADAT */
945 tmp = (emu->emu1010.optical_in ? EMU_HANA_OPTICAL_IN_ADAT : 0) |
946 (emu->emu1010.optical_out ? EMU_HANA_OPTICAL_OUT_ADAT : 0);
947 snd_emu1010_fpga_write(emu, EMU_HANA_OPTICAL_TYPE, tmp);
948 snd_emu1010_fpga_read(emu, EMU_HANA_ADC_PADS, &tmp);
949 /* Set no attenuation on Audio Dock pads. */
950 snd_emu1010_fpga_write(emu, EMU_HANA_ADC_PADS, 0x00);
951 emu->emu1010.adc_pads = 0x00;
952 snd_emu1010_fpga_read(emu, EMU_HANA_DOCK_MISC, &tmp);
953 /* Unmute Audio dock DACs, Headphone source DAC-4. */
954 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_MISC, 0x30);
955 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_LEDS_2, 0x12);
956 snd_emu1010_fpga_read(emu, EMU_HANA_DAC_PADS, &tmp);
958 snd_emu1010_fpga_write(emu, EMU_HANA_DAC_PADS, 0x0f);
959 emu->emu1010.dac_pads = 0x0f;
960 snd_emu1010_fpga_read(emu, EMU_HANA_DOCK_MISC, &tmp);
961 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_MISC, 0x30);
962 snd_emu1010_fpga_read(emu, EMU_HANA_SPDIF_MODE, &tmp);
963 /* SPDIF Format. Set Consumer mode, 24bit, copy enable */
964 snd_emu1010_fpga_write(emu, EMU_HANA_SPDIF_MODE, 0x10);
966 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_IN, 0x19);
968 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_OUT, 0x0c);
969 /* IRQ Enable: All on */
970 /* snd_emu1010_fpga_write(emu, 0x09, 0x0f ); */
971 /* IRQ Enable: All off */
972 snd_emu1010_fpga_write(emu, EMU_HANA_IRQ_ENABLE, 0x00);
974 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, ®);
975 dev_info(emu->card->dev, "emu1010: Card options3 = 0x%x\n", reg);
976 /* Default WCLK set to 48kHz. */
977 snd_emu1010_fpga_write(emu, EMU_HANA_DEFCLOCK, 0x00);
978 /* Word Clock source, Internal 48kHz x1 */
979 snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K);
980 /* snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K | EMU_HANA_WCLOCK_4X); */
981 /* Audio Dock LEDs. */
982 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_LEDS_2, 0x12);
986 snd_emu1010_fpga_link_dst_src_write(emu,
987 EMU_DST_ALICE2_EMU32_0, EMU_SRC_HAMOA_ADC_LEFT1);
988 snd_emu1010_fpga_link_dst_src_write(emu,
989 EMU_DST_ALICE2_EMU32_1, EMU_SRC_HAMOA_ADC_RIGHT1);
990 snd_emu1010_fpga_link_dst_src_write(emu,
991 EMU_DST_ALICE2_EMU32_4, EMU_SRC_HAMOA_ADC_LEFT2);
992 snd_emu1010_fpga_link_dst_src_write(emu,
993 EMU_DST_ALICE2_EMU32_5, EMU_SRC_HAMOA_ADC_RIGHT2);
997 snd_emu1010_fpga_link_dst_src_write(emu,
998 EMU_DST_ALICE2_EMU32_0, EMU_SRC_HAMOA_ADC_LEFT1);
999 snd_emu1010_fpga_link_dst_src_write(emu,
1000 EMU_DST_ALICE2_EMU32_1, EMU_SRC_HAMOA_ADC_RIGHT1);
1001 snd_emu1010_fpga_link_dst_src_write(emu,
1002 EMU_DST_ALICE2_EMU32_2, EMU_SRC_HAMOA_ADC_LEFT2);
1003 snd_emu1010_fpga_link_dst_src_write(emu,
1004 EMU_DST_ALICE2_EMU32_3, EMU_SRC_HAMOA_ADC_RIGHT2);
1005 snd_emu1010_fpga_link_dst_src_write(emu,
1006 EMU_DST_ALICE2_EMU32_4, EMU_SRC_HAMOA_ADC_LEFT3);
1007 snd_emu1010_fpga_link_dst_src_write(emu,
1008 EMU_DST_ALICE2_EMU32_5, EMU_SRC_HAMOA_ADC_RIGHT3);
1009 snd_emu1010_fpga_link_dst_src_write(emu,
1010 EMU_DST_ALICE2_EMU32_6, EMU_SRC_HAMOA_ADC_LEFT4);
1011 snd_emu1010_fpga_link_dst_src_write(emu,
1012 EMU_DST_ALICE2_EMU32_7, EMU_SRC_HAMOA_ADC_RIGHT4);
1016 snd_emu1010_fpga_link_dst_src_write(emu,
1017 EMU_DST_ALICE2_EMU32_0, EMU_SRC_DOCK_MIC_A1);
1018 snd_emu1010_fpga_link_dst_src_write(emu,
1019 EMU_DST_ALICE2_EMU32_1, EMU_SRC_DOCK_MIC_B1);
1020 snd_emu1010_fpga_link_dst_src_write(emu,
1021 EMU_DST_ALICE2_EMU32_2, EMU_SRC_HAMOA_ADC_LEFT2);
1022 snd_emu1010_fpga_link_dst_src_write(emu,
1023 EMU_DST_ALICE2_EMU32_3, EMU_SRC_HAMOA_ADC_LEFT2);
1024 snd_emu1010_fpga_link_dst_src_write(emu,
1025 EMU_DST_ALICE2_EMU32_4, EMU_SRC_DOCK_ADC1_LEFT1);
1026 snd_emu1010_fpga_link_dst_src_write(emu,
1027 EMU_DST_ALICE2_EMU32_5, EMU_SRC_DOCK_ADC1_RIGHT1);
1028 snd_emu1010_fpga_link_dst_src_write(emu,
1029 EMU_DST_ALICE2_EMU32_6, EMU_SRC_DOCK_ADC2_LEFT1);
1030 snd_emu1010_fpga_link_dst_src_write(emu,
1031 EMU_DST_ALICE2_EMU32_7, EMU_SRC_DOCK_ADC2_RIGHT1);
1032 /* Pavel Hofman - setting defaults for 8 more capture channels
1033 * Defaults only, users will set their own values anyways, let's
1037 snd_emu1010_fpga_link_dst_src_write(emu,
1038 EMU_DST_ALICE2_EMU32_8, EMU_SRC_DOCK_MIC_A1);
1039 snd_emu1010_fpga_link_dst_src_write(emu,
1040 EMU_DST_ALICE2_EMU32_9, EMU_SRC_DOCK_MIC_B1);
1041 snd_emu1010_fpga_link_dst_src_write(emu,
1042 EMU_DST_ALICE2_EMU32_A, EMU_SRC_HAMOA_ADC_LEFT2);
1043 snd_emu1010_fpga_link_dst_src_write(emu,
1044 EMU_DST_ALICE2_EMU32_B, EMU_SRC_HAMOA_ADC_LEFT2);
1045 snd_emu1010_fpga_link_dst_src_write(emu,
1046 EMU_DST_ALICE2_EMU32_C, EMU_SRC_DOCK_ADC1_LEFT1);
1047 snd_emu1010_fpga_link_dst_src_write(emu,
1048 EMU_DST_ALICE2_EMU32_D, EMU_SRC_DOCK_ADC1_RIGHT1);
1049 snd_emu1010_fpga_link_dst_src_write(emu,
1050 EMU_DST_ALICE2_EMU32_E, EMU_SRC_DOCK_ADC2_LEFT1);
1051 snd_emu1010_fpga_link_dst_src_write(emu,
1052 EMU_DST_ALICE2_EMU32_F, EMU_SRC_DOCK_ADC2_RIGHT1);
1056 snd_emu1010_fpga_link_dst_src_write(emu,
1057 EMU_DST_ALICE2_EMU32_4, EMU_SRC_HANA_ADAT);
1058 snd_emu1010_fpga_link_dst_src_write(emu,
1059 EMU_DST_ALICE2_EMU32_5, EMU_SRC_HANA_ADAT + 1);
1060 snd_emu1010_fpga_link_dst_src_write(emu,
1061 EMU_DST_ALICE2_EMU32_6, EMU_SRC_HANA_ADAT + 2);
1062 snd_emu1010_fpga_link_dst_src_write(emu,
1063 EMU_DST_ALICE2_EMU32_7, EMU_SRC_HANA_ADAT + 3);
1064 snd_emu1010_fpga_link_dst_src_write(emu,
1065 EMU_DST_ALICE2_EMU32_8, EMU_SRC_HANA_ADAT + 4);
1066 snd_emu1010_fpga_link_dst_src_write(emu,
1067 EMU_DST_ALICE2_EMU32_9, EMU_SRC_HANA_ADAT + 5);
1068 snd_emu1010_fpga_link_dst_src_write(emu,
1069 EMU_DST_ALICE2_EMU32_A, EMU_SRC_HANA_ADAT + 6);
1070 snd_emu1010_fpga_link_dst_src_write(emu,
1071 EMU_DST_ALICE2_EMU32_B, EMU_SRC_HANA_ADAT + 7);
1072 snd_emu1010_fpga_link_dst_src_write(emu,
1073 EMU_DST_ALICE2_EMU32_C, EMU_SRC_DOCK_MIC_A1);
1074 snd_emu1010_fpga_link_dst_src_write(emu,
1075 EMU_DST_ALICE2_EMU32_D, EMU_SRC_DOCK_MIC_B1);
1076 snd_emu1010_fpga_link_dst_src_write(emu,
1077 EMU_DST_ALICE2_EMU32_E, EMU_SRC_HAMOA_ADC_LEFT2);
1078 snd_emu1010_fpga_link_dst_src_write(emu,
1079 EMU_DST_ALICE2_EMU32_F, EMU_SRC_HAMOA_ADC_LEFT2);
1081 for (i = 0; i < 0x20; i++) {
1082 /* AudioDock Elink <- Silence */
1083 snd_emu1010_fpga_link_dst_src_write(emu, 0x0100 + i, EMU_SRC_SILENCE);
1085 for (i = 0; i < 4; i++) {
1086 /* Hana SPDIF Out <- Silence */
1087 snd_emu1010_fpga_link_dst_src_write(emu, 0x0200 + i, EMU_SRC_SILENCE);
1089 for (i = 0; i < 7; i++) {
1090 /* Hamoa DAC <- Silence */
1091 snd_emu1010_fpga_link_dst_src_write(emu, 0x0300 + i, EMU_SRC_SILENCE);
1093 for (i = 0; i < 7; i++) {
1094 /* Hana ADAT Out <- Silence */
1095 snd_emu1010_fpga_link_dst_src_write(emu, EMU_DST_HANA_ADAT + i, EMU_SRC_SILENCE);
1097 snd_emu1010_fpga_link_dst_src_write(emu,
1098 EMU_DST_ALICE_I2S0_LEFT, EMU_SRC_DOCK_ADC1_LEFT1);
1099 snd_emu1010_fpga_link_dst_src_write(emu,
1100 EMU_DST_ALICE_I2S0_RIGHT, EMU_SRC_DOCK_ADC1_RIGHT1);
1101 snd_emu1010_fpga_link_dst_src_write(emu,
1102 EMU_DST_ALICE_I2S1_LEFT, EMU_SRC_DOCK_ADC2_LEFT1);
1103 snd_emu1010_fpga_link_dst_src_write(emu,
1104 EMU_DST_ALICE_I2S1_RIGHT, EMU_SRC_DOCK_ADC2_RIGHT1);
1105 snd_emu1010_fpga_link_dst_src_write(emu,
1106 EMU_DST_ALICE_I2S2_LEFT, EMU_SRC_DOCK_ADC3_LEFT1);
1107 snd_emu1010_fpga_link_dst_src_write(emu,
1108 EMU_DST_ALICE_I2S2_RIGHT, EMU_SRC_DOCK_ADC3_RIGHT1);
1109 snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, 0x01); /* Unmute all */
1111 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &tmp);
1113 /* AC97 1.03, Any 32Meg of 2Gig address, Auto-Mute, EMU32 Slave,
1114 * Lock Sound Memory Cache, Lock Tank Memory Cache,
1117 outl(0x0000a000, emu->port + HCFG);
1118 /* AC97 1.03, Any 32Meg of 2Gig address, Auto-Mute, EMU32 Slave,
1119 * Lock Sound Memory Cache, Lock Tank Memory Cache,
1120 * Un-Mute all codecs.
1122 outl(0x0000a001, emu->port + HCFG);
1124 /* Initial boot complete. Now patches */
1126 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &tmp);
1127 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_IN, 0x19); /* MIDI Route */
1128 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_OUT, 0x0c); /* Unknown */
1129 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_IN, 0x19); /* MIDI Route */
1130 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_OUT, 0x0c); /* Unknown */
1131 snd_emu1010_fpga_read(emu, EMU_HANA_SPDIF_MODE, &tmp);
1132 snd_emu1010_fpga_write(emu, EMU_HANA_SPDIF_MODE, 0x10); /* SPDIF Format spdif (or 0x11 for aes/ebu) */
1134 /* Start Micro/Audio Dock firmware loader thread */
1135 if (!emu->emu1010.firmware_thread) {
1136 emu->emu1010.firmware_thread =
1137 kthread_create(emu1010_firmware_thread, emu,
1138 "emu1010_firmware");
1139 if (IS_ERR(emu->emu1010.firmware_thread)) {
1140 err = PTR_ERR(emu->emu1010.firmware_thread);
1141 emu->emu1010.firmware_thread = NULL;
1142 dev_info(emu->card->dev,
1143 "emu1010: Creating thread failed\n");
1147 wake_up_process(emu->emu1010.firmware_thread);
1151 snd_emu1010_fpga_link_dst_src_write(emu,
1152 EMU_DST_HAMOA_DAC_LEFT1, EMU_SRC_ALICE_EMU32B + 2); /* ALICE2 bus 0xa2 */
1153 snd_emu1010_fpga_link_dst_src_write(emu,
1154 EMU_DST_HAMOA_DAC_RIGHT1, EMU_SRC_ALICE_EMU32B + 3); /* ALICE2 bus 0xa3 */
1155 snd_emu1010_fpga_link_dst_src_write(emu,
1156 EMU_DST_HANA_SPDIF_LEFT1, EMU_SRC_ALICE_EMU32A + 2); /* ALICE2 bus 0xb2 */
1157 snd_emu1010_fpga_link_dst_src_write(emu,
1158 EMU_DST_HANA_SPDIF_RIGHT1, EMU_SRC_ALICE_EMU32A + 3); /* ALICE2 bus 0xb3 */
1160 /* Default outputs */
1161 if (emu->card_capabilities->emu_model == EMU_MODEL_EMU1616) {
1162 /* 1616(M) cardbus default outputs */
1163 /* ALICE2 bus 0xa0 */
1164 snd_emu1010_fpga_link_dst_src_write(emu,
1165 EMU_DST_DOCK_DAC1_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1166 emu->emu1010.output_source[0] = 17;
1167 snd_emu1010_fpga_link_dst_src_write(emu,
1168 EMU_DST_DOCK_DAC1_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1169 emu->emu1010.output_source[1] = 18;
1170 snd_emu1010_fpga_link_dst_src_write(emu,
1171 EMU_DST_DOCK_DAC2_LEFT1, EMU_SRC_ALICE_EMU32A + 2);
1172 emu->emu1010.output_source[2] = 19;
1173 snd_emu1010_fpga_link_dst_src_write(emu,
1174 EMU_DST_DOCK_DAC2_RIGHT1, EMU_SRC_ALICE_EMU32A + 3);
1175 emu->emu1010.output_source[3] = 20;
1176 snd_emu1010_fpga_link_dst_src_write(emu,
1177 EMU_DST_DOCK_DAC3_LEFT1, EMU_SRC_ALICE_EMU32A + 4);
1178 emu->emu1010.output_source[4] = 21;
1179 snd_emu1010_fpga_link_dst_src_write(emu,
1180 EMU_DST_DOCK_DAC3_RIGHT1, EMU_SRC_ALICE_EMU32A + 5);
1181 emu->emu1010.output_source[5] = 22;
1182 /* ALICE2 bus 0xa0 */
1183 snd_emu1010_fpga_link_dst_src_write(emu,
1184 EMU_DST_MANA_DAC_LEFT, EMU_SRC_ALICE_EMU32A + 0);
1185 emu->emu1010.output_source[16] = 17;
1186 snd_emu1010_fpga_link_dst_src_write(emu,
1187 EMU_DST_MANA_DAC_RIGHT, EMU_SRC_ALICE_EMU32A + 1);
1188 emu->emu1010.output_source[17] = 18;
1190 /* ALICE2 bus 0xa0 */
1191 snd_emu1010_fpga_link_dst_src_write(emu,
1192 EMU_DST_DOCK_DAC1_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1193 emu->emu1010.output_source[0] = 21;
1194 snd_emu1010_fpga_link_dst_src_write(emu,
1195 EMU_DST_DOCK_DAC1_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1196 emu->emu1010.output_source[1] = 22;
1197 snd_emu1010_fpga_link_dst_src_write(emu,
1198 EMU_DST_DOCK_DAC2_LEFT1, EMU_SRC_ALICE_EMU32A + 2);
1199 emu->emu1010.output_source[2] = 23;
1200 snd_emu1010_fpga_link_dst_src_write(emu,
1201 EMU_DST_DOCK_DAC2_RIGHT1, EMU_SRC_ALICE_EMU32A + 3);
1202 emu->emu1010.output_source[3] = 24;
1203 snd_emu1010_fpga_link_dst_src_write(emu,
1204 EMU_DST_DOCK_DAC3_LEFT1, EMU_SRC_ALICE_EMU32A + 4);
1205 emu->emu1010.output_source[4] = 25;
1206 snd_emu1010_fpga_link_dst_src_write(emu,
1207 EMU_DST_DOCK_DAC3_RIGHT1, EMU_SRC_ALICE_EMU32A + 5);
1208 emu->emu1010.output_source[5] = 26;
1209 snd_emu1010_fpga_link_dst_src_write(emu,
1210 EMU_DST_DOCK_DAC4_LEFT1, EMU_SRC_ALICE_EMU32A + 6);
1211 emu->emu1010.output_source[6] = 27;
1212 snd_emu1010_fpga_link_dst_src_write(emu,
1213 EMU_DST_DOCK_DAC4_RIGHT1, EMU_SRC_ALICE_EMU32A + 7);
1214 emu->emu1010.output_source[7] = 28;
1215 /* ALICE2 bus 0xa0 */
1216 snd_emu1010_fpga_link_dst_src_write(emu,
1217 EMU_DST_DOCK_PHONES_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1218 emu->emu1010.output_source[8] = 21;
1219 snd_emu1010_fpga_link_dst_src_write(emu,
1220 EMU_DST_DOCK_PHONES_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1221 emu->emu1010.output_source[9] = 22;
1222 /* ALICE2 bus 0xa0 */
1223 snd_emu1010_fpga_link_dst_src_write(emu,
1224 EMU_DST_DOCK_SPDIF_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1225 emu->emu1010.output_source[10] = 21;
1226 snd_emu1010_fpga_link_dst_src_write(emu,
1227 EMU_DST_DOCK_SPDIF_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1228 emu->emu1010.output_source[11] = 22;
1229 /* ALICE2 bus 0xa0 */
1230 snd_emu1010_fpga_link_dst_src_write(emu,
1231 EMU_DST_HANA_SPDIF_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1232 emu->emu1010.output_source[12] = 21;
1233 snd_emu1010_fpga_link_dst_src_write(emu,
1234 EMU_DST_HANA_SPDIF_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1235 emu->emu1010.output_source[13] = 22;
1236 /* ALICE2 bus 0xa0 */
1237 snd_emu1010_fpga_link_dst_src_write(emu,
1238 EMU_DST_HAMOA_DAC_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1239 emu->emu1010.output_source[14] = 21;
1240 snd_emu1010_fpga_link_dst_src_write(emu,
1241 EMU_DST_HAMOA_DAC_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1242 emu->emu1010.output_source[15] = 22;
1243 /* ALICE2 bus 0xa0 */
1244 snd_emu1010_fpga_link_dst_src_write(emu,
1245 EMU_DST_HANA_ADAT, EMU_SRC_ALICE_EMU32A + 0);
1246 emu->emu1010.output_source[16] = 21;
1247 snd_emu1010_fpga_link_dst_src_write(emu,
1248 EMU_DST_HANA_ADAT + 1, EMU_SRC_ALICE_EMU32A + 1);
1249 emu->emu1010.output_source[17] = 22;
1250 snd_emu1010_fpga_link_dst_src_write(emu,
1251 EMU_DST_HANA_ADAT + 2, EMU_SRC_ALICE_EMU32A + 2);
1252 emu->emu1010.output_source[18] = 23;
1253 snd_emu1010_fpga_link_dst_src_write(emu,
1254 EMU_DST_HANA_ADAT + 3, EMU_SRC_ALICE_EMU32A + 3);
1255 emu->emu1010.output_source[19] = 24;
1256 snd_emu1010_fpga_link_dst_src_write(emu,
1257 EMU_DST_HANA_ADAT + 4, EMU_SRC_ALICE_EMU32A + 4);
1258 emu->emu1010.output_source[20] = 25;
1259 snd_emu1010_fpga_link_dst_src_write(emu,
1260 EMU_DST_HANA_ADAT + 5, EMU_SRC_ALICE_EMU32A + 5);
1261 emu->emu1010.output_source[21] = 26;
1262 snd_emu1010_fpga_link_dst_src_write(emu,
1263 EMU_DST_HANA_ADAT + 6, EMU_SRC_ALICE_EMU32A + 6);
1264 emu->emu1010.output_source[22] = 27;
1265 snd_emu1010_fpga_link_dst_src_write(emu,
1266 EMU_DST_HANA_ADAT + 7, EMU_SRC_ALICE_EMU32A + 7);
1267 emu->emu1010.output_source[23] = 28;
1269 /* TEMP: Select SPDIF in/out */
1270 /* snd_emu1010_fpga_write(emu, EMU_HANA_OPTICAL_TYPE, 0x0); */ /* Output spdif */
1272 /* TEMP: Select 48kHz SPDIF out */
1273 snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, 0x0); /* Mute all */
1274 snd_emu1010_fpga_write(emu, EMU_HANA_DEFCLOCK, 0x0); /* Default fallback clock 48kHz */
1275 /* Word Clock source, Internal 48kHz x1 */
1276 snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K);
1277 /* snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K | EMU_HANA_WCLOCK_4X); */
1278 emu->emu1010.internal_clock = 1; /* 48000 */
1279 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_LEDS_2, 0x12); /* Set LEDs on Audio Dock */
1280 snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, 0x1); /* Unmute all */
1281 /* snd_emu1010_fpga_write(emu, 0x7, 0x0); */ /* Mute all */
1282 /* snd_emu1010_fpga_write(emu, 0x7, 0x1); */ /* Unmute all */
1283 /* snd_emu1010_fpga_write(emu, 0xe, 0x12); */ /* Set LEDs on Audio Dock */
1288 * Create the EMU10K1 instance
1291 #ifdef CONFIG_PM_SLEEP
1292 static int alloc_pm_buffer(struct snd_emu10k1 *emu);
1293 static void free_pm_buffer(struct snd_emu10k1 *emu);
1296 static int snd_emu10k1_free(struct snd_emu10k1 *emu)
1298 if (emu->port) { /* avoid access to already used hardware */
1299 snd_emu10k1_fx8010_tram_setup(emu, 0);
1300 snd_emu10k1_done(emu);
1301 snd_emu10k1_free_efx(emu);
1303 if (emu->card_capabilities->emu_model == EMU_MODEL_EMU1010) {
1304 /* Disable 48Volt power to Audio Dock */
1305 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, 0);
1307 if (emu->emu1010.firmware_thread)
1308 kthread_stop(emu->emu1010.firmware_thread);
1309 release_firmware(emu->firmware);
1310 release_firmware(emu->dock_fw);
1312 free_irq(emu->irq, emu);
1313 /* remove reserved page */
1314 if (emu->reserved_page) {
1315 snd_emu10k1_synth_free(emu,
1316 (struct snd_util_memblk *)emu->reserved_page);
1317 emu->reserved_page = NULL;
1319 snd_util_memhdr_free(emu->memhdr);
1320 if (emu->silent_page.area)
1321 snd_dma_free_pages(&emu->silent_page);
1322 if (emu->ptb_pages.area)
1323 snd_dma_free_pages(&emu->ptb_pages);
1324 vfree(emu->page_ptr_table);
1325 vfree(emu->page_addr_table);
1326 #ifdef CONFIG_PM_SLEEP
1327 free_pm_buffer(emu);
1330 pci_release_regions(emu->pci);
1331 if (emu->card_capabilities->ca0151_chip) /* P16V */
1333 pci_disable_device(emu->pci);
1338 static int snd_emu10k1_dev_free(struct snd_device *device)
1340 struct snd_emu10k1 *emu = device->device_data;
1341 return snd_emu10k1_free(emu);
1344 static struct snd_emu_chip_details emu_chip_details[] = {
1345 /* Audigy 5/Rx SB1550 */
1346 /* Tested by michael@gernoth.net 28 Mar 2015 */
1347 /* DSP: CA10300-IAT LF
1348 * DAC: Cirrus Logic CS4382-KQZ
1349 * ADC: Philips 1361T
1350 * AC97: Sigmatel STAC9750
1353 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10241102,
1354 .driver = "Audigy2", .name = "SB Audigy 5/Rx [SB1550]",
1359 .adc_1361t = 1, /* 24 bit capture instead of 16bit */
1361 /* Audigy4 (Not PRO) SB0610 */
1362 /* Tested by James@superbug.co.uk 4th April 2006 */
1368 * 3: 0 - Digital Out, 1 - Line in
1376 * A: Green jack sense (Front)
1378 * C: Black jack sense (Rear/Side Right)
1379 * D: Yellow jack sense (Center/LFE/Side Left)
1383 * Digital Out/Line in switch using A_IOCFG bit 3 (0x08)
1387 /* Mic input not tested.
1388 * Analog CD input not tested
1389 * Digital Out not tested.
1391 * Audio output 5.1 working. Side outputs not working.
1393 /* DSP: CA10300-IAT LF
1394 * DAC: Cirrus Logic CS4382-KQZ
1395 * ADC: Philips 1361T
1396 * AC97: Sigmatel STAC9750
1399 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10211102,
1400 .driver = "Audigy2", .name = "SB Audigy 4 [SB0610]",
1405 .adc_1361t = 1, /* 24 bit capture instead of 16bit */
1407 /* Audigy 2 Value AC3 out does not work yet.
1408 * Need to find out how to turn off interpolators.
1410 /* Tested by James@superbug.co.uk 3rd July 2005 */
1413 * ADC: Philips 1361T
1417 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10011102,
1418 .driver = "Audigy2", .name = "SB Audigy 2 Value [SB0400]",
1424 /* Audigy 2 ZS Notebook Cardbus card.*/
1425 /* Tested by James@superbug.co.uk 6th November 2006 */
1426 /* Audio output 7.1/Headphones working.
1427 * Digital output working. (AC3 not checked, only PCM)
1428 * Audio Mic/Line inputs working.
1429 * Digital input not tested.
1432 * DAC: Wolfson WM8768/WM8568
1433 * ADC: Wolfson WM8775
1437 /* Tested by James@superbug.co.uk 4th April 2006 */
1441 * 1: 0 = Mute all the 7.1 channel out. 1 = unmute.
1442 * 2: Analog input 0 = line in, 1 = mic in
1444 * 4: Digital output 0 = off, 1 = on.
1449 * All bits 1 (0x3fxx) means nothing plugged in.
1450 * 8-9: 0 = Line in/Mic, 2 = Optical in, 3 = Nothing.
1451 * A-B: 0 = Headphones, 2 = Optical out, 3 = Nothing.
1452 * C-D: 2 = Front/Rear/etc, 3 = nothing.
1456 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x20011102,
1457 .driver = "Audigy2", .name = "Audigy 2 ZS Notebook [SB0530]",
1461 .ca_cardbus_chip = 1,
1465 /* Tested by James@superbug.co.uk 4th Nov 2007. */
1466 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x42011102,
1467 .driver = "Audigy2", .name = "E-mu 1010 Notebook [MAEM8950]",
1471 .ca_cardbus_chip = 1,
1473 .emu_model = EMU_MODEL_EMU1616},
1474 /* Tested by James@superbug.co.uk 4th Nov 2007. */
1475 /* This is MAEM8960, 0202 is MAEM 8980 */
1476 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40041102,
1477 .driver = "Audigy2", .name = "E-mu 1010b PCI [MAEM8960]",
1482 .emu_model = EMU_MODEL_EMU1010B}, /* EMU 1010 new revision */
1483 /* Tested by Maxim Kachur <mcdebugger@duganet.ru> 17th Oct 2012. */
1484 /* This is MAEM8986, 0202 is MAEM8980 */
1485 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40071102,
1486 .driver = "Audigy2", .name = "E-mu 1010 PCIe [MAEM8986]",
1491 .emu_model = EMU_MODEL_EMU1010B}, /* EMU 1010 PCIe */
1492 /* Tested by James@superbug.co.uk 8th July 2005. */
1493 /* This is MAEM8810, 0202 is MAEM8820 */
1494 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x40011102,
1495 .driver = "Audigy2", .name = "E-mu 1010 [MAEM8810]",
1500 .emu_model = EMU_MODEL_EMU1010}, /* EMU 1010 old revision */
1502 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40021102,
1503 .driver = "Audigy2", .name = "E-mu 0404b PCI [MAEM8852]",
1508 .emu_model = EMU_MODEL_EMU0404}, /* EMU 0404 new revision */
1509 /* Tested by James@superbug.co.uk 20-3-2007. */
1510 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x40021102,
1511 .driver = "Audigy2", .name = "E-mu 0404 [MAEM8850]",
1516 .emu_model = EMU_MODEL_EMU0404}, /* EMU 0404 */
1518 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40051102,
1519 .driver = "Audigy2", .name = "E-mu 0404 PCIe [MAEM8984]",
1524 .emu_model = EMU_MODEL_EMU0404}, /* EMU 0404 PCIe ver_03 */
1525 /* Note that all E-mu cards require kernel 2.6 or newer. */
1526 {.vendor = 0x1102, .device = 0x0008,
1527 .driver = "Audigy2", .name = "SB Audigy 2 Value [Unknown]",
1532 /* Tested by James@superbug.co.uk 3rd July 2005 */
1533 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20071102,
1534 .driver = "Audigy2", .name = "SB Audigy 4 PRO [SB0380]",
1542 /* Tested by shane-alsa@cm.nu 5th Nov 2005 */
1543 /* The 0x20061102 does have SB0350 written on it
1544 * Just like 0x20021102
1546 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20061102,
1547 .driver = "Audigy2", .name = "SB Audigy 2 [SB0350b]",
1554 .invert_shared_spdif = 1, /* digital/analog switch swapped */
1556 /* 0x20051102 also has SB0350 written on it, treated as Audigy 2 ZS by
1557 Creative's Windows driver */
1558 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20051102,
1559 .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0350a]",
1566 .invert_shared_spdif = 1, /* digital/analog switch swapped */
1568 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20021102,
1569 .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0350]",
1576 .invert_shared_spdif = 1, /* digital/analog switch swapped */
1578 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20011102,
1579 .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0360]",
1586 .invert_shared_spdif = 1, /* digital/analog switch swapped */
1589 /* Tested by James@superbug.co.uk 3rd July 2005 */
1592 * ADC: Philips 1361T
1596 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10071102,
1597 .driver = "Audigy2", .name = "SB Audigy 2 [SB0240]",
1604 .adc_1361t = 1, /* 24 bit capture instead of 16bit */
1606 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10051102,
1607 .driver = "Audigy2", .name = "Audigy 2 Platinum EX [SB0280]",
1614 /* Dell OEM/Creative Labs Audigy 2 ZS */
1615 /* See ALSA bug#1365 */
1616 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10031102,
1617 .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0353]",
1624 .invert_shared_spdif = 1, /* digital/analog switch swapped */
1626 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10021102,
1627 .driver = "Audigy2", .name = "SB Audigy 2 Platinum [SB0240P]",
1634 .invert_shared_spdif = 1, /* digital/analog switch swapped */
1635 .adc_1361t = 1, /* 24 bit capture instead of 16bit. Fixes ALSA bug#324 */
1637 {.vendor = 0x1102, .device = 0x0004, .revision = 0x04,
1638 .driver = "Audigy2", .name = "SB Audigy 2 [Unknown]",
1645 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00531102,
1646 .driver = "Audigy", .name = "SB Audigy 1 [SB0092]",
1651 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00521102,
1652 .driver = "Audigy", .name = "SB Audigy 1 ES [SB0160]",
1658 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00511102,
1659 .driver = "Audigy", .name = "SB Audigy 1 [SB0090]",
1664 {.vendor = 0x1102, .device = 0x0004,
1665 .driver = "Audigy", .name = "Audigy 1 [Unknown]",
1670 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x100a1102,
1671 .driver = "EMU10K1", .name = "SB Live! 5.1 [SB0220]",
1676 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x806b1102,
1677 .driver = "EMU10K1", .name = "SB Live! [SB0105]",
1682 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x806a1102,
1683 .driver = "EMU10K1", .name = "SB Live! Value [SB0103]",
1688 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80691102,
1689 .driver = "EMU10K1", .name = "SB Live! Value [SB0101]",
1694 /* Tested by ALSA bug#1680 26th December 2005 */
1695 /* note: It really has SB0220 written on the card, */
1696 /* but it's SB0228 according to kx.inf */
1697 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80661102,
1698 .driver = "EMU10K1", .name = "SB Live! 5.1 Dell OEM [SB0228]",
1703 /* Tested by Thomas Zehetbauer 27th Aug 2005 */
1704 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80651102,
1705 .driver = "EMU10K1", .name = "SB Live! 5.1 [SB0220]",
1710 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80641102,
1711 .driver = "EMU10K1", .name = "SB Live! 5.1",
1716 /* Tested by alsa bugtrack user "hus" bug #1297 12th Aug 2005 */
1717 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80611102,
1718 .driver = "EMU10K1", .name = "SB Live! 5.1 [SB0060]",
1721 .ac97_chip = 2, /* ac97 is optional; both SBLive 5.1 and platinum
1722 * share the same IDs!
1725 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80511102,
1726 .driver = "EMU10K1", .name = "SB Live! Value [CT4850]",
1731 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80401102,
1732 .driver = "EMU10K1", .name = "SB Live! Platinum [CT4760P]",
1736 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80321102,
1737 .driver = "EMU10K1", .name = "SB Live! Value [CT4871]",
1742 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80311102,
1743 .driver = "EMU10K1", .name = "SB Live! Value [CT4831]",
1748 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80281102,
1749 .driver = "EMU10K1", .name = "SB Live! Value [CT4870]",
1754 /* Tested by James@superbug.co.uk 3rd July 2005 */
1755 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80271102,
1756 .driver = "EMU10K1", .name = "SB Live! Value [CT4832]",
1761 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80261102,
1762 .driver = "EMU10K1", .name = "SB Live! Value [CT4830]",
1767 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80231102,
1768 .driver = "EMU10K1", .name = "SB PCI512 [CT4790]",
1773 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80221102,
1774 .driver = "EMU10K1", .name = "SB Live! Value [CT4780]",
1779 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x40011102,
1780 .driver = "EMU10K1", .name = "E-mu APS [PC545]",
1784 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x00211102,
1785 .driver = "EMU10K1", .name = "SB Live! [CT4620]",
1790 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x00201102,
1791 .driver = "EMU10K1", .name = "SB Live! Value [CT4670]",
1796 {.vendor = 0x1102, .device = 0x0002,
1797 .driver = "EMU10K1", .name = "SB Live! [Unknown]",
1802 { } /* terminator */
1805 int snd_emu10k1_create(struct snd_card *card,
1806 struct pci_dev *pci,
1807 unsigned short extin_mask,
1808 unsigned short extout_mask,
1809 long max_cache_bytes,
1812 struct snd_emu10k1 **remu)
1814 struct snd_emu10k1 *emu;
1817 unsigned int silent_page;
1818 const struct snd_emu_chip_details *c;
1819 static struct snd_device_ops ops = {
1820 .dev_free = snd_emu10k1_dev_free,
1825 /* enable PCI device */
1826 err = pci_enable_device(pci);
1830 emu = kzalloc(sizeof(*emu), GFP_KERNEL);
1832 pci_disable_device(pci);
1836 spin_lock_init(&emu->reg_lock);
1837 spin_lock_init(&emu->emu_lock);
1838 spin_lock_init(&emu->spi_lock);
1839 spin_lock_init(&emu->i2c_lock);
1840 spin_lock_init(&emu->voice_lock);
1841 spin_lock_init(&emu->synth_lock);
1842 spin_lock_init(&emu->memblk_lock);
1843 mutex_init(&emu->fx8010.lock);
1844 INIT_LIST_HEAD(&emu->mapped_link_head);
1845 INIT_LIST_HEAD(&emu->mapped_order_link_head);
1849 emu->get_synth_voice = NULL;
1850 /* read revision & serial */
1851 emu->revision = pci->revision;
1852 pci_read_config_dword(pci, PCI_SUBSYSTEM_VENDOR_ID, &emu->serial);
1853 pci_read_config_word(pci, PCI_SUBSYSTEM_ID, &emu->model);
1855 "vendor = 0x%x, device = 0x%x, subsystem_vendor_id = 0x%x, subsystem_id = 0x%x\n",
1856 pci->vendor, pci->device, emu->serial, emu->model);
1858 for (c = emu_chip_details; c->vendor; c++) {
1859 if (c->vendor == pci->vendor && c->device == pci->device) {
1861 if (c->subsystem && (c->subsystem == subsystem))
1866 if (c->subsystem && (c->subsystem != emu->serial))
1868 if (c->revision && c->revision != emu->revision)
1874 if (c->vendor == 0) {
1875 dev_err(card->dev, "emu10k1: Card not recognised\n");
1877 pci_disable_device(pci);
1880 emu->card_capabilities = c;
1881 if (c->subsystem && !subsystem)
1882 dev_dbg(card->dev, "Sound card name = %s\n", c->name);
1884 dev_dbg(card->dev, "Sound card name = %s, "
1885 "vendor = 0x%x, device = 0x%x, subsystem = 0x%x. "
1886 "Forced to subsystem = 0x%x\n", c->name,
1887 pci->vendor, pci->device, emu->serial, c->subsystem);
1889 dev_dbg(card->dev, "Sound card name = %s, "
1890 "vendor = 0x%x, device = 0x%x, subsystem = 0x%x.\n",
1891 c->name, pci->vendor, pci->device,
1894 if (!*card->id && c->id) {
1896 strlcpy(card->id, c->id, sizeof(card->id));
1898 for (i = 0; i < snd_ecards_limit; i++) {
1899 if (snd_cards[i] && !strcmp(snd_cards[i]->id, card->id))
1902 if (i >= snd_ecards_limit)
1905 if (n >= SNDRV_CARDS)
1907 snprintf(card->id, sizeof(card->id), "%s_%d", c->id, n);
1911 is_audigy = emu->audigy = c->emu10k2_chip;
1913 /* set addressing mode */
1914 emu->address_mode = is_audigy ? 0 : 1;
1915 /* set the DMA transfer mask */
1916 emu->dma_mask = emu->address_mode ? EMU10K1_DMA_MASK : AUDIGY_DMA_MASK;
1917 if (dma_set_mask(&pci->dev, emu->dma_mask) < 0 ||
1918 dma_set_coherent_mask(&pci->dev, emu->dma_mask) < 0) {
1920 "architecture does not support PCI busmaster DMA with mask 0x%lx\n",
1923 pci_disable_device(pci);
1927 emu->gpr_base = A_FXGPREGBASE;
1929 emu->gpr_base = FXGPREGBASE;
1931 err = pci_request_regions(pci, "EMU10K1");
1934 pci_disable_device(pci);
1937 emu->port = pci_resource_start(pci, 0);
1939 emu->max_cache_pages = max_cache_bytes >> PAGE_SHIFT;
1940 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci),
1941 (emu->address_mode ? 32 : 16) * 1024, &emu->ptb_pages) < 0) {
1946 emu->page_ptr_table = vmalloc(emu->max_cache_pages * sizeof(void *));
1947 emu->page_addr_table = vmalloc(emu->max_cache_pages *
1948 sizeof(unsigned long));
1949 if (emu->page_ptr_table == NULL || emu->page_addr_table == NULL) {
1954 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci),
1955 EMUPAGESIZE, &emu->silent_page) < 0) {
1959 emu->memhdr = snd_util_memhdr_new(emu->max_cache_pages * PAGE_SIZE);
1960 if (emu->memhdr == NULL) {
1964 emu->memhdr->block_extra_size = sizeof(struct snd_emu10k1_memblk) -
1965 sizeof(struct snd_util_memblk);
1967 pci_set_master(pci);
1969 emu->fx8010.fxbus_mask = 0x303f;
1970 if (extin_mask == 0)
1971 extin_mask = 0x3fcf;
1972 if (extout_mask == 0)
1973 extout_mask = 0x7fff;
1974 emu->fx8010.extin_mask = extin_mask;
1975 emu->fx8010.extout_mask = extout_mask;
1976 emu->enable_ir = enable_ir;
1978 if (emu->card_capabilities->ca_cardbus_chip) {
1979 err = snd_emu10k1_cardbus_init(emu);
1983 if (emu->card_capabilities->ecard) {
1984 err = snd_emu10k1_ecard_init(emu);
1987 } else if (emu->card_capabilities->emu_model) {
1988 err = snd_emu10k1_emu1010_init(emu);
1990 snd_emu10k1_free(emu);
1994 /* 5.1: Enable the additional AC97 Slots. If the emu10k1 version
1995 does not support this, it shouldn't do any harm */
1996 snd_emu10k1_ptr_write(emu, AC97SLOT, 0,
1997 AC97SLOT_CNTR|AC97SLOT_LFE);
2000 /* initialize TRAM setup */
2001 emu->fx8010.itram_size = (16 * 1024)/2;
2002 emu->fx8010.etram_pages.area = NULL;
2003 emu->fx8010.etram_pages.bytes = 0;
2005 /* irq handler must be registered after I/O ports are activated */
2006 if (request_irq(pci->irq, snd_emu10k1_interrupt, IRQF_SHARED,
2007 KBUILD_MODNAME, emu)) {
2011 emu->irq = pci->irq;
2014 * Init to 0x02109204 :
2015 * Clock accuracy = 0 (1000ppm)
2016 * Sample Rate = 2 (48kHz)
2017 * Audio Channel = 1 (Left of 2)
2018 * Source Number = 0 (Unspecified)
2019 * Generation Status = 1 (Original for Cat Code 12)
2020 * Cat Code = 12 (Digital Signal Mixer)
2022 * Emphasis = 0 (None)
2023 * CP = 1 (Copyright unasserted)
2024 * AN = 0 (Audio data)
2027 emu->spdif_bits[0] = emu->spdif_bits[1] =
2028 emu->spdif_bits[2] = SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
2029 SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC |
2030 SPCS_GENERATIONSTATUS | 0x00001200 |
2031 0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT;
2033 emu->reserved_page = (struct snd_emu10k1_memblk *)
2034 snd_emu10k1_synth_alloc(emu, 4096);
2035 if (emu->reserved_page)
2036 emu->reserved_page->map_locked = 1;
2038 /* Clear silent pages and set up pointers */
2039 memset(emu->silent_page.area, 0, PAGE_SIZE);
2040 silent_page = emu->silent_page.addr << emu->address_mode;
2041 for (idx = 0; idx < (emu->address_mode ? MAXPAGES1 : MAXPAGES0); idx++)
2042 ((u32 *)emu->ptb_pages.area)[idx] = cpu_to_le32(silent_page | idx);
2044 /* set up voice indices */
2045 for (idx = 0; idx < NUM_G; idx++) {
2046 emu->voices[idx].emu = emu;
2047 emu->voices[idx].number = idx;
2050 err = snd_emu10k1_init(emu, enable_ir, 0);
2053 #ifdef CONFIG_PM_SLEEP
2054 err = alloc_pm_buffer(emu);
2059 /* Initialize the effect engine */
2060 err = snd_emu10k1_init_efx(emu);
2063 snd_emu10k1_audio_enable(emu);
2065 err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, emu, &ops);
2069 #ifdef CONFIG_SND_PROC_FS
2070 snd_emu10k1_proc_init(emu);
2077 snd_emu10k1_free(emu);
2081 #ifdef CONFIG_PM_SLEEP
2082 static unsigned char saved_regs[] = {
2083 CPF, PTRX, CVCF, VTFT, Z1, Z2, PSST, DSL, CCCA, CCR, CLP,
2084 FXRT, MAPA, MAPB, ENVVOL, ATKHLDV, DCYSUSV, LFOVAL1, ENVVAL,
2085 ATKHLDM, DCYSUSM, LFOVAL2, IP, IFATN, PEFE, FMMOD, TREMFRQ, FM2FRQ2,
2086 TEMPENV, ADCCR, FXWC, MICBA, ADCBA, FXBA,
2087 MICBS, ADCBS, FXBS, CDCS, GPSCS, SPCS0, SPCS1, SPCS2,
2088 SPBYPASS, AC97SLOT, CDSRCS, GPSRCS, ZVSRCS, MICIDX, ADCIDX, FXIDX,
2091 static unsigned char saved_regs_audigy[] = {
2092 A_ADCIDX, A_MICIDX, A_FXWC1, A_FXWC2, A_SAMPLE_RATE,
2093 A_FXRT2, A_SENDAMOUNTS, A_FXRT1,
2097 static int alloc_pm_buffer(struct snd_emu10k1 *emu)
2101 size = ARRAY_SIZE(saved_regs);
2103 size += ARRAY_SIZE(saved_regs_audigy);
2104 emu->saved_ptr = vmalloc(4 * NUM_G * size);
2105 if (!emu->saved_ptr)
2107 if (snd_emu10k1_efx_alloc_pm_buffer(emu) < 0)
2109 if (emu->card_capabilities->ca0151_chip &&
2110 snd_p16v_alloc_pm_buffer(emu) < 0)
2115 static void free_pm_buffer(struct snd_emu10k1 *emu)
2117 vfree(emu->saved_ptr);
2118 snd_emu10k1_efx_free_pm_buffer(emu);
2119 if (emu->card_capabilities->ca0151_chip)
2120 snd_p16v_free_pm_buffer(emu);
2123 void snd_emu10k1_suspend_regs(struct snd_emu10k1 *emu)
2129 val = emu->saved_ptr;
2130 for (reg = saved_regs; *reg != 0xff; reg++)
2131 for (i = 0; i < NUM_G; i++, val++)
2132 *val = snd_emu10k1_ptr_read(emu, *reg, i);
2134 for (reg = saved_regs_audigy; *reg != 0xff; reg++)
2135 for (i = 0; i < NUM_G; i++, val++)
2136 *val = snd_emu10k1_ptr_read(emu, *reg, i);
2139 emu->saved_a_iocfg = inl(emu->port + A_IOCFG);
2140 emu->saved_hcfg = inl(emu->port + HCFG);
2143 void snd_emu10k1_resume_init(struct snd_emu10k1 *emu)
2145 if (emu->card_capabilities->ca_cardbus_chip)
2146 snd_emu10k1_cardbus_init(emu);
2147 if (emu->card_capabilities->ecard)
2148 snd_emu10k1_ecard_init(emu);
2149 else if (emu->card_capabilities->emu_model)
2150 snd_emu10k1_emu1010_init(emu);
2152 snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_CNTR|AC97SLOT_LFE);
2153 snd_emu10k1_init(emu, emu->enable_ir, 1);
2156 void snd_emu10k1_resume_regs(struct snd_emu10k1 *emu)
2162 snd_emu10k1_audio_enable(emu);
2164 /* resore for spdif */
2166 outl(emu->saved_a_iocfg, emu->port + A_IOCFG);
2167 outl(emu->saved_hcfg, emu->port + HCFG);
2169 val = emu->saved_ptr;
2170 for (reg = saved_regs; *reg != 0xff; reg++)
2171 for (i = 0; i < NUM_G; i++, val++)
2172 snd_emu10k1_ptr_write(emu, *reg, i, *val);
2174 for (reg = saved_regs_audigy; *reg != 0xff; reg++)
2175 for (i = 0; i < NUM_G; i++, val++)
2176 snd_emu10k1_ptr_write(emu, *reg, i, *val);