1 // SPDX-License-Identifier: GPL-2.0-or-later
6 * 2002-07 Benny Sjostrand benny@hostmobility.com
11 #include <linux/delay.h>
13 #include <linux/init.h>
14 #include <linux/slab.h>
15 #include <linux/mutex.h>
17 #include <sound/core.h>
18 #include <sound/control.h>
19 #include <sound/info.h>
22 #include "cs46xx_lib.h"
25 struct proc_scb_info {
26 struct dsp_scb_descriptor * scb_desc;
27 struct snd_cs46xx *chip;
30 static void remove_symbol (struct snd_cs46xx * chip, struct dsp_symbol_entry * symbol)
32 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
33 int symbol_index = (int)(symbol - ins->symbol_table.symbols);
35 if (snd_BUG_ON(ins->symbol_table.nsymbols <= 0))
37 if (snd_BUG_ON(symbol_index < 0 ||
38 symbol_index >= ins->symbol_table.nsymbols))
41 ins->symbol_table.symbols[symbol_index].deleted = 1;
43 if (symbol_index < ins->symbol_table.highest_frag_index) {
44 ins->symbol_table.highest_frag_index = symbol_index;
47 if (symbol_index == ins->symbol_table.nsymbols - 1)
48 ins->symbol_table.nsymbols --;
50 if (ins->symbol_table.highest_frag_index > ins->symbol_table.nsymbols) {
51 ins->symbol_table.highest_frag_index = ins->symbol_table.nsymbols;
56 #ifdef CONFIG_SND_PROC_FS
57 static void cs46xx_dsp_proc_scb_info_read (struct snd_info_entry *entry,
58 struct snd_info_buffer *buffer)
60 struct proc_scb_info * scb_info = entry->private_data;
61 struct dsp_scb_descriptor * scb = scb_info->scb_desc;
62 struct snd_cs46xx *chip = scb_info->chip;
64 void __iomem *dst = chip->region.idx[1].remap_addr + DSP_PARAMETER_BYTE_OFFSET;
66 mutex_lock(&chip->spos_mutex);
67 snd_iprintf(buffer,"%04x %s:\n",scb->address,scb->scb_name);
69 for (col = 0,j = 0;j < 0x10; j++,col++) {
71 snd_iprintf(buffer,"\n");
74 snd_iprintf(buffer,"%08x ",readl(dst + (scb->address + j) * sizeof(u32)));
77 snd_iprintf(buffer,"\n");
79 if (scb->parent_scb_ptr != NULL) {
80 snd_iprintf(buffer,"parent [%s:%04x] ",
81 scb->parent_scb_ptr->scb_name,
82 scb->parent_scb_ptr->address);
83 } else snd_iprintf(buffer,"parent [none] ");
85 snd_iprintf(buffer,"sub_list_ptr [%s:%04x]\nnext_scb_ptr [%s:%04x] task_entry [%s:%04x]\n",
86 scb->sub_list_ptr->scb_name,
87 scb->sub_list_ptr->address,
88 scb->next_scb_ptr->scb_name,
89 scb->next_scb_ptr->address,
90 scb->task_entry->symbol_name,
91 scb->task_entry->address);
93 snd_iprintf(buffer,"index [%d] ref_count [%d]\n",scb->index,scb->ref_count);
94 mutex_unlock(&chip->spos_mutex);
98 static void _dsp_unlink_scb (struct snd_cs46xx *chip, struct dsp_scb_descriptor * scb)
100 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
102 if ( scb->parent_scb_ptr ) {
103 /* unlink parent SCB */
104 if (snd_BUG_ON(scb->parent_scb_ptr->sub_list_ptr != scb &&
105 scb->parent_scb_ptr->next_scb_ptr != scb))
108 if (scb->parent_scb_ptr->sub_list_ptr == scb) {
110 if (scb->next_scb_ptr == ins->the_null_scb) {
111 /* last and only node in parent sublist */
112 scb->parent_scb_ptr->sub_list_ptr = scb->sub_list_ptr;
114 if (scb->sub_list_ptr != ins->the_null_scb) {
115 scb->sub_list_ptr->parent_scb_ptr = scb->parent_scb_ptr;
117 scb->sub_list_ptr = ins->the_null_scb;
119 /* first node in parent sublist */
120 scb->parent_scb_ptr->sub_list_ptr = scb->next_scb_ptr;
122 if (scb->next_scb_ptr != ins->the_null_scb) {
123 /* update next node parent ptr. */
124 scb->next_scb_ptr->parent_scb_ptr = scb->parent_scb_ptr;
126 scb->next_scb_ptr = ins->the_null_scb;
129 scb->parent_scb_ptr->next_scb_ptr = scb->next_scb_ptr;
131 if (scb->next_scb_ptr != ins->the_null_scb) {
132 /* update next node parent ptr. */
133 scb->next_scb_ptr->parent_scb_ptr = scb->parent_scb_ptr;
135 scb->next_scb_ptr = ins->the_null_scb;
138 /* update parent first entry in DSP RAM */
139 cs46xx_dsp_spos_update_scb(chip,scb->parent_scb_ptr);
141 /* then update entry in DSP RAM */
142 cs46xx_dsp_spos_update_scb(chip,scb);
144 scb->parent_scb_ptr = NULL;
148 static void _dsp_clear_sample_buffer (struct snd_cs46xx *chip, u32 sample_buffer_addr,
151 void __iomem *dst = chip->region.idx[2].remap_addr + sample_buffer_addr;
154 for (i = 0; i < dword_count ; ++i ) {
160 void cs46xx_dsp_remove_scb (struct snd_cs46xx *chip, struct dsp_scb_descriptor * scb)
162 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
165 /* check integrety */
166 if (snd_BUG_ON(scb->index < 0 ||
167 scb->index >= ins->nscb ||
168 (ins->scbs + scb->index) != scb))
172 /* can't remove a SCB with childs before
173 removing childs first */
174 if (snd_BUG_ON(scb->sub_list_ptr != ins->the_null_scb ||
175 scb->next_scb_ptr != ins->the_null_scb))
179 spin_lock_irqsave(&chip->reg_lock, flags);
180 _dsp_unlink_scb (chip,scb);
181 spin_unlock_irqrestore(&chip->reg_lock, flags);
183 cs46xx_dsp_proc_free_scb_desc(scb);
184 if (snd_BUG_ON(!scb->scb_symbol))
186 remove_symbol (chip,scb->scb_symbol);
188 ins->scbs[scb->index].deleted = 1;
189 #ifdef CONFIG_PM_SLEEP
190 kfree(ins->scbs[scb->index].data);
191 ins->scbs[scb->index].data = NULL;
194 if (scb->index < ins->scb_highest_frag_index)
195 ins->scb_highest_frag_index = scb->index;
197 if (scb->index == ins->nscb - 1) {
201 if (ins->scb_highest_frag_index > ins->nscb) {
202 ins->scb_highest_frag_index = ins->nscb;
206 /* !!!! THIS IS A PIECE OF SHIT MADE BY ME !!! */
207 for(i = scb->index + 1;i < ins->nscb; ++i) {
208 ins->scbs[i - 1].index = i - 1;
214 #ifdef CONFIG_SND_PROC_FS
215 void cs46xx_dsp_proc_free_scb_desc (struct dsp_scb_descriptor * scb)
217 if (scb->proc_info) {
218 struct proc_scb_info * scb_info = scb->proc_info->private_data;
219 struct snd_cs46xx *chip = scb_info->chip;
221 dev_dbg(chip->card->dev,
222 "cs46xx_dsp_proc_free_scb_desc: freeing %s\n",
225 snd_info_free_entry(scb->proc_info);
226 scb->proc_info = NULL;
232 void cs46xx_dsp_proc_register_scb_desc (struct snd_cs46xx *chip,
233 struct dsp_scb_descriptor * scb)
235 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
236 struct snd_info_entry * entry;
237 struct proc_scb_info * scb_info;
239 /* register to proc */
240 if (ins->snd_card != NULL && ins->proc_dsp_dir != NULL &&
241 scb->proc_info == NULL) {
243 entry = snd_info_create_card_entry(ins->snd_card, scb->scb_name,
246 scb_info = kmalloc(sizeof(struct proc_scb_info), GFP_KERNEL);
248 snd_info_free_entry(entry);
253 scb_info->chip = chip;
254 scb_info->scb_desc = scb;
255 snd_info_set_text_ops(entry, scb_info,
256 cs46xx_dsp_proc_scb_info_read);
259 scb->proc_info = entry;
262 #endif /* CONFIG_SND_PROC_FS */
264 static struct dsp_scb_descriptor *
265 _dsp_create_generic_scb (struct snd_cs46xx *chip, char * name, u32 * scb_data, u32 dest,
266 struct dsp_symbol_entry * task_entry,
267 struct dsp_scb_descriptor * parent_scb,
270 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
271 struct dsp_scb_descriptor * scb;
275 if (snd_BUG_ON(!ins->the_null_scb))
278 /* fill the data that will be wroten to DSP */
279 scb_data[SCBsubListPtr] =
280 (ins->the_null_scb->address << 0x10) | ins->the_null_scb->address;
282 scb_data[SCBfuncEntryPtr] &= 0xFFFF0000;
283 scb_data[SCBfuncEntryPtr] |= task_entry->address;
285 dev_dbg(chip->card->dev, "dsp_spos: creating SCB <%s>\n", name);
287 scb = cs46xx_dsp_create_scb(chip,name,scb_data,dest);
290 scb->sub_list_ptr = ins->the_null_scb;
291 scb->next_scb_ptr = ins->the_null_scb;
293 scb->parent_scb_ptr = parent_scb;
294 scb->task_entry = task_entry;
297 /* update parent SCB */
298 if (scb->parent_scb_ptr) {
300 dev_dbg(chip->card->dev,
301 "scb->parent_scb_ptr = %s\n",
302 scb->parent_scb_ptr->scb_name);
303 dev_dbg(chip->card->dev,
304 "scb->parent_scb_ptr->next_scb_ptr = %s\n",
305 scb->parent_scb_ptr->next_scb_ptr->scb_name);
306 dev_dbg(chip->card->dev,
307 "scb->parent_scb_ptr->sub_list_ptr = %s\n",
308 scb->parent_scb_ptr->sub_list_ptr->scb_name);
310 /* link to parent SCB */
311 if (scb_child_type == SCB_ON_PARENT_NEXT_SCB) {
312 if (snd_BUG_ON(scb->parent_scb_ptr->next_scb_ptr !=
316 scb->parent_scb_ptr->next_scb_ptr = scb;
318 } else if (scb_child_type == SCB_ON_PARENT_SUBLIST_SCB) {
319 if (snd_BUG_ON(scb->parent_scb_ptr->sub_list_ptr !=
323 scb->parent_scb_ptr->sub_list_ptr = scb;
328 spin_lock_irqsave(&chip->reg_lock, flags);
330 /* update entry in DSP RAM */
331 cs46xx_dsp_spos_update_scb(chip,scb->parent_scb_ptr);
333 spin_unlock_irqrestore(&chip->reg_lock, flags);
337 cs46xx_dsp_proc_register_scb_desc (chip,scb);
342 static struct dsp_scb_descriptor *
343 cs46xx_dsp_create_generic_scb (struct snd_cs46xx *chip, char * name, u32 * scb_data,
344 u32 dest, char * task_entry_name,
345 struct dsp_scb_descriptor * parent_scb,
348 struct dsp_symbol_entry * task_entry;
350 task_entry = cs46xx_dsp_lookup_symbol (chip,task_entry_name,
353 if (task_entry == NULL) {
354 dev_err(chip->card->dev,
355 "dsp_spos: symbol %s not found\n", task_entry_name);
359 return _dsp_create_generic_scb (chip,name,scb_data,dest,task_entry,
360 parent_scb,scb_child_type);
363 struct dsp_scb_descriptor *
364 cs46xx_dsp_create_timing_master_scb (struct snd_cs46xx *chip)
366 struct dsp_scb_descriptor * scb;
368 struct dsp_timing_master_scb timing_master_scb = {
382 0,0, /* extraSampleAccum:TMreserved */
383 0,0, /* codecFIFOptr:codecFIFOsyncd */
384 0x0001,0x8000, /* fracSampAccumQm1:TMfrmsLeftInGroup */
385 0x0001,0x0000, /* fracSampCorrectionQm1:TMfrmGroupLength */
386 0x00060000 /* nSampPerFrmQ15 */
389 scb = cs46xx_dsp_create_generic_scb(chip,"TimingMasterSCBInst",(u32 *)&timing_master_scb,
390 TIMINGMASTER_SCB_ADDR,
391 "TIMINGMASTER",NULL,SCB_NO_PARENT);
397 struct dsp_scb_descriptor *
398 cs46xx_dsp_create_codec_out_scb(struct snd_cs46xx * chip, char * codec_name,
399 u16 channel_disp, u16 fifo_addr, u16 child_scb_addr,
400 u32 dest, struct dsp_scb_descriptor * parent_scb,
403 struct dsp_scb_descriptor * scb;
405 struct dsp_codec_output_scb codec_out_scb = {
420 0, /* COstrmRsConfig */
421 0, /* COstrmBufPtr */
422 channel_disp,fifo_addr, /* leftChanBaseIOaddr:rightChanIOdisp */
423 0x0000,0x0080, /* (!AC97!) COexpVolChangeRate:COscaleShiftCount */
424 0,child_scb_addr /* COreserved - need child scb to work with rom code */
428 scb = cs46xx_dsp_create_generic_scb(chip,codec_name,(u32 *)&codec_out_scb,
429 dest,"S16_CODECOUTPUTTASK",parent_scb,
435 struct dsp_scb_descriptor *
436 cs46xx_dsp_create_codec_in_scb(struct snd_cs46xx * chip, char * codec_name,
437 u16 channel_disp, u16 fifo_addr, u16 sample_buffer_addr,
438 u32 dest, struct dsp_scb_descriptor * parent_scb,
442 struct dsp_scb_descriptor * scb;
443 struct dsp_codec_input_scb codec_input_scb = {
458 SyncIOSCB,NULL_SCB_ADDR
464 RSCONFIG_SAMPLE_16STEREO + RSCONFIG_MODULO_64, /* strmRsConfig */
465 sample_buffer_addr << 0x10, /* strmBufPtr; defined as a dword ptr, used as a byte ptr */
466 channel_disp,fifo_addr, /* (!AC97!) leftChanBaseINaddr=AC97primary
467 link input slot 3 :rightChanINdisp=""slot 4 */
468 0x0000,0x0000, /* (!AC97!) ????:scaleShiftCount; no shift needed
469 because AC97 is already 20 bits */
470 0x80008000 /* ??clw cwcgame.scb has 0 */
473 scb = cs46xx_dsp_create_generic_scb(chip,codec_name,(u32 *)&codec_input_scb,
474 dest,"S16_CODECINPUTTASK",parent_scb,
480 static struct dsp_scb_descriptor *
481 cs46xx_dsp_create_pcm_reader_scb(struct snd_cs46xx * chip, char * scb_name,
482 u16 sample_buffer_addr, u32 dest,
483 int virtual_channel, u32 playback_hw_addr,
484 struct dsp_scb_descriptor * parent_scb,
487 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
488 struct dsp_scb_descriptor * scb;
490 struct dsp_generic_scb pcm_reader_scb = {
493 Play DMA Task xfers data from host buffer to SP buffer
494 init/runtime variables:
495 PlayAC: Play Audio Data Conversion - SCB loc: 2nd dword, mask: 0x0000F000L
496 DATA_FMT_16BIT_ST_LTLEND(0x00000000L) from 16-bit stereo, little-endian
497 DATA_FMT_8_BIT_ST_SIGNED(0x00001000L) from 8-bit stereo, signed
498 DATA_FMT_16BIT_MN_LTLEND(0x00002000L) from 16-bit mono, little-endian
499 DATA_FMT_8_BIT_MN_SIGNED(0x00003000L) from 8-bit mono, signed
500 DATA_FMT_16BIT_ST_BIGEND(0x00004000L) from 16-bit stereo, big-endian
501 DATA_FMT_16BIT_MN_BIGEND(0x00006000L) from 16-bit mono, big-endian
502 DATA_FMT_8_BIT_ST_UNSIGNED(0x00009000L) from 8-bit stereo, unsigned
503 DATA_FMT_8_BIT_MN_UNSIGNED(0x0000b000L) from 8-bit mono, unsigned
504 ? Other combinations possible from:
505 DMA_RQ_C2_AUDIO_CONVERT_MASK 0x0000F000L
506 DMA_RQ_C2_AC_NONE 0x00000000L
507 DMA_RQ_C2_AC_8_TO_16_BIT 0x00001000L
508 DMA_RQ_C2_AC_MONO_TO_STEREO 0x00002000L
509 DMA_RQ_C2_AC_ENDIAN_CONVERT 0x00004000L
510 DMA_RQ_C2_AC_SIGNED_CONVERT 0x00008000L
512 HostBuffAddr: Host Buffer Physical Byte Address - SCB loc:3rd dword, Mask: 0xFFFFFFFFL
513 aligned to dword boundary
515 /* Basic (non scatter/gather) DMA requestor (4 ints) */
516 { DMA_RQ_C1_SOURCE_ON_HOST + /* source buffer is on the host */
517 DMA_RQ_C1_SOURCE_MOD1024 + /* source buffer is 1024 dwords (4096 bytes) */
518 DMA_RQ_C1_DEST_MOD32 + /* dest buffer(PCMreaderBuf) is 32 dwords*/
519 DMA_RQ_C1_WRITEBACK_SRC_FLAG + /* ?? */
520 DMA_RQ_C1_WRITEBACK_DEST_FLAG + /* ?? */
521 15, /* DwordCount-1: picked 16 for DwordCount because Jim */
522 /* Barnette said that is what we should use since */
523 /* we are not running in optimized mode? */
525 DMA_RQ_C2_SIGNAL_SOURCE_PINGPONG + /* set play interrupt (bit0) in HISR when source */
526 /* buffer (on host) crosses half-way point */
527 virtual_channel, /* Play DMA channel arbitrarily set to 0 */
528 playback_hw_addr, /* HostBuffAddr (source) */
529 DMA_RQ_SD_SP_SAMPLE_ADDR + /* destination buffer is in SP Sample Memory */
530 sample_buffer_addr /* SP Buffer Address (destination) */
532 /* Scatter/gather DMA requestor extension (5 ints) */
540 /* Sublist pointer & next stream control block (SCB) link. */
541 NULL_SCB_ADDR,NULL_SCB_ADDR,
542 /* Pointer to this tasks parameter block & stream function pointer */
544 /* rsConfig register for stream buffer (rsDMA reg. is loaded from basicReq.daw */
545 /* for incoming streams, or basicReq.saw, for outgoing streams) */
546 RSCONFIG_DMA_ENABLE + /* enable DMA */
547 (19 << RSCONFIG_MAX_DMA_SIZE_SHIFT) + /* MAX_DMA_SIZE picked to be 19 since SPUD */
548 /* uses it for some reason */
549 ((dest >> 4) << RSCONFIG_STREAM_NUM_SHIFT) + /* stream number = SCBaddr/16 */
550 RSCONFIG_SAMPLE_16STEREO +
551 RSCONFIG_MODULO_32, /* dest buffer(PCMreaderBuf) is 32 dwords (256 bytes) */
552 /* Stream sample pointer & MAC-unit mode for this stream */
553 (sample_buffer_addr << 0x10),
554 /* Fractional increment per output sample in the input sample buffer */
557 /* Standard stereo volume control
564 if (ins->null_algorithm == NULL) {
565 ins->null_algorithm = cs46xx_dsp_lookup_symbol (chip,"NULLALGORITHM",
568 if (ins->null_algorithm == NULL) {
569 dev_err(chip->card->dev,
570 "dsp_spos: symbol NULLALGORITHM not found\n");
575 scb = _dsp_create_generic_scb(chip,scb_name,(u32 *)&pcm_reader_scb,
576 dest,ins->null_algorithm,parent_scb,
582 #define GOF_PER_SEC 200
584 struct dsp_scb_descriptor *
585 cs46xx_dsp_create_src_task_scb(struct snd_cs46xx * chip, char * scb_name,
588 u16 src_delay_buffer_addr, u32 dest,
589 struct dsp_scb_descriptor * parent_scb,
594 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
595 struct dsp_scb_descriptor * scb;
596 unsigned int tmp1, tmp2;
597 unsigned int phiIncr;
598 unsigned int correctionPerGOF, correctionPerSec;
600 dev_dbg(chip->card->dev, "dsp_spos: setting %s rate to %u\n",
604 * Compute the values used to drive the actual sample rate conversion.
605 * The following formulas are being computed, using inline assembly
606 * since we need to use 64 bit arithmetic to compute the values:
608 * phiIncr = floor((Fs,in * 2^26) / Fs,out)
609 * correctionPerGOF = floor((Fs,in * 2^26 - Fs,out * phiIncr) /
611 * ulCorrectionPerSec = Fs,in * 2^26 - Fs,out * phiIncr -M
612 * GOF_PER_SEC * correctionPerGOF
616 * phiIncr:other = dividend:remainder((Fs,in * 2^26) / Fs,out)
617 * correctionPerGOF:correctionPerSec =
618 * dividend:remainder(ulOther / GOF_PER_SEC)
621 phiIncr = tmp1 / 48000;
622 tmp1 -= phiIncr * 48000;
627 tmp1 -= tmp2 * 48000;
628 correctionPerGOF = tmp1 / GOF_PER_SEC;
629 tmp1 -= correctionPerGOF * GOF_PER_SEC;
630 correctionPerSec = tmp1;
633 struct dsp_src_task_scb src_task_scb = {
638 correctionPerGOF,correctionPerSec,
639 RSCONFIG_SAMPLE_16STEREO + RSCONFIG_MODULO_32,
640 0x0000,src_delay_buffer_addr,
642 0x080,(src_delay_buffer_addr + (24 * 4)),
643 0,0, /* next_scb, sub_list_ptr */
644 0,0, /* entry, this_spb */
645 RSCONFIG_SAMPLE_16STEREO + RSCONFIG_MODULO_8,
646 src_buffer_addr << 0x10,
649 0xffff - ins->dac_volume_right,0xffff - ins->dac_volume_left,
650 0xffff - ins->dac_volume_right,0xffff - ins->dac_volume_left
654 if (ins->s16_up == NULL) {
655 ins->s16_up = cs46xx_dsp_lookup_symbol (chip,"S16_UPSRC",
658 if (ins->s16_up == NULL) {
659 dev_err(chip->card->dev,
660 "dsp_spos: symbol S16_UPSRC not found\n");
666 _dsp_clear_sample_buffer (chip,src_buffer_addr,8);
667 _dsp_clear_sample_buffer (chip,src_delay_buffer_addr,32);
670 /* wont work with any other rate than
671 the native DSP rate */
672 snd_BUG_ON(rate != 48000);
674 scb = cs46xx_dsp_create_generic_scb(chip,scb_name,(u32 *)&src_task_scb,
675 dest,"DMAREADER",parent_scb,
678 scb = _dsp_create_generic_scb(chip,scb_name,(u32 *)&src_task_scb,
679 dest,ins->s16_up,parent_scb,
690 struct dsp_scb_descriptor *
691 cs46xx_dsp_create_filter_scb(struct snd_cs46xx * chip, char * scb_name,
692 u16 buffer_addr, u32 dest,
693 struct dsp_scb_descriptor * parent_scb,
694 int scb_child_type) {
695 struct dsp_scb_descriptor * scb;
697 struct dsp_filter_scb filter_scb = {
705 .filter_unused3 = 0x0000,
706 .filter_unused2 = 0x0000,
708 .output_buf_ptr = buffer_addr,
711 .prev_sample_output1 = 0x00000000,
712 .prev_sample_output2 = 0x00000000,
714 .prev_sample_input1 = 0x00000000,
715 .prev_sample_input2 = 0x00000000,
717 .next_scb_ptr = 0x0000,
718 .sub_list_ptr = 0x0000,
720 .entry_point = 0x0000,
732 scb = cs46xx_dsp_create_generic_scb(chip,scb_name,(u32 *)&filter_scb,
733 dest,"FILTERTASK",parent_scb,
738 #endif /* not used */
740 struct dsp_scb_descriptor *
741 cs46xx_dsp_create_mix_only_scb(struct snd_cs46xx * chip, char * scb_name,
742 u16 mix_buffer_addr, u32 dest,
743 struct dsp_scb_descriptor * parent_scb,
746 struct dsp_scb_descriptor * scb;
748 struct dsp_mix_only_scb master_mix_scb = {
751 /* 2 */ mix_buffer_addr,
763 /* B */ RSCONFIG_SAMPLE_16STEREO + RSCONFIG_MODULO_32,
764 /* C */ (mix_buffer_addr + (16 * 4)) << 0x10,
767 /* E */ 0x8000,0x8000,
768 /* F */ 0x8000,0x8000
773 scb = cs46xx_dsp_create_generic_scb(chip,scb_name,(u32 *)&master_mix_scb,
774 dest,"S16_MIX",parent_scb,
780 struct dsp_scb_descriptor *
781 cs46xx_dsp_create_mix_to_ostream_scb(struct snd_cs46xx * chip, char * scb_name,
782 u16 mix_buffer_addr, u16 writeback_spb, u32 dest,
783 struct dsp_scb_descriptor * parent_scb,
786 struct dsp_scb_descriptor * scb;
788 struct dsp_mix2_ostream_scb mix2_ostream_scb = {
789 /* Basic (non scatter/gather) DMA requestor (4 ints) */
791 DMA_RQ_C1_SOURCE_MOD64 +
792 DMA_RQ_C1_DEST_ON_HOST +
793 DMA_RQ_C1_DEST_MOD1024 +
794 DMA_RQ_C1_WRITEBACK_SRC_FLAG +
795 DMA_RQ_C1_WRITEBACK_DEST_FLAG +
799 DMA_RQ_C2_SIGNAL_DEST_PINGPONG +
801 CS46XX_DSP_CAPTURE_CHANNEL,
802 DMA_RQ_SD_SP_SAMPLE_ADDR +
811 RSCONFIG_DMA_ENABLE +
812 (19 << RSCONFIG_MAX_DMA_SIZE_SHIFT) +
814 ((dest >> 4) << RSCONFIG_STREAM_NUM_SHIFT) +
815 RSCONFIG_DMA_TO_HOST +
816 RSCONFIG_SAMPLE_16STEREO +
818 (mix_buffer_addr + (32 * 4)) << 0x10,
825 scb = cs46xx_dsp_create_generic_scb(chip,scb_name,(u32 *)&mix2_ostream_scb,
827 dest,"S16_MIX_TO_OSTREAM",parent_scb,
834 struct dsp_scb_descriptor *
835 cs46xx_dsp_create_vari_decimate_scb(struct snd_cs46xx * chip,char * scb_name,
836 u16 vari_buffer_addr0,
837 u16 vari_buffer_addr1,
839 struct dsp_scb_descriptor * parent_scb,
843 struct dsp_scb_descriptor * scb;
845 struct dsp_vari_decimate_scb vari_decimate_scb = {
849 vari_buffer_addr0,vari_buffer_addr1,
852 RSCONFIG_SAMPLE_16STEREO + RSCONFIG_MODULO_256,
856 0x0080,vari_buffer_addr1 + (25 * 4),
861 RSCONFIG_SAMPLE_16STEREO + RSCONFIG_MODULO_8,
862 vari_buffer_addr0 << 0x10,
870 scb = cs46xx_dsp_create_generic_scb(chip,scb_name,(u32 *)&vari_decimate_scb,
871 dest,"VARIDECIMATE",parent_scb,
878 static struct dsp_scb_descriptor *
879 cs46xx_dsp_create_pcm_serial_input_scb(struct snd_cs46xx * chip, char * scb_name, u32 dest,
880 struct dsp_scb_descriptor * input_scb,
881 struct dsp_scb_descriptor * parent_scb,
885 struct dsp_scb_descriptor * scb;
888 struct dsp_pcm_serial_input_scb pcm_serial_input_scb = {
905 RSCONFIG_SAMPLE_16STEREO + RSCONFIG_MODULO_16,
907 /* 0xD */ 0,input_scb->address,
909 /* 0xE */ 0x8000,0x8000,
910 /* 0xF */ 0x8000,0x8000
914 scb = cs46xx_dsp_create_generic_scb(chip,scb_name,(u32 *)&pcm_serial_input_scb,
915 dest,"PCMSERIALINPUTTASK",parent_scb,
921 static struct dsp_scb_descriptor *
922 cs46xx_dsp_create_asynch_fg_tx_scb(struct snd_cs46xx * chip, char * scb_name, u32 dest,
924 u16 asynch_buffer_address,
925 struct dsp_scb_descriptor * parent_scb,
929 struct dsp_scb_descriptor * scb;
931 struct dsp_asynch_fg_tx_scb asynch_fg_tx_scb = {
932 0xfc00,0x03ff, /* Prototype sample buffer size of 256 dwords */
933 0x0058,0x0028, /* Min Delta 7 dwords == 28 bytes */
934 /* : Max delta 25 dwords == 100 bytes */
935 0,hfg_scb_address, /* Point to HFG task SCB */
936 0,0, /* Initialize current Delta and Consumer ptr adjustment count */
937 0, /* Initialize accumulated Phi to 0 */
938 0,0x2aab, /* Const 1/3 */
941 0, /* Define the unused elements */
947 0,dest + AFGTxAccumPhi,
949 RSCONFIG_SAMPLE_16STEREO + RSCONFIG_MODULO_256, /* Stereo, 256 dword */
950 (asynch_buffer_address) << 0x10, /* This should be automagically synchronized
951 to the producer pointer */
953 /* There is no correct initial value, it will depend upon the detected
955 0x18000000, /* Phi increment for approx 32k operation */
956 0x8000,0x8000, /* Volume controls are unused at this time */
960 scb = cs46xx_dsp_create_generic_scb(chip,scb_name,(u32 *)&asynch_fg_tx_scb,
961 dest,"ASYNCHFGTXCODE",parent_scb,
968 struct dsp_scb_descriptor *
969 cs46xx_dsp_create_asynch_fg_rx_scb(struct snd_cs46xx * chip, char * scb_name, u32 dest,
971 u16 asynch_buffer_address,
972 struct dsp_scb_descriptor * parent_scb,
975 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
976 struct dsp_scb_descriptor * scb;
978 struct dsp_asynch_fg_rx_scb asynch_fg_rx_scb = {
979 0xfe00,0x01ff, /* Prototype sample buffer size of 128 dwords */
980 0x0064,0x001c, /* Min Delta 7 dwords == 28 bytes */
981 /* : Max delta 25 dwords == 100 bytes */
982 0,hfg_scb_address, /* Point to HFG task SCB */
983 0,0, /* Initialize current Delta and Consumer ptr adjustment count */
985 0, /* Define the unused elements */
995 RSCONFIG_MODULO_128 |
996 RSCONFIG_SAMPLE_16STEREO, /* Stereo, 128 dword */
997 ( (asynch_buffer_address + (16 * 4)) << 0x10), /* This should be automagically
998 synchrinized to the producer pointer */
1000 /* There is no correct initial value, it will depend upon the detected
1004 /* Set IEC958 input volume */
1005 0xffff - ins->spdif_input_volume_right,0xffff - ins->spdif_input_volume_left,
1006 0xffff - ins->spdif_input_volume_right,0xffff - ins->spdif_input_volume_left,
1009 scb = cs46xx_dsp_create_generic_scb(chip,scb_name,(u32 *)&asynch_fg_rx_scb,
1010 dest,"ASYNCHFGRXCODE",parent_scb,
1017 #if 0 /* not used */
1018 struct dsp_scb_descriptor *
1019 cs46xx_dsp_create_output_snoop_scb(struct snd_cs46xx * chip, char * scb_name, u32 dest,
1020 u16 snoop_buffer_address,
1021 struct dsp_scb_descriptor * snoop_scb,
1022 struct dsp_scb_descriptor * parent_scb,
1026 struct dsp_scb_descriptor * scb;
1028 struct dsp_output_snoop_scb output_snoop_scb = {
1029 { 0, /* not used. Zero */
1035 0, /* not used. Zero */
1045 RSCONFIG_SAMPLE_16STEREO + RSCONFIG_MODULO_64,
1046 snoop_buffer_address << 0x10,
1049 0,snoop_scb->address
1052 scb = cs46xx_dsp_create_generic_scb(chip,scb_name,(u32 *)&output_snoop_scb,
1053 dest,"OUTPUTSNOOP",parent_scb,
1057 #endif /* not used */
1060 struct dsp_scb_descriptor *
1061 cs46xx_dsp_create_spio_write_scb(struct snd_cs46xx * chip, char * scb_name, u32 dest,
1062 struct dsp_scb_descriptor * parent_scb,
1065 struct dsp_scb_descriptor * scb;
1067 struct dsp_spio_write_scb spio_write_scb = {
1068 0,0, /* SPIOWAddress2:SPIOWAddress1; */
1069 0, /* SPIOWData1; */
1070 0, /* SPIOWData2; */
1071 0,0, /* SPIOWAddress4:SPIOWAddress3; */
1072 0, /* SPIOWData3; */
1073 0, /* SPIOWData4; */
1074 0,0, /* SPIOWDataPtr:Unused1; */
1075 { 0,0 }, /* Unused2[2]; */
1077 0,0, /* SPIOWChildPtr:SPIOWSiblingPtr; */
1078 0,0, /* SPIOWThisPtr:SPIOWEntryPoint; */
1089 scb = cs46xx_dsp_create_generic_scb(chip,scb_name,(u32 *)&spio_write_scb,
1090 dest,"SPIOWRITE",parent_scb,
1096 struct dsp_scb_descriptor *
1097 cs46xx_dsp_create_magic_snoop_scb(struct snd_cs46xx * chip, char * scb_name, u32 dest,
1098 u16 snoop_buffer_address,
1099 struct dsp_scb_descriptor * snoop_scb,
1100 struct dsp_scb_descriptor * parent_scb,
1103 struct dsp_scb_descriptor * scb;
1105 struct dsp_magic_snoop_task magic_snoop_scb = {
1108 /* 2 */ snoop_buffer_address << 0x10,
1109 /* 3 */ 0,snoop_scb->address,
1115 /* 9 */ 0,0, /* next_scb, sub_list_ptr */
1116 /* A */ 0,0, /* entry_point, this_ptr */
1117 /* B */ RSCONFIG_SAMPLE_16STEREO + RSCONFIG_MODULO_64,
1118 /* C */ snoop_buffer_address << 0x10,
1120 /* E */ { 0x8000,0x8000,
1121 /* F */ 0xffff,0xffff
1125 scb = cs46xx_dsp_create_generic_scb(chip,scb_name,(u32 *)&magic_snoop_scb,
1126 dest,"MAGICSNOOPTASK",parent_scb,
1132 static struct dsp_scb_descriptor *
1133 find_next_free_scb (struct snd_cs46xx * chip, struct dsp_scb_descriptor * from)
1135 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1136 struct dsp_scb_descriptor * scb = from;
1138 while (scb->next_scb_ptr != ins->the_null_scb) {
1139 if (snd_BUG_ON(!scb->next_scb_ptr))
1142 scb = scb->next_scb_ptr;
1148 static u32 pcm_reader_buffer_addr[DSP_MAX_PCM_CHANNELS] = {
1183 static u32 src_output_buffer_addr[DSP_MAX_SRC_NR] = {
1200 static u32 src_delay_buffer_addr[DSP_MAX_SRC_NR] = {
1217 struct dsp_pcm_channel_descriptor *
1218 cs46xx_dsp_create_pcm_channel (struct snd_cs46xx * chip,
1219 u32 sample_rate, void * private_data,
1223 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1224 struct dsp_scb_descriptor * src_scb = NULL, * pcm_scb, * mixer_scb = NULL;
1225 struct dsp_scb_descriptor * src_parent_scb = NULL;
1227 /* struct dsp_scb_descriptor * pcm_parent_scb; */
1228 char scb_name[DSP_MAX_SCB_NAME];
1229 int i, pcm_index = -1, insert_point, src_index = -1, pass_through = 0;
1230 unsigned long flags;
1232 switch (pcm_channel_id) {
1233 case DSP_PCM_MAIN_CHANNEL:
1234 mixer_scb = ins->master_mix_scb;
1236 case DSP_PCM_REAR_CHANNEL:
1237 mixer_scb = ins->rear_mix_scb;
1239 case DSP_PCM_CENTER_LFE_CHANNEL:
1240 mixer_scb = ins->center_lfe_mix_scb;
1242 case DSP_PCM_S71_CHANNEL:
1246 case DSP_IEC958_CHANNEL:
1247 if (snd_BUG_ON(!ins->asynch_tx_scb))
1249 mixer_scb = ins->asynch_tx_scb;
1251 /* if sample rate is set to 48khz we pass
1252 the Sample Rate Converted (which could
1253 alter the raw data stream ...) */
1254 if (sample_rate == 48000) {
1255 dev_dbg(chip->card->dev, "IEC958 pass through\n");
1256 /* Hack to bypass creating a new SRC */
1264 /* default sample rate is 44100 */
1265 if (!sample_rate) sample_rate = 44100;
1267 /* search for a already created SRC SCB with the same sample rate */
1268 for (i = 0; i < DSP_MAX_PCM_CHANNELS &&
1269 (pcm_index == -1 || src_scb == NULL); ++i) {
1271 /* virtual channel reserved
1273 if (i == CS46XX_DSP_CAPTURE_CHANNEL) continue;
1275 if (ins->pcm_channels[i].active) {
1277 ins->pcm_channels[i].sample_rate == sample_rate &&
1278 ins->pcm_channels[i].mixer_scb == mixer_scb) {
1279 src_scb = ins->pcm_channels[i].src_scb;
1280 ins->pcm_channels[i].src_scb->ref_count ++;
1281 src_index = ins->pcm_channels[i].src_slot;
1283 } else if (pcm_index == -1) {
1288 if (pcm_index == -1) {
1289 dev_err(chip->card->dev, "dsp_spos: no free PCM channel\n");
1293 if (src_scb == NULL) {
1294 if (ins->nsrc_scb >= DSP_MAX_SRC_NR) {
1295 dev_err(chip->card->dev,
1296 "dsp_spos: to many SRC instances\n!");
1300 /* find a free slot */
1301 for (i = 0; i < DSP_MAX_SRC_NR; ++i) {
1302 if (ins->src_scb_slots[i] == 0) {
1304 ins->src_scb_slots[i] = 1;
1308 if (snd_BUG_ON(src_index == -1))
1311 /* we need to create a new SRC SCB */
1312 if (mixer_scb->sub_list_ptr == ins->the_null_scb) {
1313 src_parent_scb = mixer_scb;
1314 insert_point = SCB_ON_PARENT_SUBLIST_SCB;
1316 src_parent_scb = find_next_free_scb(chip,mixer_scb->sub_list_ptr);
1317 insert_point = SCB_ON_PARENT_NEXT_SCB;
1320 snprintf (scb_name,DSP_MAX_SCB_NAME,"SrcTask_SCB%d",src_index);
1322 dev_dbg(chip->card->dev,
1323 "dsp_spos: creating SRC \"%s\"\n", scb_name);
1324 src_scb = cs46xx_dsp_create_src_task_scb(chip,scb_name,
1326 src_output_buffer_addr[src_index],
1327 src_delay_buffer_addr[src_index],
1328 /* 0x400 - 0x600 source SCBs */
1329 0x400 + (src_index * 0x10) ,
1335 dev_err(chip->card->dev,
1336 "dsp_spos: failed to create SRCtaskSCB\n");
1340 /* cs46xx_dsp_set_src_sample_rate(chip,src_scb,sample_rate); */
1346 snprintf (scb_name,DSP_MAX_SCB_NAME,"PCMReader_SCB%d",pcm_index);
1348 dev_dbg(chip->card->dev, "dsp_spos: creating PCM \"%s\" (%d)\n",
1349 scb_name, pcm_channel_id);
1351 pcm_scb = cs46xx_dsp_create_pcm_reader_scb(chip,scb_name,
1352 pcm_reader_buffer_addr[pcm_index],
1353 /* 0x200 - 400 PCMreader SCBs */
1354 (pcm_index * 0x10) + 0x200,
1355 pcm_index, /* virtual channel 0-31 */
1356 hw_dma_addr, /* pcm hw addr */
1357 NULL, /* parent SCB ptr */
1358 0 /* insert point */
1362 dev_err(chip->card->dev,
1363 "dsp_spos: failed to create PCMreaderSCB\n");
1367 spin_lock_irqsave(&chip->reg_lock, flags);
1368 ins->pcm_channels[pcm_index].sample_rate = sample_rate;
1369 ins->pcm_channels[pcm_index].pcm_reader_scb = pcm_scb;
1370 ins->pcm_channels[pcm_index].src_scb = src_scb;
1371 ins->pcm_channels[pcm_index].unlinked = 1;
1372 ins->pcm_channels[pcm_index].private_data = private_data;
1373 ins->pcm_channels[pcm_index].src_slot = src_index;
1374 ins->pcm_channels[pcm_index].active = 1;
1375 ins->pcm_channels[pcm_index].pcm_slot = pcm_index;
1376 ins->pcm_channels[pcm_index].mixer_scb = mixer_scb;
1377 ins->npcm_channels ++;
1378 spin_unlock_irqrestore(&chip->reg_lock, flags);
1380 return (ins->pcm_channels + pcm_index);
1383 int cs46xx_dsp_pcm_channel_set_period (struct snd_cs46xx * chip,
1384 struct dsp_pcm_channel_descriptor * pcm_channel,
1387 u32 temp = snd_cs46xx_peek (chip,pcm_channel->pcm_reader_scb->address << 2);
1388 temp &= ~DMA_RQ_C1_SOURCE_SIZE_MASK;
1390 switch (period_size) {
1392 temp |= DMA_RQ_C1_SOURCE_MOD1024;
1395 temp |= DMA_RQ_C1_SOURCE_MOD512;
1398 temp |= DMA_RQ_C1_SOURCE_MOD256;
1401 temp |= DMA_RQ_C1_SOURCE_MOD128;
1404 temp |= DMA_RQ_C1_SOURCE_MOD64;
1407 temp |= DMA_RQ_C1_SOURCE_MOD32;
1410 temp |= DMA_RQ_C1_SOURCE_MOD16;
1413 dev_dbg(chip->card->dev,
1414 "period size (%d) not supported by HW\n", period_size);
1418 snd_cs46xx_poke (chip,pcm_channel->pcm_reader_scb->address << 2,temp);
1423 int cs46xx_dsp_pcm_ostream_set_period (struct snd_cs46xx * chip,
1426 u32 temp = snd_cs46xx_peek (chip,WRITEBACK_SCB_ADDR << 2);
1427 temp &= ~DMA_RQ_C1_DEST_SIZE_MASK;
1429 switch (period_size) {
1431 temp |= DMA_RQ_C1_DEST_MOD1024;
1434 temp |= DMA_RQ_C1_DEST_MOD512;
1437 temp |= DMA_RQ_C1_DEST_MOD256;
1440 temp |= DMA_RQ_C1_DEST_MOD128;
1443 temp |= DMA_RQ_C1_DEST_MOD64;
1446 temp |= DMA_RQ_C1_DEST_MOD32;
1449 temp |= DMA_RQ_C1_DEST_MOD16;
1452 dev_dbg(chip->card->dev,
1453 "period size (%d) not supported by HW\n", period_size);
1457 snd_cs46xx_poke (chip,WRITEBACK_SCB_ADDR << 2,temp);
1462 void cs46xx_dsp_destroy_pcm_channel (struct snd_cs46xx * chip,
1463 struct dsp_pcm_channel_descriptor * pcm_channel)
1465 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1466 unsigned long flags;
1468 if (snd_BUG_ON(!pcm_channel->active ||
1469 ins->npcm_channels <= 0 ||
1470 pcm_channel->src_scb->ref_count <= 0))
1473 spin_lock_irqsave(&chip->reg_lock, flags);
1474 pcm_channel->unlinked = 1;
1475 pcm_channel->active = 0;
1476 pcm_channel->private_data = NULL;
1477 pcm_channel->src_scb->ref_count --;
1478 ins->npcm_channels --;
1479 spin_unlock_irqrestore(&chip->reg_lock, flags);
1481 cs46xx_dsp_remove_scb(chip,pcm_channel->pcm_reader_scb);
1483 if (!pcm_channel->src_scb->ref_count) {
1484 cs46xx_dsp_remove_scb(chip,pcm_channel->src_scb);
1486 if (snd_BUG_ON(pcm_channel->src_slot < 0 ||
1487 pcm_channel->src_slot >= DSP_MAX_SRC_NR))
1490 ins->src_scb_slots[pcm_channel->src_slot] = 0;
1495 int cs46xx_dsp_pcm_unlink (struct snd_cs46xx * chip,
1496 struct dsp_pcm_channel_descriptor * pcm_channel)
1498 unsigned long flags;
1500 if (snd_BUG_ON(!pcm_channel->active ||
1501 chip->dsp_spos_instance->npcm_channels <= 0))
1504 spin_lock_irqsave(&chip->reg_lock, flags);
1505 if (pcm_channel->unlinked) {
1506 spin_unlock_irqrestore(&chip->reg_lock, flags);
1510 pcm_channel->unlinked = 1;
1512 _dsp_unlink_scb (chip,pcm_channel->pcm_reader_scb);
1513 spin_unlock_irqrestore(&chip->reg_lock, flags);
1518 int cs46xx_dsp_pcm_link (struct snd_cs46xx * chip,
1519 struct dsp_pcm_channel_descriptor * pcm_channel)
1521 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1522 struct dsp_scb_descriptor * parent_scb;
1523 struct dsp_scb_descriptor * src_scb = pcm_channel->src_scb;
1524 unsigned long flags;
1526 spin_lock_irqsave(&chip->reg_lock, flags);
1528 if (pcm_channel->unlinked == 0) {
1529 spin_unlock_irqrestore(&chip->reg_lock, flags);
1533 parent_scb = src_scb;
1535 if (src_scb->sub_list_ptr != ins->the_null_scb) {
1536 src_scb->sub_list_ptr->parent_scb_ptr = pcm_channel->pcm_reader_scb;
1537 pcm_channel->pcm_reader_scb->next_scb_ptr = src_scb->sub_list_ptr;
1540 src_scb->sub_list_ptr = pcm_channel->pcm_reader_scb;
1542 snd_BUG_ON(pcm_channel->pcm_reader_scb->parent_scb_ptr);
1543 pcm_channel->pcm_reader_scb->parent_scb_ptr = parent_scb;
1545 /* update SCB entry in DSP RAM */
1546 cs46xx_dsp_spos_update_scb(chip,pcm_channel->pcm_reader_scb);
1548 /* update parent SCB entry */
1549 cs46xx_dsp_spos_update_scb(chip,parent_scb);
1551 pcm_channel->unlinked = 0;
1552 spin_unlock_irqrestore(&chip->reg_lock, flags);
1556 struct dsp_scb_descriptor *
1557 cs46xx_add_record_source (struct snd_cs46xx *chip, struct dsp_scb_descriptor * source,
1558 u16 addr, char * scb_name)
1560 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1561 struct dsp_scb_descriptor * parent;
1562 struct dsp_scb_descriptor * pcm_input;
1565 if (snd_BUG_ON(!ins->record_mixer_scb))
1568 if (ins->record_mixer_scb->sub_list_ptr != ins->the_null_scb) {
1569 parent = find_next_free_scb (chip,ins->record_mixer_scb->sub_list_ptr);
1570 insert_point = SCB_ON_PARENT_NEXT_SCB;
1572 parent = ins->record_mixer_scb;
1573 insert_point = SCB_ON_PARENT_SUBLIST_SCB;
1576 pcm_input = cs46xx_dsp_create_pcm_serial_input_scb(chip,scb_name,addr,
1583 int cs46xx_src_unlink(struct snd_cs46xx *chip, struct dsp_scb_descriptor * src)
1585 unsigned long flags;
1587 if (snd_BUG_ON(!src->parent_scb_ptr))
1591 cs46xx_dsp_scb_set_volume (chip,src,0,0);
1593 spin_lock_irqsave(&chip->reg_lock, flags);
1594 _dsp_unlink_scb (chip,src);
1595 spin_unlock_irqrestore(&chip->reg_lock, flags);
1600 int cs46xx_src_link(struct snd_cs46xx *chip, struct dsp_scb_descriptor * src)
1602 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1603 struct dsp_scb_descriptor * parent_scb;
1605 if (snd_BUG_ON(src->parent_scb_ptr))
1607 if (snd_BUG_ON(!ins->master_mix_scb))
1610 if (ins->master_mix_scb->sub_list_ptr != ins->the_null_scb) {
1611 parent_scb = find_next_free_scb (chip,ins->master_mix_scb->sub_list_ptr);
1612 parent_scb->next_scb_ptr = src;
1614 parent_scb = ins->master_mix_scb;
1615 parent_scb->sub_list_ptr = src;
1618 src->parent_scb_ptr = parent_scb;
1620 /* update entry in DSP RAM */
1621 cs46xx_dsp_spos_update_scb(chip,parent_scb);
1626 int cs46xx_dsp_enable_spdif_out (struct snd_cs46xx *chip)
1628 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1630 if ( ! (ins->spdif_status_out & DSP_SPDIF_STATUS_HW_ENABLED) ) {
1631 cs46xx_dsp_enable_spdif_hw (chip);
1634 /* dont touch anything if SPDIF is open */
1635 if ( ins->spdif_status_out & DSP_SPDIF_STATUS_PLAYBACK_OPEN) {
1636 /* when cs46xx_iec958_post_close(...) is called it
1637 will call this function if necessary depending on
1639 ins->spdif_status_out |= DSP_SPDIF_STATUS_OUTPUT_ENABLED;
1644 if (snd_BUG_ON(ins->asynch_tx_scb))
1646 if (snd_BUG_ON(ins->master_mix_scb->next_scb_ptr !=
1650 /* reset output snooper sample buffer pointer */
1651 snd_cs46xx_poke (chip, (ins->ref_snoop_scb->address + 2) << 2,
1652 (OUTPUT_SNOOP_BUFFER + 0x10) << 0x10 );
1654 /* The asynch. transfer task */
1655 ins->asynch_tx_scb = cs46xx_dsp_create_asynch_fg_tx_scb(chip,"AsynchFGTxSCB",ASYNCTX_SCB_ADDR,
1657 SPDIFO_IP_OUTPUT_BUFFER1,
1658 ins->master_mix_scb,
1659 SCB_ON_PARENT_NEXT_SCB);
1660 if (!ins->asynch_tx_scb) return -ENOMEM;
1662 ins->spdif_pcm_input_scb = cs46xx_dsp_create_pcm_serial_input_scb(chip,"PCMSerialInput_II",
1663 PCMSERIALINII_SCB_ADDR,
1666 SCB_ON_PARENT_SUBLIST_SCB);
1669 if (!ins->spdif_pcm_input_scb) return -ENOMEM;
1672 ins->spdif_status_out |= DSP_SPDIF_STATUS_OUTPUT_ENABLED;
1677 int cs46xx_dsp_disable_spdif_out (struct snd_cs46xx *chip)
1679 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1681 /* dont touch anything if SPDIF is open */
1682 if ( ins->spdif_status_out & DSP_SPDIF_STATUS_PLAYBACK_OPEN) {
1683 ins->spdif_status_out &= ~DSP_SPDIF_STATUS_OUTPUT_ENABLED;
1687 /* check integrety */
1688 if (snd_BUG_ON(!ins->asynch_tx_scb))
1690 if (snd_BUG_ON(!ins->spdif_pcm_input_scb))
1692 if (snd_BUG_ON(ins->master_mix_scb->next_scb_ptr != ins->asynch_tx_scb))
1694 if (snd_BUG_ON(ins->asynch_tx_scb->parent_scb_ptr !=
1695 ins->master_mix_scb))
1698 cs46xx_dsp_remove_scb (chip,ins->spdif_pcm_input_scb);
1699 cs46xx_dsp_remove_scb (chip,ins->asynch_tx_scb);
1701 ins->spdif_pcm_input_scb = NULL;
1702 ins->asynch_tx_scb = NULL;
1704 /* clear buffer to prevent any undesired noise */
1705 _dsp_clear_sample_buffer(chip,SPDIFO_IP_OUTPUT_BUFFER1,256);
1708 ins->spdif_status_out &= ~DSP_SPDIF_STATUS_OUTPUT_ENABLED;
1714 int cs46xx_iec958_pre_open (struct snd_cs46xx *chip)
1716 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1718 if ( ins->spdif_status_out & DSP_SPDIF_STATUS_OUTPUT_ENABLED ) {
1719 /* remove AsynchFGTxSCB and PCMSerialInput_II */
1720 cs46xx_dsp_disable_spdif_out (chip);
1723 ins->spdif_status_out |= DSP_SPDIF_STATUS_OUTPUT_ENABLED;
1726 /* if not enabled already */
1727 if ( !(ins->spdif_status_out & DSP_SPDIF_STATUS_HW_ENABLED) ) {
1728 cs46xx_dsp_enable_spdif_hw (chip);
1731 /* Create the asynch. transfer task for playback */
1732 ins->asynch_tx_scb = cs46xx_dsp_create_asynch_fg_tx_scb(chip,"AsynchFGTxSCB",ASYNCTX_SCB_ADDR,
1734 SPDIFO_IP_OUTPUT_BUFFER1,
1735 ins->master_mix_scb,
1736 SCB_ON_PARENT_NEXT_SCB);
1739 /* set spdif channel status value for streaming */
1740 cs46xx_poke_via_dsp (chip,SP_SPDOUT_CSUV, ins->spdif_csuv_stream);
1742 ins->spdif_status_out |= DSP_SPDIF_STATUS_PLAYBACK_OPEN;
1747 int cs46xx_iec958_post_close (struct snd_cs46xx *chip)
1749 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1751 if (snd_BUG_ON(!ins->asynch_tx_scb))
1754 ins->spdif_status_out &= ~DSP_SPDIF_STATUS_PLAYBACK_OPEN;
1756 /* restore settings */
1757 cs46xx_poke_via_dsp (chip,SP_SPDOUT_CSUV, ins->spdif_csuv_default);
1759 /* deallocate stuff */
1760 if (ins->spdif_pcm_input_scb != NULL) {
1761 cs46xx_dsp_remove_scb (chip,ins->spdif_pcm_input_scb);
1762 ins->spdif_pcm_input_scb = NULL;
1765 cs46xx_dsp_remove_scb (chip,ins->asynch_tx_scb);
1766 ins->asynch_tx_scb = NULL;
1768 /* clear buffer to prevent any undesired noise */
1769 _dsp_clear_sample_buffer(chip,SPDIFO_IP_OUTPUT_BUFFER1,256);
1772 if ( ins->spdif_status_out & DSP_SPDIF_STATUS_OUTPUT_ENABLED ) {
1773 cs46xx_dsp_enable_spdif_out (chip);