1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * The driver for the Cirrus Logic's Sound Fusion CS46XX based soundcards
4 * Copyright (c) by Jaroslav Kysela <perex@perex.cz>
6 * NOTE: comments are copy/paste from cwcemb80.lst
7 * provided by Tom Woller at Cirrus (my only
8 * documentation about the SP OS running inside
12 #ifndef __CS46XX_DSP_SCB_TYPES_H__
13 #define __CS46XX_DSP_SCB_TYPES_H__
15 #include <asm/byteorder.h>
17 #ifndef ___DSP_DUAL_16BIT_ALLOC
18 #if defined(__LITTLE_ENDIAN)
19 #define ___DSP_DUAL_16BIT_ALLOC(a,b) u16 a; u16 b;
20 #elif defined(__BIG_ENDIAN)
21 #define ___DSP_DUAL_16BIT_ALLOC(a,b) u16 b; u16 a;
23 #error Not __LITTLE_ENDIAN and not __BIG_ENDIAN, then what ???
27 /* This structs are used internally by the SP */
29 struct dsp_basic_dma_req {
30 /* DMA Requestor Word 0 (DCW) fields:
32 31 [30-28]27 [26:24] 23 22 21 20 [19:18] [17:16] 15 14 13 12 11 10 9 8 7 6 [5:0]
33 _______________________________________________________________________________________
34 |S| SBT |D| DBT |wb|wb| | | LS | SS |Opt|Do|SSG|DSG| | | | | | | Dword |
35 |H|_____ |H|_________|S_|D |__|__|______|_______|___|ne|__ |__ |__|__|_|_|_|_|_Count -1|
37 u32 dcw; /* DMA Control Word */
38 u32 dmw; /* DMA Mode Word */
39 u32 saw; /* Source Address Word */
40 u32 daw; /* Destination Address Word */
43 struct dsp_scatter_gather_ext {
44 u32 npaw; /* Next-Page Address Word */
46 /* DMA Requestor Word 5 (NPCW) fields:
48 31-30 29 28 [27:16] [15:12] [11:3] [2:0]
49 _________________________________________________________________________________________
50 |SV |LE|SE| Sample-end byte offset | | Page-map entry offset for next | |
51 |page|__|__| ___________________________|_________|__page, if !sample-end___________|____|
53 u32 npcw; /* Next-Page Control Word */
54 u32 lbaw; /* Loop-Begin Address Word */
55 u32 nplbaw; /* Next-Page after Loop-Begin Address Word */
56 u32 sgaw; /* Scatter/Gather Address Word */
59 struct dsp_volume_control {
60 ___DSP_DUAL_16BIT_ALLOC(
61 rightTarg, /* Target volume for left & right channels */
64 ___DSP_DUAL_16BIT_ALLOC(
65 rightVol, /* Current left & right channel volumes */
70 /* Generic stream control block (SCB) structure definition */
71 struct dsp_generic_scb {
72 /* For streaming I/O, the DSP should never alter any words in the DMA
73 requestor or the scatter/gather extension. Only ad hoc DMA request
74 streams are free to alter the requestor (currently only occur in the
75 DOS-based MIDI controller and in debugger-inserted code).
77 If an SCB does not have any associated DMA requestor, these 9 ints
78 may be freed for use by other tasks, but the pointer to the SCB must
79 still be such that the insOrd:nextSCB appear at offset 9 from the
82 Basic (non scatter/gather) DMA requestor (4 ints)
85 /* Initialized by the host, only modified by DMA
86 R/O for the DSP task */
87 struct dsp_basic_dma_req basic_req; /* Optional */
89 /* Scatter/gather DMA requestor extension (5 ints)
90 Initialized by the host, only modified by DMA
91 DSP task never needs to even read these.
93 struct dsp_scatter_gather_ext sg_ext; /* Optional */
95 /* Sublist pointer & next stream control block (SCB) link.
96 Initialized & modified by the host R/O for the DSP task
98 ___DSP_DUAL_16BIT_ALLOC(
99 next_scb, /* REQUIRED */
100 sub_list_ptr /* REQUIRED */
103 /* Pointer to this tasks parameter block & stream function pointer
104 Initialized by the host R/O for the DSP task */
105 ___DSP_DUAL_16BIT_ALLOC(
106 entry_point, /* REQUIRED */
107 this_spb /* REQUIRED */
110 /* rsConfig register for stream buffer (rsDMA reg.
111 is loaded from basicReq.daw for incoming streams, or
112 basicReq.saw, for outgoing streams)
114 31 30 29 [28:24] [23:16] 15 14 13 12 11 10 9 8 7 6 5 4 [3:0]
115 ______________________________________________________________________________
116 |DMA |D|maxDMAsize| streamNum|dir|p| | | | | | |ds |shr 1|rev Cy | mod |
117 |prio |_|__________|__________|___|_|__|__|__|__|_|_|___|_____|_______|_______|
118 31 30 29 [28:24] [23:16] 15 14 13 12 11 10 9 8 7 6 5 4 [3:0]
121 Initialized by the host R/O for the DSP task
123 u32 strm_rs_config; /* REQUIRED */
125 /* On mixer input streams: indicates mixer input stream configuration
126 On Tees, this is copied from the stream being snooped
128 Stream sample pointer & MAC-unit mode for this stream
130 Initialized by the host Updated by the DSP task
132 u32 strm_buf_ptr; /* REQUIRED */
134 /* On mixer input streams: points to next mixer input and is updated by the
135 mixer subroutine in the "parent" DSP task
136 (least-significant 16 bits are preserved, unused)
138 On Tees, the pointer is copied from the stream being snooped on
139 initialization, and, subsequently, it is copied into the
140 stream being snooped.
142 On wavetable/3D voices: the strmBufPtr will use all 32 bits to allow for
143 fractional phase accumulation
145 Fractional increment per output sample in the input sample buffer
147 (Not used on mixer input streams & redefined on Tees)
148 On wavetable/3D voices: this 32-bit word specifies the integer.fractional
149 increment per output sample.
154 /* Standard stereo volume control
155 Initialized by the host (host updates target volumes)
157 Current volumes update by the DSP task
158 On mixer input streams: required & updated by the mixer subroutine in the
161 On Tees, both current & target volumes are copied up on initialization,
162 and, subsequently, the target volume is copied up while the current
163 volume is copied down.
165 These two 32-bit words are redefined for wavetable & 3-D voices.
167 struct dsp_volume_control vol_ctrl_t; /* Optional */
171 struct dsp_spos_control_block {
172 /* WARNING: Certain items in this structure are modified by the host
173 Any dword that can be modified by the host, must not be
174 modified by the SP as the host can only do atomic dword
175 writes, and to do otherwise, even a read modify write,
176 may lead to corrupted data on the SP.
178 This rule does not apply to one off boot time initialisation prior to starting the SP
182 ___DSP_DUAL_16BIT_ALLOC(
183 /* First element on the Hyper forground task tree */
184 hfg_tree_root_ptr, /* HOST */
185 /* First 3 dwords are written by the host and read-only on the DSP */
186 hfg_stack_base /* HOST */
189 ___DSP_DUAL_16BIT_ALLOC(
190 /* Point to this data structure to enable easy access */
191 spos_cb_ptr, /* SP */
192 prev_task_tree_ptr /* SP && HOST */
195 ___DSP_DUAL_16BIT_ALLOC(
196 /* Currently Unused */
197 xxinterval_timer_period,
198 /* Enable extension of SPOS data structure */
203 ___DSP_DUAL_16BIT_ALLOC(
204 xxnum_HFG_ticks_thisInterval,
205 /* Modified by the DSP */
210 /* Set by DSP upon encountering a trap (breakpoint) or a spurious
211 interrupt. The host must clear this dword after reading it
212 upon receiving spInt1. */
213 ___DSP_DUAL_16BIT_ALLOC(
214 spurious_int_flag, /* (Host & SP) Nature of the spurious interrupt */
215 trap_flag /* (Host & SP) Nature of detected Trap */
218 ___DSP_DUAL_16BIT_ALLOC(
220 invalid_IP_flag /* (Host & SP ) Indicate detection of invalid instruction pointer */
223 ___DSP_DUAL_16BIT_ALLOC(
224 /* pointer to forground task tree header for use in next task search */
225 fg_task_tree_hdr_ptr, /* HOST */
226 /* Data structure for controlling synchronous link update */
227 hfg_sync_update_ptr /* HOST */
230 ___DSP_DUAL_16BIT_ALLOC(
231 begin_foreground_FCNT, /* SP */
232 /* Place holder for holding sleep timing */
233 last_FCNT_before_sleep /* SP */
236 ___DSP_DUAL_16BIT_ALLOC(
238 next_task_treePtr /* SP */
243 ___DSP_DUAL_16BIT_ALLOC(
244 active_flags, /* SP */
245 /* State flags, used to assist control of execution of Hyper Forground */
249 ___DSP_DUAL_16BIT_ALLOC(
254 /* Space for saving enough context so that we can set up enough
255 to save some more context.
257 u32 rFE_save_for_invalid_IP;
258 u32 r32_save_for_spurious_int;
259 u32 r32_save_for_trap;
260 u32 r32_save_for_HFG;
263 /* SPB for MIX_TO_OSTREAM algorithm family */
264 struct dsp_mix2_ostream_spb
266 /* 16b.16b integer.frac approximation to the
267 number of 3 sample triplets to output each
268 frame. (approximation must be floor, to
269 insure that the fractional error is always
272 u32 outTripletsPerFrame;
274 /* 16b.16b integer.frac accumulated number of
275 output triplets since the start of group
277 u32 accumOutTriplets;
280 /* SCB for Timing master algorithm */
281 struct dsp_timing_master_scb {
282 /* First 12 dwords from generic_scb_t */
283 struct dsp_basic_dma_req basic_req; /* Optional */
284 struct dsp_scatter_gather_ext sg_ext; /* Optional */
285 ___DSP_DUAL_16BIT_ALLOC(
286 next_scb, /* REQUIRED */
287 sub_list_ptr /* REQUIRED */
290 ___DSP_DUAL_16BIT_ALLOC(
291 entry_point, /* REQUIRED */
292 this_spb /* REQUIRED */
295 ___DSP_DUAL_16BIT_ALLOC(
296 /* Initial values are 0000:xxxx */
302 /* Initial values are xxxx:0000
303 hi: Current CODEC output FIFO pointer
305 lo: Flag indicating that the CODEC
306 FIFO is sync'd (host clears to
307 resynchronize the FIFO pointer
310 ___DSP_DUAL_16BIT_ALLOC(
315 /* Init. 8000:0005 for 44.1k
317 hi: Fractional sample accumulator 0.16b
318 lo: Number of frames remaining to be
319 processed in the current group of
322 ___DSP_DUAL_16BIT_ALLOC(
324 TM_frms_left_in_group
327 /* Init. 0001:0005 for 44.1k
329 hi: Fractional sample correction factor 0.16b
330 to be added every frameGroupLength frames
331 to correct for truncation error in
333 lo: Number of frames in the group
335 ___DSP_DUAL_16BIT_ALLOC(
336 frac_samp_correction_qm1,
340 /* Init. 44.1k*65536/8k = 0x00058333 for 44.1k
341 48k*65536/8k = 0x00060000 for 48k
342 16b.16b integer.frac approximation to the
343 number of samples to output each frame.
344 (approximation must be floor, to insure */
345 u32 nsamp_per_frm_q15;
348 /* SCB for CODEC output algorithm */
349 struct dsp_codec_output_scb {
350 /* First 13 dwords from generic_scb_t */
351 struct dsp_basic_dma_req basic_req; /* Optional */
352 struct dsp_scatter_gather_ext sg_ext; /* Optional */
353 ___DSP_DUAL_16BIT_ALLOC(
354 next_scb, /* REQUIRED */
355 sub_list_ptr /* REQUIRED */
358 ___DSP_DUAL_16BIT_ALLOC(
359 entry_point, /* REQUIRED */
360 this_spb /* REQUIRED */
363 u32 strm_rs_config; /* REQUIRED */
365 u32 strm_buf_ptr; /* REQUIRED */
367 /* NOTE: The CODEC output task reads samples from the first task on its
368 sublist at the stream buffer pointer (init. to lag DMA destination
369 address word). After the required number of samples is transferred,
370 the CODEC output task advances sub_list_ptr->strm_buf_ptr past the samples
374 /* Init. 0000:0010 for SDout
377 hi: Base IO address of FIFO to which
378 the left-channel samples are to
380 lo: Displacement for the base IO
381 address for left-channel to obtain
382 the base IO address for the FIFO
383 to which the right-channel samples
386 ___DSP_DUAL_16BIT_ALLOC(
387 left_chan_base_IO_addr,
392 /* Init: 0x0080:0004 for non-AC-97
393 Init: 0x0080:0000 for AC-97
394 hi: Exponential volume change rate
396 lo: Positive shift count to shift the
397 16-bit input sample to obtain the
400 ___DSP_DUAL_16BIT_ALLOC(
401 CO_scale_shift_count,
402 CO_exp_vol_change_rate
405 /* Pointer to SCB at end of input chain */
406 ___DSP_DUAL_16BIT_ALLOC(
412 /* SCB for CODEC input algorithm */
413 struct dsp_codec_input_scb {
414 /* First 13 dwords from generic_scb_t */
415 struct dsp_basic_dma_req basic_req; /* Optional */
416 struct dsp_scatter_gather_ext sg_ext; /* Optional */
417 ___DSP_DUAL_16BIT_ALLOC(
418 next_scb, /* REQUIRED */
419 sub_list_ptr /* REQUIRED */
422 ___DSP_DUAL_16BIT_ALLOC(
423 entry_point, /* REQUIRED */
424 this_spb /* REQUIRED */
427 u32 strm_rs_config; /* REQUIRED */
428 u32 strm_buf_ptr; /* REQUIRED */
430 /* NOTE: The CODEC input task reads samples from the hardware FIFO
431 sublist at the DMA source address word (sub_list_ptr->basic_req.saw).
432 After the required number of samples is transferred, the CODEC
433 output task advances sub_list_ptr->basic_req.saw past the samples
434 consumed. SPuD must initialize the sub_list_ptr->basic_req.saw
435 to point half-way around from the initial sub_list_ptr->strm_nuf_ptr
436 to allow for lag/lead.
439 /* Init. 0000:0010 for SDout
442 hi: Base IO address of FIFO to which
443 the left-channel samples are to
445 lo: Displacement for the base IO
446 address for left-channel to obtain
447 the base IO address for the FIFO
448 to which the right-channel samples
451 ___DSP_DUAL_16BIT_ALLOC(
453 left_chan_base_IN_addr
456 lo: Negative shift count to shift the
457 32-bit input dword to obtain the
458 16-bit sample msb-aligned (count
459 is negative to shift left)
461 ___DSP_DUAL_16BIT_ALLOC(
470 struct dsp_pcm_serial_input_scb {
471 /* First 13 dwords from generic_scb_t */
472 struct dsp_basic_dma_req basic_req; /* Optional */
473 struct dsp_scatter_gather_ext sg_ext; /* Optional */
474 ___DSP_DUAL_16BIT_ALLOC(
475 next_scb, /* REQUIRED */
476 sub_list_ptr /* REQUIRED */
479 ___DSP_DUAL_16BIT_ALLOC(
480 entry_point, /* REQUIRED */
481 this_spb /* REQUIRED */
484 u32 strm_buf_ptr; /* REQUIRED */
485 u32 strm_rs_config; /* REQUIRED */
487 /* Init. Ptr to CODEC input SCB
488 hi: Pointer to the SCB containing the
489 input buffer to which CODEC input
491 lo: Flag indicating the link to the CODEC
492 input task is to be initialized
494 ___DSP_DUAL_16BIT_ALLOC(
495 init_codec_input_link,
499 /* Initialized by the host (host updates target volumes) */
500 struct dsp_volume_control psi_vol_ctrl;
504 struct dsp_src_task_scb {
505 ___DSP_DUAL_16BIT_ALLOC(
510 ___DSP_DUAL_16BIT_ALLOC(
512 num_extra_tnput_samples
515 ___DSP_DUAL_16BIT_ALLOC(
520 ___DSP_DUAL_16BIT_ALLOC(
521 output_buf_producer_ptr,
525 ___DSP_DUAL_16BIT_ALLOC(
530 u32 input_buf_strm_config;
532 ___DSP_DUAL_16BIT_ALLOC(
533 reserved_for_SRC_use,
534 input_buf_consumer_ptr
539 ___DSP_DUAL_16BIT_ALLOC(
540 exp_src_vol_change_rate,
541 input_buf_producer_ptr
544 ___DSP_DUAL_16BIT_ALLOC(
549 ___DSP_DUAL_16BIT_ALLOC(
554 u32 src_strm_rs_config;
555 u32 src_strm_buf_ptr;
557 u32 phiIncr6int_26frac;
559 struct dsp_volume_control src_vol_ctrl;
562 struct dsp_decimate_by_pow2_scb {
563 /* decimationFactor = 2, 4, or 8 (larger factors waste too much memory
564 when compared to cascading decimators)
566 ___DSP_DUAL_16BIT_ALLOC(
571 /* coefIncrement = 128 / decimationFactor (for our ROM filter)
572 coefBasePtr = 0x8000 (for our ROM filter)
574 ___DSP_DUAL_16BIT_ALLOC(
575 dec2_in_samples_per_out_triplet,
576 dec2_extra_in_samples
578 /* extraInSamples: # of accumulated, unused input samples (init. to 0)
579 inSamplesPerOutTriplet = 3 * decimationFactor
582 ___DSP_DUAL_16BIT_ALLOC(
584 dec2_half_num_taps_mp5
586 /* halfNumTapsM5: (1/2 number of taps in decimation filter) minus 5
587 const2thirds: constant 2/3 in 16Q0 format (sign.15)
590 ___DSP_DUAL_16BIT_ALLOC(
591 dec2_output_buf_producer_ptr,
597 u32 dec2_input_nuf_strm_config;
598 /* inputBufStrmConfig: rsConfig for the input buffer to the decimator
599 (buffer size = decimationFactor * 32 dwords)
602 ___DSP_DUAL_16BIT_ALLOC(
604 dec2_input_buf_consumer_ptr
606 /* inputBufConsumerPtr: Input buffer read pointer (into SRC filter)
607 phiIncr = decimationFactor * 4
612 ___DSP_DUAL_16BIT_ALLOC(
613 dec2_exp_vol_change_rate,
614 dec2_input_buf_producer_ptr
616 /* inputBufProducerPtr: Input buffer write pointer
617 expVolChangeRate: Exponential volume change rate for possible
618 future mixer on input streams
621 ___DSP_DUAL_16BIT_ALLOC(
626 ___DSP_DUAL_16BIT_ALLOC(
631 u32 dec2_strm_rs_config;
632 u32 dec2_strm_buf_ptr;
636 struct dsp_volume_control dec2_vol_ctrl; /* Not used! */
639 struct dsp_vari_decimate_scb {
640 ___DSP_DUAL_16BIT_ALLOC(
641 vdec_frames_left_in_gof,
642 vdec_gofs_left_in_sec
645 ___DSP_DUAL_16BIT_ALLOC(
647 vdec_extra_in_samples
649 /* extraInSamples: # of accumulated, unused input samples (init. to 0)
650 const2thirds: constant 2/3 in 16Q0 format (sign.15) */
652 ___DSP_DUAL_16BIT_ALLOC(
654 vdec_correction_per_sec
657 ___DSP_DUAL_16BIT_ALLOC(
658 vdec_output_buf_producer_ptr,
659 vdec_input_buf_consumer_ptr
661 /* inputBufConsumerPtr: Input buffer read pointer (into SRC filter) */
662 ___DSP_DUAL_16BIT_ALLOC(
667 u32 vdec_input_buf_strm_config;
668 /* inputBufStrmConfig: rsConfig for the input buffer to the decimator
669 (buffer size = 64 dwords) */
670 u32 vdec_coef_increment;
671 /* coefIncrement = - 128.0 / decimationFactor (as a 32Q15 number) */
674 /* accumPhi: accumulated fractional phase increment (6.26) */
676 ___DSP_DUAL_16BIT_ALLOC(
677 vdec_exp_vol_change_rate,
678 vdec_input_buf_producer_ptr
680 /* inputBufProducerPtr: Input buffer write pointer
681 expVolChangeRate: Exponential volume change rate for possible
682 future mixer on input streams */
684 ___DSP_DUAL_16BIT_ALLOC(
689 ___DSP_DUAL_16BIT_ALLOC(
694 u32 vdec_strm_rs_config;
695 u32 vdec_strm_buf_ptr;
697 u32 vdec_phi_incr_6int_26frac;
699 struct dsp_volume_control vdec_vol_ctrl;
703 /* SCB for MIX_TO_OSTREAM algorithm family */
704 struct dsp_mix2_ostream_scb {
705 /* First 13 dwords from generic_scb_t */
706 struct dsp_basic_dma_req basic_req; /* Optional */
707 struct dsp_scatter_gather_ext sg_ext; /* Optional */
708 ___DSP_DUAL_16BIT_ALLOC(
709 next_scb, /* REQUIRED */
710 sub_list_ptr /* REQUIRED */
713 ___DSP_DUAL_16BIT_ALLOC(
714 entry_point, /* REQUIRED */
715 this_spb /* REQUIRED */
718 u32 strm_rs_config; /* REQUIRED */
719 u32 strm_buf_ptr; /* REQUIRED */
722 /* hi: Number of mixed-down input triplets
723 computed since start of group
724 lo: Number of frames remaining to be
725 processed in the current group of
728 ___DSP_DUAL_16BIT_ALLOC(
729 frames_left_in_group,
733 /* hi: Exponential volume change rate
734 for mixer on input streams
735 lo: Number of frames in the group
737 ___DSP_DUAL_16BIT_ALLOC(
742 ___DSP_DUAL_16BIT_ALLOC(
749 /* SCB for S16_MIX algorithm */
750 struct dsp_mix_only_scb {
751 /* First 13 dwords from generic_scb_t */
752 struct dsp_basic_dma_req basic_req; /* Optional */
753 struct dsp_scatter_gather_ext sg_ext; /* Optional */
754 ___DSP_DUAL_16BIT_ALLOC(
755 next_scb, /* REQUIRED */
756 sub_list_ptr /* REQUIRED */
759 ___DSP_DUAL_16BIT_ALLOC(
760 entry_point, /* REQUIRED */
761 this_spb /* REQUIRED */
764 u32 strm_rs_config; /* REQUIRED */
765 u32 strm_buf_ptr; /* REQUIRED */
768 struct dsp_volume_control vol_ctrl;
771 /* SCB for the async. CODEC input algorithm */
772 struct dsp_async_codec_input_scb {
775 u32 io_current_total;
776 u32 io_previous_total;
781 u16 o_fifo_base_addr;
783 /* 1 = stereo; 0 = mono
784 xxx for ASER 1 (not allowed); 118 for ASER2 */
789 ___DSP_DUAL_16BIT_ALLOC(
796 ___DSP_DUAL_16BIT_ALLOC(
801 ___DSP_DUAL_16BIT_ALLOC(
809 /* Init. 0000:8042: for ASER1
810 0000:8044: for ASER2 */
811 ___DSP_DUAL_16BIT_ALLOC(
816 /* Init 1 stero:100 ASER1
817 Init 0 mono:110 ASER2
819 ___DSP_DUAL_16BIT_ALLOC(
828 /* SCB for the SP/DIF CODEC input and output */
829 struct dsp_spdifiscb {
830 ___DSP_DUAL_16BIT_ALLOC(
838 ___DSP_DUAL_16BIT_ALLOC(
845 ___DSP_DUAL_16BIT_ALLOC(
852 ___DSP_DUAL_16BIT_ALLOC(
859 ___DSP_DUAL_16BIT_ALLOC(
864 ___DSP_DUAL_16BIT_ALLOC(
872 ___DSP_DUAL_16BIT_ALLOC(
877 ___DSP_DUAL_16BIT_ALLOC(
886 /* SCB for the SP/DIF CODEC input and output */
887 struct dsp_spdifoscb {
893 /* Need to be here for compatibility with AsynchFGTxCode */
898 ___DSP_DUAL_16BIT_ALLOC(
905 ___DSP_DUAL_16BIT_ALLOC(
910 ___DSP_DUAL_16BIT_ALLOC(
917 ___DSP_DUAL_16BIT_ALLOC(
922 ___DSP_DUAL_16BIT_ALLOC(
931 struct dsp_asynch_fg_rx_scb {
932 ___DSP_DUAL_16BIT_ALLOC(
937 ___DSP_DUAL_16BIT_ALLOC(
942 ___DSP_DUAL_16BIT_ALLOC(
943 old_producer_pointer,
947 ___DSP_DUAL_16BIT_ALLOC(
954 ___DSP_DUAL_16BIT_ALLOC(
959 ___DSP_DUAL_16BIT_ALLOC(
970 ___DSP_DUAL_16BIT_ALLOC(
975 ___DSP_DUAL_16BIT_ALLOC(
982 struct dsp_asynch_fg_tx_scb {
983 ___DSP_DUAL_16BIT_ALLOC(
988 ___DSP_DUAL_16BIT_ALLOC(
993 ___DSP_DUAL_16BIT_ALLOC(
998 ___DSP_DUAL_16BIT_ALLOC(
1005 ___DSP_DUAL_16BIT_ALLOC(
1012 ___DSP_DUAL_16BIT_ALLOC(
1017 ___DSP_DUAL_16BIT_ALLOC(
1028 ___DSP_DUAL_16BIT_ALLOC(
1033 ___DSP_DUAL_16BIT_ALLOC(
1040 struct dsp_output_snoop_scb {
1041 /* First 13 dwords from generic_scb_t */
1042 struct dsp_basic_dma_req basic_req; /* Optional */
1043 struct dsp_scatter_gather_ext sg_ext; /* Optional */
1044 ___DSP_DUAL_16BIT_ALLOC(
1045 next_scb, /* REQUIRED */
1046 sub_list_ptr /* REQUIRED */
1049 ___DSP_DUAL_16BIT_ALLOC(
1050 entry_point, /* REQUIRED */
1051 this_spb /* REQUIRED */
1054 u32 strm_rs_config; /* REQUIRED */
1055 u32 strm_buf_ptr; /* REQUIRED */
1057 ___DSP_DUAL_16BIT_ALLOC(
1058 init_snoop_input_link,
1059 snoop_child_input_scb
1062 u32 snoop_input_buf_ptr;
1064 ___DSP_DUAL_16BIT_ALLOC(
1070 struct dsp_spio_write_scb {
1071 ___DSP_DUAL_16BIT_ALLOC(
1080 ___DSP_DUAL_16BIT_ALLOC(
1089 ___DSP_DUAL_16BIT_ALLOC(
1096 ___DSP_DUAL_16BIT_ALLOC(
1101 ___DSP_DUAL_16BIT_ALLOC(
1109 struct dsp_magic_snoop_task {
1125 ___DSP_DUAL_16BIT_ALLOC(
1130 ___DSP_DUAL_16BIT_ALLOC(
1135 u32 strm_buf_config;
1140 struct dsp_volume_control vdec_vol_ctrl;
1144 struct dsp_filter_scb {
1145 ___DSP_DUAL_16BIT_ALLOC(
1146 a0_right, /* 0x00 */
1149 ___DSP_DUAL_16BIT_ALLOC(
1150 a1_right, /* 0x01 */
1153 ___DSP_DUAL_16BIT_ALLOC(
1154 a2_right, /* 0x02 */
1157 ___DSP_DUAL_16BIT_ALLOC(
1158 output_buf_ptr, /* 0x03 */
1162 ___DSP_DUAL_16BIT_ALLOC(
1163 filter_unused3, /* 0x04 */
1167 u32 prev_sample_output1; /* 0x05 */
1168 u32 prev_sample_output2; /* 0x06 */
1169 u32 prev_sample_input1; /* 0x07 */
1170 u32 prev_sample_input2; /* 0x08 */
1172 ___DSP_DUAL_16BIT_ALLOC(
1173 next_scb_ptr, /* 0x09 */
1177 ___DSP_DUAL_16BIT_ALLOC(
1178 entry_point, /* 0x0A */
1182 u32 strm_rs_config; /* 0x0B */
1183 u32 strm_buf_ptr; /* 0x0C */
1185 ___DSP_DUAL_16BIT_ALLOC(
1186 b0_right, /* 0x0D */
1189 ___DSP_DUAL_16BIT_ALLOC(
1190 b1_right, /* 0x0E */
1193 ___DSP_DUAL_16BIT_ALLOC(
1194 b2_right, /* 0x0F */
1198 #endif /* __DSP_SCB_TYPES_H__ */