2 * motu-protocol-v3.c - a part of driver for MOTU FireWire series
4 * Copyright (c) 2015-2017 Takashi Sakamoto <o-takashi@sakamocchi.jp>
6 * Licensed under the terms of the GNU General Public License, version 2.
9 #include <linux/delay.h>
12 #define V3_CLOCK_STATUS_OFFSET 0x0b14
13 #define V3_FETCH_PCM_FRAMES 0x02000000
14 #define V3_CLOCK_RATE_MASK 0x0000ff00
15 #define V3_CLOCK_RATE_SHIFT 8
16 #define V3_CLOCK_SOURCE_MASK 0x000000ff
18 #define V3_OPT_IFACE_MODE_OFFSET 0x0c94
19 #define V3_ENABLE_OPT_IN_IFACE_A 0x00000001
20 #define V3_ENABLE_OPT_IN_IFACE_B 0x00000002
21 #define V3_ENABLE_OPT_OUT_IFACE_A 0x00000100
22 #define V3_ENABLE_OPT_OUT_IFACE_B 0x00000200
23 #define V3_NO_ADAT_OPT_IN_IFACE_A 0x00010000
24 #define V3_NO_ADAT_OPT_IN_IFACE_B 0x00100000
25 #define V3_NO_ADAT_OPT_OUT_IFACE_A 0x00040000
26 #define V3_NO_ADAT_OPT_OUT_IFACE_B 0x00400000
28 static int v3_get_clock_rate(struct snd_motu *motu, unsigned int *rate)
34 err = snd_motu_transaction_read(motu, V3_CLOCK_STATUS_OFFSET, ®,
38 data = be32_to_cpu(reg);
40 data = (data & V3_CLOCK_RATE_MASK) >> V3_CLOCK_RATE_SHIFT;
41 if (data >= ARRAY_SIZE(snd_motu_clock_rates))
44 *rate = snd_motu_clock_rates[data];
49 static int v3_set_clock_rate(struct snd_motu *motu, unsigned int rate)
56 for (i = 0; i < ARRAY_SIZE(snd_motu_clock_rates); ++i) {
57 if (snd_motu_clock_rates[i] == rate)
60 if (i == ARRAY_SIZE(snd_motu_clock_rates))
63 err = snd_motu_transaction_read(motu, V3_CLOCK_STATUS_OFFSET, ®,
67 data = be32_to_cpu(reg);
69 data &= ~(V3_CLOCK_RATE_MASK | V3_FETCH_PCM_FRAMES);
70 data |= i << V3_CLOCK_RATE_SHIFT;
72 need_to_wait = data != be32_to_cpu(reg);
74 reg = cpu_to_be32(data);
75 err = snd_motu_transaction_write(motu, V3_CLOCK_STATUS_OFFSET, ®,
82 if (msleep_interruptible(4000) > 0)
89 static int v3_get_clock_source(struct snd_motu *motu,
90 enum snd_motu_clock_source *src)
97 err = snd_motu_transaction_read(motu, V3_CLOCK_STATUS_OFFSET, ®,
101 data = be32_to_cpu(reg);
103 val = data & V3_CLOCK_SOURCE_MASK;
105 *src = SND_MOTU_CLOCK_SOURCE_INTERNAL;
106 } else if (val == 0x01) {
107 *src = SND_MOTU_CLOCK_SOURCE_WORD_ON_BNC;
108 } else if (val == 0x10) {
109 *src = SND_MOTU_CLOCK_SOURCE_SPDIF_ON_COAX;
110 } else if (val == 0x18 || val == 0x19) {
111 err = snd_motu_transaction_read(motu, V3_OPT_IFACE_MODE_OFFSET,
115 data = be32_to_cpu(reg);
118 if (data & V3_NO_ADAT_OPT_IN_IFACE_A)
119 *src = SND_MOTU_CLOCK_SOURCE_SPDIF_ON_OPT_A;
121 *src = SND_MOTU_CLOCK_SOURCE_ADAT_ON_OPT_A;
123 if (data & V3_NO_ADAT_OPT_IN_IFACE_B)
124 *src = SND_MOTU_CLOCK_SOURCE_SPDIF_ON_OPT_B;
126 *src = SND_MOTU_CLOCK_SOURCE_ADAT_ON_OPT_B;
129 *src = SND_MOTU_CLOCK_SOURCE_UNKNOWN;
135 static int v3_switch_fetching_mode(struct snd_motu *motu, bool enable)
141 err = snd_motu_transaction_read(motu, V3_CLOCK_STATUS_OFFSET, ®,
145 data = be32_to_cpu(reg);
148 data |= V3_FETCH_PCM_FRAMES;
150 data &= ~V3_FETCH_PCM_FRAMES;
152 reg = cpu_to_be32(data);
153 return snd_motu_transaction_write(motu, V3_CLOCK_STATUS_OFFSET, ®,
157 static void calculate_fixed_part(struct snd_motu_packet_format *formats,
158 enum amdtp_stream_direction dir,
159 enum snd_motu_spec_flags flags,
160 unsigned char analog_ports)
162 unsigned char pcm_chunks[3] = {0, 0, 0};
164 formats->msg_chunks = 2;
166 pcm_chunks[0] = analog_ports;
167 pcm_chunks[1] = analog_ports;
168 if (flags & SND_MOTU_SPEC_SUPPORT_CLOCK_X4)
169 pcm_chunks[2] = analog_ports;
171 if (dir == AMDTP_IN_STREAM) {
172 if (flags & SND_MOTU_SPEC_TX_MICINST_CHUNK) {
175 if (flags & SND_MOTU_SPEC_SUPPORT_CLOCK_X4)
179 if (flags & SND_MOTU_SPEC_TX_RETURN_CHUNK) {
182 if (flags & SND_MOTU_SPEC_SUPPORT_CLOCK_X4)
186 if (flags & SND_MOTU_SPEC_TX_REVERB_CHUNK) {
192 * Packets to v2 units transfer main-out-1/2 and phone-out-1/2.
199 * At least, packets have two data chunks for S/PDIF on coaxial
206 * Fixed part consists of PCM chunks multiple of 4, with msg chunks. As
207 * a result, this part can includes empty data chunks.
209 formats->fixed_part_pcm_chunks[0] = round_up(2 + pcm_chunks[0], 4) - 2;
210 formats->fixed_part_pcm_chunks[1] = round_up(2 + pcm_chunks[1], 4) - 2;
211 if (flags & SND_MOTU_SPEC_SUPPORT_CLOCK_X4)
212 formats->fixed_part_pcm_chunks[2] =
213 round_up(2 + pcm_chunks[2], 4) - 2;
216 static void calculate_differed_part(struct snd_motu_packet_format *formats,
217 enum snd_motu_spec_flags flags, u32 data,
218 u32 a_enable_mask, u32 a_no_adat_mask,
219 u32 b_enable_mask, u32 b_no_adat_mask)
221 unsigned char pcm_chunks[3] = {0, 0, 0};
224 if ((flags & SND_MOTU_SPEC_HAS_OPT_IFACE_A) && (data & a_enable_mask)) {
225 if (data & a_no_adat_mask) {
227 * Additional two data chunks for S/PDIF on optical
228 * interface A. This includes empty data chunks.
234 * Additional data chunks for ADAT on optical interface
242 if ((flags & SND_MOTU_SPEC_HAS_OPT_IFACE_B) && (data & b_enable_mask)) {
243 if (data & b_no_adat_mask) {
245 * Additional two data chunks for S/PDIF on optical
246 * interface B. This includes empty data chunks.
252 * Additional data chunks for ADAT on optical interface
260 for (i = 0; i < 3; ++i) {
261 if (pcm_chunks[i] > 0)
262 pcm_chunks[i] = round_up(pcm_chunks[i], 4);
264 formats->differed_part_pcm_chunks[i] = pcm_chunks[i];
268 static int v3_cache_packet_formats(struct snd_motu *motu)
274 err = snd_motu_transaction_read(motu, V3_OPT_IFACE_MODE_OFFSET, ®,
278 data = be32_to_cpu(reg);
280 calculate_fixed_part(&motu->tx_packet_formats, AMDTP_IN_STREAM,
281 motu->spec->flags, motu->spec->analog_in_ports);
282 calculate_differed_part(&motu->tx_packet_formats,
283 motu->spec->flags, data,
284 V3_ENABLE_OPT_IN_IFACE_A, V3_NO_ADAT_OPT_IN_IFACE_A,
285 V3_ENABLE_OPT_IN_IFACE_B, V3_NO_ADAT_OPT_IN_IFACE_B);
287 calculate_fixed_part(&motu->rx_packet_formats, AMDTP_OUT_STREAM,
288 motu->spec->flags, motu->spec->analog_out_ports);
289 calculate_differed_part(&motu->rx_packet_formats,
290 motu->spec->flags, data,
291 V3_ENABLE_OPT_OUT_IFACE_A, V3_NO_ADAT_OPT_OUT_IFACE_A,
292 V3_ENABLE_OPT_OUT_IFACE_B, V3_NO_ADAT_OPT_OUT_IFACE_B);
294 motu->tx_packet_formats.pcm_byte_offset = 10;
295 motu->rx_packet_formats.pcm_byte_offset = 10;
300 const struct snd_motu_protocol snd_motu_protocol_v3 = {
301 .get_clock_rate = v3_get_clock_rate,
302 .set_clock_rate = v3_set_clock_rate,
303 .get_clock_source = v3_get_clock_source,
304 .switch_fetching_mode = v3_switch_fetching_mode,
305 .cache_packet_formats = v3_cache_packet_formats,