1 // SPDX-License-Identifier: GPL-2.0-only
3 * Audio and Music Data Transmission Protocol (IEC 61883-6) streams
4 * with Common Isochronous Packet (IEC 61883-1) headers
6 * Copyright (c) Clemens Ladisch <clemens@ladisch.de>
9 #include <linux/device.h>
10 #include <linux/err.h>
11 #include <linux/firewire.h>
12 #include <linux/module.h>
13 #include <linux/slab.h>
14 #include <sound/pcm.h>
15 #include <sound/pcm_params.h>
16 #include "amdtp-stream.h"
18 #define TICKS_PER_CYCLE 3072
19 #define CYCLES_PER_SECOND 8000
20 #define TICKS_PER_SECOND (TICKS_PER_CYCLE * CYCLES_PER_SECOND)
22 /* Always support Linux tracing subsystem. */
23 #define CREATE_TRACE_POINTS
24 #include "amdtp-stream-trace.h"
26 #define TRANSFER_DELAY_TICKS 0x2e00 /* 479.17 microseconds */
28 /* isochronous header parameters */
29 #define ISO_DATA_LENGTH_SHIFT 16
30 #define TAG_NO_CIP_HEADER 0
33 /* common isochronous packet header parameters */
34 #define CIP_EOH_SHIFT 31
35 #define CIP_EOH (1u << CIP_EOH_SHIFT)
36 #define CIP_EOH_MASK 0x80000000
37 #define CIP_SID_SHIFT 24
38 #define CIP_SID_MASK 0x3f000000
39 #define CIP_DBS_MASK 0x00ff0000
40 #define CIP_DBS_SHIFT 16
41 #define CIP_SPH_MASK 0x00000400
42 #define CIP_SPH_SHIFT 10
43 #define CIP_DBC_MASK 0x000000ff
44 #define CIP_FMT_SHIFT 24
45 #define CIP_FMT_MASK 0x3f000000
46 #define CIP_FDF_MASK 0x00ff0000
47 #define CIP_FDF_SHIFT 16
48 #define CIP_SYT_MASK 0x0000ffff
49 #define CIP_SYT_NO_INFO 0xffff
51 /* Audio and Music transfer protocol specific parameters */
52 #define CIP_FMT_AM 0x10
53 #define AMDTP_FDF_NO_DATA 0xff
55 /* TODO: make these configurable */
56 #define INTERRUPT_INTERVAL 16
57 #define QUEUE_LENGTH 48
59 // For iso header, tstamp and 2 CIP header.
60 #define IR_CTX_HEADER_SIZE_CIP 16
61 // For iso header and tstamp.
62 #define IR_CTX_HEADER_SIZE_NO_CIP 8
63 #define HEADER_TSTAMP_MASK 0x0000ffff
65 #define IT_PKT_HEADER_SIZE_CIP 8 // For 2 CIP header.
66 #define IT_PKT_HEADER_SIZE_NO_CIP 0 // Nothing.
68 static void pcm_period_tasklet(unsigned long data);
71 * amdtp_stream_init - initialize an AMDTP stream structure
72 * @s: the AMDTP stream to initialize
73 * @unit: the target of the stream
74 * @dir: the direction of stream
75 * @flags: the packet transmission method to use
76 * @fmt: the value of fmt field in CIP header
77 * @process_ctx_payloads: callback handler to process payloads of isoc context
78 * @protocol_size: the size to allocate newly for protocol
80 int amdtp_stream_init(struct amdtp_stream *s, struct fw_unit *unit,
81 enum amdtp_stream_direction dir, enum cip_flags flags,
83 amdtp_stream_process_ctx_payloads_t process_ctx_payloads,
84 unsigned int protocol_size)
86 if (process_ctx_payloads == NULL)
89 s->protocol = kzalloc(protocol_size, GFP_KERNEL);
96 s->context = ERR_PTR(-1);
97 mutex_init(&s->mutex);
98 tasklet_init(&s->period_tasklet, pcm_period_tasklet, (unsigned long)s);
101 init_waitqueue_head(&s->callback_wait);
102 s->callbacked = false;
105 s->process_ctx_payloads = process_ctx_payloads;
107 if (dir == AMDTP_OUT_STREAM)
108 s->ctx_data.rx.syt_override = -1;
112 EXPORT_SYMBOL(amdtp_stream_init);
115 * amdtp_stream_destroy - free stream resources
116 * @s: the AMDTP stream to destroy
118 void amdtp_stream_destroy(struct amdtp_stream *s)
120 /* Not initialized. */
121 if (s->protocol == NULL)
124 WARN_ON(amdtp_stream_running(s));
126 mutex_destroy(&s->mutex);
128 EXPORT_SYMBOL(amdtp_stream_destroy);
130 const unsigned int amdtp_syt_intervals[CIP_SFC_COUNT] = {
134 [CIP_SFC_88200] = 16,
135 [CIP_SFC_96000] = 16,
136 [CIP_SFC_176400] = 32,
137 [CIP_SFC_192000] = 32,
139 EXPORT_SYMBOL(amdtp_syt_intervals);
141 const unsigned int amdtp_rate_table[CIP_SFC_COUNT] = {
142 [CIP_SFC_32000] = 32000,
143 [CIP_SFC_44100] = 44100,
144 [CIP_SFC_48000] = 48000,
145 [CIP_SFC_88200] = 88200,
146 [CIP_SFC_96000] = 96000,
147 [CIP_SFC_176400] = 176400,
148 [CIP_SFC_192000] = 192000,
150 EXPORT_SYMBOL(amdtp_rate_table);
152 static int apply_constraint_to_size(struct snd_pcm_hw_params *params,
153 struct snd_pcm_hw_rule *rule)
155 struct snd_interval *s = hw_param_interval(params, rule->var);
156 const struct snd_interval *r =
157 hw_param_interval_c(params, SNDRV_PCM_HW_PARAM_RATE);
158 struct snd_interval t = {0};
159 unsigned int step = 0;
162 for (i = 0; i < CIP_SFC_COUNT; ++i) {
163 if (snd_interval_test(r, amdtp_rate_table[i]))
164 step = max(step, amdtp_syt_intervals[i]);
167 t.min = roundup(s->min, step);
168 t.max = rounddown(s->max, step);
171 return snd_interval_refine(s, &t);
175 * amdtp_stream_add_pcm_hw_constraints - add hw constraints for PCM substream
176 * @s: the AMDTP stream, which must be initialized.
177 * @runtime: the PCM substream runtime
179 int amdtp_stream_add_pcm_hw_constraints(struct amdtp_stream *s,
180 struct snd_pcm_runtime *runtime)
182 struct snd_pcm_hardware *hw = &runtime->hw;
185 hw->info = SNDRV_PCM_INFO_BATCH |
186 SNDRV_PCM_INFO_BLOCK_TRANSFER |
187 SNDRV_PCM_INFO_INTERLEAVED |
188 SNDRV_PCM_INFO_JOINT_DUPLEX |
189 SNDRV_PCM_INFO_MMAP |
190 SNDRV_PCM_INFO_MMAP_VALID;
192 /* SNDRV_PCM_INFO_BATCH */
194 hw->periods_max = UINT_MAX;
196 /* bytes for a frame */
197 hw->period_bytes_min = 4 * hw->channels_max;
199 /* Just to prevent from allocating much pages. */
200 hw->period_bytes_max = hw->period_bytes_min * 2048;
201 hw->buffer_bytes_max = hw->period_bytes_max * hw->periods_min;
204 * Currently firewire-lib processes 16 packets in one software
205 * interrupt callback. This equals to 2msec but actually the
206 * interval of the interrupts has a jitter.
207 * Additionally, even if adding a constraint to fit period size to
208 * 2msec, actual calculated frames per period doesn't equal to 2msec,
209 * depending on sampling rate.
210 * Anyway, the interval to call snd_pcm_period_elapsed() cannot 2msec.
211 * Here let us use 5msec for safe period interrupt.
213 err = snd_pcm_hw_constraint_minmax(runtime,
214 SNDRV_PCM_HW_PARAM_PERIOD_TIME,
219 /* Non-Blocking stream has no more constraints */
220 if (!(s->flags & CIP_BLOCKING))
224 * One AMDTP packet can include some frames. In blocking mode, the
225 * number equals to SYT_INTERVAL. So the number is 8, 16 or 32,
226 * depending on its sampling rate. For accurate period interrupt, it's
227 * preferrable to align period/buffer sizes to current SYT_INTERVAL.
229 err = snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_SIZE,
230 apply_constraint_to_size, NULL,
231 SNDRV_PCM_HW_PARAM_PERIOD_SIZE,
232 SNDRV_PCM_HW_PARAM_RATE, -1);
235 err = snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_SIZE,
236 apply_constraint_to_size, NULL,
237 SNDRV_PCM_HW_PARAM_BUFFER_SIZE,
238 SNDRV_PCM_HW_PARAM_RATE, -1);
244 EXPORT_SYMBOL(amdtp_stream_add_pcm_hw_constraints);
247 * amdtp_stream_set_parameters - set stream parameters
248 * @s: the AMDTP stream to configure
249 * @rate: the sample rate
250 * @data_block_quadlets: the size of a data block in quadlet unit
252 * The parameters must be set before the stream is started, and must not be
253 * changed while the stream is running.
255 int amdtp_stream_set_parameters(struct amdtp_stream *s, unsigned int rate,
256 unsigned int data_block_quadlets)
260 for (sfc = 0; sfc < ARRAY_SIZE(amdtp_rate_table); ++sfc) {
261 if (amdtp_rate_table[sfc] == rate)
264 if (sfc == ARRAY_SIZE(amdtp_rate_table))
268 s->data_block_quadlets = data_block_quadlets;
269 s->syt_interval = amdtp_syt_intervals[sfc];
271 // default buffering in the device.
272 if (s->direction == AMDTP_OUT_STREAM) {
273 s->ctx_data.rx.transfer_delay =
274 TRANSFER_DELAY_TICKS - TICKS_PER_CYCLE;
276 if (s->flags & CIP_BLOCKING) {
277 // additional buffering needed to adjust for no-data
279 s->ctx_data.rx.transfer_delay +=
280 TICKS_PER_SECOND * s->syt_interval / rate;
286 EXPORT_SYMBOL(amdtp_stream_set_parameters);
289 * amdtp_stream_get_max_payload - get the stream's packet size
290 * @s: the AMDTP stream
292 * This function must not be called before the stream has been configured
293 * with amdtp_stream_set_parameters().
295 unsigned int amdtp_stream_get_max_payload(struct amdtp_stream *s)
297 unsigned int multiplier = 1;
298 unsigned int cip_header_size = 0;
300 if (s->flags & CIP_JUMBO_PAYLOAD)
302 if (!(s->flags & CIP_NO_HEADER))
303 cip_header_size = sizeof(__be32) * 2;
305 return cip_header_size +
306 s->syt_interval * s->data_block_quadlets * sizeof(__be32) * multiplier;
308 EXPORT_SYMBOL(amdtp_stream_get_max_payload);
311 * amdtp_stream_pcm_prepare - prepare PCM device for running
312 * @s: the AMDTP stream
314 * This function should be called from the PCM device's .prepare callback.
316 void amdtp_stream_pcm_prepare(struct amdtp_stream *s)
318 tasklet_kill(&s->period_tasklet);
319 s->pcm_buffer_pointer = 0;
320 s->pcm_period_pointer = 0;
322 EXPORT_SYMBOL(amdtp_stream_pcm_prepare);
324 static unsigned int calculate_data_blocks(struct amdtp_stream *s,
327 unsigned int phase, data_blocks;
330 if (s->flags & CIP_BLOCKING) {
331 /* This module generate empty packet for 'no data'. */
332 if (syt == CIP_SYT_NO_INFO)
335 data_blocks = s->syt_interval;
336 /* Non-blocking mode. */
338 if (!cip_sfc_is_base_44100(s->sfc)) {
339 // Sample_rate / 8000 is an integer, and precomputed.
340 data_blocks = s->ctx_data.rx.data_block_state;
342 phase = s->ctx_data.rx.data_block_state;
345 * This calculates the number of data blocks per packet so that
346 * 1) the overall rate is correct and exactly synchronized to
348 * 2) packets with a rounded-up number of blocks occur as early
349 * as possible in the sequence (to prevent underruns of the
352 if (s->sfc == CIP_SFC_44100)
353 /* 6 6 5 6 5 6 5 ... */
354 data_blocks = 5 + ((phase & 1) ^
355 (phase == 0 || phase >= 40));
357 /* 12 11 11 11 11 ... or 23 22 22 22 22 ... */
358 data_blocks = 11 * (s->sfc >> 1) + (phase == 0);
359 if (++phase >= (80 >> (s->sfc >> 1)))
361 s->ctx_data.rx.data_block_state = phase;
368 static unsigned int calculate_syt(struct amdtp_stream *s,
371 unsigned int syt_offset, phase, index, syt;
373 if (s->ctx_data.rx.last_syt_offset < TICKS_PER_CYCLE) {
374 if (!cip_sfc_is_base_44100(s->sfc))
375 syt_offset = s->ctx_data.rx.last_syt_offset +
376 s->ctx_data.rx.syt_offset_state;
379 * The time, in ticks, of the n'th SYT_INTERVAL sample is:
380 * n * SYT_INTERVAL * 24576000 / sample_rate
381 * Modulo TICKS_PER_CYCLE, the difference between successive
382 * elements is about 1386.23. Rounding the results of this
383 * formula to the SYT precision results in a sequence of
384 * differences that begins with:
385 * 1386 1386 1387 1386 1386 1386 1387 1386 1386 1386 1387 ...
386 * This code generates _exactly_ the same sequence.
388 phase = s->ctx_data.rx.syt_offset_state;
390 syt_offset = s->ctx_data.rx.last_syt_offset;
391 syt_offset += 1386 + ((index && !(index & 3)) ||
395 s->ctx_data.rx.syt_offset_state = phase;
398 syt_offset = s->ctx_data.rx.last_syt_offset - TICKS_PER_CYCLE;
399 s->ctx_data.rx.last_syt_offset = syt_offset;
401 if (syt_offset < TICKS_PER_CYCLE) {
402 syt_offset += s->ctx_data.rx.transfer_delay;
403 syt = (cycle + syt_offset / TICKS_PER_CYCLE) << 12;
404 syt += syt_offset % TICKS_PER_CYCLE;
406 return syt & CIP_SYT_MASK;
408 return CIP_SYT_NO_INFO;
412 static void update_pcm_pointers(struct amdtp_stream *s,
413 struct snd_pcm_substream *pcm,
418 ptr = s->pcm_buffer_pointer + frames;
419 if (ptr >= pcm->runtime->buffer_size)
420 ptr -= pcm->runtime->buffer_size;
421 WRITE_ONCE(s->pcm_buffer_pointer, ptr);
423 s->pcm_period_pointer += frames;
424 if (s->pcm_period_pointer >= pcm->runtime->period_size) {
425 s->pcm_period_pointer -= pcm->runtime->period_size;
426 tasklet_hi_schedule(&s->period_tasklet);
430 static void pcm_period_tasklet(unsigned long data)
432 struct amdtp_stream *s = (void *)data;
433 struct snd_pcm_substream *pcm = READ_ONCE(s->pcm);
436 snd_pcm_period_elapsed(pcm);
439 static int queue_packet(struct amdtp_stream *s, struct fw_iso_packet *params)
443 params->interrupt = IS_ALIGNED(s->packet_index + 1, INTERRUPT_INTERVAL);
444 params->tag = s->tag;
447 err = fw_iso_context_queue(s->context, params, &s->buffer.iso_buffer,
448 s->buffer.packets[s->packet_index].offset);
450 dev_err(&s->unit->device, "queueing error: %d\n", err);
454 if (++s->packet_index >= QUEUE_LENGTH)
460 static inline int queue_out_packet(struct amdtp_stream *s,
461 struct fw_iso_packet *params)
464 !!(params->header_length == 0 && params->payload_length == 0);
465 return queue_packet(s, params);
468 static inline int queue_in_packet(struct amdtp_stream *s,
469 struct fw_iso_packet *params)
471 // Queue one packet for IR context.
472 params->header_length = s->ctx_data.tx.ctx_header_size;
473 params->payload_length = s->ctx_data.tx.max_ctx_payload_length;
474 params->skip = false;
475 return queue_packet(s, params);
478 static void generate_cip_header(struct amdtp_stream *s, __be32 cip_header[2],
479 unsigned int data_block_counter, unsigned int syt)
481 cip_header[0] = cpu_to_be32(READ_ONCE(s->source_node_id_field) |
482 (s->data_block_quadlets << CIP_DBS_SHIFT) |
483 ((s->sph << CIP_SPH_SHIFT) & CIP_SPH_MASK) |
485 cip_header[1] = cpu_to_be32(CIP_EOH |
486 ((s->fmt << CIP_FMT_SHIFT) & CIP_FMT_MASK) |
487 ((s->ctx_data.rx.fdf << CIP_FDF_SHIFT) & CIP_FDF_MASK) |
488 (syt & CIP_SYT_MASK));
491 static void build_it_pkt_header(struct amdtp_stream *s, unsigned int cycle,
492 struct fw_iso_packet *params,
493 unsigned int data_blocks,
494 unsigned int data_block_counter,
495 unsigned int syt, unsigned int index)
497 unsigned int payload_length;
500 payload_length = data_blocks * sizeof(__be32) * s->data_block_quadlets;
501 params->payload_length = payload_length;
503 if (!(s->flags & CIP_NO_HEADER)) {
504 cip_header = (__be32 *)params->header;
505 generate_cip_header(s, cip_header, data_block_counter, syt);
506 params->header_length = 2 * sizeof(__be32);
507 payload_length += params->header_length;
512 trace_amdtp_packet(s, cycle, cip_header, payload_length, data_blocks,
513 data_block_counter, index);
516 static int check_cip_header(struct amdtp_stream *s, const __be32 *buf,
517 unsigned int payload_length,
518 unsigned int *data_blocks,
519 unsigned int *data_block_counter, unsigned int *syt)
528 cip_header[0] = be32_to_cpu(buf[0]);
529 cip_header[1] = be32_to_cpu(buf[1]);
532 * This module supports 'Two-quadlet CIP header with SYT field'.
533 * For convenience, also check FMT field is AM824 or not.
535 if ((((cip_header[0] & CIP_EOH_MASK) == CIP_EOH) ||
536 ((cip_header[1] & CIP_EOH_MASK) != CIP_EOH)) &&
537 (!(s->flags & CIP_HEADER_WITHOUT_EOH))) {
538 dev_info_ratelimited(&s->unit->device,
539 "Invalid CIP header for AMDTP: %08X:%08X\n",
540 cip_header[0], cip_header[1]);
544 /* Check valid protocol or not. */
545 sph = (cip_header[0] & CIP_SPH_MASK) >> CIP_SPH_SHIFT;
546 fmt = (cip_header[1] & CIP_FMT_MASK) >> CIP_FMT_SHIFT;
547 if (sph != s->sph || fmt != s->fmt) {
548 dev_info_ratelimited(&s->unit->device,
549 "Detect unexpected protocol: %08x %08x\n",
550 cip_header[0], cip_header[1]);
554 /* Calculate data blocks */
555 fdf = (cip_header[1] & CIP_FDF_MASK) >> CIP_FDF_SHIFT;
556 if (payload_length < sizeof(__be32) * 2 ||
557 (fmt == CIP_FMT_AM && fdf == AMDTP_FDF_NO_DATA)) {
560 unsigned int data_block_quadlets =
561 (cip_header[0] & CIP_DBS_MASK) >> CIP_DBS_SHIFT;
562 /* avoid division by zero */
563 if (data_block_quadlets == 0) {
564 dev_err(&s->unit->device,
565 "Detect invalid value in dbs field: %08X\n",
569 if (s->flags & CIP_WRONG_DBS)
570 data_block_quadlets = s->data_block_quadlets;
572 *data_blocks = (payload_length / sizeof(__be32) - 2) /
576 /* Check data block counter continuity */
577 dbc = cip_header[0] & CIP_DBC_MASK;
578 if (*data_blocks == 0 && (s->flags & CIP_EMPTY_HAS_WRONG_DBC) &&
579 *data_block_counter != UINT_MAX)
580 dbc = *data_block_counter;
582 if ((dbc == 0x00 && (s->flags & CIP_SKIP_DBC_ZERO_CHECK)) ||
583 *data_block_counter == UINT_MAX) {
585 } else if (!(s->flags & CIP_DBC_IS_END_EVENT)) {
586 lost = dbc != *data_block_counter;
588 unsigned int dbc_interval;
590 if (*data_blocks > 0 && s->ctx_data.tx.dbc_interval > 0)
591 dbc_interval = s->ctx_data.tx.dbc_interval;
593 dbc_interval = *data_blocks;
595 lost = dbc != ((*data_block_counter + dbc_interval) & 0xff);
599 dev_err(&s->unit->device,
600 "Detect discontinuity of CIP: %02X %02X\n",
601 *data_block_counter, dbc);
605 *data_block_counter = dbc;
607 *syt = cip_header[1] & CIP_SYT_MASK;
612 static int parse_ir_ctx_header(struct amdtp_stream *s, unsigned int cycle,
613 const __be32 *ctx_header,
614 unsigned int *payload_length,
615 unsigned int *data_blocks,
616 unsigned int *data_block_counter,
617 unsigned int *syt, unsigned int index)
619 const __be32 *cip_header;
620 unsigned int cip_header_size;
623 *payload_length = be32_to_cpu(ctx_header[0]) >> ISO_DATA_LENGTH_SHIFT;
625 if (!(s->flags & CIP_NO_HEADER))
630 if (*payload_length > cip_header_size + s->ctx_data.tx.max_ctx_payload_length) {
631 dev_err(&s->unit->device,
632 "Detect jumbo payload: %04x %04x\n",
633 *payload_length, cip_header_size + s->ctx_data.tx.max_ctx_payload_length);
637 if (cip_header_size > 0) {
638 cip_header = ctx_header + 2;
639 err = check_cip_header(s, cip_header, *payload_length,
640 data_blocks, data_block_counter, syt);
646 *data_blocks = *payload_length / sizeof(__be32) /
647 s->data_block_quadlets;
650 if (*data_block_counter == UINT_MAX)
651 *data_block_counter = 0;
654 trace_amdtp_packet(s, cycle, cip_header, *payload_length, *data_blocks,
655 *data_block_counter, index);
660 // In CYCLE_TIMER register of IEEE 1394, 7 bits are used to represent second. On
661 // the other hand, in DMA descriptors of 1394 OHCI, 3 bits are used to represent
662 // it. Thus, via Linux firewire subsystem, we can get the 3 bits for second.
663 static inline u32 compute_cycle_count(__be32 ctx_header_tstamp)
665 u32 tstamp = be32_to_cpu(ctx_header_tstamp) & HEADER_TSTAMP_MASK;
666 return (((tstamp >> 13) & 0x07) * 8000) + (tstamp & 0x1fff);
669 static inline u32 increment_cycle_count(u32 cycle, unsigned int addend)
672 if (cycle >= 8 * CYCLES_PER_SECOND)
673 cycle -= 8 * CYCLES_PER_SECOND;
677 // Align to actual cycle count for the packet which is going to be scheduled.
678 // This module queued the same number of isochronous cycle as QUEUE_LENGTH to
679 // skip isochronous cycle, therefore it's OK to just increment the cycle by
680 // QUEUE_LENGTH for scheduled cycle.
681 static inline u32 compute_it_cycle(const __be32 ctx_header_tstamp)
683 u32 cycle = compute_cycle_count(ctx_header_tstamp);
684 return increment_cycle_count(cycle, QUEUE_LENGTH);
687 static int generate_device_pkt_descs(struct amdtp_stream *s,
688 struct pkt_desc *descs,
689 const __be32 *ctx_header,
690 unsigned int packets)
692 unsigned int dbc = s->data_block_counter;
696 for (i = 0; i < packets; ++i) {
697 struct pkt_desc *desc = descs + i;
698 unsigned int index = (s->packet_index + i) % QUEUE_LENGTH;
700 unsigned int payload_length;
701 unsigned int data_blocks;
704 cycle = compute_cycle_count(ctx_header[1]);
706 err = parse_ir_ctx_header(s, cycle, ctx_header, &payload_length,
707 &data_blocks, &dbc, &syt, i);
713 desc->data_blocks = data_blocks;
714 desc->data_block_counter = dbc;
715 desc->ctx_payload = s->buffer.packets[index].buffer;
717 if (!(s->flags & CIP_DBC_IS_END_EVENT))
718 dbc = (dbc + desc->data_blocks) & 0xff;
721 s->ctx_data.tx.ctx_header_size / sizeof(*ctx_header);
724 s->data_block_counter = dbc;
729 static void generate_ideal_pkt_descs(struct amdtp_stream *s,
730 struct pkt_desc *descs,
731 const __be32 *ctx_header,
732 unsigned int packets)
734 unsigned int dbc = s->data_block_counter;
737 for (i = 0; i < packets; ++i) {
738 struct pkt_desc *desc = descs + i;
739 unsigned int index = (s->packet_index + i) % QUEUE_LENGTH;
741 desc->cycle = compute_it_cycle(*ctx_header);
742 desc->syt = calculate_syt(s, desc->cycle);
743 desc->data_blocks = calculate_data_blocks(s, desc->syt);
745 if (s->flags & CIP_DBC_IS_END_EVENT)
746 dbc = (dbc + desc->data_blocks) & 0xff;
748 desc->data_block_counter = dbc;
750 if (!(s->flags & CIP_DBC_IS_END_EVENT))
751 dbc = (dbc + desc->data_blocks) & 0xff;
753 desc->ctx_payload = s->buffer.packets[index].buffer;
758 s->data_block_counter = dbc;
761 static inline void cancel_stream(struct amdtp_stream *s)
763 s->packet_index = -1;
765 amdtp_stream_pcm_abort(s);
766 WRITE_ONCE(s->pcm_buffer_pointer, SNDRV_PCM_POS_XRUN);
769 static void process_ctx_payloads(struct amdtp_stream *s,
770 const struct pkt_desc *descs,
771 unsigned int packets)
773 struct snd_pcm_substream *pcm;
774 unsigned int pcm_frames;
776 pcm = READ_ONCE(s->pcm);
777 pcm_frames = s->process_ctx_payloads(s, descs, packets, pcm);
779 update_pcm_pointers(s, pcm, pcm_frames);
782 static void out_stream_callback(struct fw_iso_context *context, u32 tstamp,
783 size_t header_length, void *header,
786 struct amdtp_stream *s = private_data;
787 const __be32 *ctx_header = header;
788 unsigned int packets = header_length / sizeof(*ctx_header);
791 if (s->packet_index < 0)
794 generate_ideal_pkt_descs(s, s->pkt_descs, ctx_header, packets);
796 process_ctx_payloads(s, s->pkt_descs, packets);
798 for (i = 0; i < packets; ++i) {
799 const struct pkt_desc *desc = s->pkt_descs + i;
802 struct fw_iso_packet params;
803 __be32 header[IT_PKT_HEADER_SIZE_CIP / sizeof(__be32)];
804 } template = { {0}, {0} };
806 if (s->ctx_data.rx.syt_override < 0)
809 syt = s->ctx_data.rx.syt_override;
811 build_it_pkt_header(s, desc->cycle, &template.params,
812 desc->data_blocks, desc->data_block_counter,
815 if (queue_out_packet(s, &template.params) < 0) {
821 fw_iso_context_queue_flush(s->context);
824 static void in_stream_callback(struct fw_iso_context *context, u32 tstamp,
825 size_t header_length, void *header,
828 struct amdtp_stream *s = private_data;
829 unsigned int packets;
830 __be32 *ctx_header = header;
834 if (s->packet_index < 0)
837 // The number of packets in buffer.
838 packets = header_length / s->ctx_data.tx.ctx_header_size;
840 err = generate_device_pkt_descs(s, s->pkt_descs, ctx_header, packets);
842 if (err != -EAGAIN) {
847 process_ctx_payloads(s, s->pkt_descs, packets);
850 for (i = 0; i < packets; ++i) {
851 struct fw_iso_packet params = {0};
853 if (queue_in_packet(s, ¶ms) < 0) {
859 fw_iso_context_queue_flush(s->context);
862 /* this is executed one time */
863 static void amdtp_stream_first_callback(struct fw_iso_context *context,
864 u32 tstamp, size_t header_length,
865 void *header, void *private_data)
867 struct amdtp_stream *s = private_data;
868 const __be32 *ctx_header = header;
872 * For in-stream, first packet has come.
873 * For out-stream, prepared to transmit first packet
875 s->callbacked = true;
876 wake_up(&s->callback_wait);
878 if (s->direction == AMDTP_IN_STREAM) {
879 cycle = compute_cycle_count(ctx_header[1]);
881 context->callback.sc = in_stream_callback;
883 cycle = compute_it_cycle(*ctx_header);
885 context->callback.sc = out_stream_callback;
888 s->start_cycle = cycle;
890 context->callback.sc(context, tstamp, header_length, header, s);
894 * amdtp_stream_start - start transferring packets
895 * @s: the AMDTP stream to start
896 * @channel: the isochronous channel on the bus
897 * @speed: firewire speed code
899 * The stream cannot be started until it has been configured with
900 * amdtp_stream_set_parameters() and it must be started before any PCM or MIDI
901 * device can be started.
903 static int amdtp_stream_start(struct amdtp_stream *s, int channel, int speed)
905 static const struct {
906 unsigned int data_block;
907 unsigned int syt_offset;
908 } *entry, initial_state[] = {
909 [CIP_SFC_32000] = { 4, 3072 },
910 [CIP_SFC_48000] = { 6, 1024 },
911 [CIP_SFC_96000] = { 12, 1024 },
912 [CIP_SFC_192000] = { 24, 1024 },
913 [CIP_SFC_44100] = { 0, 67 },
914 [CIP_SFC_88200] = { 0, 67 },
915 [CIP_SFC_176400] = { 0, 67 },
917 unsigned int ctx_header_size;
918 unsigned int max_ctx_payload_size;
919 enum dma_data_direction dir;
922 mutex_lock(&s->mutex);
924 if (WARN_ON(amdtp_stream_running(s) ||
925 (s->data_block_quadlets < 1))) {
930 if (s->direction == AMDTP_IN_STREAM) {
931 s->data_block_counter = UINT_MAX;
933 entry = &initial_state[s->sfc];
935 s->data_block_counter = 0;
936 s->ctx_data.rx.data_block_state = entry->data_block;
937 s->ctx_data.rx.syt_offset_state = entry->syt_offset;
938 s->ctx_data.rx.last_syt_offset = TICKS_PER_CYCLE;
941 // initialize packet buffer.
942 max_ctx_payload_size = amdtp_stream_get_max_payload(s);
943 if (s->direction == AMDTP_IN_STREAM) {
944 dir = DMA_FROM_DEVICE;
945 type = FW_ISO_CONTEXT_RECEIVE;
946 if (!(s->flags & CIP_NO_HEADER)) {
947 max_ctx_payload_size -= 8;
948 ctx_header_size = IR_CTX_HEADER_SIZE_CIP;
950 ctx_header_size = IR_CTX_HEADER_SIZE_NO_CIP;
954 type = FW_ISO_CONTEXT_TRANSMIT;
955 ctx_header_size = 0; // No effect for IT context.
957 if (!(s->flags & CIP_NO_HEADER))
958 max_ctx_payload_size -= IT_PKT_HEADER_SIZE_CIP;
961 err = iso_packets_buffer_init(&s->buffer, s->unit, QUEUE_LENGTH,
962 max_ctx_payload_size, dir);
966 s->context = fw_iso_context_create(fw_parent_device(s->unit)->card,
967 type, channel, speed, ctx_header_size,
968 amdtp_stream_first_callback, s);
969 if (IS_ERR(s->context)) {
970 err = PTR_ERR(s->context);
972 dev_err(&s->unit->device,
973 "no free stream on this controller\n");
977 amdtp_stream_update(s);
979 if (s->direction == AMDTP_IN_STREAM) {
980 s->ctx_data.tx.max_ctx_payload_length = max_ctx_payload_size;
981 s->ctx_data.tx.ctx_header_size = ctx_header_size;
984 if (s->flags & CIP_NO_HEADER)
985 s->tag = TAG_NO_CIP_HEADER;
989 s->pkt_descs = kcalloc(INTERRUPT_INTERVAL, sizeof(*s->pkt_descs),
998 struct fw_iso_packet params;
999 if (s->direction == AMDTP_IN_STREAM) {
1000 err = queue_in_packet(s, ¶ms);
1002 params.header_length = 0;
1003 params.payload_length = 0;
1004 err = queue_out_packet(s, ¶ms);
1008 } while (s->packet_index > 0);
1010 /* NOTE: TAG1 matches CIP. This just affects in stream. */
1011 tag = FW_ISO_CONTEXT_MATCH_TAG1;
1012 if ((s->flags & CIP_EMPTY_WITH_TAG0) || (s->flags & CIP_NO_HEADER))
1013 tag |= FW_ISO_CONTEXT_MATCH_TAG0;
1015 s->callbacked = false;
1016 err = fw_iso_context_start(s->context, -1, 0, tag);
1020 mutex_unlock(&s->mutex);
1024 kfree(s->pkt_descs);
1026 fw_iso_context_destroy(s->context);
1027 s->context = ERR_PTR(-1);
1029 iso_packets_buffer_destroy(&s->buffer, s->unit);
1031 mutex_unlock(&s->mutex);
1037 * amdtp_stream_pcm_pointer - get the PCM buffer position
1038 * @s: the AMDTP stream that transports the PCM data
1040 * Returns the current buffer position, in frames.
1042 unsigned long amdtp_stream_pcm_pointer(struct amdtp_stream *s)
1045 * This function is called in software IRQ context of period_tasklet or
1048 * When the software IRQ context was scheduled by software IRQ context
1049 * of IR/IT contexts, queued packets were already handled. Therefore,
1050 * no need to flush the queue in buffer anymore.
1052 * When the process context reach here, some packets will be already
1053 * queued in the buffer. These packets should be handled immediately
1054 * to keep better granularity of PCM pointer.
1056 * Later, the process context will sometimes schedules software IRQ
1057 * context of the period_tasklet. Then, no need to flush the queue by
1058 * the same reason as described for IR/IT contexts.
1060 if (!in_interrupt() && amdtp_stream_running(s))
1061 fw_iso_context_flush_completions(s->context);
1063 return READ_ONCE(s->pcm_buffer_pointer);
1065 EXPORT_SYMBOL(amdtp_stream_pcm_pointer);
1068 * amdtp_stream_pcm_ack - acknowledge queued PCM frames
1069 * @s: the AMDTP stream that transfers the PCM frames
1071 * Returns zero always.
1073 int amdtp_stream_pcm_ack(struct amdtp_stream *s)
1076 * Process isochronous packets for recent isochronous cycle to handle
1077 * queued PCM frames.
1079 if (amdtp_stream_running(s))
1080 fw_iso_context_flush_completions(s->context);
1084 EXPORT_SYMBOL(amdtp_stream_pcm_ack);
1087 * amdtp_stream_update - update the stream after a bus reset
1088 * @s: the AMDTP stream
1090 void amdtp_stream_update(struct amdtp_stream *s)
1093 WRITE_ONCE(s->source_node_id_field,
1094 (fw_parent_device(s->unit)->card->node_id << CIP_SID_SHIFT) & CIP_SID_MASK);
1096 EXPORT_SYMBOL(amdtp_stream_update);
1099 * amdtp_stream_stop - stop sending packets
1100 * @s: the AMDTP stream to stop
1102 * All PCM and MIDI devices of the stream must be stopped before the stream
1103 * itself can be stopped.
1105 static void amdtp_stream_stop(struct amdtp_stream *s)
1107 mutex_lock(&s->mutex);
1109 if (!amdtp_stream_running(s)) {
1110 mutex_unlock(&s->mutex);
1114 tasklet_kill(&s->period_tasklet);
1115 fw_iso_context_stop(s->context);
1116 fw_iso_context_destroy(s->context);
1117 s->context = ERR_PTR(-1);
1118 iso_packets_buffer_destroy(&s->buffer, s->unit);
1119 kfree(s->pkt_descs);
1121 s->callbacked = false;
1123 mutex_unlock(&s->mutex);
1127 * amdtp_stream_pcm_abort - abort the running PCM device
1128 * @s: the AMDTP stream about to be stopped
1130 * If the isochronous stream needs to be stopped asynchronously, call this
1131 * function first to stop the PCM device.
1133 void amdtp_stream_pcm_abort(struct amdtp_stream *s)
1135 struct snd_pcm_substream *pcm;
1137 pcm = READ_ONCE(s->pcm);
1139 snd_pcm_stop_xrun(pcm);
1141 EXPORT_SYMBOL(amdtp_stream_pcm_abort);
1144 * amdtp_domain_init - initialize an AMDTP domain structure
1145 * @d: the AMDTP domain to initialize.
1147 int amdtp_domain_init(struct amdtp_domain *d)
1149 INIT_LIST_HEAD(&d->streams);
1153 EXPORT_SYMBOL_GPL(amdtp_domain_init);
1156 * amdtp_domain_destroy - destroy an AMDTP domain structure
1157 * @d: the AMDTP domain to destroy.
1159 void amdtp_domain_destroy(struct amdtp_domain *d)
1161 // At present nothing to do.
1164 EXPORT_SYMBOL_GPL(amdtp_domain_destroy);
1167 * amdtp_domain_add_stream - register isoc context into the domain.
1168 * @d: the AMDTP domain.
1169 * @s: the AMDTP stream.
1170 * @channel: the isochronous channel on the bus.
1171 * @speed: firewire speed code.
1173 int amdtp_domain_add_stream(struct amdtp_domain *d, struct amdtp_stream *s,
1174 int channel, int speed)
1176 struct amdtp_stream *tmp;
1178 list_for_each_entry(tmp, &d->streams, list) {
1183 list_add(&s->list, &d->streams);
1185 s->channel = channel;
1190 EXPORT_SYMBOL_GPL(amdtp_domain_add_stream);
1193 * amdtp_domain_start - start sending packets for isoc context in the domain.
1194 * @d: the AMDTP domain.
1196 int amdtp_domain_start(struct amdtp_domain *d)
1198 struct amdtp_stream *s;
1201 list_for_each_entry(s, &d->streams, list) {
1202 err = amdtp_stream_start(s, s->channel, s->speed);
1208 list_for_each_entry(s, &d->streams, list)
1209 amdtp_stream_stop(s);
1214 EXPORT_SYMBOL_GPL(amdtp_domain_start);
1217 * amdtp_domain_stop - stop sending packets for isoc context in the same domain.
1218 * @d: the AMDTP domain to which the isoc contexts belong.
1220 void amdtp_domain_stop(struct amdtp_domain *d)
1222 struct amdtp_stream *s, *next;
1224 list_for_each_entry_safe(s, next, &d->streams, list) {
1227 amdtp_stream_stop(s);
1230 EXPORT_SYMBOL_GPL(amdtp_domain_stop);