1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2019, Intel Corporation
5 #include "socfpga_agilex.dtsi"
8 model = "SoCFPGA Agilex SoCDK";
9 compatible = "intel,socfpga-agilex-socdk", "intel,socfpga-agilex";
19 stdout-path = "serial0:115200n8";
23 compatible = "gpio-leds";
26 gpios = <&portb 20 GPIO_ACTIVE_HIGH>;
31 gpios = <&portb 19 GPIO_ACTIVE_HIGH>;
36 gpios = <&portb 21 GPIO_ACTIVE_HIGH>;
41 device_type = "memory";
42 /* We expect the bootloader to fill in the reg */
43 reg = <0 0x80000000 0 0>;
56 max-frame-size = <9000>;
61 compatible = "snps,dwmac-mdio";
62 phy0: ethernet-phy@0 {
65 txd0-skew-ps = <0>; /* -420ps */
66 txd1-skew-ps = <0>; /* -420ps */
67 txd2-skew-ps = <0>; /* -420ps */
68 txd3-skew-ps = <0>; /* -420ps */
69 rxd0-skew-ps = <420>; /* 0ps */
70 rxd1-skew-ps = <420>; /* 0ps */
71 rxd2-skew-ps = <420>; /* 0ps */
72 rxd3-skew-ps = <420>; /* 0ps */
73 txen-skew-ps = <0>; /* -420ps */
74 txc-skew-ps = <900>; /* 0ps */
75 rxdv-skew-ps = <420>; /* 0ps */
76 rxc-skew-ps = <1680>; /* 780ps */
88 nand-bus-width = <16>;
96 reg = <0x200000 0x3fe00000>;
102 clock-frequency = <25000000>;
111 disable-over-current;