2 * skl-sst.c - HDA DSP library functions for SKL platform
4 * Copyright (C) 2014-15, Intel Corporation.
5 * Author:Rafal Redzimski <rafal.f.redzimski@intel.com>
6 * Jeeja KP <jeeja.kp@intel.com>
7 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as version 2, as
11 * published by the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
19 #include <linux/module.h>
20 #include <linux/delay.h>
21 #include <linux/device.h>
22 #include <linux/err.h>
23 #include <linux/uuid.h>
24 #include "../common/sst-dsp.h"
25 #include "../common/sst-dsp-priv.h"
26 #include "../common/sst-ipc.h"
27 #include "skl-sst-ipc.h"
29 #define SKL_BASEFW_TIMEOUT 300
30 #define SKL_INIT_TIMEOUT 1000
32 /* Intel HD Audio SRAM Window 0*/
33 #define SKL_ADSP_SRAM0_BASE 0x8000
35 /* Firmware status window */
36 #define SKL_ADSP_FW_STATUS SKL_ADSP_SRAM0_BASE
37 #define SKL_ADSP_ERROR_CODE (SKL_ADSP_FW_STATUS + 0x4)
39 #define SKL_NUM_MODULES 1
41 static bool skl_check_fw_status(struct sst_dsp *ctx, u32 status)
45 cur_sts = sst_dsp_shim_read(ctx, SKL_ADSP_FW_STATUS) & SKL_FW_STS_MASK;
47 return (cur_sts == status);
50 static int skl_transfer_firmware(struct sst_dsp *ctx,
51 const void *basefw, u32 base_fw_size)
55 ret = ctx->cl_dev.ops.cl_copy_to_dmabuf(ctx, basefw, base_fw_size,
60 ret = sst_dsp_register_poll(ctx,
67 ctx->cl_dev.ops.cl_stop_dma(ctx);
72 #define SKL_ADSP_FW_BIN_HDR_OFFSET 0x284
74 static int skl_load_base_firmware(struct sst_dsp *ctx)
77 struct skl_sst *skl = ctx->thread_context;
78 struct firmware stripped_fw;
81 skl->boot_complete = false;
82 init_waitqueue_head(&skl->boot_wait);
84 if (ctx->fw == NULL) {
85 ret = reject_firmware(&ctx->fw, ctx->fw_name, ctx->dev);
87 dev_err(ctx->dev, "Request firmware failed %d\n", ret);
92 /* prase uuids on first boot */
93 if (skl->is_first_boot) {
94 ret = snd_skl_parse_uuids(ctx, ctx->fw, SKL_ADSP_FW_BIN_HDR_OFFSET, 0);
96 dev_err(ctx->dev, "UUID parsing err: %d\n", ret);
97 release_firmware(ctx->fw);
98 skl_dsp_disable_core(ctx, SKL_DSP_CORE0_MASK);
103 /* check for extended manifest */
104 stripped_fw.data = ctx->fw->data;
105 stripped_fw.size = ctx->fw->size;
107 skl_dsp_strip_extended_manifest(&stripped_fw);
109 ret = skl_dsp_boot(ctx);
111 dev_err(ctx->dev, "Boot dsp core failed ret: %d\n", ret);
112 goto skl_load_base_firmware_failed;
115 ret = skl_cldma_prepare(ctx);
117 dev_err(ctx->dev, "CL dma prepare failed : %d\n", ret);
118 goto skl_load_base_firmware_failed;
121 /* enable Interrupt */
122 skl_ipc_int_enable(ctx);
123 skl_ipc_op_int_enable(ctx);
125 /* check ROM Status */
126 for (i = SKL_INIT_TIMEOUT; i > 0; --i) {
127 if (skl_check_fw_status(ctx, SKL_FW_INIT)) {
129 "ROM loaded, we can continue with FW loading\n");
135 reg = sst_dsp_shim_read(ctx, SKL_ADSP_FW_STATUS);
137 "Timeout waiting for ROM init done, reg:0x%x\n", reg);
139 goto transfer_firmware_failed;
142 ret = skl_transfer_firmware(ctx, stripped_fw.data, stripped_fw.size);
144 dev_err(ctx->dev, "Transfer firmware failed%d\n", ret);
145 goto transfer_firmware_failed;
147 ret = wait_event_timeout(skl->boot_wait, skl->boot_complete,
148 msecs_to_jiffies(SKL_IPC_BOOT_MSECS));
150 dev_err(ctx->dev, "DSP boot failed, FW Ready timed-out\n");
152 goto transfer_firmware_failed;
155 dev_dbg(ctx->dev, "Download firmware successful%d\n", ret);
156 skl->fw_loaded = true;
159 transfer_firmware_failed:
160 ctx->cl_dev.ops.cl_cleanup_controller(ctx);
161 skl_load_base_firmware_failed:
162 skl_dsp_disable_core(ctx, SKL_DSP_CORE0_MASK);
163 release_firmware(ctx->fw);
168 static int skl_set_dsp_D0(struct sst_dsp *ctx, unsigned int core_id)
171 struct skl_ipc_dxstate_info dx;
172 struct skl_sst *skl = ctx->thread_context;
173 unsigned int core_mask = SKL_DSP_CORE_MASK(core_id);
175 /* If core0 is being turned on, we need to load the FW */
176 if (core_id == SKL_DSP_CORE0_ID) {
177 ret = skl_load_base_firmware(ctx);
179 dev_err(ctx->dev, "unable to load firmware\n");
183 /* load libs as they are also lost on D3 */
184 if (skl->lib_count > 1) {
185 ret = ctx->fw_ops.load_library(ctx, skl->lib_info,
188 dev_err(ctx->dev, "reload libs failed: %d\n",
197 * If any core other than core 0 is being moved to D0, enable the
198 * core and send the set dx IPC for the core.
200 if (core_id != SKL_DSP_CORE0_ID) {
201 ret = skl_dsp_enable_core(ctx, core_mask);
205 dx.core_mask = core_mask;
206 dx.dx_mask = core_mask;
208 ret = skl_ipc_set_dx(&skl->ipc, SKL_INSTANCE_ID,
209 SKL_BASE_FW_MODULE_ID, &dx);
211 dev_err(ctx->dev, "Failed to set dsp to D0:core id= %d\n",
213 skl_dsp_disable_core(ctx, core_mask);
217 skl->cores.state[core_id] = SKL_DSP_RUNNING;
222 static int skl_set_dsp_D3(struct sst_dsp *ctx, unsigned int core_id)
225 struct skl_ipc_dxstate_info dx;
226 struct skl_sst *skl = ctx->thread_context;
227 unsigned int core_mask = SKL_DSP_CORE_MASK(core_id);
229 dx.core_mask = core_mask;
230 dx.dx_mask = SKL_IPC_D3_MASK;
232 ret = skl_ipc_set_dx(&skl->ipc, SKL_INSTANCE_ID, SKL_BASE_FW_MODULE_ID, &dx);
234 dev_err(ctx->dev, "set Dx core %d fail: %d\n", core_id, ret);
236 if (core_id == SKL_DSP_CORE0_ID) {
237 /* disable Interrupt */
238 ctx->cl_dev.ops.cl_cleanup_controller(ctx);
239 skl_cldma_int_disable(ctx);
240 skl_ipc_op_int_disable(ctx);
241 skl_ipc_int_disable(ctx);
244 ret = skl_dsp_disable_core(ctx, core_mask);
248 skl->cores.state[core_id] = SKL_DSP_RESET;
252 static unsigned int skl_get_errorcode(struct sst_dsp *ctx)
254 return sst_dsp_shim_read(ctx, SKL_ADSP_ERROR_CODE);
258 * since get/set_module are called from DAPM context,
259 * we don't need lock for usage count
261 static int skl_get_module(struct sst_dsp *ctx, u16 mod_id)
263 struct skl_module_table *module;
265 list_for_each_entry(module, &ctx->module_list, list) {
266 if (module->mod_info->mod_id == mod_id)
267 return ++module->usage_cnt;
273 static int skl_put_module(struct sst_dsp *ctx, u16 mod_id)
275 struct skl_module_table *module;
277 list_for_each_entry(module, &ctx->module_list, list) {
278 if (module->mod_info->mod_id == mod_id)
279 return --module->usage_cnt;
285 static struct skl_module_table *skl_fill_module_table(struct sst_dsp *ctx,
286 char *mod_name, int mod_id)
288 const struct firmware *fw;
289 struct skl_module_table *skl_module;
293 ret = reject_firmware(&fw, mod_name, ctx->dev);
295 dev_err(ctx->dev, "Request Module %s failed :%d\n",
300 skl_module = devm_kzalloc(ctx->dev, sizeof(*skl_module), GFP_KERNEL);
301 if (skl_module == NULL) {
302 release_firmware(fw);
306 size = sizeof(*skl_module->mod_info);
307 skl_module->mod_info = devm_kzalloc(ctx->dev, size, GFP_KERNEL);
308 if (skl_module->mod_info == NULL) {
309 release_firmware(fw);
313 skl_module->mod_info->mod_id = mod_id;
314 skl_module->mod_info->fw = fw;
315 list_add(&skl_module->list, &ctx->module_list);
320 /* get a module from it's unique ID */
321 static struct skl_module_table *skl_module_get_from_id(
322 struct sst_dsp *ctx, u16 mod_id)
324 struct skl_module_table *module;
326 if (list_empty(&ctx->module_list)) {
327 dev_err(ctx->dev, "Module list is empty\n");
331 list_for_each_entry(module, &ctx->module_list, list) {
332 if (module->mod_info->mod_id == mod_id)
339 static int skl_transfer_module(struct sst_dsp *ctx, const void *data,
340 u32 size, u16 mod_id, u8 table_id, bool is_module)
342 int ret, bytes_left, curr_pos;
343 struct skl_sst *skl = ctx->thread_context;
344 skl->mod_load_complete = false;
346 bytes_left = ctx->cl_dev.ops.cl_copy_to_dmabuf(ctx, data, size, false);
350 /* check is_module flag to load module or library */
352 ret = skl_ipc_load_modules(&skl->ipc, SKL_NUM_MODULES, &mod_id);
354 ret = skl_sst_ipc_load_library(&skl->ipc, 0, table_id, false);
357 dev_err(ctx->dev, "Failed to Load %s with err %d\n",
358 is_module ? "module" : "lib", ret);
363 * if bytes_left > 0 then wait for BDL complete interrupt and
364 * copy the next chunk till bytes_left is 0. if bytes_left is
365 * is zero, then wait for load module IPC reply
367 while (bytes_left > 0) {
368 curr_pos = size - bytes_left;
370 ret = skl_cldma_wait_interruptible(ctx);
374 bytes_left = ctx->cl_dev.ops.cl_copy_to_dmabuf(ctx,
379 ret = wait_event_timeout(skl->mod_load_wait, skl->mod_load_complete,
380 msecs_to_jiffies(SKL_IPC_BOOT_MSECS));
381 if (ret == 0 || !skl->mod_load_status) {
382 dev_err(ctx->dev, "Module Load failed\n");
387 ctx->cl_dev.ops.cl_stop_dma(ctx);
393 skl_load_library(struct sst_dsp *ctx, struct skl_lib_info *linfo, int lib_count)
395 struct skl_sst *skl = ctx->thread_context;
396 struct firmware stripped_fw;
399 /* library indices start from 1 to N. 0 represents base FW */
400 for (i = 1; i < lib_count; i++) {
401 ret = skl_prepare_lib_load(skl, &skl->lib_info[i], &stripped_fw,
402 SKL_ADSP_FW_BIN_HDR_OFFSET, i);
404 goto load_library_failed;
405 ret = skl_transfer_module(ctx, stripped_fw.data,
406 stripped_fw.size, 0, i, false);
408 goto load_library_failed;
414 skl_release_library(linfo, lib_count);
418 static int skl_load_module(struct sst_dsp *ctx, u16 mod_id, u8 *guid)
420 struct skl_module_table *module_entry = NULL;
422 char mod_name[64]; /* guid str = 32 chars + 4 hyphens */
425 uuid_mod = (uuid_le *)guid;
426 snprintf(mod_name, sizeof(mod_name), "/*(DEBLOBBED)*/");
428 module_entry = skl_module_get_from_id(ctx, mod_id);
429 if (module_entry == NULL) {
430 module_entry = skl_fill_module_table(ctx, mod_name, mod_id);
431 if (module_entry == NULL) {
432 dev_err(ctx->dev, "Failed to Load module\n");
437 if (!module_entry->usage_cnt) {
438 ret = skl_transfer_module(ctx, module_entry->mod_info->fw->data,
439 module_entry->mod_info->fw->size,
442 dev_err(ctx->dev, "Failed to Load module\n");
447 ret = skl_get_module(ctx, mod_id);
452 static int skl_unload_module(struct sst_dsp *ctx, u16 mod_id)
455 struct skl_sst *skl = ctx->thread_context;
458 usage_cnt = skl_put_module(ctx, mod_id);
460 dev_err(ctx->dev, "Module bad usage cnt!:%d\n", usage_cnt);
464 /* if module is used by others return, no need to unload */
468 ret = skl_ipc_unload_modules(&skl->ipc,
469 SKL_NUM_MODULES, &mod_id);
471 dev_err(ctx->dev, "Failed to UnLoad module\n");
472 skl_get_module(ctx, mod_id);
479 void skl_clear_module_cnt(struct sst_dsp *ctx)
481 struct skl_module_table *module;
483 if (list_empty(&ctx->module_list))
486 list_for_each_entry(module, &ctx->module_list, list) {
487 module->usage_cnt = 0;
490 EXPORT_SYMBOL_GPL(skl_clear_module_cnt);
492 static void skl_clear_module_table(struct sst_dsp *ctx)
494 struct skl_module_table *module, *tmp;
496 if (list_empty(&ctx->module_list))
499 list_for_each_entry_safe(module, tmp, &ctx->module_list, list) {
500 list_del(&module->list);
501 release_firmware(module->mod_info->fw);
505 static const struct skl_dsp_fw_ops skl_fw_ops = {
506 .set_state_D0 = skl_set_dsp_D0,
507 .set_state_D3 = skl_set_dsp_D3,
508 .load_fw = skl_load_base_firmware,
509 .get_fw_errcode = skl_get_errorcode,
510 .load_library = skl_load_library,
511 .load_mod = skl_load_module,
512 .unload_mod = skl_unload_module,
515 static struct sst_ops skl_ops = {
516 .irq_handler = skl_dsp_sst_interrupt,
517 .write = sst_shim32_write,
518 .read = sst_shim32_read,
519 .ram_read = sst_memcpy_fromio_32,
520 .ram_write = sst_memcpy_toio_32,
521 .free = skl_dsp_free,
524 static struct sst_dsp_device skl_dev = {
525 .thread = skl_dsp_irq_thread_handler,
529 int skl_sst_dsp_init(struct device *dev, void __iomem *mmio_base, int irq,
530 const char *fw_name, struct skl_dsp_loader_ops dsp_ops, struct skl_sst **dsp)
536 ret = skl_sst_ctx_init(dev, irq, fw_name, dsp_ops, dsp, &skl_dev);
538 dev_err(dev, "%s: no device\n", __func__);
544 sst->addr.lpe = mmio_base;
545 sst->addr.shim = mmio_base;
546 sst->addr.sram0_base = SKL_ADSP_SRAM0_BASE;
547 sst->addr.sram1_base = SKL_ADSP_SRAM1_BASE;
548 sst->addr.w0_stat_sz = SKL_ADSP_W0_STAT_SZ;
549 sst->addr.w0_up_sz = SKL_ADSP_W0_UP_SZ;
551 sst_dsp_mailbox_init(sst, (SKL_ADSP_SRAM0_BASE + SKL_ADSP_W0_STAT_SZ),
552 SKL_ADSP_W0_UP_SZ, SKL_ADSP_SRAM1_BASE, SKL_ADSP_W1_SZ);
554 ret = skl_ipc_init(dev, skl);
560 sst->fw_ops = skl_fw_ops;
562 return skl_dsp_acquire_irq(sst);
564 EXPORT_SYMBOL_GPL(skl_sst_dsp_init);
566 int skl_sst_init_fw(struct device *dev, struct skl_sst *ctx)
569 struct sst_dsp *sst = ctx->dsp;
571 ret = sst->fw_ops.load_fw(sst);
573 dev_err(dev, "Load base fw failed : %d\n", ret);
577 skl_dsp_init_core_state(sst);
579 if (ctx->lib_count > 1) {
580 ret = sst->fw_ops.load_library(sst, ctx->lib_info,
583 dev_err(dev, "Load Library failed : %x\n", ret);
587 ctx->is_first_boot = false;
591 EXPORT_SYMBOL_GPL(skl_sst_init_fw);
593 void skl_sst_dsp_cleanup(struct device *dev, struct skl_sst *ctx)
597 release_firmware(ctx->dsp->fw);
598 skl_clear_module_table(ctx->dsp);
599 skl_freeup_uuid_list(ctx);
600 skl_ipc_free(&ctx->ipc);
601 ctx->dsp->ops->free(ctx->dsp);
602 if (ctx->boot_complete) {
603 ctx->dsp->cl_dev.ops.cl_cleanup_controller(ctx->dsp);
604 skl_cldma_int_disable(ctx->dsp);
607 EXPORT_SYMBOL_GPL(skl_sst_dsp_cleanup);
609 MODULE_LICENSE("GPL v2");
610 MODULE_DESCRIPTION("Intel Skylake IPC driver");