1 // SPDX-License-Identifier: GPL-2.0 or BSD-3-Clause
3 /* Authors: Bernard Metzler <bmt@zurich.ibm.com> */
4 /* Copyright (c) 2008-2019, IBM Corporation */
6 #include <linux/errno.h>
7 #include <linux/types.h>
8 #include <linux/uaccess.h>
9 #include <linux/vmalloc.h>
10 #include <linux/xarray.h>
12 #include <rdma/iw_cm.h>
13 #include <rdma/ib_verbs.h>
14 #include <rdma/ib_user_verbs.h>
15 #include <rdma/uverbs_ioctl.h>
18 #include "siw_verbs.h"
21 static int ib_qp_state_to_siw_qp_state[IB_QPS_ERR + 1] = {
22 [IB_QPS_RESET] = SIW_QP_STATE_IDLE,
23 [IB_QPS_INIT] = SIW_QP_STATE_IDLE,
24 [IB_QPS_RTR] = SIW_QP_STATE_RTR,
25 [IB_QPS_RTS] = SIW_QP_STATE_RTS,
26 [IB_QPS_SQD] = SIW_QP_STATE_CLOSING,
27 [IB_QPS_SQE] = SIW_QP_STATE_TERMINATE,
28 [IB_QPS_ERR] = SIW_QP_STATE_ERROR
31 static char ib_qp_state_to_string[IB_QPS_ERR + 1][sizeof("RESET")] = {
32 [IB_QPS_RESET] = "RESET", [IB_QPS_INIT] = "INIT", [IB_QPS_RTR] = "RTR",
33 [IB_QPS_RTS] = "RTS", [IB_QPS_SQD] = "SQD", [IB_QPS_SQE] = "SQE",
37 void siw_mmap_free(struct rdma_user_mmap_entry *rdma_entry)
39 struct siw_user_mmap_entry *entry = to_siw_mmap_entry(rdma_entry);
44 int siw_mmap(struct ib_ucontext *ctx, struct vm_area_struct *vma)
46 struct siw_ucontext *uctx = to_siw_ctx(ctx);
47 size_t size = vma->vm_end - vma->vm_start;
48 struct rdma_user_mmap_entry *rdma_entry;
49 struct siw_user_mmap_entry *entry;
53 * Must be page aligned
55 if (vma->vm_start & (PAGE_SIZE - 1)) {
56 pr_warn("siw: mmap not page aligned\n");
59 rdma_entry = rdma_user_mmap_entry_get(&uctx->base_ucontext, vma);
61 siw_dbg(&uctx->sdev->base_dev, "mmap lookup failed: %lu, %#zx\n",
65 entry = to_siw_mmap_entry(rdma_entry);
67 rv = remap_vmalloc_range(vma, entry->address, 0);
69 pr_warn("remap_vmalloc_range failed: %lu, %zu\n", vma->vm_pgoff,
74 rdma_user_mmap_entry_put(rdma_entry);
79 int siw_alloc_ucontext(struct ib_ucontext *base_ctx, struct ib_udata *udata)
81 struct siw_device *sdev = to_siw_dev(base_ctx->device);
82 struct siw_ucontext *ctx = to_siw_ctx(base_ctx);
83 struct siw_uresp_alloc_ctx uresp = {};
86 if (atomic_inc_return(&sdev->num_ctx) > SIW_MAX_CONTEXT) {
92 uresp.dev_id = sdev->vendor_part_id;
94 if (udata->outlen < sizeof(uresp)) {
98 rv = ib_copy_to_udata(udata, &uresp, sizeof(uresp));
102 siw_dbg(base_ctx->device, "success. now %d context(s)\n",
103 atomic_read(&sdev->num_ctx));
108 atomic_dec(&sdev->num_ctx);
109 siw_dbg(base_ctx->device, "failure %d. now %d context(s)\n", rv,
110 atomic_read(&sdev->num_ctx));
115 void siw_dealloc_ucontext(struct ib_ucontext *base_ctx)
117 struct siw_ucontext *uctx = to_siw_ctx(base_ctx);
119 atomic_dec(&uctx->sdev->num_ctx);
122 int siw_query_device(struct ib_device *base_dev, struct ib_device_attr *attr,
123 struct ib_udata *udata)
125 struct siw_device *sdev = to_siw_dev(base_dev);
127 if (udata->inlen || udata->outlen)
130 memset(attr, 0, sizeof(*attr));
132 /* Revisit atomic caps if RFC 7306 gets supported */
133 attr->atomic_cap = 0;
134 attr->device_cap_flags =
135 IB_DEVICE_MEM_MGT_EXTENSIONS | IB_DEVICE_ALLOW_USER_UNREG;
136 attr->max_cq = sdev->attrs.max_cq;
137 attr->max_cqe = sdev->attrs.max_cqe;
138 attr->max_fast_reg_page_list_len = SIW_MAX_SGE_PBL;
139 attr->max_mr = sdev->attrs.max_mr;
140 attr->max_mw = sdev->attrs.max_mw;
141 attr->max_mr_size = ~0ull;
142 attr->max_pd = sdev->attrs.max_pd;
143 attr->max_qp = sdev->attrs.max_qp;
144 attr->max_qp_init_rd_atom = sdev->attrs.max_ird;
145 attr->max_qp_rd_atom = sdev->attrs.max_ord;
146 attr->max_qp_wr = sdev->attrs.max_qp_wr;
147 attr->max_recv_sge = sdev->attrs.max_sge;
148 attr->max_res_rd_atom = sdev->attrs.max_qp * sdev->attrs.max_ird;
149 attr->max_send_sge = sdev->attrs.max_sge;
150 attr->max_sge_rd = sdev->attrs.max_sge_rd;
151 attr->max_srq = sdev->attrs.max_srq;
152 attr->max_srq_sge = sdev->attrs.max_srq_sge;
153 attr->max_srq_wr = sdev->attrs.max_srq_wr;
154 attr->page_size_cap = PAGE_SIZE;
155 attr->vendor_id = SIW_VENDOR_ID;
156 attr->vendor_part_id = sdev->vendor_part_id;
158 memcpy(&attr->sys_image_guid, sdev->netdev->dev_addr, 6);
163 int siw_query_port(struct ib_device *base_dev, u8 port,
164 struct ib_port_attr *attr)
166 struct siw_device *sdev = to_siw_dev(base_dev);
169 memset(attr, 0, sizeof(*attr));
171 rv = ib_get_eth_speed(base_dev, port, &attr->active_speed,
172 &attr->active_width);
173 attr->gid_tbl_len = 1;
174 attr->max_msg_sz = -1;
175 attr->max_mtu = ib_mtu_int_to_enum(sdev->netdev->mtu);
176 attr->active_mtu = ib_mtu_int_to_enum(sdev->netdev->mtu);
177 attr->phys_state = sdev->state == IB_PORT_ACTIVE ?
178 IB_PORT_PHYS_STATE_LINK_UP : IB_PORT_PHYS_STATE_DISABLED;
179 attr->port_cap_flags = IB_PORT_CM_SUP | IB_PORT_DEVICE_MGMT_SUP;
180 attr->state = sdev->state;
185 * attr->bad_pkey_cntr = 0;
186 * attr->qkey_viol_cntr = 0;
189 * attr->max_vl_num = 0;
191 * attr->subnet_timeout = 0;
192 * attr->init_type_repy = 0;
197 int siw_get_port_immutable(struct ib_device *base_dev, u8 port,
198 struct ib_port_immutable *port_immutable)
200 struct ib_port_attr attr;
201 int rv = siw_query_port(base_dev, port, &attr);
206 port_immutable->gid_tbl_len = attr.gid_tbl_len;
207 port_immutable->core_cap_flags = RDMA_CORE_PORT_IWARP;
212 int siw_query_gid(struct ib_device *base_dev, u8 port, int idx,
215 struct siw_device *sdev = to_siw_dev(base_dev);
217 /* subnet_prefix == interface_id == 0; */
218 memset(gid, 0, sizeof(*gid));
219 memcpy(&gid->raw[0], sdev->netdev->dev_addr, 6);
224 int siw_alloc_pd(struct ib_pd *pd, struct ib_udata *udata)
226 struct siw_device *sdev = to_siw_dev(pd->device);
228 if (atomic_inc_return(&sdev->num_pd) > SIW_MAX_PD) {
229 atomic_dec(&sdev->num_pd);
232 siw_dbg_pd(pd, "now %d PD's(s)\n", atomic_read(&sdev->num_pd));
237 int siw_dealloc_pd(struct ib_pd *pd, struct ib_udata *udata)
239 struct siw_device *sdev = to_siw_dev(pd->device);
241 siw_dbg_pd(pd, "free PD\n");
242 atomic_dec(&sdev->num_pd);
246 void siw_qp_get_ref(struct ib_qp *base_qp)
248 siw_qp_get(to_siw_qp(base_qp));
251 void siw_qp_put_ref(struct ib_qp *base_qp)
253 siw_qp_put(to_siw_qp(base_qp));
256 static struct rdma_user_mmap_entry *
257 siw_mmap_entry_insert(struct siw_ucontext *uctx,
258 void *address, size_t length,
261 struct siw_user_mmap_entry *entry = kzalloc(sizeof(*entry), GFP_KERNEL);
264 *offset = SIW_INVAL_UOBJ_KEY;
268 entry->address = address;
270 rv = rdma_user_mmap_entry_insert(&uctx->base_ucontext,
278 *offset = rdma_user_mmap_get_offset(&entry->rdma_entry);
280 return &entry->rdma_entry;
286 * Create QP of requested size on given device.
288 * @pd: Protection Domain
289 * @attrs: Initial QP attributes.
290 * @udata: used to provide QP ID, SQ and RQ size back to user.
293 struct ib_qp *siw_create_qp(struct ib_pd *pd,
294 struct ib_qp_init_attr *attrs,
295 struct ib_udata *udata)
297 struct siw_qp *qp = NULL;
298 struct ib_device *base_dev = pd->device;
299 struct siw_device *sdev = to_siw_dev(base_dev);
300 struct siw_ucontext *uctx =
301 rdma_udata_to_drv_context(udata, struct siw_ucontext,
304 int num_sqe, num_rqe, rv = 0;
307 siw_dbg(base_dev, "create new QP\n");
309 if (atomic_inc_return(&sdev->num_qp) > SIW_MAX_QP) {
310 siw_dbg(base_dev, "too many QP's\n");
314 if (attrs->qp_type != IB_QPT_RC) {
315 siw_dbg(base_dev, "only RC QP's supported\n");
319 if ((attrs->cap.max_send_wr > SIW_MAX_QP_WR) ||
320 (attrs->cap.max_recv_wr > SIW_MAX_QP_WR) ||
321 (attrs->cap.max_send_sge > SIW_MAX_SGE) ||
322 (attrs->cap.max_recv_sge > SIW_MAX_SGE)) {
323 siw_dbg(base_dev, "QP size error\n");
327 if (attrs->cap.max_inline_data > SIW_MAX_INLINE) {
328 siw_dbg(base_dev, "max inline send: %d > %d\n",
329 attrs->cap.max_inline_data, (int)SIW_MAX_INLINE);
334 * NOTE: we allow for zero element SQ and RQ WQE's SGL's
335 * but not for a QP unable to hold any WQE (SQ + RQ)
337 if (attrs->cap.max_send_wr + attrs->cap.max_recv_wr == 0) {
338 siw_dbg(base_dev, "QP must have send or receive queue\n");
343 if (!attrs->send_cq || (!attrs->recv_cq && !attrs->srq)) {
344 siw_dbg(base_dev, "send CQ or receive CQ invalid\n");
348 qp = kzalloc(sizeof(*qp), GFP_KERNEL);
353 init_rwsem(&qp->state_lock);
354 spin_lock_init(&qp->sq_lock);
355 spin_lock_init(&qp->rq_lock);
356 spin_lock_init(&qp->orq_lock);
358 rv = siw_qp_add(sdev, qp);
362 num_sqe = attrs->cap.max_send_wr;
363 num_rqe = attrs->cap.max_recv_wr;
365 /* All queue indices are derived from modulo operations
366 * on a free running 'get' (consumer) and 'put' (producer)
367 * unsigned counter. Having queue sizes at power of two
368 * avoids handling counter wrap around.
371 num_sqe = roundup_pow_of_two(num_sqe);
373 /* Zero sized SQ is not supported */
378 num_rqe = roundup_pow_of_two(num_rqe);
381 qp->sendq = vmalloc_user(num_sqe * sizeof(struct siw_sqe));
383 qp->sendq = vzalloc(num_sqe * sizeof(struct siw_sqe));
385 if (qp->sendq == NULL) {
389 if (attrs->sq_sig_type != IB_SIGNAL_REQ_WR) {
390 if (attrs->sq_sig_type == IB_SIGNAL_ALL_WR)
391 qp->attrs.flags |= SIW_SIGNAL_ALL_WR;
398 qp->scq = to_siw_cq(attrs->send_cq);
399 qp->rcq = to_siw_cq(attrs->recv_cq);
404 * Verbs 6.3.7: ignore RQ size, if SRQ present
405 * Verbs 6.3.5: do not check PD of SRQ against PD of QP
407 qp->srq = to_siw_srq(attrs->srq);
408 qp->attrs.rq_size = 0;
409 siw_dbg(base_dev, "QP [%u]: SRQ attached\n",
411 } else if (num_rqe) {
414 vmalloc_user(num_rqe * sizeof(struct siw_rqe));
416 qp->recvq = vzalloc(num_rqe * sizeof(struct siw_rqe));
418 if (qp->recvq == NULL) {
422 qp->attrs.rq_size = num_rqe;
424 qp->attrs.sq_size = num_sqe;
425 qp->attrs.sq_max_sges = attrs->cap.max_send_sge;
426 qp->attrs.rq_max_sges = attrs->cap.max_recv_sge;
428 /* Make those two tunables fixed for now. */
429 qp->tx_ctx.gso_seg_limit = 1;
430 qp->tx_ctx.zcopy_tx = zcopy_tx;
432 qp->attrs.state = SIW_QP_STATE_IDLE;
435 struct siw_uresp_create_qp uresp = {};
437 uresp.num_sqe = num_sqe;
438 uresp.num_rqe = num_rqe;
439 uresp.qp_id = qp_id(qp);
442 length = num_sqe * sizeof(struct siw_sqe);
444 siw_mmap_entry_insert(uctx, qp->sendq,
445 length, &uresp.sq_key);
453 length = num_rqe * sizeof(struct siw_rqe);
455 siw_mmap_entry_insert(uctx, qp->recvq,
456 length, &uresp.rq_key);
458 uresp.sq_key = SIW_INVAL_UOBJ_KEY;
464 if (udata->outlen < sizeof(uresp)) {
468 rv = ib_copy_to_udata(udata, &uresp, sizeof(uresp));
472 qp->tx_cpu = siw_get_tx_cpu(sdev);
473 if (qp->tx_cpu < 0) {
477 INIT_LIST_HEAD(&qp->devq);
478 spin_lock_irqsave(&sdev->lock, flags);
479 list_add_tail(&qp->devq, &sdev->qp_list);
480 spin_unlock_irqrestore(&sdev->lock, flags);
485 xa_erase(&sdev->qp_xa, qp_id(qp));
489 rdma_user_mmap_entry_remove(qp->sq_entry);
490 rdma_user_mmap_entry_remove(qp->rq_entry);
496 atomic_dec(&sdev->num_qp);
502 * Minimum siw_query_qp() verb interface.
504 * @qp_attr_mask is not used but all available information is provided
506 int siw_query_qp(struct ib_qp *base_qp, struct ib_qp_attr *qp_attr,
507 int qp_attr_mask, struct ib_qp_init_attr *qp_init_attr)
510 struct siw_device *sdev;
512 if (base_qp && qp_attr && qp_init_attr) {
513 qp = to_siw_qp(base_qp);
514 sdev = to_siw_dev(base_qp->device);
518 qp_attr->cap.max_inline_data = SIW_MAX_INLINE;
519 qp_attr->cap.max_send_wr = qp->attrs.sq_size;
520 qp_attr->cap.max_send_sge = qp->attrs.sq_max_sges;
521 qp_attr->cap.max_recv_wr = qp->attrs.rq_size;
522 qp_attr->cap.max_recv_sge = qp->attrs.rq_max_sges;
523 qp_attr->path_mtu = ib_mtu_int_to_enum(sdev->netdev->mtu);
524 qp_attr->max_rd_atomic = qp->attrs.irq_size;
525 qp_attr->max_dest_rd_atomic = qp->attrs.orq_size;
527 qp_attr->qp_access_flags = IB_ACCESS_LOCAL_WRITE |
528 IB_ACCESS_REMOTE_WRITE |
529 IB_ACCESS_REMOTE_READ;
531 qp_init_attr->qp_type = base_qp->qp_type;
532 qp_init_attr->send_cq = base_qp->send_cq;
533 qp_init_attr->recv_cq = base_qp->recv_cq;
534 qp_init_attr->srq = base_qp->srq;
536 qp_init_attr->cap = qp_attr->cap;
541 int siw_verbs_modify_qp(struct ib_qp *base_qp, struct ib_qp_attr *attr,
542 int attr_mask, struct ib_udata *udata)
544 struct siw_qp_attrs new_attrs;
545 enum siw_qp_attr_mask siw_attr_mask = 0;
546 struct siw_qp *qp = to_siw_qp(base_qp);
552 memset(&new_attrs, 0, sizeof(new_attrs));
554 if (attr_mask & IB_QP_ACCESS_FLAGS) {
555 siw_attr_mask = SIW_QP_ATTR_ACCESS_FLAGS;
557 if (attr->qp_access_flags & IB_ACCESS_REMOTE_READ)
558 new_attrs.flags |= SIW_RDMA_READ_ENABLED;
559 if (attr->qp_access_flags & IB_ACCESS_REMOTE_WRITE)
560 new_attrs.flags |= SIW_RDMA_WRITE_ENABLED;
561 if (attr->qp_access_flags & IB_ACCESS_MW_BIND)
562 new_attrs.flags |= SIW_RDMA_BIND_ENABLED;
564 if (attr_mask & IB_QP_STATE) {
565 siw_dbg_qp(qp, "desired IB QP state: %s\n",
566 ib_qp_state_to_string[attr->qp_state]);
568 new_attrs.state = ib_qp_state_to_siw_qp_state[attr->qp_state];
570 if (new_attrs.state > SIW_QP_STATE_RTS)
571 qp->tx_ctx.tx_suspend = 1;
573 siw_attr_mask |= SIW_QP_ATTR_STATE;
578 down_write(&qp->state_lock);
580 rv = siw_qp_modify(qp, &new_attrs, siw_attr_mask);
582 up_write(&qp->state_lock);
587 int siw_destroy_qp(struct ib_qp *base_qp, struct ib_udata *udata)
589 struct siw_qp *qp = to_siw_qp(base_qp);
590 struct siw_ucontext *uctx =
591 rdma_udata_to_drv_context(udata, struct siw_ucontext,
593 struct siw_qp_attrs qp_attrs;
595 siw_dbg_qp(qp, "state %d\n", qp->attrs.state);
598 * Mark QP as in process of destruction to prevent from
599 * any async callbacks to RDMA core
601 qp->attrs.flags |= SIW_QP_IN_DESTROY;
602 qp->rx_stream.rx_suspend = 1;
605 rdma_user_mmap_entry_remove(qp->sq_entry);
606 rdma_user_mmap_entry_remove(qp->rq_entry);
609 down_write(&qp->state_lock);
611 qp_attrs.state = SIW_QP_STATE_ERROR;
612 siw_qp_modify(qp, &qp_attrs, SIW_QP_ATTR_STATE);
615 siw_cep_put(qp->cep);
618 up_write(&qp->state_lock);
620 kfree(qp->tx_ctx.mpa_crc_hd);
621 kfree(qp->rx_stream.mpa_crc_hd);
623 qp->scq = qp->rcq = NULL;
631 * siw_copy_inline_sgl()
633 * Prepare sgl of inlined data for sending. For userland callers
634 * function checks if given buffer addresses and len's are within
635 * process context bounds.
636 * Data from all provided sge's are copied together into the wqe,
637 * referenced by a single sge.
639 static int siw_copy_inline_sgl(const struct ib_send_wr *core_wr,
642 struct ib_sge *core_sge = core_wr->sg_list;
643 void *kbuf = &sqe->sge[1];
644 int num_sge = core_wr->num_sge, bytes = 0;
646 sqe->sge[0].laddr = (uintptr_t)kbuf;
647 sqe->sge[0].lkey = 0;
650 if (!core_sge->length) {
654 bytes += core_sge->length;
655 if (bytes > SIW_MAX_INLINE) {
659 memcpy(kbuf, (void *)(uintptr_t)core_sge->addr,
662 kbuf += core_sge->length;
665 sqe->sge[0].length = bytes > 0 ? bytes : 0;
666 sqe->num_sge = bytes > 0 ? 1 : 0;
671 /* Complete SQ WR's without processing */
672 static int siw_sq_flush_wr(struct siw_qp *qp, const struct ib_send_wr *wr,
673 const struct ib_send_wr **bad_wr)
678 struct siw_sqe sqe = {};
680 switch (wr->opcode) {
681 case IB_WR_RDMA_WRITE:
682 sqe.opcode = SIW_OP_WRITE;
684 case IB_WR_RDMA_READ:
685 sqe.opcode = SIW_OP_READ;
687 case IB_WR_RDMA_READ_WITH_INV:
688 sqe.opcode = SIW_OP_READ_LOCAL_INV;
691 sqe.opcode = SIW_OP_SEND;
693 case IB_WR_SEND_WITH_IMM:
694 sqe.opcode = SIW_OP_SEND_WITH_IMM;
696 case IB_WR_SEND_WITH_INV:
697 sqe.opcode = SIW_OP_SEND_REMOTE_INV;
699 case IB_WR_LOCAL_INV:
700 sqe.opcode = SIW_OP_INVAL_STAG;
703 sqe.opcode = SIW_OP_REG_MR;
711 rv = siw_sqe_complete(qp, &sqe, 0,
712 SIW_WC_WR_FLUSH_ERR);
724 /* Complete RQ WR's without processing */
725 static int siw_rq_flush_wr(struct siw_qp *qp, const struct ib_recv_wr *wr,
726 const struct ib_recv_wr **bad_wr)
728 struct siw_rqe rqe = {};
733 rv = siw_rqe_complete(qp, &rqe, 0, 0, SIW_WC_WR_FLUSH_ERR);
747 * Post a list of S-WR's to a SQ.
749 * @base_qp: Base QP contained in siw QP
750 * @wr: Null terminated list of user WR's
751 * @bad_wr: Points to failing WR in case of synchronous failure.
753 int siw_post_send(struct ib_qp *base_qp, const struct ib_send_wr *wr,
754 const struct ib_send_wr **bad_wr)
756 struct siw_qp *qp = to_siw_qp(base_qp);
757 struct siw_wqe *wqe = tx_wqe(qp);
762 if (wr && !rdma_is_kernel_res(&qp->base_qp.res)) {
763 siw_dbg_qp(qp, "wr must be empty for user mapped sq\n");
769 * Try to acquire QP state lock. Must be non-blocking
770 * to accommodate kernel clients needs.
772 if (!down_read_trylock(&qp->state_lock)) {
773 if (qp->attrs.state == SIW_QP_STATE_ERROR) {
775 * ERROR state is final, so we can be sure
776 * this state will not change as long as the QP
779 * This handles an ib_drain_sq() call with
780 * a concurrent request to set the QP state
783 rv = siw_sq_flush_wr(qp, wr, bad_wr);
785 siw_dbg_qp(qp, "QP locked, state %d\n",
792 if (unlikely(qp->attrs.state != SIW_QP_STATE_RTS)) {
793 if (qp->attrs.state == SIW_QP_STATE_ERROR) {
795 * Immediately flush this WR to CQ, if QP
796 * is in ERROR state. SQ is guaranteed to
797 * be empty, so WR complets in-order.
799 * Typically triggered by ib_drain_sq().
801 rv = siw_sq_flush_wr(qp, wr, bad_wr);
803 siw_dbg_qp(qp, "QP out of state %d\n",
808 up_read(&qp->state_lock);
811 spin_lock_irqsave(&qp->sq_lock, flags);
814 u32 idx = qp->sq_put % qp->attrs.sq_size;
815 struct siw_sqe *sqe = &qp->sendq[idx];
818 siw_dbg_qp(qp, "sq full\n");
822 if (wr->num_sge > qp->attrs.sq_max_sges) {
823 siw_dbg_qp(qp, "too many sge's: %d\n", wr->num_sge);
829 if ((wr->send_flags & IB_SEND_SIGNALED) ||
830 (qp->attrs.flags & SIW_SIGNAL_ALL_WR))
831 sqe->flags |= SIW_WQE_SIGNALLED;
833 if (wr->send_flags & IB_SEND_FENCE)
834 sqe->flags |= SIW_WQE_READ_FENCE;
836 switch (wr->opcode) {
838 case IB_WR_SEND_WITH_INV:
839 if (wr->send_flags & IB_SEND_SOLICITED)
840 sqe->flags |= SIW_WQE_SOLICITED;
842 if (!(wr->send_flags & IB_SEND_INLINE)) {
843 siw_copy_sgl(wr->sg_list, sqe->sge,
845 sqe->num_sge = wr->num_sge;
847 rv = siw_copy_inline_sgl(wr, sqe);
852 sqe->flags |= SIW_WQE_INLINE;
855 if (wr->opcode == IB_WR_SEND)
856 sqe->opcode = SIW_OP_SEND;
858 sqe->opcode = SIW_OP_SEND_REMOTE_INV;
859 sqe->rkey = wr->ex.invalidate_rkey;
863 case IB_WR_RDMA_READ_WITH_INV:
864 case IB_WR_RDMA_READ:
866 * iWarp restricts RREAD sink to SGL containing
867 * 1 SGE only. we could relax to SGL with multiple
868 * elements referring the SAME ltag or even sending
869 * a private per-rreq tag referring to a checked
870 * local sgl with MULTIPLE ltag's.
872 if (unlikely(wr->num_sge != 1)) {
876 siw_copy_sgl(wr->sg_list, &sqe->sge[0], 1);
878 * NOTE: zero length RREAD is allowed!
880 sqe->raddr = rdma_wr(wr)->remote_addr;
881 sqe->rkey = rdma_wr(wr)->rkey;
884 if (wr->opcode == IB_WR_RDMA_READ)
885 sqe->opcode = SIW_OP_READ;
887 sqe->opcode = SIW_OP_READ_LOCAL_INV;
890 case IB_WR_RDMA_WRITE:
891 if (!(wr->send_flags & IB_SEND_INLINE)) {
892 siw_copy_sgl(wr->sg_list, &sqe->sge[0],
894 sqe->num_sge = wr->num_sge;
896 rv = siw_copy_inline_sgl(wr, sqe);
897 if (unlikely(rv < 0)) {
901 sqe->flags |= SIW_WQE_INLINE;
904 sqe->raddr = rdma_wr(wr)->remote_addr;
905 sqe->rkey = rdma_wr(wr)->rkey;
906 sqe->opcode = SIW_OP_WRITE;
910 sqe->base_mr = (uintptr_t)reg_wr(wr)->mr;
911 sqe->rkey = reg_wr(wr)->key;
912 sqe->access = reg_wr(wr)->access & IWARP_ACCESS_MASK;
913 sqe->opcode = SIW_OP_REG_MR;
916 case IB_WR_LOCAL_INV:
917 sqe->rkey = wr->ex.invalidate_rkey;
918 sqe->opcode = SIW_OP_INVAL_STAG;
922 siw_dbg_qp(qp, "ib wr type %d unsupported\n",
927 siw_dbg_qp(qp, "opcode %d, flags 0x%x, wr_id 0x%pK\n",
928 sqe->opcode, sqe->flags,
929 (void *)(uintptr_t)sqe->id);
931 if (unlikely(rv < 0))
934 /* make SQE only valid after completely written */
936 sqe->flags |= SIW_WQE_VALID;
943 * Send directly if SQ processing is not in progress.
944 * Eventual immediate errors (rv < 0) do not affect the involved
945 * RI resources (Verbs, 8.3.1) and thus do not prevent from SQ
946 * processing, if new work is already pending. But rv must be passed
949 if (wqe->wr_status != SIW_WR_IDLE) {
950 spin_unlock_irqrestore(&qp->sq_lock, flags);
951 goto skip_direct_sending;
953 rv = siw_activate_tx(qp);
954 spin_unlock_irqrestore(&qp->sq_lock, flags);
957 goto skip_direct_sending;
959 if (rdma_is_kernel_res(&qp->base_qp.res)) {
960 rv = siw_sq_start(qp);
962 qp->tx_ctx.in_syscall = 1;
964 if (siw_qp_sq_process(qp) != 0 && !(qp->tx_ctx.tx_suspend))
965 siw_qp_cm_drop(qp, 0);
967 qp->tx_ctx.in_syscall = 0;
971 up_read(&qp->state_lock);
978 siw_dbg_qp(qp, "error %d\n", rv);
987 * Post a list of R-WR's to a RQ.
989 * @base_qp: Base QP contained in siw QP
990 * @wr: Null terminated list of user WR's
991 * @bad_wr: Points to failing WR in case of synchronous failure.
993 int siw_post_receive(struct ib_qp *base_qp, const struct ib_recv_wr *wr,
994 const struct ib_recv_wr **bad_wr)
996 struct siw_qp *qp = to_siw_qp(base_qp);
1000 if (qp->srq || qp->attrs.rq_size == 0) {
1004 if (!rdma_is_kernel_res(&qp->base_qp.res)) {
1005 siw_dbg_qp(qp, "no kernel post_recv for user mapped rq\n");
1011 * Try to acquire QP state lock. Must be non-blocking
1012 * to accommodate kernel clients needs.
1014 if (!down_read_trylock(&qp->state_lock)) {
1015 if (qp->attrs.state == SIW_QP_STATE_ERROR) {
1017 * ERROR state is final, so we can be sure
1018 * this state will not change as long as the QP
1021 * This handles an ib_drain_rq() call with
1022 * a concurrent request to set the QP state
1025 rv = siw_rq_flush_wr(qp, wr, bad_wr);
1027 siw_dbg_qp(qp, "QP locked, state %d\n",
1034 if (qp->attrs.state > SIW_QP_STATE_RTS) {
1035 if (qp->attrs.state == SIW_QP_STATE_ERROR) {
1037 * Immediately flush this WR to CQ, if QP
1038 * is in ERROR state. RQ is guaranteed to
1039 * be empty, so WR complets in-order.
1041 * Typically triggered by ib_drain_rq().
1043 rv = siw_rq_flush_wr(qp, wr, bad_wr);
1045 siw_dbg_qp(qp, "QP out of state %d\n",
1050 up_read(&qp->state_lock);
1054 * Serialize potentially multiple producers.
1055 * Not needed for single threaded consumer side.
1057 spin_lock_irqsave(&qp->rq_lock, flags);
1060 u32 idx = qp->rq_put % qp->attrs.rq_size;
1061 struct siw_rqe *rqe = &qp->recvq[idx];
1064 siw_dbg_qp(qp, "RQ full\n");
1068 if (wr->num_sge > qp->attrs.rq_max_sges) {
1069 siw_dbg_qp(qp, "too many sge's: %d\n", wr->num_sge);
1073 rqe->id = wr->wr_id;
1074 rqe->num_sge = wr->num_sge;
1075 siw_copy_sgl(wr->sg_list, rqe->sge, wr->num_sge);
1077 /* make sure RQE is completely written before valid */
1080 rqe->flags = SIW_WQE_VALID;
1085 spin_unlock_irqrestore(&qp->rq_lock, flags);
1087 up_read(&qp->state_lock);
1090 siw_dbg_qp(qp, "error %d\n", rv);
1093 return rv > 0 ? 0 : rv;
1096 int siw_destroy_cq(struct ib_cq *base_cq, struct ib_udata *udata)
1098 struct siw_cq *cq = to_siw_cq(base_cq);
1099 struct siw_device *sdev = to_siw_dev(base_cq->device);
1100 struct siw_ucontext *ctx =
1101 rdma_udata_to_drv_context(udata, struct siw_ucontext,
1104 siw_dbg_cq(cq, "free CQ resources\n");
1109 rdma_user_mmap_entry_remove(cq->cq_entry);
1111 atomic_dec(&sdev->num_cq);
1120 * Populate CQ of requested size
1122 * @base_cq: CQ as allocated by RDMA midlayer
1123 * @attr: Initial CQ attributes
1124 * @udata: relates to user context
1127 int siw_create_cq(struct ib_cq *base_cq, const struct ib_cq_init_attr *attr,
1128 struct ib_udata *udata)
1130 struct siw_device *sdev = to_siw_dev(base_cq->device);
1131 struct siw_cq *cq = to_siw_cq(base_cq);
1132 int rv, size = attr->cqe;
1134 if (atomic_inc_return(&sdev->num_cq) > SIW_MAX_CQ) {
1135 siw_dbg(base_cq->device, "too many CQ's\n");
1139 if (size < 1 || size > sdev->attrs.max_cqe) {
1140 siw_dbg(base_cq->device, "CQ size error: %d\n", size);
1144 size = roundup_pow_of_two(size);
1145 cq->base_cq.cqe = size;
1149 cq->queue = vmalloc_user(size * sizeof(struct siw_cqe) +
1150 sizeof(struct siw_cq_ctrl));
1152 cq->queue = vzalloc(size * sizeof(struct siw_cqe) +
1153 sizeof(struct siw_cq_ctrl));
1155 if (cq->queue == NULL) {
1159 get_random_bytes(&cq->id, 4);
1160 siw_dbg(base_cq->device, "new CQ [%u]\n", cq->id);
1162 spin_lock_init(&cq->lock);
1164 cq->notify = (struct siw_cq_ctrl *)&cq->queue[size];
1167 struct siw_uresp_create_cq uresp = {};
1168 struct siw_ucontext *ctx =
1169 rdma_udata_to_drv_context(udata, struct siw_ucontext,
1171 size_t length = size * sizeof(struct siw_cqe) +
1172 sizeof(struct siw_cq_ctrl);
1175 siw_mmap_entry_insert(ctx, cq->queue,
1176 length, &uresp.cq_key);
1177 if (!cq->cq_entry) {
1182 uresp.cq_id = cq->id;
1183 uresp.num_cqe = size;
1185 if (udata->outlen < sizeof(uresp)) {
1189 rv = ib_copy_to_udata(udata, &uresp, sizeof(uresp));
1196 siw_dbg(base_cq->device, "CQ creation failed: %d", rv);
1198 if (cq && cq->queue) {
1199 struct siw_ucontext *ctx =
1200 rdma_udata_to_drv_context(udata, struct siw_ucontext,
1203 rdma_user_mmap_entry_remove(cq->cq_entry);
1206 atomic_dec(&sdev->num_cq);
1214 * Reap CQ entries if available and copy work completion status into
1215 * array of WC's provided by caller. Returns number of reaped CQE's.
1217 * @base_cq: Base CQ contained in siw CQ.
1218 * @num_cqe: Maximum number of CQE's to reap.
1219 * @wc: Array of work completions to be filled by siw.
1221 int siw_poll_cq(struct ib_cq *base_cq, int num_cqe, struct ib_wc *wc)
1223 struct siw_cq *cq = to_siw_cq(base_cq);
1226 for (i = 0; i < num_cqe; i++) {
1227 if (!siw_reap_cqe(cq, wc))
1235 * siw_req_notify_cq()
1237 * Request notification for new CQE's added to that CQ.
1239 * o SIW_CQ_NOTIFY_SOLICITED lets siw trigger a notification
1240 * event if a WQE with notification flag set enters the CQ
1241 * o SIW_CQ_NOTIFY_NEXT_COMP lets siw trigger a notification
1242 * event if a WQE enters the CQ.
1243 * o IB_CQ_REPORT_MISSED_EVENTS: return value will provide the
1244 * number of not reaped CQE's regardless of its notification
1245 * type and current or new CQ notification settings.
1247 * @base_cq: Base CQ contained in siw CQ.
1248 * @flags: Requested notification flags.
1250 int siw_req_notify_cq(struct ib_cq *base_cq, enum ib_cq_notify_flags flags)
1252 struct siw_cq *cq = to_siw_cq(base_cq);
1254 siw_dbg_cq(cq, "flags: 0x%02x\n", flags);
1256 if ((flags & IB_CQ_SOLICITED_MASK) == IB_CQ_SOLICITED)
1258 * Enable CQ event for next solicited completion.
1259 * and make it visible to all associated producers.
1261 smp_store_mb(cq->notify->flags, SIW_NOTIFY_SOLICITED);
1264 * Enable CQ event for any signalled completion.
1265 * and make it visible to all associated producers.
1267 smp_store_mb(cq->notify->flags, SIW_NOTIFY_ALL);
1269 if (flags & IB_CQ_REPORT_MISSED_EVENTS)
1270 return cq->cq_put - cq->cq_get;
1278 * Release Memory Region.
1280 * @base_mr: Base MR contained in siw MR.
1281 * @udata: points to user context, unused.
1283 int siw_dereg_mr(struct ib_mr *base_mr, struct ib_udata *udata)
1285 struct siw_mr *mr = to_siw_mr(base_mr);
1286 struct siw_device *sdev = to_siw_dev(base_mr->device);
1288 siw_dbg_mem(mr->mem, "deregister MR\n");
1290 atomic_dec(&sdev->num_mr);
1292 siw_mr_drop_mem(mr);
1301 * Register Memory Region.
1303 * @pd: Protection Domain
1304 * @start: starting address of MR (virtual address)
1306 * @rnic_va: not used by siw
1307 * @rights: MR access rights
1308 * @udata: user buffer to communicate STag and Key.
1310 struct ib_mr *siw_reg_user_mr(struct ib_pd *pd, u64 start, u64 len,
1311 u64 rnic_va, int rights, struct ib_udata *udata)
1313 struct siw_mr *mr = NULL;
1314 struct siw_umem *umem = NULL;
1315 struct siw_ureq_reg_mr ureq;
1316 struct siw_device *sdev = to_siw_dev(pd->device);
1318 unsigned long mem_limit = rlimit(RLIMIT_MEMLOCK);
1321 siw_dbg_pd(pd, "start: 0x%pK, va: 0x%pK, len: %llu\n",
1322 (void *)(uintptr_t)start, (void *)(uintptr_t)rnic_va,
1323 (unsigned long long)len);
1325 if (atomic_inc_return(&sdev->num_mr) > SIW_MAX_MR) {
1326 siw_dbg_pd(pd, "too many mr's\n");
1334 if (mem_limit != RLIM_INFINITY) {
1335 unsigned long num_pages =
1336 (PAGE_ALIGN(len + (start & ~PAGE_MASK))) >> PAGE_SHIFT;
1337 mem_limit >>= PAGE_SHIFT;
1339 if (num_pages > mem_limit - current->mm->locked_vm) {
1340 siw_dbg_pd(pd, "pages req %lu, max %lu, lock %lu\n",
1341 num_pages, mem_limit,
1342 current->mm->locked_vm);
1347 umem = siw_umem_get(start, len, ib_access_writable(rights));
1350 siw_dbg_pd(pd, "getting user memory failed: %d\n", rv);
1354 mr = kzalloc(sizeof(*mr), GFP_KERNEL);
1359 rv = siw_mr_add_mem(mr, pd, umem, start, len, rights);
1364 struct siw_uresp_reg_mr uresp = {};
1365 struct siw_mem *mem = mr->mem;
1367 if (udata->inlen < sizeof(ureq)) {
1371 rv = ib_copy_from_udata(&ureq, udata, sizeof(ureq));
1375 mr->base_mr.lkey |= ureq.stag_key;
1376 mr->base_mr.rkey |= ureq.stag_key;
1377 mem->stag |= ureq.stag_key;
1378 uresp.stag = mem->stag;
1380 if (udata->outlen < sizeof(uresp)) {
1384 rv = ib_copy_to_udata(udata, &uresp, sizeof(uresp));
1388 mr->mem->stag_valid = 1;
1390 return &mr->base_mr;
1393 atomic_dec(&sdev->num_mr);
1396 siw_mr_drop_mem(mr);
1400 siw_umem_release(umem, false);
1405 struct ib_mr *siw_alloc_mr(struct ib_pd *pd, enum ib_mr_type mr_type,
1408 struct siw_device *sdev = to_siw_dev(pd->device);
1409 struct siw_mr *mr = NULL;
1410 struct siw_pbl *pbl = NULL;
1413 if (atomic_inc_return(&sdev->num_mr) > SIW_MAX_MR) {
1414 siw_dbg_pd(pd, "too many mr's\n");
1418 if (mr_type != IB_MR_TYPE_MEM_REG) {
1419 siw_dbg_pd(pd, "mr type %d unsupported\n", mr_type);
1423 if (max_sge > SIW_MAX_SGE_PBL) {
1424 siw_dbg_pd(pd, "too many sge's: %d\n", max_sge);
1428 pbl = siw_pbl_alloc(max_sge);
1431 siw_dbg_pd(pd, "pbl allocation failed: %d\n", rv);
1435 mr = kzalloc(sizeof(*mr), GFP_KERNEL);
1440 rv = siw_mr_add_mem(mr, pd, pbl, 0, max_sge * PAGE_SIZE, 0);
1444 mr->mem->is_pbl = 1;
1446 siw_dbg_pd(pd, "[MEM %u]: success\n", mr->mem->stag);
1448 return &mr->base_mr;
1451 atomic_dec(&sdev->num_mr);
1457 siw_mr_drop_mem(mr);
1460 siw_dbg_pd(pd, "failed: %d\n", rv);
1465 /* Just used to count number of pages being mapped */
1466 static int siw_set_pbl_page(struct ib_mr *base_mr, u64 buf_addr)
1471 int siw_map_mr_sg(struct ib_mr *base_mr, struct scatterlist *sl, int num_sle,
1472 unsigned int *sg_off)
1474 struct scatterlist *slp;
1475 struct siw_mr *mr = to_siw_mr(base_mr);
1476 struct siw_mem *mem = mr->mem;
1477 struct siw_pbl *pbl = mem->pbl;
1478 struct siw_pble *pble;
1479 unsigned long pbl_size;
1483 siw_dbg_mem(mem, "no PBL allocated\n");
1488 if (pbl->max_buf < num_sle) {
1489 siw_dbg_mem(mem, "too many SGE's: %d > %d\n",
1490 num_sle, pbl->max_buf);
1493 for_each_sg(sl, slp, num_sle, i) {
1494 if (sg_dma_len(slp) == 0) {
1495 siw_dbg_mem(mem, "empty SGE\n");
1499 pble->addr = sg_dma_address(slp);
1500 pble->size = sg_dma_len(slp);
1502 pbl_size = pble->size;
1505 /* Merge PBL entries if adjacent */
1506 if (pble->addr + pble->size == sg_dma_address(slp)) {
1507 pble->size += sg_dma_len(slp);
1511 pble->addr = sg_dma_address(slp);
1512 pble->size = sg_dma_len(slp);
1513 pble->pbl_off = pbl_size;
1515 pbl_size += sg_dma_len(slp);
1518 "sge[%d], size %u, addr 0x%p, total %lu\n",
1519 i, pble->size, (void *)(uintptr_t)pble->addr,
1522 rv = ib_sg_to_pages(base_mr, sl, num_sle, sg_off, siw_set_pbl_page);
1524 mem->len = base_mr->length;
1525 mem->va = base_mr->iova;
1527 "%llu bytes, start 0x%pK, %u SLE to %u entries\n",
1528 mem->len, (void *)(uintptr_t)mem->va, num_sle,
1537 * Create a (empty) DMA memory region, where no umem is attached.
1539 struct ib_mr *siw_get_dma_mr(struct ib_pd *pd, int rights)
1541 struct siw_device *sdev = to_siw_dev(pd->device);
1542 struct siw_mr *mr = NULL;
1545 if (atomic_inc_return(&sdev->num_mr) > SIW_MAX_MR) {
1546 siw_dbg_pd(pd, "too many mr's\n");
1550 mr = kzalloc(sizeof(*mr), GFP_KERNEL);
1555 rv = siw_mr_add_mem(mr, pd, NULL, 0, ULONG_MAX, rights);
1559 mr->mem->stag_valid = 1;
1561 siw_dbg_pd(pd, "[MEM %u]: success\n", mr->mem->stag);
1563 return &mr->base_mr;
1569 atomic_dec(&sdev->num_mr);
1577 * Create Shared Receive Queue of attributes @init_attrs
1578 * within protection domain given by @pd.
1580 * @base_srq: Base SRQ contained in siw SRQ.
1581 * @init_attrs: SRQ init attributes.
1582 * @udata: points to user context
1584 int siw_create_srq(struct ib_srq *base_srq,
1585 struct ib_srq_init_attr *init_attrs, struct ib_udata *udata)
1587 struct siw_srq *srq = to_siw_srq(base_srq);
1588 struct ib_srq_attr *attrs = &init_attrs->attr;
1589 struct siw_device *sdev = to_siw_dev(base_srq->device);
1590 struct siw_ucontext *ctx =
1591 rdma_udata_to_drv_context(udata, struct siw_ucontext,
1595 if (atomic_inc_return(&sdev->num_srq) > SIW_MAX_SRQ) {
1596 siw_dbg_pd(base_srq->pd, "too many SRQ's\n");
1600 if (attrs->max_wr == 0 || attrs->max_wr > SIW_MAX_SRQ_WR ||
1601 attrs->max_sge > SIW_MAX_SGE || attrs->srq_limit > attrs->max_wr) {
1605 srq->max_sge = attrs->max_sge;
1606 srq->num_rqe = roundup_pow_of_two(attrs->max_wr);
1607 srq->limit = attrs->srq_limit;
1611 srq->is_kernel_res = !udata;
1615 vmalloc_user(srq->num_rqe * sizeof(struct siw_rqe));
1617 srq->recvq = vzalloc(srq->num_rqe * sizeof(struct siw_rqe));
1619 if (srq->recvq == NULL) {
1624 struct siw_uresp_create_srq uresp = {};
1625 size_t length = srq->num_rqe * sizeof(struct siw_rqe);
1628 siw_mmap_entry_insert(ctx, srq->recvq,
1629 length, &uresp.srq_key);
1630 if (!srq->srq_entry) {
1635 uresp.num_rqe = srq->num_rqe;
1637 if (udata->outlen < sizeof(uresp)) {
1641 rv = ib_copy_to_udata(udata, &uresp, sizeof(uresp));
1645 spin_lock_init(&srq->lock);
1647 siw_dbg_pd(base_srq->pd, "[SRQ]: success\n");
1654 rdma_user_mmap_entry_remove(srq->srq_entry);
1657 atomic_dec(&sdev->num_srq);
1665 * Modify SRQ. The caller may resize SRQ and/or set/reset notification
1666 * limit and (re)arm IB_EVENT_SRQ_LIMIT_REACHED notification.
1668 * NOTE: it is unclear if RDMA core allows for changing the MAX_SGE
1669 * parameter. siw_modify_srq() does not check the attrs->max_sge param.
1671 int siw_modify_srq(struct ib_srq *base_srq, struct ib_srq_attr *attrs,
1672 enum ib_srq_attr_mask attr_mask, struct ib_udata *udata)
1674 struct siw_srq *srq = to_siw_srq(base_srq);
1675 unsigned long flags;
1678 spin_lock_irqsave(&srq->lock, flags);
1680 if (attr_mask & IB_SRQ_MAX_WR) {
1681 /* resize request not yet supported */
1685 if (attr_mask & IB_SRQ_LIMIT) {
1686 if (attrs->srq_limit) {
1687 if (unlikely(attrs->srq_limit > srq->num_rqe)) {
1695 srq->limit = attrs->srq_limit;
1698 spin_unlock_irqrestore(&srq->lock, flags);
1706 * Query SRQ attributes.
1708 int siw_query_srq(struct ib_srq *base_srq, struct ib_srq_attr *attrs)
1710 struct siw_srq *srq = to_siw_srq(base_srq);
1711 unsigned long flags;
1713 spin_lock_irqsave(&srq->lock, flags);
1715 attrs->max_wr = srq->num_rqe;
1716 attrs->max_sge = srq->max_sge;
1717 attrs->srq_limit = srq->limit;
1719 spin_unlock_irqrestore(&srq->lock, flags);
1728 * It is assumed that the SRQ is not referenced by any
1729 * QP anymore - the code trusts the RDMA core environment to keep track
1732 int siw_destroy_srq(struct ib_srq *base_srq, struct ib_udata *udata)
1734 struct siw_srq *srq = to_siw_srq(base_srq);
1735 struct siw_device *sdev = to_siw_dev(base_srq->device);
1736 struct siw_ucontext *ctx =
1737 rdma_udata_to_drv_context(udata, struct siw_ucontext,
1741 rdma_user_mmap_entry_remove(srq->srq_entry);
1743 atomic_dec(&sdev->num_srq);
1748 * siw_post_srq_recv()
1750 * Post a list of receive queue elements to SRQ.
1751 * NOTE: The function does not check or lock a certain SRQ state
1752 * during the post operation. The code simply trusts the
1753 * RDMA core environment.
1755 * @base_srq: Base SRQ contained in siw SRQ
1756 * @wr: List of R-WR's
1757 * @bad_wr: Updated to failing WR if posting fails.
1759 int siw_post_srq_recv(struct ib_srq *base_srq, const struct ib_recv_wr *wr,
1760 const struct ib_recv_wr **bad_wr)
1762 struct siw_srq *srq = to_siw_srq(base_srq);
1763 unsigned long flags;
1766 if (unlikely(!srq->is_kernel_res)) {
1767 siw_dbg_pd(base_srq->pd,
1768 "[SRQ]: no kernel post_recv for mapped srq\n");
1773 * Serialize potentially multiple producers.
1774 * Also needed to serialize potentially multiple
1777 spin_lock_irqsave(&srq->lock, flags);
1780 u32 idx = srq->rq_put % srq->num_rqe;
1781 struct siw_rqe *rqe = &srq->recvq[idx];
1784 siw_dbg_pd(base_srq->pd, "SRQ full\n");
1788 if (unlikely(wr->num_sge > srq->max_sge)) {
1789 siw_dbg_pd(base_srq->pd,
1790 "[SRQ]: too many sge's: %d\n", wr->num_sge);
1794 rqe->id = wr->wr_id;
1795 rqe->num_sge = wr->num_sge;
1796 siw_copy_sgl(wr->sg_list, rqe->sge, wr->num_sge);
1798 /* Make sure S-RQE is completely written before valid */
1801 rqe->flags = SIW_WQE_VALID;
1806 spin_unlock_irqrestore(&srq->lock, flags);
1808 if (unlikely(rv < 0)) {
1809 siw_dbg_pd(base_srq->pd, "[SRQ]: error %d\n", rv);
1815 void siw_qp_event(struct siw_qp *qp, enum ib_event_type etype)
1817 struct ib_event event;
1818 struct ib_qp *base_qp = &qp->base_qp;
1821 * Do not report asynchronous errors on QP which gets
1822 * destroyed via verbs interface (siw_destroy_qp())
1824 if (qp->attrs.flags & SIW_QP_IN_DESTROY)
1827 event.event = etype;
1828 event.device = base_qp->device;
1829 event.element.qp = base_qp;
1831 if (base_qp->event_handler) {
1832 siw_dbg_qp(qp, "reporting event %d\n", etype);
1833 base_qp->event_handler(&event, base_qp->qp_context);
1837 void siw_cq_event(struct siw_cq *cq, enum ib_event_type etype)
1839 struct ib_event event;
1840 struct ib_cq *base_cq = &cq->base_cq;
1842 event.event = etype;
1843 event.device = base_cq->device;
1844 event.element.cq = base_cq;
1846 if (base_cq->event_handler) {
1847 siw_dbg_cq(cq, "reporting CQ event %d\n", etype);
1848 base_cq->event_handler(&event, base_cq->cq_context);
1852 void siw_srq_event(struct siw_srq *srq, enum ib_event_type etype)
1854 struct ib_event event;
1855 struct ib_srq *base_srq = &srq->base_srq;
1857 event.event = etype;
1858 event.device = base_srq->device;
1859 event.element.srq = base_srq;
1861 if (base_srq->event_handler) {
1862 siw_dbg_pd(srq->base_srq.pd,
1863 "reporting SRQ event %d\n", etype);
1864 base_srq->event_handler(&event, base_srq->srq_context);
1868 void siw_port_event(struct siw_device *sdev, u8 port, enum ib_event_type etype)
1870 struct ib_event event;
1872 event.event = etype;
1873 event.device = &sdev->base_dev;
1874 event.element.port_num = port;
1876 siw_dbg(&sdev->base_dev, "reporting port event %d\n", etype);
1878 ib_dispatch_event(&event);