1 * Renesas Electronics SH EtherMAC
3 This file provides information on what the device node for the SH EtherMAC
7 - compatible: "renesas,gether-r8a7740" if the device is a part of R8A7740 SoC.
8 "renesas,ether-r8a7743" if the device is a part of R8A7743 SoC.
9 "renesas,ether-r8a7745" if the device is a part of R8A7745 SoC.
10 "renesas,ether-r8a7778" if the device is a part of R8A7778 SoC.
11 "renesas,ether-r8a7779" if the device is a part of R8A7779 SoC.
12 "renesas,ether-r8a7790" if the device is a part of R8A7790 SoC.
13 "renesas,ether-r8a7791" if the device is a part of R8A7791 SoC.
14 "renesas,ether-r8a7793" if the device is a part of R8A7793 SoC.
15 "renesas,ether-r8a7794" if the device is a part of R8A7794 SoC.
16 "renesas,ether-r7s72100" if the device is a part of R7S72100 SoC.
17 - reg: offset and length of (1) the E-DMAC/feLic register block (required),
18 (2) the TSU register block (optional).
19 - interrupts: interrupt specifier for the sole interrupt.
20 - phy-mode: see ethernet.txt file in the same directory.
21 - phy-handle: see ethernet.txt file in the same directory.
22 - #address-cells: number of address cells for the MDIO bus, must be equal to 1.
23 - #size-cells: number of size cells on the MDIO bus, must be equal to 0.
24 - clocks: clock phandle and specifier pair.
25 - pinctrl-0: phandle, referring to a default pin configuration node.
28 - interrupt-parent: the phandle for the interrupt controller that services
29 interrupts for this device.
30 - pinctrl-names: pin configuration state name ("default").
31 - renesas,no-ether-link: boolean, specify when a board does not provide a proper
33 - renesas,ether-link-active-low: boolean, specify when the Ether LINK signal is
34 active-low instead of normal active-high.
36 Example (Lager board):
39 compatible = "renesas,ether-r8a7790";
40 reg = <0 0xee700000 0 0x400>;
41 interrupt-parent = <&gic>;
42 interrupts = <0 162 IRQ_TYPE_LEVEL_HIGH>;
43 clocks = <&mstp8_clks R8A7790_CLK_ETHER>;
46 pinctrl-0 = <ðer_pins>;
47 pinctrl-names = "default";
48 renesas,ether-link-active-low;
52 phy1: ethernet-phy@1 {
54 interrupt-parent = <&irqc0>;
55 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
56 pinctrl-0 = <&phy1_pins>;
57 pinctrl-names = "default";