sh/include/asm/io.h

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 #ifndef __ASM_SH_IO_H
   3 #define __ASM_SH_IO_H
   4
   5 /*
   6  * Convention:
   7  *    read{b,w,l,q}/write{b,w,l,q} are for PCI,
   8  *    while in{b,w,l}/out{b,w,l} are for ISA
   9  *
  10  * In addition we have 'pausing' versions: in{b,w,l}_p/out{b,w,l}_p
  11  * and 'string' versions: ins{b,w,l}/outs{b,w,l}
  12  *
  13  * While read{b,w,l,q} and write{b,w,l,q} contain memory barriers
  14  * automatically, there are also __raw versions, which do not.
  15  */
  16 #include <linux/errno.h>
  17 #include <asm/cache.h>
  18 #include <asm/addrspace.h>
  19 #include <asm/machvec.h>
  20 #include <asm/page.h>
  21 #include <linux/pgtable.h>
  22 #include <asm-generic/iomap.h>
  23
  24 #define __IO_PREFIX     generic
  25 #include <asm/io_generic.h>
  26 #include <asm-generic/pci_iomap.h>
  27 #include <mach/mangle-port.h>
  28
  29 #define __raw_writeb(v,a)       (__chk_io_ptr(a), *(volatile u8  __force *)(a) = (v))
  30 #define __raw_writew(v,a)       (__chk_io_ptr(a), *(volatile u16 __force *)(a) = (v))
  31 #define __raw_writel(v,a)       (__chk_io_ptr(a), *(volatile u32 __force *)(a) = (v))
  32 #define __raw_writeq(v,a)       (__chk_io_ptr(a), *(volatile u64 __force *)(a) = (v))
  33
  34 #define __raw_readb(a)          (__chk_io_ptr(a), *(volatile u8  __force *)(a))
  35 #define __raw_readw(a)          (__chk_io_ptr(a), *(volatile u16 __force *)(a))
  36 #define __raw_readl(a)          (__chk_io_ptr(a), *(volatile u32 __force *)(a))
  37 #define __raw_readq(a)          (__chk_io_ptr(a), *(volatile u64 __force *)(a))
  38
  39 #define readb_relaxed(c)        ({ u8  __v = ioswabb(__raw_readb(c)); __v; })
  40 #define readw_relaxed(c)        ({ u16 __v = ioswabw(__raw_readw(c)); __v; })
  41 #define readl_relaxed(c)        ({ u32 __v = ioswabl(__raw_readl(c)); __v; })
  42 #define readq_relaxed(c)        ({ u64 __v = ioswabq(__raw_readq(c)); __v; })
  43
  44 #define writeb_relaxed(v,c)     ((void)__raw_writeb((__force  u8)ioswabb(v),c))
  45 #define writew_relaxed(v,c)     ((void)__raw_writew((__force u16)ioswabw(v),c))
  46 #define writel_relaxed(v,c)     ((void)__raw_writel((__force u32)ioswabl(v),c))
  47 #define writeq_relaxed(v,c)     ((void)__raw_writeq((__force u64)ioswabq(v),c))
  48
  49 #define readb(a)                ({ u8  r_ = readb_relaxed(a); rmb(); r_; })
  50 #define readw(a)                ({ u16 r_ = readw_relaxed(a); rmb(); r_; })
  51 #define readl(a)                ({ u32 r_ = readl_relaxed(a); rmb(); r_; })
  52 #define readq(a)                ({ u64 r_ = readq_relaxed(a); rmb(); r_; })
  53
  54 #define writeb(v,a)             ({ wmb(); writeb_relaxed((v),(a)); })
  55 #define writew(v,a)             ({ wmb(); writew_relaxed((v),(a)); })
  56 #define writel(v,a)             ({ wmb(); writel_relaxed((v),(a)); })
  57 #define writeq(v,a)             ({ wmb(); writeq_relaxed((v),(a)); })
  58
  59 #define readsb(p,d,l)           __raw_readsb(p,d,l)
  60 #define readsw(p,d,l)           __raw_readsw(p,d,l)
  61 #define readsl(p,d,l)           __raw_readsl(p,d,l)
  62
  63 #define writesb(p,d,l)          __raw_writesb(p,d,l)
  64 #define writesw(p,d,l)          __raw_writesw(p,d,l)
  65 #define writesl(p,d,l)          __raw_writesl(p,d,l)
  66
  67 #define __BUILD_UNCACHED_IO(bwlq, type)                                 \
  68 static inline type read##bwlq##_uncached(unsigned long addr)            \
  69 {                                                                       \
  70         type ret;                                                       \
  71         jump_to_uncached();                                             \
  72         ret = __raw_read##bwlq(addr);                                   \
  73         back_to_cached();                                               \
  74         return ret;                                                     \
  75 }                                                                       \
  76                                                                         \
  77 static inline void write##bwlq##_uncached(type v, unsigned long addr)   \
  78 {                                                                       \
  79         jump_to_uncached();                                             \
  80         __raw_write##bwlq(v, addr);                                     \
  81         back_to_cached();                                               \
  82 }
  83
  84 __BUILD_UNCACHED_IO(b, u8)
  85 __BUILD_UNCACHED_IO(w, u16)
  86 __BUILD_UNCACHED_IO(l, u32)
  87 __BUILD_UNCACHED_IO(q, u64)
  88
  89 #define __BUILD_MEMORY_STRING(pfx, bwlq, type)                          \
  90                                                                         \
  91 static inline void                                                      \
  92 pfx##writes##bwlq(volatile void __iomem *mem, const void *addr,         \
  93                   unsigned int count)                                   \
  94 {                                                                       \
  95         const volatile type *__addr = addr;                             \
  96                                                                         \
  97         while (count--) {                                               \
  98                 __raw_write##bwlq(*__addr, mem);                        \
  99                 __addr++;                                               \
 100         }                                                               \
 101 }                                                                       \
 102                                                                         \
 103 static inline void pfx##reads##bwlq(volatile void __iomem *mem,         \
 104                                     void *addr, unsigned int count)     \
 105 {                                                                       \
 106         volatile type *__addr = addr;                                   \
 107                                                                         \
 108         while (count--) {                                               \
 109                 *__addr = __raw_read##bwlq(mem);                        \
 110                 __addr++;                                               \
 111         }                                                               \
 112 }
 113
 114 __BUILD_MEMORY_STRING(__raw_, b, u8)
 115 __BUILD_MEMORY_STRING(__raw_, w, u16)
 116
 117 void __raw_writesl(void __iomem *addr, const void *data, int longlen);
 118 void __raw_readsl(const void __iomem *addr, void *data, int longlen);
 119
 120 __BUILD_MEMORY_STRING(__raw_, q, u64)
 121
 122 #ifdef CONFIG_HAS_IOPORT_MAP
 123
 124 /*
 125  * Slowdown I/O port space accesses for antique hardware.
 126  */
 127 #undef CONF_SLOWDOWN_IO
 128
 129 /*
 130  * On SuperH I/O ports are memory mapped, so we access them using normal
 131  * load/store instructions. sh_io_port_base is the virtual address to
 132  * which all ports are being mapped.
 133  */
 134 extern unsigned long sh_io_port_base;
 135
 136 static inline void __set_io_port_base(unsigned long pbase)
 137 {
 138         *(unsigned long *)&sh_io_port_base = pbase;
 139         barrier();
 140 }
 141
 142 #ifdef CONFIG_GENERIC_IOMAP
 143 #define __ioport_map ioport_map
 144 #else
 145 extern void __iomem *__ioport_map(unsigned long addr, unsigned int size);
 146 #endif
 147
 148 #ifdef CONF_SLOWDOWN_IO
 149 #define SLOW_DOWN_IO __raw_readw(sh_io_port_base)
 150 #else
 151 #define SLOW_DOWN_IO
 152 #endif
 153
 154 #define __BUILD_IOPORT_SINGLE(pfx, bwlq, type, p, slow)                 \
 155                                                                         \
 156 static inline void pfx##out##bwlq##p(type val, unsigned long port)      \
 157 {                                                                       \
 158         volatile type *__addr;                                          \
 159                                                                         \
 160         __addr = __ioport_map(port, sizeof(type));                      \
 161         *__addr = val;                                                  \
 162         slow;                                                           \
 163 }                                                                       \
 164                                                                         \
 165 static inline type pfx##in##bwlq##p(unsigned long port)                 \
 166 {                                                                       \
 167         volatile type *__addr;                                          \
 168         type __val;                                                     \
 169                                                                         \
 170         __addr = __ioport_map(port, sizeof(type));                      \
 171         __val = *__addr;                                                \
 172         slow;                                                           \
 173                                                                         \
 174         return __val;                                                   \
 175 }
 176
 177 #define __BUILD_IOPORT_PFX(bus, bwlq, type)                             \
 178         __BUILD_IOPORT_SINGLE(bus, bwlq, type, ,)                       \
 179         __BUILD_IOPORT_SINGLE(bus, bwlq, type, _p, SLOW_DOWN_IO)
 180
 181 #define BUILDIO_IOPORT(bwlq, type)                                      \
 182         __BUILD_IOPORT_PFX(, bwlq, type)
 183
 184 BUILDIO_IOPORT(b, u8)
 185 BUILDIO_IOPORT(w, u16)
 186 BUILDIO_IOPORT(l, u32)
 187 BUILDIO_IOPORT(q, u64)
 188
 189 #define __BUILD_IOPORT_STRING(bwlq, type)                               \
 190                                                                         \
 191 static inline void outs##bwlq(unsigned long port, const void *addr,     \
 192                               unsigned int count)                       \
 193 {                                                                       \
 194         const volatile type *__addr = addr;                             \
 195                                                                         \
 196         while (count--) {                                               \
 197                 out##bwlq(*__addr, port);                               \
 198                 __addr++;                                               \
 199         }                                                               \
 200 }                                                                       \
 201                                                                         \
 202 static inline void ins##bwlq(unsigned long port, void *addr,            \
 203                              unsigned int count)                        \
 204 {                                                                       \
 205         volatile type *__addr = addr;                                   \
 206                                                                         \
 207         while (count--) {                                               \
 208                 *__addr = in##bwlq(port);                               \
 209                 __addr++;                                               \
 210         }                                                               \
 211 }
 212
 213 __BUILD_IOPORT_STRING(b, u8)
 214 __BUILD_IOPORT_STRING(w, u16)
 215 __BUILD_IOPORT_STRING(l, u32)
 216 __BUILD_IOPORT_STRING(q, u64)
 217
 218 #else /* !CONFIG_HAS_IOPORT_MAP */
 219
 220 #include <asm/io_noioport.h>
 221
 222 #endif
 223
 224
 225 #define IO_SPACE_LIMIT 0xffffffff
 226
 227 /* We really want to try and get these to memcpy etc */
 228 void memcpy_fromio(void *, const volatile void __iomem *, unsigned long);
 229 void memcpy_toio(volatile void __iomem *, const void *, unsigned long);
 230 void memset_io(volatile void __iomem *, int, unsigned long);
 231
 232 /* Quad-word real-mode I/O, don't ask.. */
 233 unsigned long long peek_real_address_q(unsigned long long addr);
 234 unsigned long long poke_real_address_q(unsigned long long addr,
 235                                        unsigned long long val);
 236
 237 #if !defined(CONFIG_MMU)
 238 #define virt_to_phys(address)   ((unsigned long)(address))
 239 #define phys_to_virt(address)   ((void *)(address))
 240 #else
 241 #define virt_to_phys(address)   (__pa(address))
 242 #define phys_to_virt(address)   (__va(address))
 243 #endif
 244
 245 #ifdef CONFIG_MMU
 246 void iounmap(void __iomem *addr);
 247 void __iomem *__ioremap_caller(phys_addr_t offset, unsigned long size,
 248                                pgprot_t prot, void *caller);
 249
 250 static inline void __iomem *ioremap(phys_addr_t offset, unsigned long size)
 251 {
 252         return __ioremap_caller(offset, size, PAGE_KERNEL_NOCACHE,
 253                         __builtin_return_address(0));
 254 }
 255
 256 static inline void __iomem *
 257 ioremap_cache(phys_addr_t offset, unsigned long size)
 258 {
 259         return __ioremap_caller(offset, size, PAGE_KERNEL,
 260                         __builtin_return_address(0));
 261 }
 262 #define ioremap_cache ioremap_cache
 263
 264 #ifdef CONFIG_HAVE_IOREMAP_PROT
 265 static inline void __iomem *ioremap_prot(phys_addr_t offset, unsigned long size,
 266                 unsigned long flags)
 267 {
 268         return __ioremap_caller(offset, size, __pgprot(flags),
 269                         __builtin_return_address(0));
 270 }
 271 #endif /* CONFIG_HAVE_IOREMAP_PROT */
 272
 273 #else /* CONFIG_MMU */
 274 static inline void __iomem *ioremap(phys_addr_t offset, size_t size)
 275 {
 276         return (void __iomem *)(unsigned long)offset;
 277 }
 278
 279 static inline void iounmap(volatile void __iomem *addr) { }
 280 #endif /* CONFIG_MMU */
 281
 282 #define ioremap_uc      ioremap
 283
 284 /*
 285  * Convert a physical pointer to a virtual kernel pointer for /dev/mem
 286  * access
 287  */
 288 #define xlate_dev_mem_ptr(p)    __va(p)
 289
 290 #define ARCH_HAS_VALID_PHYS_ADDR_RANGE
 291 int valid_phys_addr_range(phys_addr_t addr, size_t size);
 292 int valid_mmap_phys_addr_range(unsigned long pfn, size_t size);
 293
 294 #endif /* __ASM_SH_IO_H */