1 // SPDX-License-Identifier: GPL-2.0-only
3 * Mediated virtual PCI serial host device driver
5 * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved.
6 * Author: Neo Jia <cjia@nvidia.com>
7 * Kirti Wankhede <kwankhede@nvidia.com>
9 * Sample driver that creates mdev device that simulates serial port over PCI
13 #include <linux/init.h>
14 #include <linux/module.h>
15 #include <linux/kernel.h>
17 #include <linux/poll.h>
18 #include <linux/slab.h>
19 #include <linux/cdev.h>
20 #include <linux/sched.h>
21 #include <linux/wait.h>
22 #include <linux/vfio.h>
23 #include <linux/iommu.h>
24 #include <linux/sysfs.h>
25 #include <linux/ctype.h>
26 #include <linux/file.h>
27 #include <linux/mdev.h>
28 #include <linux/pci.h>
29 #include <linux/serial.h>
30 #include <uapi/linux/serial_reg.h>
31 #include <linux/eventfd.h>
32 #include <linux/anon_inodes.h>
38 #define VERSION_STRING "0.1"
39 #define DRIVER_AUTHOR "NVIDIA Corporation"
41 #define MTTY_CLASS_NAME "mtty"
43 #define MTTY_NAME "mtty"
45 #define MTTY_STRING_LEN 16
47 #define MTTY_CONFIG_SPACE_SIZE 0xff
48 #define MTTY_IO_BAR_SIZE 0x8
49 #define MTTY_MMIO_BAR_SIZE 0x100000
51 #define STORE_LE16(addr, val) (*(u16 *)addr = val)
52 #define STORE_LE32(addr, val) (*(u32 *)addr = val)
54 #define MAX_FIFO_SIZE 16
56 #define CIRCULAR_BUF_INC_IDX(idx) (idx = (idx + 1) & (MAX_FIFO_SIZE - 1))
58 #define MTTY_VFIO_PCI_OFFSET_SHIFT 40
60 #define MTTY_VFIO_PCI_OFFSET_TO_INDEX(off) (off >> MTTY_VFIO_PCI_OFFSET_SHIFT)
61 #define MTTY_VFIO_PCI_INDEX_TO_OFFSET(index) \
62 ((u64)(index) << MTTY_VFIO_PCI_OFFSET_SHIFT)
63 #define MTTY_VFIO_PCI_OFFSET_MASK \
64 (((u64)(1) << MTTY_VFIO_PCI_OFFSET_SHIFT) - 1)
71 static struct mtty_dev {
73 struct class *vd_class;
77 struct mdev_parent parent;
80 struct mdev_region_info {
87 #if defined(DEBUG_REGS)
88 static const char *wr_reg[] = {
99 static const char *rd_reg[] = {
111 /* loop back buffer */
113 u8 fifo[MAX_FIFO_SIZE];
119 u8 uart_reg[8]; /* 8 registers */
120 struct rxtx rxtx; /* loop back buffer */
124 u8 fcr; /* FIFO control register */
126 u8 intr_trigger_level; /* interrupt trigger level */
131 #define MTTY_MAGIC 0x7e9d09898c3e2c4e /* Nothing clever, just random */
133 #define MTTY_MAJOR_VER 1
135 #define MTTY_MINOR_VER 0
138 struct serial_port ports[2];
143 struct mtty_migration_file {
146 struct mdev_state *mdev_state;
147 struct mtty_data data;
152 /* State of each mdev device */
154 struct vfio_device vdev;
155 struct eventfd_ctx *intx_evtfd;
156 struct eventfd_ctx *msi_evtfd;
159 struct mutex ops_lock;
160 struct mdev_device *mdev;
161 struct mdev_region_info region_info[VFIO_PCI_NUM_REGIONS];
162 u32 bar_mask[VFIO_PCI_NUM_REGIONS];
163 struct list_head next;
164 struct serial_port s[2];
165 struct mutex rxtx_lock;
166 struct vfio_device_info dev_info;
168 enum vfio_device_mig_state state;
169 struct mutex state_mutex;
170 struct mutex reset_mutex;
171 struct mtty_migration_file *saving_migf;
172 struct mtty_migration_file *resuming_migf;
177 static struct mtty_type {
178 struct mdev_type type;
181 { .nr_ports = 1, .type.sysfs_name = "1",
182 .type.pretty_name = "Single port serial" },
183 { .nr_ports = 2, .type.sysfs_name = "2",
184 .type.pretty_name = "Dual port serial" },
187 static struct mdev_type *mtty_mdev_types[] = {
192 static atomic_t mdev_avail_ports = ATOMIC_INIT(MAX_MTTYS);
194 static const struct file_operations vd_fops = {
195 .owner = THIS_MODULE,
198 static const struct vfio_device_ops mtty_dev_ops;
200 /* Helper functions */
202 static void dump_buffer(u8 *buf, uint32_t count)
207 pr_info("Buffer:\n");
208 for (i = 0; i < count; i++) {
209 pr_info("%2x ", *(buf + i));
210 if ((i + 1) % 16 == 0)
216 static bool is_intx(struct mdev_state *mdev_state)
218 return mdev_state->irq_index == VFIO_PCI_INTX_IRQ_INDEX;
221 static bool is_msi(struct mdev_state *mdev_state)
223 return mdev_state->irq_index == VFIO_PCI_MSI_IRQ_INDEX;
226 static bool is_noirq(struct mdev_state *mdev_state)
228 return !is_intx(mdev_state) && !is_msi(mdev_state);
231 static void mtty_trigger_interrupt(struct mdev_state *mdev_state)
233 lockdep_assert_held(&mdev_state->ops_lock);
235 if (is_msi(mdev_state)) {
236 if (mdev_state->msi_evtfd)
237 eventfd_signal(mdev_state->msi_evtfd);
238 } else if (is_intx(mdev_state)) {
239 if (mdev_state->intx_evtfd && !mdev_state->intx_mask) {
240 eventfd_signal(mdev_state->intx_evtfd);
241 mdev_state->intx_mask = true;
246 static void mtty_create_config_space(struct mdev_state *mdev_state)
249 STORE_LE32((u32 *) &mdev_state->vconfig[0x0], 0x32534348);
251 /* Control: I/O+, Mem-, BusMaster- */
252 STORE_LE16((u16 *) &mdev_state->vconfig[0x4], 0x0001);
254 /* Status: capabilities list absent */
255 STORE_LE16((u16 *) &mdev_state->vconfig[0x6], 0x0200);
258 mdev_state->vconfig[0x8] = 0x10;
260 /* programming interface class : 16550-compatible serial controller */
261 mdev_state->vconfig[0x9] = 0x02;
264 mdev_state->vconfig[0xa] = 0x00;
266 /* Base class : Simple Communication controllers */
267 mdev_state->vconfig[0xb] = 0x07;
269 /* base address registers */
271 STORE_LE32((u32 *) &mdev_state->vconfig[0x10], 0x000001);
272 mdev_state->bar_mask[0] = ~(MTTY_IO_BAR_SIZE) + 1;
274 if (mdev_state->nr_ports == 2) {
276 STORE_LE32((u32 *) &mdev_state->vconfig[0x14], 0x000001);
277 mdev_state->bar_mask[1] = ~(MTTY_IO_BAR_SIZE) + 1;
281 STORE_LE32((u32 *) &mdev_state->vconfig[0x2c], 0x32534348);
283 mdev_state->vconfig[0x34] = 0x00; /* Cap Ptr */
284 mdev_state->vconfig[0x3d] = 0x01; /* interrupt pin (INTA#) */
286 /* Vendor specific data */
287 mdev_state->vconfig[0x40] = 0x23;
288 mdev_state->vconfig[0x43] = 0x80;
289 mdev_state->vconfig[0x44] = 0x23;
290 mdev_state->vconfig[0x48] = 0x23;
291 mdev_state->vconfig[0x4c] = 0x23;
293 mdev_state->vconfig[0x60] = 0x50;
294 mdev_state->vconfig[0x61] = 0x43;
295 mdev_state->vconfig[0x62] = 0x49;
296 mdev_state->vconfig[0x63] = 0x20;
297 mdev_state->vconfig[0x64] = 0x53;
298 mdev_state->vconfig[0x65] = 0x65;
299 mdev_state->vconfig[0x66] = 0x72;
300 mdev_state->vconfig[0x67] = 0x69;
301 mdev_state->vconfig[0x68] = 0x61;
302 mdev_state->vconfig[0x69] = 0x6c;
303 mdev_state->vconfig[0x6a] = 0x2f;
304 mdev_state->vconfig[0x6b] = 0x55;
305 mdev_state->vconfig[0x6c] = 0x41;
306 mdev_state->vconfig[0x6d] = 0x52;
307 mdev_state->vconfig[0x6e] = 0x54;
310 static void handle_pci_cfg_write(struct mdev_state *mdev_state, u16 offset,
313 u32 cfg_addr, bar_mask, bar_index = 0;
316 case 0x04: /* device control */
317 case 0x06: /* device status */
320 case 0x3c: /* interrupt line */
321 mdev_state->vconfig[0x3c] = buf[0];
325 * Interrupt Pin is hardwired to INTA.
326 * This field is write protected by hardware
329 case 0x10: /* BAR0 */
330 case 0x14: /* BAR1 */
333 else if (offset == 0x14)
336 if ((mdev_state->nr_ports == 1) && (bar_index == 1)) {
337 STORE_LE32(&mdev_state->vconfig[offset], 0);
341 cfg_addr = *(u32 *)buf;
342 pr_info("BAR%d addr 0x%x\n", bar_index, cfg_addr);
344 if (cfg_addr == 0xffffffff) {
345 bar_mask = mdev_state->bar_mask[bar_index];
346 cfg_addr = (cfg_addr & bar_mask);
349 cfg_addr |= (mdev_state->vconfig[offset] & 0x3ul);
350 STORE_LE32(&mdev_state->vconfig[offset], cfg_addr);
352 case 0x18: /* BAR2 */
353 case 0x1c: /* BAR3 */
354 case 0x20: /* BAR4 */
355 STORE_LE32(&mdev_state->vconfig[offset], 0);
358 pr_info("PCI config write @0x%x of %d bytes not handled\n",
364 static void handle_bar_write(unsigned int index, struct mdev_state *mdev_state,
365 u16 offset, u8 *buf, u32 count)
369 /* Handle data written by guest */
372 /* if DLAB set, data is LSB of divisor */
373 if (mdev_state->s[index].dlab) {
374 mdev_state->s[index].divisor |= data;
378 mutex_lock(&mdev_state->rxtx_lock);
380 /* save in TX buffer */
381 if (mdev_state->s[index].rxtx.count <
382 mdev_state->s[index].max_fifo_size) {
383 mdev_state->s[index].rxtx.fifo[
384 mdev_state->s[index].rxtx.head] = data;
385 mdev_state->s[index].rxtx.count++;
386 CIRCULAR_BUF_INC_IDX(mdev_state->s[index].rxtx.head);
387 mdev_state->s[index].overrun = false;
390 * Trigger interrupt if receive data interrupt is
391 * enabled and fifo reached trigger level
393 if ((mdev_state->s[index].uart_reg[UART_IER] &
395 (mdev_state->s[index].rxtx.count ==
396 mdev_state->s[index].intr_trigger_level)) {
397 /* trigger interrupt */
398 #if defined(DEBUG_INTR)
399 pr_err("Serial port %d: Fifo level trigger\n",
402 mtty_trigger_interrupt(mdev_state);
405 #if defined(DEBUG_INTR)
406 pr_err("Serial port %d: Buffer Overflow\n", index);
408 mdev_state->s[index].overrun = true;
411 * Trigger interrupt if receiver line status interrupt
414 if (mdev_state->s[index].uart_reg[UART_IER] &
416 mtty_trigger_interrupt(mdev_state);
418 mutex_unlock(&mdev_state->rxtx_lock);
422 /* if DLAB set, data is MSB of divisor */
423 if (mdev_state->s[index].dlab)
424 mdev_state->s[index].divisor |= (u16)data << 8;
426 mdev_state->s[index].uart_reg[offset] = data;
427 mutex_lock(&mdev_state->rxtx_lock);
428 if ((data & UART_IER_THRI) &&
429 (mdev_state->s[index].rxtx.head ==
430 mdev_state->s[index].rxtx.tail)) {
431 #if defined(DEBUG_INTR)
432 pr_err("Serial port %d: IER_THRI write\n",
435 mtty_trigger_interrupt(mdev_state);
438 mutex_unlock(&mdev_state->rxtx_lock);
444 mdev_state->s[index].fcr = data;
446 mutex_lock(&mdev_state->rxtx_lock);
447 if (data & (UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT)) {
448 /* clear loop back FIFO */
449 mdev_state->s[index].rxtx.count = 0;
450 mdev_state->s[index].rxtx.head = 0;
451 mdev_state->s[index].rxtx.tail = 0;
453 mutex_unlock(&mdev_state->rxtx_lock);
455 switch (data & UART_FCR_TRIGGER_MASK) {
456 case UART_FCR_TRIGGER_1:
457 mdev_state->s[index].intr_trigger_level = 1;
460 case UART_FCR_TRIGGER_4:
461 mdev_state->s[index].intr_trigger_level = 4;
464 case UART_FCR_TRIGGER_8:
465 mdev_state->s[index].intr_trigger_level = 8;
468 case UART_FCR_TRIGGER_14:
469 mdev_state->s[index].intr_trigger_level = 14;
474 * Set trigger level to 1 otherwise or implement timer with
475 * timeout of 4 characters and on expiring that timer set
476 * Recevice data timeout in IIR register
478 mdev_state->s[index].intr_trigger_level = 1;
479 if (data & UART_FCR_ENABLE_FIFO)
480 mdev_state->s[index].max_fifo_size = MAX_FIFO_SIZE;
482 mdev_state->s[index].max_fifo_size = 1;
483 mdev_state->s[index].intr_trigger_level = 1;
489 if (data & UART_LCR_DLAB) {
490 mdev_state->s[index].dlab = true;
491 mdev_state->s[index].divisor = 0;
493 mdev_state->s[index].dlab = false;
495 mdev_state->s[index].uart_reg[offset] = data;
499 mdev_state->s[index].uart_reg[offset] = data;
501 if ((mdev_state->s[index].uart_reg[UART_IER] & UART_IER_MSI) &&
502 (data & UART_MCR_OUT2)) {
503 #if defined(DEBUG_INTR)
504 pr_err("Serial port %d: MCR_OUT2 write\n", index);
506 mtty_trigger_interrupt(mdev_state);
509 if ((mdev_state->s[index].uart_reg[UART_IER] & UART_IER_MSI) &&
510 (data & (UART_MCR_RTS | UART_MCR_DTR))) {
511 #if defined(DEBUG_INTR)
512 pr_err("Serial port %d: MCR RTS/DTR write\n", index);
514 mtty_trigger_interrupt(mdev_state);
524 mdev_state->s[index].uart_reg[offset] = data;
532 static void handle_bar_read(unsigned int index, struct mdev_state *mdev_state,
533 u16 offset, u8 *buf, u32 count)
535 /* Handle read requests by guest */
538 /* if DLAB set, data is LSB of divisor */
539 if (mdev_state->s[index].dlab) {
540 *buf = (u8)mdev_state->s[index].divisor;
544 mutex_lock(&mdev_state->rxtx_lock);
545 /* return data in tx buffer */
546 if (mdev_state->s[index].rxtx.head !=
547 mdev_state->s[index].rxtx.tail) {
548 *buf = mdev_state->s[index].rxtx.fifo[
549 mdev_state->s[index].rxtx.tail];
550 mdev_state->s[index].rxtx.count--;
551 CIRCULAR_BUF_INC_IDX(mdev_state->s[index].rxtx.tail);
554 if (mdev_state->s[index].rxtx.head ==
555 mdev_state->s[index].rxtx.tail) {
557 * Trigger interrupt if tx buffer empty interrupt is
558 * enabled and fifo is empty
560 #if defined(DEBUG_INTR)
561 pr_err("Serial port %d: Buffer Empty\n", index);
563 if (mdev_state->s[index].uart_reg[UART_IER] &
565 mtty_trigger_interrupt(mdev_state);
567 mutex_unlock(&mdev_state->rxtx_lock);
572 if (mdev_state->s[index].dlab) {
573 *buf = (u8)(mdev_state->s[index].divisor >> 8);
576 *buf = mdev_state->s[index].uart_reg[offset] & 0x0f;
581 u8 ier = mdev_state->s[index].uart_reg[UART_IER];
584 mutex_lock(&mdev_state->rxtx_lock);
585 /* Interrupt priority 1: Parity, overrun, framing or break */
586 if ((ier & UART_IER_RLSI) && mdev_state->s[index].overrun)
587 *buf |= UART_IIR_RLSI;
589 /* Interrupt priority 2: Fifo trigger level reached */
590 if ((ier & UART_IER_RDI) &&
591 (mdev_state->s[index].rxtx.count >=
592 mdev_state->s[index].intr_trigger_level))
593 *buf |= UART_IIR_RDI;
595 /* Interrupt priotiry 3: transmitter holding register empty */
596 if ((ier & UART_IER_THRI) &&
597 (mdev_state->s[index].rxtx.head ==
598 mdev_state->s[index].rxtx.tail))
599 *buf |= UART_IIR_THRI;
601 /* Interrupt priotiry 4: Modem status: CTS, DSR, RI or DCD */
602 if ((ier & UART_IER_MSI) &&
603 (mdev_state->s[index].uart_reg[UART_MCR] &
604 (UART_MCR_RTS | UART_MCR_DTR)))
605 *buf |= UART_IIR_MSI;
607 /* bit0: 0=> interrupt pending, 1=> no interrupt is pending */
609 *buf = UART_IIR_NO_INT;
611 /* set bit 6 & 7 to be 16550 compatible */
613 mutex_unlock(&mdev_state->rxtx_lock);
619 *buf = mdev_state->s[index].uart_reg[offset];
626 mutex_lock(&mdev_state->rxtx_lock);
627 /* atleast one char in FIFO */
628 if (mdev_state->s[index].rxtx.head !=
629 mdev_state->s[index].rxtx.tail)
632 /* if FIFO overrun */
633 if (mdev_state->s[index].overrun)
636 /* transmit FIFO empty and tramsitter empty */
637 if (mdev_state->s[index].rxtx.head ==
638 mdev_state->s[index].rxtx.tail)
639 lsr |= UART_LSR_TEMT | UART_LSR_THRE;
641 mutex_unlock(&mdev_state->rxtx_lock);
646 *buf = UART_MSR_DSR | UART_MSR_DDSR | UART_MSR_DCD;
648 mutex_lock(&mdev_state->rxtx_lock);
649 /* if AFE is 1 and FIFO have space, set CTS bit */
650 if (mdev_state->s[index].uart_reg[UART_MCR] &
652 if (mdev_state->s[index].rxtx.count <
653 mdev_state->s[index].max_fifo_size)
654 *buf |= UART_MSR_CTS | UART_MSR_DCTS;
656 *buf |= UART_MSR_CTS | UART_MSR_DCTS;
657 mutex_unlock(&mdev_state->rxtx_lock);
662 *buf = mdev_state->s[index].uart_reg[offset];
670 static void mdev_read_base(struct mdev_state *mdev_state)
673 u32 start_lo, start_hi;
676 pos = PCI_BASE_ADDRESS_0;
678 for (index = 0; index <= VFIO_PCI_BAR5_REGION_INDEX; index++) {
680 if (!mdev_state->region_info[index].size)
683 start_lo = (*(u32 *)(mdev_state->vconfig + pos)) &
684 PCI_BASE_ADDRESS_MEM_MASK;
685 mem_type = (*(u32 *)(mdev_state->vconfig + pos)) &
686 PCI_BASE_ADDRESS_MEM_TYPE_MASK;
689 case PCI_BASE_ADDRESS_MEM_TYPE_64:
690 start_hi = (*(u32 *)(mdev_state->vconfig + pos + 4));
693 case PCI_BASE_ADDRESS_MEM_TYPE_32:
694 case PCI_BASE_ADDRESS_MEM_TYPE_1M:
695 /* 1M mem BAR treated as 32-bit BAR */
697 /* mem unknown type treated as 32-bit BAR */
702 mdev_state->region_info[index].start = ((u64)start_hi << 32) |
707 static ssize_t mdev_access(struct mdev_state *mdev_state, u8 *buf, size_t count,
708 loff_t pos, bool is_write)
717 mutex_lock(&mdev_state->ops_lock);
719 index = MTTY_VFIO_PCI_OFFSET_TO_INDEX(pos);
720 offset = pos & MTTY_VFIO_PCI_OFFSET_MASK;
722 case VFIO_PCI_CONFIG_REGION_INDEX:
725 pr_info("%s: PCI config space %s at offset 0x%llx\n",
726 __func__, is_write ? "write" : "read", offset);
729 dump_buffer(buf, count);
730 handle_pci_cfg_write(mdev_state, offset, buf, count);
732 memcpy(buf, (mdev_state->vconfig + offset), count);
733 dump_buffer(buf, count);
738 case VFIO_PCI_BAR0_REGION_INDEX ... VFIO_PCI_BAR5_REGION_INDEX:
739 if (!mdev_state->region_info[index].start)
740 mdev_read_base(mdev_state);
743 dump_buffer(buf, count);
745 #if defined(DEBUG_REGS)
746 pr_info("%s: BAR%d WR @0x%llx %s val:0x%02x dlab:%d\n",
747 __func__, index, offset, wr_reg[offset],
748 *buf, mdev_state->s[index].dlab);
750 handle_bar_write(index, mdev_state, offset, buf, count);
752 handle_bar_read(index, mdev_state, offset, buf, count);
753 dump_buffer(buf, count);
755 #if defined(DEBUG_REGS)
756 pr_info("%s: BAR%d RD @0x%llx %s val:0x%02x dlab:%d\n",
757 __func__, index, offset, rd_reg[offset],
758 *buf, mdev_state->s[index].dlab);
772 mutex_unlock(&mdev_state->ops_lock);
777 static size_t mtty_data_size(struct mdev_state *mdev_state)
779 return offsetof(struct mtty_data, ports) +
780 (mdev_state->nr_ports * sizeof(struct serial_port));
783 static void mtty_disable_file(struct mtty_migration_file *migf)
785 mutex_lock(&migf->lock);
786 migf->disabled = true;
787 migf->filled_size = 0;
788 migf->filp->f_pos = 0;
789 mutex_unlock(&migf->lock);
792 static void mtty_disable_files(struct mdev_state *mdev_state)
794 if (mdev_state->saving_migf) {
795 mtty_disable_file(mdev_state->saving_migf);
796 fput(mdev_state->saving_migf->filp);
797 mdev_state->saving_migf = NULL;
800 if (mdev_state->resuming_migf) {
801 mtty_disable_file(mdev_state->resuming_migf);
802 fput(mdev_state->resuming_migf->filp);
803 mdev_state->resuming_migf = NULL;
807 static void mtty_state_mutex_unlock(struct mdev_state *mdev_state)
810 mutex_lock(&mdev_state->reset_mutex);
811 if (mdev_state->deferred_reset) {
812 mdev_state->deferred_reset = false;
813 mutex_unlock(&mdev_state->reset_mutex);
814 mdev_state->state = VFIO_DEVICE_STATE_RUNNING;
815 mtty_disable_files(mdev_state);
818 mutex_unlock(&mdev_state->state_mutex);
819 mutex_unlock(&mdev_state->reset_mutex);
822 static int mtty_release_migf(struct inode *inode, struct file *filp)
824 struct mtty_migration_file *migf = filp->private_data;
826 mtty_disable_file(migf);
827 mutex_destroy(&migf->lock);
833 static long mtty_precopy_ioctl(struct file *filp, unsigned int cmd,
836 struct mtty_migration_file *migf = filp->private_data;
837 struct mdev_state *mdev_state = migf->mdev_state;
838 loff_t *pos = &filp->f_pos;
839 struct vfio_precopy_info info = {};
843 if (cmd != VFIO_MIG_GET_PRECOPY_INFO)
846 minsz = offsetofend(struct vfio_precopy_info, dirty_bytes);
848 if (copy_from_user(&info, (void __user *)arg, minsz))
850 if (info.argsz < minsz)
853 mutex_lock(&mdev_state->state_mutex);
854 if (mdev_state->state != VFIO_DEVICE_STATE_PRE_COPY &&
855 mdev_state->state != VFIO_DEVICE_STATE_PRE_COPY_P2P) {
860 mutex_lock(&migf->lock);
862 if (migf->disabled) {
863 mutex_unlock(&migf->lock);
868 if (*pos > migf->filled_size) {
869 mutex_unlock(&migf->lock);
874 info.dirty_bytes = 0;
875 info.initial_bytes = migf->filled_size - *pos;
876 mutex_unlock(&migf->lock);
878 ret = copy_to_user((void __user *)arg, &info, minsz) ? -EFAULT : 0;
880 mtty_state_mutex_unlock(mdev_state);
884 static ssize_t mtty_save_read(struct file *filp, char __user *buf,
885 size_t len, loff_t *pos)
887 struct mtty_migration_file *migf = filp->private_data;
895 mutex_lock(&migf->lock);
897 dev_dbg(migf->mdev_state->vdev.dev, "%s ask %zu\n", __func__, len);
899 if (migf->disabled) {
904 if (*pos > migf->filled_size) {
909 len = min_t(size_t, migf->filled_size - *pos, len);
911 if (copy_to_user(buf, (void *)&migf->data + *pos, len)) {
919 dev_dbg(migf->mdev_state->vdev.dev, "%s read %zu\n", __func__, ret);
920 mutex_unlock(&migf->lock);
924 static const struct file_operations mtty_save_fops = {
925 .owner = THIS_MODULE,
926 .read = mtty_save_read,
927 .unlocked_ioctl = mtty_precopy_ioctl,
928 .compat_ioctl = compat_ptr_ioctl,
929 .release = mtty_release_migf,
933 static void mtty_save_state(struct mdev_state *mdev_state)
935 struct mtty_migration_file *migf = mdev_state->saving_migf;
938 mutex_lock(&migf->lock);
939 for (i = 0; i < mdev_state->nr_ports; i++) {
940 memcpy(&migf->data.ports[i],
941 &mdev_state->s[i], sizeof(struct serial_port));
942 migf->filled_size += sizeof(struct serial_port);
944 dev_dbg(mdev_state->vdev.dev,
945 "%s filled to %zu\n", __func__, migf->filled_size);
946 mutex_unlock(&migf->lock);
949 static int mtty_load_state(struct mdev_state *mdev_state)
951 struct mtty_migration_file *migf = mdev_state->resuming_migf;
954 mutex_lock(&migf->lock);
955 /* magic and version already tested by resume write fn */
956 if (migf->filled_size < mtty_data_size(mdev_state)) {
957 dev_dbg(mdev_state->vdev.dev, "%s expected %zu, got %zu\n",
958 __func__, mtty_data_size(mdev_state),
960 mutex_unlock(&migf->lock);
964 for (i = 0; i < mdev_state->nr_ports; i++)
965 memcpy(&mdev_state->s[i],
966 &migf->data.ports[i], sizeof(struct serial_port));
968 mutex_unlock(&migf->lock);
972 static struct mtty_migration_file *
973 mtty_save_device_data(struct mdev_state *mdev_state,
974 enum vfio_device_mig_state state)
976 struct mtty_migration_file *migf = mdev_state->saving_migf;
977 struct mtty_migration_file *ret = NULL;
980 if (state == VFIO_DEVICE_STATE_STOP_COPY)
985 migf = kzalloc(sizeof(*migf), GFP_KERNEL_ACCOUNT);
987 return ERR_PTR(-ENOMEM);
989 migf->filp = anon_inode_getfile("mtty_mig", &mtty_save_fops,
991 if (IS_ERR(migf->filp)) {
992 int rc = PTR_ERR(migf->filp);
998 stream_open(migf->filp->f_inode, migf->filp);
999 mutex_init(&migf->lock);
1000 migf->mdev_state = mdev_state;
1002 migf->data.magic = MTTY_MAGIC;
1003 migf->data.major_ver = MTTY_MAJOR_VER;
1004 migf->data.minor_ver = MTTY_MINOR_VER;
1005 migf->data.nr_ports = mdev_state->nr_ports;
1007 migf->filled_size = offsetof(struct mtty_data, ports);
1009 dev_dbg(mdev_state->vdev.dev, "%s filled header to %zu\n",
1010 __func__, migf->filled_size);
1012 ret = mdev_state->saving_migf = migf;
1015 if (state == VFIO_DEVICE_STATE_STOP_COPY)
1016 mtty_save_state(mdev_state);
1021 static ssize_t mtty_resume_write(struct file *filp, const char __user *buf,
1022 size_t len, loff_t *pos)
1024 struct mtty_migration_file *migf = filp->private_data;
1025 struct mdev_state *mdev_state = migf->mdev_state;
1026 loff_t requested_length;
1035 check_add_overflow((loff_t)len, *pos, &requested_length))
1038 if (requested_length > mtty_data_size(mdev_state))
1041 mutex_lock(&migf->lock);
1043 if (migf->disabled) {
1048 if (copy_from_user((void *)&migf->data + *pos, buf, len)) {
1056 dev_dbg(migf->mdev_state->vdev.dev, "%s received %zu, total %zu\n",
1057 __func__, len, migf->filled_size + len);
1059 if (migf->filled_size < offsetof(struct mtty_data, ports) &&
1060 migf->filled_size + len >= offsetof(struct mtty_data, ports)) {
1061 if (migf->data.magic != MTTY_MAGIC || migf->data.flags ||
1062 migf->data.major_ver != MTTY_MAJOR_VER ||
1063 migf->data.minor_ver != MTTY_MINOR_VER ||
1064 migf->data.nr_ports != mdev_state->nr_ports) {
1065 dev_dbg(migf->mdev_state->vdev.dev,
1066 "%s failed validation\n", __func__);
1069 dev_dbg(migf->mdev_state->vdev.dev,
1070 "%s header validated\n", __func__);
1074 migf->filled_size += len;
1077 mutex_unlock(&migf->lock);
1081 static const struct file_operations mtty_resume_fops = {
1082 .owner = THIS_MODULE,
1083 .write = mtty_resume_write,
1084 .release = mtty_release_migf,
1085 .llseek = no_llseek,
1088 static struct mtty_migration_file *
1089 mtty_resume_device_data(struct mdev_state *mdev_state)
1091 struct mtty_migration_file *migf;
1094 migf = kzalloc(sizeof(*migf), GFP_KERNEL_ACCOUNT);
1096 return ERR_PTR(-ENOMEM);
1098 migf->filp = anon_inode_getfile("mtty_mig", &mtty_resume_fops,
1100 if (IS_ERR(migf->filp)) {
1101 ret = PTR_ERR(migf->filp);
1103 return ERR_PTR(ret);
1106 stream_open(migf->filp->f_inode, migf->filp);
1107 mutex_init(&migf->lock);
1108 migf->mdev_state = mdev_state;
1110 mdev_state->resuming_migf = migf;
1115 static struct file *mtty_step_state(struct mdev_state *mdev_state,
1116 enum vfio_device_mig_state new)
1118 enum vfio_device_mig_state cur = mdev_state->state;
1120 dev_dbg(mdev_state->vdev.dev, "%s: %d -> %d\n", __func__, cur, new);
1123 * The following state transitions are no-op considering
1124 * mtty does not do DMA nor require any explicit start/stop.
1126 * RUNNING -> RUNNING_P2P
1127 * RUNNING_P2P -> RUNNING
1128 * RUNNING_P2P -> STOP
1129 * PRE_COPY -> PRE_COPY_P2P
1130 * PRE_COPY_P2P -> PRE_COPY
1131 * STOP -> RUNNING_P2P
1133 if ((cur == VFIO_DEVICE_STATE_RUNNING &&
1134 new == VFIO_DEVICE_STATE_RUNNING_P2P) ||
1135 (cur == VFIO_DEVICE_STATE_RUNNING_P2P &&
1136 (new == VFIO_DEVICE_STATE_RUNNING ||
1137 new == VFIO_DEVICE_STATE_STOP)) ||
1138 (cur == VFIO_DEVICE_STATE_PRE_COPY &&
1139 new == VFIO_DEVICE_STATE_PRE_COPY_P2P) ||
1140 (cur == VFIO_DEVICE_STATE_PRE_COPY_P2P &&
1141 new == VFIO_DEVICE_STATE_PRE_COPY) ||
1142 (cur == VFIO_DEVICE_STATE_STOP &&
1143 new == VFIO_DEVICE_STATE_RUNNING_P2P))
1147 * The following state transitions simply close migration files,
1148 * with the exception of RESUMING -> STOP, which needs to load
1152 * PRE_COPY -> RUNNING
1153 * PRE_COPY_P2P -> RUNNING_P2P
1156 if (cur == VFIO_DEVICE_STATE_RESUMING &&
1157 new == VFIO_DEVICE_STATE_STOP) {
1160 ret = mtty_load_state(mdev_state);
1162 return ERR_PTR(ret);
1163 mtty_disable_files(mdev_state);
1167 if ((cur == VFIO_DEVICE_STATE_PRE_COPY &&
1168 new == VFIO_DEVICE_STATE_RUNNING) ||
1169 (cur == VFIO_DEVICE_STATE_PRE_COPY_P2P &&
1170 new == VFIO_DEVICE_STATE_RUNNING_P2P) ||
1171 (cur == VFIO_DEVICE_STATE_STOP_COPY &&
1172 new == VFIO_DEVICE_STATE_STOP)) {
1173 mtty_disable_files(mdev_state);
1178 * The following state transitions return migration files.
1180 * RUNNING -> PRE_COPY
1181 * RUNNING_P2P -> PRE_COPY_P2P
1184 * PRE_COPY_P2P -> STOP_COPY
1186 if ((cur == VFIO_DEVICE_STATE_RUNNING &&
1187 new == VFIO_DEVICE_STATE_PRE_COPY) ||
1188 (cur == VFIO_DEVICE_STATE_RUNNING_P2P &&
1189 new == VFIO_DEVICE_STATE_PRE_COPY_P2P) ||
1190 (cur == VFIO_DEVICE_STATE_STOP &&
1191 new == VFIO_DEVICE_STATE_STOP_COPY) ||
1192 (cur == VFIO_DEVICE_STATE_PRE_COPY_P2P &&
1193 new == VFIO_DEVICE_STATE_STOP_COPY)) {
1194 struct mtty_migration_file *migf;
1196 migf = mtty_save_device_data(mdev_state, new);
1198 return ERR_CAST(migf);
1201 get_file(migf->filp);
1208 if (cur == VFIO_DEVICE_STATE_STOP &&
1209 new == VFIO_DEVICE_STATE_RESUMING) {
1210 struct mtty_migration_file *migf;
1212 migf = mtty_resume_device_data(mdev_state);
1214 return ERR_CAST(migf);
1216 get_file(migf->filp);
1221 /* vfio_mig_get_next_state() does not use arcs other than the above */
1223 return ERR_PTR(-EINVAL);
1226 static struct file *mtty_set_state(struct vfio_device *vdev,
1227 enum vfio_device_mig_state new_state)
1229 struct mdev_state *mdev_state =
1230 container_of(vdev, struct mdev_state, vdev);
1231 struct file *ret = NULL;
1233 dev_dbg(vdev->dev, "%s -> %d\n", __func__, new_state);
1235 mutex_lock(&mdev_state->state_mutex);
1236 while (mdev_state->state != new_state) {
1237 enum vfio_device_mig_state next_state;
1238 int rc = vfio_mig_get_next_state(vdev, mdev_state->state,
1239 new_state, &next_state);
1245 ret = mtty_step_state(mdev_state, next_state);
1249 mdev_state->state = next_state;
1251 if (WARN_ON(ret && new_state != next_state)) {
1253 ret = ERR_PTR(-EINVAL);
1257 mtty_state_mutex_unlock(mdev_state);
1261 static int mtty_get_state(struct vfio_device *vdev,
1262 enum vfio_device_mig_state *current_state)
1264 struct mdev_state *mdev_state =
1265 container_of(vdev, struct mdev_state, vdev);
1267 mutex_lock(&mdev_state->state_mutex);
1268 *current_state = mdev_state->state;
1269 mtty_state_mutex_unlock(mdev_state);
1273 static int mtty_get_data_size(struct vfio_device *vdev,
1274 unsigned long *stop_copy_length)
1276 struct mdev_state *mdev_state =
1277 container_of(vdev, struct mdev_state, vdev);
1279 *stop_copy_length = mtty_data_size(mdev_state);
1283 static const struct vfio_migration_ops mtty_migration_ops = {
1284 .migration_set_state = mtty_set_state,
1285 .migration_get_state = mtty_get_state,
1286 .migration_get_data_size = mtty_get_data_size,
1289 static int mtty_log_start(struct vfio_device *vdev,
1290 struct rb_root_cached *ranges,
1291 u32 nnodes, u64 *page_size)
1296 static int mtty_log_stop(struct vfio_device *vdev)
1301 static int mtty_log_read_and_clear(struct vfio_device *vdev,
1302 unsigned long iova, unsigned long length,
1303 struct iova_bitmap *dirty)
1308 static const struct vfio_log_ops mtty_log_ops = {
1309 .log_start = mtty_log_start,
1310 .log_stop = mtty_log_stop,
1311 .log_read_and_clear = mtty_log_read_and_clear,
1314 static int mtty_init_dev(struct vfio_device *vdev)
1316 struct mdev_state *mdev_state =
1317 container_of(vdev, struct mdev_state, vdev);
1318 struct mdev_device *mdev = to_mdev_device(vdev->dev);
1319 struct mtty_type *type =
1320 container_of(mdev->type, struct mtty_type, type);
1321 int avail_ports = atomic_read(&mdev_avail_ports);
1325 if (avail_ports < type->nr_ports)
1327 } while (!atomic_try_cmpxchg(&mdev_avail_ports,
1329 avail_ports - type->nr_ports));
1331 mdev_state->nr_ports = type->nr_ports;
1332 mdev_state->irq_index = -1;
1333 mdev_state->s[0].max_fifo_size = MAX_FIFO_SIZE;
1334 mdev_state->s[1].max_fifo_size = MAX_FIFO_SIZE;
1335 mutex_init(&mdev_state->rxtx_lock);
1337 mdev_state->vconfig = kzalloc(MTTY_CONFIG_SPACE_SIZE, GFP_KERNEL);
1338 if (!mdev_state->vconfig) {
1343 mutex_init(&mdev_state->ops_lock);
1344 mdev_state->mdev = mdev;
1345 mtty_create_config_space(mdev_state);
1347 mutex_init(&mdev_state->state_mutex);
1348 mutex_init(&mdev_state->reset_mutex);
1349 vdev->migration_flags = VFIO_MIGRATION_STOP_COPY |
1350 VFIO_MIGRATION_P2P |
1351 VFIO_MIGRATION_PRE_COPY;
1352 vdev->mig_ops = &mtty_migration_ops;
1353 vdev->log_ops = &mtty_log_ops;
1354 mdev_state->state = VFIO_DEVICE_STATE_RUNNING;
1359 atomic_add(type->nr_ports, &mdev_avail_ports);
1363 static int mtty_probe(struct mdev_device *mdev)
1365 struct mdev_state *mdev_state;
1368 mdev_state = vfio_alloc_device(mdev_state, vdev, &mdev->dev,
1370 if (IS_ERR(mdev_state))
1371 return PTR_ERR(mdev_state);
1373 ret = vfio_register_emulated_iommu_dev(&mdev_state->vdev);
1376 dev_set_drvdata(&mdev->dev, mdev_state);
1380 vfio_put_device(&mdev_state->vdev);
1384 static void mtty_release_dev(struct vfio_device *vdev)
1386 struct mdev_state *mdev_state =
1387 container_of(vdev, struct mdev_state, vdev);
1389 mutex_destroy(&mdev_state->reset_mutex);
1390 mutex_destroy(&mdev_state->state_mutex);
1391 atomic_add(mdev_state->nr_ports, &mdev_avail_ports);
1392 kfree(mdev_state->vconfig);
1395 static void mtty_remove(struct mdev_device *mdev)
1397 struct mdev_state *mdev_state = dev_get_drvdata(&mdev->dev);
1399 vfio_unregister_group_dev(&mdev_state->vdev);
1400 vfio_put_device(&mdev_state->vdev);
1403 static int mtty_reset(struct mdev_state *mdev_state)
1405 pr_info("%s: called\n", __func__);
1407 mutex_lock(&mdev_state->reset_mutex);
1408 mdev_state->deferred_reset = true;
1409 if (!mutex_trylock(&mdev_state->state_mutex)) {
1410 mutex_unlock(&mdev_state->reset_mutex);
1413 mutex_unlock(&mdev_state->reset_mutex);
1414 mtty_state_mutex_unlock(mdev_state);
1419 static ssize_t mtty_read(struct vfio_device *vdev, char __user *buf,
1420 size_t count, loff_t *ppos)
1422 struct mdev_state *mdev_state =
1423 container_of(vdev, struct mdev_state, vdev);
1424 unsigned int done = 0;
1430 if (count >= 4 && !(*ppos % 4)) {
1433 ret = mdev_access(mdev_state, (u8 *)&val, sizeof(val),
1438 if (copy_to_user(buf, &val, sizeof(val)))
1442 } else if (count >= 2 && !(*ppos % 2)) {
1445 ret = mdev_access(mdev_state, (u8 *)&val, sizeof(val),
1450 if (copy_to_user(buf, &val, sizeof(val)))
1457 ret = mdev_access(mdev_state, (u8 *)&val, sizeof(val),
1462 if (copy_to_user(buf, &val, sizeof(val)))
1480 static ssize_t mtty_write(struct vfio_device *vdev, const char __user *buf,
1481 size_t count, loff_t *ppos)
1483 struct mdev_state *mdev_state =
1484 container_of(vdev, struct mdev_state, vdev);
1485 unsigned int done = 0;
1491 if (count >= 4 && !(*ppos % 4)) {
1494 if (copy_from_user(&val, buf, sizeof(val)))
1497 ret = mdev_access(mdev_state, (u8 *)&val, sizeof(val),
1503 } else if (count >= 2 && !(*ppos % 2)) {
1506 if (copy_from_user(&val, buf, sizeof(val)))
1509 ret = mdev_access(mdev_state, (u8 *)&val, sizeof(val),
1518 if (copy_from_user(&val, buf, sizeof(val)))
1521 ret = mdev_access(mdev_state, (u8 *)&val, sizeof(val),
1539 static void mtty_disable_intx(struct mdev_state *mdev_state)
1541 if (mdev_state->intx_evtfd) {
1542 eventfd_ctx_put(mdev_state->intx_evtfd);
1543 mdev_state->intx_evtfd = NULL;
1544 mdev_state->intx_mask = false;
1545 mdev_state->irq_index = -1;
1549 static void mtty_disable_msi(struct mdev_state *mdev_state)
1551 if (mdev_state->msi_evtfd) {
1552 eventfd_ctx_put(mdev_state->msi_evtfd);
1553 mdev_state->msi_evtfd = NULL;
1554 mdev_state->irq_index = -1;
1558 static int mtty_set_irqs(struct mdev_state *mdev_state, uint32_t flags,
1559 unsigned int index, unsigned int start,
1560 unsigned int count, void *data)
1564 mutex_lock(&mdev_state->ops_lock);
1566 case VFIO_PCI_INTX_IRQ_INDEX:
1567 switch (flags & VFIO_IRQ_SET_ACTION_TYPE_MASK) {
1568 case VFIO_IRQ_SET_ACTION_MASK:
1569 if (!is_intx(mdev_state) || start != 0 || count != 1) {
1574 if (flags & VFIO_IRQ_SET_DATA_NONE) {
1575 mdev_state->intx_mask = true;
1576 } else if (flags & VFIO_IRQ_SET_DATA_BOOL) {
1577 uint8_t mask = *(uint8_t *)data;
1580 mdev_state->intx_mask = true;
1581 } else if (flags & VFIO_IRQ_SET_DATA_EVENTFD) {
1582 ret = -ENOTTY; /* No support for mask fd */
1585 case VFIO_IRQ_SET_ACTION_UNMASK:
1586 if (!is_intx(mdev_state) || start != 0 || count != 1) {
1591 if (flags & VFIO_IRQ_SET_DATA_NONE) {
1592 mdev_state->intx_mask = false;
1593 } else if (flags & VFIO_IRQ_SET_DATA_BOOL) {
1594 uint8_t mask = *(uint8_t *)data;
1597 mdev_state->intx_mask = false;
1598 } else if (flags & VFIO_IRQ_SET_DATA_EVENTFD) {
1599 ret = -ENOTTY; /* No support for unmask fd */
1602 case VFIO_IRQ_SET_ACTION_TRIGGER:
1603 if (is_intx(mdev_state) && !count &&
1604 (flags & VFIO_IRQ_SET_DATA_NONE)) {
1605 mtty_disable_intx(mdev_state);
1609 if (!(is_intx(mdev_state) || is_noirq(mdev_state)) ||
1610 start != 0 || count != 1) {
1615 if (flags & VFIO_IRQ_SET_DATA_EVENTFD) {
1616 int fd = *(int *)data;
1617 struct eventfd_ctx *evt;
1619 mtty_disable_intx(mdev_state);
1624 evt = eventfd_ctx_fdget(fd);
1629 mdev_state->intx_evtfd = evt;
1630 mdev_state->irq_index = index;
1634 if (!is_intx(mdev_state)) {
1639 if (flags & VFIO_IRQ_SET_DATA_NONE) {
1640 mtty_trigger_interrupt(mdev_state);
1641 } else if (flags & VFIO_IRQ_SET_DATA_BOOL) {
1642 uint8_t trigger = *(uint8_t *)data;
1645 mtty_trigger_interrupt(mdev_state);
1650 case VFIO_PCI_MSI_IRQ_INDEX:
1651 switch (flags & VFIO_IRQ_SET_ACTION_TYPE_MASK) {
1652 case VFIO_IRQ_SET_ACTION_MASK:
1653 case VFIO_IRQ_SET_ACTION_UNMASK:
1656 case VFIO_IRQ_SET_ACTION_TRIGGER:
1657 if (is_msi(mdev_state) && !count &&
1658 (flags & VFIO_IRQ_SET_DATA_NONE)) {
1659 mtty_disable_msi(mdev_state);
1663 if (!(is_msi(mdev_state) || is_noirq(mdev_state)) ||
1664 start != 0 || count != 1) {
1669 if (flags & VFIO_IRQ_SET_DATA_EVENTFD) {
1670 int fd = *(int *)data;
1671 struct eventfd_ctx *evt;
1673 mtty_disable_msi(mdev_state);
1678 evt = eventfd_ctx_fdget(fd);
1683 mdev_state->msi_evtfd = evt;
1684 mdev_state->irq_index = index;
1688 if (!is_msi(mdev_state)) {
1693 if (flags & VFIO_IRQ_SET_DATA_NONE) {
1694 mtty_trigger_interrupt(mdev_state);
1695 } else if (flags & VFIO_IRQ_SET_DATA_BOOL) {
1696 uint8_t trigger = *(uint8_t *)data;
1699 mtty_trigger_interrupt(mdev_state);
1704 case VFIO_PCI_MSIX_IRQ_INDEX:
1705 dev_dbg(mdev_state->vdev.dev, "%s: MSIX_IRQ\n", __func__);
1708 case VFIO_PCI_ERR_IRQ_INDEX:
1709 dev_dbg(mdev_state->vdev.dev, "%s: ERR_IRQ\n", __func__);
1712 case VFIO_PCI_REQ_IRQ_INDEX:
1713 dev_dbg(mdev_state->vdev.dev, "%s: REQ_IRQ\n", __func__);
1718 mutex_unlock(&mdev_state->ops_lock);
1722 static int mtty_get_region_info(struct mdev_state *mdev_state,
1723 struct vfio_region_info *region_info,
1724 u16 *cap_type_id, void **cap_type)
1726 unsigned int size = 0;
1729 bar_index = region_info->index;
1730 if (bar_index >= VFIO_PCI_NUM_REGIONS)
1733 mutex_lock(&mdev_state->ops_lock);
1735 switch (bar_index) {
1736 case VFIO_PCI_CONFIG_REGION_INDEX:
1737 size = MTTY_CONFIG_SPACE_SIZE;
1739 case VFIO_PCI_BAR0_REGION_INDEX:
1740 size = MTTY_IO_BAR_SIZE;
1742 case VFIO_PCI_BAR1_REGION_INDEX:
1743 if (mdev_state->nr_ports == 2)
1744 size = MTTY_IO_BAR_SIZE;
1751 mdev_state->region_info[bar_index].size = size;
1752 mdev_state->region_info[bar_index].vfio_offset =
1753 MTTY_VFIO_PCI_INDEX_TO_OFFSET(bar_index);
1755 region_info->size = size;
1756 region_info->offset = MTTY_VFIO_PCI_INDEX_TO_OFFSET(bar_index);
1757 region_info->flags = VFIO_REGION_INFO_FLAG_READ |
1758 VFIO_REGION_INFO_FLAG_WRITE;
1759 mutex_unlock(&mdev_state->ops_lock);
1763 static int mtty_get_irq_info(struct vfio_irq_info *irq_info)
1765 if (irq_info->index != VFIO_PCI_INTX_IRQ_INDEX &&
1766 irq_info->index != VFIO_PCI_MSI_IRQ_INDEX)
1769 irq_info->flags = VFIO_IRQ_INFO_EVENTFD;
1770 irq_info->count = 1;
1772 if (irq_info->index == VFIO_PCI_INTX_IRQ_INDEX)
1773 irq_info->flags |= VFIO_IRQ_INFO_MASKABLE |
1774 VFIO_IRQ_INFO_AUTOMASKED;
1776 irq_info->flags |= VFIO_IRQ_INFO_NORESIZE;
1781 static int mtty_get_device_info(struct vfio_device_info *dev_info)
1783 dev_info->flags = VFIO_DEVICE_FLAGS_PCI;
1784 dev_info->num_regions = VFIO_PCI_NUM_REGIONS;
1785 dev_info->num_irqs = VFIO_PCI_NUM_IRQS;
1790 static long mtty_ioctl(struct vfio_device *vdev, unsigned int cmd,
1793 struct mdev_state *mdev_state =
1794 container_of(vdev, struct mdev_state, vdev);
1796 unsigned long minsz;
1799 case VFIO_DEVICE_GET_INFO:
1801 struct vfio_device_info info;
1803 minsz = offsetofend(struct vfio_device_info, num_irqs);
1805 if (copy_from_user(&info, (void __user *)arg, minsz))
1808 if (info.argsz < minsz)
1811 ret = mtty_get_device_info(&info);
1815 memcpy(&mdev_state->dev_info, &info, sizeof(info));
1817 if (copy_to_user((void __user *)arg, &info, minsz))
1822 case VFIO_DEVICE_GET_REGION_INFO:
1824 struct vfio_region_info info;
1825 u16 cap_type_id = 0;
1826 void *cap_type = NULL;
1828 minsz = offsetofend(struct vfio_region_info, offset);
1830 if (copy_from_user(&info, (void __user *)arg, minsz))
1833 if (info.argsz < minsz)
1836 ret = mtty_get_region_info(mdev_state, &info, &cap_type_id,
1841 if (copy_to_user((void __user *)arg, &info, minsz))
1847 case VFIO_DEVICE_GET_IRQ_INFO:
1849 struct vfio_irq_info info;
1851 minsz = offsetofend(struct vfio_irq_info, count);
1853 if (copy_from_user(&info, (void __user *)arg, minsz))
1856 if ((info.argsz < minsz) ||
1857 (info.index >= mdev_state->dev_info.num_irqs))
1860 ret = mtty_get_irq_info(&info);
1864 if (copy_to_user((void __user *)arg, &info, minsz))
1869 case VFIO_DEVICE_SET_IRQS:
1871 struct vfio_irq_set hdr;
1872 u8 *data = NULL, *ptr = NULL;
1873 size_t data_size = 0;
1875 minsz = offsetofend(struct vfio_irq_set, count);
1877 if (copy_from_user(&hdr, (void __user *)arg, minsz))
1880 ret = vfio_set_irqs_validate_and_prepare(&hdr,
1881 mdev_state->dev_info.num_irqs,
1888 ptr = data = memdup_user((void __user *)(arg + minsz),
1891 return PTR_ERR(data);
1894 ret = mtty_set_irqs(mdev_state, hdr.flags, hdr.index, hdr.start,
1900 case VFIO_DEVICE_RESET:
1901 return mtty_reset(mdev_state);
1907 sample_mdev_dev_show(struct device *dev, struct device_attribute *attr,
1910 return sprintf(buf, "This is MDEV %s\n", dev_name(dev));
1913 static DEVICE_ATTR_RO(sample_mdev_dev);
1915 static struct attribute *mdev_dev_attrs[] = {
1916 &dev_attr_sample_mdev_dev.attr,
1920 static const struct attribute_group mdev_dev_group = {
1922 .attrs = mdev_dev_attrs,
1925 static const struct attribute_group *mdev_dev_groups[] = {
1930 static unsigned int mtty_get_available(struct mdev_type *mtype)
1932 struct mtty_type *type = container_of(mtype, struct mtty_type, type);
1934 return atomic_read(&mdev_avail_ports) / type->nr_ports;
1937 static void mtty_close(struct vfio_device *vdev)
1939 struct mdev_state *mdev_state =
1940 container_of(vdev, struct mdev_state, vdev);
1942 mtty_disable_files(mdev_state);
1943 mtty_disable_intx(mdev_state);
1944 mtty_disable_msi(mdev_state);
1947 static const struct vfio_device_ops mtty_dev_ops = {
1948 .name = "vfio-mtty",
1949 .init = mtty_init_dev,
1950 .release = mtty_release_dev,
1952 .write = mtty_write,
1953 .ioctl = mtty_ioctl,
1954 .bind_iommufd = vfio_iommufd_emulated_bind,
1955 .unbind_iommufd = vfio_iommufd_emulated_unbind,
1956 .attach_ioas = vfio_iommufd_emulated_attach_ioas,
1957 .detach_ioas = vfio_iommufd_emulated_detach_ioas,
1958 .close_device = mtty_close,
1961 static struct mdev_driver mtty_driver = {
1962 .device_api = VFIO_DEVICE_API_PCI_STRING,
1965 .owner = THIS_MODULE,
1966 .mod_name = KBUILD_MODNAME,
1967 .dev_groups = mdev_dev_groups,
1969 .probe = mtty_probe,
1970 .remove = mtty_remove,
1971 .get_available = mtty_get_available,
1974 static void mtty_device_release(struct device *dev)
1976 dev_dbg(dev, "mtty: released\n");
1979 static int __init mtty_dev_init(void)
1983 pr_info("mtty_dev: %s\n", __func__);
1985 memset(&mtty_dev, 0, sizeof(mtty_dev));
1987 idr_init(&mtty_dev.vd_idr);
1989 ret = alloc_chrdev_region(&mtty_dev.vd_devt, 0, MINORMASK + 1,
1993 pr_err("Error: failed to register mtty_dev, err:%d\n", ret);
1997 cdev_init(&mtty_dev.vd_cdev, &vd_fops);
1998 cdev_add(&mtty_dev.vd_cdev, mtty_dev.vd_devt, MINORMASK + 1);
2000 pr_info("major_number:%d\n", MAJOR(mtty_dev.vd_devt));
2002 ret = mdev_register_driver(&mtty_driver);
2006 mtty_dev.vd_class = class_create(MTTY_CLASS_NAME);
2008 if (IS_ERR(mtty_dev.vd_class)) {
2009 pr_err("Error: failed to register mtty_dev class\n");
2010 ret = PTR_ERR(mtty_dev.vd_class);
2014 mtty_dev.dev.class = mtty_dev.vd_class;
2015 mtty_dev.dev.release = mtty_device_release;
2016 dev_set_name(&mtty_dev.dev, "%s", MTTY_NAME);
2018 ret = device_register(&mtty_dev.dev);
2022 ret = mdev_register_parent(&mtty_dev.parent, &mtty_dev.dev,
2023 &mtty_driver, mtty_mdev_types,
2024 ARRAY_SIZE(mtty_mdev_types));
2030 device_del(&mtty_dev.dev);
2032 put_device(&mtty_dev.dev);
2033 class_destroy(mtty_dev.vd_class);
2035 mdev_unregister_driver(&mtty_driver);
2037 cdev_del(&mtty_dev.vd_cdev);
2038 unregister_chrdev_region(mtty_dev.vd_devt, MINORMASK + 1);
2042 static void __exit mtty_dev_exit(void)
2044 mtty_dev.dev.bus = NULL;
2045 mdev_unregister_parent(&mtty_dev.parent);
2047 device_unregister(&mtty_dev.dev);
2048 idr_destroy(&mtty_dev.vd_idr);
2049 mdev_unregister_driver(&mtty_driver);
2050 cdev_del(&mtty_dev.vd_cdev);
2051 unregister_chrdev_region(mtty_dev.vd_devt, MINORMASK + 1);
2052 class_destroy(mtty_dev.vd_class);
2053 mtty_dev.vd_class = NULL;
2054 pr_info("mtty_dev: Unloaded!\n");
2057 module_init(mtty_dev_init)
2058 module_exit(mtty_dev_exit)
2060 MODULE_LICENSE("GPL v2");
2061 MODULE_INFO(supported, "Test driver that simulate serial port over PCI");
2062 MODULE_VERSION(VERSION_STRING);
2063 MODULE_AUTHOR(DRIVER_AUTHOR);