s390/kernel/smp.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  *  SMP related functions
   4  *
   5  *    Copyright IBM Corp. 1999, 2012
   6  *    Author(s): Denis Joseph Barrow,
   7  *               Martin Schwidefsky <schwidefsky@de.ibm.com>,
   8  *
   9  *  based on other smp stuff by
  10  *    (c) 1995 Alan Cox, CymruNET Ltd  <alan@cymru.net>
  11  *    (c) 1998 Ingo Molnar
  12  *
  13  * The code outside of smp.c uses logical cpu numbers, only smp.c does
  14  * the translation of logical to physical cpu ids. All new code that
  15  * operates on physical cpu numbers needs to go into smp.c.
  16  */
  17
  18 #define KMSG_COMPONENT "cpu"
  19 #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
  20
  21 #include <linux/workqueue.h>
  22 #include <linux/memblock.h>
  23 #include <linux/export.h>
  24 #include <linux/init.h>
  25 #include <linux/mm.h>
  26 #include <linux/err.h>
  27 #include <linux/spinlock.h>
  28 #include <linux/kernel_stat.h>
  29 #include <linux/delay.h>
  30 #include <linux/interrupt.h>
  31 #include <linux/irqflags.h>
  32 #include <linux/irq_work.h>
  33 #include <linux/cpu.h>
  34 #include <linux/slab.h>
  35 #include <linux/sched/hotplug.h>
  36 #include <linux/sched/task_stack.h>
  37 #include <linux/crash_dump.h>
  38 #include <linux/kprobes.h>
  39 #include <asm/asm-offsets.h>
  40 #include <asm/diag.h>
  41 #include <asm/switch_to.h>
  42 #include <asm/facility.h>
  43 #include <asm/ipl.h>
  44 #include <asm/setup.h>
  45 #include <asm/irq.h>
  46 #include <asm/tlbflush.h>
  47 #include <asm/vtimer.h>
  48 #include <asm/abs_lowcore.h>
  49 #include <asm/sclp.h>
  50 #include <asm/debug.h>
  51 #include <asm/os_info.h>
  52 #include <asm/sigp.h>
  53 #include <asm/idle.h>
  54 #include <asm/nmi.h>
  55 #include <asm/stacktrace.h>
  56 #include <asm/topology.h>
  57 #include <asm/vdso.h>
  58 #include <asm/maccess.h>
  59 #include "entry.h"
  60
  61 enum {
  62         ec_schedule = 0,
  63         ec_call_function_single,
  64         ec_stop_cpu,
  65         ec_mcck_pending,
  66         ec_irq_work,
  67 };
  68
  69 enum {
  70         CPU_STATE_STANDBY,
  71         CPU_STATE_CONFIGURED,
  72 };
  73
  74 static DEFINE_PER_CPU(struct cpu *, cpu_device);
  75
  76 struct pcpu {
  77         unsigned long ec_mask;          /* bit mask for ec_xxx functions */
  78         unsigned long ec_clk;           /* sigp timestamp for ec_xxx */
  79         signed char state;              /* physical cpu state */
  80         signed char polarization;       /* physical polarization */
  81         u16 address;                    /* physical cpu address */
  82 };
  83
  84 static u8 boot_core_type;
  85 static struct pcpu pcpu_devices[NR_CPUS];
  86
  87 unsigned int smp_cpu_mt_shift;
  88 EXPORT_SYMBOL(smp_cpu_mt_shift);
  89
  90 unsigned int smp_cpu_mtid;
  91 EXPORT_SYMBOL(smp_cpu_mtid);
  92
  93 #ifdef CONFIG_CRASH_DUMP
  94 __vector128 __initdata boot_cpu_vector_save_area[__NUM_VXRS];
  95 #endif
  96
  97 static unsigned int smp_max_threads __initdata = -1U;
  98 cpumask_t cpu_setup_mask;
  99
 100 static int __init early_nosmt(char *s)
 101 {
 102         smp_max_threads = 1;
 103         return 0;
 104 }
 105 early_param("nosmt", early_nosmt);
 106
 107 static int __init early_smt(char *s)
 108 {
 109         get_option(&s, &smp_max_threads);
 110         return 0;
 111 }
 112 early_param("smt", early_smt);
 113
 114 /*
 115  * The smp_cpu_state_mutex must be held when changing the state or polarization
 116  * member of a pcpu data structure within the pcpu_devices arreay.
 117  */
 118 DEFINE_MUTEX(smp_cpu_state_mutex);
 119
 120 /*
 121  * Signal processor helper functions.
 122  */
 123 static inline int __pcpu_sigp_relax(u16 addr, u8 order, unsigned long parm)
 124 {
 125         int cc;
 126
 127         while (1) {
 128                 cc = __pcpu_sigp(addr, order, parm, NULL);
 129                 if (cc != SIGP_CC_BUSY)
 130                         return cc;
 131                 cpu_relax();
 132         }
 133 }
 134
 135 static int pcpu_sigp_retry(struct pcpu *pcpu, u8 order, u32 parm)
 136 {
 137         int cc, retry;
 138
 139         for (retry = 0; ; retry++) {
 140                 cc = __pcpu_sigp(pcpu->address, order, parm, NULL);
 141                 if (cc != SIGP_CC_BUSY)
 142                         break;
 143                 if (retry >= 3)
 144                         udelay(10);
 145         }
 146         return cc;
 147 }
 148
 149 static inline int pcpu_stopped(struct pcpu *pcpu)
 150 {
 151         u32 status;
 152
 153         if (__pcpu_sigp(pcpu->address, SIGP_SENSE,
 154                         0, &status) != SIGP_CC_STATUS_STORED)
 155                 return 0;
 156         return !!(status & (SIGP_STATUS_CHECK_STOP|SIGP_STATUS_STOPPED));
 157 }
 158
 159 static inline int pcpu_running(struct pcpu *pcpu)
 160 {
 161         if (__pcpu_sigp(pcpu->address, SIGP_SENSE_RUNNING,
 162                         0, NULL) != SIGP_CC_STATUS_STORED)
 163                 return 1;
 164         /* Status stored condition code is equivalent to cpu not running. */
 165         return 0;
 166 }
 167
 168 /*
 169  * Find struct pcpu by cpu address.
 170  */
 171 static struct pcpu *pcpu_find_address(const struct cpumask *mask, u16 address)
 172 {
 173         int cpu;
 174
 175         for_each_cpu(cpu, mask)
 176                 if (pcpu_devices[cpu].address == address)
 177                         return pcpu_devices + cpu;
 178         return NULL;
 179 }
 180
 181 static void pcpu_ec_call(struct pcpu *pcpu, int ec_bit)
 182 {
 183         int order;
 184
 185         if (test_and_set_bit(ec_bit, &pcpu->ec_mask))
 186                 return;
 187         order = pcpu_running(pcpu) ? SIGP_EXTERNAL_CALL : SIGP_EMERGENCY_SIGNAL;
 188         pcpu->ec_clk = get_tod_clock_fast();
 189         pcpu_sigp_retry(pcpu, order, 0);
 190 }
 191
 192 static int pcpu_alloc_lowcore(struct pcpu *pcpu, int cpu)
 193 {
 194         unsigned long async_stack, nodat_stack, mcck_stack;
 195         struct lowcore *lc;
 196
 197         lc = (struct lowcore *) __get_free_pages(GFP_KERNEL | GFP_DMA, LC_ORDER);
 198         nodat_stack = __get_free_pages(GFP_KERNEL, THREAD_SIZE_ORDER);
 199         async_stack = stack_alloc();
 200         mcck_stack = stack_alloc();
 201         if (!lc || !nodat_stack || !async_stack || !mcck_stack)
 202                 goto out;
 203         memcpy(lc, &S390_lowcore, 512);
 204         memset((char *) lc + 512, 0, sizeof(*lc) - 512);
 205         lc->async_stack = async_stack + STACK_INIT_OFFSET;
 206         lc->nodat_stack = nodat_stack + STACK_INIT_OFFSET;
 207         lc->mcck_stack = mcck_stack + STACK_INIT_OFFSET;
 208         lc->cpu_nr = cpu;
 209         lc->spinlock_lockval = arch_spin_lockval(cpu);
 210         lc->spinlock_index = 0;
 211         lc->return_lpswe = gen_lpswe(__LC_RETURN_PSW);
 212         lc->return_mcck_lpswe = gen_lpswe(__LC_RETURN_MCCK_PSW);
 213         lc->preempt_count = PREEMPT_DISABLED;
 214         if (nmi_alloc_mcesa(&lc->mcesad))
 215                 goto out;
 216         if (abs_lowcore_map(cpu, lc, true))
 217                 goto out_mcesa;
 218         lowcore_ptr[cpu] = lc;
 219         pcpu_sigp_retry(pcpu, SIGP_SET_PREFIX, __pa(lc));
 220         return 0;
 221
 222 out_mcesa:
 223         nmi_free_mcesa(&lc->mcesad);
 224 out:
 225         stack_free(mcck_stack);
 226         stack_free(async_stack);
 227         free_pages(nodat_stack, THREAD_SIZE_ORDER);
 228         free_pages((unsigned long) lc, LC_ORDER);
 229         return -ENOMEM;
 230 }
 231
 232 static void pcpu_free_lowcore(struct pcpu *pcpu)
 233 {
 234         unsigned long async_stack, nodat_stack, mcck_stack;
 235         struct lowcore *lc;
 236         int cpu;
 237
 238         cpu = pcpu - pcpu_devices;
 239         lc = lowcore_ptr[cpu];
 240         nodat_stack = lc->nodat_stack - STACK_INIT_OFFSET;
 241         async_stack = lc->async_stack - STACK_INIT_OFFSET;
 242         mcck_stack = lc->mcck_stack - STACK_INIT_OFFSET;
 243         pcpu_sigp_retry(pcpu, SIGP_SET_PREFIX, 0);
 244         lowcore_ptr[cpu] = NULL;
 245         abs_lowcore_unmap(cpu);
 246         nmi_free_mcesa(&lc->mcesad);
 247         stack_free(async_stack);
 248         stack_free(mcck_stack);
 249         free_pages(nodat_stack, THREAD_SIZE_ORDER);
 250         free_pages((unsigned long) lc, LC_ORDER);
 251 }
 252
 253 static void pcpu_prepare_secondary(struct pcpu *pcpu, int cpu)
 254 {
 255         struct lowcore *lc = lowcore_ptr[cpu];
 256
 257         cpumask_set_cpu(cpu, &init_mm.context.cpu_attach_mask);
 258         cpumask_set_cpu(cpu, mm_cpumask(&init_mm));
 259         lc->cpu_nr = cpu;
 260         lc->restart_flags = RESTART_FLAG_CTLREGS;
 261         lc->spinlock_lockval = arch_spin_lockval(cpu);
 262         lc->spinlock_index = 0;
 263         lc->percpu_offset = __per_cpu_offset[cpu];
 264         lc->kernel_asce = S390_lowcore.kernel_asce;
 265         lc->user_asce = s390_invalid_asce;
 266         lc->machine_flags = S390_lowcore.machine_flags;
 267         lc->user_timer = lc->system_timer =
 268                 lc->steal_timer = lc->avg_steal_timer = 0;
 269         __ctl_store(lc->cregs_save_area, 0, 15);
 270         lc->cregs_save_area[1] = lc->kernel_asce;
 271         lc->cregs_save_area[7] = lc->user_asce;
 272         save_access_regs((unsigned int *) lc->access_regs_save_area);
 273         arch_spin_lock_setup(cpu);
 274 }
 275
 276 static void pcpu_attach_task(struct pcpu *pcpu, struct task_struct *tsk)
 277 {
 278         struct lowcore *lc;
 279         int cpu;
 280
 281         cpu = pcpu - pcpu_devices;
 282         lc = lowcore_ptr[cpu];
 283         lc->kernel_stack = (unsigned long) task_stack_page(tsk)
 284                 + THREAD_SIZE - STACK_FRAME_OVERHEAD - sizeof(struct pt_regs);
 285         lc->current_task = (unsigned long) tsk;
 286         lc->lpp = LPP_MAGIC;
 287         lc->current_pid = tsk->pid;
 288         lc->user_timer = tsk->thread.user_timer;
 289         lc->guest_timer = tsk->thread.guest_timer;
 290         lc->system_timer = tsk->thread.system_timer;
 291         lc->hardirq_timer = tsk->thread.hardirq_timer;
 292         lc->softirq_timer = tsk->thread.softirq_timer;
 293         lc->steal_timer = 0;
 294 }
 295
 296 static void pcpu_start_fn(struct pcpu *pcpu, void (*func)(void *), void *data)
 297 {
 298         struct lowcore *lc;
 299         int cpu;
 300
 301         cpu = pcpu - pcpu_devices;
 302         lc = lowcore_ptr[cpu];
 303         lc->restart_stack = lc->kernel_stack;
 304         lc->restart_fn = (unsigned long) func;
 305         lc->restart_data = (unsigned long) data;
 306         lc->restart_source = -1U;
 307         pcpu_sigp_retry(pcpu, SIGP_RESTART, 0);
 308 }
 309
 310 typedef void (pcpu_delegate_fn)(void *);
 311
 312 /*
 313  * Call function via PSW restart on pcpu and stop the current cpu.
 314  */
 315 static void __pcpu_delegate(pcpu_delegate_fn *func, void *data)
 316 {
 317         func(data);     /* should not return */
 318 }
 319
 320 static void pcpu_delegate(struct pcpu *pcpu,
 321                           pcpu_delegate_fn *func,
 322                           void *data, unsigned long stack)
 323 {
 324         struct lowcore *lc, *abs_lc;
 325         unsigned int source_cpu;
 326         unsigned long flags;
 327
 328         lc = lowcore_ptr[pcpu - pcpu_devices];
 329         source_cpu = stap();
 330         __load_psw_mask(PSW_KERNEL_BITS | PSW_MASK_DAT);
 331         if (pcpu->address == source_cpu) {
 332                 call_on_stack(2, stack, void, __pcpu_delegate,
 333                               pcpu_delegate_fn *, func, void *, data);
 334         }
 335         /* Stop target cpu (if func returns this stops the current cpu). */
 336         pcpu_sigp_retry(pcpu, SIGP_STOP, 0);
 337         /* Restart func on the target cpu and stop the current cpu. */
 338         if (lc) {
 339                 lc->restart_stack = stack;
 340                 lc->restart_fn = (unsigned long)func;
 341                 lc->restart_data = (unsigned long)data;
 342                 lc->restart_source = source_cpu;
 343         } else {
 344                 abs_lc = get_abs_lowcore(&flags);
 345                 abs_lc->restart_stack = stack;
 346                 abs_lc->restart_fn = (unsigned long)func;
 347                 abs_lc->restart_data = (unsigned long)data;
 348                 abs_lc->restart_source = source_cpu;
 349                 put_abs_lowcore(abs_lc, flags);
 350         }
 351         __bpon();
 352         asm volatile(
 353                 "0:     sigp    0,%0,%2 # sigp restart to target cpu\n"
 354                 "       brc     2,0b    # busy, try again\n"
 355                 "1:     sigp    0,%1,%3 # sigp stop to current cpu\n"
 356                 "       brc     2,1b    # busy, try again\n"
 357                 : : "d" (pcpu->address), "d" (source_cpu),
 358                     "K" (SIGP_RESTART), "K" (SIGP_STOP)
 359                 : "0", "1", "cc");
 360         for (;;) ;
 361 }
 362
 363 /*
 364  * Enable additional logical cpus for multi-threading.
 365  */
 366 static int pcpu_set_smt(unsigned int mtid)
 367 {
 368         int cc;
 369
 370         if (smp_cpu_mtid == mtid)
 371                 return 0;
 372         cc = __pcpu_sigp(0, SIGP_SET_MULTI_THREADING, mtid, NULL);
 373         if (cc == 0) {
 374                 smp_cpu_mtid = mtid;
 375                 smp_cpu_mt_shift = 0;
 376                 while (smp_cpu_mtid >= (1U << smp_cpu_mt_shift))
 377                         smp_cpu_mt_shift++;
 378                 pcpu_devices[0].address = stap();
 379         }
 380         return cc;
 381 }
 382
 383 /*
 384  * Call function on an online CPU.
 385  */
 386 void smp_call_online_cpu(void (*func)(void *), void *data)
 387 {
 388         struct pcpu *pcpu;
 389
 390         /* Use the current cpu if it is online. */
 391         pcpu = pcpu_find_address(cpu_online_mask, stap());
 392         if (!pcpu)
 393                 /* Use the first online cpu. */
 394                 pcpu = pcpu_devices + cpumask_first(cpu_online_mask);
 395         pcpu_delegate(pcpu, func, data, (unsigned long) restart_stack);
 396 }
 397
 398 /*
 399  * Call function on the ipl CPU.
 400  */
 401 void smp_call_ipl_cpu(void (*func)(void *), void *data)
 402 {
 403         struct lowcore *lc = lowcore_ptr[0];
 404
 405         if (pcpu_devices[0].address == stap())
 406                 lc = &S390_lowcore;
 407
 408         pcpu_delegate(&pcpu_devices[0], func, data,
 409                       lc->nodat_stack);
 410 }
 411
 412 int smp_find_processor_id(u16 address)
 413 {
 414         int cpu;
 415
 416         for_each_present_cpu(cpu)
 417                 if (pcpu_devices[cpu].address == address)
 418                         return cpu;
 419         return -1;
 420 }
 421
 422 void schedule_mcck_handler(void)
 423 {
 424         pcpu_ec_call(pcpu_devices + smp_processor_id(), ec_mcck_pending);
 425 }
 426
 427 bool notrace arch_vcpu_is_preempted(int cpu)
 428 {
 429         if (test_cpu_flag_of(CIF_ENABLED_WAIT, cpu))
 430                 return false;
 431         if (pcpu_running(pcpu_devices + cpu))
 432                 return false;
 433         return true;
 434 }
 435 EXPORT_SYMBOL(arch_vcpu_is_preempted);
 436
 437 void notrace smp_yield_cpu(int cpu)
 438 {
 439         if (!MACHINE_HAS_DIAG9C)
 440                 return;
 441         diag_stat_inc_norecursion(DIAG_STAT_X09C);
 442         asm volatile("diag %0,0,0x9c"
 443                      : : "d" (pcpu_devices[cpu].address));
 444 }
 445 EXPORT_SYMBOL_GPL(smp_yield_cpu);
 446
 447 /*
 448  * Send cpus emergency shutdown signal. This gives the cpus the
 449  * opportunity to complete outstanding interrupts.
 450  */
 451 void notrace smp_emergency_stop(void)
 452 {
 453         static arch_spinlock_t lock = __ARCH_SPIN_LOCK_UNLOCKED;
 454         static cpumask_t cpumask;
 455         u64 end;
 456         int cpu;
 457
 458         arch_spin_lock(&lock);
 459         cpumask_copy(&cpumask, cpu_online_mask);
 460         cpumask_clear_cpu(smp_processor_id(), &cpumask);
 461
 462         end = get_tod_clock() + (1000000UL << 12);
 463         for_each_cpu(cpu, &cpumask) {
 464                 struct pcpu *pcpu = pcpu_devices + cpu;
 465                 set_bit(ec_stop_cpu, &pcpu->ec_mask);
 466                 while (__pcpu_sigp(pcpu->address, SIGP_EMERGENCY_SIGNAL,
 467                                    0, NULL) == SIGP_CC_BUSY &&
 468                        get_tod_clock() < end)
 469                         cpu_relax();
 470         }
 471         while (get_tod_clock() < end) {
 472                 for_each_cpu(cpu, &cpumask)
 473                         if (pcpu_stopped(pcpu_devices + cpu))
 474                                 cpumask_clear_cpu(cpu, &cpumask);
 475                 if (cpumask_empty(&cpumask))
 476                         break;
 477                 cpu_relax();
 478         }
 479         arch_spin_unlock(&lock);
 480 }
 481 NOKPROBE_SYMBOL(smp_emergency_stop);
 482
 483 /*
 484  * Stop all cpus but the current one.
 485  */
 486 void smp_send_stop(void)
 487 {
 488         int cpu;
 489
 490         /* Disable all interrupts/machine checks */
 491         __load_psw_mask(PSW_KERNEL_BITS | PSW_MASK_DAT);
 492         trace_hardirqs_off();
 493
 494         debug_set_critical();
 495
 496         if (oops_in_progress)
 497                 smp_emergency_stop();
 498
 499         /* stop all processors */
 500         for_each_online_cpu(cpu) {
 501                 if (cpu == smp_processor_id())
 502                         continue;
 503                 pcpu_sigp_retry(pcpu_devices + cpu, SIGP_STOP, 0);
 504                 while (!pcpu_stopped(pcpu_devices + cpu))
 505                         cpu_relax();
 506         }
 507 }
 508
 509 /*
 510  * This is the main routine where commands issued by other
 511  * cpus are handled.
 512  */
 513 static void smp_handle_ext_call(void)
 514 {
 515         unsigned long bits;
 516
 517         /* handle bit signal external calls */
 518         bits = xchg(&pcpu_devices[smp_processor_id()].ec_mask, 0);
 519         if (test_bit(ec_stop_cpu, &bits))
 520                 smp_stop_cpu();
 521         if (test_bit(ec_schedule, &bits))
 522                 scheduler_ipi();
 523         if (test_bit(ec_call_function_single, &bits))
 524                 generic_smp_call_function_single_interrupt();
 525         if (test_bit(ec_mcck_pending, &bits))
 526                 __s390_handle_mcck();
 527         if (test_bit(ec_irq_work, &bits))
 528                 irq_work_run();
 529 }
 530
 531 static void do_ext_call_interrupt(struct ext_code ext_code,
 532                                   unsigned int param32, unsigned long param64)
 533 {
 534         inc_irq_stat(ext_code.code == 0x1202 ? IRQEXT_EXC : IRQEXT_EMS);
 535         smp_handle_ext_call();
 536 }
 537
 538 void arch_send_call_function_ipi_mask(const struct cpumask *mask)
 539 {
 540         int cpu;
 541
 542         for_each_cpu(cpu, mask)
 543                 pcpu_ec_call(pcpu_devices + cpu, ec_call_function_single);
 544 }
 545
 546 void arch_send_call_function_single_ipi(int cpu)
 547 {
 548         pcpu_ec_call(pcpu_devices + cpu, ec_call_function_single);
 549 }
 550
 551 /*
 552  * this function sends a 'reschedule' IPI to another CPU.
 553  * it goes straight through and wastes no time serializing
 554  * anything. Worst case is that we lose a reschedule ...
 555  */
 556 void smp_send_reschedule(int cpu)
 557 {
 558         pcpu_ec_call(pcpu_devices + cpu, ec_schedule);
 559 }
 560
 561 #ifdef CONFIG_IRQ_WORK
 562 void arch_irq_work_raise(void)
 563 {
 564         pcpu_ec_call(pcpu_devices + smp_processor_id(), ec_irq_work);
 565 }
 566 #endif
 567
 568 /*
 569  * parameter area for the set/clear control bit callbacks
 570  */
 571 struct ec_creg_mask_parms {
 572         unsigned long orval;
 573         unsigned long andval;
 574         int cr;
 575 };
 576
 577 /*
 578  * callback for setting/clearing control bits
 579  */
 580 static void smp_ctl_bit_callback(void *info)
 581 {
 582         struct ec_creg_mask_parms *pp = info;
 583         unsigned long cregs[16];
 584
 585         __ctl_store(cregs, 0, 15);
 586         cregs[pp->cr] = (cregs[pp->cr] & pp->andval) | pp->orval;
 587         __ctl_load(cregs, 0, 15);
 588 }
 589
 590 static DEFINE_SPINLOCK(ctl_lock);
 591
 592 void smp_ctl_set_clear_bit(int cr, int bit, bool set)
 593 {
 594         struct ec_creg_mask_parms parms = { .cr = cr, };
 595         struct lowcore *abs_lc;
 596         unsigned long flags;
 597         u64 ctlreg;
 598
 599         if (set) {
 600                 parms.orval = 1UL << bit;
 601                 parms.andval = -1UL;
 602         } else {
 603                 parms.orval = 0;
 604                 parms.andval = ~(1UL << bit);
 605         }
 606         spin_lock(&ctl_lock);
 607         abs_lc = get_abs_lowcore(&flags);
 608         ctlreg = abs_lc->cregs_save_area[cr];
 609         ctlreg = (ctlreg & parms.andval) | parms.orval;
 610         abs_lc->cregs_save_area[cr] = ctlreg;
 611         put_abs_lowcore(abs_lc, flags);
 612         spin_unlock(&ctl_lock);
 613         on_each_cpu(smp_ctl_bit_callback, &parms, 1);
 614 }
 615 EXPORT_SYMBOL(smp_ctl_set_clear_bit);
 616
 617 #ifdef CONFIG_CRASH_DUMP
 618
 619 int smp_store_status(int cpu)
 620 {
 621         struct lowcore *lc;
 622         struct pcpu *pcpu;
 623         unsigned long pa;
 624
 625         pcpu = pcpu_devices + cpu;
 626         lc = lowcore_ptr[cpu];
 627         pa = __pa(&lc->floating_pt_save_area);
 628         if (__pcpu_sigp_relax(pcpu->address, SIGP_STORE_STATUS_AT_ADDRESS,
 629                               pa) != SIGP_CC_ORDER_CODE_ACCEPTED)
 630                 return -EIO;
 631         if (!MACHINE_HAS_VX && !MACHINE_HAS_GS)
 632                 return 0;
 633         pa = lc->mcesad & MCESA_ORIGIN_MASK;
 634         if (MACHINE_HAS_GS)
 635                 pa |= lc->mcesad & MCESA_LC_MASK;
 636         if (__pcpu_sigp_relax(pcpu->address, SIGP_STORE_ADDITIONAL_STATUS,
 637                               pa) != SIGP_CC_ORDER_CODE_ACCEPTED)
 638                 return -EIO;
 639         return 0;
 640 }
 641
 642 /*
 643  * Collect CPU state of the previous, crashed system.
 644  * There are four cases:
 645  * 1) standard zfcp/nvme dump
 646  *    condition: OLDMEM_BASE == NULL && is_ipl_type_dump() == true
 647  *    The state for all CPUs except the boot CPU needs to be collected
 648  *    with sigp stop-and-store-status. The boot CPU state is located in
 649  *    the absolute lowcore of the memory stored in the HSA. The zcore code
 650  *    will copy the boot CPU state from the HSA.
 651  * 2) stand-alone kdump for SCSI/NVMe (zfcp/nvme dump with swapped memory)
 652  *    condition: OLDMEM_BASE != NULL && is_ipl_type_dump() == true
 653  *    The state for all CPUs except the boot CPU needs to be collected
 654  *    with sigp stop-and-store-status. The firmware or the boot-loader
 655  *    stored the registers of the boot CPU in the absolute lowcore in the
 656  *    memory of the old system.
 657  * 3) kdump and the old kernel did not store the CPU state,
 658  *    or stand-alone kdump for DASD
 659  *    condition: OLDMEM_BASE != NULL && !is_kdump_kernel()
 660  *    The state for all CPUs except the boot CPU needs to be collected
 661  *    with sigp stop-and-store-status. The kexec code or the boot-loader
 662  *    stored the registers of the boot CPU in the memory of the old system.
 663  * 4) kdump and the old kernel stored the CPU state
 664  *    condition: OLDMEM_BASE != NULL && is_kdump_kernel()
 665  *    This case does not exist for s390 anymore, setup_arch explicitly
 666  *    deactivates the elfcorehdr= kernel parameter
 667  */
 668 static bool dump_available(void)
 669 {
 670         return oldmem_data.start || is_ipl_type_dump();
 671 }
 672
 673 void __init smp_save_dump_ipl_cpu(void)
 674 {
 675         struct save_area *sa;
 676         void *regs;
 677
 678         if (!dump_available())
 679                 return;
 680         sa = save_area_alloc(true);
 681         regs = memblock_alloc(512, 8);
 682         if (!sa || !regs)
 683                 panic("could not allocate memory for boot CPU save area\n");
 684         copy_oldmem_kernel(regs, __LC_FPREGS_SAVE_AREA, 512);
 685         save_area_add_regs(sa, regs);
 686         memblock_free(regs, 512);
 687         if (MACHINE_HAS_VX)
 688                 save_area_add_vxrs(sa, boot_cpu_vector_save_area);
 689 }
 690
 691 void __init smp_save_dump_secondary_cpus(void)
 692 {
 693         int addr, boot_cpu_addr, max_cpu_addr;
 694         struct save_area *sa;
 695         void *page;
 696
 697         if (!dump_available())
 698                 return;
 699         /* Allocate a page as dumping area for the store status sigps */
 700         page = memblock_alloc_low(PAGE_SIZE, PAGE_SIZE);
 701         if (!page)
 702                 panic("ERROR: Failed to allocate %lx bytes below %lx\n",
 703                       PAGE_SIZE, 1UL << 31);
 704
 705         /* Set multi-threading state to the previous system. */
 706         pcpu_set_smt(sclp.mtid_prev);
 707         boot_cpu_addr = stap();
 708         max_cpu_addr = SCLP_MAX_CORES << sclp.mtid_prev;
 709         for (addr = 0; addr <= max_cpu_addr; addr++) {
 710                 if (addr == boot_cpu_addr)
 711                         continue;
 712                 if (__pcpu_sigp_relax(addr, SIGP_SENSE, 0) ==
 713                     SIGP_CC_NOT_OPERATIONAL)
 714                         continue;
 715                 sa = save_area_alloc(false);
 716                 if (!sa)
 717                         panic("could not allocate memory for save area\n");
 718                 __pcpu_sigp_relax(addr, SIGP_STORE_STATUS_AT_ADDRESS, __pa(page));
 719                 save_area_add_regs(sa, page);
 720                 if (MACHINE_HAS_VX) {
 721                         __pcpu_sigp_relax(addr, SIGP_STORE_ADDITIONAL_STATUS, __pa(page));
 722                         save_area_add_vxrs(sa, page);
 723                 }
 724         }
 725         memblock_free(page, PAGE_SIZE);
 726         diag_amode31_ops.diag308_reset();
 727         pcpu_set_smt(0);
 728 }
 729 #endif /* CONFIG_CRASH_DUMP */
 730
 731 void smp_cpu_set_polarization(int cpu, int val)
 732 {
 733         pcpu_devices[cpu].polarization = val;
 734 }
 735
 736 int smp_cpu_get_polarization(int cpu)
 737 {
 738         return pcpu_devices[cpu].polarization;
 739 }
 740
 741 int smp_cpu_get_cpu_address(int cpu)
 742 {
 743         return pcpu_devices[cpu].address;
 744 }
 745
 746 static void __ref smp_get_core_info(struct sclp_core_info *info, int early)
 747 {
 748         static int use_sigp_detection;
 749         int address;
 750
 751         if (use_sigp_detection || sclp_get_core_info(info, early)) {
 752                 use_sigp_detection = 1;
 753                 for (address = 0;
 754                      address < (SCLP_MAX_CORES << smp_cpu_mt_shift);
 755                      address += (1U << smp_cpu_mt_shift)) {
 756                         if (__pcpu_sigp_relax(address, SIGP_SENSE, 0) ==
 757                             SIGP_CC_NOT_OPERATIONAL)
 758                                 continue;
 759                         info->core[info->configured].core_id =
 760                                 address >> smp_cpu_mt_shift;
 761                         info->configured++;
 762                 }
 763                 info->combined = info->configured;
 764         }
 765 }
 766
 767 static int smp_add_present_cpu(int cpu);
 768
 769 static int smp_add_core(struct sclp_core_entry *core, cpumask_t *avail,
 770                         bool configured, bool early)
 771 {
 772         struct pcpu *pcpu;
 773         int cpu, nr, i;
 774         u16 address;
 775
 776         nr = 0;
 777         if (sclp.has_core_type && core->type != boot_core_type)
 778                 return nr;
 779         cpu = cpumask_first(avail);
 780         address = core->core_id << smp_cpu_mt_shift;
 781         for (i = 0; (i <= smp_cpu_mtid) && (cpu < nr_cpu_ids); i++) {
 782                 if (pcpu_find_address(cpu_present_mask, address + i))
 783                         continue;
 784                 pcpu = pcpu_devices + cpu;
 785                 pcpu->address = address + i;
 786                 if (configured)
 787                         pcpu->state = CPU_STATE_CONFIGURED;
 788                 else
 789                         pcpu->state = CPU_STATE_STANDBY;
 790                 smp_cpu_set_polarization(cpu, POLARIZATION_UNKNOWN);
 791                 set_cpu_present(cpu, true);
 792                 if (!early && smp_add_present_cpu(cpu) != 0)
 793                         set_cpu_present(cpu, false);
 794                 else
 795                         nr++;
 796                 cpumask_clear_cpu(cpu, avail);
 797                 cpu = cpumask_next(cpu, avail);
 798         }
 799         return nr;
 800 }
 801
 802 static int __smp_rescan_cpus(struct sclp_core_info *info, bool early)
 803 {
 804         struct sclp_core_entry *core;
 805         static cpumask_t avail;
 806         bool configured;
 807         u16 core_id;
 808         int nr, i;
 809
 810         cpus_read_lock();
 811         mutex_lock(&smp_cpu_state_mutex);
 812         nr = 0;
 813         cpumask_xor(&avail, cpu_possible_mask, cpu_present_mask);
 814         /*
 815          * Add IPL core first (which got logical CPU number 0) to make sure
 816          * that all SMT threads get subsequent logical CPU numbers.
 817          */
 818         if (early) {
 819                 core_id = pcpu_devices[0].address >> smp_cpu_mt_shift;
 820                 for (i = 0; i < info->configured; i++) {
 821                         core = &info->core[i];
 822                         if (core->core_id == core_id) {
 823                                 nr += smp_add_core(core, &avail, true, early);
 824                                 break;
 825                         }
 826                 }
 827         }
 828         for (i = 0; i < info->combined; i++) {
 829                 configured = i < info->configured;
 830                 nr += smp_add_core(&info->core[i], &avail, configured, early);
 831         }
 832         mutex_unlock(&smp_cpu_state_mutex);
 833         cpus_read_unlock();
 834         return nr;
 835 }
 836
 837 void __init smp_detect_cpus(void)
 838 {
 839         unsigned int cpu, mtid, c_cpus, s_cpus;
 840         struct sclp_core_info *info;
 841         u16 address;
 842
 843         /* Get CPU information */
 844         info = memblock_alloc(sizeof(*info), 8);
 845         if (!info)
 846                 panic("%s: Failed to allocate %zu bytes align=0x%x\n",
 847                       __func__, sizeof(*info), 8);
 848         smp_get_core_info(info, 1);
 849         /* Find boot CPU type */
 850         if (sclp.has_core_type) {
 851                 address = stap();
 852                 for (cpu = 0; cpu < info->combined; cpu++)
 853                         if (info->core[cpu].core_id == address) {
 854                                 /* The boot cpu dictates the cpu type. */
 855                                 boot_core_type = info->core[cpu].type;
 856                                 break;
 857                         }
 858                 if (cpu >= info->combined)
 859                         panic("Could not find boot CPU type");
 860         }
 861
 862         /* Set multi-threading state for the current system */
 863         mtid = boot_core_type ? sclp.mtid : sclp.mtid_cp;
 864         mtid = (mtid < smp_max_threads) ? mtid : smp_max_threads - 1;
 865         pcpu_set_smt(mtid);
 866
 867         /* Print number of CPUs */
 868         c_cpus = s_cpus = 0;
 869         for (cpu = 0; cpu < info->combined; cpu++) {
 870                 if (sclp.has_core_type &&
 871                     info->core[cpu].type != boot_core_type)
 872                         continue;
 873                 if (cpu < info->configured)
 874                         c_cpus += smp_cpu_mtid + 1;
 875                 else
 876                         s_cpus += smp_cpu_mtid + 1;
 877         }
 878         pr_info("%d configured CPUs, %d standby CPUs\n", c_cpus, s_cpus);
 879
 880         /* Add CPUs present at boot */
 881         __smp_rescan_cpus(info, true);
 882         memblock_free(info, sizeof(*info));
 883 }
 884
 885 /*
 886  *      Activate a secondary processor.
 887  */
 888 static void smp_start_secondary(void *cpuvoid)
 889 {
 890         int cpu = raw_smp_processor_id();
 891
 892         S390_lowcore.last_update_clock = get_tod_clock();
 893         S390_lowcore.restart_stack = (unsigned long)restart_stack;
 894         S390_lowcore.restart_fn = (unsigned long)do_restart;
 895         S390_lowcore.restart_data = 0;
 896         S390_lowcore.restart_source = -1U;
 897         S390_lowcore.restart_flags = 0;
 898         restore_access_regs(S390_lowcore.access_regs_save_area);
 899         cpu_init();
 900         rcu_cpu_starting(cpu);
 901         init_cpu_timer();
 902         vtime_init();
 903         vdso_getcpu_init();
 904         pfault_init();
 905         cpumask_set_cpu(cpu, &cpu_setup_mask);
 906         update_cpu_masks();
 907         notify_cpu_starting(cpu);
 908         if (topology_cpu_dedicated(cpu))
 909                 set_cpu_flag(CIF_DEDICATED_CPU);
 910         else
 911                 clear_cpu_flag(CIF_DEDICATED_CPU);
 912         set_cpu_online(cpu, true);
 913         inc_irq_stat(CPU_RST);
 914         local_irq_enable();
 915         cpu_startup_entry(CPUHP_AP_ONLINE_IDLE);
 916 }
 917
 918 /* Upping and downing of CPUs */
 919 int __cpu_up(unsigned int cpu, struct task_struct *tidle)
 920 {
 921         struct pcpu *pcpu = pcpu_devices + cpu;
 922         int rc;
 923
 924         if (pcpu->state != CPU_STATE_CONFIGURED)
 925                 return -EIO;
 926         if (pcpu_sigp_retry(pcpu, SIGP_INITIAL_CPU_RESET, 0) !=
 927             SIGP_CC_ORDER_CODE_ACCEPTED)
 928                 return -EIO;
 929
 930         rc = pcpu_alloc_lowcore(pcpu, cpu);
 931         if (rc)
 932                 return rc;
 933         pcpu_prepare_secondary(pcpu, cpu);
 934         pcpu_attach_task(pcpu, tidle);
 935         pcpu_start_fn(pcpu, smp_start_secondary, NULL);
 936         /* Wait until cpu puts itself in the online & active maps */
 937         while (!cpu_online(cpu))
 938                 cpu_relax();
 939         return 0;
 940 }
 941
 942 static unsigned int setup_possible_cpus __initdata;
 943
 944 static int __init _setup_possible_cpus(char *s)
 945 {
 946         get_option(&s, &setup_possible_cpus);
 947         return 0;
 948 }
 949 early_param("possible_cpus", _setup_possible_cpus);
 950
 951 int __cpu_disable(void)
 952 {
 953         unsigned long cregs[16];
 954         int cpu;
 955
 956         /* Handle possible pending IPIs */
 957         smp_handle_ext_call();
 958         cpu = smp_processor_id();
 959         set_cpu_online(cpu, false);
 960         cpumask_clear_cpu(cpu, &cpu_setup_mask);
 961         update_cpu_masks();
 962         /* Disable pseudo page faults on this cpu. */
 963         pfault_fini();
 964         /* Disable interrupt sources via control register. */
 965         __ctl_store(cregs, 0, 15);
 966         cregs[0]  &= ~0x0000ee70UL;     /* disable all external interrupts */
 967         cregs[6]  &= ~0xff000000UL;     /* disable all I/O interrupts */
 968         cregs[14] &= ~0x1f000000UL;     /* disable most machine checks */
 969         __ctl_load(cregs, 0, 15);
 970         clear_cpu_flag(CIF_NOHZ_DELAY);
 971         return 0;
 972 }
 973
 974 void __cpu_die(unsigned int cpu)
 975 {
 976         struct pcpu *pcpu;
 977
 978         /* Wait until target cpu is down */
 979         pcpu = pcpu_devices + cpu;
 980         while (!pcpu_stopped(pcpu))
 981                 cpu_relax();
 982         pcpu_free_lowcore(pcpu);
 983         cpumask_clear_cpu(cpu, mm_cpumask(&init_mm));
 984         cpumask_clear_cpu(cpu, &init_mm.context.cpu_attach_mask);
 985 }
 986
 987 void __noreturn cpu_die(void)
 988 {
 989         idle_task_exit();
 990         __bpon();
 991         pcpu_sigp_retry(pcpu_devices + smp_processor_id(), SIGP_STOP, 0);
 992         for (;;) ;
 993 }
 994
 995 void __init smp_fill_possible_mask(void)
 996 {
 997         unsigned int possible, sclp_max, cpu;
 998
 999         sclp_max = max(sclp.mtid, sclp.mtid_cp) + 1;
1000         sclp_max = min(smp_max_threads, sclp_max);
1001         sclp_max = (sclp.max_cores * sclp_max) ?: nr_cpu_ids;
1002         possible = setup_possible_cpus ?: nr_cpu_ids;
1003         possible = min(possible, sclp_max);
1004         for (cpu = 0; cpu < possible && cpu < nr_cpu_ids; cpu++)
1005                 set_cpu_possible(cpu, true);
1006 }
1007
1008 void __init smp_prepare_cpus(unsigned int max_cpus)
1009 {
1010         /* request the 0x1201 emergency signal external interrupt */
1011         if (register_external_irq(EXT_IRQ_EMERGENCY_SIG, do_ext_call_interrupt))
1012                 panic("Couldn't request external interrupt 0x1201");
1013         /* request the 0x1202 external call external interrupt */
1014         if (register_external_irq(EXT_IRQ_EXTERNAL_CALL, do_ext_call_interrupt))
1015                 panic("Couldn't request external interrupt 0x1202");
1016 }
1017
1018 void __init smp_prepare_boot_cpu(void)
1019 {
1020         struct pcpu *pcpu = pcpu_devices;
1021
1022         WARN_ON(!cpu_present(0) || !cpu_online(0));
1023         pcpu->state = CPU_STATE_CONFIGURED;
1024         S390_lowcore.percpu_offset = __per_cpu_offset[0];
1025         smp_cpu_set_polarization(0, POLARIZATION_UNKNOWN);
1026 }
1027
1028 void __init smp_setup_processor_id(void)
1029 {
1030         pcpu_devices[0].address = stap();
1031         S390_lowcore.cpu_nr = 0;
1032         S390_lowcore.spinlock_lockval = arch_spin_lockval(0);
1033         S390_lowcore.spinlock_index = 0;
1034 }
1035
1036 /*
1037  * the frequency of the profiling timer can be changed
1038  * by writing a multiplier value into /proc/profile.
1039  *
1040  * usually you want to run this on all CPUs ;)
1041  */
1042 int setup_profiling_timer(unsigned int multiplier)
1043 {
1044         return 0;
1045 }
1046
1047 static ssize_t cpu_configure_show(struct device *dev,
1048                                   struct device_attribute *attr, char *buf)
1049 {
1050         ssize_t count;
1051
1052         mutex_lock(&smp_cpu_state_mutex);
1053         count = sprintf(buf, "%d\n", pcpu_devices[dev->id].state);
1054         mutex_unlock(&smp_cpu_state_mutex);
1055         return count;
1056 }
1057
1058 static ssize_t cpu_configure_store(struct device *dev,
1059                                    struct device_attribute *attr,
1060                                    const char *buf, size_t count)
1061 {
1062         struct pcpu *pcpu;
1063         int cpu, val, rc, i;
1064         char delim;
1065
1066         if (sscanf(buf, "%d %c", &val, &delim) != 1)
1067                 return -EINVAL;
1068         if (val != 0 && val != 1)
1069                 return -EINVAL;
1070         cpus_read_lock();
1071         mutex_lock(&smp_cpu_state_mutex);
1072         rc = -EBUSY;
1073         /* disallow configuration changes of online cpus and cpu 0 */
1074         cpu = dev->id;
1075         cpu = smp_get_base_cpu(cpu);
1076         if (cpu == 0)
1077                 goto out;
1078         for (i = 0; i <= smp_cpu_mtid; i++)
1079                 if (cpu_online(cpu + i))
1080                         goto out;
1081         pcpu = pcpu_devices + cpu;
1082         rc = 0;
1083         switch (val) {
1084         case 0:
1085                 if (pcpu->state != CPU_STATE_CONFIGURED)
1086                         break;
1087                 rc = sclp_core_deconfigure(pcpu->address >> smp_cpu_mt_shift);
1088                 if (rc)
1089                         break;
1090                 for (i = 0; i <= smp_cpu_mtid; i++) {
1091                         if (cpu + i >= nr_cpu_ids || !cpu_present(cpu + i))
1092                                 continue;
1093                         pcpu[i].state = CPU_STATE_STANDBY;
1094                         smp_cpu_set_polarization(cpu + i,
1095                                                  POLARIZATION_UNKNOWN);
1096                 }
1097                 topology_expect_change();
1098                 break;
1099         case 1:
1100                 if (pcpu->state != CPU_STATE_STANDBY)
1101                         break;
1102                 rc = sclp_core_configure(pcpu->address >> smp_cpu_mt_shift);
1103                 if (rc)
1104                         break;
1105                 for (i = 0; i <= smp_cpu_mtid; i++) {
1106                         if (cpu + i >= nr_cpu_ids || !cpu_present(cpu + i))
1107                                 continue;
1108                         pcpu[i].state = CPU_STATE_CONFIGURED;
1109                         smp_cpu_set_polarization(cpu + i,
1110                                                  POLARIZATION_UNKNOWN);
1111                 }
1112                 topology_expect_change();
1113                 break;
1114         default:
1115                 break;
1116         }
1117 out:
1118         mutex_unlock(&smp_cpu_state_mutex);
1119         cpus_read_unlock();
1120         return rc ? rc : count;
1121 }
1122 static DEVICE_ATTR(configure, 0644, cpu_configure_show, cpu_configure_store);
1123
1124 static ssize_t show_cpu_address(struct device *dev,
1125                                 struct device_attribute *attr, char *buf)
1126 {
1127         return sprintf(buf, "%d\n", pcpu_devices[dev->id].address);
1128 }
1129 static DEVICE_ATTR(address, 0444, show_cpu_address, NULL);
1130
1131 static struct attribute *cpu_common_attrs[] = {
1132         &dev_attr_configure.attr,
1133         &dev_attr_address.attr,
1134         NULL,
1135 };
1136
1137 static struct attribute_group cpu_common_attr_group = {
1138         .attrs = cpu_common_attrs,
1139 };
1140
1141 static struct attribute *cpu_online_attrs[] = {
1142         &dev_attr_idle_count.attr,
1143         &dev_attr_idle_time_us.attr,
1144         NULL,
1145 };
1146
1147 static struct attribute_group cpu_online_attr_group = {
1148         .attrs = cpu_online_attrs,
1149 };
1150
1151 static int smp_cpu_online(unsigned int cpu)
1152 {
1153         struct device *s = &per_cpu(cpu_device, cpu)->dev;
1154
1155         return sysfs_create_group(&s->kobj, &cpu_online_attr_group);
1156 }
1157
1158 static int smp_cpu_pre_down(unsigned int cpu)
1159 {
1160         struct device *s = &per_cpu(cpu_device, cpu)->dev;
1161
1162         sysfs_remove_group(&s->kobj, &cpu_online_attr_group);
1163         return 0;
1164 }
1165
1166 static int smp_add_present_cpu(int cpu)
1167 {
1168         struct device *s;
1169         struct cpu *c;
1170         int rc;
1171
1172         c = kzalloc(sizeof(*c), GFP_KERNEL);
1173         if (!c)
1174                 return -ENOMEM;
1175         per_cpu(cpu_device, cpu) = c;
1176         s = &c->dev;
1177         c->hotpluggable = 1;
1178         rc = register_cpu(c, cpu);
1179         if (rc)
1180                 goto out;
1181         rc = sysfs_create_group(&s->kobj, &cpu_common_attr_group);
1182         if (rc)
1183                 goto out_cpu;
1184         rc = topology_cpu_init(c);
1185         if (rc)
1186                 goto out_topology;
1187         return 0;
1188
1189 out_topology:
1190         sysfs_remove_group(&s->kobj, &cpu_common_attr_group);
1191 out_cpu:
1192         unregister_cpu(c);
1193 out:
1194         return rc;
1195 }
1196
1197 int __ref smp_rescan_cpus(void)
1198 {
1199         struct sclp_core_info *info;
1200         int nr;
1201
1202         info = kzalloc(sizeof(*info), GFP_KERNEL);
1203         if (!info)
1204                 return -ENOMEM;
1205         smp_get_core_info(info, 0);
1206         nr = __smp_rescan_cpus(info, false);
1207         kfree(info);
1208         if (nr)
1209                 topology_schedule_update();
1210         return 0;
1211 }
1212
1213 static ssize_t __ref rescan_store(struct device *dev,
1214                                   struct device_attribute *attr,
1215                                   const char *buf,
1216                                   size_t count)
1217 {
1218         int rc;
1219
1220         rc = lock_device_hotplug_sysfs();
1221         if (rc)
1222                 return rc;
1223         rc = smp_rescan_cpus();
1224         unlock_device_hotplug();
1225         return rc ? rc : count;
1226 }
1227 static DEVICE_ATTR_WO(rescan);
1228
1229 static int __init s390_smp_init(void)
1230 {
1231         int cpu, rc = 0;
1232
1233         rc = device_create_file(cpu_subsys.dev_root, &dev_attr_rescan);
1234         if (rc)
1235                 return rc;
1236         for_each_present_cpu(cpu) {
1237                 rc = smp_add_present_cpu(cpu);
1238                 if (rc)
1239                         goto out;
1240         }
1241
1242         rc = cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "s390/smp:online",
1243                                smp_cpu_online, smp_cpu_pre_down);
1244         rc = rc <= 0 ? rc : 0;
1245 out:
1246         return rc;
1247 }
1248 subsys_initcall(s390_smp_init);
1249
1250 static __always_inline void set_new_lowcore(struct lowcore *lc)
1251 {
1252         union register_pair dst, src;
1253         u32 pfx;
1254
1255         src.even = (unsigned long) &S390_lowcore;
1256         src.odd  = sizeof(S390_lowcore);
1257         dst.even = (unsigned long) lc;
1258         dst.odd  = sizeof(*lc);
1259         pfx = __pa(lc);
1260
1261         asm volatile(
1262                 "       mvcl    %[dst],%[src]\n"
1263                 "       spx     %[pfx]\n"
1264                 : [dst] "+&d" (dst.pair), [src] "+&d" (src.pair)
1265                 : [pfx] "Q" (pfx)
1266                 : "memory", "cc");
1267 }
1268
1269 int __init smp_reinit_ipl_cpu(void)
1270 {
1271         unsigned long async_stack, nodat_stack, mcck_stack;
1272         struct lowcore *lc, *lc_ipl;
1273         unsigned long flags, cr0;
1274         u64 mcesad;
1275
1276         lc_ipl = lowcore_ptr[0];
1277         lc = (struct lowcore *) __get_free_pages(GFP_KERNEL | GFP_DMA, LC_ORDER);
1278         nodat_stack = __get_free_pages(GFP_KERNEL, THREAD_SIZE_ORDER);
1279         async_stack = stack_alloc();
1280         mcck_stack = stack_alloc();
1281         if (!lc || !nodat_stack || !async_stack || !mcck_stack || nmi_alloc_mcesa(&mcesad))
1282                 panic("Couldn't allocate memory");
1283
1284         local_irq_save(flags);
1285         local_mcck_disable();
1286         set_new_lowcore(lc);
1287         S390_lowcore.nodat_stack = nodat_stack + STACK_INIT_OFFSET;
1288         S390_lowcore.async_stack = async_stack + STACK_INIT_OFFSET;
1289         S390_lowcore.mcck_stack = mcck_stack + STACK_INIT_OFFSET;
1290         __ctl_store(cr0, 0, 0);
1291         __ctl_clear_bit(0, 28); /* disable lowcore protection */
1292         S390_lowcore.mcesad = mcesad;
1293         __ctl_load(cr0, 0, 0);
1294         if (abs_lowcore_map(0, lc, false))
1295                 panic("Couldn't remap absolute lowcore");
1296         lowcore_ptr[0] = lc;
1297         local_mcck_enable();
1298         local_irq_restore(flags);
1299
1300         free_pages(lc_ipl->async_stack - STACK_INIT_OFFSET, THREAD_SIZE_ORDER);
1301         memblock_free_late(__pa(lc_ipl->mcck_stack - STACK_INIT_OFFSET), THREAD_SIZE);
1302         memblock_free_late(__pa(lc_ipl), sizeof(*lc_ipl));
1303
1304         return 0;
1305 }