2 * Copyright (c) 2014 Realtek Semiconductor Corp. All rights reserved.
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * version 2 as published by the Free Software Foundation.
10 #include <linux/signal.h>
11 #include <linux/slab.h>
12 #include <linux/module.h>
13 #include <linux/netdevice.h>
14 #include <linux/etherdevice.h>
15 #include <linux/mii.h>
16 #include <linux/ethtool.h>
17 #include <linux/usb.h>
18 #include <linux/crc32.h>
19 #include <linux/if_vlan.h>
20 #include <linux/uaccess.h>
21 #include <linux/list.h>
23 #include <linux/ipv6.h>
24 #include <net/ip6_checksum.h>
25 #include <uapi/linux/mdio.h>
26 #include <linux/mdio.h>
27 #include <linux/usb/cdc.h>
28 #include <linux/suspend.h>
30 /* Information for net-next */
31 #define NETNEXT_VERSION "08"
33 /* Information for net */
34 #define NET_VERSION "3"
36 #define DRIVER_VERSION "v1." NETNEXT_VERSION "." NET_VERSION
37 #define DRIVER_AUTHOR "Realtek linux nic maintainers <nic_swsd@realtek.com>"
38 #define DRIVER_DESC "Realtek RTL8152/RTL8153 Based USB Ethernet Adapters"
39 #define MODULENAME "r8152"
41 #define R8152_PHY_ID 32
43 #define PLA_IDR 0xc000
44 #define PLA_RCR 0xc010
45 #define PLA_RMS 0xc016
46 #define PLA_RXFIFO_CTRL0 0xc0a0
47 #define PLA_RXFIFO_CTRL1 0xc0a4
48 #define PLA_RXFIFO_CTRL2 0xc0a8
49 #define PLA_DMY_REG0 0xc0b0
50 #define PLA_FMC 0xc0b4
51 #define PLA_CFG_WOL 0xc0b6
52 #define PLA_TEREDO_CFG 0xc0bc
53 #define PLA_MAR 0xcd00
54 #define PLA_BACKUP 0xd000
55 #define PAL_BDC_CR 0xd1a0
56 #define PLA_TEREDO_TIMER 0xd2cc
57 #define PLA_REALWOW_TIMER 0xd2e8
58 #define PLA_LEDSEL 0xdd90
59 #define PLA_LED_FEATURE 0xdd92
60 #define PLA_PHYAR 0xde00
61 #define PLA_BOOT_CTRL 0xe004
62 #define PLA_GPHY_INTR_IMR 0xe022
63 #define PLA_EEE_CR 0xe040
64 #define PLA_EEEP_CR 0xe080
65 #define PLA_MAC_PWR_CTRL 0xe0c0
66 #define PLA_MAC_PWR_CTRL2 0xe0ca
67 #define PLA_MAC_PWR_CTRL3 0xe0cc
68 #define PLA_MAC_PWR_CTRL4 0xe0ce
69 #define PLA_WDT6_CTRL 0xe428
70 #define PLA_TCR0 0xe610
71 #define PLA_TCR1 0xe612
72 #define PLA_MTPS 0xe615
73 #define PLA_TXFIFO_CTRL 0xe618
74 #define PLA_RSTTALLY 0xe800
76 #define PLA_CRWECR 0xe81c
77 #define PLA_CONFIG12 0xe81e /* CONFIG1, CONFIG2 */
78 #define PLA_CONFIG34 0xe820 /* CONFIG3, CONFIG4 */
79 #define PLA_CONFIG5 0xe822
80 #define PLA_PHY_PWR 0xe84c
81 #define PLA_OOB_CTRL 0xe84f
82 #define PLA_CPCR 0xe854
83 #define PLA_MISC_0 0xe858
84 #define PLA_MISC_1 0xe85a
85 #define PLA_OCP_GPHY_BASE 0xe86c
86 #define PLA_TALLYCNT 0xe890
87 #define PLA_SFF_STS_7 0xe8de
88 #define PLA_PHYSTATUS 0xe908
89 #define PLA_BP_BA 0xfc26
90 #define PLA_BP_0 0xfc28
91 #define PLA_BP_1 0xfc2a
92 #define PLA_BP_2 0xfc2c
93 #define PLA_BP_3 0xfc2e
94 #define PLA_BP_4 0xfc30
95 #define PLA_BP_5 0xfc32
96 #define PLA_BP_6 0xfc34
97 #define PLA_BP_7 0xfc36
98 #define PLA_BP_EN 0xfc38
100 #define USB_USB2PHY 0xb41e
101 #define USB_SSPHYLINK2 0xb428
102 #define USB_U2P3_CTRL 0xb460
103 #define USB_CSR_DUMMY1 0xb464
104 #define USB_CSR_DUMMY2 0xb466
105 #define USB_DEV_STAT 0xb808
106 #define USB_CONNECT_TIMER 0xcbf8
107 #define USB_BURST_SIZE 0xcfc0
108 #define USB_USB_CTRL 0xd406
109 #define USB_PHY_CTRL 0xd408
110 #define USB_TX_AGG 0xd40a
111 #define USB_RX_BUF_TH 0xd40c
112 #define USB_USB_TIMER 0xd428
113 #define USB_RX_EARLY_TIMEOUT 0xd42c
114 #define USB_RX_EARLY_SIZE 0xd42e
115 #define USB_PM_CTRL_STATUS 0xd432
116 #define USB_TX_DMA 0xd434
117 #define USB_TOLERANCE 0xd490
118 #define USB_LPM_CTRL 0xd41a
119 #define USB_UPS_CTRL 0xd800
120 #define USB_MISC_0 0xd81a
121 #define USB_POWER_CUT 0xd80a
122 #define USB_AFE_CTRL2 0xd824
123 #define USB_WDT11_CTRL 0xe43c
124 #define USB_BP_BA 0xfc26
125 #define USB_BP_0 0xfc28
126 #define USB_BP_1 0xfc2a
127 #define USB_BP_2 0xfc2c
128 #define USB_BP_3 0xfc2e
129 #define USB_BP_4 0xfc30
130 #define USB_BP_5 0xfc32
131 #define USB_BP_6 0xfc34
132 #define USB_BP_7 0xfc36
133 #define USB_BP_EN 0xfc38
136 #define OCP_ALDPS_CONFIG 0x2010
137 #define OCP_EEE_CONFIG1 0x2080
138 #define OCP_EEE_CONFIG2 0x2092
139 #define OCP_EEE_CONFIG3 0x2094
140 #define OCP_BASE_MII 0xa400
141 #define OCP_EEE_AR 0xa41a
142 #define OCP_EEE_DATA 0xa41c
143 #define OCP_PHY_STATUS 0xa420
144 #define OCP_POWER_CFG 0xa430
145 #define OCP_EEE_CFG 0xa432
146 #define OCP_SRAM_ADDR 0xa436
147 #define OCP_SRAM_DATA 0xa438
148 #define OCP_DOWN_SPEED 0xa442
149 #define OCP_EEE_ABLE 0xa5c4
150 #define OCP_EEE_ADV 0xa5d0
151 #define OCP_EEE_LPABLE 0xa5d2
152 #define OCP_PHY_STATE 0xa708 /* nway state for 8153 */
153 #define OCP_ADC_CFG 0xbc06
156 #define SRAM_LPF_CFG 0x8012
157 #define SRAM_10M_AMP1 0x8080
158 #define SRAM_10M_AMP2 0x8082
159 #define SRAM_IMPEDANCE 0x8084
162 #define RCR_AAP 0x00000001
163 #define RCR_APM 0x00000002
164 #define RCR_AM 0x00000004
165 #define RCR_AB 0x00000008
166 #define RCR_ACPT_ALL (RCR_AAP | RCR_APM | RCR_AM | RCR_AB)
168 /* PLA_RXFIFO_CTRL0 */
169 #define RXFIFO_THR1_NORMAL 0x00080002
170 #define RXFIFO_THR1_OOB 0x01800003
172 /* PLA_RXFIFO_CTRL1 */
173 #define RXFIFO_THR2_FULL 0x00000060
174 #define RXFIFO_THR2_HIGH 0x00000038
175 #define RXFIFO_THR2_OOB 0x0000004a
176 #define RXFIFO_THR2_NORMAL 0x00a0
178 /* PLA_RXFIFO_CTRL2 */
179 #define RXFIFO_THR3_FULL 0x00000078
180 #define RXFIFO_THR3_HIGH 0x00000048
181 #define RXFIFO_THR3_OOB 0x0000005a
182 #define RXFIFO_THR3_NORMAL 0x0110
184 /* PLA_TXFIFO_CTRL */
185 #define TXFIFO_THR_NORMAL 0x00400008
186 #define TXFIFO_THR_NORMAL2 0x01000008
189 #define ECM_ALDPS 0x0002
192 #define FMC_FCR_MCU_EN 0x0001
195 #define EEEP_CR_EEEP_TX 0x0002
198 #define WDT6_SET_MODE 0x0010
201 #define TCR0_TX_EMPTY 0x0800
202 #define TCR0_AUTO_FIFO 0x0080
205 #define VERSION_MASK 0x7cf0
208 #define MTPS_JUMBO (12 * 1024 / 64)
209 #define MTPS_DEFAULT (6 * 1024 / 64)
212 #define TALLY_RESET 0x0001
220 #define CRWECR_NORAML 0x00
221 #define CRWECR_CONFIG 0xc0
224 #define NOW_IS_OOB 0x80
225 #define TXFIFO_EMPTY 0x20
226 #define RXFIFO_EMPTY 0x10
227 #define LINK_LIST_READY 0x02
228 #define DIS_MCU_CLROOB 0x01
229 #define FIFO_EMPTY (TXFIFO_EMPTY | RXFIFO_EMPTY)
232 #define RXDY_GATED_EN 0x0008
235 #define RE_INIT_LL 0x8000
236 #define MCU_BORW_EN 0x4000
239 #define CPCR_RX_VLAN 0x0040
242 #define MAGIC_EN 0x0001
245 #define TEREDO_SEL 0x8000
246 #define TEREDO_WAKE_MASK 0x7f00
247 #define TEREDO_RS_EVENT_MASK 0x00fe
248 #define OOB_TEREDO_EN 0x0001
251 #define ALDPS_PROXY_MODE 0x0001
254 #define LINK_ON_WAKE_EN 0x0010
255 #define LINK_OFF_WAKE_EN 0x0008
258 #define BWF_EN 0x0040
259 #define MWF_EN 0x0020
260 #define UWF_EN 0x0010
261 #define LAN_WAKE_EN 0x0002
263 /* PLA_LED_FEATURE */
264 #define LED_MODE_MASK 0x0700
267 #define TX_10M_IDLE_EN 0x0080
268 #define PFM_PWM_SWITCH 0x0040
270 /* PLA_MAC_PWR_CTRL */
271 #define D3_CLK_GATED_EN 0x00004000
272 #define MCU_CLK_RATIO 0x07010f07
273 #define MCU_CLK_RATIO_MASK 0x0f0f0f0f
274 #define ALDPS_SPDWN_RATIO 0x0f87
276 /* PLA_MAC_PWR_CTRL2 */
277 #define EEE_SPDWN_RATIO 0x8007
279 /* PLA_MAC_PWR_CTRL3 */
280 #define PKT_AVAIL_SPDWN_EN 0x0100
281 #define SUSPEND_SPDWN_EN 0x0004
282 #define U1U2_SPDWN_EN 0x0002
283 #define L1_SPDWN_EN 0x0001
285 /* PLA_MAC_PWR_CTRL4 */
286 #define PWRSAVE_SPDWN_EN 0x1000
287 #define RXDV_SPDWN_EN 0x0800
288 #define TX10MIDLE_EN 0x0100
289 #define TP100_SPDWN_EN 0x0020
290 #define TP500_SPDWN_EN 0x0010
291 #define TP1000_SPDWN_EN 0x0008
292 #define EEE_SPDWN_EN 0x0001
294 /* PLA_GPHY_INTR_IMR */
295 #define GPHY_STS_MSK 0x0001
296 #define SPEED_DOWN_MSK 0x0002
297 #define SPDWN_RXDV_MSK 0x0004
298 #define SPDWN_LINKCHG_MSK 0x0008
301 #define PHYAR_FLAG 0x80000000
304 #define EEE_RX_EN 0x0001
305 #define EEE_TX_EN 0x0002
308 #define AUTOLOAD_DONE 0x0002
311 #define USB2PHY_SUSPEND 0x0001
312 #define USB2PHY_L1 0x0002
315 #define pwd_dn_scale_mask 0x3ffe
316 #define pwd_dn_scale(x) ((x) << 1)
319 #define DYNAMIC_BURST 0x0001
322 #define EP4_FULL_FC 0x0001
325 #define STAT_SPEED_MASK 0x0006
326 #define STAT_SPEED_HIGH 0x0000
327 #define STAT_SPEED_FULL 0x0002
330 #define TX_AGG_MAX_THRESHOLD 0x03
333 #define RX_THR_SUPPER 0x0c350180
334 #define RX_THR_HIGH 0x7a120180
335 #define RX_THR_SLOW 0xffff0180
338 #define TEST_MODE_DISABLE 0x00000001
339 #define TX_SIZE_ADJUST1 0x00000100
342 #define POWER_CUT 0x0100
344 /* USB_PM_CTRL_STATUS */
345 #define RESUME_INDICATE 0x0001
348 #define RX_AGG_DISABLE 0x0010
349 #define RX_ZERO_EN 0x0080
352 #define U2P3_ENABLE 0x0001
355 #define PWR_EN 0x0001
356 #define PHASE2_EN 0x0008
359 #define PCUT_STATUS 0x0001
361 /* USB_RX_EARLY_TIMEOUT */
362 #define COALESCE_SUPER 85000U
363 #define COALESCE_HIGH 250000U
364 #define COALESCE_SLOW 524280U
367 #define TIMER11_EN 0x0001
370 /* bit 4 ~ 5: fifo empty boundary */
371 #define FIFO_EMPTY_1FB 0x30 /* 0x1fb * 64 = 32448 bytes */
372 /* bit 2 ~ 3: LMP timer */
373 #define LPM_TIMER_MASK 0x0c
374 #define LPM_TIMER_500MS 0x04 /* 500 ms */
375 #define LPM_TIMER_500US 0x0c /* 500 us */
376 #define ROK_EXIT_LPM 0x02
379 #define SEN_VAL_MASK 0xf800
380 #define SEN_VAL_NORMAL 0xa000
381 #define SEL_RXIDLE 0x0100
383 /* OCP_ALDPS_CONFIG */
384 #define ENPWRSAVE 0x8000
385 #define ENPDNPS 0x0200
386 #define LINKENA 0x0100
387 #define DIS_SDSAVE 0x0010
390 #define PHY_STAT_MASK 0x0007
391 #define PHY_STAT_LAN_ON 3
392 #define PHY_STAT_PWRDN 5
395 #define EEE_CLKDIV_EN 0x8000
396 #define EN_ALDPS 0x0004
397 #define EN_10M_PLLOFF 0x0001
399 /* OCP_EEE_CONFIG1 */
400 #define RG_TXLPI_MSK_HFDUP 0x8000
401 #define RG_MATCLR_EN 0x4000
402 #define EEE_10_CAP 0x2000
403 #define EEE_NWAY_EN 0x1000
404 #define TX_QUIET_EN 0x0200
405 #define RX_QUIET_EN 0x0100
406 #define sd_rise_time_mask 0x0070
407 #define sd_rise_time(x) (min(x, 7) << 4) /* bit 4 ~ 6 */
408 #define RG_RXLPI_MSK_HFDUP 0x0008
409 #define SDFALLTIME 0x0007 /* bit 0 ~ 2 */
411 /* OCP_EEE_CONFIG2 */
412 #define RG_LPIHYS_NUM 0x7000 /* bit 12 ~ 15 */
413 #define RG_DACQUIET_EN 0x0400
414 #define RG_LDVQUIET_EN 0x0200
415 #define RG_CKRSEL 0x0020
416 #define RG_EEEPRG_EN 0x0010
418 /* OCP_EEE_CONFIG3 */
419 #define fast_snr_mask 0xff80
420 #define fast_snr(x) (min(x, 0x1ff) << 7) /* bit 7 ~ 15 */
421 #define RG_LFS_SEL 0x0060 /* bit 6 ~ 5 */
422 #define MSK_PH 0x0006 /* bit 0 ~ 3 */
425 /* bit[15:14] function */
426 #define FUN_ADDR 0x0000
427 #define FUN_DATA 0x4000
428 /* bit[4:0] device addr */
431 #define CTAP_SHORT_EN 0x0040
432 #define EEE10_EN 0x0010
435 #define EN_10M_BGOFF 0x0080
438 #define TXDIS_STATE 0x01
439 #define ABD_STATE 0x02
442 #define CKADSEL_L 0x0100
443 #define ADC_EN 0x0080
444 #define EN_EMI_L 0x0040
447 #define LPF_AUTO_TUNE 0x8000
450 #define GDAC_IB_UPALL 0x0008
453 #define AMP_DN 0x0200
456 #define RX_DRIVING_MASK 0x6000
458 enum rtl_register_content {
466 #define RTL8152_MAX_TX 4
467 #define RTL8152_MAX_RX 10
473 #define INTR_LINK 0x0004
475 #define RTL8152_REQT_READ 0xc0
476 #define RTL8152_REQT_WRITE 0x40
477 #define RTL8152_REQ_GET_REGS 0x05
478 #define RTL8152_REQ_SET_REGS 0x05
480 #define BYTE_EN_DWORD 0xff
481 #define BYTE_EN_WORD 0x33
482 #define BYTE_EN_BYTE 0x11
483 #define BYTE_EN_SIX_BYTES 0x3f
484 #define BYTE_EN_START_MASK 0x0f
485 #define BYTE_EN_END_MASK 0xf0
487 #define RTL8153_MAX_PACKET 9216 /* 9K */
488 #define RTL8153_MAX_MTU (RTL8153_MAX_PACKET - VLAN_ETH_HLEN - VLAN_HLEN)
489 #define RTL8152_RMS (VLAN_ETH_FRAME_LEN + VLAN_HLEN)
490 #define RTL8153_RMS RTL8153_MAX_PACKET
491 #define RTL8152_TX_TIMEOUT (5 * HZ)
492 #define RTL8152_NAPI_WEIGHT 64
505 /* Define these values to match your device */
506 #define VENDOR_ID_REALTEK 0x0bda
507 #define VENDOR_ID_SAMSUNG 0x04e8
508 #define VENDOR_ID_LENOVO 0x17ef
509 #define VENDOR_ID_LINKSYS 0x13b1
510 #define VENDOR_ID_NVIDIA 0x0955
512 #define MCU_TYPE_PLA 0x0100
513 #define MCU_TYPE_USB 0x0000
515 struct tally_counter {
522 __le32 tx_one_collision;
523 __le32 tx_multi_collision;
533 #define RX_LEN_MASK 0x7fff
536 #define RD_UDP_CS BIT(23)
537 #define RD_TCP_CS BIT(22)
538 #define RD_IPV6_CS BIT(20)
539 #define RD_IPV4_CS BIT(19)
542 #define IPF BIT(23) /* IP checksum fail */
543 #define UDPF BIT(22) /* UDP checksum fail */
544 #define TCPF BIT(21) /* TCP checksum fail */
545 #define RX_VLAN_TAG BIT(16)
554 #define TX_FS BIT(31) /* First segment of a packet */
555 #define TX_LS BIT(30) /* Final segment of a packet */
556 #define GTSENDV4 BIT(28)
557 #define GTSENDV6 BIT(27)
558 #define GTTCPHO_SHIFT 18
559 #define GTTCPHO_MAX 0x7fU
560 #define TX_LEN_MAX 0x3ffffU
563 #define UDP_CS BIT(31) /* Calculate UDP/IP checksum */
564 #define TCP_CS BIT(30) /* Calculate TCP/IP checksum */
565 #define IPV4_CS BIT(29) /* Calculate IPv4 checksum */
566 #define IPV6_CS BIT(28) /* Calculate IPv6 checksum */
568 #define MSS_MAX 0x7ffU
569 #define TCPHO_SHIFT 17
570 #define TCPHO_MAX 0x7ffU
571 #define TX_VLAN_TAG BIT(16)
577 struct list_head list;
579 struct r8152 *context;
585 struct list_head list;
587 struct r8152 *context;
596 struct usb_device *udev;
597 struct napi_struct napi;
598 struct usb_interface *intf;
599 struct net_device *netdev;
600 struct urb *intr_urb;
601 struct tx_agg tx_info[RTL8152_MAX_TX];
602 struct rx_agg rx_info[RTL8152_MAX_RX];
603 struct list_head rx_done, tx_free;
604 struct sk_buff_head tx_queue, rx_queue;
605 spinlock_t rx_lock, tx_lock;
606 struct delayed_work schedule;
607 struct mii_if_info mii;
608 struct mutex control; /* use for hw setting */
609 #ifdef CONFIG_PM_SLEEP
610 struct notifier_block pm_notifier;
614 void (*init)(struct r8152 *);
615 int (*enable)(struct r8152 *);
616 void (*disable)(struct r8152 *);
617 void (*up)(struct r8152 *);
618 void (*down)(struct r8152 *);
619 void (*unload)(struct r8152 *);
620 int (*eee_get)(struct r8152 *, struct ethtool_eee *);
621 int (*eee_set)(struct r8152 *, struct ethtool_eee *);
622 bool (*in_nway)(struct r8152 *);
652 /* Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
653 * The RTL chips use a 64 element hash table based on the Ethernet CRC.
655 static const int multicast_filter_limit = 32;
656 static unsigned int agg_buf_sz = 16384;
658 #define RTL_LIMITED_TSO_SIZE (agg_buf_sz - sizeof(struct tx_desc) - \
659 VLAN_ETH_HLEN - VLAN_HLEN)
662 int get_registers(struct r8152 *tp, u16 value, u16 index, u16 size, void *data)
667 tmp = kmalloc(size, GFP_KERNEL);
671 ret = usb_control_msg(tp->udev, usb_rcvctrlpipe(tp->udev, 0),
672 RTL8152_REQ_GET_REGS, RTL8152_REQT_READ,
673 value, index, tmp, size, 500);
675 memset(data, 0xff, size);
677 memcpy(data, tmp, size);
685 int set_registers(struct r8152 *tp, u16 value, u16 index, u16 size, void *data)
690 tmp = kmemdup(data, size, GFP_KERNEL);
694 ret = usb_control_msg(tp->udev, usb_sndctrlpipe(tp->udev, 0),
695 RTL8152_REQ_SET_REGS, RTL8152_REQT_WRITE,
696 value, index, tmp, size, 500);
703 static int generic_ocp_read(struct r8152 *tp, u16 index, u16 size,
704 void *data, u16 type)
709 if (test_bit(RTL8152_UNPLUG, &tp->flags))
712 /* both size and indix must be 4 bytes align */
713 if ((size & 3) || !size || (index & 3) || !data)
716 if ((u32)index + (u32)size > 0xffff)
721 ret = get_registers(tp, index, type, limit, data);
729 ret = get_registers(tp, index, type, size, data);
741 set_bit(RTL8152_UNPLUG, &tp->flags);
746 static int generic_ocp_write(struct r8152 *tp, u16 index, u16 byteen,
747 u16 size, void *data, u16 type)
750 u16 byteen_start, byteen_end, byen;
753 if (test_bit(RTL8152_UNPLUG, &tp->flags))
756 /* both size and indix must be 4 bytes align */
757 if ((size & 3) || !size || (index & 3) || !data)
760 if ((u32)index + (u32)size > 0xffff)
763 byteen_start = byteen & BYTE_EN_START_MASK;
764 byteen_end = byteen & BYTE_EN_END_MASK;
766 byen = byteen_start | (byteen_start << 4);
767 ret = set_registers(tp, index, type | byen, 4, data);
780 ret = set_registers(tp, index,
781 type | BYTE_EN_DWORD,
790 ret = set_registers(tp, index,
791 type | BYTE_EN_DWORD,
803 byen = byteen_end | (byteen_end >> 4);
804 ret = set_registers(tp, index, type | byen, 4, data);
811 set_bit(RTL8152_UNPLUG, &tp->flags);
817 int pla_ocp_read(struct r8152 *tp, u16 index, u16 size, void *data)
819 return generic_ocp_read(tp, index, size, data, MCU_TYPE_PLA);
823 int pla_ocp_write(struct r8152 *tp, u16 index, u16 byteen, u16 size, void *data)
825 return generic_ocp_write(tp, index, byteen, size, data, MCU_TYPE_PLA);
829 int usb_ocp_read(struct r8152 *tp, u16 index, u16 size, void *data)
831 return generic_ocp_read(tp, index, size, data, MCU_TYPE_USB);
835 int usb_ocp_write(struct r8152 *tp, u16 index, u16 byteen, u16 size, void *data)
837 return generic_ocp_write(tp, index, byteen, size, data, MCU_TYPE_USB);
840 static u32 ocp_read_dword(struct r8152 *tp, u16 type, u16 index)
844 generic_ocp_read(tp, index, sizeof(data), &data, type);
846 return __le32_to_cpu(data);
849 static void ocp_write_dword(struct r8152 *tp, u16 type, u16 index, u32 data)
851 __le32 tmp = __cpu_to_le32(data);
853 generic_ocp_write(tp, index, BYTE_EN_DWORD, sizeof(tmp), &tmp, type);
856 static u16 ocp_read_word(struct r8152 *tp, u16 type, u16 index)
860 u8 shift = index & 2;
864 generic_ocp_read(tp, index, sizeof(tmp), &tmp, type);
866 data = __le32_to_cpu(tmp);
867 data >>= (shift * 8);
873 static void ocp_write_word(struct r8152 *tp, u16 type, u16 index, u32 data)
877 u16 byen = BYTE_EN_WORD;
878 u8 shift = index & 2;
884 mask <<= (shift * 8);
885 data <<= (shift * 8);
889 tmp = __cpu_to_le32(data);
891 generic_ocp_write(tp, index, byen, sizeof(tmp), &tmp, type);
894 static u8 ocp_read_byte(struct r8152 *tp, u16 type, u16 index)
898 u8 shift = index & 3;
902 generic_ocp_read(tp, index, sizeof(tmp), &tmp, type);
904 data = __le32_to_cpu(tmp);
905 data >>= (shift * 8);
911 static void ocp_write_byte(struct r8152 *tp, u16 type, u16 index, u32 data)
915 u16 byen = BYTE_EN_BYTE;
916 u8 shift = index & 3;
922 mask <<= (shift * 8);
923 data <<= (shift * 8);
927 tmp = __cpu_to_le32(data);
929 generic_ocp_write(tp, index, byen, sizeof(tmp), &tmp, type);
932 static u16 ocp_reg_read(struct r8152 *tp, u16 addr)
934 u16 ocp_base, ocp_index;
936 ocp_base = addr & 0xf000;
937 if (ocp_base != tp->ocp_base) {
938 ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, ocp_base);
939 tp->ocp_base = ocp_base;
942 ocp_index = (addr & 0x0fff) | 0xb000;
943 return ocp_read_word(tp, MCU_TYPE_PLA, ocp_index);
946 static void ocp_reg_write(struct r8152 *tp, u16 addr, u16 data)
948 u16 ocp_base, ocp_index;
950 ocp_base = addr & 0xf000;
951 if (ocp_base != tp->ocp_base) {
952 ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, ocp_base);
953 tp->ocp_base = ocp_base;
956 ocp_index = (addr & 0x0fff) | 0xb000;
957 ocp_write_word(tp, MCU_TYPE_PLA, ocp_index, data);
960 static inline void r8152_mdio_write(struct r8152 *tp, u32 reg_addr, u32 value)
962 ocp_reg_write(tp, OCP_BASE_MII + reg_addr * 2, value);
965 static inline int r8152_mdio_read(struct r8152 *tp, u32 reg_addr)
967 return ocp_reg_read(tp, OCP_BASE_MII + reg_addr * 2);
970 static void sram_write(struct r8152 *tp, u16 addr, u16 data)
972 ocp_reg_write(tp, OCP_SRAM_ADDR, addr);
973 ocp_reg_write(tp, OCP_SRAM_DATA, data);
976 static int read_mii_word(struct net_device *netdev, int phy_id, int reg)
978 struct r8152 *tp = netdev_priv(netdev);
981 if (test_bit(RTL8152_UNPLUG, &tp->flags))
984 if (phy_id != R8152_PHY_ID)
987 ret = r8152_mdio_read(tp, reg);
993 void write_mii_word(struct net_device *netdev, int phy_id, int reg, int val)
995 struct r8152 *tp = netdev_priv(netdev);
997 if (test_bit(RTL8152_UNPLUG, &tp->flags))
1000 if (phy_id != R8152_PHY_ID)
1003 r8152_mdio_write(tp, reg, val);
1007 r8152_submit_rx(struct r8152 *tp, struct rx_agg *agg, gfp_t mem_flags);
1009 static int rtl8152_set_mac_address(struct net_device *netdev, void *p)
1011 struct r8152 *tp = netdev_priv(netdev);
1012 struct sockaddr *addr = p;
1013 int ret = -EADDRNOTAVAIL;
1015 if (!is_valid_ether_addr(addr->sa_data))
1018 ret = usb_autopm_get_interface(tp->intf);
1022 mutex_lock(&tp->control);
1024 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
1026 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
1027 pla_ocp_write(tp, PLA_IDR, BYTE_EN_SIX_BYTES, 8, addr->sa_data);
1028 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
1030 mutex_unlock(&tp->control);
1032 usb_autopm_put_interface(tp->intf);
1037 static int set_ethernet_addr(struct r8152 *tp)
1039 struct net_device *dev = tp->netdev;
1043 if (tp->version == RTL_VER_01)
1044 ret = pla_ocp_read(tp, PLA_IDR, 8, sa.sa_data);
1046 ret = pla_ocp_read(tp, PLA_BACKUP, 8, sa.sa_data);
1049 netif_err(tp, probe, dev, "Get ether addr fail\n");
1050 } else if (!is_valid_ether_addr(sa.sa_data)) {
1051 netif_err(tp, probe, dev, "Invalid ether addr %pM\n",
1053 eth_hw_addr_random(dev);
1054 ether_addr_copy(sa.sa_data, dev->dev_addr);
1055 ret = rtl8152_set_mac_address(dev, &sa);
1056 netif_info(tp, probe, dev, "Random ether addr %pM\n",
1059 if (tp->version == RTL_VER_01)
1060 ether_addr_copy(dev->dev_addr, sa.sa_data);
1062 ret = rtl8152_set_mac_address(dev, &sa);
1068 static void read_bulk_callback(struct urb *urb)
1070 struct net_device *netdev;
1071 int status = urb->status;
1083 if (test_bit(RTL8152_UNPLUG, &tp->flags))
1086 if (!test_bit(WORK_ENABLE, &tp->flags))
1089 netdev = tp->netdev;
1091 /* When link down, the driver would cancel all bulks. */
1092 /* This avoid the re-submitting bulk */
1093 if (!netif_carrier_ok(netdev))
1096 usb_mark_last_busy(tp->udev);
1100 if (urb->actual_length < ETH_ZLEN)
1103 spin_lock(&tp->rx_lock);
1104 list_add_tail(&agg->list, &tp->rx_done);
1105 spin_unlock(&tp->rx_lock);
1106 napi_schedule(&tp->napi);
1109 set_bit(RTL8152_UNPLUG, &tp->flags);
1110 netif_device_detach(tp->netdev);
1113 return; /* the urb is in unlink state */
1115 if (net_ratelimit())
1116 netdev_warn(netdev, "maybe reset is needed?\n");
1119 if (net_ratelimit())
1120 netdev_warn(netdev, "Rx status %d\n", status);
1124 r8152_submit_rx(tp, agg, GFP_ATOMIC);
1127 static void write_bulk_callback(struct urb *urb)
1129 struct net_device_stats *stats;
1130 struct net_device *netdev;
1133 int status = urb->status;
1143 netdev = tp->netdev;
1144 stats = &netdev->stats;
1146 if (net_ratelimit())
1147 netdev_warn(netdev, "Tx status %d\n", status);
1148 stats->tx_errors += agg->skb_num;
1150 stats->tx_packets += agg->skb_num;
1151 stats->tx_bytes += agg->skb_len;
1154 spin_lock(&tp->tx_lock);
1155 list_add_tail(&agg->list, &tp->tx_free);
1156 spin_unlock(&tp->tx_lock);
1158 usb_autopm_put_interface_async(tp->intf);
1160 if (!netif_carrier_ok(netdev))
1163 if (!test_bit(WORK_ENABLE, &tp->flags))
1166 if (test_bit(RTL8152_UNPLUG, &tp->flags))
1169 if (!skb_queue_empty(&tp->tx_queue))
1170 napi_schedule(&tp->napi);
1173 static void intr_callback(struct urb *urb)
1177 int status = urb->status;
1184 if (!test_bit(WORK_ENABLE, &tp->flags))
1187 if (test_bit(RTL8152_UNPLUG, &tp->flags))
1191 case 0: /* success */
1193 case -ECONNRESET: /* unlink */
1195 netif_device_detach(tp->netdev);
1198 netif_info(tp, intr, tp->netdev,
1199 "Stop submitting intr, status %d\n", status);
1202 netif_info(tp, intr, tp->netdev, "intr status -EOVERFLOW\n");
1204 /* -EPIPE: should clear the halt */
1206 netif_info(tp, intr, tp->netdev, "intr status %d\n", status);
1210 d = urb->transfer_buffer;
1211 if (INTR_LINK & __le16_to_cpu(d[0])) {
1212 if (!netif_carrier_ok(tp->netdev)) {
1213 set_bit(RTL8152_LINK_CHG, &tp->flags);
1214 schedule_delayed_work(&tp->schedule, 0);
1217 if (netif_carrier_ok(tp->netdev)) {
1218 netif_stop_queue(tp->netdev);
1219 set_bit(RTL8152_LINK_CHG, &tp->flags);
1220 schedule_delayed_work(&tp->schedule, 0);
1225 res = usb_submit_urb(urb, GFP_ATOMIC);
1226 if (res == -ENODEV) {
1227 set_bit(RTL8152_UNPLUG, &tp->flags);
1228 netif_device_detach(tp->netdev);
1230 netif_err(tp, intr, tp->netdev,
1231 "can't resubmit intr, status %d\n", res);
1235 static inline void *rx_agg_align(void *data)
1237 return (void *)ALIGN((uintptr_t)data, RX_ALIGN);
1240 static inline void *tx_agg_align(void *data)
1242 return (void *)ALIGN((uintptr_t)data, TX_ALIGN);
1245 static void free_all_mem(struct r8152 *tp)
1249 for (i = 0; i < RTL8152_MAX_RX; i++) {
1250 usb_free_urb(tp->rx_info[i].urb);
1251 tp->rx_info[i].urb = NULL;
1253 kfree(tp->rx_info[i].buffer);
1254 tp->rx_info[i].buffer = NULL;
1255 tp->rx_info[i].head = NULL;
1258 for (i = 0; i < RTL8152_MAX_TX; i++) {
1259 usb_free_urb(tp->tx_info[i].urb);
1260 tp->tx_info[i].urb = NULL;
1262 kfree(tp->tx_info[i].buffer);
1263 tp->tx_info[i].buffer = NULL;
1264 tp->tx_info[i].head = NULL;
1267 usb_free_urb(tp->intr_urb);
1268 tp->intr_urb = NULL;
1270 kfree(tp->intr_buff);
1271 tp->intr_buff = NULL;
1274 static int alloc_all_mem(struct r8152 *tp)
1276 struct net_device *netdev = tp->netdev;
1277 struct usb_interface *intf = tp->intf;
1278 struct usb_host_interface *alt = intf->cur_altsetting;
1279 struct usb_host_endpoint *ep_intr = alt->endpoint + 2;
1284 node = netdev->dev.parent ? dev_to_node(netdev->dev.parent) : -1;
1286 spin_lock_init(&tp->rx_lock);
1287 spin_lock_init(&tp->tx_lock);
1288 INIT_LIST_HEAD(&tp->tx_free);
1289 INIT_LIST_HEAD(&tp->rx_done);
1290 skb_queue_head_init(&tp->tx_queue);
1291 skb_queue_head_init(&tp->rx_queue);
1293 for (i = 0; i < RTL8152_MAX_RX; i++) {
1294 buf = kmalloc_node(agg_buf_sz, GFP_KERNEL, node);
1298 if (buf != rx_agg_align(buf)) {
1300 buf = kmalloc_node(agg_buf_sz + RX_ALIGN, GFP_KERNEL,
1306 urb = usb_alloc_urb(0, GFP_KERNEL);
1312 INIT_LIST_HEAD(&tp->rx_info[i].list);
1313 tp->rx_info[i].context = tp;
1314 tp->rx_info[i].urb = urb;
1315 tp->rx_info[i].buffer = buf;
1316 tp->rx_info[i].head = rx_agg_align(buf);
1319 for (i = 0; i < RTL8152_MAX_TX; i++) {
1320 buf = kmalloc_node(agg_buf_sz, GFP_KERNEL, node);
1324 if (buf != tx_agg_align(buf)) {
1326 buf = kmalloc_node(agg_buf_sz + TX_ALIGN, GFP_KERNEL,
1332 urb = usb_alloc_urb(0, GFP_KERNEL);
1338 INIT_LIST_HEAD(&tp->tx_info[i].list);
1339 tp->tx_info[i].context = tp;
1340 tp->tx_info[i].urb = urb;
1341 tp->tx_info[i].buffer = buf;
1342 tp->tx_info[i].head = tx_agg_align(buf);
1344 list_add_tail(&tp->tx_info[i].list, &tp->tx_free);
1347 tp->intr_urb = usb_alloc_urb(0, GFP_KERNEL);
1351 tp->intr_buff = kmalloc(INTBUFSIZE, GFP_KERNEL);
1355 tp->intr_interval = (int)ep_intr->desc.bInterval;
1356 usb_fill_int_urb(tp->intr_urb, tp->udev, usb_rcvintpipe(tp->udev, 3),
1357 tp->intr_buff, INTBUFSIZE, intr_callback,
1358 tp, tp->intr_interval);
1367 static struct tx_agg *r8152_get_tx_agg(struct r8152 *tp)
1369 struct tx_agg *agg = NULL;
1370 unsigned long flags;
1372 if (list_empty(&tp->tx_free))
1375 spin_lock_irqsave(&tp->tx_lock, flags);
1376 if (!list_empty(&tp->tx_free)) {
1377 struct list_head *cursor;
1379 cursor = tp->tx_free.next;
1380 list_del_init(cursor);
1381 agg = list_entry(cursor, struct tx_agg, list);
1383 spin_unlock_irqrestore(&tp->tx_lock, flags);
1388 /* r8152_csum_workaround()
1389 * The hw limites the value the transport offset. When the offset is out of the
1390 * range, calculate the checksum by sw.
1392 static void r8152_csum_workaround(struct r8152 *tp, struct sk_buff *skb,
1393 struct sk_buff_head *list)
1395 if (skb_shinfo(skb)->gso_size) {
1396 netdev_features_t features = tp->netdev->features;
1397 struct sk_buff_head seg_list;
1398 struct sk_buff *segs, *nskb;
1400 features &= ~(NETIF_F_SG | NETIF_F_IPV6_CSUM | NETIF_F_TSO6);
1401 segs = skb_gso_segment(skb, features);
1402 if (IS_ERR(segs) || !segs)
1405 __skb_queue_head_init(&seg_list);
1411 __skb_queue_tail(&seg_list, nskb);
1414 skb_queue_splice(&seg_list, list);
1416 } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
1417 if (skb_checksum_help(skb) < 0)
1420 __skb_queue_head(list, skb);
1422 struct net_device_stats *stats;
1425 stats = &tp->netdev->stats;
1426 stats->tx_dropped++;
1431 /* msdn_giant_send_check()
1432 * According to the document of microsoft, the TCP Pseudo Header excludes the
1433 * packet length for IPv6 TCP large packets.
1435 static int msdn_giant_send_check(struct sk_buff *skb)
1437 const struct ipv6hdr *ipv6h;
1441 ret = skb_cow_head(skb, 0);
1445 ipv6h = ipv6_hdr(skb);
1449 th->check = ~tcp_v6_check(0, &ipv6h->saddr, &ipv6h->daddr, 0);
1454 static inline void rtl_tx_vlan_tag(struct tx_desc *desc, struct sk_buff *skb)
1456 if (skb_vlan_tag_present(skb)) {
1459 opts2 = TX_VLAN_TAG | swab16(skb_vlan_tag_get(skb));
1460 desc->opts2 |= cpu_to_le32(opts2);
1464 static inline void rtl_rx_vlan_tag(struct rx_desc *desc, struct sk_buff *skb)
1466 u32 opts2 = le32_to_cpu(desc->opts2);
1468 if (opts2 & RX_VLAN_TAG)
1469 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
1470 swab16(opts2 & 0xffff));
1473 static int r8152_tx_csum(struct r8152 *tp, struct tx_desc *desc,
1474 struct sk_buff *skb, u32 len, u32 transport_offset)
1476 u32 mss = skb_shinfo(skb)->gso_size;
1477 u32 opts1, opts2 = 0;
1478 int ret = TX_CSUM_SUCCESS;
1480 WARN_ON_ONCE(len > TX_LEN_MAX);
1482 opts1 = len | TX_FS | TX_LS;
1485 if (transport_offset > GTTCPHO_MAX) {
1486 netif_warn(tp, tx_err, tp->netdev,
1487 "Invalid transport offset 0x%x for TSO\n",
1493 switch (vlan_get_protocol(skb)) {
1494 case htons(ETH_P_IP):
1498 case htons(ETH_P_IPV6):
1499 if (msdn_giant_send_check(skb)) {
1511 opts1 |= transport_offset << GTTCPHO_SHIFT;
1512 opts2 |= min(mss, MSS_MAX) << MSS_SHIFT;
1513 } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
1516 if (transport_offset > TCPHO_MAX) {
1517 netif_warn(tp, tx_err, tp->netdev,
1518 "Invalid transport offset 0x%x\n",
1524 switch (vlan_get_protocol(skb)) {
1525 case htons(ETH_P_IP):
1527 ip_protocol = ip_hdr(skb)->protocol;
1530 case htons(ETH_P_IPV6):
1532 ip_protocol = ipv6_hdr(skb)->nexthdr;
1536 ip_protocol = IPPROTO_RAW;
1540 if (ip_protocol == IPPROTO_TCP)
1542 else if (ip_protocol == IPPROTO_UDP)
1547 opts2 |= transport_offset << TCPHO_SHIFT;
1550 desc->opts2 = cpu_to_le32(opts2);
1551 desc->opts1 = cpu_to_le32(opts1);
1557 static int r8152_tx_agg_fill(struct r8152 *tp, struct tx_agg *agg)
1559 struct sk_buff_head skb_head, *tx_queue = &tp->tx_queue;
1563 __skb_queue_head_init(&skb_head);
1564 spin_lock(&tx_queue->lock);
1565 skb_queue_splice_init(tx_queue, &skb_head);
1566 spin_unlock(&tx_queue->lock);
1568 tx_data = agg->head;
1571 remain = agg_buf_sz;
1573 while (remain >= ETH_ZLEN + sizeof(struct tx_desc)) {
1574 struct tx_desc *tx_desc;
1575 struct sk_buff *skb;
1579 skb = __skb_dequeue(&skb_head);
1583 len = skb->len + sizeof(*tx_desc);
1586 __skb_queue_head(&skb_head, skb);
1590 tx_data = tx_agg_align(tx_data);
1591 tx_desc = (struct tx_desc *)tx_data;
1593 offset = (u32)skb_transport_offset(skb);
1595 if (r8152_tx_csum(tp, tx_desc, skb, skb->len, offset)) {
1596 r8152_csum_workaround(tp, skb, &skb_head);
1600 rtl_tx_vlan_tag(tx_desc, skb);
1602 tx_data += sizeof(*tx_desc);
1605 if (skb_copy_bits(skb, 0, tx_data, len) < 0) {
1606 struct net_device_stats *stats = &tp->netdev->stats;
1608 stats->tx_dropped++;
1609 dev_kfree_skb_any(skb);
1610 tx_data -= sizeof(*tx_desc);
1615 agg->skb_len += len;
1616 agg->skb_num += skb_shinfo(skb)->gso_segs ?: 1;
1618 dev_kfree_skb_any(skb);
1620 remain = agg_buf_sz - (int)(tx_agg_align(tx_data) - agg->head);
1623 if (!skb_queue_empty(&skb_head)) {
1624 spin_lock(&tx_queue->lock);
1625 skb_queue_splice(&skb_head, tx_queue);
1626 spin_unlock(&tx_queue->lock);
1629 netif_tx_lock(tp->netdev);
1631 if (netif_queue_stopped(tp->netdev) &&
1632 skb_queue_len(&tp->tx_queue) < tp->tx_qlen)
1633 netif_wake_queue(tp->netdev);
1635 netif_tx_unlock(tp->netdev);
1637 ret = usb_autopm_get_interface_async(tp->intf);
1641 usb_fill_bulk_urb(agg->urb, tp->udev, usb_sndbulkpipe(tp->udev, 2),
1642 agg->head, (int)(tx_data - (u8 *)agg->head),
1643 (usb_complete_t)write_bulk_callback, agg);
1645 ret = usb_submit_urb(agg->urb, GFP_ATOMIC);
1647 usb_autopm_put_interface_async(tp->intf);
1653 static u8 r8152_rx_csum(struct r8152 *tp, struct rx_desc *rx_desc)
1655 u8 checksum = CHECKSUM_NONE;
1658 if (!(tp->netdev->features & NETIF_F_RXCSUM))
1661 opts2 = le32_to_cpu(rx_desc->opts2);
1662 opts3 = le32_to_cpu(rx_desc->opts3);
1664 if (opts2 & RD_IPV4_CS) {
1666 checksum = CHECKSUM_NONE;
1667 else if ((opts2 & RD_UDP_CS) && (opts3 & UDPF))
1668 checksum = CHECKSUM_NONE;
1669 else if ((opts2 & RD_TCP_CS) && (opts3 & TCPF))
1670 checksum = CHECKSUM_NONE;
1672 checksum = CHECKSUM_UNNECESSARY;
1673 } else if (RD_IPV6_CS) {
1674 if ((opts2 & RD_UDP_CS) && !(opts3 & UDPF))
1675 checksum = CHECKSUM_UNNECESSARY;
1676 else if ((opts2 & RD_TCP_CS) && !(opts3 & TCPF))
1677 checksum = CHECKSUM_UNNECESSARY;
1684 static int rx_bottom(struct r8152 *tp, int budget)
1686 unsigned long flags;
1687 struct list_head *cursor, *next, rx_queue;
1688 int ret = 0, work_done = 0;
1690 if (!skb_queue_empty(&tp->rx_queue)) {
1691 while (work_done < budget) {
1692 struct sk_buff *skb = __skb_dequeue(&tp->rx_queue);
1693 struct net_device *netdev = tp->netdev;
1694 struct net_device_stats *stats = &netdev->stats;
1695 unsigned int pkt_len;
1701 napi_gro_receive(&tp->napi, skb);
1703 stats->rx_packets++;
1704 stats->rx_bytes += pkt_len;
1708 if (list_empty(&tp->rx_done))
1711 INIT_LIST_HEAD(&rx_queue);
1712 spin_lock_irqsave(&tp->rx_lock, flags);
1713 list_splice_init(&tp->rx_done, &rx_queue);
1714 spin_unlock_irqrestore(&tp->rx_lock, flags);
1716 list_for_each_safe(cursor, next, &rx_queue) {
1717 struct rx_desc *rx_desc;
1723 list_del_init(cursor);
1725 agg = list_entry(cursor, struct rx_agg, list);
1727 if (urb->actual_length < ETH_ZLEN)
1730 rx_desc = agg->head;
1731 rx_data = agg->head;
1732 len_used += sizeof(struct rx_desc);
1734 while (urb->actual_length > len_used) {
1735 struct net_device *netdev = tp->netdev;
1736 struct net_device_stats *stats = &netdev->stats;
1737 unsigned int pkt_len;
1738 struct sk_buff *skb;
1740 pkt_len = le32_to_cpu(rx_desc->opts1) & RX_LEN_MASK;
1741 if (pkt_len < ETH_ZLEN)
1744 len_used += pkt_len;
1745 if (urb->actual_length < len_used)
1748 pkt_len -= CRC_SIZE;
1749 rx_data += sizeof(struct rx_desc);
1751 skb = netdev_alloc_skb_ip_align(netdev, pkt_len);
1753 stats->rx_dropped++;
1757 skb->ip_summed = r8152_rx_csum(tp, rx_desc);
1758 memcpy(skb->data, rx_data, pkt_len);
1759 skb_put(skb, pkt_len);
1760 skb->protocol = eth_type_trans(skb, netdev);
1761 rtl_rx_vlan_tag(rx_desc, skb);
1762 if (work_done < budget) {
1763 napi_gro_receive(&tp->napi, skb);
1765 stats->rx_packets++;
1766 stats->rx_bytes += pkt_len;
1768 __skb_queue_tail(&tp->rx_queue, skb);
1772 rx_data = rx_agg_align(rx_data + pkt_len + CRC_SIZE);
1773 rx_desc = (struct rx_desc *)rx_data;
1774 len_used = (int)(rx_data - (u8 *)agg->head);
1775 len_used += sizeof(struct rx_desc);
1780 ret = r8152_submit_rx(tp, agg, GFP_ATOMIC);
1782 urb->actual_length = 0;
1783 list_add_tail(&agg->list, next);
1787 if (!list_empty(&rx_queue)) {
1788 spin_lock_irqsave(&tp->rx_lock, flags);
1789 list_splice_tail(&rx_queue, &tp->rx_done);
1790 spin_unlock_irqrestore(&tp->rx_lock, flags);
1797 static void tx_bottom(struct r8152 *tp)
1804 if (skb_queue_empty(&tp->tx_queue))
1807 agg = r8152_get_tx_agg(tp);
1811 res = r8152_tx_agg_fill(tp, agg);
1813 struct net_device *netdev = tp->netdev;
1815 if (res == -ENODEV) {
1816 set_bit(RTL8152_UNPLUG, &tp->flags);
1817 netif_device_detach(netdev);
1819 struct net_device_stats *stats = &netdev->stats;
1820 unsigned long flags;
1822 netif_warn(tp, tx_err, netdev,
1823 "failed tx_urb %d\n", res);
1824 stats->tx_dropped += agg->skb_num;
1826 spin_lock_irqsave(&tp->tx_lock, flags);
1827 list_add_tail(&agg->list, &tp->tx_free);
1828 spin_unlock_irqrestore(&tp->tx_lock, flags);
1834 static void bottom_half(struct r8152 *tp)
1836 if (test_bit(RTL8152_UNPLUG, &tp->flags))
1839 if (!test_bit(WORK_ENABLE, &tp->flags))
1842 /* When link down, the driver would cancel all bulks. */
1843 /* This avoid the re-submitting bulk */
1844 if (!netif_carrier_ok(tp->netdev))
1847 clear_bit(SCHEDULE_NAPI, &tp->flags);
1852 static int r8152_poll(struct napi_struct *napi, int budget)
1854 struct r8152 *tp = container_of(napi, struct r8152, napi);
1857 work_done = rx_bottom(tp, budget);
1860 if (work_done < budget) {
1861 napi_complete(napi);
1862 if (!list_empty(&tp->rx_done))
1863 napi_schedule(napi);
1864 else if (!skb_queue_empty(&tp->tx_queue) &&
1865 !list_empty(&tp->tx_free))
1866 napi_schedule(napi);
1873 int r8152_submit_rx(struct r8152 *tp, struct rx_agg *agg, gfp_t mem_flags)
1877 /* The rx would be stopped, so skip submitting */
1878 if (test_bit(RTL8152_UNPLUG, &tp->flags) ||
1879 !test_bit(WORK_ENABLE, &tp->flags) || !netif_carrier_ok(tp->netdev))
1882 usb_fill_bulk_urb(agg->urb, tp->udev, usb_rcvbulkpipe(tp->udev, 1),
1883 agg->head, agg_buf_sz,
1884 (usb_complete_t)read_bulk_callback, agg);
1886 ret = usb_submit_urb(agg->urb, mem_flags);
1887 if (ret == -ENODEV) {
1888 set_bit(RTL8152_UNPLUG, &tp->flags);
1889 netif_device_detach(tp->netdev);
1891 struct urb *urb = agg->urb;
1892 unsigned long flags;
1894 urb->actual_length = 0;
1895 spin_lock_irqsave(&tp->rx_lock, flags);
1896 list_add_tail(&agg->list, &tp->rx_done);
1897 spin_unlock_irqrestore(&tp->rx_lock, flags);
1899 netif_err(tp, rx_err, tp->netdev,
1900 "Couldn't submit rx[%p], ret = %d\n", agg, ret);
1902 napi_schedule(&tp->napi);
1908 static void rtl_drop_queued_tx(struct r8152 *tp)
1910 struct net_device_stats *stats = &tp->netdev->stats;
1911 struct sk_buff_head skb_head, *tx_queue = &tp->tx_queue;
1912 struct sk_buff *skb;
1914 if (skb_queue_empty(tx_queue))
1917 __skb_queue_head_init(&skb_head);
1918 spin_lock_bh(&tx_queue->lock);
1919 skb_queue_splice_init(tx_queue, &skb_head);
1920 spin_unlock_bh(&tx_queue->lock);
1922 while ((skb = __skb_dequeue(&skb_head))) {
1924 stats->tx_dropped++;
1928 static void rtl8152_tx_timeout(struct net_device *netdev)
1930 struct r8152 *tp = netdev_priv(netdev);
1932 netif_warn(tp, tx_err, netdev, "Tx timeout\n");
1934 usb_queue_reset_device(tp->intf);
1937 static void rtl8152_set_rx_mode(struct net_device *netdev)
1939 struct r8152 *tp = netdev_priv(netdev);
1941 if (netif_carrier_ok(netdev)) {
1942 set_bit(RTL8152_SET_RX_MODE, &tp->flags);
1943 schedule_delayed_work(&tp->schedule, 0);
1947 static void _rtl8152_set_rx_mode(struct net_device *netdev)
1949 struct r8152 *tp = netdev_priv(netdev);
1950 u32 mc_filter[2]; /* Multicast hash filter */
1954 netif_stop_queue(netdev);
1955 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
1956 ocp_data &= ~RCR_ACPT_ALL;
1957 ocp_data |= RCR_AB | RCR_APM;
1959 if (netdev->flags & IFF_PROMISC) {
1960 /* Unconditionally log net taps. */
1961 netif_notice(tp, link, netdev, "Promiscuous mode enabled\n");
1962 ocp_data |= RCR_AM | RCR_AAP;
1963 mc_filter[1] = 0xffffffff;
1964 mc_filter[0] = 0xffffffff;
1965 } else if ((netdev_mc_count(netdev) > multicast_filter_limit) ||
1966 (netdev->flags & IFF_ALLMULTI)) {
1967 /* Too many to filter perfectly -- accept all multicasts. */
1969 mc_filter[1] = 0xffffffff;
1970 mc_filter[0] = 0xffffffff;
1972 struct netdev_hw_addr *ha;
1976 netdev_for_each_mc_addr(ha, netdev) {
1977 int bit_nr = ether_crc(ETH_ALEN, ha->addr) >> 26;
1979 mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 31);
1984 tmp[0] = __cpu_to_le32(swab32(mc_filter[1]));
1985 tmp[1] = __cpu_to_le32(swab32(mc_filter[0]));
1987 pla_ocp_write(tp, PLA_MAR, BYTE_EN_DWORD, sizeof(tmp), tmp);
1988 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
1989 netif_wake_queue(netdev);
1992 static netdev_features_t
1993 rtl8152_features_check(struct sk_buff *skb, struct net_device *dev,
1994 netdev_features_t features)
1996 u32 mss = skb_shinfo(skb)->gso_size;
1997 int max_offset = mss ? GTTCPHO_MAX : TCPHO_MAX;
1998 int offset = skb_transport_offset(skb);
2000 if ((mss || skb->ip_summed == CHECKSUM_PARTIAL) && offset > max_offset)
2001 features &= ~(NETIF_F_ALL_CSUM | NETIF_F_GSO_MASK);
2002 else if ((skb->len + sizeof(struct tx_desc)) > agg_buf_sz)
2003 features &= ~NETIF_F_GSO_MASK;
2008 static netdev_tx_t rtl8152_start_xmit(struct sk_buff *skb,
2009 struct net_device *netdev)
2011 struct r8152 *tp = netdev_priv(netdev);
2013 skb_tx_timestamp(skb);
2015 skb_queue_tail(&tp->tx_queue, skb);
2017 if (!list_empty(&tp->tx_free)) {
2018 if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
2019 set_bit(SCHEDULE_NAPI, &tp->flags);
2020 schedule_delayed_work(&tp->schedule, 0);
2022 usb_mark_last_busy(tp->udev);
2023 napi_schedule(&tp->napi);
2025 } else if (skb_queue_len(&tp->tx_queue) > tp->tx_qlen) {
2026 netif_stop_queue(netdev);
2029 return NETDEV_TX_OK;
2032 static void r8152b_reset_packet_filter(struct r8152 *tp)
2036 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_FMC);
2037 ocp_data &= ~FMC_FCR_MCU_EN;
2038 ocp_write_word(tp, MCU_TYPE_PLA, PLA_FMC, ocp_data);
2039 ocp_data |= FMC_FCR_MCU_EN;
2040 ocp_write_word(tp, MCU_TYPE_PLA, PLA_FMC, ocp_data);
2043 static void rtl8152_nic_reset(struct r8152 *tp)
2047 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, CR_RST);
2049 for (i = 0; i < 1000; i++) {
2050 if (!(ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CR) & CR_RST))
2052 usleep_range(100, 400);
2056 static void set_tx_qlen(struct r8152 *tp)
2058 struct net_device *netdev = tp->netdev;
2060 tp->tx_qlen = agg_buf_sz / (netdev->mtu + VLAN_ETH_HLEN + VLAN_HLEN +
2061 sizeof(struct tx_desc));
2064 static inline u8 rtl8152_get_speed(struct r8152 *tp)
2066 return ocp_read_byte(tp, MCU_TYPE_PLA, PLA_PHYSTATUS);
2069 static void rtl_set_eee_plus(struct r8152 *tp)
2074 speed = rtl8152_get_speed(tp);
2075 if (speed & _10bps) {
2076 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR);
2077 ocp_data |= EEEP_CR_EEEP_TX;
2078 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR, ocp_data);
2080 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR);
2081 ocp_data &= ~EEEP_CR_EEEP_TX;
2082 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR, ocp_data);
2086 static void rxdy_gated_en(struct r8152 *tp, bool enable)
2090 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_MISC_1);
2092 ocp_data |= RXDY_GATED_EN;
2094 ocp_data &= ~RXDY_GATED_EN;
2095 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MISC_1, ocp_data);
2098 static int rtl_start_rx(struct r8152 *tp)
2102 INIT_LIST_HEAD(&tp->rx_done);
2103 for (i = 0; i < RTL8152_MAX_RX; i++) {
2104 INIT_LIST_HEAD(&tp->rx_info[i].list);
2105 ret = r8152_submit_rx(tp, &tp->rx_info[i], GFP_KERNEL);
2110 if (ret && ++i < RTL8152_MAX_RX) {
2111 struct list_head rx_queue;
2112 unsigned long flags;
2114 INIT_LIST_HEAD(&rx_queue);
2117 struct rx_agg *agg = &tp->rx_info[i++];
2118 struct urb *urb = agg->urb;
2120 urb->actual_length = 0;
2121 list_add_tail(&agg->list, &rx_queue);
2122 } while (i < RTL8152_MAX_RX);
2124 spin_lock_irqsave(&tp->rx_lock, flags);
2125 list_splice_tail(&rx_queue, &tp->rx_done);
2126 spin_unlock_irqrestore(&tp->rx_lock, flags);
2132 static int rtl_stop_rx(struct r8152 *tp)
2136 for (i = 0; i < RTL8152_MAX_RX; i++)
2137 usb_kill_urb(tp->rx_info[i].urb);
2139 while (!skb_queue_empty(&tp->rx_queue))
2140 dev_kfree_skb(__skb_dequeue(&tp->rx_queue));
2145 static int rtl_enable(struct r8152 *tp)
2149 r8152b_reset_packet_filter(tp);
2151 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CR);
2152 ocp_data |= CR_RE | CR_TE;
2153 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, ocp_data);
2155 rxdy_gated_en(tp, false);
2160 static int rtl8152_enable(struct r8152 *tp)
2162 if (test_bit(RTL8152_UNPLUG, &tp->flags))
2166 rtl_set_eee_plus(tp);
2168 return rtl_enable(tp);
2171 static void r8153_set_rx_early_timeout(struct r8152 *tp)
2173 u32 ocp_data = tp->coalesce / 8;
2175 ocp_write_word(tp, MCU_TYPE_USB, USB_RX_EARLY_TIMEOUT, ocp_data);
2178 static void r8153_set_rx_early_size(struct r8152 *tp)
2180 u32 mtu = tp->netdev->mtu;
2181 u32 ocp_data = (agg_buf_sz - mtu - VLAN_ETH_HLEN - VLAN_HLEN) / 4;
2183 ocp_write_word(tp, MCU_TYPE_USB, USB_RX_EARLY_SIZE, ocp_data);
2186 static int rtl8153_enable(struct r8152 *tp)
2188 if (test_bit(RTL8152_UNPLUG, &tp->flags))
2191 usb_disable_lpm(tp->udev);
2193 rtl_set_eee_plus(tp);
2194 r8153_set_rx_early_timeout(tp);
2195 r8153_set_rx_early_size(tp);
2197 return rtl_enable(tp);
2200 static void rtl_disable(struct r8152 *tp)
2205 if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
2206 rtl_drop_queued_tx(tp);
2210 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2211 ocp_data &= ~RCR_ACPT_ALL;
2212 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2214 rtl_drop_queued_tx(tp);
2216 for (i = 0; i < RTL8152_MAX_TX; i++)
2217 usb_kill_urb(tp->tx_info[i].urb);
2219 rxdy_gated_en(tp, true);
2221 for (i = 0; i < 1000; i++) {
2222 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2223 if ((ocp_data & FIFO_EMPTY) == FIFO_EMPTY)
2225 usleep_range(1000, 2000);
2228 for (i = 0; i < 1000; i++) {
2229 if (ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0) & TCR0_TX_EMPTY)
2231 usleep_range(1000, 2000);
2236 rtl8152_nic_reset(tp);
2239 static void r8152_power_cut_en(struct r8152 *tp, bool enable)
2243 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_UPS_CTRL);
2245 ocp_data |= POWER_CUT;
2247 ocp_data &= ~POWER_CUT;
2248 ocp_write_word(tp, MCU_TYPE_USB, USB_UPS_CTRL, ocp_data);
2250 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_PM_CTRL_STATUS);
2251 ocp_data &= ~RESUME_INDICATE;
2252 ocp_write_word(tp, MCU_TYPE_USB, USB_PM_CTRL_STATUS, ocp_data);
2255 static void rtl_rx_vlan_en(struct r8152 *tp, bool enable)
2259 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CPCR);
2261 ocp_data |= CPCR_RX_VLAN;
2263 ocp_data &= ~CPCR_RX_VLAN;
2264 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CPCR, ocp_data);
2267 static int rtl8152_set_features(struct net_device *dev,
2268 netdev_features_t features)
2270 netdev_features_t changed = features ^ dev->features;
2271 struct r8152 *tp = netdev_priv(dev);
2274 ret = usb_autopm_get_interface(tp->intf);
2278 mutex_lock(&tp->control);
2280 if (changed & NETIF_F_HW_VLAN_CTAG_RX) {
2281 if (features & NETIF_F_HW_VLAN_CTAG_RX)
2282 rtl_rx_vlan_en(tp, true);
2284 rtl_rx_vlan_en(tp, false);
2287 mutex_unlock(&tp->control);
2289 usb_autopm_put_interface(tp->intf);
2295 #define WAKE_ANY (WAKE_PHY | WAKE_MAGIC | WAKE_UCAST | WAKE_BCAST | WAKE_MCAST)
2297 static u32 __rtl_get_wol(struct r8152 *tp)
2302 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CONFIG5);
2303 if (!(ocp_data & LAN_WAKE_EN))
2306 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2307 if (ocp_data & LINK_ON_WAKE_EN)
2308 wolopts |= WAKE_PHY;
2310 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG5);
2311 if (ocp_data & UWF_EN)
2312 wolopts |= WAKE_UCAST;
2313 if (ocp_data & BWF_EN)
2314 wolopts |= WAKE_BCAST;
2315 if (ocp_data & MWF_EN)
2316 wolopts |= WAKE_MCAST;
2318 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL);
2319 if (ocp_data & MAGIC_EN)
2320 wolopts |= WAKE_MAGIC;
2325 static void __rtl_set_wol(struct r8152 *tp, u32 wolopts)
2329 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
2331 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2332 ocp_data &= ~LINK_ON_WAKE_EN;
2333 if (wolopts & WAKE_PHY)
2334 ocp_data |= LINK_ON_WAKE_EN;
2335 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG34, ocp_data);
2337 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG5);
2338 ocp_data &= ~(UWF_EN | BWF_EN | MWF_EN | LAN_WAKE_EN);
2339 if (wolopts & WAKE_UCAST)
2341 if (wolopts & WAKE_BCAST)
2343 if (wolopts & WAKE_MCAST)
2345 if (wolopts & WAKE_ANY)
2346 ocp_data |= LAN_WAKE_EN;
2347 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG5, ocp_data);
2349 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2351 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL);
2352 ocp_data &= ~MAGIC_EN;
2353 if (wolopts & WAKE_MAGIC)
2354 ocp_data |= MAGIC_EN;
2355 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL, ocp_data);
2357 if (wolopts & WAKE_ANY)
2358 device_set_wakeup_enable(&tp->udev->dev, true);
2360 device_set_wakeup_enable(&tp->udev->dev, false);
2363 static void r8153_u1u2en(struct r8152 *tp, bool enable)
2368 memset(u1u2, 0xff, sizeof(u1u2));
2370 memset(u1u2, 0x00, sizeof(u1u2));
2372 usb_ocp_write(tp, USB_TOLERANCE, BYTE_EN_SIX_BYTES, sizeof(u1u2), u1u2);
2375 static void r8153_u2p3en(struct r8152 *tp, bool enable)
2379 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_U2P3_CTRL);
2380 if (enable && tp->version != RTL_VER_03 && tp->version != RTL_VER_04)
2381 ocp_data |= U2P3_ENABLE;
2383 ocp_data &= ~U2P3_ENABLE;
2384 ocp_write_word(tp, MCU_TYPE_USB, USB_U2P3_CTRL, ocp_data);
2387 static void r8153_power_cut_en(struct r8152 *tp, bool enable)
2391 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_POWER_CUT);
2393 ocp_data |= PWR_EN | PHASE2_EN;
2395 ocp_data &= ~(PWR_EN | PHASE2_EN);
2396 ocp_write_word(tp, MCU_TYPE_USB, USB_POWER_CUT, ocp_data);
2398 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_MISC_0);
2399 ocp_data &= ~PCUT_STATUS;
2400 ocp_write_word(tp, MCU_TYPE_USB, USB_MISC_0, ocp_data);
2403 static bool rtl_can_wakeup(struct r8152 *tp)
2405 struct usb_device *udev = tp->udev;
2407 return (udev->actconfig->desc.bmAttributes & USB_CONFIG_ATT_WAKEUP);
2410 static void rtl_runtime_suspend_enable(struct r8152 *tp, bool enable)
2415 r8153_u1u2en(tp, false);
2416 r8153_u2p3en(tp, false);
2418 __rtl_set_wol(tp, WAKE_ANY);
2420 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
2422 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2423 ocp_data |= LINK_OFF_WAKE_EN;
2424 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG34, ocp_data);
2426 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2428 __rtl_set_wol(tp, tp->saved_wolopts);
2429 r8153_u2p3en(tp, true);
2430 r8153_u1u2en(tp, true);
2434 static void rtl_phy_reset(struct r8152 *tp)
2439 data = r8152_mdio_read(tp, MII_BMCR);
2441 /* don't reset again before the previous one complete */
2442 if (data & BMCR_RESET)
2446 r8152_mdio_write(tp, MII_BMCR, data);
2448 for (i = 0; i < 50; i++) {
2450 if ((r8152_mdio_read(tp, MII_BMCR) & BMCR_RESET) == 0)
2455 static void r8153_teredo_off(struct r8152 *tp)
2459 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG);
2460 ocp_data &= ~(TEREDO_SEL | TEREDO_RS_EVENT_MASK | OOB_TEREDO_EN);
2461 ocp_write_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG, ocp_data);
2463 ocp_write_word(tp, MCU_TYPE_PLA, PLA_WDT6_CTRL, WDT6_SET_MODE);
2464 ocp_write_word(tp, MCU_TYPE_PLA, PLA_REALWOW_TIMER, 0);
2465 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TEREDO_TIMER, 0);
2468 static void r8152_aldps_en(struct r8152 *tp, bool enable)
2471 ocp_reg_write(tp, OCP_ALDPS_CONFIG, ENPWRSAVE | ENPDNPS |
2472 LINKENA | DIS_SDSAVE);
2474 ocp_reg_write(tp, OCP_ALDPS_CONFIG, ENPDNPS | LINKENA |
2480 static void rtl8152_disable(struct r8152 *tp)
2482 r8152_aldps_en(tp, false);
2484 r8152_aldps_en(tp, true);
2487 static void r8152b_hw_phy_cfg(struct r8152 *tp)
2491 data = r8152_mdio_read(tp, MII_BMCR);
2492 if (data & BMCR_PDOWN) {
2493 data &= ~BMCR_PDOWN;
2494 r8152_mdio_write(tp, MII_BMCR, data);
2497 set_bit(PHY_RESET, &tp->flags);
2500 static void r8152b_exit_oob(struct r8152 *tp)
2505 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2506 ocp_data &= ~RCR_ACPT_ALL;
2507 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2509 rxdy_gated_en(tp, true);
2510 r8153_teredo_off(tp);
2511 r8152b_hw_phy_cfg(tp);
2513 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2514 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, 0x00);
2516 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2517 ocp_data &= ~NOW_IS_OOB;
2518 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2520 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2521 ocp_data &= ~MCU_BORW_EN;
2522 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2524 for (i = 0; i < 1000; i++) {
2525 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2526 if (ocp_data & LINK_LIST_READY)
2528 usleep_range(1000, 2000);
2531 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2532 ocp_data |= RE_INIT_LL;
2533 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2535 for (i = 0; i < 1000; i++) {
2536 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2537 if (ocp_data & LINK_LIST_READY)
2539 usleep_range(1000, 2000);
2542 rtl8152_nic_reset(tp);
2544 /* rx share fifo credit full threshold */
2545 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_NORMAL);
2547 if (tp->udev->speed == USB_SPEED_FULL ||
2548 tp->udev->speed == USB_SPEED_LOW) {
2549 /* rx share fifo credit near full threshold */
2550 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1,
2552 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2,
2555 /* rx share fifo credit near full threshold */
2556 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1,
2558 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2,
2562 /* TX share fifo free credit full threshold */
2563 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TXFIFO_CTRL, TXFIFO_THR_NORMAL);
2565 ocp_write_byte(tp, MCU_TYPE_USB, USB_TX_AGG, TX_AGG_MAX_THRESHOLD);
2566 ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_BUF_TH, RX_THR_HIGH);
2567 ocp_write_dword(tp, MCU_TYPE_USB, USB_TX_DMA,
2568 TEST_MODE_DISABLE | TX_SIZE_ADJUST1);
2570 rtl_rx_vlan_en(tp, tp->netdev->features & NETIF_F_HW_VLAN_CTAG_RX);
2572 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8152_RMS);
2574 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0);
2575 ocp_data |= TCR0_AUTO_FIFO;
2576 ocp_write_word(tp, MCU_TYPE_PLA, PLA_TCR0, ocp_data);
2579 static void r8152b_enter_oob(struct r8152 *tp)
2584 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2585 ocp_data &= ~NOW_IS_OOB;
2586 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2588 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_OOB);
2589 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1, RXFIFO_THR2_OOB);
2590 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2, RXFIFO_THR3_OOB);
2594 for (i = 0; i < 1000; i++) {
2595 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2596 if (ocp_data & LINK_LIST_READY)
2598 usleep_range(1000, 2000);
2601 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2602 ocp_data |= RE_INIT_LL;
2603 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2605 for (i = 0; i < 1000; i++) {
2606 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2607 if (ocp_data & LINK_LIST_READY)
2609 usleep_range(1000, 2000);
2612 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8152_RMS);
2614 rtl_rx_vlan_en(tp, true);
2616 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PAL_BDC_CR);
2617 ocp_data |= ALDPS_PROXY_MODE;
2618 ocp_write_word(tp, MCU_TYPE_PLA, PAL_BDC_CR, ocp_data);
2620 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2621 ocp_data |= NOW_IS_OOB | DIS_MCU_CLROOB;
2622 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2624 rxdy_gated_en(tp, false);
2626 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2627 ocp_data |= RCR_APM | RCR_AM | RCR_AB;
2628 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2631 static void r8153_hw_phy_cfg(struct r8152 *tp)
2636 if (tp->version == RTL_VER_03 || tp->version == RTL_VER_04 ||
2637 tp->version == RTL_VER_05)
2638 ocp_reg_write(tp, OCP_ADC_CFG, CKADSEL_L | ADC_EN | EN_EMI_L);
2640 data = r8152_mdio_read(tp, MII_BMCR);
2641 if (data & BMCR_PDOWN) {
2642 data &= ~BMCR_PDOWN;
2643 r8152_mdio_write(tp, MII_BMCR, data);
2646 if (tp->version == RTL_VER_03) {
2647 data = ocp_reg_read(tp, OCP_EEE_CFG);
2648 data &= ~CTAP_SHORT_EN;
2649 ocp_reg_write(tp, OCP_EEE_CFG, data);
2652 data = ocp_reg_read(tp, OCP_POWER_CFG);
2653 data |= EEE_CLKDIV_EN;
2654 ocp_reg_write(tp, OCP_POWER_CFG, data);
2656 data = ocp_reg_read(tp, OCP_DOWN_SPEED);
2657 data |= EN_10M_BGOFF;
2658 ocp_reg_write(tp, OCP_DOWN_SPEED, data);
2659 data = ocp_reg_read(tp, OCP_POWER_CFG);
2660 data |= EN_10M_PLLOFF;
2661 ocp_reg_write(tp, OCP_POWER_CFG, data);
2662 sram_write(tp, SRAM_IMPEDANCE, 0x0b13);
2664 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR);
2665 ocp_data |= PFM_PWM_SWITCH;
2666 ocp_write_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR, ocp_data);
2668 /* Enable LPF corner auto tune */
2669 sram_write(tp, SRAM_LPF_CFG, 0xf70f);
2671 /* Adjust 10M Amplitude */
2672 sram_write(tp, SRAM_10M_AMP1, 0x00af);
2673 sram_write(tp, SRAM_10M_AMP2, 0x0208);
2675 set_bit(PHY_RESET, &tp->flags);
2678 static void r8153_first_init(struct r8152 *tp)
2683 rxdy_gated_en(tp, true);
2684 r8153_teredo_off(tp);
2686 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2687 ocp_data &= ~RCR_ACPT_ALL;
2688 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2690 r8153_hw_phy_cfg(tp);
2692 rtl8152_nic_reset(tp);
2694 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2695 ocp_data &= ~NOW_IS_OOB;
2696 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2698 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2699 ocp_data &= ~MCU_BORW_EN;
2700 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2702 for (i = 0; i < 1000; i++) {
2703 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2704 if (ocp_data & LINK_LIST_READY)
2706 usleep_range(1000, 2000);
2709 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2710 ocp_data |= RE_INIT_LL;
2711 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2713 for (i = 0; i < 1000; i++) {
2714 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2715 if (ocp_data & LINK_LIST_READY)
2717 usleep_range(1000, 2000);
2720 rtl_rx_vlan_en(tp, tp->netdev->features & NETIF_F_HW_VLAN_CTAG_RX);
2722 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8153_RMS);
2723 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_MTPS, MTPS_JUMBO);
2725 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0);
2726 ocp_data |= TCR0_AUTO_FIFO;
2727 ocp_write_word(tp, MCU_TYPE_PLA, PLA_TCR0, ocp_data);
2729 rtl8152_nic_reset(tp);
2731 /* rx share fifo credit full threshold */
2732 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_NORMAL);
2733 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1, RXFIFO_THR2_NORMAL);
2734 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2, RXFIFO_THR3_NORMAL);
2735 /* TX share fifo free credit full threshold */
2736 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TXFIFO_CTRL, TXFIFO_THR_NORMAL2);
2738 /* rx aggregation */
2739 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL);
2740 ocp_data &= ~(RX_AGG_DISABLE | RX_ZERO_EN);
2741 ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data);
2744 static void r8153_enter_oob(struct r8152 *tp)
2749 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2750 ocp_data &= ~NOW_IS_OOB;
2751 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2755 for (i = 0; i < 1000; i++) {
2756 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2757 if (ocp_data & LINK_LIST_READY)
2759 usleep_range(1000, 2000);
2762 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2763 ocp_data |= RE_INIT_LL;
2764 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2766 for (i = 0; i < 1000; i++) {
2767 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2768 if (ocp_data & LINK_LIST_READY)
2770 usleep_range(1000, 2000);
2773 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8153_RMS);
2775 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG);
2776 ocp_data &= ~TEREDO_WAKE_MASK;
2777 ocp_write_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG, ocp_data);
2779 rtl_rx_vlan_en(tp, true);
2781 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PAL_BDC_CR);
2782 ocp_data |= ALDPS_PROXY_MODE;
2783 ocp_write_word(tp, MCU_TYPE_PLA, PAL_BDC_CR, ocp_data);
2785 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2786 ocp_data |= NOW_IS_OOB | DIS_MCU_CLROOB;
2787 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2789 rxdy_gated_en(tp, false);
2791 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2792 ocp_data |= RCR_APM | RCR_AM | RCR_AB;
2793 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2796 static void r8153_aldps_en(struct r8152 *tp, bool enable)
2800 data = ocp_reg_read(tp, OCP_POWER_CFG);
2803 ocp_reg_write(tp, OCP_POWER_CFG, data);
2806 ocp_reg_write(tp, OCP_POWER_CFG, data);
2811 static void rtl8153_disable(struct r8152 *tp)
2813 r8153_aldps_en(tp, false);
2815 r8153_aldps_en(tp, true);
2816 usb_enable_lpm(tp->udev);
2819 static int rtl8152_set_speed(struct r8152 *tp, u8 autoneg, u16 speed, u8 duplex)
2821 u16 bmcr, anar, gbcr;
2824 cancel_delayed_work_sync(&tp->schedule);
2825 anar = r8152_mdio_read(tp, MII_ADVERTISE);
2826 anar &= ~(ADVERTISE_10HALF | ADVERTISE_10FULL |
2827 ADVERTISE_100HALF | ADVERTISE_100FULL);
2828 if (tp->mii.supports_gmii) {
2829 gbcr = r8152_mdio_read(tp, MII_CTRL1000);
2830 gbcr &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF);
2835 if (autoneg == AUTONEG_DISABLE) {
2836 if (speed == SPEED_10) {
2838 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
2839 } else if (speed == SPEED_100) {
2840 bmcr = BMCR_SPEED100;
2841 anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
2842 } else if (speed == SPEED_1000 && tp->mii.supports_gmii) {
2843 bmcr = BMCR_SPEED1000;
2844 gbcr |= ADVERTISE_1000FULL | ADVERTISE_1000HALF;
2850 if (duplex == DUPLEX_FULL)
2851 bmcr |= BMCR_FULLDPLX;
2853 if (speed == SPEED_10) {
2854 if (duplex == DUPLEX_FULL)
2855 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
2857 anar |= ADVERTISE_10HALF;
2858 } else if (speed == SPEED_100) {
2859 if (duplex == DUPLEX_FULL) {
2860 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
2861 anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
2863 anar |= ADVERTISE_10HALF;
2864 anar |= ADVERTISE_100HALF;
2866 } else if (speed == SPEED_1000 && tp->mii.supports_gmii) {
2867 if (duplex == DUPLEX_FULL) {
2868 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
2869 anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
2870 gbcr |= ADVERTISE_1000FULL | ADVERTISE_1000HALF;
2872 anar |= ADVERTISE_10HALF;
2873 anar |= ADVERTISE_100HALF;
2874 gbcr |= ADVERTISE_1000HALF;
2881 bmcr = BMCR_ANENABLE | BMCR_ANRESTART;
2884 if (test_bit(PHY_RESET, &tp->flags))
2887 if (tp->mii.supports_gmii)
2888 r8152_mdio_write(tp, MII_CTRL1000, gbcr);
2890 r8152_mdio_write(tp, MII_ADVERTISE, anar);
2891 r8152_mdio_write(tp, MII_BMCR, bmcr);
2893 if (test_and_clear_bit(PHY_RESET, &tp->flags)) {
2896 for (i = 0; i < 50; i++) {
2898 if ((r8152_mdio_read(tp, MII_BMCR) & BMCR_RESET) == 0)
2907 static void rtl8152_up(struct r8152 *tp)
2909 if (test_bit(RTL8152_UNPLUG, &tp->flags))
2912 r8152_aldps_en(tp, false);
2913 r8152b_exit_oob(tp);
2914 r8152_aldps_en(tp, true);
2917 static void rtl8152_down(struct r8152 *tp)
2919 if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
2920 rtl_drop_queued_tx(tp);
2924 r8152_power_cut_en(tp, false);
2925 r8152_aldps_en(tp, false);
2926 r8152b_enter_oob(tp);
2927 r8152_aldps_en(tp, true);
2930 static void rtl8153_up(struct r8152 *tp)
2932 if (test_bit(RTL8152_UNPLUG, &tp->flags))
2935 r8153_u1u2en(tp, false);
2936 r8153_aldps_en(tp, false);
2937 r8153_first_init(tp);
2938 r8153_aldps_en(tp, true);
2939 r8153_u2p3en(tp, true);
2940 r8153_u1u2en(tp, true);
2941 usb_enable_lpm(tp->udev);
2944 static void rtl8153_down(struct r8152 *tp)
2946 if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
2947 rtl_drop_queued_tx(tp);
2951 r8153_u1u2en(tp, false);
2952 r8153_u2p3en(tp, false);
2953 r8153_power_cut_en(tp, false);
2954 r8153_aldps_en(tp, false);
2955 r8153_enter_oob(tp);
2956 r8153_aldps_en(tp, true);
2959 static bool rtl8152_in_nway(struct r8152 *tp)
2963 ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, 0x2000);
2964 tp->ocp_base = 0x2000;
2965 ocp_write_byte(tp, MCU_TYPE_PLA, 0xb014, 0x4c); /* phy state */
2966 nway_state = ocp_read_word(tp, MCU_TYPE_PLA, 0xb01a);
2968 /* bit 15: TXDIS_STATE, bit 14: ABD_STATE */
2969 if (nway_state & 0xc000)
2975 static bool rtl8153_in_nway(struct r8152 *tp)
2977 u16 phy_state = ocp_reg_read(tp, OCP_PHY_STATE) & 0xff;
2979 if (phy_state == TXDIS_STATE || phy_state == ABD_STATE)
2985 static void set_carrier(struct r8152 *tp)
2987 struct net_device *netdev = tp->netdev;
2990 speed = rtl8152_get_speed(tp);
2992 if (speed & LINK_STATUS) {
2993 if (!netif_carrier_ok(netdev)) {
2994 tp->rtl_ops.enable(tp);
2995 set_bit(RTL8152_SET_RX_MODE, &tp->flags);
2996 netif_stop_queue(netdev);
2997 napi_disable(&tp->napi);
2998 netif_carrier_on(netdev);
3000 napi_enable(&tp->napi);
3001 netif_wake_queue(netdev);
3002 netif_info(tp, link, netdev, "carrier on\n");
3003 } else if (netif_queue_stopped(netdev) &&
3004 skb_queue_len(&tp->tx_queue) < tp->tx_qlen) {
3005 netif_wake_queue(netdev);
3008 if (netif_carrier_ok(netdev)) {
3009 netif_carrier_off(netdev);
3010 napi_disable(&tp->napi);
3011 tp->rtl_ops.disable(tp);
3012 napi_enable(&tp->napi);
3013 netif_info(tp, link, netdev, "carrier off\n");
3018 static void rtl_work_func_t(struct work_struct *work)
3020 struct r8152 *tp = container_of(work, struct r8152, schedule.work);
3022 /* If the device is unplugged or !netif_running(), the workqueue
3023 * doesn't need to wake the device, and could return directly.
3025 if (test_bit(RTL8152_UNPLUG, &tp->flags) || !netif_running(tp->netdev))
3028 if (usb_autopm_get_interface(tp->intf) < 0)
3031 if (!test_bit(WORK_ENABLE, &tp->flags))
3034 if (!mutex_trylock(&tp->control)) {
3035 schedule_delayed_work(&tp->schedule, 0);
3039 if (test_and_clear_bit(RTL8152_LINK_CHG, &tp->flags))
3042 if (test_and_clear_bit(RTL8152_SET_RX_MODE, &tp->flags))
3043 _rtl8152_set_rx_mode(tp->netdev);
3045 /* don't schedule napi before linking */
3046 if (test_and_clear_bit(SCHEDULE_NAPI, &tp->flags) &&
3047 netif_carrier_ok(tp->netdev))
3048 napi_schedule(&tp->napi);
3050 if (test_and_clear_bit(PHY_RESET, &tp->flags))
3053 mutex_unlock(&tp->control);
3056 usb_autopm_put_interface(tp->intf);
3059 #ifdef CONFIG_PM_SLEEP
3060 static int rtl_notifier(struct notifier_block *nb, unsigned long action,
3063 struct r8152 *tp = container_of(nb, struct r8152, pm_notifier);
3066 case PM_HIBERNATION_PREPARE:
3067 case PM_SUSPEND_PREPARE:
3068 usb_autopm_get_interface(tp->intf);
3071 case PM_POST_HIBERNATION:
3072 case PM_POST_SUSPEND:
3073 usb_autopm_put_interface(tp->intf);
3076 case PM_POST_RESTORE:
3077 case PM_RESTORE_PREPARE:
3086 static int rtl8152_open(struct net_device *netdev)
3088 struct r8152 *tp = netdev_priv(netdev);
3091 res = alloc_all_mem(tp);
3095 netif_carrier_off(netdev);
3097 res = usb_autopm_get_interface(tp->intf);
3103 mutex_lock(&tp->control);
3107 rtl8152_set_speed(tp, AUTONEG_ENABLE,
3108 tp->mii.supports_gmii ? SPEED_1000 : SPEED_100,
3110 netif_carrier_off(netdev);
3111 netif_start_queue(netdev);
3112 set_bit(WORK_ENABLE, &tp->flags);
3114 res = usb_submit_urb(tp->intr_urb, GFP_KERNEL);
3117 netif_device_detach(tp->netdev);
3118 netif_warn(tp, ifup, netdev, "intr_urb submit failed: %d\n",
3122 napi_enable(&tp->napi);
3125 mutex_unlock(&tp->control);
3127 usb_autopm_put_interface(tp->intf);
3128 #ifdef CONFIG_PM_SLEEP
3129 tp->pm_notifier.notifier_call = rtl_notifier;
3130 register_pm_notifier(&tp->pm_notifier);
3137 static int rtl8152_close(struct net_device *netdev)
3139 struct r8152 *tp = netdev_priv(netdev);
3142 #ifdef CONFIG_PM_SLEEP
3143 unregister_pm_notifier(&tp->pm_notifier);
3145 if (!test_bit(RTL8152_UNPLUG, &tp->flags))
3146 napi_disable(&tp->napi);
3147 clear_bit(WORK_ENABLE, &tp->flags);
3148 usb_kill_urb(tp->intr_urb);
3149 cancel_delayed_work_sync(&tp->schedule);
3150 netif_stop_queue(netdev);
3152 res = usb_autopm_get_interface(tp->intf);
3153 if (res < 0 || test_bit(RTL8152_UNPLUG, &tp->flags)) {
3154 rtl_drop_queued_tx(tp);
3157 mutex_lock(&tp->control);
3159 tp->rtl_ops.down(tp);
3161 mutex_unlock(&tp->control);
3165 usb_autopm_put_interface(tp->intf);
3172 static inline void r8152_mmd_indirect(struct r8152 *tp, u16 dev, u16 reg)
3174 ocp_reg_write(tp, OCP_EEE_AR, FUN_ADDR | dev);
3175 ocp_reg_write(tp, OCP_EEE_DATA, reg);
3176 ocp_reg_write(tp, OCP_EEE_AR, FUN_DATA | dev);
3179 static u16 r8152_mmd_read(struct r8152 *tp, u16 dev, u16 reg)
3183 r8152_mmd_indirect(tp, dev, reg);
3184 data = ocp_reg_read(tp, OCP_EEE_DATA);
3185 ocp_reg_write(tp, OCP_EEE_AR, 0x0000);
3190 static void r8152_mmd_write(struct r8152 *tp, u16 dev, u16 reg, u16 data)
3192 r8152_mmd_indirect(tp, dev, reg);
3193 ocp_reg_write(tp, OCP_EEE_DATA, data);
3194 ocp_reg_write(tp, OCP_EEE_AR, 0x0000);
3197 static void r8152_eee_en(struct r8152 *tp, bool enable)
3199 u16 config1, config2, config3;
3202 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
3203 config1 = ocp_reg_read(tp, OCP_EEE_CONFIG1) & ~sd_rise_time_mask;
3204 config2 = ocp_reg_read(tp, OCP_EEE_CONFIG2);
3205 config3 = ocp_reg_read(tp, OCP_EEE_CONFIG3) & ~fast_snr_mask;
3208 ocp_data |= EEE_RX_EN | EEE_TX_EN;
3209 config1 |= EEE_10_CAP | EEE_NWAY_EN | TX_QUIET_EN | RX_QUIET_EN;
3210 config1 |= sd_rise_time(1);
3211 config2 |= RG_DACQUIET_EN | RG_LDVQUIET_EN;
3212 config3 |= fast_snr(42);
3214 ocp_data &= ~(EEE_RX_EN | EEE_TX_EN);
3215 config1 &= ~(EEE_10_CAP | EEE_NWAY_EN | TX_QUIET_EN |
3217 config1 |= sd_rise_time(7);
3218 config2 &= ~(RG_DACQUIET_EN | RG_LDVQUIET_EN);
3219 config3 |= fast_snr(511);
3222 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEE_CR, ocp_data);
3223 ocp_reg_write(tp, OCP_EEE_CONFIG1, config1);
3224 ocp_reg_write(tp, OCP_EEE_CONFIG2, config2);
3225 ocp_reg_write(tp, OCP_EEE_CONFIG3, config3);
3228 static void r8152b_enable_eee(struct r8152 *tp)
3230 r8152_eee_en(tp, true);
3231 r8152_mmd_write(tp, MDIO_MMD_AN, MDIO_AN_EEE_ADV, MDIO_EEE_100TX);
3234 static void r8153_eee_en(struct r8152 *tp, bool enable)
3239 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
3240 config = ocp_reg_read(tp, OCP_EEE_CFG);
3243 ocp_data |= EEE_RX_EN | EEE_TX_EN;
3246 ocp_data &= ~(EEE_RX_EN | EEE_TX_EN);
3247 config &= ~EEE10_EN;
3250 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEE_CR, ocp_data);
3251 ocp_reg_write(tp, OCP_EEE_CFG, config);
3254 static void r8153_enable_eee(struct r8152 *tp)
3256 r8153_eee_en(tp, true);
3257 ocp_reg_write(tp, OCP_EEE_ADV, MDIO_EEE_1000T | MDIO_EEE_100TX);
3260 static void r8152b_enable_fc(struct r8152 *tp)
3264 anar = r8152_mdio_read(tp, MII_ADVERTISE);
3265 anar |= ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
3266 r8152_mdio_write(tp, MII_ADVERTISE, anar);
3269 static void rtl_tally_reset(struct r8152 *tp)
3273 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_RSTTALLY);
3274 ocp_data |= TALLY_RESET;
3275 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RSTTALLY, ocp_data);
3278 static void r8152b_init(struct r8152 *tp)
3282 if (test_bit(RTL8152_UNPLUG, &tp->flags))
3285 r8152_aldps_en(tp, false);
3287 if (tp->version == RTL_VER_01) {
3288 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE);
3289 ocp_data &= ~LED_MODE_MASK;
3290 ocp_write_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE, ocp_data);
3293 r8152_power_cut_en(tp, false);
3295 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR);
3296 ocp_data |= TX_10M_IDLE_EN | PFM_PWM_SWITCH;
3297 ocp_write_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR, ocp_data);
3298 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL);
3299 ocp_data &= ~MCU_CLK_RATIO_MASK;
3300 ocp_data |= MCU_CLK_RATIO | D3_CLK_GATED_EN;
3301 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL, ocp_data);
3302 ocp_data = GPHY_STS_MSK | SPEED_DOWN_MSK |
3303 SPDWN_RXDV_MSK | SPDWN_LINKCHG_MSK;
3304 ocp_write_word(tp, MCU_TYPE_PLA, PLA_GPHY_INTR_IMR, ocp_data);
3306 r8152b_enable_eee(tp);
3307 r8152_aldps_en(tp, true);
3308 r8152b_enable_fc(tp);
3309 rtl_tally_reset(tp);
3311 /* enable rx aggregation */
3312 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL);
3313 ocp_data &= ~(RX_AGG_DISABLE | RX_ZERO_EN);
3314 ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data);
3317 static void r8153_init(struct r8152 *tp)
3322 if (test_bit(RTL8152_UNPLUG, &tp->flags))
3325 r8153_aldps_en(tp, false);
3326 r8153_u1u2en(tp, false);
3328 for (i = 0; i < 500; i++) {
3329 if (ocp_read_word(tp, MCU_TYPE_PLA, PLA_BOOT_CTRL) &
3334 if (test_bit(RTL8152_UNPLUG, &tp->flags))
3338 for (i = 0; i < 500; i++) {
3339 ocp_data = ocp_reg_read(tp, OCP_PHY_STATUS) & PHY_STAT_MASK;
3340 if (ocp_data == PHY_STAT_LAN_ON || ocp_data == PHY_STAT_PWRDN)
3344 if (test_bit(RTL8152_UNPLUG, &tp->flags))
3348 usb_disable_lpm(tp->udev);
3349 r8153_u2p3en(tp, false);
3351 if (tp->version == RTL_VER_04) {
3352 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_SSPHYLINK2);
3353 ocp_data &= ~pwd_dn_scale_mask;
3354 ocp_data |= pwd_dn_scale(96);
3355 ocp_write_word(tp, MCU_TYPE_USB, USB_SSPHYLINK2, ocp_data);
3357 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_USB2PHY);
3358 ocp_data |= USB2PHY_L1 | USB2PHY_SUSPEND;
3359 ocp_write_byte(tp, MCU_TYPE_USB, USB_USB2PHY, ocp_data);
3360 } else if (tp->version == RTL_VER_05) {
3361 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_DMY_REG0);
3362 ocp_data &= ~ECM_ALDPS;
3363 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_DMY_REG0, ocp_data);
3365 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1);
3366 if (ocp_read_word(tp, MCU_TYPE_USB, USB_BURST_SIZE) == 0)
3367 ocp_data &= ~DYNAMIC_BURST;
3369 ocp_data |= DYNAMIC_BURST;
3370 ocp_write_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1, ocp_data);
3371 } else if (tp->version == RTL_VER_06) {
3372 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1);
3373 if (ocp_read_word(tp, MCU_TYPE_USB, USB_BURST_SIZE) == 0)
3374 ocp_data &= ~DYNAMIC_BURST;
3376 ocp_data |= DYNAMIC_BURST;
3377 ocp_write_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1, ocp_data);
3380 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY2);
3381 ocp_data |= EP4_FULL_FC;
3382 ocp_write_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY2, ocp_data);
3384 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_WDT11_CTRL);
3385 ocp_data &= ~TIMER11_EN;
3386 ocp_write_word(tp, MCU_TYPE_USB, USB_WDT11_CTRL, ocp_data);
3388 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE);
3389 ocp_data &= ~LED_MODE_MASK;
3390 ocp_write_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE, ocp_data);
3392 ocp_data = FIFO_EMPTY_1FB | ROK_EXIT_LPM;
3393 if (tp->version == RTL_VER_04 && tp->udev->speed != USB_SPEED_SUPER)
3394 ocp_data |= LPM_TIMER_500MS;
3396 ocp_data |= LPM_TIMER_500US;
3397 ocp_write_byte(tp, MCU_TYPE_USB, USB_LPM_CTRL, ocp_data);
3399 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_AFE_CTRL2);
3400 ocp_data &= ~SEN_VAL_MASK;
3401 ocp_data |= SEN_VAL_NORMAL | SEL_RXIDLE;
3402 ocp_write_word(tp, MCU_TYPE_USB, USB_AFE_CTRL2, ocp_data);
3404 ocp_write_word(tp, MCU_TYPE_USB, USB_CONNECT_TIMER, 0x0001);
3406 r8153_power_cut_en(tp, false);
3407 r8153_u1u2en(tp, true);
3409 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL, ALDPS_SPDWN_RATIO);
3410 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL2, EEE_SPDWN_RATIO);
3411 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL3,
3412 PKT_AVAIL_SPDWN_EN | SUSPEND_SPDWN_EN |
3413 U1U2_SPDWN_EN | L1_SPDWN_EN);
3414 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL4,
3415 PWRSAVE_SPDWN_EN | RXDV_SPDWN_EN | TX10MIDLE_EN |
3416 TP100_SPDWN_EN | TP500_SPDWN_EN | TP1000_SPDWN_EN |
3419 r8153_enable_eee(tp);
3420 r8153_aldps_en(tp, true);
3421 r8152b_enable_fc(tp);
3422 rtl_tally_reset(tp);
3423 r8153_u2p3en(tp, true);
3426 static int rtl8152_pre_reset(struct usb_interface *intf)
3428 struct r8152 *tp = usb_get_intfdata(intf);
3429 struct net_device *netdev;
3434 netdev = tp->netdev;
3435 if (!netif_running(netdev))
3438 netif_stop_queue(netdev);
3439 napi_disable(&tp->napi);
3440 clear_bit(WORK_ENABLE, &tp->flags);
3441 usb_kill_urb(tp->intr_urb);
3442 cancel_delayed_work_sync(&tp->schedule);
3443 if (netif_carrier_ok(netdev)) {
3444 mutex_lock(&tp->control);
3445 tp->rtl_ops.disable(tp);
3446 mutex_unlock(&tp->control);
3452 static int rtl8152_post_reset(struct usb_interface *intf)
3454 struct r8152 *tp = usb_get_intfdata(intf);
3455 struct net_device *netdev;
3460 netdev = tp->netdev;
3461 if (!netif_running(netdev))
3464 set_bit(WORK_ENABLE, &tp->flags);
3465 if (netif_carrier_ok(netdev)) {
3466 mutex_lock(&tp->control);
3467 tp->rtl_ops.enable(tp);
3469 rtl8152_set_rx_mode(netdev);
3470 mutex_unlock(&tp->control);
3473 napi_enable(&tp->napi);
3474 netif_wake_queue(netdev);
3475 usb_submit_urb(tp->intr_urb, GFP_KERNEL);
3480 static bool delay_autosuspend(struct r8152 *tp)
3482 bool sw_linking = !!netif_carrier_ok(tp->netdev);
3483 bool hw_linking = !!(rtl8152_get_speed(tp) & LINK_STATUS);
3485 /* This means a linking change occurs and the driver doesn't detect it,
3486 * yet. If the driver has disabled tx/rx and hw is linking on, the
3487 * device wouldn't wake up by receiving any packet.
3489 if (work_busy(&tp->schedule.work) || sw_linking != hw_linking)
3492 /* If the linking down is occurred by nway, the device may miss the
3493 * linking change event. And it wouldn't wake when linking on.
3495 if (!sw_linking && tp->rtl_ops.in_nway(tp))
3497 else if (!skb_queue_empty(&tp->tx_queue))
3503 static int rtl8152_rumtime_suspend(struct r8152 *tp)
3505 struct net_device *netdev = tp->netdev;
3508 if (netif_running(netdev) && test_bit(WORK_ENABLE, &tp->flags)) {
3511 if (delay_autosuspend(tp)) {
3516 if (netif_carrier_ok(netdev)) {
3519 rcr = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
3520 ocp_data = rcr & ~RCR_ACPT_ALL;
3521 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
3522 rxdy_gated_en(tp, true);
3523 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA,
3525 if (!(ocp_data & RXFIFO_EMPTY)) {
3526 rxdy_gated_en(tp, false);
3527 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, rcr);
3533 clear_bit(WORK_ENABLE, &tp->flags);
3534 usb_kill_urb(tp->intr_urb);
3536 rtl_runtime_suspend_enable(tp, true);
3538 if (netif_carrier_ok(netdev)) {
3539 napi_disable(&tp->napi);
3541 rxdy_gated_en(tp, false);
3542 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, rcr);
3543 napi_enable(&tp->napi);
3547 set_bit(SELECTIVE_SUSPEND, &tp->flags);
3553 static int rtl8152_system_suspend(struct r8152 *tp)
3555 struct net_device *netdev = tp->netdev;
3558 netif_device_detach(netdev);
3560 if (netif_running(netdev) && test_bit(WORK_ENABLE, &tp->flags)) {
3561 clear_bit(WORK_ENABLE, &tp->flags);
3562 usb_kill_urb(tp->intr_urb);
3563 napi_disable(&tp->napi);
3564 cancel_delayed_work_sync(&tp->schedule);
3565 tp->rtl_ops.down(tp);
3566 napi_enable(&tp->napi);
3572 static int rtl8152_suspend(struct usb_interface *intf, pm_message_t message)
3574 struct r8152 *tp = usb_get_intfdata(intf);
3577 mutex_lock(&tp->control);
3579 if (PMSG_IS_AUTO(message))
3580 ret = rtl8152_rumtime_suspend(tp);
3582 ret = rtl8152_system_suspend(tp);
3584 mutex_unlock(&tp->control);
3589 static int rtl8152_resume(struct usb_interface *intf)
3591 struct r8152 *tp = usb_get_intfdata(intf);
3593 mutex_lock(&tp->control);
3595 if (!test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3596 tp->rtl_ops.init(tp);
3597 netif_device_attach(tp->netdev);
3600 if (netif_running(tp->netdev) && tp->netdev->flags & IFF_UP) {
3601 if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3602 rtl_runtime_suspend_enable(tp, false);
3603 clear_bit(SELECTIVE_SUSPEND, &tp->flags);
3604 napi_disable(&tp->napi);
3605 set_bit(WORK_ENABLE, &tp->flags);
3607 if (netif_carrier_ok(tp->netdev)) {
3608 if (rtl8152_get_speed(tp) & LINK_STATUS) {
3611 netif_carrier_off(tp->netdev);
3612 tp->rtl_ops.disable(tp);
3613 netif_info(tp, link, tp->netdev,
3618 napi_enable(&tp->napi);
3621 rtl8152_set_speed(tp, AUTONEG_ENABLE,
3622 tp->mii.supports_gmii ?
3623 SPEED_1000 : SPEED_100,
3625 netif_carrier_off(tp->netdev);
3626 set_bit(WORK_ENABLE, &tp->flags);
3628 usb_submit_urb(tp->intr_urb, GFP_KERNEL);
3629 } else if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3630 if (tp->netdev->flags & IFF_UP)
3631 rtl_runtime_suspend_enable(tp, false);
3632 clear_bit(SELECTIVE_SUSPEND, &tp->flags);
3635 mutex_unlock(&tp->control);
3640 static int rtl8152_reset_resume(struct usb_interface *intf)
3642 struct r8152 *tp = usb_get_intfdata(intf);
3644 clear_bit(SELECTIVE_SUSPEND, &tp->flags);
3645 return rtl8152_resume(intf);
3648 static void rtl8152_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3650 struct r8152 *tp = netdev_priv(dev);
3652 if (usb_autopm_get_interface(tp->intf) < 0)
3655 if (!rtl_can_wakeup(tp)) {
3659 mutex_lock(&tp->control);
3660 wol->supported = WAKE_ANY;
3661 wol->wolopts = __rtl_get_wol(tp);
3662 mutex_unlock(&tp->control);
3665 usb_autopm_put_interface(tp->intf);
3668 static int rtl8152_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3670 struct r8152 *tp = netdev_priv(dev);
3673 if (!rtl_can_wakeup(tp))
3676 if (wol->wolopts & ~WAKE_ANY)
3679 ret = usb_autopm_get_interface(tp->intf);
3683 mutex_lock(&tp->control);
3685 __rtl_set_wol(tp, wol->wolopts);
3686 tp->saved_wolopts = wol->wolopts & WAKE_ANY;
3688 mutex_unlock(&tp->control);
3690 usb_autopm_put_interface(tp->intf);
3696 static u32 rtl8152_get_msglevel(struct net_device *dev)
3698 struct r8152 *tp = netdev_priv(dev);
3700 return tp->msg_enable;
3703 static void rtl8152_set_msglevel(struct net_device *dev, u32 value)
3705 struct r8152 *tp = netdev_priv(dev);
3707 tp->msg_enable = value;
3710 static void rtl8152_get_drvinfo(struct net_device *netdev,
3711 struct ethtool_drvinfo *info)
3713 struct r8152 *tp = netdev_priv(netdev);
3715 strlcpy(info->driver, MODULENAME, sizeof(info->driver));
3716 strlcpy(info->version, DRIVER_VERSION, sizeof(info->version));
3717 usb_make_path(tp->udev, info->bus_info, sizeof(info->bus_info));
3721 int rtl8152_get_settings(struct net_device *netdev, struct ethtool_cmd *cmd)
3723 struct r8152 *tp = netdev_priv(netdev);
3726 if (!tp->mii.mdio_read)
3729 ret = usb_autopm_get_interface(tp->intf);
3733 mutex_lock(&tp->control);
3735 ret = mii_ethtool_gset(&tp->mii, cmd);
3737 mutex_unlock(&tp->control);
3739 usb_autopm_put_interface(tp->intf);
3745 static int rtl8152_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
3747 struct r8152 *tp = netdev_priv(dev);
3750 ret = usb_autopm_get_interface(tp->intf);
3754 mutex_lock(&tp->control);
3756 ret = rtl8152_set_speed(tp, cmd->autoneg, cmd->speed, cmd->duplex);
3758 mutex_unlock(&tp->control);
3760 usb_autopm_put_interface(tp->intf);
3766 static const char rtl8152_gstrings[][ETH_GSTRING_LEN] = {
3773 "tx_single_collisions",
3774 "tx_multi_collisions",
3782 static int rtl8152_get_sset_count(struct net_device *dev, int sset)
3786 return ARRAY_SIZE(rtl8152_gstrings);
3792 static void rtl8152_get_ethtool_stats(struct net_device *dev,
3793 struct ethtool_stats *stats, u64 *data)
3795 struct r8152 *tp = netdev_priv(dev);
3796 struct tally_counter tally;
3798 if (usb_autopm_get_interface(tp->intf) < 0)
3801 generic_ocp_read(tp, PLA_TALLYCNT, sizeof(tally), &tally, MCU_TYPE_PLA);
3803 usb_autopm_put_interface(tp->intf);
3805 data[0] = le64_to_cpu(tally.tx_packets);
3806 data[1] = le64_to_cpu(tally.rx_packets);
3807 data[2] = le64_to_cpu(tally.tx_errors);
3808 data[3] = le32_to_cpu(tally.rx_errors);
3809 data[4] = le16_to_cpu(tally.rx_missed);
3810 data[5] = le16_to_cpu(tally.align_errors);
3811 data[6] = le32_to_cpu(tally.tx_one_collision);
3812 data[7] = le32_to_cpu(tally.tx_multi_collision);
3813 data[8] = le64_to_cpu(tally.rx_unicast);
3814 data[9] = le64_to_cpu(tally.rx_broadcast);
3815 data[10] = le32_to_cpu(tally.rx_multicast);
3816 data[11] = le16_to_cpu(tally.tx_aborted);
3817 data[12] = le16_to_cpu(tally.tx_underrun);
3820 static void rtl8152_get_strings(struct net_device *dev, u32 stringset, u8 *data)
3822 switch (stringset) {
3824 memcpy(data, rtl8152_gstrings, sizeof(rtl8152_gstrings));
3829 static int r8152_get_eee(struct r8152 *tp, struct ethtool_eee *eee)
3831 u32 ocp_data, lp, adv, supported = 0;
3834 val = r8152_mmd_read(tp, MDIO_MMD_PCS, MDIO_PCS_EEE_ABLE);
3835 supported = mmd_eee_cap_to_ethtool_sup_t(val);
3837 val = r8152_mmd_read(tp, MDIO_MMD_AN, MDIO_AN_EEE_ADV);
3838 adv = mmd_eee_adv_to_ethtool_adv_t(val);
3840 val = r8152_mmd_read(tp, MDIO_MMD_AN, MDIO_AN_EEE_LPABLE);
3841 lp = mmd_eee_adv_to_ethtool_adv_t(val);
3843 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
3844 ocp_data &= EEE_RX_EN | EEE_TX_EN;
3846 eee->eee_enabled = !!ocp_data;
3847 eee->eee_active = !!(supported & adv & lp);
3848 eee->supported = supported;
3849 eee->advertised = adv;
3850 eee->lp_advertised = lp;
3855 static int r8152_set_eee(struct r8152 *tp, struct ethtool_eee *eee)
3857 u16 val = ethtool_adv_to_mmd_eee_adv_t(eee->advertised);
3859 r8152_eee_en(tp, eee->eee_enabled);
3861 if (!eee->eee_enabled)
3864 r8152_mmd_write(tp, MDIO_MMD_AN, MDIO_AN_EEE_ADV, val);
3869 static int r8153_get_eee(struct r8152 *tp, struct ethtool_eee *eee)
3871 u32 ocp_data, lp, adv, supported = 0;
3874 val = ocp_reg_read(tp, OCP_EEE_ABLE);
3875 supported = mmd_eee_cap_to_ethtool_sup_t(val);
3877 val = ocp_reg_read(tp, OCP_EEE_ADV);
3878 adv = mmd_eee_adv_to_ethtool_adv_t(val);
3880 val = ocp_reg_read(tp, OCP_EEE_LPABLE);
3881 lp = mmd_eee_adv_to_ethtool_adv_t(val);
3883 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
3884 ocp_data &= EEE_RX_EN | EEE_TX_EN;
3886 eee->eee_enabled = !!ocp_data;
3887 eee->eee_active = !!(supported & adv & lp);
3888 eee->supported = supported;
3889 eee->advertised = adv;
3890 eee->lp_advertised = lp;
3895 static int r8153_set_eee(struct r8152 *tp, struct ethtool_eee *eee)
3897 u16 val = ethtool_adv_to_mmd_eee_adv_t(eee->advertised);
3899 r8153_eee_en(tp, eee->eee_enabled);
3901 if (!eee->eee_enabled)
3904 ocp_reg_write(tp, OCP_EEE_ADV, val);
3910 rtl_ethtool_get_eee(struct net_device *net, struct ethtool_eee *edata)
3912 struct r8152 *tp = netdev_priv(net);
3915 ret = usb_autopm_get_interface(tp->intf);
3919 mutex_lock(&tp->control);
3921 ret = tp->rtl_ops.eee_get(tp, edata);
3923 mutex_unlock(&tp->control);
3925 usb_autopm_put_interface(tp->intf);
3932 rtl_ethtool_set_eee(struct net_device *net, struct ethtool_eee *edata)
3934 struct r8152 *tp = netdev_priv(net);
3937 ret = usb_autopm_get_interface(tp->intf);
3941 mutex_lock(&tp->control);
3943 ret = tp->rtl_ops.eee_set(tp, edata);
3945 ret = mii_nway_restart(&tp->mii);
3947 mutex_unlock(&tp->control);
3949 usb_autopm_put_interface(tp->intf);
3955 static int rtl8152_nway_reset(struct net_device *dev)
3957 struct r8152 *tp = netdev_priv(dev);
3960 ret = usb_autopm_get_interface(tp->intf);
3964 mutex_lock(&tp->control);
3966 ret = mii_nway_restart(&tp->mii);
3968 mutex_unlock(&tp->control);
3970 usb_autopm_put_interface(tp->intf);
3976 static int rtl8152_get_coalesce(struct net_device *netdev,
3977 struct ethtool_coalesce *coalesce)
3979 struct r8152 *tp = netdev_priv(netdev);
3981 switch (tp->version) {
3989 coalesce->rx_coalesce_usecs = tp->coalesce;
3994 static int rtl8152_set_coalesce(struct net_device *netdev,
3995 struct ethtool_coalesce *coalesce)
3997 struct r8152 *tp = netdev_priv(netdev);
4000 switch (tp->version) {
4008 if (coalesce->rx_coalesce_usecs > COALESCE_SLOW)
4011 ret = usb_autopm_get_interface(tp->intf);
4015 mutex_lock(&tp->control);
4017 if (tp->coalesce != coalesce->rx_coalesce_usecs) {
4018 tp->coalesce = coalesce->rx_coalesce_usecs;
4020 if (netif_running(tp->netdev) && netif_carrier_ok(netdev))
4021 r8153_set_rx_early_timeout(tp);
4024 mutex_unlock(&tp->control);
4026 usb_autopm_put_interface(tp->intf);
4031 static struct ethtool_ops ops = {
4032 .get_drvinfo = rtl8152_get_drvinfo,
4033 .get_settings = rtl8152_get_settings,
4034 .set_settings = rtl8152_set_settings,
4035 .get_link = ethtool_op_get_link,
4036 .nway_reset = rtl8152_nway_reset,
4037 .get_msglevel = rtl8152_get_msglevel,
4038 .set_msglevel = rtl8152_set_msglevel,
4039 .get_wol = rtl8152_get_wol,
4040 .set_wol = rtl8152_set_wol,
4041 .get_strings = rtl8152_get_strings,
4042 .get_sset_count = rtl8152_get_sset_count,
4043 .get_ethtool_stats = rtl8152_get_ethtool_stats,
4044 .get_coalesce = rtl8152_get_coalesce,
4045 .set_coalesce = rtl8152_set_coalesce,
4046 .get_eee = rtl_ethtool_get_eee,
4047 .set_eee = rtl_ethtool_set_eee,
4050 static int rtl8152_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd)
4052 struct r8152 *tp = netdev_priv(netdev);
4053 struct mii_ioctl_data *data = if_mii(rq);
4056 if (test_bit(RTL8152_UNPLUG, &tp->flags))
4059 res = usb_autopm_get_interface(tp->intf);
4065 data->phy_id = R8152_PHY_ID; /* Internal PHY */
4069 mutex_lock(&tp->control);
4070 data->val_out = r8152_mdio_read(tp, data->reg_num);
4071 mutex_unlock(&tp->control);
4075 if (!capable(CAP_NET_ADMIN)) {
4079 mutex_lock(&tp->control);
4080 r8152_mdio_write(tp, data->reg_num, data->val_in);
4081 mutex_unlock(&tp->control);
4088 usb_autopm_put_interface(tp->intf);
4094 static int rtl8152_change_mtu(struct net_device *dev, int new_mtu)
4096 struct r8152 *tp = netdev_priv(dev);
4099 switch (tp->version) {
4102 return eth_change_mtu(dev, new_mtu);
4107 if (new_mtu < 68 || new_mtu > RTL8153_MAX_MTU)
4110 ret = usb_autopm_get_interface(tp->intf);
4114 mutex_lock(&tp->control);
4118 if (netif_running(dev) && netif_carrier_ok(dev))
4119 r8153_set_rx_early_size(tp);
4121 mutex_unlock(&tp->control);
4123 usb_autopm_put_interface(tp->intf);
4128 static const struct net_device_ops rtl8152_netdev_ops = {
4129 .ndo_open = rtl8152_open,
4130 .ndo_stop = rtl8152_close,
4131 .ndo_do_ioctl = rtl8152_ioctl,
4132 .ndo_start_xmit = rtl8152_start_xmit,
4133 .ndo_tx_timeout = rtl8152_tx_timeout,
4134 .ndo_set_features = rtl8152_set_features,
4135 .ndo_set_rx_mode = rtl8152_set_rx_mode,
4136 .ndo_set_mac_address = rtl8152_set_mac_address,
4137 .ndo_change_mtu = rtl8152_change_mtu,
4138 .ndo_validate_addr = eth_validate_addr,
4139 .ndo_features_check = rtl8152_features_check,
4142 static void r8152b_get_version(struct r8152 *tp)
4147 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR1);
4148 version = (u16)(ocp_data & VERSION_MASK);
4152 tp->version = RTL_VER_01;
4155 tp->version = RTL_VER_02;
4158 tp->version = RTL_VER_03;
4159 tp->mii.supports_gmii = 1;
4162 tp->version = RTL_VER_04;
4163 tp->mii.supports_gmii = 1;
4166 tp->version = RTL_VER_05;
4167 tp->mii.supports_gmii = 1;
4170 tp->version = RTL_VER_06;
4171 tp->mii.supports_gmii = 1;
4174 netif_info(tp, probe, tp->netdev,
4175 "Unknown version 0x%04x\n", version);
4180 static void rtl8152_unload(struct r8152 *tp)
4182 if (test_bit(RTL8152_UNPLUG, &tp->flags))
4185 if (tp->version != RTL_VER_01)
4186 r8152_power_cut_en(tp, true);
4189 static void rtl8153_unload(struct r8152 *tp)
4191 if (test_bit(RTL8152_UNPLUG, &tp->flags))
4194 r8153_power_cut_en(tp, false);
4197 static int rtl_ops_init(struct r8152 *tp)
4199 struct rtl_ops *ops = &tp->rtl_ops;
4202 switch (tp->version) {
4205 ops->init = r8152b_init;
4206 ops->enable = rtl8152_enable;
4207 ops->disable = rtl8152_disable;
4208 ops->up = rtl8152_up;
4209 ops->down = rtl8152_down;
4210 ops->unload = rtl8152_unload;
4211 ops->eee_get = r8152_get_eee;
4212 ops->eee_set = r8152_set_eee;
4213 ops->in_nway = rtl8152_in_nway;
4220 ops->init = r8153_init;
4221 ops->enable = rtl8153_enable;
4222 ops->disable = rtl8153_disable;
4223 ops->up = rtl8153_up;
4224 ops->down = rtl8153_down;
4225 ops->unload = rtl8153_unload;
4226 ops->eee_get = r8153_get_eee;
4227 ops->eee_set = r8153_set_eee;
4228 ops->in_nway = rtl8153_in_nway;
4233 netif_err(tp, probe, tp->netdev, "Unknown Device\n");
4240 static int rtl8152_probe(struct usb_interface *intf,
4241 const struct usb_device_id *id)
4243 struct usb_device *udev = interface_to_usbdev(intf);
4245 struct net_device *netdev;
4248 if (udev->actconfig->desc.bConfigurationValue != 1) {
4249 usb_driver_set_configuration(udev, 1);
4253 if (intf->cur_altsetting->desc.bNumEndpoints < 3)
4256 usb_reset_device(udev);
4257 netdev = alloc_etherdev(sizeof(struct r8152));
4259 dev_err(&intf->dev, "Out of memory\n");
4263 SET_NETDEV_DEV(netdev, &intf->dev);
4264 tp = netdev_priv(netdev);
4265 tp->msg_enable = 0x7FFF;
4268 tp->netdev = netdev;
4271 r8152b_get_version(tp);
4272 ret = rtl_ops_init(tp);
4276 mutex_init(&tp->control);
4277 INIT_DELAYED_WORK(&tp->schedule, rtl_work_func_t);
4279 netdev->netdev_ops = &rtl8152_netdev_ops;
4280 netdev->watchdog_timeo = RTL8152_TX_TIMEOUT;
4282 netdev->features |= NETIF_F_RXCSUM | NETIF_F_IP_CSUM | NETIF_F_SG |
4283 NETIF_F_TSO | NETIF_F_FRAGLIST | NETIF_F_IPV6_CSUM |
4284 NETIF_F_TSO6 | NETIF_F_HW_VLAN_CTAG_RX |
4285 NETIF_F_HW_VLAN_CTAG_TX;
4286 netdev->hw_features = NETIF_F_RXCSUM | NETIF_F_IP_CSUM | NETIF_F_SG |
4287 NETIF_F_TSO | NETIF_F_FRAGLIST |
4288 NETIF_F_IPV6_CSUM | NETIF_F_TSO6 |
4289 NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HW_VLAN_CTAG_TX;
4290 netdev->vlan_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_TSO |
4291 NETIF_F_HIGHDMA | NETIF_F_FRAGLIST |
4292 NETIF_F_IPV6_CSUM | NETIF_F_TSO6;
4294 if (tp->version == RTL_VER_01) {
4295 netdev->features &= ~NETIF_F_RXCSUM;
4296 netdev->hw_features &= ~NETIF_F_RXCSUM;
4299 netdev->ethtool_ops = &ops;
4300 netif_set_gso_max_size(netdev, RTL_LIMITED_TSO_SIZE);
4302 tp->mii.dev = netdev;
4303 tp->mii.mdio_read = read_mii_word;
4304 tp->mii.mdio_write = write_mii_word;
4305 tp->mii.phy_id_mask = 0x3f;
4306 tp->mii.reg_num_mask = 0x1f;
4307 tp->mii.phy_id = R8152_PHY_ID;
4309 switch (udev->speed) {
4310 case USB_SPEED_SUPER:
4311 tp->coalesce = COALESCE_SUPER;
4313 case USB_SPEED_HIGH:
4314 tp->coalesce = COALESCE_HIGH;
4317 tp->coalesce = COALESCE_SLOW;
4321 intf->needs_remote_wakeup = 1;
4323 if (!rtl_can_wakeup(tp))
4324 __rtl_set_wol(tp, 0);
4326 tp->saved_wolopts = __rtl_get_wol(tp);
4328 tp->rtl_ops.init(tp);
4329 set_ethernet_addr(tp);
4331 usb_set_intfdata(intf, tp);
4332 netif_napi_add(netdev, &tp->napi, r8152_poll, RTL8152_NAPI_WEIGHT);
4334 ret = register_netdev(netdev);
4336 netif_err(tp, probe, netdev, "couldn't register the device\n");
4340 if (tp->saved_wolopts)
4341 device_set_wakeup_enable(&udev->dev, true);
4343 device_set_wakeup_enable(&udev->dev, false);
4345 netif_info(tp, probe, netdev, "%s\n", DRIVER_VERSION);
4350 netif_napi_del(&tp->napi);
4351 usb_set_intfdata(intf, NULL);
4353 free_netdev(netdev);
4357 static void rtl8152_disconnect(struct usb_interface *intf)
4359 struct r8152 *tp = usb_get_intfdata(intf);
4361 usb_set_intfdata(intf, NULL);
4363 struct usb_device *udev = tp->udev;
4365 if (udev->state == USB_STATE_NOTATTACHED)
4366 set_bit(RTL8152_UNPLUG, &tp->flags);
4368 netif_napi_del(&tp->napi);
4369 unregister_netdev(tp->netdev);
4370 tp->rtl_ops.unload(tp);
4371 free_netdev(tp->netdev);
4375 #define REALTEK_USB_DEVICE(vend, prod) \
4376 .match_flags = USB_DEVICE_ID_MATCH_DEVICE | \
4377 USB_DEVICE_ID_MATCH_INT_CLASS, \
4378 .idVendor = (vend), \
4379 .idProduct = (prod), \
4380 .bInterfaceClass = USB_CLASS_VENDOR_SPEC \
4383 .match_flags = USB_DEVICE_ID_MATCH_INT_INFO | \
4384 USB_DEVICE_ID_MATCH_DEVICE, \
4385 .idVendor = (vend), \
4386 .idProduct = (prod), \
4387 .bInterfaceClass = USB_CLASS_COMM, \
4388 .bInterfaceSubClass = USB_CDC_SUBCLASS_ETHERNET, \
4389 .bInterfaceProtocol = USB_CDC_PROTO_NONE
4391 /* table of devices that work with this driver */
4392 static struct usb_device_id rtl8152_table[] = {
4393 {REALTEK_USB_DEVICE(VENDOR_ID_REALTEK, 0x8152)},
4394 {REALTEK_USB_DEVICE(VENDOR_ID_REALTEK, 0x8153)},
4395 {REALTEK_USB_DEVICE(VENDOR_ID_SAMSUNG, 0xa101)},
4396 {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO, 0x7205)},
4397 {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO, 0x304f)},
4398 {REALTEK_USB_DEVICE(VENDOR_ID_LINKSYS, 0x0041)},
4399 {REALTEK_USB_DEVICE(VENDOR_ID_NVIDIA, 0x09ff)},
4403 MODULE_DEVICE_TABLE(usb, rtl8152_table);
4405 static struct usb_driver rtl8152_driver = {
4407 .id_table = rtl8152_table,
4408 .probe = rtl8152_probe,
4409 .disconnect = rtl8152_disconnect,
4410 .suspend = rtl8152_suspend,
4411 .resume = rtl8152_resume,
4412 .reset_resume = rtl8152_reset_resume,
4413 .pre_reset = rtl8152_pre_reset,
4414 .post_reset = rtl8152_post_reset,
4415 .supports_autosuspend = 1,
4416 .disable_hub_initiated_lpm = 1,
4419 module_usb_driver(rtl8152_driver);
4421 MODULE_AUTHOR(DRIVER_AUTHOR);
4422 MODULE_DESCRIPTION(DRIVER_DESC);
4423 MODULE_LICENSE("GPL");