2 * QLogic Fibre Channel HBA Driver
3 * Copyright (c) 2003-2014 QLogic Corporation
5 * See LICENSE.qla2xxx for copyright and licensing details.
9 #include <linux/moduleparam.h>
10 #include <linux/vmalloc.h>
11 #include <linux/delay.h>
12 #include <linux/kthread.h>
13 #include <linux/mutex.h>
14 #include <linux/kobject.h>
15 #include <linux/slab.h>
16 #include <linux/blk-mq-pci.h>
17 #include <scsi/scsi_tcq.h>
18 #include <scsi/scsicam.h>
19 #include <scsi/scsi_transport.h>
20 #include <scsi/scsi_transport_fc.h>
22 #include "qla_target.h"
27 char qla2x00_version_str[40];
29 static int apidev_major;
32 * SRB allocation cache
34 struct kmem_cache *srb_cachep;
37 * CT6 CTX allocation cache
39 static struct kmem_cache *ctx_cachep;
41 * error level for logging
43 int ql_errlev = ql_log_all;
45 static int ql2xenableclass2;
46 module_param(ql2xenableclass2, int, S_IRUGO|S_IRUSR);
47 MODULE_PARM_DESC(ql2xenableclass2,
48 "Specify if Class 2 operations are supported from the very "
49 "beginning. Default is 0 - class 2 not supported.");
52 int ql2xlogintimeout = 20;
53 module_param(ql2xlogintimeout, int, S_IRUGO);
54 MODULE_PARM_DESC(ql2xlogintimeout,
55 "Login timeout value in seconds.");
57 int qlport_down_retry;
58 module_param(qlport_down_retry, int, S_IRUGO);
59 MODULE_PARM_DESC(qlport_down_retry,
60 "Maximum number of command retries to a port that returns "
61 "a PORT-DOWN status.");
63 int ql2xplogiabsentdevice;
64 module_param(ql2xplogiabsentdevice, int, S_IRUGO|S_IWUSR);
65 MODULE_PARM_DESC(ql2xplogiabsentdevice,
66 "Option to enable PLOGI to devices that are not present after "
67 "a Fabric scan. This is needed for several broken switches. "
68 "Default is 0 - no PLOGI. 1 - perfom PLOGI.");
70 int ql2xloginretrycount = 0;
71 module_param(ql2xloginretrycount, int, S_IRUGO);
72 MODULE_PARM_DESC(ql2xloginretrycount,
73 "Specify an alternate value for the NVRAM login retry count.");
75 int ql2xallocfwdump = 1;
76 module_param(ql2xallocfwdump, int, S_IRUGO);
77 MODULE_PARM_DESC(ql2xallocfwdump,
78 "Option to enable allocation of memory for a firmware dump "
79 "during HBA initialization. Memory allocation requirements "
80 "vary by ISP type. Default is 1 - allocate memory.");
82 int ql2xextended_error_logging;
83 module_param(ql2xextended_error_logging, int, S_IRUGO|S_IWUSR);
84 module_param_named(logging, ql2xextended_error_logging, int, S_IRUGO|S_IWUSR);
85 MODULE_PARM_DESC(ql2xextended_error_logging,
86 "Option to enable extended error logging,\n"
87 "\t\tDefault is 0 - no logging. 0x40000000 - Module Init & Probe.\n"
88 "\t\t0x20000000 - Mailbox Cmnds. 0x10000000 - Device Discovery.\n"
89 "\t\t0x08000000 - IO tracing. 0x04000000 - DPC Thread.\n"
90 "\t\t0x02000000 - Async events. 0x01000000 - Timer routines.\n"
91 "\t\t0x00800000 - User space. 0x00400000 - Task Management.\n"
92 "\t\t0x00200000 - AER/EEH. 0x00100000 - Multi Q.\n"
93 "\t\t0x00080000 - P3P Specific. 0x00040000 - Virtual Port.\n"
94 "\t\t0x00020000 - Buffer Dump. 0x00010000 - Misc.\n"
95 "\t\t0x00008000 - Verbose. 0x00004000 - Target.\n"
96 "\t\t0x00002000 - Target Mgmt. 0x00001000 - Target TMF.\n"
97 "\t\t0x7fffffff - For enabling all logs, can be too many logs.\n"
98 "\t\t0x1e400000 - Preferred value for capturing essential "
99 "debug information (equivalent to old "
100 "ql2xextended_error_logging=1).\n"
101 "\t\tDo LOGICAL OR of the value to enable more than one level");
103 int ql2xshiftctondsd = 6;
104 module_param(ql2xshiftctondsd, int, S_IRUGO);
105 MODULE_PARM_DESC(ql2xshiftctondsd,
106 "Set to control shifting of command type processing "
107 "based on total number of SG elements.");
109 int ql2xfdmienable=1;
110 module_param(ql2xfdmienable, int, S_IRUGO|S_IWUSR);
111 module_param_named(fdmi, ql2xfdmienable, int, S_IRUGO|S_IWUSR);
112 MODULE_PARM_DESC(ql2xfdmienable,
113 "Enables FDMI registrations. "
114 "0 - no FDMI. Default is 1 - perform FDMI.");
116 #define MAX_Q_DEPTH 64
117 static int ql2xmaxqdepth = MAX_Q_DEPTH;
118 module_param(ql2xmaxqdepth, int, S_IRUGO|S_IWUSR);
119 MODULE_PARM_DESC(ql2xmaxqdepth,
120 "Maximum queue depth to set for each LUN. "
123 #if (IS_ENABLED(CONFIG_NVME_FC))
126 int ql2xenabledif = 2;
128 module_param(ql2xenabledif, int, S_IRUGO);
129 MODULE_PARM_DESC(ql2xenabledif,
130 " Enable T10-CRC-DIF:\n"
132 " 0 -- No DIF Support\n"
133 " 1 -- Enable DIF for all types\n"
134 " 2 -- Enable DIF for all types, except Type 0.\n");
136 #if (IS_ENABLED(CONFIG_NVME_FC))
137 int ql2xnvmeenable = 1;
141 module_param(ql2xnvmeenable, int, 0644);
142 MODULE_PARM_DESC(ql2xnvmeenable,
143 "Enables NVME support. "
144 "0 - no NVMe. Default is Y");
146 int ql2xenablehba_err_chk = 2;
147 module_param(ql2xenablehba_err_chk, int, S_IRUGO|S_IWUSR);
148 MODULE_PARM_DESC(ql2xenablehba_err_chk,
149 " Enable T10-CRC-DIF Error isolation by HBA:\n"
151 " 0 -- Error isolation disabled\n"
152 " 1 -- Error isolation enabled only for DIX Type 0\n"
153 " 2 -- Error isolation enabled for all Types\n");
155 int ql2xiidmaenable=1;
156 module_param(ql2xiidmaenable, int, S_IRUGO);
157 MODULE_PARM_DESC(ql2xiidmaenable,
158 "Enables iIDMA settings "
159 "Default is 1 - perform iIDMA. 0 - no iIDMA.");
161 int ql2xmqsupport = 1;
162 module_param(ql2xmqsupport, int, S_IRUGO);
163 MODULE_PARM_DESC(ql2xmqsupport,
164 "Enable on demand multiple queue pairs support "
165 "Default is 1 for supported. "
166 "Set it to 0 to turn off mq qpair support.");
169 module_param(ql2xfwloadbin, int, S_IRUGO|S_IWUSR);
170 module_param_named(fwload, ql2xfwloadbin, int, S_IRUGO|S_IWUSR);
171 MODULE_PARM_DESC(ql2xfwloadbin,
172 "Option to specify location from which to load ISP firmware:.\n"
173 " 2 -- load firmware via the reject_firmware() (hotplug).\n"
175 " 1 -- load firmware from flash.\n"
176 " 0 -- use default semantics.\n");
179 module_param(ql2xetsenable, int, S_IRUGO);
180 MODULE_PARM_DESC(ql2xetsenable,
181 "Enables firmware ETS burst."
182 "Default is 0 - skip ETS enablement.");
185 module_param(ql2xdbwr, int, S_IRUGO|S_IWUSR);
186 MODULE_PARM_DESC(ql2xdbwr,
187 "Option to specify scheme for request queue posting.\n"
188 " 0 -- Regular doorbell.\n"
189 " 1 -- CAMRAM doorbell (faster).\n");
192 module_param(ql2xgffidenable, int, S_IRUGO);
193 MODULE_PARM_DESC(ql2xgffidenable,
194 "Enables GFF_ID checks of port type. "
195 "Default is 0 - Do not use GFF_ID information.");
197 int ql2xasynctmfenable = 1;
198 module_param(ql2xasynctmfenable, int, S_IRUGO);
199 MODULE_PARM_DESC(ql2xasynctmfenable,
200 "Enables issue of TM IOCBs asynchronously via IOCB mechanism"
201 "Default is 0 - Issue TM IOCBs via mailbox mechanism.");
203 int ql2xdontresethba;
204 module_param(ql2xdontresethba, int, S_IRUGO|S_IWUSR);
205 MODULE_PARM_DESC(ql2xdontresethba,
206 "Option to specify reset behaviour.\n"
207 " 0 (Default) -- Reset on failure.\n"
208 " 1 -- Do not reset on failure.\n");
210 uint64_t ql2xmaxlun = MAX_LUNS;
211 module_param(ql2xmaxlun, ullong, S_IRUGO);
212 MODULE_PARM_DESC(ql2xmaxlun,
213 "Defines the maximum LU number to register with the SCSI "
214 "midlayer. Default is 65535.");
216 int ql2xmdcapmask = 0x1F;
217 module_param(ql2xmdcapmask, int, S_IRUGO);
218 MODULE_PARM_DESC(ql2xmdcapmask,
219 "Set the Minidump driver capture mask level. "
220 "Default is 0x1F - Can be set to 0x3, 0x7, 0xF, 0x1F, 0x7F.");
222 int ql2xmdenable = 1;
223 module_param(ql2xmdenable, int, S_IRUGO);
224 MODULE_PARM_DESC(ql2xmdenable,
225 "Enable/disable MiniDump. "
226 "0 - MiniDump disabled. "
227 "1 (Default) - MiniDump enabled.");
229 int ql2xexlogins = 0;
230 module_param(ql2xexlogins, uint, S_IRUGO|S_IWUSR);
231 MODULE_PARM_DESC(ql2xexlogins,
232 "Number of extended Logins. "
233 "0 (Default)- Disabled.");
235 int ql2xexchoffld = 1024;
236 module_param(ql2xexchoffld, uint, 0644);
237 MODULE_PARM_DESC(ql2xexchoffld,
238 "Number of target exchanges.");
240 int ql2xiniexchg = 1024;
241 module_param(ql2xiniexchg, uint, 0644);
242 MODULE_PARM_DESC(ql2xiniexchg,
243 "Number of initiator exchanges.");
245 int ql2xfwholdabts = 0;
246 module_param(ql2xfwholdabts, int, S_IRUGO);
247 MODULE_PARM_DESC(ql2xfwholdabts,
248 "Allow FW to hold status IOCB until ABTS rsp received. "
249 "0 (Default) Do not set fw option. "
250 "1 - Set fw option to hold ABTS.");
252 int ql2xmvasynctoatio = 1;
253 module_param(ql2xmvasynctoatio, int, S_IRUGO|S_IWUSR);
254 MODULE_PARM_DESC(ql2xmvasynctoatio,
255 "Move PUREX, ABTS RX and RIDA IOCBs to ATIOQ"
256 "0 (Default). Do not move IOCBs"
259 int ql2xautodetectsfp = 1;
260 module_param(ql2xautodetectsfp, int, 0444);
261 MODULE_PARM_DESC(ql2xautodetectsfp,
262 "Detect SFP range and set appropriate distance.\n"
263 "1 (Default): Enable\n");
265 int ql2xenablemsix = 1;
266 module_param(ql2xenablemsix, int, 0444);
267 MODULE_PARM_DESC(ql2xenablemsix,
268 "Set to enable MSI or MSI-X interrupt mechanism.\n"
269 " Default is 1, enable MSI-X interrupt mechanism.\n"
270 " 0 -- enable traditional pin-based mechanism.\n"
271 " 1 -- enable MSI-X interrupt mechanism.\n"
272 " 2 -- enable MSI interrupt mechanism.\n");
274 int qla2xuseresexchforels;
275 module_param(qla2xuseresexchforels, int, 0444);
276 MODULE_PARM_DESC(qla2xuseresexchforels,
277 "Reserve 1/2 of emergency exchanges for ELS.\n"
278 " 0 (default): disabled");
281 * SCSI host template entry points
283 static int qla2xxx_slave_configure(struct scsi_device * device);
284 static int qla2xxx_slave_alloc(struct scsi_device *);
285 static int qla2xxx_scan_finished(struct Scsi_Host *, unsigned long time);
286 static void qla2xxx_scan_start(struct Scsi_Host *);
287 static void qla2xxx_slave_destroy(struct scsi_device *);
288 static int qla2xxx_queuecommand(struct Scsi_Host *h, struct scsi_cmnd *cmd);
289 static int qla2xxx_eh_abort(struct scsi_cmnd *);
290 static int qla2xxx_eh_device_reset(struct scsi_cmnd *);
291 static int qla2xxx_eh_target_reset(struct scsi_cmnd *);
292 static int qla2xxx_eh_bus_reset(struct scsi_cmnd *);
293 static int qla2xxx_eh_host_reset(struct scsi_cmnd *);
295 static void qla2x00_clear_drv_active(struct qla_hw_data *);
296 static void qla2x00_free_device(scsi_qla_host_t *);
297 static int qla2xxx_map_queues(struct Scsi_Host *shost);
298 static void qla2x00_destroy_deferred_work(struct qla_hw_data *);
301 struct scsi_host_template qla2xxx_driver_template = {
302 .module = THIS_MODULE,
303 .name = QLA2XXX_DRIVER_NAME,
304 .queuecommand = qla2xxx_queuecommand,
306 .eh_timed_out = fc_eh_timed_out,
307 .eh_abort_handler = qla2xxx_eh_abort,
308 .eh_device_reset_handler = qla2xxx_eh_device_reset,
309 .eh_target_reset_handler = qla2xxx_eh_target_reset,
310 .eh_bus_reset_handler = qla2xxx_eh_bus_reset,
311 .eh_host_reset_handler = qla2xxx_eh_host_reset,
313 .slave_configure = qla2xxx_slave_configure,
315 .slave_alloc = qla2xxx_slave_alloc,
316 .slave_destroy = qla2xxx_slave_destroy,
317 .scan_finished = qla2xxx_scan_finished,
318 .scan_start = qla2xxx_scan_start,
319 .change_queue_depth = scsi_change_queue_depth,
320 .map_queues = qla2xxx_map_queues,
323 .use_clustering = ENABLE_CLUSTERING,
324 .sg_tablesize = SG_ALL,
326 .max_sectors = 0xFFFF,
327 .shost_attrs = qla2x00_host_attrs,
329 .supported_mode = MODE_INITIATOR,
330 .track_queue_depth = 1,
333 static struct scsi_transport_template *qla2xxx_transport_template = NULL;
334 struct scsi_transport_template *qla2xxx_transport_vport_template = NULL;
336 /* TODO Convert to inlines
342 qla2x00_start_timer(scsi_qla_host_t *vha, unsigned long interval)
344 timer_setup(&vha->timer, qla2x00_timer, 0);
345 vha->timer.expires = jiffies + interval * HZ;
346 add_timer(&vha->timer);
347 vha->timer_active = 1;
351 qla2x00_restart_timer(scsi_qla_host_t *vha, unsigned long interval)
353 /* Currently used for 82XX only. */
354 if (vha->device_flags & DFLG_DEV_FAILED) {
355 ql_dbg(ql_dbg_timer, vha, 0x600d,
356 "Device in a failed state, returning.\n");
360 mod_timer(&vha->timer, jiffies + interval * HZ);
363 static __inline__ void
364 qla2x00_stop_timer(scsi_qla_host_t *vha)
366 del_timer_sync(&vha->timer);
367 vha->timer_active = 0;
370 static int qla2x00_do_dpc(void *data);
372 static void qla2x00_rst_aen(scsi_qla_host_t *);
374 static int qla2x00_mem_alloc(struct qla_hw_data *, uint16_t, uint16_t,
375 struct req_que **, struct rsp_que **);
376 static void qla2x00_free_fw_dump(struct qla_hw_data *);
377 static void qla2x00_mem_free(struct qla_hw_data *);
378 int qla2xxx_mqueuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd,
379 struct qla_qpair *qpair);
381 /* -------------------------------------------------------------------------- */
382 static void qla_init_base_qpair(struct scsi_qla_host *vha, struct req_que *req,
385 struct qla_hw_data *ha = vha->hw;
386 rsp->qpair = ha->base_qpair;
388 ha->base_qpair->req = req;
389 ha->base_qpair->rsp = rsp;
390 ha->base_qpair->vha = vha;
391 ha->base_qpair->qp_lock_ptr = &ha->hardware_lock;
392 ha->base_qpair->use_shadow_reg = IS_SHADOW_REG_CAPABLE(ha) ? 1 : 0;
393 ha->base_qpair->msix = &ha->msix_entries[QLA_MSIX_RSP_Q];
394 INIT_LIST_HEAD(&ha->base_qpair->hints_list);
395 ha->base_qpair->enable_class_2 = ql2xenableclass2;
396 /* init qpair to this cpu. Will adjust at run time. */
397 qla_cpu_update(rsp->qpair, raw_smp_processor_id());
398 ha->base_qpair->pdev = ha->pdev;
400 if (IS_QLA27XX(ha) || IS_QLA83XX(ha))
401 ha->base_qpair->reqq_start_iocbs = qla_83xx_start_iocbs;
404 static int qla2x00_alloc_queues(struct qla_hw_data *ha, struct req_que *req,
407 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
408 ha->req_q_map = kcalloc(ha->max_req_queues, sizeof(struct req_que *),
410 if (!ha->req_q_map) {
411 ql_log(ql_log_fatal, vha, 0x003b,
412 "Unable to allocate memory for request queue ptrs.\n");
416 ha->rsp_q_map = kcalloc(ha->max_rsp_queues, sizeof(struct rsp_que *),
418 if (!ha->rsp_q_map) {
419 ql_log(ql_log_fatal, vha, 0x003c,
420 "Unable to allocate memory for response queue ptrs.\n");
424 ha->base_qpair = kzalloc(sizeof(struct qla_qpair), GFP_KERNEL);
425 if (ha->base_qpair == NULL) {
426 ql_log(ql_log_warn, vha, 0x00e0,
427 "Failed to allocate base queue pair memory.\n");
428 goto fail_base_qpair;
431 qla_init_base_qpair(vha, req, rsp);
433 if ((ql2xmqsupport || ql2xnvmeenable) && ha->max_qpairs) {
434 ha->queue_pair_map = kcalloc(ha->max_qpairs, sizeof(struct qla_qpair *),
436 if (!ha->queue_pair_map) {
437 ql_log(ql_log_fatal, vha, 0x0180,
438 "Unable to allocate memory for queue pair ptrs.\n");
444 * Make sure we record at least the request and response queue zero in
445 * case we need to free them if part of the probe fails.
447 ha->rsp_q_map[0] = rsp;
448 ha->req_q_map[0] = req;
449 set_bit(0, ha->rsp_qid_map);
450 set_bit(0, ha->req_qid_map);
454 kfree(ha->base_qpair);
455 ha->base_qpair = NULL;
457 kfree(ha->rsp_q_map);
458 ha->rsp_q_map = NULL;
460 kfree(ha->req_q_map);
461 ha->req_q_map = NULL;
466 static void qla2x00_free_req_que(struct qla_hw_data *ha, struct req_que *req)
468 if (IS_QLAFX00(ha)) {
469 if (req && req->ring_fx00)
470 dma_free_coherent(&ha->pdev->dev,
471 (req->length_fx00 + 1) * sizeof(request_t),
472 req->ring_fx00, req->dma_fx00);
473 } else if (req && req->ring)
474 dma_free_coherent(&ha->pdev->dev,
475 (req->length + 1) * sizeof(request_t),
476 req->ring, req->dma);
479 kfree(req->outstanding_cmds);
484 static void qla2x00_free_rsp_que(struct qla_hw_data *ha, struct rsp_que *rsp)
486 if (IS_QLAFX00(ha)) {
487 if (rsp && rsp->ring_fx00)
488 dma_free_coherent(&ha->pdev->dev,
489 (rsp->length_fx00 + 1) * sizeof(request_t),
490 rsp->ring_fx00, rsp->dma_fx00);
491 } else if (rsp && rsp->ring) {
492 dma_free_coherent(&ha->pdev->dev,
493 (rsp->length + 1) * sizeof(response_t),
494 rsp->ring, rsp->dma);
499 static void qla2x00_free_queues(struct qla_hw_data *ha)
506 if (ha->queue_pair_map) {
507 kfree(ha->queue_pair_map);
508 ha->queue_pair_map = NULL;
510 if (ha->base_qpair) {
511 kfree(ha->base_qpair);
512 ha->base_qpair = NULL;
515 spin_lock_irqsave(&ha->hardware_lock, flags);
516 for (cnt = 0; cnt < ha->max_req_queues; cnt++) {
517 if (!test_bit(cnt, ha->req_qid_map))
520 req = ha->req_q_map[cnt];
521 clear_bit(cnt, ha->req_qid_map);
522 ha->req_q_map[cnt] = NULL;
524 spin_unlock_irqrestore(&ha->hardware_lock, flags);
525 qla2x00_free_req_que(ha, req);
526 spin_lock_irqsave(&ha->hardware_lock, flags);
528 spin_unlock_irqrestore(&ha->hardware_lock, flags);
530 kfree(ha->req_q_map);
531 ha->req_q_map = NULL;
534 spin_lock_irqsave(&ha->hardware_lock, flags);
535 for (cnt = 0; cnt < ha->max_rsp_queues; cnt++) {
536 if (!test_bit(cnt, ha->rsp_qid_map))
539 rsp = ha->rsp_q_map[cnt];
540 clear_bit(cnt, ha->rsp_qid_map);
541 ha->rsp_q_map[cnt] = NULL;
542 spin_unlock_irqrestore(&ha->hardware_lock, flags);
543 qla2x00_free_rsp_que(ha, rsp);
544 spin_lock_irqsave(&ha->hardware_lock, flags);
546 spin_unlock_irqrestore(&ha->hardware_lock, flags);
548 kfree(ha->rsp_q_map);
549 ha->rsp_q_map = NULL;
553 qla2x00_pci_info_str(struct scsi_qla_host *vha, char *str)
555 struct qla_hw_data *ha = vha->hw;
556 static char *pci_bus_modes[] = {
557 "33", "66", "100", "133",
562 pci_bus = (ha->pci_attr & (BIT_9 | BIT_10)) >> 9;
565 strcat(str, pci_bus_modes[pci_bus]);
567 pci_bus = (ha->pci_attr & BIT_8) >> 8;
569 strcat(str, pci_bus_modes[pci_bus]);
571 strcat(str, " MHz)");
577 qla24xx_pci_info_str(struct scsi_qla_host *vha, char *str)
579 static char *pci_bus_modes[] = { "33", "66", "100", "133", };
580 struct qla_hw_data *ha = vha->hw;
583 if (pci_is_pcie(ha->pdev)) {
585 uint32_t lstat, lspeed, lwidth;
587 pcie_capability_read_dword(ha->pdev, PCI_EXP_LNKCAP, &lstat);
588 lspeed = lstat & PCI_EXP_LNKCAP_SLS;
589 lwidth = (lstat & PCI_EXP_LNKCAP_MLW) >> 4;
591 strcpy(str, "PCIe (");
594 strcat(str, "2.5GT/s ");
597 strcat(str, "5.0GT/s ");
600 strcat(str, "8.0GT/s ");
603 strcat(str, "<unknown> ");
606 snprintf(lwstr, sizeof(lwstr), "x%d)", lwidth);
613 pci_bus = (ha->pci_attr & CSRX_PCIX_BUS_MODE_MASK) >> 8;
614 if (pci_bus == 0 || pci_bus == 8) {
616 strcat(str, pci_bus_modes[pci_bus >> 3]);
620 strcat(str, "Mode 2");
622 strcat(str, "Mode 1");
624 strcat(str, pci_bus_modes[pci_bus & ~BIT_2]);
626 strcat(str, " MHz)");
632 qla2x00_fw_version_str(struct scsi_qla_host *vha, char *str, size_t size)
635 struct qla_hw_data *ha = vha->hw;
637 snprintf(str, size, "%d.%02d.%02d ", ha->fw_major_version,
638 ha->fw_minor_version, ha->fw_subminor_version);
640 if (ha->fw_attributes & BIT_9) {
645 switch (ha->fw_attributes & 0xFF) {
659 sprintf(un_str, "(%x)", ha->fw_attributes);
663 if (ha->fw_attributes & 0x100)
670 qla24xx_fw_version_str(struct scsi_qla_host *vha, char *str, size_t size)
672 struct qla_hw_data *ha = vha->hw;
674 snprintf(str, size, "%d.%02d.%02d (%x)", ha->fw_major_version,
675 ha->fw_minor_version, ha->fw_subminor_version, ha->fw_attributes);
680 qla2x00_sp_free_dma(void *ptr)
683 struct qla_hw_data *ha = sp->vha->hw;
684 struct scsi_cmnd *cmd = GET_CMD_SP(sp);
685 void *ctx = GET_CMD_CTX_SP(sp);
687 if (sp->flags & SRB_DMA_VALID) {
689 sp->flags &= ~SRB_DMA_VALID;
692 if (sp->flags & SRB_CRC_PROT_DMA_VALID) {
693 dma_unmap_sg(&ha->pdev->dev, scsi_prot_sglist(cmd),
694 scsi_prot_sg_count(cmd), cmd->sc_data_direction);
695 sp->flags &= ~SRB_CRC_PROT_DMA_VALID;
701 if (sp->flags & SRB_CRC_CTX_DSD_VALID) {
702 /* List assured to be having elements */
703 qla2x00_clean_dsd_pool(ha, ctx);
704 sp->flags &= ~SRB_CRC_CTX_DSD_VALID;
707 if (sp->flags & SRB_CRC_CTX_DMA_VALID) {
708 struct crc_context *ctx0 = ctx;
710 dma_pool_free(ha->dl_dma_pool, ctx0, ctx0->crc_ctx_dma);
711 sp->flags &= ~SRB_CRC_CTX_DMA_VALID;
714 if (sp->flags & SRB_FCP_CMND_DMA_VALID) {
715 struct ct6_dsd *ctx1 = ctx;
717 dma_pool_free(ha->fcp_cmnd_dma_pool, ctx1->fcp_cmnd,
719 list_splice(&ctx1->dsd_list, &ha->gbl_dsd_list);
720 ha->gbl_dsd_inuse -= ctx1->dsd_use_cnt;
721 ha->gbl_dsd_avail += ctx1->dsd_use_cnt;
722 mempool_free(ctx1, ha->ctx_mempool);
726 if (sp->type != SRB_NVME_CMD && sp->type != SRB_NVME_LS) {
733 qla2x00_sp_compl(void *ptr, int res)
736 struct scsi_cmnd *cmd = GET_CMD_SP(sp);
740 if (atomic_read(&sp->ref_count) == 0) {
741 ql_dbg(ql_dbg_io, sp->vha, 0x3015,
742 "SP reference-count to ZERO -- sp=%p cmd=%p.\n",
744 if (ql2xextended_error_logging & ql_dbg_io)
745 WARN_ON(atomic_read(&sp->ref_count) == 0);
748 if (!atomic_dec_and_test(&sp->ref_count))
756 qla2xxx_qpair_sp_free_dma(void *ptr)
758 srb_t *sp = (srb_t *)ptr;
759 struct scsi_cmnd *cmd = GET_CMD_SP(sp);
760 struct qla_hw_data *ha = sp->fcport->vha->hw;
761 void *ctx = GET_CMD_CTX_SP(sp);
763 if (sp->flags & SRB_DMA_VALID) {
765 sp->flags &= ~SRB_DMA_VALID;
768 if (sp->flags & SRB_CRC_PROT_DMA_VALID) {
769 dma_unmap_sg(&ha->pdev->dev, scsi_prot_sglist(cmd),
770 scsi_prot_sg_count(cmd), cmd->sc_data_direction);
771 sp->flags &= ~SRB_CRC_PROT_DMA_VALID;
777 if (sp->flags & SRB_CRC_CTX_DSD_VALID) {
778 /* List assured to be having elements */
779 qla2x00_clean_dsd_pool(ha, ctx);
780 sp->flags &= ~SRB_CRC_CTX_DSD_VALID;
783 if (sp->flags & SRB_CRC_CTX_DMA_VALID) {
784 struct crc_context *ctx0 = ctx;
786 dma_pool_free(ha->dl_dma_pool, ctx, ctx0->crc_ctx_dma);
787 sp->flags &= ~SRB_CRC_CTX_DMA_VALID;
790 if (sp->flags & SRB_FCP_CMND_DMA_VALID) {
791 struct ct6_dsd *ctx1 = ctx;
792 dma_pool_free(ha->fcp_cmnd_dma_pool, ctx1->fcp_cmnd,
794 list_splice(&ctx1->dsd_list, &ha->gbl_dsd_list);
795 ha->gbl_dsd_inuse -= ctx1->dsd_use_cnt;
796 ha->gbl_dsd_avail += ctx1->dsd_use_cnt;
797 mempool_free(ctx1, ha->ctx_mempool);
801 qla2xxx_rel_qpair_sp(sp->qpair, sp);
805 qla2xxx_qpair_sp_compl(void *ptr, int res)
808 struct scsi_cmnd *cmd = GET_CMD_SP(sp);
812 if (atomic_read(&sp->ref_count) == 0) {
813 ql_dbg(ql_dbg_io, sp->fcport->vha, 0x3079,
814 "SP reference-count to ZERO -- sp=%p cmd=%p.\n",
816 if (ql2xextended_error_logging & ql_dbg_io)
817 WARN_ON(atomic_read(&sp->ref_count) == 0);
820 if (!atomic_dec_and_test(&sp->ref_count))
827 /* If we are SP1 here, we need to still take and release the host_lock as SP1
828 * does not have the changes necessary to avoid taking host->host_lock.
831 qla2xxx_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
833 scsi_qla_host_t *vha = shost_priv(host);
834 fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
835 struct fc_rport *rport = starget_to_rport(scsi_target(cmd->device));
836 struct qla_hw_data *ha = vha->hw;
837 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
840 struct qla_qpair *qpair = NULL;
844 if (unlikely(test_bit(UNLOADING, &base_vha->dpc_flags))) {
845 cmd->result = DID_NO_CONNECT << 16;
846 goto qc24_fail_command;
850 if (shost_use_blk_mq(vha->host)) {
851 tag = blk_mq_unique_tag(cmd->request);
852 hwq = blk_mq_unique_tag_to_hwq(tag);
853 qpair = ha->queue_pair_map[hwq];
854 } else if (vha->vp_idx && vha->qpair) {
859 return qla2xxx_mqueuecommand(host, cmd, qpair);
862 if (ha->flags.eeh_busy) {
863 if (ha->flags.pci_channel_io_perm_failure) {
864 ql_dbg(ql_dbg_aer, vha, 0x9010,
865 "PCI Channel IO permanent failure, exiting "
867 cmd->result = DID_NO_CONNECT << 16;
869 ql_dbg(ql_dbg_aer, vha, 0x9011,
870 "EEH_Busy, Requeuing the cmd=%p.\n", cmd);
871 cmd->result = DID_REQUEUE << 16;
873 goto qc24_fail_command;
876 rval = fc_remote_port_chkready(rport);
879 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3003,
880 "fc_remote_port_chkready failed for cmd=%p, rval=0x%x.\n",
882 goto qc24_fail_command;
885 if (!vha->flags.difdix_supported &&
886 scsi_get_prot_op(cmd) != SCSI_PROT_NORMAL) {
887 ql_dbg(ql_dbg_io, vha, 0x3004,
888 "DIF Cap not reg, fail DIF capable cmd's:%p.\n",
890 cmd->result = DID_NO_CONNECT << 16;
891 goto qc24_fail_command;
895 cmd->result = DID_NO_CONNECT << 16;
896 goto qc24_fail_command;
899 if (atomic_read(&fcport->state) != FCS_ONLINE) {
900 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD ||
901 atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
902 ql_dbg(ql_dbg_io, vha, 0x3005,
903 "Returning DNC, fcport_state=%d loop_state=%d.\n",
904 atomic_read(&fcport->state),
905 atomic_read(&base_vha->loop_state));
906 cmd->result = DID_NO_CONNECT << 16;
907 goto qc24_fail_command;
909 goto qc24_target_busy;
913 * Return target busy if we've received a non-zero retry_delay_timer
916 if (fcport->retry_delay_timestamp == 0) {
917 /* retry delay not set */
918 } else if (time_after(jiffies, fcport->retry_delay_timestamp))
919 fcport->retry_delay_timestamp = 0;
921 goto qc24_target_busy;
923 sp = qla2x00_get_sp(vha, fcport, GFP_ATOMIC);
927 sp->u.scmd.cmd = cmd;
928 sp->type = SRB_SCSI_CMD;
929 atomic_set(&sp->ref_count, 1);
930 CMD_SP(cmd) = (void *)sp;
931 sp->free = qla2x00_sp_free_dma;
932 sp->done = qla2x00_sp_compl;
934 rval = ha->isp_ops->start_scsi(sp);
935 if (rval != QLA_SUCCESS) {
936 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3013,
937 "Start scsi failed rval=%d for cmd=%p.\n", rval, cmd);
938 goto qc24_host_busy_free_sp;
943 qc24_host_busy_free_sp:
947 return SCSI_MLQUEUE_HOST_BUSY;
950 return SCSI_MLQUEUE_TARGET_BUSY;
958 /* For MQ supported I/O */
960 qla2xxx_mqueuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd,
961 struct qla_qpair *qpair)
963 scsi_qla_host_t *vha = shost_priv(host);
964 fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
965 struct fc_rport *rport = starget_to_rport(scsi_target(cmd->device));
966 struct qla_hw_data *ha = vha->hw;
967 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
971 rval = fc_remote_port_chkready(rport);
974 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3076,
975 "fc_remote_port_chkready failed for cmd=%p, rval=0x%x.\n",
977 goto qc24_fail_command;
981 cmd->result = DID_NO_CONNECT << 16;
982 goto qc24_fail_command;
985 if (atomic_read(&fcport->state) != FCS_ONLINE) {
986 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD ||
987 atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
988 ql_dbg(ql_dbg_io, vha, 0x3077,
989 "Returning DNC, fcport_state=%d loop_state=%d.\n",
990 atomic_read(&fcport->state),
991 atomic_read(&base_vha->loop_state));
992 cmd->result = DID_NO_CONNECT << 16;
993 goto qc24_fail_command;
995 goto qc24_target_busy;
999 * Return target busy if we've received a non-zero retry_delay_timer
1002 if (fcport->retry_delay_timestamp == 0) {
1003 /* retry delay not set */
1004 } else if (time_after(jiffies, fcport->retry_delay_timestamp))
1005 fcport->retry_delay_timestamp = 0;
1007 goto qc24_target_busy;
1009 sp = qla2xxx_get_qpair_sp(qpair, fcport, GFP_ATOMIC);
1011 goto qc24_host_busy;
1013 sp->u.scmd.cmd = cmd;
1014 sp->type = SRB_SCSI_CMD;
1015 atomic_set(&sp->ref_count, 1);
1016 CMD_SP(cmd) = (void *)sp;
1017 sp->free = qla2xxx_qpair_sp_free_dma;
1018 sp->done = qla2xxx_qpair_sp_compl;
1021 rval = ha->isp_ops->start_scsi_mq(sp);
1022 if (rval != QLA_SUCCESS) {
1023 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3078,
1024 "Start scsi failed rval=%d for cmd=%p.\n", rval, cmd);
1025 goto qc24_host_busy_free_sp;
1030 qc24_host_busy_free_sp:
1034 return SCSI_MLQUEUE_HOST_BUSY;
1037 return SCSI_MLQUEUE_TARGET_BUSY;
1040 cmd->scsi_done(cmd);
1046 * qla2x00_eh_wait_on_command
1047 * Waits for the command to be returned by the Firmware for some
1051 * cmd = Scsi Command to wait on.
1058 qla2x00_eh_wait_on_command(struct scsi_cmnd *cmd)
1060 #define ABORT_POLLING_PERIOD 1000
1061 #define ABORT_WAIT_ITER ((2 * 1000) / (ABORT_POLLING_PERIOD))
1062 unsigned long wait_iter = ABORT_WAIT_ITER;
1063 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1064 struct qla_hw_data *ha = vha->hw;
1065 int ret = QLA_SUCCESS;
1067 if (unlikely(pci_channel_offline(ha->pdev)) || ha->flags.eeh_busy) {
1068 ql_dbg(ql_dbg_taskm, vha, 0x8005,
1069 "Return:eh_wait.\n");
1073 while (CMD_SP(cmd) && wait_iter--) {
1074 msleep(ABORT_POLLING_PERIOD);
1077 ret = QLA_FUNCTION_FAILED;
1083 * qla2x00_wait_for_hba_online
1084 * Wait till the HBA is online after going through
1085 * <= MAX_RETRIES_OF_ISP_ABORT or
1086 * finally HBA is disabled ie marked offline
1089 * ha - pointer to host adapter structure
1092 * Does context switching-Release SPIN_LOCK
1093 * (if any) before calling this routine.
1096 * Success (Adapter is online) : 0
1097 * Failed (Adapter is offline/disabled) : 1
1100 qla2x00_wait_for_hba_online(scsi_qla_host_t *vha)
1103 unsigned long wait_online;
1104 struct qla_hw_data *ha = vha->hw;
1105 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1107 wait_online = jiffies + (MAX_LOOP_TIMEOUT * HZ);
1108 while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
1109 test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
1110 test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
1111 ha->dpc_active) && time_before(jiffies, wait_online)) {
1115 if (base_vha->flags.online)
1116 return_status = QLA_SUCCESS;
1118 return_status = QLA_FUNCTION_FAILED;
1120 return (return_status);
1123 static inline int test_fcport_count(scsi_qla_host_t *vha)
1125 struct qla_hw_data *ha = vha->hw;
1126 unsigned long flags;
1129 spin_lock_irqsave(&ha->tgt.sess_lock, flags);
1130 ql_dbg(ql_dbg_init, vha, 0x00ec,
1131 "tgt %p, fcport_count=%d\n",
1132 vha, vha->fcport_count);
1133 res = (vha->fcport_count == 0);
1134 spin_unlock_irqrestore(&ha->tgt.sess_lock, flags);
1140 * qla2x00_wait_for_sess_deletion can only be called from remove_one.
1141 * it has dependency on UNLOADING flag to stop device discovery
1144 qla2x00_wait_for_sess_deletion(scsi_qla_host_t *vha)
1146 qla2x00_mark_all_devices_lost(vha, 0);
1148 wait_event_timeout(vha->fcport_waitQ, test_fcport_count(vha), 10*HZ);
1152 * qla2x00_wait_for_hba_ready
1153 * Wait till the HBA is ready before doing driver unload
1156 * ha - pointer to host adapter structure
1159 * Does context switching-Release SPIN_LOCK
1160 * (if any) before calling this routine.
1164 qla2x00_wait_for_hba_ready(scsi_qla_host_t *vha)
1166 struct qla_hw_data *ha = vha->hw;
1167 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1169 while ((qla2x00_reset_active(vha) || ha->dpc_active ||
1170 ha->flags.mbox_busy) ||
1171 test_bit(FX00_RESET_RECOVERY, &vha->dpc_flags) ||
1172 test_bit(FX00_TARGET_SCAN, &vha->dpc_flags)) {
1173 if (test_bit(UNLOADING, &base_vha->dpc_flags))
1180 qla2x00_wait_for_chip_reset(scsi_qla_host_t *vha)
1183 unsigned long wait_reset;
1184 struct qla_hw_data *ha = vha->hw;
1185 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1187 wait_reset = jiffies + (MAX_LOOP_TIMEOUT * HZ);
1188 while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
1189 test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
1190 test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
1191 ha->dpc_active) && time_before(jiffies, wait_reset)) {
1195 if (!test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags) &&
1196 ha->flags.chip_reset_done)
1199 if (ha->flags.chip_reset_done)
1200 return_status = QLA_SUCCESS;
1202 return_status = QLA_FUNCTION_FAILED;
1204 return return_status;
1208 sp_get(struct srb *sp)
1210 atomic_inc(&sp->ref_count);
1213 #define ISP_REG_DISCONNECT 0xffffffffU
1214 /**************************************************************************
1215 * qla2x00_isp_reg_stat
1218 * Read the host status register of ISP before aborting the command.
1221 * ha = pointer to host adapter structure.
1225 * Either true or false.
1227 * Note: Return true if there is register disconnect.
1228 **************************************************************************/
1230 uint32_t qla2x00_isp_reg_stat(struct qla_hw_data *ha)
1232 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1233 struct device_reg_82xx __iomem *reg82 = &ha->iobase->isp82;
1235 if (IS_P3P_TYPE(ha))
1236 return ((RD_REG_DWORD(®82->host_int)) == ISP_REG_DISCONNECT);
1238 return ((RD_REG_DWORD(®->host_status)) ==
1239 ISP_REG_DISCONNECT);
1242 /**************************************************************************
1246 * The abort function will abort the specified command.
1249 * cmd = Linux SCSI command packet to be aborted.
1252 * Either SUCCESS or FAILED.
1255 * Only return FAILED if command not returned by firmware.
1256 **************************************************************************/
1258 qla2xxx_eh_abort(struct scsi_cmnd *cmd)
1260 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1265 unsigned long flags;
1267 struct qla_hw_data *ha = vha->hw;
1269 if (qla2x00_isp_reg_stat(ha)) {
1270 ql_log(ql_log_info, vha, 0x8042,
1271 "PCI/Register disconnect, exiting.\n");
1277 ret = fc_block_scsi_eh(cmd);
1282 id = cmd->device->id;
1283 lun = cmd->device->lun;
1285 spin_lock_irqsave(&ha->hardware_lock, flags);
1286 sp = (srb_t *) CMD_SP(cmd);
1288 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1292 ql_dbg(ql_dbg_taskm, vha, 0x8002,
1293 "Aborting from RISC nexus=%ld:%d:%llu sp=%p cmd=%p handle=%x\n",
1294 vha->host_no, id, lun, sp, cmd, sp->handle);
1296 /* Get a reference to the sp and drop the lock.*/
1299 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1300 rval = ha->isp_ops->abort_command(sp);
1302 if (rval == QLA_FUNCTION_PARAMETER_ERROR)
1307 ql_dbg(ql_dbg_taskm, vha, 0x8003,
1308 "Abort command mbx failed cmd=%p, rval=%x.\n", cmd, rval);
1310 ql_dbg(ql_dbg_taskm, vha, 0x8004,
1311 "Abort command mbx success cmd=%p.\n", cmd);
1315 spin_lock_irqsave(&ha->hardware_lock, flags);
1317 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1319 /* Did the command return during mailbox execution? */
1320 if (ret == FAILED && !CMD_SP(cmd))
1323 /* Wait for the command to be returned. */
1325 if (qla2x00_eh_wait_on_command(cmd) != QLA_SUCCESS) {
1326 ql_log(ql_log_warn, vha, 0x8006,
1327 "Abort handler timed out cmd=%p.\n", cmd);
1332 ql_log(ql_log_info, vha, 0x801c,
1333 "Abort command issued nexus=%ld:%d:%llu -- %d %x.\n",
1334 vha->host_no, id, lun, wait, ret);
1340 qla2x00_eh_wait_for_pending_commands(scsi_qla_host_t *vha, unsigned int t,
1341 uint64_t l, enum nexus_wait_type type)
1343 int cnt, match, status;
1344 unsigned long flags;
1345 struct qla_hw_data *ha = vha->hw;
1346 struct req_que *req;
1348 struct scsi_cmnd *cmd;
1350 status = QLA_SUCCESS;
1352 spin_lock_irqsave(&ha->hardware_lock, flags);
1354 for (cnt = 1; status == QLA_SUCCESS &&
1355 cnt < req->num_outstanding_cmds; cnt++) {
1356 sp = req->outstanding_cmds[cnt];
1359 if (sp->type != SRB_SCSI_CMD)
1361 if (vha->vp_idx != sp->vha->vp_idx)
1364 cmd = GET_CMD_SP(sp);
1370 match = cmd->device->id == t;
1373 match = (cmd->device->id == t &&
1374 cmd->device->lun == l);
1380 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1381 status = qla2x00_eh_wait_on_command(cmd);
1382 spin_lock_irqsave(&ha->hardware_lock, flags);
1384 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1389 static char *reset_errors[] = {
1392 "Task management failed",
1393 "Waiting for command completions",
1397 __qla2xxx_eh_generic_reset(char *name, enum nexus_wait_type type,
1398 struct scsi_cmnd *cmd, int (*do_reset)(struct fc_port *, uint64_t, int))
1400 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1401 fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
1408 err = fc_block_scsi_eh(cmd);
1412 ql_log(ql_log_info, vha, 0x8009,
1413 "%s RESET ISSUED nexus=%ld:%d:%llu cmd=%p.\n", name, vha->host_no,
1414 cmd->device->id, cmd->device->lun, cmd);
1417 if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1418 ql_log(ql_log_warn, vha, 0x800a,
1419 "Wait for hba online failed for cmd=%p.\n", cmd);
1420 goto eh_reset_failed;
1423 if (do_reset(fcport, cmd->device->lun, cmd->request->cpu + 1)
1425 ql_log(ql_log_warn, vha, 0x800c,
1426 "do_reset failed for cmd=%p.\n", cmd);
1427 goto eh_reset_failed;
1430 if (qla2x00_eh_wait_for_pending_commands(vha, cmd->device->id,
1431 cmd->device->lun, type) != QLA_SUCCESS) {
1432 ql_log(ql_log_warn, vha, 0x800d,
1433 "wait for pending cmds failed for cmd=%p.\n", cmd);
1434 goto eh_reset_failed;
1437 ql_log(ql_log_info, vha, 0x800e,
1438 "%s RESET SUCCEEDED nexus:%ld:%d:%llu cmd=%p.\n", name,
1439 vha->host_no, cmd->device->id, cmd->device->lun, cmd);
1444 ql_log(ql_log_info, vha, 0x800f,
1445 "%s RESET FAILED: %s nexus=%ld:%d:%llu cmd=%p.\n", name,
1446 reset_errors[err], vha->host_no, cmd->device->id, cmd->device->lun,
1452 qla2xxx_eh_device_reset(struct scsi_cmnd *cmd)
1454 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1455 struct qla_hw_data *ha = vha->hw;
1457 if (qla2x00_isp_reg_stat(ha)) {
1458 ql_log(ql_log_info, vha, 0x803e,
1459 "PCI/Register disconnect, exiting.\n");
1463 return __qla2xxx_eh_generic_reset("DEVICE", WAIT_LUN, cmd,
1464 ha->isp_ops->lun_reset);
1468 qla2xxx_eh_target_reset(struct scsi_cmnd *cmd)
1470 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1471 struct qla_hw_data *ha = vha->hw;
1473 if (qla2x00_isp_reg_stat(ha)) {
1474 ql_log(ql_log_info, vha, 0x803f,
1475 "PCI/Register disconnect, exiting.\n");
1479 return __qla2xxx_eh_generic_reset("TARGET", WAIT_TARGET, cmd,
1480 ha->isp_ops->target_reset);
1483 /**************************************************************************
1484 * qla2xxx_eh_bus_reset
1487 * The bus reset function will reset the bus and abort any executing
1491 * cmd = Linux SCSI command packet of the command that cause the
1495 * SUCCESS/FAILURE (defined as macro in scsi.h).
1497 **************************************************************************/
1499 qla2xxx_eh_bus_reset(struct scsi_cmnd *cmd)
1501 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1502 fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
1506 struct qla_hw_data *ha = vha->hw;
1508 if (qla2x00_isp_reg_stat(ha)) {
1509 ql_log(ql_log_info, vha, 0x8040,
1510 "PCI/Register disconnect, exiting.\n");
1514 id = cmd->device->id;
1515 lun = cmd->device->lun;
1521 ret = fc_block_scsi_eh(cmd);
1526 ql_log(ql_log_info, vha, 0x8012,
1527 "BUS RESET ISSUED nexus=%ld:%d:%llu.\n", vha->host_no, id, lun);
1529 if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1530 ql_log(ql_log_fatal, vha, 0x8013,
1531 "Wait for hba online failed board disabled.\n");
1532 goto eh_bus_reset_done;
1535 if (qla2x00_loop_reset(vha) == QLA_SUCCESS)
1539 goto eh_bus_reset_done;
1541 /* Flush outstanding commands. */
1542 if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) !=
1544 ql_log(ql_log_warn, vha, 0x8014,
1545 "Wait for pending commands failed.\n");
1550 ql_log(ql_log_warn, vha, 0x802b,
1551 "BUS RESET %s nexus=%ld:%d:%llu.\n",
1552 (ret == FAILED) ? "FAILED" : "SUCCEEDED", vha->host_no, id, lun);
1557 /**************************************************************************
1558 * qla2xxx_eh_host_reset
1561 * The reset function will reset the Adapter.
1564 * cmd = Linux SCSI command packet of the command that cause the
1568 * Either SUCCESS or FAILED.
1571 **************************************************************************/
1573 qla2xxx_eh_host_reset(struct scsi_cmnd *cmd)
1575 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1576 struct qla_hw_data *ha = vha->hw;
1580 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1582 if (qla2x00_isp_reg_stat(ha)) {
1583 ql_log(ql_log_info, vha, 0x8041,
1584 "PCI/Register disconnect, exiting.\n");
1585 schedule_work(&ha->board_disable);
1589 id = cmd->device->id;
1590 lun = cmd->device->lun;
1592 ql_log(ql_log_info, vha, 0x8018,
1593 "ADAPTER RESET ISSUED nexus=%ld:%d:%llu.\n", vha->host_no, id, lun);
1596 * No point in issuing another reset if one is active. Also do not
1597 * attempt a reset if we are updating flash.
1599 if (qla2x00_reset_active(vha) || ha->optrom_state != QLA_SWAITING)
1600 goto eh_host_reset_lock;
1602 if (vha != base_vha) {
1603 if (qla2x00_vp_abort_isp(vha))
1604 goto eh_host_reset_lock;
1606 if (IS_P3P_TYPE(vha->hw)) {
1607 if (!qla82xx_fcoe_ctx_reset(vha)) {
1608 /* Ctx reset success */
1610 goto eh_host_reset_lock;
1612 /* fall thru if ctx reset failed */
1615 flush_workqueue(ha->wq);
1617 set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1618 if (ha->isp_ops->abort_isp(base_vha)) {
1619 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1620 /* failed. schedule dpc to try */
1621 set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags);
1623 if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1624 ql_log(ql_log_warn, vha, 0x802a,
1625 "wait for hba online failed.\n");
1626 goto eh_host_reset_lock;
1629 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1632 /* Waiting for command to be returned to OS.*/
1633 if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) ==
1638 ql_log(ql_log_info, vha, 0x8017,
1639 "ADAPTER RESET %s nexus=%ld:%d:%llu.\n",
1640 (ret == FAILED) ? "FAILED" : "SUCCEEDED", vha->host_no, id, lun);
1646 * qla2x00_loop_reset
1650 * ha = adapter block pointer.
1656 qla2x00_loop_reset(scsi_qla_host_t *vha)
1659 struct qla_hw_data *ha = vha->hw;
1664 if (ha->flags.enable_lip_full_login && !IS_CNA_CAPABLE(ha)) {
1665 atomic_set(&vha->loop_state, LOOP_DOWN);
1666 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
1667 qla2x00_mark_all_devices_lost(vha, 0);
1668 ret = qla2x00_full_login_lip(vha);
1669 if (ret != QLA_SUCCESS) {
1670 ql_dbg(ql_dbg_taskm, vha, 0x802d,
1671 "full_login_lip=%d.\n", ret);
1675 if (ha->flags.enable_lip_reset) {
1676 ret = qla2x00_lip_reset(vha);
1677 if (ret != QLA_SUCCESS)
1678 ql_dbg(ql_dbg_taskm, vha, 0x802e,
1679 "lip_reset failed (%d).\n", ret);
1682 /* Issue marker command only when we are going to start the I/O */
1683 vha->marker_needed = 1;
1689 __qla2x00_abort_all_cmds(struct qla_qpair *qp, int res)
1692 unsigned long flags;
1694 scsi_qla_host_t *vha = qp->vha;
1695 struct qla_hw_data *ha = vha->hw;
1696 struct req_que *req;
1697 struct qla_tgt *tgt = vha->vha_tgt.qla_tgt;
1698 struct qla_tgt_cmd *cmd;
1703 spin_lock_irqsave(qp->qp_lock_ptr, flags);
1705 for (cnt = 1; cnt < req->num_outstanding_cmds; cnt++) {
1706 sp = req->outstanding_cmds[cnt];
1708 req->outstanding_cmds[cnt] = NULL;
1709 if (sp->cmd_type == TYPE_SRB) {
1710 if (sp->type == SRB_NVME_CMD ||
1711 sp->type == SRB_NVME_LS) {
1713 spin_unlock_irqrestore(qp->qp_lock_ptr,
1715 qla_nvme_abort(ha, sp, res);
1716 spin_lock_irqsave(qp->qp_lock_ptr,
1718 } else if (GET_CMD_SP(sp) &&
1719 !ha->flags.eeh_busy &&
1720 (!test_bit(ABORT_ISP_ACTIVE,
1721 &vha->dpc_flags)) &&
1722 !qla2x00_isp_reg_stat(ha) &&
1723 (sp->type == SRB_SCSI_CMD)) {
1725 * Don't abort commands in
1726 * adapter during EEH
1727 * recovery as it's not
1728 * accessible/responding.
1730 * Get a reference to the sp
1731 * and drop the lock. The
1732 * reference ensures this
1733 * sp->done() call and not the
1734 * call in qla2xxx_eh_abort()
1735 * ends the SCSI command (with
1739 spin_unlock_irqrestore(qp->qp_lock_ptr,
1741 status = qla2xxx_eh_abort(
1743 spin_lock_irqsave(qp->qp_lock_ptr,
1746 * Get rid of extra reference
1747 * if immediate exit from
1750 if (status == FAILED &&
1751 (qla2x00_isp_reg_stat(ha)))
1757 if (!vha->hw->tgt.tgt_ops || !tgt ||
1758 qla_ini_mode_enabled(vha)) {
1760 ql_dbg(ql_dbg_tgt_mgt,
1762 "HOST-ABORT-HNDLR: dpc_flags=%lx. Target mode disabled\n",
1766 cmd = (struct qla_tgt_cmd *)sp;
1767 qlt_abort_cmd_on_host_reset(cmd->vha, cmd);
1771 spin_unlock_irqrestore(qp->qp_lock_ptr, flags);
1775 qla2x00_abort_all_cmds(scsi_qla_host_t *vha, int res)
1778 struct qla_hw_data *ha = vha->hw;
1780 __qla2x00_abort_all_cmds(ha->base_qpair, res);
1782 for (que = 0; que < ha->max_qpairs; que++) {
1783 if (!ha->queue_pair_map[que])
1786 __qla2x00_abort_all_cmds(ha->queue_pair_map[que], res);
1791 qla2xxx_slave_alloc(struct scsi_device *sdev)
1793 struct fc_rport *rport = starget_to_rport(scsi_target(sdev));
1795 if (!rport || fc_remote_port_chkready(rport))
1798 sdev->hostdata = *(fc_port_t **)rport->dd_data;
1804 qla2xxx_slave_configure(struct scsi_device *sdev)
1806 scsi_qla_host_t *vha = shost_priv(sdev->host);
1807 struct req_que *req = vha->req;
1809 if (IS_T10_PI_CAPABLE(vha->hw))
1810 blk_queue_update_dma_alignment(sdev->request_queue, 0x7);
1812 scsi_change_queue_depth(sdev, req->max_q_depth);
1817 qla2xxx_slave_destroy(struct scsi_device *sdev)
1819 sdev->hostdata = NULL;
1823 * qla2x00_config_dma_addressing() - Configure OS DMA addressing method.
1826 * At exit, the @ha's flags.enable_64bit_addressing set to indicated
1827 * supported addressing method.
1830 qla2x00_config_dma_addressing(struct qla_hw_data *ha)
1832 /* Assume a 32bit DMA mask. */
1833 ha->flags.enable_64bit_addressing = 0;
1835 if (!dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(64))) {
1836 /* Any upper-dword bits set? */
1837 if (MSD(dma_get_required_mask(&ha->pdev->dev)) &&
1838 !pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(64))) {
1839 /* Ok, a 64bit DMA mask is applicable. */
1840 ha->flags.enable_64bit_addressing = 1;
1841 ha->isp_ops->calc_req_entries = qla2x00_calc_iocbs_64;
1842 ha->isp_ops->build_iocbs = qla2x00_build_scsi_iocbs_64;
1847 dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(32));
1848 pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(32));
1852 qla2x00_enable_intrs(struct qla_hw_data *ha)
1854 unsigned long flags = 0;
1855 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1857 spin_lock_irqsave(&ha->hardware_lock, flags);
1858 ha->interrupts_on = 1;
1859 /* enable risc and host interrupts */
1860 WRT_REG_WORD(®->ictrl, ICR_EN_INT | ICR_EN_RISC);
1861 RD_REG_WORD(®->ictrl);
1862 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1867 qla2x00_disable_intrs(struct qla_hw_data *ha)
1869 unsigned long flags = 0;
1870 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1872 spin_lock_irqsave(&ha->hardware_lock, flags);
1873 ha->interrupts_on = 0;
1874 /* disable risc and host interrupts */
1875 WRT_REG_WORD(®->ictrl, 0);
1876 RD_REG_WORD(®->ictrl);
1877 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1881 qla24xx_enable_intrs(struct qla_hw_data *ha)
1883 unsigned long flags = 0;
1884 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1886 spin_lock_irqsave(&ha->hardware_lock, flags);
1887 ha->interrupts_on = 1;
1888 WRT_REG_DWORD(®->ictrl, ICRX_EN_RISC_INT);
1889 RD_REG_DWORD(®->ictrl);
1890 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1894 qla24xx_disable_intrs(struct qla_hw_data *ha)
1896 unsigned long flags = 0;
1897 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1899 if (IS_NOPOLLING_TYPE(ha))
1901 spin_lock_irqsave(&ha->hardware_lock, flags);
1902 ha->interrupts_on = 0;
1903 WRT_REG_DWORD(®->ictrl, 0);
1904 RD_REG_DWORD(®->ictrl);
1905 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1909 qla2x00_iospace_config(struct qla_hw_data *ha)
1911 resource_size_t pio;
1914 if (pci_request_selected_regions(ha->pdev, ha->bars,
1915 QLA2XXX_DRIVER_NAME)) {
1916 ql_log_pci(ql_log_fatal, ha->pdev, 0x0011,
1917 "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
1918 pci_name(ha->pdev));
1919 goto iospace_error_exit;
1921 if (!(ha->bars & 1))
1924 /* We only need PIO for Flash operations on ISP2312 v2 chips. */
1925 pio = pci_resource_start(ha->pdev, 0);
1926 if (pci_resource_flags(ha->pdev, 0) & IORESOURCE_IO) {
1927 if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
1928 ql_log_pci(ql_log_warn, ha->pdev, 0x0012,
1929 "Invalid pci I/O region size (%s).\n",
1930 pci_name(ha->pdev));
1934 ql_log_pci(ql_log_warn, ha->pdev, 0x0013,
1935 "Region #0 no a PIO resource (%s).\n",
1936 pci_name(ha->pdev));
1939 ha->pio_address = pio;
1940 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0014,
1941 "PIO address=%llu.\n",
1942 (unsigned long long)ha->pio_address);
1945 /* Use MMIO operations for all accesses. */
1946 if (!(pci_resource_flags(ha->pdev, 1) & IORESOURCE_MEM)) {
1947 ql_log_pci(ql_log_fatal, ha->pdev, 0x0015,
1948 "Region #1 not an MMIO resource (%s), aborting.\n",
1949 pci_name(ha->pdev));
1950 goto iospace_error_exit;
1952 if (pci_resource_len(ha->pdev, 1) < MIN_IOBASE_LEN) {
1953 ql_log_pci(ql_log_fatal, ha->pdev, 0x0016,
1954 "Invalid PCI mem region size (%s), aborting.\n",
1955 pci_name(ha->pdev));
1956 goto iospace_error_exit;
1959 ha->iobase = ioremap(pci_resource_start(ha->pdev, 1), MIN_IOBASE_LEN);
1961 ql_log_pci(ql_log_fatal, ha->pdev, 0x0017,
1962 "Cannot remap MMIO (%s), aborting.\n",
1963 pci_name(ha->pdev));
1964 goto iospace_error_exit;
1967 /* Determine queue resources */
1968 ha->max_req_queues = ha->max_rsp_queues = 1;
1969 ha->msix_count = QLA_BASE_VECTORS;
1971 /* Check if FW supports MQ or not */
1972 if (!(ha->fw_attributes & BIT_6))
1975 if (!ql2xmqsupport || !ql2xnvmeenable ||
1976 (!IS_QLA25XX(ha) && !IS_QLA81XX(ha)))
1979 ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 3),
1980 pci_resource_len(ha->pdev, 3));
1982 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0018,
1983 "MQIO Base=%p.\n", ha->mqiobase);
1984 /* Read MSIX vector size of the board */
1985 pci_read_config_word(ha->pdev, QLA_PCI_MSIX_CONTROL, &msix);
1986 ha->msix_count = msix + 1;
1987 /* Max queues are bounded by available msix vectors */
1988 /* MB interrupt uses 1 vector */
1989 ha->max_req_queues = ha->msix_count - 1;
1990 ha->max_rsp_queues = ha->max_req_queues;
1991 /* Queue pairs is the max value minus the base queue pair */
1992 ha->max_qpairs = ha->max_rsp_queues - 1;
1993 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0188,
1994 "Max no of queues pairs: %d.\n", ha->max_qpairs);
1996 ql_log_pci(ql_log_info, ha->pdev, 0x001a,
1997 "MSI-X vector count: %d.\n", ha->msix_count);
1999 ql_log_pci(ql_log_info, ha->pdev, 0x001b,
2000 "BAR 3 not enabled.\n");
2003 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x001c,
2004 "MSIX Count: %d.\n", ha->msix_count);
2013 qla83xx_iospace_config(struct qla_hw_data *ha)
2017 if (pci_request_selected_regions(ha->pdev, ha->bars,
2018 QLA2XXX_DRIVER_NAME)) {
2019 ql_log_pci(ql_log_fatal, ha->pdev, 0x0117,
2020 "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
2021 pci_name(ha->pdev));
2023 goto iospace_error_exit;
2026 /* Use MMIO operations for all accesses. */
2027 if (!(pci_resource_flags(ha->pdev, 0) & IORESOURCE_MEM)) {
2028 ql_log_pci(ql_log_warn, ha->pdev, 0x0118,
2029 "Invalid pci I/O region size (%s).\n",
2030 pci_name(ha->pdev));
2031 goto iospace_error_exit;
2033 if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
2034 ql_log_pci(ql_log_warn, ha->pdev, 0x0119,
2035 "Invalid PCI mem region size (%s), aborting\n",
2036 pci_name(ha->pdev));
2037 goto iospace_error_exit;
2040 ha->iobase = ioremap(pci_resource_start(ha->pdev, 0), MIN_IOBASE_LEN);
2042 ql_log_pci(ql_log_fatal, ha->pdev, 0x011a,
2043 "Cannot remap MMIO (%s), aborting.\n",
2044 pci_name(ha->pdev));
2045 goto iospace_error_exit;
2048 /* 64bit PCI BAR - BAR2 will correspoond to region 4 */
2049 /* 83XX 26XX always use MQ type access for queues
2050 * - mbar 2, a.k.a region 4 */
2051 ha->max_req_queues = ha->max_rsp_queues = 1;
2052 ha->msix_count = QLA_BASE_VECTORS;
2053 ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 4),
2054 pci_resource_len(ha->pdev, 4));
2056 if (!ha->mqiobase) {
2057 ql_log_pci(ql_log_fatal, ha->pdev, 0x011d,
2058 "BAR2/region4 not enabled\n");
2062 ha->msixbase = ioremap(pci_resource_start(ha->pdev, 2),
2063 pci_resource_len(ha->pdev, 2));
2065 /* Read MSIX vector size of the board */
2066 pci_read_config_word(ha->pdev,
2067 QLA_83XX_PCI_MSIX_CONTROL, &msix);
2068 ha->msix_count = (msix & PCI_MSIX_FLAGS_QSIZE) + 1;
2070 * By default, driver uses at least two msix vectors
2073 if (ql2xmqsupport || ql2xnvmeenable) {
2074 /* MB interrupt uses 1 vector */
2075 ha->max_req_queues = ha->msix_count - 1;
2077 /* ATIOQ needs 1 vector. That's 1 less QPair */
2078 if (QLA_TGT_MODE_ENABLED())
2079 ha->max_req_queues--;
2081 ha->max_rsp_queues = ha->max_req_queues;
2083 /* Queue pairs is the max value minus
2084 * the base queue pair */
2085 ha->max_qpairs = ha->max_req_queues - 1;
2086 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x00e3,
2087 "Max no of queues pairs: %d.\n", ha->max_qpairs);
2089 ql_log_pci(ql_log_info, ha->pdev, 0x011c,
2090 "MSI-X vector count: %d.\n", ha->msix_count);
2092 ql_log_pci(ql_log_info, ha->pdev, 0x011e,
2093 "BAR 1 not enabled.\n");
2096 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011f,
2097 "MSIX Count: %d.\n", ha->msix_count);
2104 static struct isp_operations qla2100_isp_ops = {
2105 .pci_config = qla2100_pci_config,
2106 .reset_chip = qla2x00_reset_chip,
2107 .chip_diag = qla2x00_chip_diag,
2108 .config_rings = qla2x00_config_rings,
2109 .reset_adapter = qla2x00_reset_adapter,
2110 .nvram_config = qla2x00_nvram_config,
2111 .update_fw_options = qla2x00_update_fw_options,
2112 .load_risc = qla2x00_load_risc,
2113 .pci_info_str = qla2x00_pci_info_str,
2114 .fw_version_str = qla2x00_fw_version_str,
2115 .intr_handler = qla2100_intr_handler,
2116 .enable_intrs = qla2x00_enable_intrs,
2117 .disable_intrs = qla2x00_disable_intrs,
2118 .abort_command = qla2x00_abort_command,
2119 .target_reset = qla2x00_abort_target,
2120 .lun_reset = qla2x00_lun_reset,
2121 .fabric_login = qla2x00_login_fabric,
2122 .fabric_logout = qla2x00_fabric_logout,
2123 .calc_req_entries = qla2x00_calc_iocbs_32,
2124 .build_iocbs = qla2x00_build_scsi_iocbs_32,
2125 .prep_ms_iocb = qla2x00_prep_ms_iocb,
2126 .prep_ms_fdmi_iocb = qla2x00_prep_ms_fdmi_iocb,
2127 .read_nvram = qla2x00_read_nvram_data,
2128 .write_nvram = qla2x00_write_nvram_data,
2129 .fw_dump = qla2100_fw_dump,
2132 .beacon_blink = NULL,
2133 .read_optrom = qla2x00_read_optrom_data,
2134 .write_optrom = qla2x00_write_optrom_data,
2135 .get_flash_version = qla2x00_get_flash_version,
2136 .start_scsi = qla2x00_start_scsi,
2137 .start_scsi_mq = NULL,
2138 .abort_isp = qla2x00_abort_isp,
2139 .iospace_config = qla2x00_iospace_config,
2140 .initialize_adapter = qla2x00_initialize_adapter,
2143 static struct isp_operations qla2300_isp_ops = {
2144 .pci_config = qla2300_pci_config,
2145 .reset_chip = qla2x00_reset_chip,
2146 .chip_diag = qla2x00_chip_diag,
2147 .config_rings = qla2x00_config_rings,
2148 .reset_adapter = qla2x00_reset_adapter,
2149 .nvram_config = qla2x00_nvram_config,
2150 .update_fw_options = qla2x00_update_fw_options,
2151 .load_risc = qla2x00_load_risc,
2152 .pci_info_str = qla2x00_pci_info_str,
2153 .fw_version_str = qla2x00_fw_version_str,
2154 .intr_handler = qla2300_intr_handler,
2155 .enable_intrs = qla2x00_enable_intrs,
2156 .disable_intrs = qla2x00_disable_intrs,
2157 .abort_command = qla2x00_abort_command,
2158 .target_reset = qla2x00_abort_target,
2159 .lun_reset = qla2x00_lun_reset,
2160 .fabric_login = qla2x00_login_fabric,
2161 .fabric_logout = qla2x00_fabric_logout,
2162 .calc_req_entries = qla2x00_calc_iocbs_32,
2163 .build_iocbs = qla2x00_build_scsi_iocbs_32,
2164 .prep_ms_iocb = qla2x00_prep_ms_iocb,
2165 .prep_ms_fdmi_iocb = qla2x00_prep_ms_fdmi_iocb,
2166 .read_nvram = qla2x00_read_nvram_data,
2167 .write_nvram = qla2x00_write_nvram_data,
2168 .fw_dump = qla2300_fw_dump,
2169 .beacon_on = qla2x00_beacon_on,
2170 .beacon_off = qla2x00_beacon_off,
2171 .beacon_blink = qla2x00_beacon_blink,
2172 .read_optrom = qla2x00_read_optrom_data,
2173 .write_optrom = qla2x00_write_optrom_data,
2174 .get_flash_version = qla2x00_get_flash_version,
2175 .start_scsi = qla2x00_start_scsi,
2176 .start_scsi_mq = NULL,
2177 .abort_isp = qla2x00_abort_isp,
2178 .iospace_config = qla2x00_iospace_config,
2179 .initialize_adapter = qla2x00_initialize_adapter,
2182 static struct isp_operations qla24xx_isp_ops = {
2183 .pci_config = qla24xx_pci_config,
2184 .reset_chip = qla24xx_reset_chip,
2185 .chip_diag = qla24xx_chip_diag,
2186 .config_rings = qla24xx_config_rings,
2187 .reset_adapter = qla24xx_reset_adapter,
2188 .nvram_config = qla24xx_nvram_config,
2189 .update_fw_options = qla24xx_update_fw_options,
2190 .load_risc = qla24xx_load_risc,
2191 .pci_info_str = qla24xx_pci_info_str,
2192 .fw_version_str = qla24xx_fw_version_str,
2193 .intr_handler = qla24xx_intr_handler,
2194 .enable_intrs = qla24xx_enable_intrs,
2195 .disable_intrs = qla24xx_disable_intrs,
2196 .abort_command = qla24xx_abort_command,
2197 .target_reset = qla24xx_abort_target,
2198 .lun_reset = qla24xx_lun_reset,
2199 .fabric_login = qla24xx_login_fabric,
2200 .fabric_logout = qla24xx_fabric_logout,
2201 .calc_req_entries = NULL,
2202 .build_iocbs = NULL,
2203 .prep_ms_iocb = qla24xx_prep_ms_iocb,
2204 .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb,
2205 .read_nvram = qla24xx_read_nvram_data,
2206 .write_nvram = qla24xx_write_nvram_data,
2207 .fw_dump = qla24xx_fw_dump,
2208 .beacon_on = qla24xx_beacon_on,
2209 .beacon_off = qla24xx_beacon_off,
2210 .beacon_blink = qla24xx_beacon_blink,
2211 .read_optrom = qla24xx_read_optrom_data,
2212 .write_optrom = qla24xx_write_optrom_data,
2213 .get_flash_version = qla24xx_get_flash_version,
2214 .start_scsi = qla24xx_start_scsi,
2215 .start_scsi_mq = NULL,
2216 .abort_isp = qla2x00_abort_isp,
2217 .iospace_config = qla2x00_iospace_config,
2218 .initialize_adapter = qla2x00_initialize_adapter,
2221 static struct isp_operations qla25xx_isp_ops = {
2222 .pci_config = qla25xx_pci_config,
2223 .reset_chip = qla24xx_reset_chip,
2224 .chip_diag = qla24xx_chip_diag,
2225 .config_rings = qla24xx_config_rings,
2226 .reset_adapter = qla24xx_reset_adapter,
2227 .nvram_config = qla24xx_nvram_config,
2228 .update_fw_options = qla24xx_update_fw_options,
2229 .load_risc = qla24xx_load_risc,
2230 .pci_info_str = qla24xx_pci_info_str,
2231 .fw_version_str = qla24xx_fw_version_str,
2232 .intr_handler = qla24xx_intr_handler,
2233 .enable_intrs = qla24xx_enable_intrs,
2234 .disable_intrs = qla24xx_disable_intrs,
2235 .abort_command = qla24xx_abort_command,
2236 .target_reset = qla24xx_abort_target,
2237 .lun_reset = qla24xx_lun_reset,
2238 .fabric_login = qla24xx_login_fabric,
2239 .fabric_logout = qla24xx_fabric_logout,
2240 .calc_req_entries = NULL,
2241 .build_iocbs = NULL,
2242 .prep_ms_iocb = qla24xx_prep_ms_iocb,
2243 .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb,
2244 .read_nvram = qla25xx_read_nvram_data,
2245 .write_nvram = qla25xx_write_nvram_data,
2246 .fw_dump = qla25xx_fw_dump,
2247 .beacon_on = qla24xx_beacon_on,
2248 .beacon_off = qla24xx_beacon_off,
2249 .beacon_blink = qla24xx_beacon_blink,
2250 .read_optrom = qla25xx_read_optrom_data,
2251 .write_optrom = qla24xx_write_optrom_data,
2252 .get_flash_version = qla24xx_get_flash_version,
2253 .start_scsi = qla24xx_dif_start_scsi,
2254 .start_scsi_mq = qla2xxx_dif_start_scsi_mq,
2255 .abort_isp = qla2x00_abort_isp,
2256 .iospace_config = qla2x00_iospace_config,
2257 .initialize_adapter = qla2x00_initialize_adapter,
2260 static struct isp_operations qla81xx_isp_ops = {
2261 .pci_config = qla25xx_pci_config,
2262 .reset_chip = qla24xx_reset_chip,
2263 .chip_diag = qla24xx_chip_diag,
2264 .config_rings = qla24xx_config_rings,
2265 .reset_adapter = qla24xx_reset_adapter,
2266 .nvram_config = qla81xx_nvram_config,
2267 .update_fw_options = qla81xx_update_fw_options,
2268 .load_risc = qla81xx_load_risc,
2269 .pci_info_str = qla24xx_pci_info_str,
2270 .fw_version_str = qla24xx_fw_version_str,
2271 .intr_handler = qla24xx_intr_handler,
2272 .enable_intrs = qla24xx_enable_intrs,
2273 .disable_intrs = qla24xx_disable_intrs,
2274 .abort_command = qla24xx_abort_command,
2275 .target_reset = qla24xx_abort_target,
2276 .lun_reset = qla24xx_lun_reset,
2277 .fabric_login = qla24xx_login_fabric,
2278 .fabric_logout = qla24xx_fabric_logout,
2279 .calc_req_entries = NULL,
2280 .build_iocbs = NULL,
2281 .prep_ms_iocb = qla24xx_prep_ms_iocb,
2282 .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb,
2284 .write_nvram = NULL,
2285 .fw_dump = qla81xx_fw_dump,
2286 .beacon_on = qla24xx_beacon_on,
2287 .beacon_off = qla24xx_beacon_off,
2288 .beacon_blink = qla83xx_beacon_blink,
2289 .read_optrom = qla25xx_read_optrom_data,
2290 .write_optrom = qla24xx_write_optrom_data,
2291 .get_flash_version = qla24xx_get_flash_version,
2292 .start_scsi = qla24xx_dif_start_scsi,
2293 .start_scsi_mq = qla2xxx_dif_start_scsi_mq,
2294 .abort_isp = qla2x00_abort_isp,
2295 .iospace_config = qla2x00_iospace_config,
2296 .initialize_adapter = qla2x00_initialize_adapter,
2299 static struct isp_operations qla82xx_isp_ops = {
2300 .pci_config = qla82xx_pci_config,
2301 .reset_chip = qla82xx_reset_chip,
2302 .chip_diag = qla24xx_chip_diag,
2303 .config_rings = qla82xx_config_rings,
2304 .reset_adapter = qla24xx_reset_adapter,
2305 .nvram_config = qla81xx_nvram_config,
2306 .update_fw_options = qla24xx_update_fw_options,
2307 .load_risc = qla82xx_load_risc,
2308 .pci_info_str = qla24xx_pci_info_str,
2309 .fw_version_str = qla24xx_fw_version_str,
2310 .intr_handler = qla82xx_intr_handler,
2311 .enable_intrs = qla82xx_enable_intrs,
2312 .disable_intrs = qla82xx_disable_intrs,
2313 .abort_command = qla24xx_abort_command,
2314 .target_reset = qla24xx_abort_target,
2315 .lun_reset = qla24xx_lun_reset,
2316 .fabric_login = qla24xx_login_fabric,
2317 .fabric_logout = qla24xx_fabric_logout,
2318 .calc_req_entries = NULL,
2319 .build_iocbs = NULL,
2320 .prep_ms_iocb = qla24xx_prep_ms_iocb,
2321 .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb,
2322 .read_nvram = qla24xx_read_nvram_data,
2323 .write_nvram = qla24xx_write_nvram_data,
2324 .fw_dump = qla82xx_fw_dump,
2325 .beacon_on = qla82xx_beacon_on,
2326 .beacon_off = qla82xx_beacon_off,
2327 .beacon_blink = NULL,
2328 .read_optrom = qla82xx_read_optrom_data,
2329 .write_optrom = qla82xx_write_optrom_data,
2330 .get_flash_version = qla82xx_get_flash_version,
2331 .start_scsi = qla82xx_start_scsi,
2332 .start_scsi_mq = NULL,
2333 .abort_isp = qla82xx_abort_isp,
2334 .iospace_config = qla82xx_iospace_config,
2335 .initialize_adapter = qla2x00_initialize_adapter,
2338 static struct isp_operations qla8044_isp_ops = {
2339 .pci_config = qla82xx_pci_config,
2340 .reset_chip = qla82xx_reset_chip,
2341 .chip_diag = qla24xx_chip_diag,
2342 .config_rings = qla82xx_config_rings,
2343 .reset_adapter = qla24xx_reset_adapter,
2344 .nvram_config = qla81xx_nvram_config,
2345 .update_fw_options = qla24xx_update_fw_options,
2346 .load_risc = qla82xx_load_risc,
2347 .pci_info_str = qla24xx_pci_info_str,
2348 .fw_version_str = qla24xx_fw_version_str,
2349 .intr_handler = qla8044_intr_handler,
2350 .enable_intrs = qla82xx_enable_intrs,
2351 .disable_intrs = qla82xx_disable_intrs,
2352 .abort_command = qla24xx_abort_command,
2353 .target_reset = qla24xx_abort_target,
2354 .lun_reset = qla24xx_lun_reset,
2355 .fabric_login = qla24xx_login_fabric,
2356 .fabric_logout = qla24xx_fabric_logout,
2357 .calc_req_entries = NULL,
2358 .build_iocbs = NULL,
2359 .prep_ms_iocb = qla24xx_prep_ms_iocb,
2360 .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb,
2362 .write_nvram = NULL,
2363 .fw_dump = qla8044_fw_dump,
2364 .beacon_on = qla82xx_beacon_on,
2365 .beacon_off = qla82xx_beacon_off,
2366 .beacon_blink = NULL,
2367 .read_optrom = qla8044_read_optrom_data,
2368 .write_optrom = qla8044_write_optrom_data,
2369 .get_flash_version = qla82xx_get_flash_version,
2370 .start_scsi = qla82xx_start_scsi,
2371 .start_scsi_mq = NULL,
2372 .abort_isp = qla8044_abort_isp,
2373 .iospace_config = qla82xx_iospace_config,
2374 .initialize_adapter = qla2x00_initialize_adapter,
2377 static struct isp_operations qla83xx_isp_ops = {
2378 .pci_config = qla25xx_pci_config,
2379 .reset_chip = qla24xx_reset_chip,
2380 .chip_diag = qla24xx_chip_diag,
2381 .config_rings = qla24xx_config_rings,
2382 .reset_adapter = qla24xx_reset_adapter,
2383 .nvram_config = qla81xx_nvram_config,
2384 .update_fw_options = qla81xx_update_fw_options,
2385 .load_risc = qla81xx_load_risc,
2386 .pci_info_str = qla24xx_pci_info_str,
2387 .fw_version_str = qla24xx_fw_version_str,
2388 .intr_handler = qla24xx_intr_handler,
2389 .enable_intrs = qla24xx_enable_intrs,
2390 .disable_intrs = qla24xx_disable_intrs,
2391 .abort_command = qla24xx_abort_command,
2392 .target_reset = qla24xx_abort_target,
2393 .lun_reset = qla24xx_lun_reset,
2394 .fabric_login = qla24xx_login_fabric,
2395 .fabric_logout = qla24xx_fabric_logout,
2396 .calc_req_entries = NULL,
2397 .build_iocbs = NULL,
2398 .prep_ms_iocb = qla24xx_prep_ms_iocb,
2399 .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb,
2401 .write_nvram = NULL,
2402 .fw_dump = qla83xx_fw_dump,
2403 .beacon_on = qla24xx_beacon_on,
2404 .beacon_off = qla24xx_beacon_off,
2405 .beacon_blink = qla83xx_beacon_blink,
2406 .read_optrom = qla25xx_read_optrom_data,
2407 .write_optrom = qla24xx_write_optrom_data,
2408 .get_flash_version = qla24xx_get_flash_version,
2409 .start_scsi = qla24xx_dif_start_scsi,
2410 .start_scsi_mq = qla2xxx_dif_start_scsi_mq,
2411 .abort_isp = qla2x00_abort_isp,
2412 .iospace_config = qla83xx_iospace_config,
2413 .initialize_adapter = qla2x00_initialize_adapter,
2416 static struct isp_operations qlafx00_isp_ops = {
2417 .pci_config = qlafx00_pci_config,
2418 .reset_chip = qlafx00_soft_reset,
2419 .chip_diag = qlafx00_chip_diag,
2420 .config_rings = qlafx00_config_rings,
2421 .reset_adapter = qlafx00_soft_reset,
2422 .nvram_config = NULL,
2423 .update_fw_options = NULL,
2425 .pci_info_str = qlafx00_pci_info_str,
2426 .fw_version_str = qlafx00_fw_version_str,
2427 .intr_handler = qlafx00_intr_handler,
2428 .enable_intrs = qlafx00_enable_intrs,
2429 .disable_intrs = qlafx00_disable_intrs,
2430 .abort_command = qla24xx_async_abort_command,
2431 .target_reset = qlafx00_abort_target,
2432 .lun_reset = qlafx00_lun_reset,
2433 .fabric_login = NULL,
2434 .fabric_logout = NULL,
2435 .calc_req_entries = NULL,
2436 .build_iocbs = NULL,
2437 .prep_ms_iocb = qla24xx_prep_ms_iocb,
2438 .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb,
2439 .read_nvram = qla24xx_read_nvram_data,
2440 .write_nvram = qla24xx_write_nvram_data,
2442 .beacon_on = qla24xx_beacon_on,
2443 .beacon_off = qla24xx_beacon_off,
2444 .beacon_blink = NULL,
2445 .read_optrom = qla24xx_read_optrom_data,
2446 .write_optrom = qla24xx_write_optrom_data,
2447 .get_flash_version = qla24xx_get_flash_version,
2448 .start_scsi = qlafx00_start_scsi,
2449 .start_scsi_mq = NULL,
2450 .abort_isp = qlafx00_abort_isp,
2451 .iospace_config = qlafx00_iospace_config,
2452 .initialize_adapter = qlafx00_initialize_adapter,
2455 static struct isp_operations qla27xx_isp_ops = {
2456 .pci_config = qla25xx_pci_config,
2457 .reset_chip = qla24xx_reset_chip,
2458 .chip_diag = qla24xx_chip_diag,
2459 .config_rings = qla24xx_config_rings,
2460 .reset_adapter = qla24xx_reset_adapter,
2461 .nvram_config = qla81xx_nvram_config,
2462 .update_fw_options = qla81xx_update_fw_options,
2463 .load_risc = qla81xx_load_risc,
2464 .pci_info_str = qla24xx_pci_info_str,
2465 .fw_version_str = qla24xx_fw_version_str,
2466 .intr_handler = qla24xx_intr_handler,
2467 .enable_intrs = qla24xx_enable_intrs,
2468 .disable_intrs = qla24xx_disable_intrs,
2469 .abort_command = qla24xx_abort_command,
2470 .target_reset = qla24xx_abort_target,
2471 .lun_reset = qla24xx_lun_reset,
2472 .fabric_login = qla24xx_login_fabric,
2473 .fabric_logout = qla24xx_fabric_logout,
2474 .calc_req_entries = NULL,
2475 .build_iocbs = NULL,
2476 .prep_ms_iocb = qla24xx_prep_ms_iocb,
2477 .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb,
2479 .write_nvram = NULL,
2480 .fw_dump = qla27xx_fwdump,
2481 .beacon_on = qla24xx_beacon_on,
2482 .beacon_off = qla24xx_beacon_off,
2483 .beacon_blink = qla83xx_beacon_blink,
2484 .read_optrom = qla25xx_read_optrom_data,
2485 .write_optrom = qla24xx_write_optrom_data,
2486 .get_flash_version = qla24xx_get_flash_version,
2487 .start_scsi = qla24xx_dif_start_scsi,
2488 .start_scsi_mq = qla2xxx_dif_start_scsi_mq,
2489 .abort_isp = qla2x00_abort_isp,
2490 .iospace_config = qla83xx_iospace_config,
2491 .initialize_adapter = qla2x00_initialize_adapter,
2495 qla2x00_set_isp_flags(struct qla_hw_data *ha)
2497 ha->device_type = DT_EXTENDED_IDS;
2498 switch (ha->pdev->device) {
2499 case PCI_DEVICE_ID_QLOGIC_ISP2100:
2500 ha->isp_type |= DT_ISP2100;
2501 ha->device_type &= ~DT_EXTENDED_IDS;
2502 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
2504 case PCI_DEVICE_ID_QLOGIC_ISP2200:
2505 ha->isp_type |= DT_ISP2200;
2506 ha->device_type &= ~DT_EXTENDED_IDS;
2507 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
2509 case PCI_DEVICE_ID_QLOGIC_ISP2300:
2510 ha->isp_type |= DT_ISP2300;
2511 ha->device_type |= DT_ZIO_SUPPORTED;
2512 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2514 case PCI_DEVICE_ID_QLOGIC_ISP2312:
2515 ha->isp_type |= DT_ISP2312;
2516 ha->device_type |= DT_ZIO_SUPPORTED;
2517 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2519 case PCI_DEVICE_ID_QLOGIC_ISP2322:
2520 ha->isp_type |= DT_ISP2322;
2521 ha->device_type |= DT_ZIO_SUPPORTED;
2522 if (ha->pdev->subsystem_vendor == 0x1028 &&
2523 ha->pdev->subsystem_device == 0x0170)
2524 ha->device_type |= DT_OEM_001;
2525 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2527 case PCI_DEVICE_ID_QLOGIC_ISP6312:
2528 ha->isp_type |= DT_ISP6312;
2529 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2531 case PCI_DEVICE_ID_QLOGIC_ISP6322:
2532 ha->isp_type |= DT_ISP6322;
2533 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2535 case PCI_DEVICE_ID_QLOGIC_ISP2422:
2536 ha->isp_type |= DT_ISP2422;
2537 ha->device_type |= DT_ZIO_SUPPORTED;
2538 ha->device_type |= DT_FWI2;
2539 ha->device_type |= DT_IIDMA;
2540 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2542 case PCI_DEVICE_ID_QLOGIC_ISP2432:
2543 ha->isp_type |= DT_ISP2432;
2544 ha->device_type |= DT_ZIO_SUPPORTED;
2545 ha->device_type |= DT_FWI2;
2546 ha->device_type |= DT_IIDMA;
2547 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2549 case PCI_DEVICE_ID_QLOGIC_ISP8432:
2550 ha->isp_type |= DT_ISP8432;
2551 ha->device_type |= DT_ZIO_SUPPORTED;
2552 ha->device_type |= DT_FWI2;
2553 ha->device_type |= DT_IIDMA;
2554 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2556 case PCI_DEVICE_ID_QLOGIC_ISP5422:
2557 ha->isp_type |= DT_ISP5422;
2558 ha->device_type |= DT_FWI2;
2559 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2561 case PCI_DEVICE_ID_QLOGIC_ISP5432:
2562 ha->isp_type |= DT_ISP5432;
2563 ha->device_type |= DT_FWI2;
2564 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2566 case PCI_DEVICE_ID_QLOGIC_ISP2532:
2567 ha->isp_type |= DT_ISP2532;
2568 ha->device_type |= DT_ZIO_SUPPORTED;
2569 ha->device_type |= DT_FWI2;
2570 ha->device_type |= DT_IIDMA;
2571 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2573 case PCI_DEVICE_ID_QLOGIC_ISP8001:
2574 ha->isp_type |= DT_ISP8001;
2575 ha->device_type |= DT_ZIO_SUPPORTED;
2576 ha->device_type |= DT_FWI2;
2577 ha->device_type |= DT_IIDMA;
2578 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2580 case PCI_DEVICE_ID_QLOGIC_ISP8021:
2581 ha->isp_type |= DT_ISP8021;
2582 ha->device_type |= DT_ZIO_SUPPORTED;
2583 ha->device_type |= DT_FWI2;
2584 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2585 /* Initialize 82XX ISP flags */
2586 qla82xx_init_flags(ha);
2588 case PCI_DEVICE_ID_QLOGIC_ISP8044:
2589 ha->isp_type |= DT_ISP8044;
2590 ha->device_type |= DT_ZIO_SUPPORTED;
2591 ha->device_type |= DT_FWI2;
2592 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2593 /* Initialize 82XX ISP flags */
2594 qla82xx_init_flags(ha);
2596 case PCI_DEVICE_ID_QLOGIC_ISP2031:
2597 ha->isp_type |= DT_ISP2031;
2598 ha->device_type |= DT_ZIO_SUPPORTED;
2599 ha->device_type |= DT_FWI2;
2600 ha->device_type |= DT_IIDMA;
2601 ha->device_type |= DT_T10_PI;
2602 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2604 case PCI_DEVICE_ID_QLOGIC_ISP8031:
2605 ha->isp_type |= DT_ISP8031;
2606 ha->device_type |= DT_ZIO_SUPPORTED;
2607 ha->device_type |= DT_FWI2;
2608 ha->device_type |= DT_IIDMA;
2609 ha->device_type |= DT_T10_PI;
2610 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2612 case PCI_DEVICE_ID_QLOGIC_ISPF001:
2613 ha->isp_type |= DT_ISPFX00;
2615 case PCI_DEVICE_ID_QLOGIC_ISP2071:
2616 ha->isp_type |= DT_ISP2071;
2617 ha->device_type |= DT_ZIO_SUPPORTED;
2618 ha->device_type |= DT_FWI2;
2619 ha->device_type |= DT_IIDMA;
2620 ha->device_type |= DT_T10_PI;
2621 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2623 case PCI_DEVICE_ID_QLOGIC_ISP2271:
2624 ha->isp_type |= DT_ISP2271;
2625 ha->device_type |= DT_ZIO_SUPPORTED;
2626 ha->device_type |= DT_FWI2;
2627 ha->device_type |= DT_IIDMA;
2628 ha->device_type |= DT_T10_PI;
2629 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2631 case PCI_DEVICE_ID_QLOGIC_ISP2261:
2632 ha->isp_type |= DT_ISP2261;
2633 ha->device_type |= DT_ZIO_SUPPORTED;
2634 ha->device_type |= DT_FWI2;
2635 ha->device_type |= DT_IIDMA;
2636 ha->device_type |= DT_T10_PI;
2637 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2642 ha->port_no = ha->portnum & 1;
2644 /* Get adapter physical port no from interrupt pin register. */
2645 pci_read_config_byte(ha->pdev, PCI_INTERRUPT_PIN, &ha->port_no);
2649 ha->port_no = !(ha->port_no & 1);
2652 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x000b,
2653 "device_type=0x%x port=%d fw_srisc_address=0x%x.\n",
2654 ha->device_type, ha->port_no, ha->fw_srisc_address);
2658 qla2xxx_scan_start(struct Scsi_Host *shost)
2660 scsi_qla_host_t *vha = shost_priv(shost);
2662 if (vha->hw->flags.running_gold_fw)
2665 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
2666 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
2667 set_bit(RSCN_UPDATE, &vha->dpc_flags);
2668 set_bit(NPIV_CONFIG_NEEDED, &vha->dpc_flags);
2672 qla2xxx_scan_finished(struct Scsi_Host *shost, unsigned long time)
2674 scsi_qla_host_t *vha = shost_priv(shost);
2676 if (test_bit(UNLOADING, &vha->dpc_flags))
2680 if (time > vha->hw->loop_reset_delay * HZ)
2683 return atomic_read(&vha->loop_state) == LOOP_READY;
2686 static void qla2x00_iocb_work_fn(struct work_struct *work)
2688 struct scsi_qla_host *vha = container_of(work,
2689 struct scsi_qla_host, iocb_work);
2690 struct qla_hw_data *ha = vha->hw;
2691 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
2693 unsigned long flags;
2695 if (test_bit(UNLOADING, &base_vha->dpc_flags))
2698 while (!list_empty(&vha->work_list) && i > 0) {
2699 qla2x00_do_work(vha);
2703 spin_lock_irqsave(&vha->work_lock, flags);
2704 clear_bit(IOCB_WORK_ACTIVE, &vha->dpc_flags);
2705 spin_unlock_irqrestore(&vha->work_lock, flags);
2709 * PCI driver interface
2712 qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
2715 struct Scsi_Host *host;
2716 scsi_qla_host_t *base_vha = NULL;
2717 struct qla_hw_data *ha;
2719 char fw_str[30], wq_name[30];
2720 struct scsi_host_template *sht;
2721 int bars, mem_only = 0;
2722 uint16_t req_length = 0, rsp_length = 0;
2723 struct req_que *req = NULL;
2724 struct rsp_que *rsp = NULL;
2727 bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
2728 sht = &qla2xxx_driver_template;
2729 if (pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2422 ||
2730 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2432 ||
2731 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8432 ||
2732 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5422 ||
2733 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5432 ||
2734 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2532 ||
2735 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8001 ||
2736 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8021 ||
2737 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2031 ||
2738 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8031 ||
2739 pdev->device == PCI_DEVICE_ID_QLOGIC_ISPF001 ||
2740 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8044 ||
2741 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2071 ||
2742 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2271 ||
2743 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2261) {
2744 bars = pci_select_bars(pdev, IORESOURCE_MEM);
2746 ql_dbg_pci(ql_dbg_init, pdev, 0x0007,
2747 "Mem only adapter.\n");
2749 ql_dbg_pci(ql_dbg_init, pdev, 0x0008,
2750 "Bars=%d.\n", bars);
2753 if (pci_enable_device_mem(pdev))
2756 if (pci_enable_device(pdev))
2760 /* This may fail but that's ok */
2761 pci_enable_pcie_error_reporting(pdev);
2763 ha = kzalloc(sizeof(struct qla_hw_data), GFP_KERNEL);
2765 ql_log_pci(ql_log_fatal, pdev, 0x0009,
2766 "Unable to allocate memory for ha.\n");
2767 goto disable_device;
2769 ql_dbg_pci(ql_dbg_init, pdev, 0x000a,
2770 "Memory allocated for ha=%p.\n", ha);
2772 INIT_LIST_HEAD(&ha->tgt.q_full_list);
2773 spin_lock_init(&ha->tgt.q_full_lock);
2774 spin_lock_init(&ha->tgt.sess_lock);
2775 spin_lock_init(&ha->tgt.atio_lock);
2777 atomic_set(&ha->nvme_active_aen_cnt, 0);
2779 /* Clear our data area */
2781 ha->mem_only = mem_only;
2782 spin_lock_init(&ha->hardware_lock);
2783 spin_lock_init(&ha->vport_slock);
2784 mutex_init(&ha->selflogin_lock);
2785 mutex_init(&ha->optrom_mutex);
2787 /* Set ISP-type information. */
2788 qla2x00_set_isp_flags(ha);
2790 /* Set EEH reset type to fundamental if required by hba */
2791 if (IS_QLA24XX(ha) || IS_QLA25XX(ha) || IS_QLA81XX(ha) ||
2792 IS_QLA83XX(ha) || IS_QLA27XX(ha))
2793 pdev->needs_freset = 1;
2795 ha->prev_topology = 0;
2796 ha->init_cb_size = sizeof(init_cb_t);
2797 ha->link_data_rate = PORT_SPEED_UNKNOWN;
2798 ha->optrom_size = OPTROM_SIZE_2300;
2799 ha->max_exchg = FW_MAX_EXCHANGES_CNT;
2800 atomic_set(&ha->num_pend_mbx_stage1, 0);
2801 atomic_set(&ha->num_pend_mbx_stage2, 0);
2802 atomic_set(&ha->num_pend_mbx_stage3, 0);
2804 /* Assign ISP specific operations. */
2805 if (IS_QLA2100(ha)) {
2806 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2807 ha->mbx_count = MAILBOX_REGISTER_COUNT_2100;
2808 req_length = REQUEST_ENTRY_CNT_2100;
2809 rsp_length = RESPONSE_ENTRY_CNT_2100;
2810 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
2811 ha->gid_list_info_size = 4;
2812 ha->flash_conf_off = ~0;
2813 ha->flash_data_off = ~0;
2814 ha->nvram_conf_off = ~0;
2815 ha->nvram_data_off = ~0;
2816 ha->isp_ops = &qla2100_isp_ops;
2817 } else if (IS_QLA2200(ha)) {
2818 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2819 ha->mbx_count = MAILBOX_REGISTER_COUNT_2200;
2820 req_length = REQUEST_ENTRY_CNT_2200;
2821 rsp_length = RESPONSE_ENTRY_CNT_2100;
2822 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
2823 ha->gid_list_info_size = 4;
2824 ha->flash_conf_off = ~0;
2825 ha->flash_data_off = ~0;
2826 ha->nvram_conf_off = ~0;
2827 ha->nvram_data_off = ~0;
2828 ha->isp_ops = &qla2100_isp_ops;
2829 } else if (IS_QLA23XX(ha)) {
2830 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2831 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2832 req_length = REQUEST_ENTRY_CNT_2200;
2833 rsp_length = RESPONSE_ENTRY_CNT_2300;
2834 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2835 ha->gid_list_info_size = 6;
2836 if (IS_QLA2322(ha) || IS_QLA6322(ha))
2837 ha->optrom_size = OPTROM_SIZE_2322;
2838 ha->flash_conf_off = ~0;
2839 ha->flash_data_off = ~0;
2840 ha->nvram_conf_off = ~0;
2841 ha->nvram_data_off = ~0;
2842 ha->isp_ops = &qla2300_isp_ops;
2843 } else if (IS_QLA24XX_TYPE(ha)) {
2844 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2845 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2846 req_length = REQUEST_ENTRY_CNT_24XX;
2847 rsp_length = RESPONSE_ENTRY_CNT_2300;
2848 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2849 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2850 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
2851 ha->gid_list_info_size = 8;
2852 ha->optrom_size = OPTROM_SIZE_24XX;
2853 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA24XX;
2854 ha->isp_ops = &qla24xx_isp_ops;
2855 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2856 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2857 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2858 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2859 } else if (IS_QLA25XX(ha)) {
2860 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2861 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2862 req_length = REQUEST_ENTRY_CNT_24XX;
2863 rsp_length = RESPONSE_ENTRY_CNT_2300;
2864 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2865 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2866 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
2867 ha->gid_list_info_size = 8;
2868 ha->optrom_size = OPTROM_SIZE_25XX;
2869 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2870 ha->isp_ops = &qla25xx_isp_ops;
2871 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2872 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2873 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2874 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2875 } else if (IS_QLA81XX(ha)) {
2876 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2877 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2878 req_length = REQUEST_ENTRY_CNT_24XX;
2879 rsp_length = RESPONSE_ENTRY_CNT_2300;
2880 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2881 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2882 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2883 ha->gid_list_info_size = 8;
2884 ha->optrom_size = OPTROM_SIZE_81XX;
2885 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2886 ha->isp_ops = &qla81xx_isp_ops;
2887 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2888 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2889 ha->nvram_conf_off = ~0;
2890 ha->nvram_data_off = ~0;
2891 } else if (IS_QLA82XX(ha)) {
2892 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2893 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2894 req_length = REQUEST_ENTRY_CNT_82XX;
2895 rsp_length = RESPONSE_ENTRY_CNT_82XX;
2896 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2897 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2898 ha->gid_list_info_size = 8;
2899 ha->optrom_size = OPTROM_SIZE_82XX;
2900 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2901 ha->isp_ops = &qla82xx_isp_ops;
2902 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2903 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2904 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2905 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2906 } else if (IS_QLA8044(ha)) {
2907 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2908 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2909 req_length = REQUEST_ENTRY_CNT_82XX;
2910 rsp_length = RESPONSE_ENTRY_CNT_82XX;
2911 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2912 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2913 ha->gid_list_info_size = 8;
2914 ha->optrom_size = OPTROM_SIZE_83XX;
2915 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2916 ha->isp_ops = &qla8044_isp_ops;
2917 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2918 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2919 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2920 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2921 } else if (IS_QLA83XX(ha)) {
2922 ha->portnum = PCI_FUNC(ha->pdev->devfn);
2923 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2924 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2925 req_length = REQUEST_ENTRY_CNT_83XX;
2926 rsp_length = RESPONSE_ENTRY_CNT_83XX;
2927 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2928 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2929 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2930 ha->gid_list_info_size = 8;
2931 ha->optrom_size = OPTROM_SIZE_83XX;
2932 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2933 ha->isp_ops = &qla83xx_isp_ops;
2934 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2935 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2936 ha->nvram_conf_off = ~0;
2937 ha->nvram_data_off = ~0;
2938 } else if (IS_QLAFX00(ha)) {
2939 ha->max_fibre_devices = MAX_FIBRE_DEVICES_FX00;
2940 ha->mbx_count = MAILBOX_REGISTER_COUNT_FX00;
2941 ha->aen_mbx_count = AEN_MAILBOX_REGISTER_COUNT_FX00;
2942 req_length = REQUEST_ENTRY_CNT_FX00;
2943 rsp_length = RESPONSE_ENTRY_CNT_FX00;
2944 ha->isp_ops = &qlafx00_isp_ops;
2945 ha->port_down_retry_count = 30; /* default value */
2946 ha->mr.fw_hbt_cnt = QLAFX00_HEARTBEAT_INTERVAL;
2947 ha->mr.fw_reset_timer_tick = QLAFX00_RESET_INTERVAL;
2948 ha->mr.fw_critemp_timer_tick = QLAFX00_CRITEMP_INTERVAL;
2949 ha->mr.fw_hbt_en = 1;
2950 ha->mr.host_info_resend = false;
2951 ha->mr.hinfo_resend_timer_tick = QLAFX00_HINFO_RESEND_INTERVAL;
2952 } else if (IS_QLA27XX(ha)) {
2953 ha->portnum = PCI_FUNC(ha->pdev->devfn);
2954 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2955 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2956 req_length = REQUEST_ENTRY_CNT_83XX;
2957 rsp_length = RESPONSE_ENTRY_CNT_83XX;
2958 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2959 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2960 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2961 ha->gid_list_info_size = 8;
2962 ha->optrom_size = OPTROM_SIZE_83XX;
2963 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2964 ha->isp_ops = &qla27xx_isp_ops;
2965 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2966 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2967 ha->nvram_conf_off = ~0;
2968 ha->nvram_data_off = ~0;
2971 ql_dbg_pci(ql_dbg_init, pdev, 0x001e,
2972 "mbx_count=%d, req_length=%d, "
2973 "rsp_length=%d, max_loop_id=%d, init_cb_size=%d, "
2974 "gid_list_info_size=%d, optrom_size=%d, nvram_npiv_size=%d, "
2975 "max_fibre_devices=%d.\n",
2976 ha->mbx_count, req_length, rsp_length, ha->max_loop_id,
2977 ha->init_cb_size, ha->gid_list_info_size, ha->optrom_size,
2978 ha->nvram_npiv_size, ha->max_fibre_devices);
2979 ql_dbg_pci(ql_dbg_init, pdev, 0x001f,
2980 "isp_ops=%p, flash_conf_off=%d, "
2981 "flash_data_off=%d, nvram_conf_off=%d, nvram_data_off=%d.\n",
2982 ha->isp_ops, ha->flash_conf_off, ha->flash_data_off,
2983 ha->nvram_conf_off, ha->nvram_data_off);
2985 /* Configure PCI I/O space */
2986 ret = ha->isp_ops->iospace_config(ha);
2988 goto iospace_config_failed;
2990 ql_log_pci(ql_log_info, pdev, 0x001d,
2991 "Found an ISP%04X irq %d iobase 0x%p.\n",
2992 pdev->device, pdev->irq, ha->iobase);
2993 mutex_init(&ha->vport_lock);
2994 mutex_init(&ha->mq_lock);
2995 init_completion(&ha->mbx_cmd_comp);
2996 complete(&ha->mbx_cmd_comp);
2997 init_completion(&ha->mbx_intr_comp);
2998 init_completion(&ha->dcbx_comp);
2999 init_completion(&ha->lb_portup_comp);
3001 set_bit(0, (unsigned long *) ha->vp_idx_map);
3003 qla2x00_config_dma_addressing(ha);
3004 ql_dbg_pci(ql_dbg_init, pdev, 0x0020,
3005 "64 Bit addressing is %s.\n",
3006 ha->flags.enable_64bit_addressing ? "enable" :
3008 ret = qla2x00_mem_alloc(ha, req_length, rsp_length, &req, &rsp);
3010 ql_log_pci(ql_log_fatal, pdev, 0x0031,
3011 "Failed to allocate memory for adapter, aborting.\n");
3013 goto probe_hw_failed;
3016 req->max_q_depth = MAX_Q_DEPTH;
3017 if (ql2xmaxqdepth != 0 && ql2xmaxqdepth <= 0xffffU)
3018 req->max_q_depth = ql2xmaxqdepth;
3021 base_vha = qla2x00_create_host(sht, ha);
3024 goto probe_hw_failed;
3027 pci_set_drvdata(pdev, base_vha);
3028 set_bit(PFLG_DRIVER_PROBING, &base_vha->pci_flags);
3030 host = base_vha->host;
3031 base_vha->req = req;
3032 if (IS_QLA2XXX_MIDTYPE(ha))
3033 base_vha->mgmt_svr_loop_id =
3034 qla2x00_reserve_mgmt_server_loop_id(base_vha);
3036 base_vha->mgmt_svr_loop_id = MANAGEMENT_SERVER +
3039 /* Setup fcport template structure. */
3040 ha->mr.fcport.vha = base_vha;
3041 ha->mr.fcport.port_type = FCT_UNKNOWN;
3042 ha->mr.fcport.loop_id = FC_NO_LOOP_ID;
3043 qla2x00_set_fcport_state(&ha->mr.fcport, FCS_UNCONFIGURED);
3044 ha->mr.fcport.supported_classes = FC_COS_UNSPECIFIED;
3045 ha->mr.fcport.scan_state = 1;
3047 /* Set the SG table size based on ISP type */
3048 if (!IS_FWI2_CAPABLE(ha)) {
3050 host->sg_tablesize = 32;
3052 if (!IS_QLA82XX(ha))
3053 host->sg_tablesize = QLA_SG_ALL;
3055 host->max_id = ha->max_fibre_devices;
3056 host->cmd_per_lun = 3;
3057 host->unique_id = host->host_no;
3058 if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif)
3059 host->max_cmd_len = 32;
3061 host->max_cmd_len = MAX_CMDSZ;
3062 host->max_channel = MAX_BUSES - 1;
3063 /* Older HBAs support only 16-bit LUNs */
3064 if (!IS_QLAFX00(ha) && !IS_FWI2_CAPABLE(ha) &&
3065 ql2xmaxlun > 0xffff)
3066 host->max_lun = 0xffff;
3068 host->max_lun = ql2xmaxlun;
3069 host->transportt = qla2xxx_transport_template;
3070 sht->vendor_id = (SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_QLOGIC);
3072 ql_dbg(ql_dbg_init, base_vha, 0x0033,
3073 "max_id=%d this_id=%d "
3074 "cmd_per_len=%d unique_id=%d max_cmd_len=%d max_channel=%d "
3075 "max_lun=%llu transportt=%p, vendor_id=%llu.\n", host->max_id,
3076 host->this_id, host->cmd_per_lun, host->unique_id,
3077 host->max_cmd_len, host->max_channel, host->max_lun,
3078 host->transportt, sht->vendor_id);
3080 INIT_WORK(&base_vha->iocb_work, qla2x00_iocb_work_fn);
3082 /* Set up the irqs */
3083 ret = qla2x00_request_irqs(ha, rsp);
3087 /* Alloc arrays of request and response ring ptrs */
3088 ret = qla2x00_alloc_queues(ha, req, rsp);
3090 ql_log(ql_log_fatal, base_vha, 0x003d,
3091 "Failed to allocate memory for queue pointers..."
3096 if (ha->mqenable && shost_use_blk_mq(host)) {
3097 /* number of hardware queues supported by blk/scsi-mq*/
3098 host->nr_hw_queues = ha->max_qpairs;
3100 ql_dbg(ql_dbg_init, base_vha, 0x0192,
3101 "blk/scsi-mq enabled, HW queues = %d.\n", host->nr_hw_queues);
3103 if (ql2xnvmeenable) {
3104 host->nr_hw_queues = ha->max_qpairs;
3105 ql_dbg(ql_dbg_init, base_vha, 0x0194,
3106 "FC-NVMe support is enabled, HW queues=%d\n",
3107 host->nr_hw_queues);
3109 ql_dbg(ql_dbg_init, base_vha, 0x0193,
3110 "blk/scsi-mq disabled.\n");
3114 qlt_probe_one_stage1(base_vha, ha);
3116 pci_save_state(pdev);
3118 /* Assign back pointers */
3122 if (IS_QLAFX00(ha)) {
3123 ha->rsp_q_map[0] = rsp;
3124 ha->req_q_map[0] = req;
3125 set_bit(0, ha->req_qid_map);
3126 set_bit(0, ha->rsp_qid_map);
3129 /* FWI2-capable only. */
3130 req->req_q_in = &ha->iobase->isp24.req_q_in;
3131 req->req_q_out = &ha->iobase->isp24.req_q_out;
3132 rsp->rsp_q_in = &ha->iobase->isp24.rsp_q_in;
3133 rsp->rsp_q_out = &ha->iobase->isp24.rsp_q_out;
3134 if (ha->mqenable || IS_QLA83XX(ha) || IS_QLA27XX(ha)) {
3135 req->req_q_in = &ha->mqiobase->isp25mq.req_q_in;
3136 req->req_q_out = &ha->mqiobase->isp25mq.req_q_out;
3137 rsp->rsp_q_in = &ha->mqiobase->isp25mq.rsp_q_in;
3138 rsp->rsp_q_out = &ha->mqiobase->isp25mq.rsp_q_out;
3141 if (IS_QLAFX00(ha)) {
3142 req->req_q_in = &ha->iobase->ispfx00.req_q_in;
3143 req->req_q_out = &ha->iobase->ispfx00.req_q_out;
3144 rsp->rsp_q_in = &ha->iobase->ispfx00.rsp_q_in;
3145 rsp->rsp_q_out = &ha->iobase->ispfx00.rsp_q_out;
3148 if (IS_P3P_TYPE(ha)) {
3149 req->req_q_out = &ha->iobase->isp82.req_q_out[0];
3150 rsp->rsp_q_in = &ha->iobase->isp82.rsp_q_in[0];
3151 rsp->rsp_q_out = &ha->iobase->isp82.rsp_q_out[0];
3154 ql_dbg(ql_dbg_multiq, base_vha, 0xc009,
3155 "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n",
3156 ha->rsp_q_map, ha->req_q_map, rsp->req, req->rsp);
3157 ql_dbg(ql_dbg_multiq, base_vha, 0xc00a,
3158 "req->req_q_in=%p req->req_q_out=%p "
3159 "rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n",
3160 req->req_q_in, req->req_q_out,
3161 rsp->rsp_q_in, rsp->rsp_q_out);
3162 ql_dbg(ql_dbg_init, base_vha, 0x003e,
3163 "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n",
3164 ha->rsp_q_map, ha->req_q_map, rsp->req, req->rsp);
3165 ql_dbg(ql_dbg_init, base_vha, 0x003f,
3166 "req->req_q_in=%p req->req_q_out=%p rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n",
3167 req->req_q_in, req->req_q_out, rsp->rsp_q_in, rsp->rsp_q_out);
3169 ha->wq = alloc_workqueue("qla2xxx_wq", 0, 0);
3170 if (unlikely(!ha->wq)) {
3175 if (ha->isp_ops->initialize_adapter(base_vha)) {
3176 ql_log(ql_log_fatal, base_vha, 0x00d6,
3177 "Failed to initialize adapter - Adapter flags %x.\n",
3178 base_vha->device_flags);
3180 if (IS_QLA82XX(ha)) {
3181 qla82xx_idc_lock(ha);
3182 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
3183 QLA8XXX_DEV_FAILED);
3184 qla82xx_idc_unlock(ha);
3185 ql_log(ql_log_fatal, base_vha, 0x00d7,
3186 "HW State: FAILED.\n");
3187 } else if (IS_QLA8044(ha)) {
3188 qla8044_idc_lock(ha);
3189 qla8044_wr_direct(base_vha,
3190 QLA8044_CRB_DEV_STATE_INDEX,
3191 QLA8XXX_DEV_FAILED);
3192 qla8044_idc_unlock(ha);
3193 ql_log(ql_log_fatal, base_vha, 0x0150,
3194 "HW State: FAILED.\n");
3202 host->can_queue = QLAFX00_MAX_CANQUEUE;
3204 host->can_queue = req->num_outstanding_cmds - 10;
3206 ql_dbg(ql_dbg_init, base_vha, 0x0032,
3207 "can_queue=%d, req=%p, mgmt_svr_loop_id=%d, sg_tablesize=%d.\n",
3208 host->can_queue, base_vha->req,
3209 base_vha->mgmt_svr_loop_id, host->sg_tablesize);
3213 bool startit = false;
3215 if (QLA_TGT_MODE_ENABLED()) {
3220 if ((ql2x_ini_mode == QLA2XXX_INI_MODE_ENABLED) &&
3221 shost_use_blk_mq(host)) {
3227 /* Create start of day qpairs for Block MQ */
3228 for (i = 0; i < ha->max_qpairs; i++)
3229 qla2xxx_create_qpair(base_vha, 5, 0, startit);
3233 if (ha->flags.running_gold_fw)
3237 * Startup the kernel thread for this host adapter
3239 ha->dpc_thread = kthread_create(qla2x00_do_dpc, ha,
3240 "%s_dpc", base_vha->host_str);
3241 if (IS_ERR(ha->dpc_thread)) {
3242 ql_log(ql_log_fatal, base_vha, 0x00ed,
3243 "Failed to start DPC thread.\n");
3244 ret = PTR_ERR(ha->dpc_thread);
3245 ha->dpc_thread = NULL;
3248 ql_dbg(ql_dbg_init, base_vha, 0x00ee,
3249 "DPC thread started successfully.\n");
3252 * If we're not coming up in initiator mode, we might sit for
3253 * a while without waking up the dpc thread, which leads to a
3254 * stuck process warning. So just kick the dpc once here and
3255 * let the kthread start (and go back to sleep in qla2x00_do_dpc).
3257 qla2xxx_wake_dpc(base_vha);
3259 INIT_WORK(&ha->board_disable, qla2x00_disable_board_on_pci_error);
3261 if (IS_QLA8031(ha) || IS_MCTP_CAPABLE(ha)) {
3262 sprintf(wq_name, "qla2xxx_%lu_dpc_lp_wq", base_vha->host_no);
3263 ha->dpc_lp_wq = create_singlethread_workqueue(wq_name);
3264 INIT_WORK(&ha->idc_aen, qla83xx_service_idc_aen);
3266 sprintf(wq_name, "qla2xxx_%lu_dpc_hp_wq", base_vha->host_no);
3267 ha->dpc_hp_wq = create_singlethread_workqueue(wq_name);
3268 INIT_WORK(&ha->nic_core_reset, qla83xx_nic_core_reset_work);
3269 INIT_WORK(&ha->idc_state_handler,
3270 qla83xx_idc_state_handler_work);
3271 INIT_WORK(&ha->nic_core_unrecoverable,
3272 qla83xx_nic_core_unrecoverable_work);
3276 list_add_tail(&base_vha->list, &ha->vp_list);
3277 base_vha->host->irq = ha->pdev->irq;
3279 /* Initialized the timer */
3280 qla2x00_start_timer(base_vha, WATCH_INTERVAL);
3281 ql_dbg(ql_dbg_init, base_vha, 0x00ef,
3282 "Started qla2x00_timer with "
3283 "interval=%d.\n", WATCH_INTERVAL);
3284 ql_dbg(ql_dbg_init, base_vha, 0x00f0,
3285 "Detected hba at address=%p.\n",
3288 if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) {
3289 if (ha->fw_attributes & BIT_4) {
3290 int prot = 0, guard;
3291 base_vha->flags.difdix_supported = 1;
3292 ql_dbg(ql_dbg_init, base_vha, 0x00f1,
3293 "Registering for DIF/DIX type 1 and 3 protection.\n");
3294 if (ql2xenabledif == 1)
3295 prot = SHOST_DIX_TYPE0_PROTECTION;
3296 scsi_host_set_prot(host,
3297 prot | SHOST_DIF_TYPE1_PROTECTION
3298 | SHOST_DIF_TYPE2_PROTECTION
3299 | SHOST_DIF_TYPE3_PROTECTION
3300 | SHOST_DIX_TYPE1_PROTECTION
3301 | SHOST_DIX_TYPE2_PROTECTION
3302 | SHOST_DIX_TYPE3_PROTECTION);
3304 guard = SHOST_DIX_GUARD_CRC;
3306 if (IS_PI_IPGUARD_CAPABLE(ha) &&
3307 (ql2xenabledif > 1 || IS_PI_DIFB_DIX0_CAPABLE(ha)))
3308 guard |= SHOST_DIX_GUARD_IP;
3310 scsi_host_set_guard(host, guard);
3312 base_vha->flags.difdix_supported = 0;
3315 ha->isp_ops->enable_intrs(ha);
3317 if (IS_QLAFX00(ha)) {
3318 ret = qlafx00_fx_disc(base_vha,
3319 &base_vha->hw->mr.fcport, FXDISC_GET_CONFIG_INFO);
3320 host->sg_tablesize = (ha->mr.extended_io_enabled) ?
3324 ret = scsi_add_host(host, &pdev->dev);
3328 base_vha->flags.init_done = 1;
3329 base_vha->flags.online = 1;
3330 ha->prev_minidump_failed = 0;
3332 ql_dbg(ql_dbg_init, base_vha, 0x00f2,
3333 "Init done and hba is online.\n");
3335 if (qla_ini_mode_enabled(base_vha) ||
3336 qla_dual_mode_enabled(base_vha))
3337 scsi_scan_host(host);
3339 ql_dbg(ql_dbg_init, base_vha, 0x0122,
3340 "skipping scsi_scan_host() for non-initiator port\n");
3342 qla2x00_alloc_sysfs_attr(base_vha);
3344 if (IS_QLAFX00(ha)) {
3345 ret = qlafx00_fx_disc(base_vha,
3346 &base_vha->hw->mr.fcport, FXDISC_GET_PORT_INFO);
3348 /* Register system information */
3349 ret = qlafx00_fx_disc(base_vha,
3350 &base_vha->hw->mr.fcport, FXDISC_REG_HOST_INFO);
3353 qla2x00_init_host_attr(base_vha);
3355 qla2x00_dfs_setup(base_vha);
3357 ql_log(ql_log_info, base_vha, 0x00fb,
3358 "QLogic %s - %s.\n", ha->model_number, ha->model_desc);
3359 ql_log(ql_log_info, base_vha, 0x00fc,
3360 "ISP%04X: %s @ %s hdma%c host#=%ld fw=%s.\n",
3361 pdev->device, ha->isp_ops->pci_info_str(base_vha, pci_info),
3362 pci_name(pdev), ha->flags.enable_64bit_addressing ? '+' : '-',
3364 ha->isp_ops->fw_version_str(base_vha, fw_str, sizeof(fw_str)));
3366 qlt_add_target(ha, base_vha);
3368 clear_bit(PFLG_DRIVER_PROBING, &base_vha->pci_flags);
3370 if (test_bit(UNLOADING, &base_vha->dpc_flags))
3373 if (ha->flags.detected_lr_sfp) {
3374 ql_log(ql_log_info, base_vha, 0xffff,
3375 "Reset chip to pick up LR SFP setting\n");
3376 set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags);
3377 qla2xxx_wake_dpc(base_vha);
3383 if (base_vha->gnl.l) {
3384 dma_free_coherent(&ha->pdev->dev, base_vha->gnl.size,
3385 base_vha->gnl.l, base_vha->gnl.ldma);
3386 base_vha->gnl.l = NULL;
3389 if (base_vha->timer_active)
3390 qla2x00_stop_timer(base_vha);
3391 base_vha->flags.online = 0;
3392 if (ha->dpc_thread) {
3393 struct task_struct *t = ha->dpc_thread;
3395 ha->dpc_thread = NULL;
3399 qla2x00_free_device(base_vha);
3400 scsi_host_put(base_vha->host);
3402 * Need to NULL out local req/rsp after
3403 * qla2x00_free_device => qla2x00_free_queues frees
3404 * what these are pointing to. Or else we'll
3405 * fall over below in qla2x00_free_req/rsp_que.
3411 qla2x00_mem_free(ha);
3412 qla2x00_free_req_que(ha, req);
3413 qla2x00_free_rsp_que(ha, rsp);
3414 qla2x00_clear_drv_active(ha);
3416 iospace_config_failed:
3417 if (IS_P3P_TYPE(ha)) {
3418 if (!ha->nx_pcibase)
3419 iounmap((device_reg_t *)ha->nx_pcibase);
3421 iounmap((device_reg_t *)ha->nxdb_wr_ptr);
3424 iounmap(ha->iobase);
3426 iounmap(ha->cregbase);
3428 pci_release_selected_regions(ha->pdev, ha->bars);
3432 pci_disable_device(pdev);
3437 qla2x00_shutdown(struct pci_dev *pdev)
3439 scsi_qla_host_t *vha;
3440 struct qla_hw_data *ha;
3442 vha = pci_get_drvdata(pdev);
3445 ql_log(ql_log_info, vha, 0xfffa,
3446 "Adapter shutdown\n");
3449 * Prevent future board_disable and wait
3450 * until any pending board_disable has completed.
3452 set_bit(PFLG_DRIVER_REMOVING, &vha->pci_flags);
3453 cancel_work_sync(&ha->board_disable);
3455 if (!atomic_read(&pdev->enable_cnt))
3458 /* Notify ISPFX00 firmware */
3460 qlafx00_driver_shutdown(vha, 20);
3462 /* Turn-off FCE trace */
3463 if (ha->flags.fce_enabled) {
3464 qla2x00_disable_fce_trace(vha, NULL, NULL);
3465 ha->flags.fce_enabled = 0;
3468 /* Turn-off EFT trace */
3470 qla2x00_disable_eft_trace(vha);
3472 if (IS_QLA25XX(ha) || IS_QLA2031(ha) || IS_QLA27XX(ha)) {
3473 if (ha->flags.fw_started)
3474 qla2x00_abort_isp_cleanup(vha);
3476 /* Stop currently executing firmware. */
3477 qla2x00_try_to_stop_firmware(vha);
3481 if (vha->timer_active)
3482 qla2x00_stop_timer(vha);
3484 /* Turn adapter off line */
3485 vha->flags.online = 0;
3487 /* turn-off interrupts on the card */
3488 if (ha->interrupts_on) {
3489 vha->flags.init_done = 0;
3490 ha->isp_ops->disable_intrs(ha);
3493 qla2x00_free_irqs(vha);
3495 qla2x00_free_fw_dump(ha);
3497 pci_disable_device(pdev);
3498 ql_log(ql_log_info, vha, 0xfffe,
3499 "Adapter shutdown successfully.\n");
3502 /* Deletes all the virtual ports for a given ha */
3504 qla2x00_delete_all_vps(struct qla_hw_data *ha, scsi_qla_host_t *base_vha)
3506 scsi_qla_host_t *vha;
3507 unsigned long flags;
3509 mutex_lock(&ha->vport_lock);
3510 while (ha->cur_vport_count) {
3511 spin_lock_irqsave(&ha->vport_slock, flags);
3513 BUG_ON(base_vha->list.next == &ha->vp_list);
3514 /* This assumes first entry in ha->vp_list is always base vha */
3515 vha = list_first_entry(&base_vha->list, scsi_qla_host_t, list);
3516 scsi_host_get(vha->host);
3518 spin_unlock_irqrestore(&ha->vport_slock, flags);
3519 mutex_unlock(&ha->vport_lock);
3521 qla_nvme_delete(vha);
3523 fc_vport_terminate(vha->fc_vport);
3524 scsi_host_put(vha->host);
3526 mutex_lock(&ha->vport_lock);
3528 mutex_unlock(&ha->vport_lock);
3531 /* Stops all deferred work threads */
3533 qla2x00_destroy_deferred_work(struct qla_hw_data *ha)
3535 /* Cancel all work and destroy DPC workqueues */
3536 if (ha->dpc_lp_wq) {
3537 cancel_work_sync(&ha->idc_aen);
3538 destroy_workqueue(ha->dpc_lp_wq);
3539 ha->dpc_lp_wq = NULL;
3542 if (ha->dpc_hp_wq) {
3543 cancel_work_sync(&ha->nic_core_reset);
3544 cancel_work_sync(&ha->idc_state_handler);
3545 cancel_work_sync(&ha->nic_core_unrecoverable);
3546 destroy_workqueue(ha->dpc_hp_wq);
3547 ha->dpc_hp_wq = NULL;
3550 /* Kill the kernel thread for this host */
3551 if (ha->dpc_thread) {
3552 struct task_struct *t = ha->dpc_thread;
3555 * qla2xxx_wake_dpc checks for ->dpc_thread
3556 * so we need to zero it out.
3558 ha->dpc_thread = NULL;
3564 qla2x00_unmap_iobases(struct qla_hw_data *ha)
3566 if (IS_QLA82XX(ha)) {
3568 iounmap((device_reg_t *)ha->nx_pcibase);
3570 iounmap((device_reg_t *)ha->nxdb_wr_ptr);
3573 iounmap(ha->iobase);
3576 iounmap(ha->cregbase);
3579 iounmap(ha->mqiobase);
3581 if ((IS_QLA83XX(ha) || IS_QLA27XX(ha)) && ha->msixbase)
3582 iounmap(ha->msixbase);
3587 qla2x00_clear_drv_active(struct qla_hw_data *ha)
3589 if (IS_QLA8044(ha)) {
3590 qla8044_idc_lock(ha);
3591 qla8044_clear_drv_active(ha);
3592 qla8044_idc_unlock(ha);
3593 } else if (IS_QLA82XX(ha)) {
3594 qla82xx_idc_lock(ha);
3595 qla82xx_clear_drv_active(ha);
3596 qla82xx_idc_unlock(ha);
3601 qla2x00_remove_one(struct pci_dev *pdev)
3603 scsi_qla_host_t *base_vha;
3604 struct qla_hw_data *ha;
3606 base_vha = pci_get_drvdata(pdev);
3608 ql_log(ql_log_info, base_vha, 0xb079,
3609 "Removing driver\n");
3611 /* Indicate device removal to prevent future board_disable and wait
3612 * until any pending board_disable has completed. */
3613 set_bit(PFLG_DRIVER_REMOVING, &base_vha->pci_flags);
3614 cancel_work_sync(&ha->board_disable);
3617 * If the PCI device is disabled then there was a PCI-disconnect and
3618 * qla2x00_disable_board_on_pci_error has taken care of most of the
3621 if (!atomic_read(&pdev->enable_cnt)) {
3622 dma_free_coherent(&ha->pdev->dev, base_vha->gnl.size,
3623 base_vha->gnl.l, base_vha->gnl.ldma);
3624 base_vha->gnl.l = NULL;
3625 scsi_host_put(base_vha->host);
3627 pci_set_drvdata(pdev, NULL);
3630 qla2x00_wait_for_hba_ready(base_vha);
3633 * if UNLOADING flag is already set, then continue unload,
3634 * where it was set first.
3636 if (test_and_set_bit(UNLOADING, &base_vha->dpc_flags))
3639 if (IS_QLA25XX(ha) || IS_QLA2031(ha) || IS_QLA27XX(ha)) {
3640 if (ha->flags.fw_started)
3641 qla2x00_abort_isp_cleanup(base_vha);
3642 } else if (!IS_QLAFX00(ha)) {
3643 if (IS_QLA8031(ha)) {
3644 ql_dbg(ql_dbg_p3p, base_vha, 0xb07e,
3645 "Clearing fcoe driver presence.\n");
3646 if (qla83xx_clear_drv_presence(base_vha) != QLA_SUCCESS)
3647 ql_dbg(ql_dbg_p3p, base_vha, 0xb079,
3648 "Error while clearing DRV-Presence.\n");
3651 qla2x00_try_to_stop_firmware(base_vha);
3654 qla2x00_wait_for_sess_deletion(base_vha);
3656 qla_nvme_delete(base_vha);
3658 dma_free_coherent(&ha->pdev->dev,
3659 base_vha->gnl.size, base_vha->gnl.l, base_vha->gnl.ldma);
3661 base_vha->gnl.l = NULL;
3663 vfree(base_vha->scan.l);
3666 qlafx00_driver_shutdown(base_vha, 20);
3668 qla2x00_delete_all_vps(ha, base_vha);
3670 qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
3672 qla2x00_dfs_remove(base_vha);
3674 qla84xx_put_chip(base_vha);
3677 if (base_vha->timer_active)
3678 qla2x00_stop_timer(base_vha);
3680 base_vha->flags.online = 0;
3682 /* free DMA memory */
3683 if (ha->exlogin_buf)
3684 qla2x00_free_exlogin_buffer(ha);
3686 /* free DMA memory */
3687 if (ha->exchoffld_buf)
3688 qla2x00_free_exchoffld_buffer(ha);
3690 qla2x00_destroy_deferred_work(ha);
3692 qlt_remove_target(ha, base_vha);
3694 qla2x00_free_sysfs_attr(base_vha, true);
3696 fc_remove_host(base_vha->host);
3697 qlt_remove_target_resources(ha);
3699 scsi_remove_host(base_vha->host);
3701 qla2x00_free_device(base_vha);
3703 qla2x00_clear_drv_active(ha);
3705 scsi_host_put(base_vha->host);
3707 qla2x00_unmap_iobases(ha);
3709 pci_release_selected_regions(ha->pdev, ha->bars);
3712 pci_disable_pcie_error_reporting(pdev);
3714 pci_disable_device(pdev);
3718 qla2x00_free_device(scsi_qla_host_t *vha)
3720 struct qla_hw_data *ha = vha->hw;
3722 qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
3725 if (vha->timer_active)
3726 qla2x00_stop_timer(vha);
3728 qla25xx_delete_queues(vha);
3729 vha->flags.online = 0;
3731 /* turn-off interrupts on the card */
3732 if (ha->interrupts_on) {
3733 vha->flags.init_done = 0;
3734 ha->isp_ops->disable_intrs(ha);
3737 qla2x00_free_fcports(vha);
3739 qla2x00_free_irqs(vha);
3741 /* Flush the work queue and remove it */
3743 flush_workqueue(ha->wq);
3744 destroy_workqueue(ha->wq);
3749 qla2x00_mem_free(ha);
3751 qla82xx_md_free(vha);
3753 qla2x00_free_queues(ha);
3756 void qla2x00_free_fcports(struct scsi_qla_host *vha)
3758 fc_port_t *fcport, *tfcport;
3760 list_for_each_entry_safe(fcport, tfcport, &vha->vp_fcports, list) {
3761 list_del(&fcport->list);
3762 qla2x00_clear_loop_id(fcport);
3768 qla2x00_schedule_rport_del(struct scsi_qla_host *vha, fc_port_t *fcport,
3771 struct fc_rport *rport;
3772 scsi_qla_host_t *base_vha;
3773 unsigned long flags;
3778 rport = fcport->rport;
3780 base_vha = pci_get_drvdata(vha->hw->pdev);
3781 spin_lock_irqsave(vha->host->host_lock, flags);
3782 fcport->drport = rport;
3783 spin_unlock_irqrestore(vha->host->host_lock, flags);
3784 qlt_do_generation_tick(vha, &base_vha->total_fcport_update_gen);
3785 set_bit(FCPORT_UPDATE_NEEDED, &base_vha->dpc_flags);
3786 qla2xxx_wake_dpc(base_vha);
3790 ql_dbg(ql_dbg_disc, fcport->vha, 0x2109,
3791 "%s %8phN. rport %p roles %x\n",
3792 __func__, fcport->port_name, rport,
3794 fc_remote_port_delete(rport);
3796 qlt_do_generation_tick(vha, &now);
3801 * qla2x00_mark_device_lost Updates fcport state when device goes offline.
3803 * Input: ha = adapter block pointer. fcport = port structure pointer.
3809 void qla2x00_mark_device_lost(scsi_qla_host_t *vha, fc_port_t *fcport,
3810 int do_login, int defer)
3812 if (IS_QLAFX00(vha->hw)) {
3813 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3814 qla2x00_schedule_rport_del(vha, fcport, defer);
3818 if (atomic_read(&fcport->state) == FCS_ONLINE &&
3819 vha->vp_idx == fcport->vha->vp_idx) {
3820 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3821 qla2x00_schedule_rport_del(vha, fcport, defer);
3824 * We may need to retry the login, so don't change the state of the
3825 * port but do the retries.
3827 if (atomic_read(&fcport->state) != FCS_DEVICE_DEAD)
3828 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3833 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
3837 * qla2x00_mark_all_devices_lost
3838 * Updates fcport state when device goes offline.
3841 * ha = adapter block pointer.
3842 * fcport = port structure pointer.
3850 qla2x00_mark_all_devices_lost(scsi_qla_host_t *vha, int defer)
3854 ql_dbg(ql_dbg_disc, vha, 0x20f1,
3855 "Mark all dev lost\n");
3857 list_for_each_entry(fcport, &vha->vp_fcports, list) {
3858 fcport->scan_state = 0;
3859 qlt_schedule_sess_for_deletion(fcport);
3861 if (vha->vp_idx != 0 && vha->vp_idx != fcport->vha->vp_idx)
3865 * No point in marking the device as lost, if the device is
3868 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD)
3870 if (atomic_read(&fcport->state) == FCS_ONLINE) {
3871 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3873 qla2x00_schedule_rport_del(vha, fcport, defer);
3874 else if (vha->vp_idx == fcport->vha->vp_idx)
3875 qla2x00_schedule_rport_del(vha, fcport, defer);
3882 * Allocates adapter memory.
3889 qla2x00_mem_alloc(struct qla_hw_data *ha, uint16_t req_len, uint16_t rsp_len,
3890 struct req_que **req, struct rsp_que **rsp)
3894 ha->init_cb = dma_alloc_coherent(&ha->pdev->dev, ha->init_cb_size,
3895 &ha->init_cb_dma, GFP_KERNEL);
3899 if (qlt_mem_alloc(ha) < 0)
3900 goto fail_free_init_cb;
3902 ha->gid_list = dma_alloc_coherent(&ha->pdev->dev,
3903 qla2x00_gid_list_size(ha), &ha->gid_list_dma, GFP_KERNEL);
3905 goto fail_free_tgt_mem;
3907 ha->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep);
3908 if (!ha->srb_mempool)
3909 goto fail_free_gid_list;
3911 if (IS_P3P_TYPE(ha)) {
3912 /* Allocate cache for CT6 Ctx. */
3914 ctx_cachep = kmem_cache_create("qla2xxx_ctx",
3915 sizeof(struct ct6_dsd), 0,
3916 SLAB_HWCACHE_ALIGN, NULL);
3918 goto fail_free_srb_mempool;
3920 ha->ctx_mempool = mempool_create_slab_pool(SRB_MIN_REQ,
3922 if (!ha->ctx_mempool)
3923 goto fail_free_srb_mempool;
3924 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0021,
3925 "ctx_cachep=%p ctx_mempool=%p.\n",
3926 ctx_cachep, ha->ctx_mempool);
3929 /* Get memory for cached NVRAM */
3930 ha->nvram = kzalloc(MAX_NVRAM_SIZE, GFP_KERNEL);
3932 goto fail_free_ctx_mempool;
3934 snprintf(name, sizeof(name), "%s_%d", QLA2XXX_DRIVER_NAME,
3936 ha->s_dma_pool = dma_pool_create(name, &ha->pdev->dev,
3937 DMA_POOL_SIZE, 8, 0);
3938 if (!ha->s_dma_pool)
3939 goto fail_free_nvram;
3941 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0022,
3942 "init_cb=%p gid_list=%p, srb_mempool=%p s_dma_pool=%p.\n",
3943 ha->init_cb, ha->gid_list, ha->srb_mempool, ha->s_dma_pool);
3945 if (IS_P3P_TYPE(ha) || ql2xenabledif) {
3946 ha->dl_dma_pool = dma_pool_create(name, &ha->pdev->dev,
3947 DSD_LIST_DMA_POOL_SIZE, 8, 0);
3948 if (!ha->dl_dma_pool) {
3949 ql_log_pci(ql_log_fatal, ha->pdev, 0x0023,
3950 "Failed to allocate memory for dl_dma_pool.\n");
3951 goto fail_s_dma_pool;
3954 ha->fcp_cmnd_dma_pool = dma_pool_create(name, &ha->pdev->dev,
3955 FCP_CMND_DMA_POOL_SIZE, 8, 0);
3956 if (!ha->fcp_cmnd_dma_pool) {
3957 ql_log_pci(ql_log_fatal, ha->pdev, 0x0024,
3958 "Failed to allocate memory for fcp_cmnd_dma_pool.\n");
3959 goto fail_dl_dma_pool;
3961 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0025,
3962 "dl_dma_pool=%p fcp_cmnd_dma_pool=%p.\n",
3963 ha->dl_dma_pool, ha->fcp_cmnd_dma_pool);
3966 /* Allocate memory for SNS commands */
3967 if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
3968 /* Get consistent memory allocated for SNS commands */
3969 ha->sns_cmd = dma_alloc_coherent(&ha->pdev->dev,
3970 sizeof(struct sns_cmd_pkt), &ha->sns_cmd_dma, GFP_KERNEL);
3973 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0026,
3974 "sns_cmd: %p.\n", ha->sns_cmd);
3976 /* Get consistent memory allocated for MS IOCB */
3977 ha->ms_iocb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
3981 /* Get consistent memory allocated for CT SNS commands */
3982 ha->ct_sns = dma_alloc_coherent(&ha->pdev->dev,
3983 sizeof(struct ct_sns_pkt), &ha->ct_sns_dma, GFP_KERNEL);
3985 goto fail_free_ms_iocb;
3986 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0027,
3987 "ms_iocb=%p ct_sns=%p.\n",
3988 ha->ms_iocb, ha->ct_sns);
3991 /* Allocate memory for request ring */
3992 *req = kzalloc(sizeof(struct req_que), GFP_KERNEL);
3994 ql_log_pci(ql_log_fatal, ha->pdev, 0x0028,
3995 "Failed to allocate memory for req.\n");
3998 (*req)->length = req_len;
3999 (*req)->ring = dma_alloc_coherent(&ha->pdev->dev,
4000 ((*req)->length + 1) * sizeof(request_t),
4001 &(*req)->dma, GFP_KERNEL);
4002 if (!(*req)->ring) {
4003 ql_log_pci(ql_log_fatal, ha->pdev, 0x0029,
4004 "Failed to allocate memory for req_ring.\n");
4007 /* Allocate memory for response ring */
4008 *rsp = kzalloc(sizeof(struct rsp_que), GFP_KERNEL);
4010 ql_log_pci(ql_log_fatal, ha->pdev, 0x002a,
4011 "Failed to allocate memory for rsp.\n");
4015 (*rsp)->length = rsp_len;
4016 (*rsp)->ring = dma_alloc_coherent(&ha->pdev->dev,
4017 ((*rsp)->length + 1) * sizeof(response_t),
4018 &(*rsp)->dma, GFP_KERNEL);
4019 if (!(*rsp)->ring) {
4020 ql_log_pci(ql_log_fatal, ha->pdev, 0x002b,
4021 "Failed to allocate memory for rsp_ring.\n");
4026 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002c,
4027 "req=%p req->length=%d req->ring=%p rsp=%p "
4028 "rsp->length=%d rsp->ring=%p.\n",
4029 *req, (*req)->length, (*req)->ring, *rsp, (*rsp)->length,
4031 /* Allocate memory for NVRAM data for vports */
4032 if (ha->nvram_npiv_size) {
4033 ha->npiv_info = kcalloc(ha->nvram_npiv_size,
4034 sizeof(struct qla_npiv_entry),
4036 if (!ha->npiv_info) {
4037 ql_log_pci(ql_log_fatal, ha->pdev, 0x002d,
4038 "Failed to allocate memory for npiv_info.\n");
4039 goto fail_npiv_info;
4042 ha->npiv_info = NULL;
4044 /* Get consistent memory allocated for EX-INIT-CB. */
4045 if (IS_CNA_CAPABLE(ha) || IS_QLA2031(ha) || IS_QLA27XX(ha)) {
4046 ha->ex_init_cb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
4047 &ha->ex_init_cb_dma);
4048 if (!ha->ex_init_cb)
4049 goto fail_ex_init_cb;
4050 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002e,
4051 "ex_init_cb=%p.\n", ha->ex_init_cb);
4054 INIT_LIST_HEAD(&ha->gbl_dsd_list);
4056 /* Get consistent memory allocated for Async Port-Database. */
4057 if (!IS_FWI2_CAPABLE(ha)) {
4058 ha->async_pd = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
4062 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002f,
4063 "async_pd=%p.\n", ha->async_pd);
4066 INIT_LIST_HEAD(&ha->vp_list);
4068 /* Allocate memory for our loop_id bitmap */
4069 ha->loop_id_map = kcalloc(BITS_TO_LONGS(LOOPID_MAP_SIZE),
4072 if (!ha->loop_id_map)
4073 goto fail_loop_id_map;
4075 qla2x00_set_reserved_loop_ids(ha);
4076 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0123,
4077 "loop_id_map=%p.\n", ha->loop_id_map);
4080 ha->sfp_data = dma_alloc_coherent(&ha->pdev->dev,
4081 SFP_DEV_SIZE, &ha->sfp_data_dma, GFP_KERNEL);
4082 if (!ha->sfp_data) {
4083 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011b,
4084 "Unable to allocate memory for SFP read-data.\n");
4091 kfree(ha->loop_id_map);
4093 dma_pool_free(ha->s_dma_pool, ha->async_pd, ha->async_pd_dma);
4095 dma_pool_free(ha->s_dma_pool, ha->ex_init_cb, ha->ex_init_cb_dma);
4097 kfree(ha->npiv_info);
4099 dma_free_coherent(&ha->pdev->dev, ((*rsp)->length + 1) *
4100 sizeof(response_t), (*rsp)->ring, (*rsp)->dma);
4101 (*rsp)->ring = NULL;
4107 dma_free_coherent(&ha->pdev->dev, ((*req)->length + 1) *
4108 sizeof(request_t), (*req)->ring, (*req)->dma);
4109 (*req)->ring = NULL;
4115 dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
4116 ha->ct_sns, ha->ct_sns_dma);
4120 dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
4122 ha->ms_iocb_dma = 0;
4125 dma_free_coherent(&ha->pdev->dev, sizeof(struct sns_cmd_pkt),
4126 ha->sns_cmd, ha->sns_cmd_dma);
4128 if (IS_QLA82XX(ha) || ql2xenabledif) {
4129 dma_pool_destroy(ha->fcp_cmnd_dma_pool);
4130 ha->fcp_cmnd_dma_pool = NULL;
4133 if (IS_QLA82XX(ha) || ql2xenabledif) {
4134 dma_pool_destroy(ha->dl_dma_pool);
4135 ha->dl_dma_pool = NULL;
4138 dma_pool_destroy(ha->s_dma_pool);
4139 ha->s_dma_pool = NULL;
4143 fail_free_ctx_mempool:
4144 if (ha->ctx_mempool)
4145 mempool_destroy(ha->ctx_mempool);
4146 ha->ctx_mempool = NULL;
4147 fail_free_srb_mempool:
4148 if (ha->srb_mempool)
4149 mempool_destroy(ha->srb_mempool);
4150 ha->srb_mempool = NULL;
4152 dma_free_coherent(&ha->pdev->dev, qla2x00_gid_list_size(ha),
4155 ha->gid_list = NULL;
4156 ha->gid_list_dma = 0;
4160 dma_free_coherent(&ha->pdev->dev, ha->init_cb_size, ha->init_cb,
4163 ha->init_cb_dma = 0;
4165 ql_log(ql_log_fatal, NULL, 0x0030,
4166 "Memory allocation failure.\n");
4171 qla2x00_set_exlogins_buffer(scsi_qla_host_t *vha)
4174 uint16_t size, max_cnt, temp;
4175 struct qla_hw_data *ha = vha->hw;
4177 /* Return if we don't need to alloacate any extended logins */
4181 if (!IS_EXLOGIN_OFFLD_CAPABLE(ha))
4184 ql_log(ql_log_info, vha, 0xd021, "EXLOGIN count: %d.\n", ql2xexlogins);
4186 rval = qla_get_exlogin_status(vha, &size, &max_cnt);
4187 if (rval != QLA_SUCCESS) {
4188 ql_log_pci(ql_log_fatal, ha->pdev, 0xd029,
4189 "Failed to get exlogin status.\n");
4193 temp = (ql2xexlogins > max_cnt) ? max_cnt : ql2xexlogins;
4196 if (temp != ha->exlogin_size) {
4197 qla2x00_free_exlogin_buffer(ha);
4198 ha->exlogin_size = temp;
4200 ql_log(ql_log_info, vha, 0xd024,
4201 "EXLOGIN: max_logins=%d, portdb=0x%x, total=%d.\n",
4202 max_cnt, size, temp);
4204 ql_log(ql_log_info, vha, 0xd025,
4205 "EXLOGIN: requested size=0x%x\n", ha->exlogin_size);
4207 /* Get consistent memory for extended logins */
4208 ha->exlogin_buf = dma_alloc_coherent(&ha->pdev->dev,
4209 ha->exlogin_size, &ha->exlogin_buf_dma, GFP_KERNEL);
4210 if (!ha->exlogin_buf) {
4211 ql_log_pci(ql_log_fatal, ha->pdev, 0xd02a,
4212 "Failed to allocate memory for exlogin_buf_dma.\n");
4217 /* Now configure the dma buffer */
4218 rval = qla_set_exlogin_mem_cfg(vha, ha->exlogin_buf_dma);
4220 ql_log(ql_log_fatal, vha, 0xd033,
4221 "Setup extended login buffer ****FAILED****.\n");
4222 qla2x00_free_exlogin_buffer(ha);
4229 * qla2x00_free_exlogin_buffer
4232 * ha = adapter block pointer
4235 qla2x00_free_exlogin_buffer(struct qla_hw_data *ha)
4237 if (ha->exlogin_buf) {
4238 dma_free_coherent(&ha->pdev->dev, ha->exlogin_size,
4239 ha->exlogin_buf, ha->exlogin_buf_dma);
4240 ha->exlogin_buf = NULL;
4241 ha->exlogin_size = 0;
4246 qla2x00_number_of_exch(scsi_qla_host_t *vha, u32 *ret_cnt, u16 max_cnt)
4249 *ret_cnt = FW_DEF_EXCHANGES_CNT;
4251 if (max_cnt > vha->hw->max_exchg)
4252 max_cnt = vha->hw->max_exchg;
4254 if (qla_ini_mode_enabled(vha)) {
4255 if (ql2xiniexchg > max_cnt)
4256 ql2xiniexchg = max_cnt;
4258 if (ql2xiniexchg > FW_DEF_EXCHANGES_CNT)
4259 *ret_cnt = ql2xiniexchg;
4260 } else if (qla_tgt_mode_enabled(vha)) {
4261 if (ql2xexchoffld > max_cnt)
4262 ql2xexchoffld = max_cnt;
4264 if (ql2xexchoffld > FW_DEF_EXCHANGES_CNT)
4265 *ret_cnt = ql2xexchoffld;
4266 } else if (qla_dual_mode_enabled(vha)) {
4267 temp = ql2xiniexchg + ql2xexchoffld;
4268 if (temp > max_cnt) {
4269 ql2xiniexchg -= (temp - max_cnt)/2;
4270 ql2xexchoffld -= (((temp - max_cnt)/2) + 1);
4274 if (temp > FW_DEF_EXCHANGES_CNT)
4280 qla2x00_set_exchoffld_buffer(scsi_qla_host_t *vha)
4284 u32 actual_cnt, totsz;
4285 struct qla_hw_data *ha = vha->hw;
4287 if (!ha->flags.exchoffld_enabled)
4290 if (!IS_EXCHG_OFFLD_CAPABLE(ha))
4294 rval = qla_get_exchoffld_status(vha, &size, &max_cnt);
4295 if (rval != QLA_SUCCESS) {
4296 ql_log_pci(ql_log_fatal, ha->pdev, 0xd012,
4297 "Failed to get exlogin status.\n");
4301 qla2x00_number_of_exch(vha, &actual_cnt, max_cnt);
4302 ql_log(ql_log_info, vha, 0xd014,
4303 "Actual exchange offload count: %d.\n", actual_cnt);
4305 totsz = actual_cnt * size;
4307 if (totsz != ha->exchoffld_size) {
4308 qla2x00_free_exchoffld_buffer(ha);
4309 ha->exchoffld_size = totsz;
4311 ql_log(ql_log_info, vha, 0xd016,
4312 "Exchange offload: max_count=%d, actual count=%d entry sz=0x%x, total sz=0x%x\n",
4313 max_cnt, actual_cnt, size, totsz);
4315 ql_log(ql_log_info, vha, 0xd017,
4316 "Exchange Buffers requested size = 0x%x\n",
4317 ha->exchoffld_size);
4319 /* Get consistent memory for extended logins */
4320 ha->exchoffld_buf = dma_alloc_coherent(&ha->pdev->dev,
4321 ha->exchoffld_size, &ha->exchoffld_buf_dma, GFP_KERNEL);
4322 if (!ha->exchoffld_buf) {
4323 ql_log_pci(ql_log_fatal, ha->pdev, 0xd013,
4324 "Failed to allocate memory for Exchange Offload.\n");
4327 (FW_DEF_EXCHANGES_CNT + REDUCE_EXCHANGES_CNT)) {
4328 ha->max_exchg -= REDUCE_EXCHANGES_CNT;
4329 } else if (ha->max_exchg >
4330 (FW_DEF_EXCHANGES_CNT + 512)) {
4331 ha->max_exchg -= 512;
4333 ha->flags.exchoffld_enabled = 0;
4334 ql_log_pci(ql_log_fatal, ha->pdev, 0xd013,
4335 "Disabling Exchange offload due to lack of memory\n");
4337 ha->exchoffld_size = 0;
4343 /* Now configure the dma buffer */
4344 rval = qla_set_exchoffld_mem_cfg(vha);
4346 ql_log(ql_log_fatal, vha, 0xd02e,
4347 "Setup exchange offload buffer ****FAILED****.\n");
4348 qla2x00_free_exchoffld_buffer(ha);
4350 /* re-adjust number of target exchange */
4351 struct init_cb_81xx *icb = (struct init_cb_81xx *)ha->init_cb;
4353 if (qla_ini_mode_enabled(vha))
4354 icb->exchange_count = 0;
4356 icb->exchange_count = cpu_to_le16(ql2xexchoffld);
4363 * qla2x00_free_exchoffld_buffer
4366 * ha = adapter block pointer
4369 qla2x00_free_exchoffld_buffer(struct qla_hw_data *ha)
4371 if (ha->exchoffld_buf) {
4372 dma_free_coherent(&ha->pdev->dev, ha->exchoffld_size,
4373 ha->exchoffld_buf, ha->exchoffld_buf_dma);
4374 ha->exchoffld_buf = NULL;
4375 ha->exchoffld_size = 0;
4380 * qla2x00_free_fw_dump
4381 * Frees fw dump stuff.
4384 * ha = adapter block pointer
4387 qla2x00_free_fw_dump(struct qla_hw_data *ha)
4390 dma_free_coherent(&ha->pdev->dev,
4391 FCE_SIZE, ha->fce, ha->fce_dma);
4394 dma_free_coherent(&ha->pdev->dev,
4395 EFT_SIZE, ha->eft, ha->eft_dma);
4399 if (ha->fw_dump_template)
4400 vfree(ha->fw_dump_template);
4407 ha->fw_dump_cap_flags = 0;
4408 ha->fw_dump_reading = 0;
4410 ha->fw_dump_len = 0;
4411 ha->fw_dump_template = NULL;
4412 ha->fw_dump_template_len = 0;
4417 * Frees all adapter allocated memory.
4420 * ha = adapter block pointer.
4423 qla2x00_mem_free(struct qla_hw_data *ha)
4425 qla2x00_free_fw_dump(ha);
4428 dma_free_coherent(&ha->pdev->dev, MCTP_DUMP_SIZE, ha->mctp_dump,
4431 if (ha->srb_mempool)
4432 mempool_destroy(ha->srb_mempool);
4435 dma_free_coherent(&ha->pdev->dev, DCBX_TLV_DATA_SIZE,
4436 ha->dcbx_tlv, ha->dcbx_tlv_dma);
4439 dma_free_coherent(&ha->pdev->dev, XGMAC_DATA_SIZE,
4440 ha->xgmac_data, ha->xgmac_data_dma);
4443 dma_free_coherent(&ha->pdev->dev, sizeof(struct sns_cmd_pkt),
4444 ha->sns_cmd, ha->sns_cmd_dma);
4447 dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
4448 ha->ct_sns, ha->ct_sns_dma);
4451 dma_free_coherent(&ha->pdev->dev, SFP_DEV_SIZE, ha->sfp_data,
4455 dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
4458 dma_pool_free(ha->s_dma_pool,
4459 ha->ex_init_cb, ha->ex_init_cb_dma);
4462 dma_pool_free(ha->s_dma_pool, ha->async_pd, ha->async_pd_dma);
4465 dma_pool_destroy(ha->s_dma_pool);
4468 dma_free_coherent(&ha->pdev->dev, qla2x00_gid_list_size(ha),
4469 ha->gid_list, ha->gid_list_dma);
4471 if (IS_QLA82XX(ha)) {
4472 if (!list_empty(&ha->gbl_dsd_list)) {
4473 struct dsd_dma *dsd_ptr, *tdsd_ptr;
4475 /* clean up allocated prev pool */
4476 list_for_each_entry_safe(dsd_ptr,
4477 tdsd_ptr, &ha->gbl_dsd_list, list) {
4478 dma_pool_free(ha->dl_dma_pool,
4479 dsd_ptr->dsd_addr, dsd_ptr->dsd_list_dma);
4480 list_del(&dsd_ptr->list);
4486 if (ha->dl_dma_pool)
4487 dma_pool_destroy(ha->dl_dma_pool);
4489 if (ha->fcp_cmnd_dma_pool)
4490 dma_pool_destroy(ha->fcp_cmnd_dma_pool);
4492 if (ha->ctx_mempool)
4493 mempool_destroy(ha->ctx_mempool);
4498 dma_free_coherent(&ha->pdev->dev, ha->init_cb_size,
4499 ha->init_cb, ha->init_cb_dma);
4501 vfree(ha->optrom_buffer);
4503 kfree(ha->npiv_info);
4505 kfree(ha->loop_id_map);
4507 ha->srb_mempool = NULL;
4508 ha->ctx_mempool = NULL;
4510 ha->sns_cmd_dma = 0;
4514 ha->ms_iocb_dma = 0;
4516 ha->init_cb_dma = 0;
4517 ha->ex_init_cb = NULL;
4518 ha->ex_init_cb_dma = 0;
4519 ha->async_pd = NULL;
4520 ha->async_pd_dma = 0;
4521 ha->loop_id_map = NULL;
4522 ha->npiv_info = NULL;
4523 ha->optrom_buffer = NULL;
4526 ha->mctp_dump = NULL;
4527 ha->dcbx_tlv = NULL;
4528 ha->xgmac_data = NULL;
4529 ha->sfp_data = NULL;
4531 ha->s_dma_pool = NULL;
4532 ha->dl_dma_pool = NULL;
4533 ha->fcp_cmnd_dma_pool = NULL;
4535 ha->gid_list = NULL;
4536 ha->gid_list_dma = 0;
4538 ha->tgt.atio_ring = NULL;
4539 ha->tgt.atio_dma = 0;
4540 ha->tgt.tgt_vp_map = NULL;
4543 struct scsi_qla_host *qla2x00_create_host(struct scsi_host_template *sht,
4544 struct qla_hw_data *ha)
4546 struct Scsi_Host *host;
4547 struct scsi_qla_host *vha = NULL;
4549 host = scsi_host_alloc(sht, sizeof(scsi_qla_host_t));
4551 ql_log_pci(ql_log_fatal, ha->pdev, 0x0107,
4552 "Failed to allocate host from the scsi layer, aborting.\n");
4556 /* Clear our data area */
4557 vha = shost_priv(host);
4558 memset(vha, 0, sizeof(scsi_qla_host_t));
4561 vha->host_no = host->host_no;
4564 INIT_LIST_HEAD(&vha->vp_fcports);
4565 INIT_LIST_HEAD(&vha->work_list);
4566 INIT_LIST_HEAD(&vha->list);
4567 INIT_LIST_HEAD(&vha->qla_cmd_list);
4568 INIT_LIST_HEAD(&vha->qla_sess_op_cmd_list);
4569 INIT_LIST_HEAD(&vha->logo_list);
4570 INIT_LIST_HEAD(&vha->plogi_ack_list);
4571 INIT_LIST_HEAD(&vha->qp_list);
4572 INIT_LIST_HEAD(&vha->gnl.fcports);
4573 INIT_LIST_HEAD(&vha->nvme_rport_list);
4574 INIT_LIST_HEAD(&vha->gpnid_list);
4575 INIT_WORK(&vha->iocb_work, qla2x00_iocb_work_fn);
4577 spin_lock_init(&vha->work_lock);
4578 spin_lock_init(&vha->cmd_list_lock);
4579 init_waitqueue_head(&vha->fcport_waitQ);
4580 init_waitqueue_head(&vha->vref_waitq);
4582 vha->gnl.size = sizeof(struct get_name_list_extended) *
4583 (ha->max_loop_id + 1);
4584 vha->gnl.l = dma_alloc_coherent(&ha->pdev->dev,
4585 vha->gnl.size, &vha->gnl.ldma, GFP_KERNEL);
4587 ql_log(ql_log_fatal, vha, 0xd04a,
4588 "Alloc failed for name list.\n");
4589 scsi_remove_host(vha->host);
4593 /* todo: what about ext login? */
4594 vha->scan.size = ha->max_fibre_devices * sizeof(struct fab_scan_rp);
4595 vha->scan.l = vmalloc(vha->scan.size);
4597 ql_log(ql_log_fatal, vha, 0xd04a,
4598 "Alloc failed for scan database.\n");
4599 dma_free_coherent(&ha->pdev->dev, vha->gnl.size,
4600 vha->gnl.l, vha->gnl.ldma);
4602 scsi_remove_host(vha->host);
4605 INIT_DELAYED_WORK(&vha->scan.scan_work, qla_scan_work_fn);
4607 sprintf(vha->host_str, "%s_%ld", QLA2XXX_DRIVER_NAME, vha->host_no);
4608 ql_dbg(ql_dbg_init, vha, 0x0041,
4609 "Allocated the host=%p hw=%p vha=%p dev_name=%s",
4610 vha->host, vha->hw, vha,
4611 dev_name(&(ha->pdev->dev)));
4616 struct qla_work_evt *
4617 qla2x00_alloc_work(struct scsi_qla_host *vha, enum qla_work_type type)
4619 struct qla_work_evt *e;
4622 if (test_bit(UNLOADING, &vha->dpc_flags))
4625 QLA_VHA_MARK_BUSY(vha, bail);
4629 e = kzalloc(sizeof(struct qla_work_evt), GFP_ATOMIC);
4631 QLA_VHA_MARK_NOT_BUSY(vha);
4635 INIT_LIST_HEAD(&e->list);
4637 e->flags = QLA_EVT_FLAG_FREE;
4642 qla2x00_post_work(struct scsi_qla_host *vha, struct qla_work_evt *e)
4644 unsigned long flags;
4647 spin_lock_irqsave(&vha->work_lock, flags);
4648 list_add_tail(&e->list, &vha->work_list);
4650 if (!test_and_set_bit(IOCB_WORK_ACTIVE, &vha->dpc_flags))
4653 spin_unlock_irqrestore(&vha->work_lock, flags);
4656 queue_work(vha->hw->wq, &vha->iocb_work);
4662 qla2x00_post_aen_work(struct scsi_qla_host *vha, enum fc_host_event_code code,
4665 struct qla_work_evt *e;
4667 e = qla2x00_alloc_work(vha, QLA_EVT_AEN);
4669 return QLA_FUNCTION_FAILED;
4671 e->u.aen.code = code;
4672 e->u.aen.data = data;
4673 return qla2x00_post_work(vha, e);
4677 qla2x00_post_idc_ack_work(struct scsi_qla_host *vha, uint16_t *mb)
4679 struct qla_work_evt *e;
4681 e = qla2x00_alloc_work(vha, QLA_EVT_IDC_ACK);
4683 return QLA_FUNCTION_FAILED;
4685 memcpy(e->u.idc_ack.mb, mb, QLA_IDC_ACK_REGS * sizeof(uint16_t));
4686 return qla2x00_post_work(vha, e);
4689 #define qla2x00_post_async_work(name, type) \
4690 int qla2x00_post_async_##name##_work( \
4691 struct scsi_qla_host *vha, \
4692 fc_port_t *fcport, uint16_t *data) \
4694 struct qla_work_evt *e; \
4696 e = qla2x00_alloc_work(vha, type); \
4698 return QLA_FUNCTION_FAILED; \
4700 e->u.logio.fcport = fcport; \
4702 e->u.logio.data[0] = data[0]; \
4703 e->u.logio.data[1] = data[1]; \
4705 fcport->flags |= FCF_ASYNC_ACTIVE; \
4706 return qla2x00_post_work(vha, e); \
4709 qla2x00_post_async_work(login, QLA_EVT_ASYNC_LOGIN);
4710 qla2x00_post_async_work(logout, QLA_EVT_ASYNC_LOGOUT);
4711 qla2x00_post_async_work(logout_done, QLA_EVT_ASYNC_LOGOUT_DONE);
4712 qla2x00_post_async_work(adisc, QLA_EVT_ASYNC_ADISC);
4713 qla2x00_post_async_work(adisc_done, QLA_EVT_ASYNC_ADISC_DONE);
4714 qla2x00_post_async_work(prlo, QLA_EVT_ASYNC_PRLO);
4715 qla2x00_post_async_work(prlo_done, QLA_EVT_ASYNC_PRLO_DONE);
4718 qla2x00_post_uevent_work(struct scsi_qla_host *vha, u32 code)
4720 struct qla_work_evt *e;
4722 e = qla2x00_alloc_work(vha, QLA_EVT_UEVENT);
4724 return QLA_FUNCTION_FAILED;
4726 e->u.uevent.code = code;
4727 return qla2x00_post_work(vha, e);
4731 qla2x00_uevent_emit(struct scsi_qla_host *vha, u32 code)
4733 char event_string[40];
4734 char *envp[] = { event_string, NULL };
4737 case QLA_UEVENT_CODE_FW_DUMP:
4738 snprintf(event_string, sizeof(event_string), "FW_DUMP=%ld",
4745 kobject_uevent_env(&vha->hw->pdev->dev.kobj, KOBJ_CHANGE, envp);
4749 qlafx00_post_aenfx_work(struct scsi_qla_host *vha, uint32_t evtcode,
4750 uint32_t *data, int cnt)
4752 struct qla_work_evt *e;
4754 e = qla2x00_alloc_work(vha, QLA_EVT_AENFX);
4756 return QLA_FUNCTION_FAILED;
4758 e->u.aenfx.evtcode = evtcode;
4759 e->u.aenfx.count = cnt;
4760 memcpy(e->u.aenfx.mbx, data, sizeof(*data) * cnt);
4761 return qla2x00_post_work(vha, e);
4764 void qla24xx_sched_upd_fcport(fc_port_t *fcport)
4766 unsigned long flags;
4768 if (IS_SW_RESV_ADDR(fcport->d_id))
4771 spin_lock_irqsave(&fcport->vha->work_lock, flags);
4772 if (fcport->disc_state == DSC_UPD_FCPORT) {
4773 spin_unlock_irqrestore(&fcport->vha->work_lock, flags);
4776 fcport->jiffies_at_registration = jiffies;
4777 fcport->sec_since_registration = 0;
4778 fcport->next_disc_state = DSC_DELETED;
4779 fcport->disc_state = DSC_UPD_FCPORT;
4780 spin_unlock_irqrestore(&fcport->vha->work_lock, flags);
4782 queue_work(system_unbound_wq, &fcport->reg_work);
4786 void qla24xx_create_new_sess(struct scsi_qla_host *vha, struct qla_work_evt *e)
4788 unsigned long flags;
4789 fc_port_t *fcport = NULL, *tfcp;
4790 struct qlt_plogi_ack_t *pla =
4791 (struct qlt_plogi_ack_t *)e->u.new_sess.pla;
4792 uint8_t free_fcport = 0;
4794 ql_dbg(ql_dbg_disc, vha, 0xffff,
4795 "%s %d %8phC enter\n",
4796 __func__, __LINE__, e->u.new_sess.port_name);
4798 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
4799 fcport = qla2x00_find_fcport_by_wwpn(vha, e->u.new_sess.port_name, 1);
4801 fcport->d_id = e->u.new_sess.id;
4803 fcport->fw_login_state = DSC_LS_PLOGI_PEND;
4804 memcpy(fcport->node_name,
4805 pla->iocb.u.isp24.u.plogi.node_name,
4807 qlt_plogi_ack_link(vha, pla, fcport, QLT_PLOGI_LINK_SAME_WWN);
4808 /* we took an extra ref_count to prevent PLOGI ACK when
4809 * fcport/sess has not been created.
4814 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
4815 fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
4817 fcport->d_id = e->u.new_sess.id;
4818 fcport->flags |= FCF_FABRIC_DEVICE;
4819 fcport->fw_login_state = DSC_LS_PLOGI_PEND;
4820 if (e->u.new_sess.fc4_type == FS_FC4TYPE_FCP)
4821 fcport->fc4_type = FC4_TYPE_FCP_SCSI;
4823 if (e->u.new_sess.fc4_type == FS_FC4TYPE_NVME) {
4824 fcport->fc4_type = FC4_TYPE_OTHER;
4825 fcport->fc4f_nvme = FC4_TYPE_NVME;
4828 memcpy(fcport->port_name, e->u.new_sess.port_name,
4831 ql_dbg(ql_dbg_disc, vha, 0xffff,
4832 "%s %8phC mem alloc fail.\n",
4833 __func__, e->u.new_sess.port_name);
4836 kmem_cache_free(qla_tgt_plogi_cachep, pla);
4840 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
4841 /* search again to make sure no one else got ahead */
4842 tfcp = qla2x00_find_fcport_by_wwpn(vha,
4843 e->u.new_sess.port_name, 1);
4845 /* should rarily happen */
4846 ql_dbg(ql_dbg_disc, vha, 0xffff,
4847 "%s %8phC found existing fcport b4 add. DS %d LS %d\n",
4848 __func__, tfcp->port_name, tfcp->disc_state,
4849 tfcp->fw_login_state);
4853 list_add_tail(&fcport->list, &vha->vp_fcports);
4857 qlt_plogi_ack_link(vha, pla, fcport,
4858 QLT_PLOGI_LINK_SAME_WWN);
4862 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
4865 fcport->id_changed = 1;
4866 fcport->scan_state = QLA_FCPORT_FOUND;
4867 fcport->chip_reset = vha->hw->base_qpair->chip_reset;
4868 memcpy(fcport->node_name, e->u.new_sess.node_name, WWN_SIZE);
4871 if (pla->iocb.u.isp24.status_subcode == ELS_PRLI) {
4874 fcport->fw_login_state = DSC_LS_PRLI_PEND;
4878 pla->iocb.u.isp24.nport_handle);
4879 fcport->fw_login_state = DSC_LS_PRLI_PEND;
4882 pla->iocb.u.isp24.u.prli.wd3_lo);
4885 fcport->conf_compl_supported = 1;
4887 if ((wd3_lo & BIT_4) == 0)
4888 fcport->port_type = FCT_INITIATOR;
4890 fcport->port_type = FCT_TARGET;
4892 qlt_plogi_ack_unref(vha, pla);
4894 fc_port_t *dfcp = NULL;
4896 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
4897 tfcp = qla2x00_find_fcport_by_nportid(vha,
4898 &e->u.new_sess.id, 1);
4899 if (tfcp && (tfcp != fcport)) {
4901 * We have a conflict fcport with same NportID.
4903 ql_dbg(ql_dbg_disc, vha, 0xffff,
4904 "%s %8phC found conflict b4 add. DS %d LS %d\n",
4905 __func__, tfcp->port_name, tfcp->disc_state,
4906 tfcp->fw_login_state);
4908 switch (tfcp->disc_state) {
4911 case DSC_DELETE_PEND:
4912 fcport->login_pause = 1;
4913 tfcp->conflict = fcport;
4916 fcport->login_pause = 1;
4917 tfcp->conflict = fcport;
4922 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
4924 qlt_schedule_sess_for_deletion(tfcp);
4927 if (N2N_TOPO(vha->hw))
4928 fcport->flags &= ~FCF_FABRIC_DEVICE;
4930 if (N2N_TOPO(vha->hw)) {
4931 if (vha->flags.nvme_enabled) {
4932 fcport->fc4f_nvme = 1;
4933 fcport->n2n_flag = 1;
4935 fcport->fw_login_state = 0;
4937 * wait link init done before sending login
4940 qla24xx_fcport_handle_login(vha, fcport);
4946 qla2x00_free_fcport(fcport);
4948 kmem_cache_free(qla_tgt_plogi_cachep, pla);
4952 static void qla_sp_retry(struct scsi_qla_host *vha, struct qla_work_evt *e)
4954 struct srb *sp = e->u.iosb.sp;
4957 rval = qla2x00_start_sp(sp);
4958 if (rval != QLA_SUCCESS) {
4959 ql_dbg(ql_dbg_disc, vha, 0x2043,
4960 "%s: %s: Re-issue IOCB failed (%d).\n",
4961 __func__, sp->name, rval);
4962 qla24xx_sp_unmap(vha, sp);
4967 qla2x00_do_work(struct scsi_qla_host *vha)
4969 struct qla_work_evt *e, *tmp;
4970 unsigned long flags;
4973 spin_lock_irqsave(&vha->work_lock, flags);
4974 list_splice_init(&vha->work_list, &work);
4975 spin_unlock_irqrestore(&vha->work_lock, flags);
4977 list_for_each_entry_safe(e, tmp, &work, list) {
4978 list_del_init(&e->list);
4982 fc_host_post_event(vha->host, fc_get_event_number(),
4983 e->u.aen.code, e->u.aen.data);
4985 case QLA_EVT_IDC_ACK:
4986 qla81xx_idc_ack(vha, e->u.idc_ack.mb);
4988 case QLA_EVT_ASYNC_LOGIN:
4989 qla2x00_async_login(vha, e->u.logio.fcport,
4992 case QLA_EVT_ASYNC_LOGOUT:
4993 qla2x00_async_logout(vha, e->u.logio.fcport);
4995 case QLA_EVT_ASYNC_LOGOUT_DONE:
4996 qla2x00_async_logout_done(vha, e->u.logio.fcport,
4999 case QLA_EVT_ASYNC_ADISC:
5000 qla2x00_async_adisc(vha, e->u.logio.fcport,
5003 case QLA_EVT_ASYNC_ADISC_DONE:
5004 qla2x00_async_adisc_done(vha, e->u.logio.fcport,
5007 case QLA_EVT_UEVENT:
5008 qla2x00_uevent_emit(vha, e->u.uevent.code);
5011 qlafx00_process_aen(vha, e);
5014 qla24xx_async_gidpn(vha, e->u.fcport.fcport);
5017 qla24xx_async_gpnid(vha, &e->u.gpnid.id);
5020 qla24xx_sp_unmap(vha, e->u.iosb.sp);
5022 case QLA_EVT_RELOGIN:
5023 qla2x00_relogin(vha);
5025 case QLA_EVT_NEW_SESS:
5026 qla24xx_create_new_sess(vha, e);
5029 qla24xx_async_gpdb(vha, e->u.fcport.fcport,
5033 qla24xx_async_prli(vha, e->u.fcport.fcport);
5036 qla24xx_async_gpsc(vha, e->u.fcport.fcport);
5039 qla24xx_async_gnl(vha, e->u.fcport.fcport);
5042 qla24xx_do_nack_work(vha, e);
5044 case QLA_EVT_ASYNC_PRLO:
5045 qla2x00_async_prlo(vha, e->u.logio.fcport);
5047 case QLA_EVT_ASYNC_PRLO_DONE:
5048 qla2x00_async_prlo_done(vha, e->u.logio.fcport,
5052 qla24xx_async_gpnft(vha, e->u.gpnft.fc4_type,
5055 case QLA_EVT_GPNFT_DONE:
5056 qla24xx_async_gpnft_done(vha, e->u.iosb.sp);
5058 case QLA_EVT_GNNFT_DONE:
5059 qla24xx_async_gnnft_done(vha, e->u.iosb.sp);
5062 qla24xx_async_gnnid(vha, e->u.fcport.fcport);
5064 case QLA_EVT_GFPNID:
5065 qla24xx_async_gfpnid(vha, e->u.fcport.fcport);
5067 case QLA_EVT_SP_RETRY:
5068 qla_sp_retry(vha, e);
5071 qla_do_iidma_work(vha, e->u.fcport.fcport);
5073 case QLA_EVT_ELS_PLOGI:
5074 qla24xx_els_dcmd2_iocb(vha, ELS_DCMD_PLOGI,
5075 e->u.fcport.fcport, false);
5078 if (e->flags & QLA_EVT_FLAG_FREE)
5081 /* For each work completed decrement vha ref count */
5082 QLA_VHA_MARK_NOT_BUSY(vha);
5086 int qla24xx_post_relogin_work(struct scsi_qla_host *vha)
5088 struct qla_work_evt *e;
5090 e = qla2x00_alloc_work(vha, QLA_EVT_RELOGIN);
5093 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
5094 return QLA_FUNCTION_FAILED;
5097 return qla2x00_post_work(vha, e);
5100 /* Relogins all the fcports of a vport
5101 * Context: dpc thread
5103 void qla2x00_relogin(struct scsi_qla_host *vha)
5106 int status, relogin_needed = 0;
5107 struct event_arg ea;
5109 list_for_each_entry(fcport, &vha->vp_fcports, list) {
5111 * If the port is not ONLINE then try to login
5112 * to it if we haven't run out of retries.
5114 if (atomic_read(&fcport->state) != FCS_ONLINE &&
5115 fcport->login_retry) {
5116 if (fcport->scan_state != QLA_FCPORT_FOUND ||
5117 fcport->disc_state == DSC_LOGIN_COMPLETE)
5120 if (fcport->flags & (FCF_ASYNC_SENT|FCF_ASYNC_ACTIVE) ||
5121 fcport->disc_state == DSC_DELETE_PEND) {
5124 if (vha->hw->current_topology != ISP_CFG_NL) {
5125 memset(&ea, 0, sizeof(ea));
5126 ea.event = FCME_RELOGIN;
5128 qla2x00_fcport_event_handler(vha, &ea);
5129 } else if (vha->hw->current_topology ==
5131 fcport->login_retry--;
5133 qla2x00_local_device_login(vha,
5135 if (status == QLA_SUCCESS) {
5136 fcport->old_loop_id =
5138 ql_dbg(ql_dbg_disc, vha, 0x2003,
5139 "Port login OK: logged in ID 0x%x.\n",
5141 qla2x00_update_fcport
5143 } else if (status == 1) {
5144 set_bit(RELOGIN_NEEDED,
5146 /* retry the login again */
5147 ql_dbg(ql_dbg_disc, vha, 0x2007,
5148 "Retrying %d login again loop_id 0x%x.\n",
5149 fcport->login_retry,
5152 fcport->login_retry = 0;
5155 if (fcport->login_retry == 0 &&
5156 status != QLA_SUCCESS)
5157 qla2x00_clear_loop_id(fcport);
5161 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5166 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
5168 ql_dbg(ql_dbg_disc, vha, 0x400e,
5172 /* Schedule work on any of the dpc-workqueues */
5174 qla83xx_schedule_work(scsi_qla_host_t *base_vha, int work_code)
5176 struct qla_hw_data *ha = base_vha->hw;
5178 switch (work_code) {
5179 case MBA_IDC_AEN: /* 0x8200 */
5181 queue_work(ha->dpc_lp_wq, &ha->idc_aen);
5184 case QLA83XX_NIC_CORE_RESET: /* 0x1 */
5185 if (!ha->flags.nic_core_reset_hdlr_active) {
5187 queue_work(ha->dpc_hp_wq, &ha->nic_core_reset);
5189 ql_dbg(ql_dbg_p3p, base_vha, 0xb05e,
5190 "NIC Core reset is already active. Skip "
5191 "scheduling it again.\n");
5193 case QLA83XX_IDC_STATE_HANDLER: /* 0x2 */
5195 queue_work(ha->dpc_hp_wq, &ha->idc_state_handler);
5197 case QLA83XX_NIC_CORE_UNRECOVERABLE: /* 0x3 */
5199 queue_work(ha->dpc_hp_wq, &ha->nic_core_unrecoverable);
5202 ql_log(ql_log_warn, base_vha, 0xb05f,
5203 "Unknown work-code=0x%x.\n", work_code);
5209 /* Work: Perform NIC Core Unrecoverable state handling */
5211 qla83xx_nic_core_unrecoverable_work(struct work_struct *work)
5213 struct qla_hw_data *ha =
5214 container_of(work, struct qla_hw_data, nic_core_unrecoverable);
5215 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
5216 uint32_t dev_state = 0;
5218 qla83xx_idc_lock(base_vha, 0);
5219 qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
5220 qla83xx_reset_ownership(base_vha);
5221 if (ha->flags.nic_core_reset_owner) {
5222 ha->flags.nic_core_reset_owner = 0;
5223 qla83xx_wr_reg(base_vha, QLA83XX_IDC_DEV_STATE,
5224 QLA8XXX_DEV_FAILED);
5225 ql_log(ql_log_info, base_vha, 0xb060, "HW State: FAILED.\n");
5226 qla83xx_schedule_work(base_vha, QLA83XX_IDC_STATE_HANDLER);
5228 qla83xx_idc_unlock(base_vha, 0);
5231 /* Work: Execute IDC state handler */
5233 qla83xx_idc_state_handler_work(struct work_struct *work)
5235 struct qla_hw_data *ha =
5236 container_of(work, struct qla_hw_data, idc_state_handler);
5237 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
5238 uint32_t dev_state = 0;
5240 qla83xx_idc_lock(base_vha, 0);
5241 qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
5242 if (dev_state == QLA8XXX_DEV_FAILED ||
5243 dev_state == QLA8XXX_DEV_NEED_QUIESCENT)
5244 qla83xx_idc_state_handler(base_vha);
5245 qla83xx_idc_unlock(base_vha, 0);
5249 qla83xx_check_nic_core_fw_alive(scsi_qla_host_t *base_vha)
5251 int rval = QLA_SUCCESS;
5252 unsigned long heart_beat_wait = jiffies + (1 * HZ);
5253 uint32_t heart_beat_counter1, heart_beat_counter2;
5256 if (time_after(jiffies, heart_beat_wait)) {
5257 ql_dbg(ql_dbg_p3p, base_vha, 0xb07c,
5258 "Nic Core f/w is not alive.\n");
5259 rval = QLA_FUNCTION_FAILED;
5263 qla83xx_idc_lock(base_vha, 0);
5264 qla83xx_rd_reg(base_vha, QLA83XX_FW_HEARTBEAT,
5265 &heart_beat_counter1);
5266 qla83xx_idc_unlock(base_vha, 0);
5268 qla83xx_idc_lock(base_vha, 0);
5269 qla83xx_rd_reg(base_vha, QLA83XX_FW_HEARTBEAT,
5270 &heart_beat_counter2);
5271 qla83xx_idc_unlock(base_vha, 0);
5272 } while (heart_beat_counter1 == heart_beat_counter2);
5277 /* Work: Perform NIC Core Reset handling */
5279 qla83xx_nic_core_reset_work(struct work_struct *work)
5281 struct qla_hw_data *ha =
5282 container_of(work, struct qla_hw_data, nic_core_reset);
5283 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
5284 uint32_t dev_state = 0;
5286 if (IS_QLA2031(ha)) {
5287 if (qla2xxx_mctp_dump(base_vha) != QLA_SUCCESS)
5288 ql_log(ql_log_warn, base_vha, 0xb081,
5289 "Failed to dump mctp\n");
5293 if (!ha->flags.nic_core_reset_hdlr_active) {
5294 if (qla83xx_check_nic_core_fw_alive(base_vha) == QLA_SUCCESS) {
5295 qla83xx_idc_lock(base_vha, 0);
5296 qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE,
5298 qla83xx_idc_unlock(base_vha, 0);
5299 if (dev_state != QLA8XXX_DEV_NEED_RESET) {
5300 ql_dbg(ql_dbg_p3p, base_vha, 0xb07a,
5301 "Nic Core f/w is alive.\n");
5306 ha->flags.nic_core_reset_hdlr_active = 1;
5307 if (qla83xx_nic_core_reset(base_vha)) {
5308 /* NIC Core reset failed. */
5309 ql_dbg(ql_dbg_p3p, base_vha, 0xb061,
5310 "NIC Core reset failed.\n");
5312 ha->flags.nic_core_reset_hdlr_active = 0;
5316 /* Work: Handle 8200 IDC aens */
5318 qla83xx_service_idc_aen(struct work_struct *work)
5320 struct qla_hw_data *ha =
5321 container_of(work, struct qla_hw_data, idc_aen);
5322 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
5323 uint32_t dev_state, idc_control;
5325 qla83xx_idc_lock(base_vha, 0);
5326 qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
5327 qla83xx_rd_reg(base_vha, QLA83XX_IDC_CONTROL, &idc_control);
5328 qla83xx_idc_unlock(base_vha, 0);
5329 if (dev_state == QLA8XXX_DEV_NEED_RESET) {
5330 if (idc_control & QLA83XX_IDC_GRACEFUL_RESET) {
5331 ql_dbg(ql_dbg_p3p, base_vha, 0xb062,
5332 "Application requested NIC Core Reset.\n");
5333 qla83xx_schedule_work(base_vha, QLA83XX_NIC_CORE_RESET);
5334 } else if (qla83xx_check_nic_core_fw_alive(base_vha) ==
5336 ql_dbg(ql_dbg_p3p, base_vha, 0xb07b,
5337 "Other protocol driver requested NIC Core Reset.\n");
5338 qla83xx_schedule_work(base_vha, QLA83XX_NIC_CORE_RESET);
5340 } else if (dev_state == QLA8XXX_DEV_FAILED ||
5341 dev_state == QLA8XXX_DEV_NEED_QUIESCENT) {
5342 qla83xx_schedule_work(base_vha, QLA83XX_IDC_STATE_HANDLER);
5347 qla83xx_wait_logic(void)
5352 if (!in_interrupt()) {
5354 * Wait about 200ms before retrying again.
5355 * This controls the number of retries for single
5361 for (i = 0; i < 20; i++)
5362 cpu_relax(); /* This a nop instr on i386 */
5367 qla83xx_force_lock_recovery(scsi_qla_host_t *base_vha)
5371 uint32_t idc_lck_rcvry_stage_mask = 0x3;
5372 uint32_t idc_lck_rcvry_owner_mask = 0x3c;
5373 struct qla_hw_data *ha = base_vha->hw;
5374 ql_dbg(ql_dbg_p3p, base_vha, 0xb086,
5375 "Trying force recovery of the IDC lock.\n");
5377 rval = qla83xx_rd_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY, &data);
5381 if ((data & idc_lck_rcvry_stage_mask) > 0) {
5384 data = (IDC_LOCK_RECOVERY_STAGE1) | (ha->portnum << 2);
5385 rval = qla83xx_wr_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY,
5392 rval = qla83xx_rd_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY,
5397 if (((data & idc_lck_rcvry_owner_mask) >> 2) == ha->portnum) {
5398 data &= (IDC_LOCK_RECOVERY_STAGE2 |
5399 ~(idc_lck_rcvry_stage_mask));
5400 rval = qla83xx_wr_reg(base_vha,
5401 QLA83XX_IDC_LOCK_RECOVERY, data);
5405 /* Forcefully perform IDC UnLock */
5406 rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_UNLOCK,
5410 /* Clear lock-id by setting 0xff */
5411 rval = qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID,
5415 /* Clear lock-recovery by setting 0x0 */
5416 rval = qla83xx_wr_reg(base_vha,
5417 QLA83XX_IDC_LOCK_RECOVERY, 0x0);
5428 qla83xx_idc_lock_recovery(scsi_qla_host_t *base_vha)
5430 int rval = QLA_SUCCESS;
5431 uint32_t o_drv_lockid, n_drv_lockid;
5432 unsigned long lock_recovery_timeout;
5434 lock_recovery_timeout = jiffies + QLA83XX_MAX_LOCK_RECOVERY_WAIT;
5436 rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &o_drv_lockid);
5440 /* MAX wait time before forcing IDC Lock recovery = 2 secs */
5441 if (time_after_eq(jiffies, lock_recovery_timeout)) {
5442 if (qla83xx_force_lock_recovery(base_vha) == QLA_SUCCESS)
5445 return QLA_FUNCTION_FAILED;
5448 rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &n_drv_lockid);
5452 if (o_drv_lockid == n_drv_lockid) {
5453 qla83xx_wait_logic();
5463 qla83xx_idc_lock(scsi_qla_host_t *base_vha, uint16_t requester_id)
5465 uint16_t options = (requester_id << 15) | BIT_6;
5467 uint32_t lock_owner;
5468 struct qla_hw_data *ha = base_vha->hw;
5470 /* IDC-lock implementation using driver-lock/lock-id remote registers */
5472 if (qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCK, &data)
5475 /* Setting lock-id to our function-number */
5476 qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID,
5479 qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID,
5481 ql_dbg(ql_dbg_p3p, base_vha, 0xb063,
5482 "Failed to acquire IDC lock, acquired by %d, "
5483 "retrying...\n", lock_owner);
5485 /* Retry/Perform IDC-Lock recovery */
5486 if (qla83xx_idc_lock_recovery(base_vha)
5488 qla83xx_wait_logic();
5491 ql_log(ql_log_warn, base_vha, 0xb075,
5492 "IDC Lock recovery FAILED.\n");
5499 /* XXX: IDC-lock implementation using access-control mbx */
5501 if (qla83xx_access_control(base_vha, options, 0, 0, NULL)) {
5502 ql_dbg(ql_dbg_p3p, base_vha, 0xb072,
5503 "Failed to acquire IDC lock. retrying...\n");
5504 /* Retry/Perform IDC-Lock recovery */
5505 if (qla83xx_idc_lock_recovery(base_vha) == QLA_SUCCESS) {
5506 qla83xx_wait_logic();
5509 ql_log(ql_log_warn, base_vha, 0xb076,
5510 "IDC Lock recovery FAILED.\n");
5517 qla83xx_idc_unlock(scsi_qla_host_t *base_vha, uint16_t requester_id)
5520 uint16_t options = (requester_id << 15) | BIT_7;
5524 struct qla_hw_data *ha = base_vha->hw;
5526 /* IDC-unlock implementation using driver-unlock/lock-id
5531 if (qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &data)
5533 if (data == ha->portnum) {
5534 qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_UNLOCK, &data);
5535 /* Clearing lock-id by setting 0xff */
5536 qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID, 0xff);
5537 } else if (retry < 10) {
5538 /* SV: XXX: IDC unlock retrying needed here? */
5540 /* Retry for IDC-unlock */
5541 qla83xx_wait_logic();
5543 ql_dbg(ql_dbg_p3p, base_vha, 0xb064,
5544 "Failed to release IDC lock, retrying=%d\n", retry);
5547 } else if (retry < 10) {
5548 /* Retry for IDC-unlock */
5549 qla83xx_wait_logic();
5551 ql_dbg(ql_dbg_p3p, base_vha, 0xb065,
5552 "Failed to read drv-lockid, retrying=%d\n", retry);
5559 /* XXX: IDC-unlock implementation using access-control mbx */
5562 if (qla83xx_access_control(base_vha, options, 0, 0, NULL)) {
5564 /* Retry for IDC-unlock */
5565 qla83xx_wait_logic();
5567 ql_dbg(ql_dbg_p3p, base_vha, 0xb066,
5568 "Failed to release IDC lock, retrying=%d\n", retry);
5578 __qla83xx_set_drv_presence(scsi_qla_host_t *vha)
5580 int rval = QLA_SUCCESS;
5581 struct qla_hw_data *ha = vha->hw;
5582 uint32_t drv_presence;
5584 rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
5585 if (rval == QLA_SUCCESS) {
5586 drv_presence |= (1 << ha->portnum);
5587 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
5595 qla83xx_set_drv_presence(scsi_qla_host_t *vha)
5597 int rval = QLA_SUCCESS;
5599 qla83xx_idc_lock(vha, 0);
5600 rval = __qla83xx_set_drv_presence(vha);
5601 qla83xx_idc_unlock(vha, 0);
5607 __qla83xx_clear_drv_presence(scsi_qla_host_t *vha)
5609 int rval = QLA_SUCCESS;
5610 struct qla_hw_data *ha = vha->hw;
5611 uint32_t drv_presence;
5613 rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
5614 if (rval == QLA_SUCCESS) {
5615 drv_presence &= ~(1 << ha->portnum);
5616 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
5624 qla83xx_clear_drv_presence(scsi_qla_host_t *vha)
5626 int rval = QLA_SUCCESS;
5628 qla83xx_idc_lock(vha, 0);
5629 rval = __qla83xx_clear_drv_presence(vha);
5630 qla83xx_idc_unlock(vha, 0);
5636 qla83xx_need_reset_handler(scsi_qla_host_t *vha)
5638 struct qla_hw_data *ha = vha->hw;
5639 uint32_t drv_ack, drv_presence;
5640 unsigned long ack_timeout;
5642 /* Wait for IDC ACK from all functions (DRV-ACK == DRV-PRESENCE) */
5643 ack_timeout = jiffies + (ha->fcoe_reset_timeout * HZ);
5645 qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack);
5646 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
5647 if ((drv_ack & drv_presence) == drv_presence)
5650 if (time_after_eq(jiffies, ack_timeout)) {
5651 ql_log(ql_log_warn, vha, 0xb067,
5652 "RESET ACK TIMEOUT! drv_presence=0x%x "
5653 "drv_ack=0x%x\n", drv_presence, drv_ack);
5655 * The function(s) which did not ack in time are forced
5656 * to withdraw any further participation in the IDC
5659 if (drv_ack != drv_presence)
5660 qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
5665 qla83xx_idc_unlock(vha, 0);
5667 qla83xx_idc_lock(vha, 0);
5670 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_COLD);
5671 ql_log(ql_log_info, vha, 0xb068, "HW State: COLD/RE-INIT.\n");
5675 qla83xx_device_bootstrap(scsi_qla_host_t *vha)
5677 int rval = QLA_SUCCESS;
5678 uint32_t idc_control;
5680 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_INITIALIZING);
5681 ql_log(ql_log_info, vha, 0xb069, "HW State: INITIALIZING.\n");
5683 /* Clearing IDC-Control Graceful-Reset Bit before resetting f/w */
5684 __qla83xx_get_idc_control(vha, &idc_control);
5685 idc_control &= ~QLA83XX_IDC_GRACEFUL_RESET;
5686 __qla83xx_set_idc_control(vha, 0);
5688 qla83xx_idc_unlock(vha, 0);
5689 rval = qla83xx_restart_nic_firmware(vha);
5690 qla83xx_idc_lock(vha, 0);
5692 if (rval != QLA_SUCCESS) {
5693 ql_log(ql_log_fatal, vha, 0xb06a,
5694 "Failed to restart NIC f/w.\n");
5695 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_FAILED);
5696 ql_log(ql_log_info, vha, 0xb06b, "HW State: FAILED.\n");
5698 ql_dbg(ql_dbg_p3p, vha, 0xb06c,
5699 "Success in restarting nic f/w.\n");
5700 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_READY);
5701 ql_log(ql_log_info, vha, 0xb06d, "HW State: READY.\n");
5707 /* Assumes idc_lock always held on entry */
5709 qla83xx_idc_state_handler(scsi_qla_host_t *base_vha)
5711 struct qla_hw_data *ha = base_vha->hw;
5712 int rval = QLA_SUCCESS;
5713 unsigned long dev_init_timeout;
5716 /* Wait for MAX-INIT-TIMEOUT for the device to go ready */
5717 dev_init_timeout = jiffies + (ha->fcoe_dev_init_timeout * HZ);
5721 if (time_after_eq(jiffies, dev_init_timeout)) {
5722 ql_log(ql_log_warn, base_vha, 0xb06e,
5723 "Initialization TIMEOUT!\n");
5724 /* Init timeout. Disable further NIC Core
5727 qla83xx_wr_reg(base_vha, QLA83XX_IDC_DEV_STATE,
5728 QLA8XXX_DEV_FAILED);
5729 ql_log(ql_log_info, base_vha, 0xb06f,
5730 "HW State: FAILED.\n");
5733 qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
5734 switch (dev_state) {
5735 case QLA8XXX_DEV_READY:
5736 if (ha->flags.nic_core_reset_owner)
5737 qla83xx_idc_audit(base_vha,
5738 IDC_AUDIT_COMPLETION);
5739 ha->flags.nic_core_reset_owner = 0;
5740 ql_dbg(ql_dbg_p3p, base_vha, 0xb070,
5741 "Reset_owner reset by 0x%x.\n",
5744 case QLA8XXX_DEV_COLD:
5745 if (ha->flags.nic_core_reset_owner)
5746 rval = qla83xx_device_bootstrap(base_vha);
5748 /* Wait for AEN to change device-state */
5749 qla83xx_idc_unlock(base_vha, 0);
5751 qla83xx_idc_lock(base_vha, 0);
5754 case QLA8XXX_DEV_INITIALIZING:
5755 /* Wait for AEN to change device-state */
5756 qla83xx_idc_unlock(base_vha, 0);
5758 qla83xx_idc_lock(base_vha, 0);
5760 case QLA8XXX_DEV_NEED_RESET:
5761 if (!ql2xdontresethba && ha->flags.nic_core_reset_owner)
5762 qla83xx_need_reset_handler(base_vha);
5764 /* Wait for AEN to change device-state */
5765 qla83xx_idc_unlock(base_vha, 0);
5767 qla83xx_idc_lock(base_vha, 0);
5769 /* reset timeout value after need reset handler */
5770 dev_init_timeout = jiffies +
5771 (ha->fcoe_dev_init_timeout * HZ);
5773 case QLA8XXX_DEV_NEED_QUIESCENT:
5774 /* XXX: DEBUG for now */
5775 qla83xx_idc_unlock(base_vha, 0);
5777 qla83xx_idc_lock(base_vha, 0);
5779 case QLA8XXX_DEV_QUIESCENT:
5780 /* XXX: DEBUG for now */
5781 if (ha->flags.quiesce_owner)
5784 qla83xx_idc_unlock(base_vha, 0);
5786 qla83xx_idc_lock(base_vha, 0);
5787 dev_init_timeout = jiffies +
5788 (ha->fcoe_dev_init_timeout * HZ);
5790 case QLA8XXX_DEV_FAILED:
5791 if (ha->flags.nic_core_reset_owner)
5792 qla83xx_idc_audit(base_vha,
5793 IDC_AUDIT_COMPLETION);
5794 ha->flags.nic_core_reset_owner = 0;
5795 __qla83xx_clear_drv_presence(base_vha);
5796 qla83xx_idc_unlock(base_vha, 0);
5797 qla8xxx_dev_failed_handler(base_vha);
5798 rval = QLA_FUNCTION_FAILED;
5799 qla83xx_idc_lock(base_vha, 0);
5801 case QLA8XXX_BAD_VALUE:
5802 qla83xx_idc_unlock(base_vha, 0);
5804 qla83xx_idc_lock(base_vha, 0);
5807 ql_log(ql_log_warn, base_vha, 0xb071,
5808 "Unknown Device State: %x.\n", dev_state);
5809 qla83xx_idc_unlock(base_vha, 0);
5810 qla8xxx_dev_failed_handler(base_vha);
5811 rval = QLA_FUNCTION_FAILED;
5812 qla83xx_idc_lock(base_vha, 0);
5822 qla2x00_disable_board_on_pci_error(struct work_struct *work)
5824 struct qla_hw_data *ha = container_of(work, struct qla_hw_data,
5826 struct pci_dev *pdev = ha->pdev;
5827 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
5829 ql_log(ql_log_warn, base_vha, 0x015b,
5830 "Disabling adapter.\n");
5832 if (!atomic_read(&pdev->enable_cnt)) {
5833 ql_log(ql_log_info, base_vha, 0xfffc,
5834 "PCI device disabled, no action req for PCI error=%lx\n",
5835 base_vha->pci_flags);
5840 * if UNLOADING flag is already set, then continue unload,
5841 * where it was set first.
5843 if (test_and_set_bit(UNLOADING, &base_vha->dpc_flags))
5846 qla2x00_wait_for_sess_deletion(base_vha);
5848 qla2x00_delete_all_vps(ha, base_vha);
5850 qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
5852 qla2x00_dfs_remove(base_vha);
5854 qla84xx_put_chip(base_vha);
5856 if (base_vha->timer_active)
5857 qla2x00_stop_timer(base_vha);
5859 base_vha->flags.online = 0;
5861 qla2x00_destroy_deferred_work(ha);
5864 * Do not try to stop beacon blink as it will issue a mailbox
5867 qla2x00_free_sysfs_attr(base_vha, false);
5869 fc_remove_host(base_vha->host);
5871 scsi_remove_host(base_vha->host);
5873 base_vha->flags.init_done = 0;
5874 qla25xx_delete_queues(base_vha);
5875 qla2x00_free_fcports(base_vha);
5876 qla2x00_free_irqs(base_vha);
5877 qla2x00_mem_free(ha);
5878 qla82xx_md_free(base_vha);
5879 qla2x00_free_queues(ha);
5881 qla2x00_unmap_iobases(ha);
5883 pci_release_selected_regions(ha->pdev, ha->bars);
5884 pci_disable_pcie_error_reporting(pdev);
5885 pci_disable_device(pdev);
5888 * Let qla2x00_remove_one cleanup qla_hw_data on device removal.
5892 /**************************************************************************
5894 * This kernel thread is a task that is schedule by the interrupt handler
5895 * to perform the background processing for interrupts.
5898 * This task always run in the context of a kernel thread. It
5899 * is kick-off by the driver's detect code and starts up
5900 * up one per adapter. It immediately goes to sleep and waits for
5901 * some fibre event. When either the interrupt handler or
5902 * the timer routine detects a event it will one of the task
5903 * bits then wake us up.
5904 **************************************************************************/
5906 qla2x00_do_dpc(void *data)
5908 scsi_qla_host_t *base_vha;
5909 struct qla_hw_data *ha;
5911 struct qla_qpair *qpair;
5913 ha = (struct qla_hw_data *)data;
5914 base_vha = pci_get_drvdata(ha->pdev);
5916 set_user_nice(current, MIN_NICE);
5918 set_current_state(TASK_INTERRUPTIBLE);
5919 while (!kthread_should_stop()) {
5920 ql_dbg(ql_dbg_dpc, base_vha, 0x4000,
5921 "DPC handler sleeping.\n");
5925 if (!base_vha->flags.init_done || ha->flags.mbox_busy)
5928 if (ha->flags.eeh_busy) {
5929 ql_dbg(ql_dbg_dpc, base_vha, 0x4003,
5930 "eeh_busy=%d.\n", ha->flags.eeh_busy);
5936 ql_dbg(ql_dbg_dpc + ql_dbg_verbose, base_vha, 0x4001,
5937 "DPC handler waking up, dpc_flags=0x%lx.\n",
5938 base_vha->dpc_flags);
5940 if (test_bit(UNLOADING, &base_vha->dpc_flags))
5943 if (IS_P3P_TYPE(ha)) {
5944 if (IS_QLA8044(ha)) {
5945 if (test_and_clear_bit(ISP_UNRECOVERABLE,
5946 &base_vha->dpc_flags)) {
5947 qla8044_idc_lock(ha);
5948 qla8044_wr_direct(base_vha,
5949 QLA8044_CRB_DEV_STATE_INDEX,
5950 QLA8XXX_DEV_FAILED);
5951 qla8044_idc_unlock(ha);
5952 ql_log(ql_log_info, base_vha, 0x4004,
5953 "HW State: FAILED.\n");
5954 qla8044_device_state_handler(base_vha);
5959 if (test_and_clear_bit(ISP_UNRECOVERABLE,
5960 &base_vha->dpc_flags)) {
5961 qla82xx_idc_lock(ha);
5962 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
5963 QLA8XXX_DEV_FAILED);
5964 qla82xx_idc_unlock(ha);
5965 ql_log(ql_log_info, base_vha, 0x0151,
5966 "HW State: FAILED.\n");
5967 qla82xx_device_state_handler(base_vha);
5972 if (test_and_clear_bit(FCOE_CTX_RESET_NEEDED,
5973 &base_vha->dpc_flags)) {
5975 ql_dbg(ql_dbg_dpc, base_vha, 0x4005,
5976 "FCoE context reset scheduled.\n");
5977 if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
5978 &base_vha->dpc_flags))) {
5979 if (qla82xx_fcoe_ctx_reset(base_vha)) {
5980 /* FCoE-ctx reset failed.
5981 * Escalate to chip-reset
5983 set_bit(ISP_ABORT_NEEDED,
5984 &base_vha->dpc_flags);
5986 clear_bit(ABORT_ISP_ACTIVE,
5987 &base_vha->dpc_flags);
5990 ql_dbg(ql_dbg_dpc, base_vha, 0x4006,
5991 "FCoE context reset end.\n");
5993 } else if (IS_QLAFX00(ha)) {
5994 if (test_and_clear_bit(ISP_UNRECOVERABLE,
5995 &base_vha->dpc_flags)) {
5996 ql_dbg(ql_dbg_dpc, base_vha, 0x4020,
5997 "Firmware Reset Recovery\n");
5998 if (qlafx00_reset_initialize(base_vha)) {
5999 /* Failed. Abort isp later. */
6000 if (!test_bit(UNLOADING,
6001 &base_vha->dpc_flags)) {
6002 set_bit(ISP_UNRECOVERABLE,
6003 &base_vha->dpc_flags);
6004 ql_dbg(ql_dbg_dpc, base_vha,
6006 "Reset Recovery Failed\n");
6011 if (test_and_clear_bit(FX00_TARGET_SCAN,
6012 &base_vha->dpc_flags)) {
6013 ql_dbg(ql_dbg_dpc, base_vha, 0x4022,
6014 "ISPFx00 Target Scan scheduled\n");
6015 if (qlafx00_rescan_isp(base_vha)) {
6016 if (!test_bit(UNLOADING,
6017 &base_vha->dpc_flags))
6018 set_bit(ISP_UNRECOVERABLE,
6019 &base_vha->dpc_flags);
6020 ql_dbg(ql_dbg_dpc, base_vha, 0x401e,
6021 "ISPFx00 Target Scan Failed\n");
6023 ql_dbg(ql_dbg_dpc, base_vha, 0x401f,
6024 "ISPFx00 Target Scan End\n");
6026 if (test_and_clear_bit(FX00_HOST_INFO_RESEND,
6027 &base_vha->dpc_flags)) {
6028 ql_dbg(ql_dbg_dpc, base_vha, 0x4023,
6029 "ISPFx00 Host Info resend scheduled\n");
6030 qlafx00_fx_disc(base_vha,
6031 &base_vha->hw->mr.fcport,
6032 FXDISC_REG_HOST_INFO);
6036 if (test_and_clear_bit(DETECT_SFP_CHANGE,
6037 &base_vha->dpc_flags) &&
6038 !test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) {
6039 qla24xx_detect_sfp(base_vha);
6041 if (ha->flags.detected_lr_sfp !=
6042 ha->flags.using_lr_setting)
6043 set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags);
6046 if (test_and_clear_bit
6047 (ISP_ABORT_NEEDED, &base_vha->dpc_flags) &&
6048 !test_bit(UNLOADING, &base_vha->dpc_flags)) {
6049 bool do_reset = true;
6051 switch (ql2x_ini_mode) {
6052 case QLA2XXX_INI_MODE_ENABLED:
6054 case QLA2XXX_INI_MODE_DISABLED:
6055 if (!qla_tgt_mode_enabled(base_vha))
6058 case QLA2XXX_INI_MODE_DUAL:
6059 if (!qla_dual_mode_enabled(base_vha))
6066 if (do_reset && !(test_and_set_bit(ABORT_ISP_ACTIVE,
6067 &base_vha->dpc_flags))) {
6068 base_vha->flags.online = 1;
6069 ql_dbg(ql_dbg_dpc, base_vha, 0x4007,
6070 "ISP abort scheduled.\n");
6071 if (ha->isp_ops->abort_isp(base_vha)) {
6072 /* failed. retry later */
6073 set_bit(ISP_ABORT_NEEDED,
6074 &base_vha->dpc_flags);
6076 clear_bit(ABORT_ISP_ACTIVE,
6077 &base_vha->dpc_flags);
6078 ql_dbg(ql_dbg_dpc, base_vha, 0x4008,
6079 "ISP abort end.\n");
6083 if (test_and_clear_bit(FCPORT_UPDATE_NEEDED,
6084 &base_vha->dpc_flags)) {
6085 qla2x00_update_fcports(base_vha);
6089 goto loop_resync_check;
6091 if (test_bit(ISP_QUIESCE_NEEDED, &base_vha->dpc_flags)) {
6092 ql_dbg(ql_dbg_dpc, base_vha, 0x4009,
6093 "Quiescence mode scheduled.\n");
6094 if (IS_P3P_TYPE(ha)) {
6096 qla82xx_device_state_handler(base_vha);
6098 qla8044_device_state_handler(base_vha);
6099 clear_bit(ISP_QUIESCE_NEEDED,
6100 &base_vha->dpc_flags);
6101 if (!ha->flags.quiesce_owner) {
6102 qla2x00_perform_loop_resync(base_vha);
6103 if (IS_QLA82XX(ha)) {
6104 qla82xx_idc_lock(ha);
6105 qla82xx_clear_qsnt_ready(
6107 qla82xx_idc_unlock(ha);
6108 } else if (IS_QLA8044(ha)) {
6109 qla8044_idc_lock(ha);
6110 qla8044_clear_qsnt_ready(
6112 qla8044_idc_unlock(ha);
6116 clear_bit(ISP_QUIESCE_NEEDED,
6117 &base_vha->dpc_flags);
6118 qla2x00_quiesce_io(base_vha);
6120 ql_dbg(ql_dbg_dpc, base_vha, 0x400a,
6121 "Quiescence mode end.\n");
6124 if (test_and_clear_bit(RESET_MARKER_NEEDED,
6125 &base_vha->dpc_flags) &&
6126 (!(test_and_set_bit(RESET_ACTIVE, &base_vha->dpc_flags)))) {
6128 ql_dbg(ql_dbg_dpc, base_vha, 0x400b,
6129 "Reset marker scheduled.\n");
6130 qla2x00_rst_aen(base_vha);
6131 clear_bit(RESET_ACTIVE, &base_vha->dpc_flags);
6132 ql_dbg(ql_dbg_dpc, base_vha, 0x400c,
6133 "Reset marker end.\n");
6136 /* Retry each device up to login retry count */
6137 if (test_bit(RELOGIN_NEEDED, &base_vha->dpc_flags) &&
6138 !test_bit(LOOP_RESYNC_NEEDED, &base_vha->dpc_flags) &&
6139 atomic_read(&base_vha->loop_state) != LOOP_DOWN) {
6141 if (!base_vha->relogin_jif ||
6142 time_after_eq(jiffies, base_vha->relogin_jif)) {
6143 base_vha->relogin_jif = jiffies + HZ;
6144 clear_bit(RELOGIN_NEEDED, &base_vha->dpc_flags);
6146 ql_dbg(ql_dbg_disc, base_vha, 0x400d,
6147 "Relogin scheduled.\n");
6148 qla24xx_post_relogin_work(base_vha);
6152 if (test_and_clear_bit(LOOP_RESYNC_NEEDED,
6153 &base_vha->dpc_flags)) {
6155 ql_dbg(ql_dbg_dpc, base_vha, 0x400f,
6156 "Loop resync scheduled.\n");
6158 if (!(test_and_set_bit(LOOP_RESYNC_ACTIVE,
6159 &base_vha->dpc_flags))) {
6161 qla2x00_loop_resync(base_vha);
6163 clear_bit(LOOP_RESYNC_ACTIVE,
6164 &base_vha->dpc_flags);
6167 ql_dbg(ql_dbg_dpc, base_vha, 0x4010,
6168 "Loop resync end.\n");
6174 if (test_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags) &&
6175 atomic_read(&base_vha->loop_state) == LOOP_READY) {
6176 clear_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags);
6177 qla2xxx_flash_npiv_conf(base_vha);
6181 if (!ha->interrupts_on)
6182 ha->isp_ops->enable_intrs(ha);
6184 if (test_and_clear_bit(BEACON_BLINK_NEEDED,
6185 &base_vha->dpc_flags)) {
6186 if (ha->beacon_blink_led == 1)
6187 ha->isp_ops->beacon_blink(base_vha);
6190 /* qpair online check */
6191 if (test_and_clear_bit(QPAIR_ONLINE_CHECK_NEEDED,
6192 &base_vha->dpc_flags)) {
6193 if (ha->flags.eeh_busy ||
6194 ha->flags.pci_channel_io_perm_failure)
6199 mutex_lock(&ha->mq_lock);
6200 list_for_each_entry(qpair, &base_vha->qp_list,
6202 qpair->online = online;
6203 mutex_unlock(&ha->mq_lock);
6206 if (test_and_clear_bit(SET_ZIO_THRESHOLD_NEEDED, &base_vha->dpc_flags)) {
6207 ql_log(ql_log_info, base_vha, 0xffffff,
6208 "nvme: SET ZIO Activity exchange threshold to %d.\n",
6209 ha->nvme_last_rptd_aen);
6210 if (qla27xx_set_zio_threshold(base_vha, ha->nvme_last_rptd_aen)) {
6211 ql_log(ql_log_info, base_vha, 0xffffff,
6212 "nvme: Unable to SET ZIO Activity exchange threshold to %d.\n",
6213 ha->nvme_last_rptd_aen);
6217 if (!IS_QLAFX00(ha))
6218 qla2x00_do_dpc_all_vps(base_vha);
6220 if (test_and_clear_bit(N2N_LINK_RESET,
6221 &base_vha->dpc_flags)) {
6222 qla2x00_lip_reset(base_vha);
6227 set_current_state(TASK_INTERRUPTIBLE);
6228 } /* End of while(1) */
6229 __set_current_state(TASK_RUNNING);
6231 ql_dbg(ql_dbg_dpc, base_vha, 0x4011,
6232 "DPC handler exiting.\n");
6235 * Make sure that nobody tries to wake us up again.
6239 /* Cleanup any residual CTX SRBs. */
6240 qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
6246 qla2xxx_wake_dpc(struct scsi_qla_host *vha)
6248 struct qla_hw_data *ha = vha->hw;
6249 struct task_struct *t = ha->dpc_thread;
6251 if (!test_bit(UNLOADING, &vha->dpc_flags) && t)
6257 * Processes asynchronous reset.
6260 * ha = adapter block pointer.
6263 qla2x00_rst_aen(scsi_qla_host_t *vha)
6265 if (vha->flags.online && !vha->flags.reset_active &&
6266 !atomic_read(&vha->loop_down_timer) &&
6267 !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags))) {
6269 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
6272 * Issue marker command only when we are going to start
6275 vha->marker_needed = 1;
6276 } while (!atomic_read(&vha->loop_down_timer) &&
6277 (test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags)));
6281 /**************************************************************************
6287 * Context: Interrupt
6288 ***************************************************************************/
6290 qla2x00_timer(struct timer_list *t)
6292 scsi_qla_host_t *vha = from_timer(vha, t, timer);
6293 unsigned long cpu_flags = 0;
6298 struct qla_hw_data *ha = vha->hw;
6299 struct req_que *req;
6301 if (ha->flags.eeh_busy) {
6302 ql_dbg(ql_dbg_timer, vha, 0x6000,
6303 "EEH = %d, restarting timer.\n",
6304 ha->flags.eeh_busy);
6305 qla2x00_restart_timer(vha, WATCH_INTERVAL);
6310 * Hardware read to raise pending EEH errors during mailbox waits. If
6311 * the read returns -1 then disable the board.
6313 if (!pci_channel_offline(ha->pdev)) {
6314 pci_read_config_word(ha->pdev, PCI_VENDOR_ID, &w);
6315 qla2x00_check_reg16_for_disconnect(vha, w);
6318 /* Make sure qla82xx_watchdog is run only for physical port */
6319 if (!vha->vp_idx && IS_P3P_TYPE(ha)) {
6320 if (test_bit(ISP_QUIESCE_NEEDED, &vha->dpc_flags))
6323 qla82xx_watchdog(vha);
6324 else if (IS_QLA8044(ha))
6325 qla8044_watchdog(vha);
6328 if (!vha->vp_idx && IS_QLAFX00(ha))
6329 qlafx00_timer_routine(vha);
6331 /* Loop down handler. */
6332 if (atomic_read(&vha->loop_down_timer) > 0 &&
6333 !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)) &&
6334 !(test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags))
6335 && vha->flags.online) {
6337 if (atomic_read(&vha->loop_down_timer) ==
6338 vha->loop_down_abort_time) {
6340 ql_log(ql_log_info, vha, 0x6008,
6341 "Loop down - aborting the queues before time expires.\n");
6343 if (!IS_QLA2100(ha) && vha->link_down_timeout)
6344 atomic_set(&vha->loop_state, LOOP_DEAD);
6347 * Schedule an ISP abort to return any FCP2-device
6350 /* NPIV - scan physical port only */
6352 spin_lock_irqsave(&ha->hardware_lock,
6354 req = ha->req_q_map[0];
6356 index < req->num_outstanding_cmds;
6360 sp = req->outstanding_cmds[index];
6363 if (sp->cmd_type != TYPE_SRB)
6365 if (sp->type != SRB_SCSI_CMD)
6368 if (!(sfcp->flags & FCF_FCP2_DEVICE))
6372 set_bit(FCOE_CTX_RESET_NEEDED,
6375 set_bit(ISP_ABORT_NEEDED,
6379 spin_unlock_irqrestore(&ha->hardware_lock,
6385 /* if the loop has been down for 4 minutes, reinit adapter */
6386 if (atomic_dec_and_test(&vha->loop_down_timer) != 0) {
6387 if (!(vha->device_flags & DFLG_NO_CABLE)) {
6388 ql_log(ql_log_warn, vha, 0x6009,
6389 "Loop down - aborting ISP.\n");
6392 set_bit(FCOE_CTX_RESET_NEEDED,
6395 set_bit(ISP_ABORT_NEEDED,
6399 ql_dbg(ql_dbg_timer, vha, 0x600a,
6400 "Loop down - seconds remaining %d.\n",
6401 atomic_read(&vha->loop_down_timer));
6403 /* Check if beacon LED needs to be blinked for physical host only */
6404 if (!vha->vp_idx && (ha->beacon_blink_led == 1)) {
6405 /* There is no beacon_blink function for ISP82xx */
6406 if (!IS_P3P_TYPE(ha)) {
6407 set_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags);
6412 /* Process any deferred work. */
6413 if (!list_empty(&vha->work_list)) {
6414 unsigned long flags;
6417 spin_lock_irqsave(&vha->work_lock, flags);
6418 if (!test_and_set_bit(IOCB_WORK_ACTIVE, &vha->dpc_flags))
6420 spin_unlock_irqrestore(&vha->work_lock, flags);
6422 queue_work(vha->hw->wq, &vha->iocb_work);
6427 * see if the active AEN count has changed from what was last reported.
6430 atomic_read(&ha->nvme_active_aen_cnt) != ha->nvme_last_rptd_aen &&
6431 ha->zio_mode == QLA_ZIO_MODE_6) {
6432 ql_log(ql_log_info, vha, 0x3002,
6433 "nvme: Sched: Set ZIO exchange threshold to %d.\n",
6434 ha->nvme_last_rptd_aen);
6435 ha->nvme_last_rptd_aen = atomic_read(&ha->nvme_active_aen_cnt);
6436 set_bit(SET_ZIO_THRESHOLD_NEEDED, &vha->dpc_flags);
6440 /* Schedule the DPC routine if needed */
6441 if ((test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) ||
6442 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags) ||
6443 test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags) ||
6445 test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags) ||
6446 test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags) ||
6447 test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags) ||
6448 test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags) ||
6449 test_bit(VP_DPC_NEEDED, &vha->dpc_flags) ||
6450 test_bit(RELOGIN_NEEDED, &vha->dpc_flags))) {
6451 ql_dbg(ql_dbg_timer, vha, 0x600b,
6452 "isp_abort_needed=%d loop_resync_needed=%d "
6453 "fcport_update_needed=%d start_dpc=%d "
6454 "reset_marker_needed=%d",
6455 test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags),
6456 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags),
6457 test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags),
6459 test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags));
6460 ql_dbg(ql_dbg_timer, vha, 0x600c,
6461 "beacon_blink_needed=%d isp_unrecoverable=%d "
6462 "fcoe_ctx_reset_needed=%d vp_dpc_needed=%d "
6463 "relogin_needed=%d.\n",
6464 test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags),
6465 test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags),
6466 test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags),
6467 test_bit(VP_DPC_NEEDED, &vha->dpc_flags),
6468 test_bit(RELOGIN_NEEDED, &vha->dpc_flags));
6469 qla2xxx_wake_dpc(vha);
6472 qla2x00_restart_timer(vha, WATCH_INTERVAL);
6475 /* Firmware interface routines. */
6478 #define FW_ISP21XX 0
6479 #define FW_ISP22XX 1
6480 #define FW_ISP2300 2
6481 #define FW_ISP2322 3
6482 #define FW_ISP24XX 4
6483 #define FW_ISP25XX 5
6484 #define FW_ISP81XX 6
6485 #define FW_ISP82XX 7
6486 #define FW_ISP2031 8
6487 #define FW_ISP8031 9
6488 #define FW_ISP27XX 10
6490 #define FW_FILE_ISP21XX "/*(DEBLOBBED)*/"
6491 #define FW_FILE_ISP22XX "/*(DEBLOBBED)*/"
6492 #define FW_FILE_ISP2300 "/*(DEBLOBBED)*/"
6493 #define FW_FILE_ISP2322 "/*(DEBLOBBED)*/"
6494 #define FW_FILE_ISP24XX "/*(DEBLOBBED)*/"
6495 #define FW_FILE_ISP25XX "/*(DEBLOBBED)*/"
6496 #define FW_FILE_ISP81XX "/*(DEBLOBBED)*/"
6497 #define FW_FILE_ISP82XX "/*(DEBLOBBED)*/"
6498 #define FW_FILE_ISP2031 "/*(DEBLOBBED)*/"
6499 #define FW_FILE_ISP8031 "/*(DEBLOBBED)*/"
6500 #define FW_FILE_ISP27XX "/*(DEBLOBBED)*/"
6503 static DEFINE_MUTEX(qla_fw_lock);
6505 static struct fw_blob qla_fw_blobs[FW_BLOBS] = {
6506 { .name = FW_FILE_ISP21XX, .segs = { 0x1000, 0 }, },
6507 { .name = FW_FILE_ISP22XX, .segs = { 0x1000, 0 }, },
6508 { .name = FW_FILE_ISP2300, .segs = { 0x800, 0 }, },
6509 { .name = FW_FILE_ISP2322, .segs = { 0x800, 0x1c000, 0x1e000, 0 }, },
6510 { .name = FW_FILE_ISP24XX, },
6511 { .name = FW_FILE_ISP25XX, },
6512 { .name = FW_FILE_ISP81XX, },
6513 { .name = FW_FILE_ISP82XX, },
6514 { .name = FW_FILE_ISP2031, },
6515 { .name = FW_FILE_ISP8031, },
6516 { .name = FW_FILE_ISP27XX, },
6520 qla2x00_request_firmware(scsi_qla_host_t *vha)
6522 struct qla_hw_data *ha = vha->hw;
6523 struct fw_blob *blob;
6525 if (IS_QLA2100(ha)) {
6526 blob = &qla_fw_blobs[FW_ISP21XX];
6527 } else if (IS_QLA2200(ha)) {
6528 blob = &qla_fw_blobs[FW_ISP22XX];
6529 } else if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
6530 blob = &qla_fw_blobs[FW_ISP2300];
6531 } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) {
6532 blob = &qla_fw_blobs[FW_ISP2322];
6533 } else if (IS_QLA24XX_TYPE(ha)) {
6534 blob = &qla_fw_blobs[FW_ISP24XX];
6535 } else if (IS_QLA25XX(ha)) {
6536 blob = &qla_fw_blobs[FW_ISP25XX];
6537 } else if (IS_QLA81XX(ha)) {
6538 blob = &qla_fw_blobs[FW_ISP81XX];
6539 } else if (IS_QLA82XX(ha)) {
6540 blob = &qla_fw_blobs[FW_ISP82XX];
6541 } else if (IS_QLA2031(ha)) {
6542 blob = &qla_fw_blobs[FW_ISP2031];
6543 } else if (IS_QLA8031(ha)) {
6544 blob = &qla_fw_blobs[FW_ISP8031];
6545 } else if (IS_QLA27XX(ha)) {
6546 blob = &qla_fw_blobs[FW_ISP27XX];
6551 mutex_lock(&qla_fw_lock);
6555 if (reject_firmware(&blob->fw, blob->name, &ha->pdev->dev)) {
6556 ql_log(ql_log_warn, vha, 0x0063,
6557 "Failed to load firmware image (%s).\n", blob->name);
6564 mutex_unlock(&qla_fw_lock);
6569 qla2x00_release_firmware(void)
6573 mutex_lock(&qla_fw_lock);
6574 for (idx = 0; idx < FW_BLOBS; idx++)
6575 release_firmware(qla_fw_blobs[idx].fw);
6576 mutex_unlock(&qla_fw_lock);
6579 static pci_ers_result_t
6580 qla2xxx_pci_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
6582 scsi_qla_host_t *vha = pci_get_drvdata(pdev);
6583 struct qla_hw_data *ha = vha->hw;
6585 ql_dbg(ql_dbg_aer, vha, 0x9000,
6586 "PCI error detected, state %x.\n", state);
6588 if (!atomic_read(&pdev->enable_cnt)) {
6589 ql_log(ql_log_info, vha, 0xffff,
6590 "PCI device is disabled,state %x\n", state);
6591 return PCI_ERS_RESULT_NEED_RESET;
6595 case pci_channel_io_normal:
6596 ha->flags.eeh_busy = 0;
6597 if (ql2xmqsupport || ql2xnvmeenable) {
6598 set_bit(QPAIR_ONLINE_CHECK_NEEDED, &vha->dpc_flags);
6599 qla2xxx_wake_dpc(vha);
6601 return PCI_ERS_RESULT_CAN_RECOVER;
6602 case pci_channel_io_frozen:
6603 ha->flags.eeh_busy = 1;
6604 /* For ISP82XX complete any pending mailbox cmd */
6605 if (IS_QLA82XX(ha)) {
6606 ha->flags.isp82xx_fw_hung = 1;
6607 ql_dbg(ql_dbg_aer, vha, 0x9001, "Pci channel io frozen\n");
6608 qla82xx_clear_pending_mbx(vha);
6610 qla2x00_free_irqs(vha);
6611 pci_disable_device(pdev);
6612 /* Return back all IOs */
6613 qla2x00_abort_all_cmds(vha, DID_RESET << 16);
6614 if (ql2xmqsupport || ql2xnvmeenable) {
6615 set_bit(QPAIR_ONLINE_CHECK_NEEDED, &vha->dpc_flags);
6616 qla2xxx_wake_dpc(vha);
6618 return PCI_ERS_RESULT_NEED_RESET;
6619 case pci_channel_io_perm_failure:
6620 ha->flags.pci_channel_io_perm_failure = 1;
6621 qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
6622 if (ql2xmqsupport || ql2xnvmeenable) {
6623 set_bit(QPAIR_ONLINE_CHECK_NEEDED, &vha->dpc_flags);
6624 qla2xxx_wake_dpc(vha);
6626 return PCI_ERS_RESULT_DISCONNECT;
6628 return PCI_ERS_RESULT_NEED_RESET;
6631 static pci_ers_result_t
6632 qla2xxx_pci_mmio_enabled(struct pci_dev *pdev)
6634 int risc_paused = 0;
6636 unsigned long flags;
6637 scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
6638 struct qla_hw_data *ha = base_vha->hw;
6639 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
6640 struct device_reg_24xx __iomem *reg24 = &ha->iobase->isp24;
6643 return PCI_ERS_RESULT_RECOVERED;
6645 spin_lock_irqsave(&ha->hardware_lock, flags);
6646 if (IS_QLA2100(ha) || IS_QLA2200(ha)){
6647 stat = RD_REG_DWORD(®->hccr);
6648 if (stat & HCCR_RISC_PAUSE)
6650 } else if (IS_QLA23XX(ha)) {
6651 stat = RD_REG_DWORD(®->u.isp2300.host_status);
6652 if (stat & HSR_RISC_PAUSED)
6654 } else if (IS_FWI2_CAPABLE(ha)) {
6655 stat = RD_REG_DWORD(®24->host_status);
6656 if (stat & HSRX_RISC_PAUSED)
6659 spin_unlock_irqrestore(&ha->hardware_lock, flags);
6662 ql_log(ql_log_info, base_vha, 0x9003,
6663 "RISC paused -- mmio_enabled, Dumping firmware.\n");
6664 ha->isp_ops->fw_dump(base_vha, 0);
6666 return PCI_ERS_RESULT_NEED_RESET;
6668 return PCI_ERS_RESULT_RECOVERED;
6672 qla82xx_error_recovery(scsi_qla_host_t *base_vha)
6674 uint32_t rval = QLA_FUNCTION_FAILED;
6675 uint32_t drv_active = 0;
6676 struct qla_hw_data *ha = base_vha->hw;
6678 struct pci_dev *other_pdev = NULL;
6680 ql_dbg(ql_dbg_aer, base_vha, 0x9006,
6681 "Entered %s.\n", __func__);
6683 set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
6685 if (base_vha->flags.online) {
6686 /* Abort all outstanding commands,
6687 * so as to be requeued later */
6688 qla2x00_abort_isp_cleanup(base_vha);
6692 fn = PCI_FUNC(ha->pdev->devfn);
6695 ql_dbg(ql_dbg_aer, base_vha, 0x9007,
6696 "Finding pci device at function = 0x%x.\n", fn);
6698 pci_get_domain_bus_and_slot(pci_domain_nr(ha->pdev->bus),
6699 ha->pdev->bus->number, PCI_DEVFN(PCI_SLOT(ha->pdev->devfn),
6704 if (atomic_read(&other_pdev->enable_cnt)) {
6705 ql_dbg(ql_dbg_aer, base_vha, 0x9008,
6706 "Found PCI func available and enable at 0x%x.\n",
6708 pci_dev_put(other_pdev);
6711 pci_dev_put(other_pdev);
6716 ql_dbg(ql_dbg_aer, base_vha, 0x9009,
6717 "This devfn is reset owner = 0x%x.\n",
6719 qla82xx_idc_lock(ha);
6721 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
6722 QLA8XXX_DEV_INITIALIZING);
6724 qla82xx_wr_32(ha, QLA82XX_CRB_DRV_IDC_VERSION,
6725 QLA82XX_IDC_VERSION);
6727 drv_active = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_ACTIVE);
6728 ql_dbg(ql_dbg_aer, base_vha, 0x900a,
6729 "drv_active = 0x%x.\n", drv_active);
6731 qla82xx_idc_unlock(ha);
6732 /* Reset if device is not already reset
6733 * drv_active would be 0 if a reset has already been done
6736 rval = qla82xx_start_firmware(base_vha);
6739 qla82xx_idc_lock(ha);
6741 if (rval != QLA_SUCCESS) {
6742 ql_log(ql_log_info, base_vha, 0x900b,
6743 "HW State: FAILED.\n");
6744 qla82xx_clear_drv_active(ha);
6745 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
6746 QLA8XXX_DEV_FAILED);
6748 ql_log(ql_log_info, base_vha, 0x900c,
6749 "HW State: READY.\n");
6750 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
6752 qla82xx_idc_unlock(ha);
6753 ha->flags.isp82xx_fw_hung = 0;
6754 rval = qla82xx_restart_isp(base_vha);
6755 qla82xx_idc_lock(ha);
6756 /* Clear driver state register */
6757 qla82xx_wr_32(ha, QLA82XX_CRB_DRV_STATE, 0);
6758 qla82xx_set_drv_active(base_vha);
6760 qla82xx_idc_unlock(ha);
6762 ql_dbg(ql_dbg_aer, base_vha, 0x900d,
6763 "This devfn is not reset owner = 0x%x.\n",
6765 if ((qla82xx_rd_32(ha, QLA82XX_CRB_DEV_STATE) ==
6766 QLA8XXX_DEV_READY)) {
6767 ha->flags.isp82xx_fw_hung = 0;
6768 rval = qla82xx_restart_isp(base_vha);
6769 qla82xx_idc_lock(ha);
6770 qla82xx_set_drv_active(base_vha);
6771 qla82xx_idc_unlock(ha);
6774 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
6779 static pci_ers_result_t
6780 qla2xxx_pci_slot_reset(struct pci_dev *pdev)
6782 pci_ers_result_t ret = PCI_ERS_RESULT_DISCONNECT;
6783 scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
6784 struct qla_hw_data *ha = base_vha->hw;
6785 struct rsp_que *rsp;
6786 int rc, retries = 10;
6788 ql_dbg(ql_dbg_aer, base_vha, 0x9004,
6791 /* Workaround: qla2xxx driver which access hardware earlier
6792 * needs error state to be pci_channel_io_online.
6793 * Otherwise mailbox command timesout.
6795 pdev->error_state = pci_channel_io_normal;
6797 pci_restore_state(pdev);
6799 /* pci_restore_state() clears the saved_state flag of the device
6800 * save restored state which resets saved_state flag
6802 pci_save_state(pdev);
6805 rc = pci_enable_device_mem(pdev);
6807 rc = pci_enable_device(pdev);
6810 ql_log(ql_log_warn, base_vha, 0x9005,
6811 "Can't re-enable PCI device after reset.\n");
6812 goto exit_slot_reset;
6815 rsp = ha->rsp_q_map[0];
6816 if (qla2x00_request_irqs(ha, rsp))
6817 goto exit_slot_reset;
6819 if (ha->isp_ops->pci_config(base_vha))
6820 goto exit_slot_reset;
6822 if (IS_QLA82XX(ha)) {
6823 if (qla82xx_error_recovery(base_vha) == QLA_SUCCESS) {
6824 ret = PCI_ERS_RESULT_RECOVERED;
6825 goto exit_slot_reset;
6827 goto exit_slot_reset;
6830 while (ha->flags.mbox_busy && retries--)
6833 set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
6834 if (ha->isp_ops->abort_isp(base_vha) == QLA_SUCCESS)
6835 ret = PCI_ERS_RESULT_RECOVERED;
6836 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
6840 ql_dbg(ql_dbg_aer, base_vha, 0x900e,
6841 "slot_reset return %x.\n", ret);
6847 qla2xxx_pci_resume(struct pci_dev *pdev)
6849 scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
6850 struct qla_hw_data *ha = base_vha->hw;
6853 ql_dbg(ql_dbg_aer, base_vha, 0x900f,
6856 ret = qla2x00_wait_for_hba_online(base_vha);
6857 if (ret != QLA_SUCCESS) {
6858 ql_log(ql_log_fatal, base_vha, 0x9002,
6859 "The device failed to resume I/O from slot/link_reset.\n");
6862 pci_cleanup_aer_uncorrect_error_status(pdev);
6864 ha->flags.eeh_busy = 0;
6867 static int qla2xxx_map_queues(struct Scsi_Host *shost)
6870 scsi_qla_host_t *vha = (scsi_qla_host_t *)shost->hostdata;
6872 if (USER_CTRL_IRQ(vha->hw))
6873 rc = blk_mq_map_queues(&shost->tag_set);
6875 rc = blk_mq_pci_map_queues(&shost->tag_set, vha->hw->pdev, 0);
6879 static const struct pci_error_handlers qla2xxx_err_handler = {
6880 .error_detected = qla2xxx_pci_error_detected,
6881 .mmio_enabled = qla2xxx_pci_mmio_enabled,
6882 .slot_reset = qla2xxx_pci_slot_reset,
6883 .resume = qla2xxx_pci_resume,
6886 static struct pci_device_id qla2xxx_pci_tbl[] = {
6887 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2100) },
6888 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2200) },
6889 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2300) },
6890 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2312) },
6891 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2322) },
6892 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6312) },
6893 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6322) },
6894 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2422) },
6895 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2432) },
6896 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8432) },
6897 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5422) },
6898 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5432) },
6899 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2532) },
6900 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2031) },
6901 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8001) },
6902 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8021) },
6903 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8031) },
6904 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISPF001) },
6905 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8044) },
6906 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2071) },
6907 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2271) },
6908 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2261) },
6911 MODULE_DEVICE_TABLE(pci, qla2xxx_pci_tbl);
6913 static struct pci_driver qla2xxx_pci_driver = {
6914 .name = QLA2XXX_DRIVER_NAME,
6916 .owner = THIS_MODULE,
6918 .id_table = qla2xxx_pci_tbl,
6919 .probe = qla2x00_probe_one,
6920 .remove = qla2x00_remove_one,
6921 .shutdown = qla2x00_shutdown,
6922 .err_handler = &qla2xxx_err_handler,
6925 static const struct file_operations apidev_fops = {
6926 .owner = THIS_MODULE,
6927 .llseek = noop_llseek,
6931 * qla2x00_module_init - Module initialization.
6934 qla2x00_module_init(void)
6938 /* Allocate cache for SRBs. */
6939 srb_cachep = kmem_cache_create("qla2xxx_srbs", sizeof(srb_t), 0,
6940 SLAB_HWCACHE_ALIGN, NULL);
6941 if (srb_cachep == NULL) {
6942 ql_log(ql_log_fatal, NULL, 0x0001,
6943 "Unable to allocate SRB cache...Failing load!.\n");
6947 /* Initialize target kmem_cache and mem_pools */
6951 } else if (ret > 0) {
6953 * If initiator mode is explictly disabled by qlt_init(),
6954 * prevent scsi_transport_fc.c:fc_scsi_scan_rport() from
6955 * performing scsi_scan_target() during LOOP UP event.
6957 qla2xxx_transport_functions.disable_target_scan = 1;
6958 qla2xxx_transport_vport_functions.disable_target_scan = 1;
6961 /* Derive version string. */
6962 strcpy(qla2x00_version_str, QLA2XXX_VERSION);
6963 if (ql2xextended_error_logging)
6964 strcat(qla2x00_version_str, "-debug");
6965 if (ql2xextended_error_logging == 1)
6966 ql2xextended_error_logging = QL_DBG_DEFAULT1_MASK;
6968 qla2xxx_transport_template =
6969 fc_attach_transport(&qla2xxx_transport_functions);
6970 if (!qla2xxx_transport_template) {
6971 ql_log(ql_log_fatal, NULL, 0x0002,
6972 "fc_attach_transport failed...Failing load!.\n");
6977 apidev_major = register_chrdev(0, QLA2XXX_APIDEV, &apidev_fops);
6978 if (apidev_major < 0) {
6979 ql_log(ql_log_fatal, NULL, 0x0003,
6980 "Unable to register char device %s.\n", QLA2XXX_APIDEV);
6983 qla2xxx_transport_vport_template =
6984 fc_attach_transport(&qla2xxx_transport_vport_functions);
6985 if (!qla2xxx_transport_vport_template) {
6986 ql_log(ql_log_fatal, NULL, 0x0004,
6987 "fc_attach_transport vport failed...Failing load!.\n");
6991 ql_log(ql_log_info, NULL, 0x0005,
6992 "QLogic Fibre Channel HBA Driver: %s.\n",
6993 qla2x00_version_str);
6994 ret = pci_register_driver(&qla2xxx_pci_driver);
6996 ql_log(ql_log_fatal, NULL, 0x0006,
6997 "pci_register_driver failed...ret=%d Failing load!.\n",
6999 goto release_vport_transport;
7003 release_vport_transport:
7004 fc_release_transport(qla2xxx_transport_vport_template);
7007 if (apidev_major >= 0)
7008 unregister_chrdev(apidev_major, QLA2XXX_APIDEV);
7009 fc_release_transport(qla2xxx_transport_template);
7015 kmem_cache_destroy(srb_cachep);
7020 * qla2x00_module_exit - Module cleanup.
7023 qla2x00_module_exit(void)
7025 unregister_chrdev(apidev_major, QLA2XXX_APIDEV);
7026 pci_unregister_driver(&qla2xxx_pci_driver);
7027 qla2x00_release_firmware();
7028 kmem_cache_destroy(srb_cachep);
7031 kmem_cache_destroy(ctx_cachep);
7032 fc_release_transport(qla2xxx_transport_template);
7033 fc_release_transport(qla2xxx_transport_vport_template);
7036 module_init(qla2x00_module_init);
7037 module_exit(qla2x00_module_exit);
7039 MODULE_AUTHOR("QLogic Corporation");
7040 MODULE_DESCRIPTION("QLogic Fibre Channel HBA Driver");
7041 MODULE_LICENSE("GPL");
7042 MODULE_VERSION(QLA2XXX_VERSION);