2 * QLogic Fibre Channel HBA Driver
3 * Copyright (c) 2003-2014 QLogic Corporation
5 * See LICENSE.qla2xxx for copyright and licensing details.
8 #include "qla_target.h"
10 #include <linux/delay.h>
11 #include <linux/gfp.h>
13 static struct mb_cmd_name {
17 {MBC_GET_PORT_DATABASE, "GPDB"},
18 {MBC_GET_ID_LIST, "GIDList"},
19 {MBC_GET_LINK_PRIV_STATS, "Stats"},
20 {MBC_GET_RESOURCE_COUNTS, "ResCnt"},
23 static const char *mb_to_str(uint16_t cmd)
26 struct mb_cmd_name *e;
28 for (i = 0; i < ARRAY_SIZE(mb_str); i++) {
36 static struct rom_cmd {
40 { MBC_EXECUTE_FIRMWARE },
41 { MBC_READ_RAM_WORD },
42 { MBC_MAILBOX_REGISTER_TEST },
43 { MBC_VERIFY_CHECKSUM },
44 { MBC_GET_FIRMWARE_VERSION },
45 { MBC_LOAD_RISC_RAM },
46 { MBC_DUMP_RISC_RAM },
47 { MBC_LOAD_RISC_RAM_EXTENDED },
48 { MBC_DUMP_RISC_RAM_EXTENDED },
49 { MBC_WRITE_RAM_WORD_EXTENDED },
50 { MBC_READ_RAM_EXTENDED },
51 { MBC_GET_RESOURCE_COUNTS },
52 { MBC_SET_FIRMWARE_OPTION },
53 { MBC_MID_INITIALIZE_FIRMWARE },
54 { MBC_GET_FIRMWARE_STATE },
55 { MBC_GET_MEM_OFFLOAD_CNTRL_STAT },
56 { MBC_GET_RETRY_COUNT },
57 { MBC_TRACE_CONTROL },
58 { MBC_INITIALIZE_MULTIQ },
59 { MBC_IOCB_COMMAND_A64 },
60 { MBC_GET_ADAPTER_LOOP_ID },
62 { MBC_GET_RNID_PARAMS },
65 static int is_rom_cmd(uint16_t cmd)
70 for (i = 0; i < ARRAY_SIZE(rom_cmds); i++) {
80 * qla2x00_mailbox_command
81 * Issue mailbox command and waits for completion.
84 * ha = adapter block pointer.
85 * mcp = driver internal mbx struct pointer.
88 * mb[MAX_MAILBOX_REGISTER_COUNT] = returned mailbox data.
91 * 0 : QLA_SUCCESS = cmd performed success
92 * 1 : QLA_FUNCTION_FAILED (error encountered)
93 * 6 : QLA_FUNCTION_TIMEOUT (timeout condition encountered)
99 qla2x00_mailbox_command(scsi_qla_host_t *vha, mbx_cmd_t *mcp)
102 unsigned long flags = 0;
104 uint8_t abort_active;
106 uint16_t command = 0;
108 uint16_t __iomem *optr;
111 unsigned long wait_time;
112 struct qla_hw_data *ha = vha->hw;
113 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
117 ql_dbg(ql_dbg_mbx, vha, 0x1000, "Entered %s.\n", __func__);
119 if (ha->pdev->error_state > pci_channel_io_frozen) {
120 ql_log(ql_log_warn, vha, 0x1001,
121 "error_state is greater than pci_channel_io_frozen, "
123 return QLA_FUNCTION_TIMEOUT;
126 if (vha->device_flags & DFLG_DEV_FAILED) {
127 ql_log(ql_log_warn, vha, 0x1002,
128 "Device in failed state, exiting.\n");
129 return QLA_FUNCTION_TIMEOUT;
132 /* if PCI error, then avoid mbx processing.*/
133 if (test_bit(PFLG_DISCONNECTED, &base_vha->dpc_flags) &&
134 test_bit(UNLOADING, &base_vha->dpc_flags)) {
135 ql_log(ql_log_warn, vha, 0xd04e,
136 "PCI error, exiting.\n");
137 return QLA_FUNCTION_TIMEOUT;
141 io_lock_on = base_vha->flags.init_done;
144 abort_active = test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
145 chip_reset = ha->chip_reset;
147 if (ha->flags.pci_channel_io_perm_failure) {
148 ql_log(ql_log_warn, vha, 0x1003,
149 "Perm failure on EEH timeout MBX, exiting.\n");
150 return QLA_FUNCTION_TIMEOUT;
153 if (IS_P3P_TYPE(ha) && ha->flags.isp82xx_fw_hung) {
154 /* Setting Link-Down error */
155 mcp->mb[0] = MBS_LINK_DOWN_ERROR;
156 ql_log(ql_log_warn, vha, 0x1004,
157 "FW hung = %d.\n", ha->flags.isp82xx_fw_hung);
158 return QLA_FUNCTION_TIMEOUT;
161 /* check if ISP abort is active and return cmd with timeout */
162 if ((test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
163 test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
164 test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) &&
165 !is_rom_cmd(mcp->mb[0])) {
166 ql_log(ql_log_info, vha, 0x1005,
167 "Cmd 0x%x aborted with timeout since ISP Abort is pending\n",
169 return QLA_FUNCTION_TIMEOUT;
172 atomic_inc(&ha->num_pend_mbx_stage1);
174 * Wait for active mailbox commands to finish by waiting at most tov
175 * seconds. This is to serialize actual issuing of mailbox cmds during
176 * non ISP abort time.
178 if (!wait_for_completion_timeout(&ha->mbx_cmd_comp, mcp->tov * HZ)) {
179 /* Timeout occurred. Return error. */
180 ql_log(ql_log_warn, vha, 0xd035,
181 "Cmd access timeout, cmd=0x%x, Exiting.\n",
183 atomic_dec(&ha->num_pend_mbx_stage1);
184 return QLA_FUNCTION_TIMEOUT;
186 atomic_dec(&ha->num_pend_mbx_stage1);
187 if (ha->flags.purge_mbox || chip_reset != ha->chip_reset) {
192 ha->flags.mbox_busy = 1;
193 /* Save mailbox command for debug */
196 ql_dbg(ql_dbg_mbx, vha, 0x1006,
197 "Prepare to issue mbox cmd=0x%x.\n", mcp->mb[0]);
199 spin_lock_irqsave(&ha->hardware_lock, flags);
201 if (ha->flags.purge_mbox || chip_reset != ha->chip_reset) {
203 ha->flags.mbox_busy = 0;
204 spin_unlock_irqrestore(&ha->hardware_lock, flags);
208 /* Load mailbox registers. */
210 optr = (uint16_t __iomem *)®->isp82.mailbox_in[0];
211 else if (IS_FWI2_CAPABLE(ha) && !(IS_P3P_TYPE(ha)))
212 optr = (uint16_t __iomem *)®->isp24.mailbox0;
214 optr = (uint16_t __iomem *)MAILBOX_REG(ha, ®->isp, 0);
217 command = mcp->mb[0];
218 mboxes = mcp->out_mb;
220 ql_dbg(ql_dbg_mbx, vha, 0x1111,
221 "Mailbox registers (OUT):\n");
222 for (cnt = 0; cnt < ha->mbx_count; cnt++) {
223 if (IS_QLA2200(ha) && cnt == 8)
225 (uint16_t __iomem *)MAILBOX_REG(ha, ®->isp, 8);
226 if (mboxes & BIT_0) {
227 ql_dbg(ql_dbg_mbx, vha, 0x1112,
228 "mbox[%d]<-0x%04x\n", cnt, *iptr);
229 WRT_REG_WORD(optr, *iptr);
237 ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1117,
238 "I/O Address = %p.\n", optr);
240 /* Issue set host interrupt command to send cmd out. */
241 ha->flags.mbox_int = 0;
242 clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);
244 /* Unlock mbx registers and wait for interrupt */
245 ql_dbg(ql_dbg_mbx, vha, 0x100f,
246 "Going to unlock irq & waiting for interrupts. "
247 "jiffies=%lx.\n", jiffies);
249 /* Wait for mbx cmd completion until timeout */
250 atomic_inc(&ha->num_pend_mbx_stage2);
251 if ((!abort_active && io_lock_on) || IS_NOPOLLING_TYPE(ha)) {
252 set_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags);
254 if (IS_P3P_TYPE(ha)) {
255 if (RD_REG_DWORD(®->isp82.hint) &
256 HINT_MBX_INT_PENDING) {
257 spin_unlock_irqrestore(&ha->hardware_lock,
259 ha->flags.mbox_busy = 0;
260 atomic_dec(&ha->num_pend_mbx_stage2);
261 ql_dbg(ql_dbg_mbx, vha, 0x1010,
262 "Pending mailbox timeout, exiting.\n");
263 rval = QLA_FUNCTION_TIMEOUT;
266 WRT_REG_DWORD(®->isp82.hint, HINT_MBX_INT_PENDING);
267 } else if (IS_FWI2_CAPABLE(ha))
268 WRT_REG_DWORD(®->isp24.hccr, HCCRX_SET_HOST_INT);
270 WRT_REG_WORD(®->isp.hccr, HCCR_SET_HOST_INT);
271 spin_unlock_irqrestore(&ha->hardware_lock, flags);
274 atomic_inc(&ha->num_pend_mbx_stage3);
275 if (!wait_for_completion_timeout(&ha->mbx_intr_comp,
277 ql_dbg(ql_dbg_mbx, vha, 0x117a,
278 "cmd=%x Timeout.\n", command);
279 spin_lock_irqsave(&ha->hardware_lock, flags);
280 clear_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags);
281 spin_unlock_irqrestore(&ha->hardware_lock, flags);
283 } else if (ha->flags.purge_mbox ||
284 chip_reset != ha->chip_reset) {
285 ha->flags.mbox_busy = 0;
286 atomic_dec(&ha->num_pend_mbx_stage2);
287 atomic_dec(&ha->num_pend_mbx_stage3);
291 atomic_dec(&ha->num_pend_mbx_stage3);
293 if (time_after(jiffies, wait_time + 5 * HZ))
294 ql_log(ql_log_warn, vha, 0x1015, "cmd=0x%x, waited %d msecs\n",
295 command, jiffies_to_msecs(jiffies - wait_time));
297 ql_dbg(ql_dbg_mbx, vha, 0x1011,
298 "Cmd=%x Polling Mode.\n", command);
300 if (IS_P3P_TYPE(ha)) {
301 if (RD_REG_DWORD(®->isp82.hint) &
302 HINT_MBX_INT_PENDING) {
303 spin_unlock_irqrestore(&ha->hardware_lock,
305 ha->flags.mbox_busy = 0;
306 atomic_dec(&ha->num_pend_mbx_stage2);
307 ql_dbg(ql_dbg_mbx, vha, 0x1012,
308 "Pending mailbox timeout, exiting.\n");
309 rval = QLA_FUNCTION_TIMEOUT;
312 WRT_REG_DWORD(®->isp82.hint, HINT_MBX_INT_PENDING);
313 } else if (IS_FWI2_CAPABLE(ha))
314 WRT_REG_DWORD(®->isp24.hccr, HCCRX_SET_HOST_INT);
316 WRT_REG_WORD(®->isp.hccr, HCCR_SET_HOST_INT);
317 spin_unlock_irqrestore(&ha->hardware_lock, flags);
319 wait_time = jiffies + mcp->tov * HZ; /* wait at most tov secs */
320 while (!ha->flags.mbox_int) {
321 if (ha->flags.purge_mbox ||
322 chip_reset != ha->chip_reset) {
323 ha->flags.mbox_busy = 0;
324 atomic_dec(&ha->num_pend_mbx_stage2);
329 if (time_after(jiffies, wait_time))
332 /* Check for pending interrupts. */
333 qla2x00_poll(ha->rsp_q_map[0]);
335 if (!ha->flags.mbox_int &&
337 command == MBC_LOAD_RISC_RAM_EXTENDED))
340 ql_dbg(ql_dbg_mbx, vha, 0x1013,
342 (uint)((jiffies - (wait_time - (mcp->tov * HZ)))/HZ));
344 atomic_dec(&ha->num_pend_mbx_stage2);
346 /* Check whether we timed out */
347 if (ha->flags.mbox_int) {
350 ql_dbg(ql_dbg_mbx, vha, 0x1014,
351 "Cmd=%x completed.\n", command);
353 /* Got interrupt. Clear the flag. */
354 ha->flags.mbox_int = 0;
355 clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);
357 if (IS_P3P_TYPE(ha) && ha->flags.isp82xx_fw_hung) {
358 ha->flags.mbox_busy = 0;
359 /* Setting Link-Down error */
360 mcp->mb[0] = MBS_LINK_DOWN_ERROR;
362 rval = QLA_FUNCTION_FAILED;
363 ql_log(ql_log_warn, vha, 0xd048,
364 "FW hung = %d.\n", ha->flags.isp82xx_fw_hung);
368 if (ha->mailbox_out[0] != MBS_COMMAND_COMPLETE)
369 rval = QLA_FUNCTION_FAILED;
371 /* Load return mailbox registers. */
373 iptr = (uint16_t *)&ha->mailbox_out[0];
376 ql_dbg(ql_dbg_mbx, vha, 0x1113,
377 "Mailbox registers (IN):\n");
378 for (cnt = 0; cnt < ha->mbx_count; cnt++) {
379 if (mboxes & BIT_0) {
381 ql_dbg(ql_dbg_mbx, vha, 0x1114,
382 "mbox[%d]->0x%04x\n", cnt, *iptr2);
392 uint32_t ictrl, host_status, hccr;
395 if (IS_FWI2_CAPABLE(ha)) {
396 mb[0] = RD_REG_WORD(®->isp24.mailbox0);
397 mb[1] = RD_REG_WORD(®->isp24.mailbox1);
398 mb[2] = RD_REG_WORD(®->isp24.mailbox2);
399 mb[3] = RD_REG_WORD(®->isp24.mailbox3);
400 mb[7] = RD_REG_WORD(®->isp24.mailbox7);
401 ictrl = RD_REG_DWORD(®->isp24.ictrl);
402 host_status = RD_REG_DWORD(®->isp24.host_status);
403 hccr = RD_REG_DWORD(®->isp24.hccr);
405 ql_log(ql_log_warn, vha, 0xd04c,
406 "MBX Command timeout for cmd %x, iocontrol=%x jiffies=%lx "
407 "mb[0-3]=[0x%x 0x%x 0x%x 0x%x] mb7 0x%x host_status 0x%x hccr 0x%x\n",
408 command, ictrl, jiffies, mb[0], mb[1], mb[2], mb[3],
409 mb[7], host_status, hccr);
412 mb[0] = RD_MAILBOX_REG(ha, ®->isp, 0);
413 ictrl = RD_REG_WORD(®->isp.ictrl);
414 ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1119,
415 "MBX Command timeout for cmd %x, iocontrol=%x jiffies=%lx "
416 "mb[0]=0x%x\n", command, ictrl, jiffies, mb[0]);
418 ql_dump_regs(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1019);
420 /* Capture FW dump only, if PCI device active */
421 if (!pci_channel_offline(vha->hw->pdev)) {
422 pci_read_config_word(ha->pdev, PCI_VENDOR_ID, &w);
423 if (w == 0xffff || ictrl == 0xffffffff ||
424 (chip_reset != ha->chip_reset)) {
425 /* This is special case if there is unload
426 * of driver happening and if PCI device go
427 * into bad state due to PCI error condition
428 * then only PCI ERR flag would be set.
429 * we will do premature exit for above case.
431 ha->flags.mbox_busy = 0;
432 rval = QLA_FUNCTION_TIMEOUT;
436 /* Attempt to capture firmware dump for further
437 * anallysis of the current formware state. we do not
438 * need to do this if we are intentionally generating
441 if (mcp->mb[0] != MBC_GEN_SYSTEM_ERROR)
442 ha->isp_ops->fw_dump(vha, 0);
443 rval = QLA_FUNCTION_TIMEOUT;
447 ha->flags.mbox_busy = 0;
452 if ((abort_active || !io_lock_on) && !IS_NOPOLLING_TYPE(ha)) {
453 ql_dbg(ql_dbg_mbx, vha, 0x101a,
454 "Checking for additional resp interrupt.\n");
456 /* polling mode for non isp_abort commands. */
457 qla2x00_poll(ha->rsp_q_map[0]);
460 if (rval == QLA_FUNCTION_TIMEOUT &&
461 mcp->mb[0] != MBC_GEN_SYSTEM_ERROR) {
462 if (!io_lock_on || (mcp->flags & IOCTL_CMD) ||
463 ha->flags.eeh_busy) {
464 /* not in dpc. schedule it for dpc to take over. */
465 ql_dbg(ql_dbg_mbx, vha, 0x101b,
466 "Timeout, schedule isp_abort_needed.\n");
468 if (!test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) &&
469 !test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags) &&
470 !test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
471 if (IS_QLA82XX(ha)) {
472 ql_dbg(ql_dbg_mbx, vha, 0x112a,
473 "disabling pause transmit on port "
476 QLA82XX_CRB_NIU + 0x98,
477 CRB_NIU_XG_PAUSE_CTL_P0|
478 CRB_NIU_XG_PAUSE_CTL_P1);
480 ql_log(ql_log_info, base_vha, 0x101c,
481 "Mailbox cmd timeout occurred, cmd=0x%x, "
482 "mb[0]=0x%x, eeh_busy=0x%x. Scheduling ISP "
483 "abort.\n", command, mcp->mb[0],
485 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
486 qla2xxx_wake_dpc(vha);
488 } else if (current == ha->dpc_thread) {
489 /* call abort directly since we are in the DPC thread */
490 ql_dbg(ql_dbg_mbx, vha, 0x101d,
491 "Timeout, calling abort_isp.\n");
493 if (!test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) &&
494 !test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags) &&
495 !test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
496 if (IS_QLA82XX(ha)) {
497 ql_dbg(ql_dbg_mbx, vha, 0x112b,
498 "disabling pause transmit on port "
501 QLA82XX_CRB_NIU + 0x98,
502 CRB_NIU_XG_PAUSE_CTL_P0|
503 CRB_NIU_XG_PAUSE_CTL_P1);
505 ql_log(ql_log_info, base_vha, 0x101e,
506 "Mailbox cmd timeout occurred, cmd=0x%x, "
507 "mb[0]=0x%x. Scheduling ISP abort ",
508 command, mcp->mb[0]);
509 set_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags);
510 clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
511 /* Allow next mbx cmd to come in. */
512 complete(&ha->mbx_cmd_comp);
513 if (ha->isp_ops->abort_isp(vha)) {
514 /* Failed. retry later. */
515 set_bit(ISP_ABORT_NEEDED,
518 clear_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags);
519 ql_dbg(ql_dbg_mbx, vha, 0x101f,
520 "Finished abort_isp.\n");
527 /* Allow next mbx cmd to come in. */
528 complete(&ha->mbx_cmd_comp);
531 if (rval == QLA_ABORTED) {
532 ql_log(ql_log_info, vha, 0xd035,
533 "Chip Reset in progress. Purging Mbox cmd=0x%x.\n",
536 if (ql2xextended_error_logging & (ql_dbg_disc|ql_dbg_mbx)) {
537 pr_warn("%s [%s]-%04x:%ld: **** Failed", QL_MSGHDR,
538 dev_name(&ha->pdev->dev), 0x1020+0x800,
542 for (i = 0; i < ha->mbx_count && cnt; i++, mboxes >>= 1)
543 if (mboxes & BIT_0) {
544 printk(" mb[%u]=%x", i, mcp->mb[i]);
547 pr_warn(" cmd=%x ****\n", command);
549 if (IS_FWI2_CAPABLE(ha) && !(IS_P3P_TYPE(ha))) {
550 ql_dbg(ql_dbg_mbx, vha, 0x1198,
551 "host_status=%#x intr_ctrl=%#x intr_status=%#x\n",
552 RD_REG_DWORD(®->isp24.host_status),
553 RD_REG_DWORD(®->isp24.ictrl),
554 RD_REG_DWORD(®->isp24.istatus));
556 ql_dbg(ql_dbg_mbx, vha, 0x1206,
557 "ctrl_status=%#x ictrl=%#x istatus=%#x\n",
558 RD_REG_WORD(®->isp.ctrl_status),
559 RD_REG_WORD(®->isp.ictrl),
560 RD_REG_WORD(®->isp.istatus));
563 ql_dbg(ql_dbg_mbx, base_vha, 0x1021, "Done %s.\n", __func__);
570 qla2x00_load_ram(scsi_qla_host_t *vha, dma_addr_t req_dma, uint32_t risc_addr,
571 uint32_t risc_code_size)
574 struct qla_hw_data *ha = vha->hw;
576 mbx_cmd_t *mcp = &mc;
578 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1022,
579 "Entered %s.\n", __func__);
581 if (MSW(risc_addr) || IS_FWI2_CAPABLE(ha)) {
582 mcp->mb[0] = MBC_LOAD_RISC_RAM_EXTENDED;
583 mcp->mb[8] = MSW(risc_addr);
584 mcp->out_mb = MBX_8|MBX_0;
586 mcp->mb[0] = MBC_LOAD_RISC_RAM;
589 mcp->mb[1] = LSW(risc_addr);
590 mcp->mb[2] = MSW(req_dma);
591 mcp->mb[3] = LSW(req_dma);
592 mcp->mb[6] = MSW(MSD(req_dma));
593 mcp->mb[7] = LSW(MSD(req_dma));
594 mcp->out_mb |= MBX_7|MBX_6|MBX_3|MBX_2|MBX_1;
595 if (IS_FWI2_CAPABLE(ha)) {
596 mcp->mb[4] = MSW(risc_code_size);
597 mcp->mb[5] = LSW(risc_code_size);
598 mcp->out_mb |= MBX_5|MBX_4;
600 mcp->mb[4] = LSW(risc_code_size);
601 mcp->out_mb |= MBX_4;
605 mcp->tov = MBX_TOV_SECONDS;
607 rval = qla2x00_mailbox_command(vha, mcp);
609 if (rval != QLA_SUCCESS) {
610 ql_dbg(ql_dbg_mbx, vha, 0x1023,
611 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
613 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1024,
614 "Done %s.\n", __func__);
620 #define EXTENDED_BB_CREDITS BIT_0
621 #define NVME_ENABLE_FLAG BIT_3
622 static inline uint16_t qla25xx_set_sfp_lr_dist(struct qla_hw_data *ha)
624 uint16_t mb4 = BIT_0;
626 if (IS_QLA83XX(ha) || IS_QLA27XX(ha))
627 mb4 |= ha->long_range_distance << LR_DIST_FW_POS;
632 static inline uint16_t qla25xx_set_nvr_lr_dist(struct qla_hw_data *ha)
634 uint16_t mb4 = BIT_0;
636 if (IS_QLA83XX(ha) || IS_QLA27XX(ha)) {
637 struct nvram_81xx *nv = ha->nvram;
639 mb4 |= LR_DIST_FW_FIELD(nv->enhanced_features);
647 * Start adapter firmware.
650 * ha = adapter block pointer.
651 * TARGET_QUEUE_LOCK must be released.
652 * ADAPTER_STATE_LOCK must be released.
655 * qla2x00 local function return status code.
661 qla2x00_execute_fw(scsi_qla_host_t *vha, uint32_t risc_addr)
664 struct qla_hw_data *ha = vha->hw;
666 mbx_cmd_t *mcp = &mc;
668 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1025,
669 "Entered %s.\n", __func__);
671 mcp->mb[0] = MBC_EXECUTE_FIRMWARE;
674 if (IS_FWI2_CAPABLE(ha)) {
675 mcp->mb[1] = MSW(risc_addr);
676 mcp->mb[2] = LSW(risc_addr);
680 ha->flags.using_lr_setting = 0;
681 if (IS_QLA25XX(ha) || IS_QLA81XX(ha) || IS_QLA83XX(ha) ||
683 if (ql2xautodetectsfp) {
684 if (ha->flags.detected_lr_sfp) {
686 qla25xx_set_sfp_lr_dist(ha);
687 ha->flags.using_lr_setting = 1;
690 struct nvram_81xx *nv = ha->nvram;
691 /* set LR distance if specified in nvram */
692 if (nv->enhanced_features &
693 NEF_LR_DIST_ENABLE) {
695 qla25xx_set_nvr_lr_dist(ha);
696 ha->flags.using_lr_setting = 1;
701 if (ql2xnvmeenable && IS_QLA27XX(ha))
702 mcp->mb[4] |= NVME_ENABLE_FLAG;
704 if (IS_QLA83XX(ha) || IS_QLA27XX(ha)) {
705 struct nvram_81xx *nv = ha->nvram;
706 /* set minimum speed if specified in nvram */
707 if (nv->min_link_speed >= 2 &&
708 nv->min_link_speed <= 5) {
710 mcp->mb[11] = nv->min_link_speed;
711 mcp->out_mb |= MBX_11;
713 vha->min_link_speed_feat = nv->min_link_speed;
717 if (ha->flags.exlogins_enabled)
718 mcp->mb[4] |= ENABLE_EXTENDED_LOGIN;
720 if (ha->flags.exchoffld_enabled)
721 mcp->mb[4] |= ENABLE_EXCHANGE_OFFLD;
723 mcp->out_mb |= MBX_4 | MBX_3 | MBX_2 | MBX_1 | MBX_11;
724 mcp->in_mb |= MBX_3 | MBX_2 | MBX_1;
726 mcp->mb[1] = LSW(risc_addr);
727 mcp->out_mb |= MBX_1;
728 if (IS_QLA2322(ha) || IS_QLA6322(ha)) {
730 mcp->out_mb |= MBX_2;
734 mcp->tov = MBX_TOV_SECONDS;
736 rval = qla2x00_mailbox_command(vha, mcp);
738 if (rval != QLA_SUCCESS) {
739 ql_dbg(ql_dbg_mbx, vha, 0x1026,
740 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
742 if (IS_FWI2_CAPABLE(ha)) {
743 ha->fw_ability_mask = mcp->mb[3] << 16 | mcp->mb[2];
744 ql_dbg(ql_dbg_mbx, vha, 0x119a,
745 "fw_ability_mask=%x.\n", ha->fw_ability_mask);
746 ql_dbg(ql_dbg_mbx, vha, 0x1027,
747 "exchanges=%x.\n", mcp->mb[1]);
748 if (IS_QLA83XX(ha) || IS_QLA27XX(ha)) {
749 ha->max_speed_sup = mcp->mb[2] & BIT_0;
750 ql_dbg(ql_dbg_mbx, vha, 0x119b,
751 "Maximum speed supported=%s.\n",
752 ha->max_speed_sup ? "32Gps" : "16Gps");
753 if (vha->min_link_speed_feat) {
754 ha->min_link_speed = mcp->mb[5];
755 ql_dbg(ql_dbg_mbx, vha, 0x119c,
756 "Minimum speed set=%s.\n",
757 mcp->mb[5] == 5 ? "32Gps" :
758 mcp->mb[5] == 4 ? "16Gps" :
759 mcp->mb[5] == 3 ? "8Gps" :
760 mcp->mb[5] == 2 ? "4Gps" :
765 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1028,
773 * qla_get_exlogin_status
774 * Get extended login status
775 * uses the memory offload control/status Mailbox
778 * ha: adapter state pointer.
779 * fwopt: firmware options
782 * qla2x00 local function status
787 #define FETCH_XLOGINS_STAT 0x8
789 qla_get_exlogin_status(scsi_qla_host_t *vha, uint16_t *buf_sz,
790 uint16_t *ex_logins_cnt)
794 mbx_cmd_t *mcp = &mc;
796 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x118f,
797 "Entered %s\n", __func__);
799 memset(mcp->mb, 0 , sizeof(mcp->mb));
800 mcp->mb[0] = MBC_GET_MEM_OFFLOAD_CNTRL_STAT;
801 mcp->mb[1] = FETCH_XLOGINS_STAT;
802 mcp->out_mb = MBX_1|MBX_0;
803 mcp->in_mb = MBX_10|MBX_4|MBX_0;
804 mcp->tov = MBX_TOV_SECONDS;
807 rval = qla2x00_mailbox_command(vha, mcp);
808 if (rval != QLA_SUCCESS) {
809 ql_dbg(ql_dbg_mbx, vha, 0x1115, "Failed=%x.\n", rval);
811 *buf_sz = mcp->mb[4];
812 *ex_logins_cnt = mcp->mb[10];
814 ql_log(ql_log_info, vha, 0x1190,
815 "buffer size 0x%x, exchange login count=%d\n",
816 mcp->mb[4], mcp->mb[10]);
818 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1116,
819 "Done %s.\n", __func__);
826 * qla_set_exlogin_mem_cfg
827 * set extended login memory configuration
828 * Mbx needs to be issues before init_cb is set
831 * ha: adapter state pointer.
832 * buffer: buffer pointer
833 * phys_addr: physical address of buffer
834 * size: size of buffer
835 * TARGET_QUEUE_LOCK must be released
836 * ADAPTER_STATE_LOCK must be release
839 * qla2x00 local funxtion status code.
844 #define CONFIG_XLOGINS_MEM 0x3
846 qla_set_exlogin_mem_cfg(scsi_qla_host_t *vha, dma_addr_t phys_addr)
850 mbx_cmd_t *mcp = &mc;
851 struct qla_hw_data *ha = vha->hw;
853 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x111a,
854 "Entered %s.\n", __func__);
856 memset(mcp->mb, 0 , sizeof(mcp->mb));
857 mcp->mb[0] = MBC_GET_MEM_OFFLOAD_CNTRL_STAT;
858 mcp->mb[1] = CONFIG_XLOGINS_MEM;
859 mcp->mb[2] = MSW(phys_addr);
860 mcp->mb[3] = LSW(phys_addr);
861 mcp->mb[6] = MSW(MSD(phys_addr));
862 mcp->mb[7] = LSW(MSD(phys_addr));
863 mcp->mb[8] = MSW(ha->exlogin_size);
864 mcp->mb[9] = LSW(ha->exlogin_size);
865 mcp->out_mb = MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
866 mcp->in_mb = MBX_11|MBX_0;
867 mcp->tov = MBX_TOV_SECONDS;
869 rval = qla2x00_mailbox_command(vha, mcp);
870 if (rval != QLA_SUCCESS) {
872 ql_dbg(ql_dbg_mbx, vha, 0x111b, "Failed=%x.\n", rval);
874 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x118c,
875 "Done %s.\n", __func__);
882 * qla_get_exchoffld_status
883 * Get exchange offload status
884 * uses the memory offload control/status Mailbox
887 * ha: adapter state pointer.
888 * fwopt: firmware options
891 * qla2x00 local function status
896 #define FETCH_XCHOFFLD_STAT 0x2
898 qla_get_exchoffld_status(scsi_qla_host_t *vha, uint16_t *buf_sz,
899 uint16_t *ex_logins_cnt)
903 mbx_cmd_t *mcp = &mc;
905 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1019,
906 "Entered %s\n", __func__);
908 memset(mcp->mb, 0 , sizeof(mcp->mb));
909 mcp->mb[0] = MBC_GET_MEM_OFFLOAD_CNTRL_STAT;
910 mcp->mb[1] = FETCH_XCHOFFLD_STAT;
911 mcp->out_mb = MBX_1|MBX_0;
912 mcp->in_mb = MBX_10|MBX_4|MBX_0;
913 mcp->tov = MBX_TOV_SECONDS;
916 rval = qla2x00_mailbox_command(vha, mcp);
917 if (rval != QLA_SUCCESS) {
918 ql_dbg(ql_dbg_mbx, vha, 0x1155, "Failed=%x.\n", rval);
920 *buf_sz = mcp->mb[4];
921 *ex_logins_cnt = mcp->mb[10];
923 ql_log(ql_log_info, vha, 0x118e,
924 "buffer size 0x%x, exchange offload count=%d\n",
925 mcp->mb[4], mcp->mb[10]);
927 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1156,
928 "Done %s.\n", __func__);
935 * qla_set_exchoffld_mem_cfg
936 * Set exchange offload memory configuration
937 * Mbx needs to be issues before init_cb is set
940 * ha: adapter state pointer.
941 * buffer: buffer pointer
942 * phys_addr: physical address of buffer
943 * size: size of buffer
944 * TARGET_QUEUE_LOCK must be released
945 * ADAPTER_STATE_LOCK must be release
948 * qla2x00 local funxtion status code.
953 #define CONFIG_XCHOFFLD_MEM 0x3
955 qla_set_exchoffld_mem_cfg(scsi_qla_host_t *vha)
959 mbx_cmd_t *mcp = &mc;
960 struct qla_hw_data *ha = vha->hw;
962 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1157,
963 "Entered %s.\n", __func__);
965 memset(mcp->mb, 0 , sizeof(mcp->mb));
966 mcp->mb[0] = MBC_GET_MEM_OFFLOAD_CNTRL_STAT;
967 mcp->mb[1] = CONFIG_XCHOFFLD_MEM;
968 mcp->mb[2] = MSW(ha->exchoffld_buf_dma);
969 mcp->mb[3] = LSW(ha->exchoffld_buf_dma);
970 mcp->mb[6] = MSW(MSD(ha->exchoffld_buf_dma));
971 mcp->mb[7] = LSW(MSD(ha->exchoffld_buf_dma));
972 mcp->mb[8] = MSW(ha->exchoffld_size);
973 mcp->mb[9] = LSW(ha->exchoffld_size);
974 mcp->out_mb = MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
975 mcp->in_mb = MBX_11|MBX_0;
976 mcp->tov = MBX_TOV_SECONDS;
978 rval = qla2x00_mailbox_command(vha, mcp);
979 if (rval != QLA_SUCCESS) {
981 ql_dbg(ql_dbg_mbx, vha, 0x1158, "Failed=%x.\n", rval);
983 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1192,
984 "Done %s.\n", __func__);
991 * qla2x00_get_fw_version
992 * Get firmware version.
995 * ha: adapter state pointer.
996 * major: pointer for major number.
997 * minor: pointer for minor number.
998 * subminor: pointer for subminor number.
1001 * qla2x00 local function return status code.
1007 qla2x00_get_fw_version(scsi_qla_host_t *vha)
1011 mbx_cmd_t *mcp = &mc;
1012 struct qla_hw_data *ha = vha->hw;
1014 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1029,
1015 "Entered %s.\n", __func__);
1017 mcp->mb[0] = MBC_GET_FIRMWARE_VERSION;
1018 mcp->out_mb = MBX_0;
1019 mcp->in_mb = MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
1020 if (IS_QLA81XX(vha->hw) || IS_QLA8031(ha) || IS_QLA8044(ha))
1021 mcp->in_mb |= MBX_13|MBX_12|MBX_11|MBX_10|MBX_9|MBX_8;
1022 if (IS_FWI2_CAPABLE(ha))
1023 mcp->in_mb |= MBX_17|MBX_16|MBX_15;
1026 MBX_25|MBX_24|MBX_23|MBX_22|MBX_21|MBX_20|MBX_19|MBX_18|
1027 MBX_14|MBX_13|MBX_11|MBX_10|MBX_9|MBX_8;
1030 mcp->tov = MBX_TOV_SECONDS;
1031 rval = qla2x00_mailbox_command(vha, mcp);
1032 if (rval != QLA_SUCCESS)
1035 /* Return mailbox data. */
1036 ha->fw_major_version = mcp->mb[1];
1037 ha->fw_minor_version = mcp->mb[2];
1038 ha->fw_subminor_version = mcp->mb[3];
1039 ha->fw_attributes = mcp->mb[6];
1040 if (IS_QLA2100(vha->hw) || IS_QLA2200(vha->hw))
1041 ha->fw_memory_size = 0x1FFFF; /* Defaults to 128KB. */
1043 ha->fw_memory_size = (mcp->mb[5] << 16) | mcp->mb[4];
1045 if (IS_QLA81XX(vha->hw) || IS_QLA8031(vha->hw) || IS_QLA8044(ha)) {
1046 ha->mpi_version[0] = mcp->mb[10] & 0xff;
1047 ha->mpi_version[1] = mcp->mb[11] >> 8;
1048 ha->mpi_version[2] = mcp->mb[11] & 0xff;
1049 ha->mpi_capabilities = (mcp->mb[12] << 16) | mcp->mb[13];
1050 ha->phy_version[0] = mcp->mb[8] & 0xff;
1051 ha->phy_version[1] = mcp->mb[9] >> 8;
1052 ha->phy_version[2] = mcp->mb[9] & 0xff;
1055 if (IS_FWI2_CAPABLE(ha)) {
1056 ha->fw_attributes_h = mcp->mb[15];
1057 ha->fw_attributes_ext[0] = mcp->mb[16];
1058 ha->fw_attributes_ext[1] = mcp->mb[17];
1059 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1139,
1060 "%s: FW_attributes Upper: 0x%x, Lower: 0x%x.\n",
1061 __func__, mcp->mb[15], mcp->mb[6]);
1062 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x112f,
1063 "%s: Ext_FwAttributes Upper: 0x%x, Lower: 0x%x.\n",
1064 __func__, mcp->mb[17], mcp->mb[16]);
1066 if (ha->fw_attributes_h & 0x4)
1067 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x118d,
1068 "%s: Firmware supports Extended Login 0x%x\n",
1069 __func__, ha->fw_attributes_h);
1071 if (ha->fw_attributes_h & 0x8)
1072 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1191,
1073 "%s: Firmware supports Exchange Offload 0x%x\n",
1074 __func__, ha->fw_attributes_h);
1077 * FW supports nvme and driver load parameter requested nvme.
1078 * BIT 26 of fw_attributes indicates NVMe support.
1080 if ((ha->fw_attributes_h & 0x400) && ql2xnvmeenable) {
1081 vha->flags.nvme_enabled = 1;
1082 ql_log(ql_log_info, vha, 0xd302,
1083 "%s: FC-NVMe is Enabled (0x%x)\n",
1084 __func__, ha->fw_attributes_h);
1088 if (IS_QLA27XX(ha)) {
1089 ha->mpi_version[0] = mcp->mb[10] & 0xff;
1090 ha->mpi_version[1] = mcp->mb[11] >> 8;
1091 ha->mpi_version[2] = mcp->mb[11] & 0xff;
1092 ha->pep_version[0] = mcp->mb[13] & 0xff;
1093 ha->pep_version[1] = mcp->mb[14] >> 8;
1094 ha->pep_version[2] = mcp->mb[14] & 0xff;
1095 ha->fw_shared_ram_start = (mcp->mb[19] << 16) | mcp->mb[18];
1096 ha->fw_shared_ram_end = (mcp->mb[21] << 16) | mcp->mb[20];
1097 ha->fw_ddr_ram_start = (mcp->mb[23] << 16) | mcp->mb[22];
1098 ha->fw_ddr_ram_end = (mcp->mb[25] << 16) | mcp->mb[24];
1102 if (rval != QLA_SUCCESS) {
1104 ql_dbg(ql_dbg_mbx, vha, 0x102a, "Failed=%x.\n", rval);
1107 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x102b,
1108 "Done %s.\n", __func__);
1114 * qla2x00_get_fw_options
1115 * Set firmware options.
1118 * ha = adapter block pointer.
1119 * fwopt = pointer for firmware options.
1122 * qla2x00 local function return status code.
1128 qla2x00_get_fw_options(scsi_qla_host_t *vha, uint16_t *fwopts)
1132 mbx_cmd_t *mcp = &mc;
1134 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x102c,
1135 "Entered %s.\n", __func__);
1137 mcp->mb[0] = MBC_GET_FIRMWARE_OPTION;
1138 mcp->out_mb = MBX_0;
1139 mcp->in_mb = MBX_3|MBX_2|MBX_1|MBX_0;
1140 mcp->tov = MBX_TOV_SECONDS;
1142 rval = qla2x00_mailbox_command(vha, mcp);
1144 if (rval != QLA_SUCCESS) {
1146 ql_dbg(ql_dbg_mbx, vha, 0x102d, "Failed=%x.\n", rval);
1148 fwopts[0] = mcp->mb[0];
1149 fwopts[1] = mcp->mb[1];
1150 fwopts[2] = mcp->mb[2];
1151 fwopts[3] = mcp->mb[3];
1153 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x102e,
1154 "Done %s.\n", __func__);
1162 * qla2x00_set_fw_options
1163 * Set firmware options.
1166 * ha = adapter block pointer.
1167 * fwopt = pointer for firmware options.
1170 * qla2x00 local function return status code.
1176 qla2x00_set_fw_options(scsi_qla_host_t *vha, uint16_t *fwopts)
1180 mbx_cmd_t *mcp = &mc;
1182 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x102f,
1183 "Entered %s.\n", __func__);
1185 mcp->mb[0] = MBC_SET_FIRMWARE_OPTION;
1186 mcp->mb[1] = fwopts[1];
1187 mcp->mb[2] = fwopts[2];
1188 mcp->mb[3] = fwopts[3];
1189 mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
1191 if (IS_FWI2_CAPABLE(vha->hw)) {
1192 mcp->in_mb |= MBX_1;
1193 mcp->mb[10] = fwopts[10];
1194 mcp->out_mb |= MBX_10;
1196 mcp->mb[10] = fwopts[10];
1197 mcp->mb[11] = fwopts[11];
1198 mcp->mb[12] = 0; /* Undocumented, but used */
1199 mcp->out_mb |= MBX_12|MBX_11|MBX_10;
1201 mcp->tov = MBX_TOV_SECONDS;
1203 rval = qla2x00_mailbox_command(vha, mcp);
1205 fwopts[0] = mcp->mb[0];
1207 if (rval != QLA_SUCCESS) {
1209 ql_dbg(ql_dbg_mbx, vha, 0x1030,
1210 "Failed=%x (%x/%x).\n", rval, mcp->mb[0], mcp->mb[1]);
1213 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1031,
1214 "Done %s.\n", __func__);
1221 * qla2x00_mbx_reg_test
1222 * Mailbox register wrap test.
1225 * ha = adapter block pointer.
1226 * TARGET_QUEUE_LOCK must be released.
1227 * ADAPTER_STATE_LOCK must be released.
1230 * qla2x00 local function return status code.
1236 qla2x00_mbx_reg_test(scsi_qla_host_t *vha)
1240 mbx_cmd_t *mcp = &mc;
1242 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1032,
1243 "Entered %s.\n", __func__);
1245 mcp->mb[0] = MBC_MAILBOX_REGISTER_TEST;
1246 mcp->mb[1] = 0xAAAA;
1247 mcp->mb[2] = 0x5555;
1248 mcp->mb[3] = 0xAA55;
1249 mcp->mb[4] = 0x55AA;
1250 mcp->mb[5] = 0xA5A5;
1251 mcp->mb[6] = 0x5A5A;
1252 mcp->mb[7] = 0x2525;
1253 mcp->out_mb = MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
1254 mcp->in_mb = MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
1255 mcp->tov = MBX_TOV_SECONDS;
1257 rval = qla2x00_mailbox_command(vha, mcp);
1259 if (rval == QLA_SUCCESS) {
1260 if (mcp->mb[1] != 0xAAAA || mcp->mb[2] != 0x5555 ||
1261 mcp->mb[3] != 0xAA55 || mcp->mb[4] != 0x55AA)
1262 rval = QLA_FUNCTION_FAILED;
1263 if (mcp->mb[5] != 0xA5A5 || mcp->mb[6] != 0x5A5A ||
1264 mcp->mb[7] != 0x2525)
1265 rval = QLA_FUNCTION_FAILED;
1268 if (rval != QLA_SUCCESS) {
1270 ql_dbg(ql_dbg_mbx, vha, 0x1033, "Failed=%x.\n", rval);
1273 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1034,
1274 "Done %s.\n", __func__);
1281 * qla2x00_verify_checksum
1282 * Verify firmware checksum.
1285 * ha = adapter block pointer.
1286 * TARGET_QUEUE_LOCK must be released.
1287 * ADAPTER_STATE_LOCK must be released.
1290 * qla2x00 local function return status code.
1296 qla2x00_verify_checksum(scsi_qla_host_t *vha, uint32_t risc_addr)
1300 mbx_cmd_t *mcp = &mc;
1302 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1035,
1303 "Entered %s.\n", __func__);
1305 mcp->mb[0] = MBC_VERIFY_CHECKSUM;
1306 mcp->out_mb = MBX_0;
1308 if (IS_FWI2_CAPABLE(vha->hw)) {
1309 mcp->mb[1] = MSW(risc_addr);
1310 mcp->mb[2] = LSW(risc_addr);
1311 mcp->out_mb |= MBX_2|MBX_1;
1312 mcp->in_mb |= MBX_2|MBX_1;
1314 mcp->mb[1] = LSW(risc_addr);
1315 mcp->out_mb |= MBX_1;
1316 mcp->in_mb |= MBX_1;
1319 mcp->tov = MBX_TOV_SECONDS;
1321 rval = qla2x00_mailbox_command(vha, mcp);
1323 if (rval != QLA_SUCCESS) {
1324 ql_dbg(ql_dbg_mbx, vha, 0x1036,
1325 "Failed=%x chm sum=%x.\n", rval, IS_FWI2_CAPABLE(vha->hw) ?
1326 (mcp->mb[2] << 16) | mcp->mb[1] : mcp->mb[1]);
1328 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1037,
1329 "Done %s.\n", __func__);
1336 * qla2x00_issue_iocb
1337 * Issue IOCB using mailbox command
1340 * ha = adapter state pointer.
1341 * buffer = buffer pointer.
1342 * phys_addr = physical address of buffer.
1343 * size = size of buffer.
1344 * TARGET_QUEUE_LOCK must be released.
1345 * ADAPTER_STATE_LOCK must be released.
1348 * qla2x00 local function return status code.
1354 qla2x00_issue_iocb_timeout(scsi_qla_host_t *vha, void *buffer,
1355 dma_addr_t phys_addr, size_t size, uint32_t tov)
1359 mbx_cmd_t *mcp = &mc;
1361 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1038,
1362 "Entered %s.\n", __func__);
1364 mcp->mb[0] = MBC_IOCB_COMMAND_A64;
1366 mcp->mb[2] = MSW(phys_addr);
1367 mcp->mb[3] = LSW(phys_addr);
1368 mcp->mb[6] = MSW(MSD(phys_addr));
1369 mcp->mb[7] = LSW(MSD(phys_addr));
1370 mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
1371 mcp->in_mb = MBX_2|MBX_0;
1374 rval = qla2x00_mailbox_command(vha, mcp);
1376 if (rval != QLA_SUCCESS) {
1378 ql_dbg(ql_dbg_mbx, vha, 0x1039, "Failed=%x.\n", rval);
1380 sts_entry_t *sts_entry = (sts_entry_t *) buffer;
1382 /* Mask reserved bits. */
1383 sts_entry->entry_status &=
1384 IS_FWI2_CAPABLE(vha->hw) ? RF_MASK_24XX : RF_MASK;
1385 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x103a,
1386 "Done %s.\n", __func__);
1393 qla2x00_issue_iocb(scsi_qla_host_t *vha, void *buffer, dma_addr_t phys_addr,
1396 return qla2x00_issue_iocb_timeout(vha, buffer, phys_addr, size,
1401 * qla2x00_abort_command
1402 * Abort command aborts a specified IOCB.
1405 * ha = adapter block pointer.
1406 * sp = SB structure pointer.
1409 * qla2x00 local function return status code.
1415 qla2x00_abort_command(srb_t *sp)
1417 unsigned long flags = 0;
1419 uint32_t handle = 0;
1421 mbx_cmd_t *mcp = &mc;
1422 fc_port_t *fcport = sp->fcport;
1423 scsi_qla_host_t *vha = fcport->vha;
1424 struct qla_hw_data *ha = vha->hw;
1425 struct req_que *req;
1426 struct scsi_cmnd *cmd = GET_CMD_SP(sp);
1428 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x103b,
1429 "Entered %s.\n", __func__);
1431 if (vha->flags.qpairs_available && sp->qpair)
1432 req = sp->qpair->req;
1436 spin_lock_irqsave(&ha->hardware_lock, flags);
1437 for (handle = 1; handle < req->num_outstanding_cmds; handle++) {
1438 if (req->outstanding_cmds[handle] == sp)
1441 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1443 if (handle == req->num_outstanding_cmds) {
1444 /* command not found */
1445 return QLA_FUNCTION_FAILED;
1448 mcp->mb[0] = MBC_ABORT_COMMAND;
1449 if (HAS_EXTENDED_IDS(ha))
1450 mcp->mb[1] = fcport->loop_id;
1452 mcp->mb[1] = fcport->loop_id << 8;
1453 mcp->mb[2] = (uint16_t)handle;
1454 mcp->mb[3] = (uint16_t)(handle >> 16);
1455 mcp->mb[6] = (uint16_t)cmd->device->lun;
1456 mcp->out_mb = MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
1458 mcp->tov = MBX_TOV_SECONDS;
1460 rval = qla2x00_mailbox_command(vha, mcp);
1462 if (rval != QLA_SUCCESS) {
1463 ql_dbg(ql_dbg_mbx, vha, 0x103c, "Failed=%x.\n", rval);
1465 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x103d,
1466 "Done %s.\n", __func__);
1473 qla2x00_abort_target(struct fc_port *fcport, uint64_t l, int tag)
1477 mbx_cmd_t *mcp = &mc;
1478 scsi_qla_host_t *vha;
1479 struct req_que *req;
1480 struct rsp_que *rsp;
1485 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x103e,
1486 "Entered %s.\n", __func__);
1488 req = vha->hw->req_q_map[0];
1490 mcp->mb[0] = MBC_ABORT_TARGET;
1491 mcp->out_mb = MBX_9|MBX_2|MBX_1|MBX_0;
1492 if (HAS_EXTENDED_IDS(vha->hw)) {
1493 mcp->mb[1] = fcport->loop_id;
1495 mcp->out_mb |= MBX_10;
1497 mcp->mb[1] = fcport->loop_id << 8;
1499 mcp->mb[2] = vha->hw->loop_reset_delay;
1500 mcp->mb[9] = vha->vp_idx;
1503 mcp->tov = MBX_TOV_SECONDS;
1505 rval = qla2x00_mailbox_command(vha, mcp);
1506 if (rval != QLA_SUCCESS) {
1507 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x103f,
1508 "Failed=%x.\n", rval);
1511 /* Issue marker IOCB. */
1512 rval2 = qla2x00_marker(vha, req, rsp, fcport->loop_id, 0,
1514 if (rval2 != QLA_SUCCESS) {
1515 ql_dbg(ql_dbg_mbx, vha, 0x1040,
1516 "Failed to issue marker IOCB (%x).\n", rval2);
1518 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1041,
1519 "Done %s.\n", __func__);
1526 qla2x00_lun_reset(struct fc_port *fcport, uint64_t l, int tag)
1530 mbx_cmd_t *mcp = &mc;
1531 scsi_qla_host_t *vha;
1532 struct req_que *req;
1533 struct rsp_que *rsp;
1537 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1042,
1538 "Entered %s.\n", __func__);
1540 req = vha->hw->req_q_map[0];
1542 mcp->mb[0] = MBC_LUN_RESET;
1543 mcp->out_mb = MBX_9|MBX_3|MBX_2|MBX_1|MBX_0;
1544 if (HAS_EXTENDED_IDS(vha->hw))
1545 mcp->mb[1] = fcport->loop_id;
1547 mcp->mb[1] = fcport->loop_id << 8;
1548 mcp->mb[2] = (u32)l;
1550 mcp->mb[9] = vha->vp_idx;
1553 mcp->tov = MBX_TOV_SECONDS;
1555 rval = qla2x00_mailbox_command(vha, mcp);
1556 if (rval != QLA_SUCCESS) {
1557 ql_dbg(ql_dbg_mbx, vha, 0x1043, "Failed=%x.\n", rval);
1560 /* Issue marker IOCB. */
1561 rval2 = qla2x00_marker(vha, req, rsp, fcport->loop_id, l,
1563 if (rval2 != QLA_SUCCESS) {
1564 ql_dbg(ql_dbg_mbx, vha, 0x1044,
1565 "Failed to issue marker IOCB (%x).\n", rval2);
1567 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1045,
1568 "Done %s.\n", __func__);
1575 * qla2x00_get_adapter_id
1576 * Get adapter ID and topology.
1579 * ha = adapter block pointer.
1580 * id = pointer for loop ID.
1581 * al_pa = pointer for AL_PA.
1582 * area = pointer for area.
1583 * domain = pointer for domain.
1584 * top = pointer for topology.
1585 * TARGET_QUEUE_LOCK must be released.
1586 * ADAPTER_STATE_LOCK must be released.
1589 * qla2x00 local function return status code.
1595 qla2x00_get_adapter_id(scsi_qla_host_t *vha, uint16_t *id, uint8_t *al_pa,
1596 uint8_t *area, uint8_t *domain, uint16_t *top, uint16_t *sw_cap)
1600 mbx_cmd_t *mcp = &mc;
1602 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1046,
1603 "Entered %s.\n", __func__);
1605 mcp->mb[0] = MBC_GET_ADAPTER_LOOP_ID;
1606 mcp->mb[9] = vha->vp_idx;
1607 mcp->out_mb = MBX_9|MBX_0;
1608 mcp->in_mb = MBX_9|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
1609 if (IS_CNA_CAPABLE(vha->hw))
1610 mcp->in_mb |= MBX_13|MBX_12|MBX_11|MBX_10;
1611 if (IS_FWI2_CAPABLE(vha->hw))
1612 mcp->in_mb |= MBX_19|MBX_18|MBX_17|MBX_16;
1613 if (IS_QLA27XX(vha->hw))
1614 mcp->in_mb |= MBX_15;
1615 mcp->tov = MBX_TOV_SECONDS;
1617 rval = qla2x00_mailbox_command(vha, mcp);
1618 if (mcp->mb[0] == MBS_COMMAND_ERROR)
1619 rval = QLA_COMMAND_ERROR;
1620 else if (mcp->mb[0] == MBS_INVALID_COMMAND)
1621 rval = QLA_INVALID_COMMAND;
1625 *al_pa = LSB(mcp->mb[2]);
1626 *area = MSB(mcp->mb[2]);
1627 *domain = LSB(mcp->mb[3]);
1629 *sw_cap = mcp->mb[7];
1631 if (rval != QLA_SUCCESS) {
1633 ql_dbg(ql_dbg_mbx, vha, 0x1047, "Failed=%x.\n", rval);
1635 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1048,
1636 "Done %s.\n", __func__);
1638 if (IS_CNA_CAPABLE(vha->hw)) {
1639 vha->fcoe_vlan_id = mcp->mb[9] & 0xfff;
1640 vha->fcoe_fcf_idx = mcp->mb[10];
1641 vha->fcoe_vn_port_mac[5] = mcp->mb[11] >> 8;
1642 vha->fcoe_vn_port_mac[4] = mcp->mb[11] & 0xff;
1643 vha->fcoe_vn_port_mac[3] = mcp->mb[12] >> 8;
1644 vha->fcoe_vn_port_mac[2] = mcp->mb[12] & 0xff;
1645 vha->fcoe_vn_port_mac[1] = mcp->mb[13] >> 8;
1646 vha->fcoe_vn_port_mac[0] = mcp->mb[13] & 0xff;
1648 /* If FA-WWN supported */
1649 if (IS_FAWWN_CAPABLE(vha->hw)) {
1650 if (mcp->mb[7] & BIT_14) {
1651 vha->port_name[0] = MSB(mcp->mb[16]);
1652 vha->port_name[1] = LSB(mcp->mb[16]);
1653 vha->port_name[2] = MSB(mcp->mb[17]);
1654 vha->port_name[3] = LSB(mcp->mb[17]);
1655 vha->port_name[4] = MSB(mcp->mb[18]);
1656 vha->port_name[5] = LSB(mcp->mb[18]);
1657 vha->port_name[6] = MSB(mcp->mb[19]);
1658 vha->port_name[7] = LSB(mcp->mb[19]);
1659 fc_host_port_name(vha->host) =
1660 wwn_to_u64(vha->port_name);
1661 ql_dbg(ql_dbg_mbx, vha, 0x10ca,
1662 "FA-WWN acquired %016llx\n",
1663 wwn_to_u64(vha->port_name));
1667 if (IS_QLA27XX(vha->hw))
1668 vha->bbcr = mcp->mb[15];
1675 * qla2x00_get_retry_cnt
1676 * Get current firmware login retry count and delay.
1679 * ha = adapter block pointer.
1680 * retry_cnt = pointer to login retry count.
1681 * tov = pointer to login timeout value.
1684 * qla2x00 local function return status code.
1690 qla2x00_get_retry_cnt(scsi_qla_host_t *vha, uint8_t *retry_cnt, uint8_t *tov,
1696 mbx_cmd_t *mcp = &mc;
1698 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1049,
1699 "Entered %s.\n", __func__);
1701 mcp->mb[0] = MBC_GET_RETRY_COUNT;
1702 mcp->out_mb = MBX_0;
1703 mcp->in_mb = MBX_3|MBX_2|MBX_1|MBX_0;
1704 mcp->tov = MBX_TOV_SECONDS;
1706 rval = qla2x00_mailbox_command(vha, mcp);
1708 if (rval != QLA_SUCCESS) {
1710 ql_dbg(ql_dbg_mbx, vha, 0x104a,
1711 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
1713 /* Convert returned data and check our values. */
1714 *r_a_tov = mcp->mb[3] / 2;
1715 ratov = (mcp->mb[3]/2) / 10; /* mb[3] value is in 100ms */
1716 if (mcp->mb[1] * ratov > (*retry_cnt) * (*tov)) {
1717 /* Update to the larger values */
1718 *retry_cnt = (uint8_t)mcp->mb[1];
1722 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x104b,
1723 "Done %s mb3=%d ratov=%d.\n", __func__, mcp->mb[3], ratov);
1730 * qla2x00_init_firmware
1731 * Initialize adapter firmware.
1734 * ha = adapter block pointer.
1735 * dptr = Initialization control block pointer.
1736 * size = size of initialization control block.
1737 * TARGET_QUEUE_LOCK must be released.
1738 * ADAPTER_STATE_LOCK must be released.
1741 * qla2x00 local function return status code.
1747 qla2x00_init_firmware(scsi_qla_host_t *vha, uint16_t size)
1751 mbx_cmd_t *mcp = &mc;
1752 struct qla_hw_data *ha = vha->hw;
1754 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x104c,
1755 "Entered %s.\n", __func__);
1757 if (IS_P3P_TYPE(ha) && ql2xdbwr)
1758 qla82xx_wr_32(ha, (uintptr_t __force)ha->nxdb_wr_ptr,
1759 (0x04 | (ha->portnum << 5) | (0 << 8) | (0 << 16)));
1761 if (ha->flags.npiv_supported)
1762 mcp->mb[0] = MBC_MID_INITIALIZE_FIRMWARE;
1764 mcp->mb[0] = MBC_INITIALIZE_FIRMWARE;
1767 mcp->mb[2] = MSW(ha->init_cb_dma);
1768 mcp->mb[3] = LSW(ha->init_cb_dma);
1769 mcp->mb[6] = MSW(MSD(ha->init_cb_dma));
1770 mcp->mb[7] = LSW(MSD(ha->init_cb_dma));
1771 mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
1772 if (ha->ex_init_cb && ha->ex_init_cb->ex_version) {
1774 mcp->mb[10] = MSW(ha->ex_init_cb_dma);
1775 mcp->mb[11] = LSW(ha->ex_init_cb_dma);
1776 mcp->mb[12] = MSW(MSD(ha->ex_init_cb_dma));
1777 mcp->mb[13] = LSW(MSD(ha->ex_init_cb_dma));
1778 mcp->mb[14] = sizeof(*ha->ex_init_cb);
1779 mcp->out_mb |= MBX_14|MBX_13|MBX_12|MBX_11|MBX_10;
1781 /* 1 and 2 should normally be captured. */
1782 mcp->in_mb = MBX_2|MBX_1|MBX_0;
1783 if (IS_QLA83XX(ha) || IS_QLA27XX(ha))
1784 /* mb3 is additional info about the installed SFP. */
1785 mcp->in_mb |= MBX_3;
1786 mcp->buf_size = size;
1787 mcp->flags = MBX_DMA_OUT;
1788 mcp->tov = MBX_TOV_SECONDS;
1789 rval = qla2x00_mailbox_command(vha, mcp);
1791 if (rval != QLA_SUCCESS) {
1793 ql_dbg(ql_dbg_mbx, vha, 0x104d,
1794 "Failed=%x mb[0]=%x, mb[1]=%x, mb[2]=%x, mb[3]=%x,.\n",
1795 rval, mcp->mb[0], mcp->mb[1], mcp->mb[2], mcp->mb[3]);
1797 if (IS_QLA27XX(ha)) {
1798 if (mcp->mb[2] == 6 || mcp->mb[3] == 2)
1799 ql_dbg(ql_dbg_mbx, vha, 0x119d,
1800 "Invalid SFP/Validation Failed\n");
1802 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x104e,
1803 "Done %s.\n", __func__);
1811 * qla2x00_get_port_database
1812 * Issue normal/enhanced get port database mailbox command
1813 * and copy device name as necessary.
1816 * ha = adapter state pointer.
1817 * dev = structure pointer.
1818 * opt = enhanced cmd option byte.
1821 * qla2x00 local function return status code.
1827 qla2x00_get_port_database(scsi_qla_host_t *vha, fc_port_t *fcport, uint8_t opt)
1831 mbx_cmd_t *mcp = &mc;
1832 port_database_t *pd;
1833 struct port_database_24xx *pd24;
1835 struct qla_hw_data *ha = vha->hw;
1837 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x104f,
1838 "Entered %s.\n", __func__);
1841 pd = dma_pool_zalloc(ha->s_dma_pool, GFP_KERNEL, &pd_dma);
1843 ql_log(ql_log_warn, vha, 0x1050,
1844 "Failed to allocate port database structure.\n");
1846 return QLA_MEMORY_ALLOC_FAILED;
1849 mcp->mb[0] = MBC_GET_PORT_DATABASE;
1850 if (opt != 0 && !IS_FWI2_CAPABLE(ha))
1851 mcp->mb[0] = MBC_ENHANCED_GET_PORT_DATABASE;
1852 mcp->mb[2] = MSW(pd_dma);
1853 mcp->mb[3] = LSW(pd_dma);
1854 mcp->mb[6] = MSW(MSD(pd_dma));
1855 mcp->mb[7] = LSW(MSD(pd_dma));
1856 mcp->mb[9] = vha->vp_idx;
1857 mcp->out_mb = MBX_9|MBX_7|MBX_6|MBX_3|MBX_2|MBX_0;
1859 if (IS_FWI2_CAPABLE(ha)) {
1860 mcp->mb[1] = fcport->loop_id;
1862 mcp->out_mb |= MBX_10|MBX_1;
1863 mcp->in_mb |= MBX_1;
1864 } else if (HAS_EXTENDED_IDS(ha)) {
1865 mcp->mb[1] = fcport->loop_id;
1867 mcp->out_mb |= MBX_10|MBX_1;
1869 mcp->mb[1] = fcport->loop_id << 8 | opt;
1870 mcp->out_mb |= MBX_1;
1872 mcp->buf_size = IS_FWI2_CAPABLE(ha) ?
1873 PORT_DATABASE_24XX_SIZE : PORT_DATABASE_SIZE;
1874 mcp->flags = MBX_DMA_IN;
1875 mcp->tov = (ha->login_timeout * 2) + (ha->login_timeout / 2);
1876 rval = qla2x00_mailbox_command(vha, mcp);
1877 if (rval != QLA_SUCCESS)
1880 if (IS_FWI2_CAPABLE(ha)) {
1882 u8 current_login_state, last_login_state;
1884 pd24 = (struct port_database_24xx *) pd;
1886 /* Check for logged in state. */
1887 if (fcport->fc4f_nvme) {
1888 current_login_state = pd24->current_login_state >> 4;
1889 last_login_state = pd24->last_login_state >> 4;
1891 current_login_state = pd24->current_login_state & 0xf;
1892 last_login_state = pd24->last_login_state & 0xf;
1894 fcport->current_login_state = pd24->current_login_state;
1895 fcport->last_login_state = pd24->last_login_state;
1897 /* Check for logged in state. */
1898 if (current_login_state != PDS_PRLI_COMPLETE &&
1899 last_login_state != PDS_PRLI_COMPLETE) {
1900 ql_dbg(ql_dbg_mbx, vha, 0x119a,
1901 "Unable to verify login-state (%x/%x) for loop_id %x.\n",
1902 current_login_state, last_login_state,
1904 rval = QLA_FUNCTION_FAILED;
1910 if (fcport->loop_id == FC_NO_LOOP_ID ||
1911 (memcmp(fcport->port_name, (uint8_t *)&zero, 8) &&
1912 memcmp(fcport->port_name, pd24->port_name, 8))) {
1913 /* We lost the device mid way. */
1914 rval = QLA_NOT_LOGGED_IN;
1918 /* Names are little-endian. */
1919 memcpy(fcport->node_name, pd24->node_name, WWN_SIZE);
1920 memcpy(fcport->port_name, pd24->port_name, WWN_SIZE);
1922 /* Get port_id of device. */
1923 fcport->d_id.b.domain = pd24->port_id[0];
1924 fcport->d_id.b.area = pd24->port_id[1];
1925 fcport->d_id.b.al_pa = pd24->port_id[2];
1926 fcport->d_id.b.rsvd_1 = 0;
1928 /* If not target must be initiator or unknown type. */
1929 if ((pd24->prli_svc_param_word_3[0] & BIT_4) == 0)
1930 fcport->port_type = FCT_INITIATOR;
1932 fcport->port_type = FCT_TARGET;
1934 /* Passback COS information. */
1935 fcport->supported_classes = (pd24->flags & PDF_CLASS_2) ?
1936 FC_COS_CLASS2 : FC_COS_CLASS3;
1938 if (pd24->prli_svc_param_word_3[0] & BIT_7)
1939 fcport->flags |= FCF_CONF_COMP_SUPPORTED;
1943 /* Check for logged in state. */
1944 if (pd->master_state != PD_STATE_PORT_LOGGED_IN &&
1945 pd->slave_state != PD_STATE_PORT_LOGGED_IN) {
1946 ql_dbg(ql_dbg_mbx, vha, 0x100a,
1947 "Unable to verify login-state (%x/%x) - "
1948 "portid=%02x%02x%02x.\n", pd->master_state,
1949 pd->slave_state, fcport->d_id.b.domain,
1950 fcport->d_id.b.area, fcport->d_id.b.al_pa);
1951 rval = QLA_FUNCTION_FAILED;
1955 if (fcport->loop_id == FC_NO_LOOP_ID ||
1956 (memcmp(fcport->port_name, (uint8_t *)&zero, 8) &&
1957 memcmp(fcport->port_name, pd->port_name, 8))) {
1958 /* We lost the device mid way. */
1959 rval = QLA_NOT_LOGGED_IN;
1963 /* Names are little-endian. */
1964 memcpy(fcport->node_name, pd->node_name, WWN_SIZE);
1965 memcpy(fcport->port_name, pd->port_name, WWN_SIZE);
1967 /* Get port_id of device. */
1968 fcport->d_id.b.domain = pd->port_id[0];
1969 fcport->d_id.b.area = pd->port_id[3];
1970 fcport->d_id.b.al_pa = pd->port_id[2];
1971 fcport->d_id.b.rsvd_1 = 0;
1973 /* If not target must be initiator or unknown type. */
1974 if ((pd->prli_svc_param_word_3[0] & BIT_4) == 0)
1975 fcport->port_type = FCT_INITIATOR;
1977 fcport->port_type = FCT_TARGET;
1979 /* Passback COS information. */
1980 fcport->supported_classes = (pd->options & BIT_4) ?
1981 FC_COS_CLASS2: FC_COS_CLASS3;
1985 dma_pool_free(ha->s_dma_pool, pd, pd_dma);
1988 if (rval != QLA_SUCCESS) {
1989 ql_dbg(ql_dbg_mbx, vha, 0x1052,
1990 "Failed=%x mb[0]=%x mb[1]=%x.\n", rval,
1991 mcp->mb[0], mcp->mb[1]);
1993 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1053,
1994 "Done %s.\n", __func__);
2001 * qla2x00_get_firmware_state
2002 * Get adapter firmware state.
2005 * ha = adapter block pointer.
2006 * dptr = pointer for firmware state.
2007 * TARGET_QUEUE_LOCK must be released.
2008 * ADAPTER_STATE_LOCK must be released.
2011 * qla2x00 local function return status code.
2017 qla2x00_get_firmware_state(scsi_qla_host_t *vha, uint16_t *states)
2021 mbx_cmd_t *mcp = &mc;
2022 struct qla_hw_data *ha = vha->hw;
2024 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1054,
2025 "Entered %s.\n", __func__);
2027 mcp->mb[0] = MBC_GET_FIRMWARE_STATE;
2028 mcp->out_mb = MBX_0;
2029 if (IS_FWI2_CAPABLE(vha->hw))
2030 mcp->in_mb = MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
2032 mcp->in_mb = MBX_1|MBX_0;
2033 mcp->tov = MBX_TOV_SECONDS;
2035 rval = qla2x00_mailbox_command(vha, mcp);
2037 /* Return firmware states. */
2038 states[0] = mcp->mb[1];
2039 if (IS_FWI2_CAPABLE(vha->hw)) {
2040 states[1] = mcp->mb[2];
2041 states[2] = mcp->mb[3]; /* SFP info */
2042 states[3] = mcp->mb[4];
2043 states[4] = mcp->mb[5];
2044 states[5] = mcp->mb[6]; /* DPORT status */
2047 if (rval != QLA_SUCCESS) {
2049 ql_dbg(ql_dbg_mbx, vha, 0x1055, "Failed=%x.\n", rval);
2051 if (IS_QLA27XX(ha)) {
2052 if (mcp->mb[2] == 6 || mcp->mb[3] == 2)
2053 ql_dbg(ql_dbg_mbx, vha, 0x119e,
2054 "Invalid SFP/Validation Failed\n");
2056 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1056,
2057 "Done %s.\n", __func__);
2064 * qla2x00_get_port_name
2065 * Issue get port name mailbox command.
2066 * Returned name is in big endian format.
2069 * ha = adapter block pointer.
2070 * loop_id = loop ID of device.
2071 * name = pointer for name.
2072 * TARGET_QUEUE_LOCK must be released.
2073 * ADAPTER_STATE_LOCK must be released.
2076 * qla2x00 local function return status code.
2082 qla2x00_get_port_name(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t *name,
2087 mbx_cmd_t *mcp = &mc;
2089 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1057,
2090 "Entered %s.\n", __func__);
2092 mcp->mb[0] = MBC_GET_PORT_NAME;
2093 mcp->mb[9] = vha->vp_idx;
2094 mcp->out_mb = MBX_9|MBX_1|MBX_0;
2095 if (HAS_EXTENDED_IDS(vha->hw)) {
2096 mcp->mb[1] = loop_id;
2098 mcp->out_mb |= MBX_10;
2100 mcp->mb[1] = loop_id << 8 | opt;
2103 mcp->in_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
2104 mcp->tov = MBX_TOV_SECONDS;
2106 rval = qla2x00_mailbox_command(vha, mcp);
2108 if (rval != QLA_SUCCESS) {
2110 ql_dbg(ql_dbg_mbx, vha, 0x1058, "Failed=%x.\n", rval);
2113 /* This function returns name in big endian. */
2114 name[0] = MSB(mcp->mb[2]);
2115 name[1] = LSB(mcp->mb[2]);
2116 name[2] = MSB(mcp->mb[3]);
2117 name[3] = LSB(mcp->mb[3]);
2118 name[4] = MSB(mcp->mb[6]);
2119 name[5] = LSB(mcp->mb[6]);
2120 name[6] = MSB(mcp->mb[7]);
2121 name[7] = LSB(mcp->mb[7]);
2124 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1059,
2125 "Done %s.\n", __func__);
2132 * qla24xx_link_initialization
2133 * Issue link initialization mailbox command.
2136 * ha = adapter block pointer.
2137 * TARGET_QUEUE_LOCK must be released.
2138 * ADAPTER_STATE_LOCK must be released.
2141 * qla2x00 local function return status code.
2147 qla24xx_link_initialize(scsi_qla_host_t *vha)
2151 mbx_cmd_t *mcp = &mc;
2153 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1152,
2154 "Entered %s.\n", __func__);
2156 if (!IS_FWI2_CAPABLE(vha->hw) || IS_CNA_CAPABLE(vha->hw))
2157 return QLA_FUNCTION_FAILED;
2159 mcp->mb[0] = MBC_LINK_INITIALIZATION;
2161 if (vha->hw->operating_mode == LOOP)
2162 mcp->mb[1] |= BIT_6;
2164 mcp->mb[1] |= BIT_5;
2167 mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
2169 mcp->tov = MBX_TOV_SECONDS;
2171 rval = qla2x00_mailbox_command(vha, mcp);
2173 if (rval != QLA_SUCCESS) {
2174 ql_dbg(ql_dbg_mbx, vha, 0x1153, "Failed=%x.\n", rval);
2176 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1154,
2177 "Done %s.\n", __func__);
2185 * Issue LIP reset mailbox command.
2188 * ha = adapter block pointer.
2189 * TARGET_QUEUE_LOCK must be released.
2190 * ADAPTER_STATE_LOCK must be released.
2193 * qla2x00 local function return status code.
2199 qla2x00_lip_reset(scsi_qla_host_t *vha)
2203 mbx_cmd_t *mcp = &mc;
2205 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x105a,
2206 "Entered %s.\n", __func__);
2208 if (IS_CNA_CAPABLE(vha->hw)) {
2209 /* Logout across all FCFs. */
2210 mcp->mb[0] = MBC_LIP_FULL_LOGIN;
2213 mcp->out_mb = MBX_2|MBX_1|MBX_0;
2214 } else if (IS_FWI2_CAPABLE(vha->hw)) {
2215 mcp->mb[0] = MBC_LIP_FULL_LOGIN;
2216 if (N2N_TOPO(vha->hw))
2217 mcp->mb[1] = BIT_4; /* re-init */
2219 mcp->mb[1] = BIT_6; /* LIP */
2221 mcp->mb[3] = vha->hw->loop_reset_delay;
2222 mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
2224 mcp->mb[0] = MBC_LIP_RESET;
2225 mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
2226 if (HAS_EXTENDED_IDS(vha->hw)) {
2227 mcp->mb[1] = 0x00ff;
2229 mcp->out_mb |= MBX_10;
2231 mcp->mb[1] = 0xff00;
2233 mcp->mb[2] = vha->hw->loop_reset_delay;
2237 mcp->tov = MBX_TOV_SECONDS;
2239 rval = qla2x00_mailbox_command(vha, mcp);
2241 if (rval != QLA_SUCCESS) {
2243 ql_dbg(ql_dbg_mbx, vha, 0x105b, "Failed=%x.\n", rval);
2246 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x105c,
2247 "Done %s.\n", __func__);
2258 * ha = adapter block pointer.
2259 * sns = pointer for command.
2260 * cmd_size = command size.
2261 * buf_size = response/command size.
2262 * TARGET_QUEUE_LOCK must be released.
2263 * ADAPTER_STATE_LOCK must be released.
2266 * qla2x00 local function return status code.
2272 qla2x00_send_sns(scsi_qla_host_t *vha, dma_addr_t sns_phys_address,
2273 uint16_t cmd_size, size_t buf_size)
2277 mbx_cmd_t *mcp = &mc;
2279 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x105d,
2280 "Entered %s.\n", __func__);
2282 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x105e,
2283 "Retry cnt=%d ratov=%d total tov=%d.\n",
2284 vha->hw->retry_count, vha->hw->login_timeout, mcp->tov);
2286 mcp->mb[0] = MBC_SEND_SNS_COMMAND;
2287 mcp->mb[1] = cmd_size;
2288 mcp->mb[2] = MSW(sns_phys_address);
2289 mcp->mb[3] = LSW(sns_phys_address);
2290 mcp->mb[6] = MSW(MSD(sns_phys_address));
2291 mcp->mb[7] = LSW(MSD(sns_phys_address));
2292 mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
2293 mcp->in_mb = MBX_0|MBX_1;
2294 mcp->buf_size = buf_size;
2295 mcp->flags = MBX_DMA_OUT|MBX_DMA_IN;
2296 mcp->tov = (vha->hw->login_timeout * 2) + (vha->hw->login_timeout / 2);
2297 rval = qla2x00_mailbox_command(vha, mcp);
2299 if (rval != QLA_SUCCESS) {
2301 ql_dbg(ql_dbg_mbx, vha, 0x105f,
2302 "Failed=%x mb[0]=%x mb[1]=%x.\n",
2303 rval, mcp->mb[0], mcp->mb[1]);
2306 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1060,
2307 "Done %s.\n", __func__);
2314 qla24xx_login_fabric(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t domain,
2315 uint8_t area, uint8_t al_pa, uint16_t *mb, uint8_t opt)
2319 struct logio_entry_24xx *lg;
2322 struct qla_hw_data *ha = vha->hw;
2323 struct req_que *req;
2325 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1061,
2326 "Entered %s.\n", __func__);
2328 if (vha->vp_idx && vha->qpair)
2329 req = vha->qpair->req;
2331 req = ha->req_q_map[0];
2333 lg = dma_pool_zalloc(ha->s_dma_pool, GFP_KERNEL, &lg_dma);
2335 ql_log(ql_log_warn, vha, 0x1062,
2336 "Failed to allocate login IOCB.\n");
2337 return QLA_MEMORY_ALLOC_FAILED;
2340 lg->entry_type = LOGINOUT_PORT_IOCB_TYPE;
2341 lg->entry_count = 1;
2342 lg->handle = MAKE_HANDLE(req->id, lg->handle);
2343 lg->nport_handle = cpu_to_le16(loop_id);
2344 lg->control_flags = cpu_to_le16(LCF_COMMAND_PLOGI);
2346 lg->control_flags |= cpu_to_le16(LCF_COND_PLOGI);
2348 lg->control_flags |= cpu_to_le16(LCF_SKIP_PRLI);
2349 lg->port_id[0] = al_pa;
2350 lg->port_id[1] = area;
2351 lg->port_id[2] = domain;
2352 lg->vp_index = vha->vp_idx;
2353 rval = qla2x00_issue_iocb_timeout(vha, lg, lg_dma, 0,
2354 (ha->r_a_tov / 10 * 2) + 2);
2355 if (rval != QLA_SUCCESS) {
2356 ql_dbg(ql_dbg_mbx, vha, 0x1063,
2357 "Failed to issue login IOCB (%x).\n", rval);
2358 } else if (lg->entry_status != 0) {
2359 ql_dbg(ql_dbg_mbx, vha, 0x1064,
2360 "Failed to complete IOCB -- error status (%x).\n",
2362 rval = QLA_FUNCTION_FAILED;
2363 } else if (lg->comp_status != cpu_to_le16(CS_COMPLETE)) {
2364 iop[0] = le32_to_cpu(lg->io_parameter[0]);
2365 iop[1] = le32_to_cpu(lg->io_parameter[1]);
2367 ql_dbg(ql_dbg_mbx, vha, 0x1065,
2368 "Failed to complete IOCB -- completion status (%x) "
2369 "ioparam=%x/%x.\n", le16_to_cpu(lg->comp_status),
2373 case LSC_SCODE_PORTID_USED:
2374 mb[0] = MBS_PORT_ID_USED;
2375 mb[1] = LSW(iop[1]);
2377 case LSC_SCODE_NPORT_USED:
2378 mb[0] = MBS_LOOP_ID_USED;
2380 case LSC_SCODE_NOLINK:
2381 case LSC_SCODE_NOIOCB:
2382 case LSC_SCODE_NOXCB:
2383 case LSC_SCODE_CMD_FAILED:
2384 case LSC_SCODE_NOFABRIC:
2385 case LSC_SCODE_FW_NOT_READY:
2386 case LSC_SCODE_NOT_LOGGED_IN:
2387 case LSC_SCODE_NOPCB:
2388 case LSC_SCODE_ELS_REJECT:
2389 case LSC_SCODE_CMD_PARAM_ERR:
2390 case LSC_SCODE_NONPORT:
2391 case LSC_SCODE_LOGGED_IN:
2392 case LSC_SCODE_NOFLOGI_ACC:
2394 mb[0] = MBS_COMMAND_ERROR;
2398 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1066,
2399 "Done %s.\n", __func__);
2401 iop[0] = le32_to_cpu(lg->io_parameter[0]);
2403 mb[0] = MBS_COMMAND_COMPLETE;
2405 if (iop[0] & BIT_4) {
2411 /* Passback COS information. */
2413 if (lg->io_parameter[7] || lg->io_parameter[8])
2414 mb[10] |= BIT_0; /* Class 2. */
2415 if (lg->io_parameter[9] || lg->io_parameter[10])
2416 mb[10] |= BIT_1; /* Class 3. */
2417 if (lg->io_parameter[0] & cpu_to_le32(BIT_7))
2418 mb[10] |= BIT_7; /* Confirmed Completion
2423 dma_pool_free(ha->s_dma_pool, lg, lg_dma);
2429 * qla2x00_login_fabric
2430 * Issue login fabric port mailbox command.
2433 * ha = adapter block pointer.
2434 * loop_id = device loop ID.
2435 * domain = device domain.
2436 * area = device area.
2437 * al_pa = device AL_PA.
2438 * status = pointer for return status.
2439 * opt = command options.
2440 * TARGET_QUEUE_LOCK must be released.
2441 * ADAPTER_STATE_LOCK must be released.
2444 * qla2x00 local function return status code.
2450 qla2x00_login_fabric(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t domain,
2451 uint8_t area, uint8_t al_pa, uint16_t *mb, uint8_t opt)
2455 mbx_cmd_t *mcp = &mc;
2456 struct qla_hw_data *ha = vha->hw;
2458 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1067,
2459 "Entered %s.\n", __func__);
2461 mcp->mb[0] = MBC_LOGIN_FABRIC_PORT;
2462 mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
2463 if (HAS_EXTENDED_IDS(ha)) {
2464 mcp->mb[1] = loop_id;
2466 mcp->out_mb |= MBX_10;
2468 mcp->mb[1] = (loop_id << 8) | opt;
2470 mcp->mb[2] = domain;
2471 mcp->mb[3] = area << 8 | al_pa;
2473 mcp->in_mb = MBX_7|MBX_6|MBX_2|MBX_1|MBX_0;
2474 mcp->tov = (ha->login_timeout * 2) + (ha->login_timeout / 2);
2476 rval = qla2x00_mailbox_command(vha, mcp);
2478 /* Return mailbox statuses. */
2485 /* COS retrieved from Get-Port-Database mailbox command. */
2489 if (rval != QLA_SUCCESS) {
2490 /* RLU tmp code: need to change main mailbox_command function to
2491 * return ok even when the mailbox completion value is not
2492 * SUCCESS. The caller needs to be responsible to interpret
2493 * the return values of this mailbox command if we're not
2494 * to change too much of the existing code.
2496 if (mcp->mb[0] == 0x4001 || mcp->mb[0] == 0x4002 ||
2497 mcp->mb[0] == 0x4003 || mcp->mb[0] == 0x4005 ||
2498 mcp->mb[0] == 0x4006)
2502 ql_dbg(ql_dbg_mbx, vha, 0x1068,
2503 "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x.\n",
2504 rval, mcp->mb[0], mcp->mb[1], mcp->mb[2]);
2507 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1069,
2508 "Done %s.\n", __func__);
2515 * qla2x00_login_local_device
2516 * Issue login loop port mailbox command.
2519 * ha = adapter block pointer.
2520 * loop_id = device loop ID.
2521 * opt = command options.
2524 * Return status code.
2531 qla2x00_login_local_device(scsi_qla_host_t *vha, fc_port_t *fcport,
2532 uint16_t *mb_ret, uint8_t opt)
2536 mbx_cmd_t *mcp = &mc;
2537 struct qla_hw_data *ha = vha->hw;
2539 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x106a,
2540 "Entered %s.\n", __func__);
2542 if (IS_FWI2_CAPABLE(ha))
2543 return qla24xx_login_fabric(vha, fcport->loop_id,
2544 fcport->d_id.b.domain, fcport->d_id.b.area,
2545 fcport->d_id.b.al_pa, mb_ret, opt);
2547 mcp->mb[0] = MBC_LOGIN_LOOP_PORT;
2548 if (HAS_EXTENDED_IDS(ha))
2549 mcp->mb[1] = fcport->loop_id;
2551 mcp->mb[1] = fcport->loop_id << 8;
2553 mcp->out_mb = MBX_2|MBX_1|MBX_0;
2554 mcp->in_mb = MBX_7|MBX_6|MBX_1|MBX_0;
2555 mcp->tov = (ha->login_timeout * 2) + (ha->login_timeout / 2);
2557 rval = qla2x00_mailbox_command(vha, mcp);
2559 /* Return mailbox statuses. */
2560 if (mb_ret != NULL) {
2561 mb_ret[0] = mcp->mb[0];
2562 mb_ret[1] = mcp->mb[1];
2563 mb_ret[6] = mcp->mb[6];
2564 mb_ret[7] = mcp->mb[7];
2567 if (rval != QLA_SUCCESS) {
2568 /* AV tmp code: need to change main mailbox_command function to
2569 * return ok even when the mailbox completion value is not
2570 * SUCCESS. The caller needs to be responsible to interpret
2571 * the return values of this mailbox command if we're not
2572 * to change too much of the existing code.
2574 if (mcp->mb[0] == 0x4005 || mcp->mb[0] == 0x4006)
2577 ql_dbg(ql_dbg_mbx, vha, 0x106b,
2578 "Failed=%x mb[0]=%x mb[1]=%x mb[6]=%x mb[7]=%x.\n",
2579 rval, mcp->mb[0], mcp->mb[1], mcp->mb[6], mcp->mb[7]);
2582 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x106c,
2583 "Done %s.\n", __func__);
2590 qla24xx_fabric_logout(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t domain,
2591 uint8_t area, uint8_t al_pa)
2594 struct logio_entry_24xx *lg;
2596 struct qla_hw_data *ha = vha->hw;
2597 struct req_que *req;
2599 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x106d,
2600 "Entered %s.\n", __func__);
2602 lg = dma_pool_zalloc(ha->s_dma_pool, GFP_KERNEL, &lg_dma);
2604 ql_log(ql_log_warn, vha, 0x106e,
2605 "Failed to allocate logout IOCB.\n");
2606 return QLA_MEMORY_ALLOC_FAILED;
2610 lg->entry_type = LOGINOUT_PORT_IOCB_TYPE;
2611 lg->entry_count = 1;
2612 lg->handle = MAKE_HANDLE(req->id, lg->handle);
2613 lg->nport_handle = cpu_to_le16(loop_id);
2615 cpu_to_le16(LCF_COMMAND_LOGO|LCF_IMPL_LOGO|
2617 lg->port_id[0] = al_pa;
2618 lg->port_id[1] = area;
2619 lg->port_id[2] = domain;
2620 lg->vp_index = vha->vp_idx;
2621 rval = qla2x00_issue_iocb_timeout(vha, lg, lg_dma, 0,
2622 (ha->r_a_tov / 10 * 2) + 2);
2623 if (rval != QLA_SUCCESS) {
2624 ql_dbg(ql_dbg_mbx, vha, 0x106f,
2625 "Failed to issue logout IOCB (%x).\n", rval);
2626 } else if (lg->entry_status != 0) {
2627 ql_dbg(ql_dbg_mbx, vha, 0x1070,
2628 "Failed to complete IOCB -- error status (%x).\n",
2630 rval = QLA_FUNCTION_FAILED;
2631 } else if (lg->comp_status != cpu_to_le16(CS_COMPLETE)) {
2632 ql_dbg(ql_dbg_mbx, vha, 0x1071,
2633 "Failed to complete IOCB -- completion status (%x) "
2634 "ioparam=%x/%x.\n", le16_to_cpu(lg->comp_status),
2635 le32_to_cpu(lg->io_parameter[0]),
2636 le32_to_cpu(lg->io_parameter[1]));
2639 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1072,
2640 "Done %s.\n", __func__);
2643 dma_pool_free(ha->s_dma_pool, lg, lg_dma);
2649 * qla2x00_fabric_logout
2650 * Issue logout fabric port mailbox command.
2653 * ha = adapter block pointer.
2654 * loop_id = device loop ID.
2655 * TARGET_QUEUE_LOCK must be released.
2656 * ADAPTER_STATE_LOCK must be released.
2659 * qla2x00 local function return status code.
2665 qla2x00_fabric_logout(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t domain,
2666 uint8_t area, uint8_t al_pa)
2670 mbx_cmd_t *mcp = &mc;
2672 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1073,
2673 "Entered %s.\n", __func__);
2675 mcp->mb[0] = MBC_LOGOUT_FABRIC_PORT;
2676 mcp->out_mb = MBX_1|MBX_0;
2677 if (HAS_EXTENDED_IDS(vha->hw)) {
2678 mcp->mb[1] = loop_id;
2680 mcp->out_mb |= MBX_10;
2682 mcp->mb[1] = loop_id << 8;
2685 mcp->in_mb = MBX_1|MBX_0;
2686 mcp->tov = MBX_TOV_SECONDS;
2688 rval = qla2x00_mailbox_command(vha, mcp);
2690 if (rval != QLA_SUCCESS) {
2692 ql_dbg(ql_dbg_mbx, vha, 0x1074,
2693 "Failed=%x mb[1]=%x.\n", rval, mcp->mb[1]);
2696 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1075,
2697 "Done %s.\n", __func__);
2704 * qla2x00_full_login_lip
2705 * Issue full login LIP mailbox command.
2708 * ha = adapter block pointer.
2709 * TARGET_QUEUE_LOCK must be released.
2710 * ADAPTER_STATE_LOCK must be released.
2713 * qla2x00 local function return status code.
2719 qla2x00_full_login_lip(scsi_qla_host_t *vha)
2723 mbx_cmd_t *mcp = &mc;
2725 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1076,
2726 "Entered %s.\n", __func__);
2728 mcp->mb[0] = MBC_LIP_FULL_LOGIN;
2729 mcp->mb[1] = IS_FWI2_CAPABLE(vha->hw) ? BIT_3 : 0;
2732 mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
2734 mcp->tov = MBX_TOV_SECONDS;
2736 rval = qla2x00_mailbox_command(vha, mcp);
2738 if (rval != QLA_SUCCESS) {
2740 ql_dbg(ql_dbg_mbx, vha, 0x1077, "Failed=%x.\n", rval);
2743 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1078,
2744 "Done %s.\n", __func__);
2751 * qla2x00_get_id_list
2754 * ha = adapter block pointer.
2757 * qla2x00 local function return status code.
2763 qla2x00_get_id_list(scsi_qla_host_t *vha, void *id_list, dma_addr_t id_list_dma,
2768 mbx_cmd_t *mcp = &mc;
2770 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1079,
2771 "Entered %s.\n", __func__);
2773 if (id_list == NULL)
2774 return QLA_FUNCTION_FAILED;
2776 mcp->mb[0] = MBC_GET_ID_LIST;
2777 mcp->out_mb = MBX_0;
2778 if (IS_FWI2_CAPABLE(vha->hw)) {
2779 mcp->mb[2] = MSW(id_list_dma);
2780 mcp->mb[3] = LSW(id_list_dma);
2781 mcp->mb[6] = MSW(MSD(id_list_dma));
2782 mcp->mb[7] = LSW(MSD(id_list_dma));
2784 mcp->mb[9] = vha->vp_idx;
2785 mcp->out_mb |= MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2;
2787 mcp->mb[1] = MSW(id_list_dma);
2788 mcp->mb[2] = LSW(id_list_dma);
2789 mcp->mb[3] = MSW(MSD(id_list_dma));
2790 mcp->mb[6] = LSW(MSD(id_list_dma));
2791 mcp->out_mb |= MBX_6|MBX_3|MBX_2|MBX_1;
2793 mcp->in_mb = MBX_1|MBX_0;
2794 mcp->tov = MBX_TOV_SECONDS;
2796 rval = qla2x00_mailbox_command(vha, mcp);
2798 if (rval != QLA_SUCCESS) {
2800 ql_dbg(ql_dbg_mbx, vha, 0x107a, "Failed=%x.\n", rval);
2802 *entries = mcp->mb[1];
2803 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x107b,
2804 "Done %s.\n", __func__);
2811 * qla2x00_get_resource_cnts
2812 * Get current firmware resource counts.
2815 * ha = adapter block pointer.
2818 * qla2x00 local function return status code.
2824 qla2x00_get_resource_cnts(scsi_qla_host_t *vha)
2826 struct qla_hw_data *ha = vha->hw;
2829 mbx_cmd_t *mcp = &mc;
2831 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x107c,
2832 "Entered %s.\n", __func__);
2834 mcp->mb[0] = MBC_GET_RESOURCE_COUNTS;
2835 mcp->out_mb = MBX_0;
2836 mcp->in_mb = MBX_11|MBX_10|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
2837 if (IS_QLA81XX(vha->hw) || IS_QLA83XX(vha->hw) || IS_QLA27XX(vha->hw))
2838 mcp->in_mb |= MBX_12;
2839 mcp->tov = MBX_TOV_SECONDS;
2841 rval = qla2x00_mailbox_command(vha, mcp);
2843 if (rval != QLA_SUCCESS) {
2845 ql_dbg(ql_dbg_mbx, vha, 0x107d,
2846 "Failed mb[0]=%x.\n", mcp->mb[0]);
2848 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x107e,
2849 "Done %s mb1=%x mb2=%x mb3=%x mb6=%x mb7=%x mb10=%x "
2850 "mb11=%x mb12=%x.\n", __func__, mcp->mb[1], mcp->mb[2],
2851 mcp->mb[3], mcp->mb[6], mcp->mb[7], mcp->mb[10],
2852 mcp->mb[11], mcp->mb[12]);
2854 ha->orig_fw_tgt_xcb_count = mcp->mb[1];
2855 ha->cur_fw_tgt_xcb_count = mcp->mb[2];
2856 ha->cur_fw_xcb_count = mcp->mb[3];
2857 ha->orig_fw_xcb_count = mcp->mb[6];
2858 ha->cur_fw_iocb_count = mcp->mb[7];
2859 ha->orig_fw_iocb_count = mcp->mb[10];
2860 if (ha->flags.npiv_supported)
2861 ha->max_npiv_vports = mcp->mb[11];
2862 if (IS_QLA81XX(ha) || IS_QLA83XX(ha) || IS_QLA27XX(ha))
2863 ha->fw_max_fcf_count = mcp->mb[12];
2870 * qla2x00_get_fcal_position_map
2871 * Get FCAL (LILP) position map using mailbox command
2874 * ha = adapter state pointer.
2875 * pos_map = buffer pointer (can be NULL).
2878 * qla2x00 local function return status code.
2884 qla2x00_get_fcal_position_map(scsi_qla_host_t *vha, char *pos_map)
2888 mbx_cmd_t *mcp = &mc;
2890 dma_addr_t pmap_dma;
2891 struct qla_hw_data *ha = vha->hw;
2893 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x107f,
2894 "Entered %s.\n", __func__);
2896 pmap = dma_pool_zalloc(ha->s_dma_pool, GFP_KERNEL, &pmap_dma);
2898 ql_log(ql_log_warn, vha, 0x1080,
2899 "Memory alloc failed.\n");
2900 return QLA_MEMORY_ALLOC_FAILED;
2903 mcp->mb[0] = MBC_GET_FC_AL_POSITION_MAP;
2904 mcp->mb[2] = MSW(pmap_dma);
2905 mcp->mb[3] = LSW(pmap_dma);
2906 mcp->mb[6] = MSW(MSD(pmap_dma));
2907 mcp->mb[7] = LSW(MSD(pmap_dma));
2908 mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_0;
2909 mcp->in_mb = MBX_1|MBX_0;
2910 mcp->buf_size = FCAL_MAP_SIZE;
2911 mcp->flags = MBX_DMA_IN;
2912 mcp->tov = (ha->login_timeout * 2) + (ha->login_timeout / 2);
2913 rval = qla2x00_mailbox_command(vha, mcp);
2915 if (rval == QLA_SUCCESS) {
2916 ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1081,
2917 "mb0/mb1=%x/%X FC/AL position map size (%x).\n",
2918 mcp->mb[0], mcp->mb[1], (unsigned)pmap[0]);
2919 ql_dump_buffer(ql_dbg_mbx + ql_dbg_buffer, vha, 0x111d,
2923 memcpy(pos_map, pmap, FCAL_MAP_SIZE);
2925 dma_pool_free(ha->s_dma_pool, pmap, pmap_dma);
2927 if (rval != QLA_SUCCESS) {
2928 ql_dbg(ql_dbg_mbx, vha, 0x1082, "Failed=%x.\n", rval);
2930 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1083,
2931 "Done %s.\n", __func__);
2938 * qla2x00_get_link_status
2941 * ha = adapter block pointer.
2942 * loop_id = device loop ID.
2943 * ret_buf = pointer to link status return buffer.
2947 * BIT_0 = mem alloc error.
2948 * BIT_1 = mailbox error.
2951 qla2x00_get_link_status(scsi_qla_host_t *vha, uint16_t loop_id,
2952 struct link_statistics *stats, dma_addr_t stats_dma)
2956 mbx_cmd_t *mcp = &mc;
2957 uint32_t *iter = (void *)stats;
2958 ushort dwords = offsetof(typeof(*stats), link_up_cnt)/sizeof(*iter);
2959 struct qla_hw_data *ha = vha->hw;
2961 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1084,
2962 "Entered %s.\n", __func__);
2964 mcp->mb[0] = MBC_GET_LINK_STATUS;
2965 mcp->mb[2] = MSW(LSD(stats_dma));
2966 mcp->mb[3] = LSW(LSD(stats_dma));
2967 mcp->mb[6] = MSW(MSD(stats_dma));
2968 mcp->mb[7] = LSW(MSD(stats_dma));
2969 mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_0;
2971 if (IS_FWI2_CAPABLE(ha)) {
2972 mcp->mb[1] = loop_id;
2975 mcp->out_mb |= MBX_10|MBX_4|MBX_1;
2976 mcp->in_mb |= MBX_1;
2977 } else if (HAS_EXTENDED_IDS(ha)) {
2978 mcp->mb[1] = loop_id;
2980 mcp->out_mb |= MBX_10|MBX_1;
2982 mcp->mb[1] = loop_id << 8;
2983 mcp->out_mb |= MBX_1;
2985 mcp->tov = MBX_TOV_SECONDS;
2986 mcp->flags = IOCTL_CMD;
2987 rval = qla2x00_mailbox_command(vha, mcp);
2989 if (rval == QLA_SUCCESS) {
2990 if (mcp->mb[0] != MBS_COMMAND_COMPLETE) {
2991 ql_dbg(ql_dbg_mbx, vha, 0x1085,
2992 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
2993 rval = QLA_FUNCTION_FAILED;
2995 /* Re-endianize - firmware data is le32. */
2996 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1086,
2997 "Done %s.\n", __func__);
2998 for ( ; dwords--; iter++)
3003 ql_dbg(ql_dbg_mbx, vha, 0x1087, "Failed=%x.\n", rval);
3010 qla24xx_get_isp_stats(scsi_qla_host_t *vha, struct link_statistics *stats,
3011 dma_addr_t stats_dma, uint16_t options)
3015 mbx_cmd_t *mcp = &mc;
3016 uint32_t *iter, dwords;
3018 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1088,
3019 "Entered %s.\n", __func__);
3021 memset(&mc, 0, sizeof(mc));
3022 mc.mb[0] = MBC_GET_LINK_PRIV_STATS;
3023 mc.mb[2] = MSW(stats_dma);
3024 mc.mb[3] = LSW(stats_dma);
3025 mc.mb[6] = MSW(MSD(stats_dma));
3026 mc.mb[7] = LSW(MSD(stats_dma));
3027 mc.mb[8] = sizeof(struct link_statistics) / 4;
3028 mc.mb[9] = cpu_to_le16(vha->vp_idx);
3029 mc.mb[10] = cpu_to_le16(options);
3031 rval = qla24xx_send_mb_cmd(vha, &mc);
3033 if (rval == QLA_SUCCESS) {
3034 if (mcp->mb[0] != MBS_COMMAND_COMPLETE) {
3035 ql_dbg(ql_dbg_mbx, vha, 0x1089,
3036 "Failed mb[0]=%x.\n", mcp->mb[0]);
3037 rval = QLA_FUNCTION_FAILED;
3039 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x108a,
3040 "Done %s.\n", __func__);
3041 /* Re-endianize - firmware data is le32. */
3042 dwords = sizeof(struct link_statistics) / 4;
3043 iter = &stats->link_fail_cnt;
3044 for ( ; dwords--; iter++)
3049 ql_dbg(ql_dbg_mbx, vha, 0x108b, "Failed=%x.\n", rval);
3056 qla24xx_abort_command(srb_t *sp)
3059 unsigned long flags = 0;
3061 struct abort_entry_24xx *abt;
3064 fc_port_t *fcport = sp->fcport;
3065 struct scsi_qla_host *vha = fcport->vha;
3066 struct qla_hw_data *ha = vha->hw;
3067 struct req_que *req = vha->req;
3069 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x108c,
3070 "Entered %s.\n", __func__);
3073 req = sp->qpair->req;
3075 if (ql2xasynctmfenable)
3076 return qla24xx_async_abort_command(sp);
3078 spin_lock_irqsave(&ha->hardware_lock, flags);
3079 for (handle = 1; handle < req->num_outstanding_cmds; handle++) {
3080 if (req->outstanding_cmds[handle] == sp)
3083 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3084 if (handle == req->num_outstanding_cmds) {
3085 /* Command not found. */
3086 return QLA_FUNCTION_FAILED;
3089 abt = dma_pool_zalloc(ha->s_dma_pool, GFP_KERNEL, &abt_dma);
3091 ql_log(ql_log_warn, vha, 0x108d,
3092 "Failed to allocate abort IOCB.\n");
3093 return QLA_MEMORY_ALLOC_FAILED;
3096 abt->entry_type = ABORT_IOCB_TYPE;
3097 abt->entry_count = 1;
3098 abt->handle = MAKE_HANDLE(req->id, abt->handle);
3099 abt->nport_handle = cpu_to_le16(fcport->loop_id);
3100 abt->handle_to_abort = MAKE_HANDLE(req->id, handle);
3101 abt->port_id[0] = fcport->d_id.b.al_pa;
3102 abt->port_id[1] = fcport->d_id.b.area;
3103 abt->port_id[2] = fcport->d_id.b.domain;
3104 abt->vp_index = fcport->vha->vp_idx;
3106 abt->req_que_no = cpu_to_le16(req->id);
3108 rval = qla2x00_issue_iocb(vha, abt, abt_dma, 0);
3109 if (rval != QLA_SUCCESS) {
3110 ql_dbg(ql_dbg_mbx, vha, 0x108e,
3111 "Failed to issue IOCB (%x).\n", rval);
3112 } else if (abt->entry_status != 0) {
3113 ql_dbg(ql_dbg_mbx, vha, 0x108f,
3114 "Failed to complete IOCB -- error status (%x).\n",
3116 rval = QLA_FUNCTION_FAILED;
3117 } else if (abt->nport_handle != cpu_to_le16(0)) {
3118 ql_dbg(ql_dbg_mbx, vha, 0x1090,
3119 "Failed to complete IOCB -- completion status (%x).\n",
3120 le16_to_cpu(abt->nport_handle));
3121 if (abt->nport_handle == CS_IOCB_ERROR)
3122 rval = QLA_FUNCTION_PARAMETER_ERROR;
3124 rval = QLA_FUNCTION_FAILED;
3126 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1091,
3127 "Done %s.\n", __func__);
3130 dma_pool_free(ha->s_dma_pool, abt, abt_dma);
3135 struct tsk_mgmt_cmd {
3137 struct tsk_mgmt_entry tsk;
3138 struct sts_entry_24xx sts;
3143 __qla24xx_issue_tmf(char *name, uint32_t type, struct fc_port *fcport,
3144 uint64_t l, int tag)
3147 struct tsk_mgmt_cmd *tsk;
3148 struct sts_entry_24xx *sts;
3150 scsi_qla_host_t *vha;
3151 struct qla_hw_data *ha;
3152 struct req_que *req;
3153 struct rsp_que *rsp;
3154 struct qla_qpair *qpair;
3160 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1092,
3161 "Entered %s.\n", __func__);
3163 if (vha->vp_idx && vha->qpair) {
3172 tsk = dma_pool_zalloc(ha->s_dma_pool, GFP_KERNEL, &tsk_dma);
3174 ql_log(ql_log_warn, vha, 0x1093,
3175 "Failed to allocate task management IOCB.\n");
3176 return QLA_MEMORY_ALLOC_FAILED;
3179 tsk->p.tsk.entry_type = TSK_MGMT_IOCB_TYPE;
3180 tsk->p.tsk.entry_count = 1;
3181 tsk->p.tsk.handle = MAKE_HANDLE(req->id, tsk->p.tsk.handle);
3182 tsk->p.tsk.nport_handle = cpu_to_le16(fcport->loop_id);
3183 tsk->p.tsk.timeout = cpu_to_le16(ha->r_a_tov / 10 * 2);
3184 tsk->p.tsk.control_flags = cpu_to_le32(type);
3185 tsk->p.tsk.port_id[0] = fcport->d_id.b.al_pa;
3186 tsk->p.tsk.port_id[1] = fcport->d_id.b.area;
3187 tsk->p.tsk.port_id[2] = fcport->d_id.b.domain;
3188 tsk->p.tsk.vp_index = fcport->vha->vp_idx;
3189 if (type == TCF_LUN_RESET) {
3190 int_to_scsilun(l, &tsk->p.tsk.lun);
3191 host_to_fcp_swap((uint8_t *)&tsk->p.tsk.lun,
3192 sizeof(tsk->p.tsk.lun));
3196 rval = qla2x00_issue_iocb(vha, tsk, tsk_dma, 0);
3197 if (rval != QLA_SUCCESS) {
3198 ql_dbg(ql_dbg_mbx, vha, 0x1094,
3199 "Failed to issue %s reset IOCB (%x).\n", name, rval);
3200 } else if (sts->entry_status != 0) {
3201 ql_dbg(ql_dbg_mbx, vha, 0x1095,
3202 "Failed to complete IOCB -- error status (%x).\n",
3204 rval = QLA_FUNCTION_FAILED;
3205 } else if (sts->comp_status != cpu_to_le16(CS_COMPLETE)) {
3206 ql_dbg(ql_dbg_mbx, vha, 0x1096,
3207 "Failed to complete IOCB -- completion status (%x).\n",
3208 le16_to_cpu(sts->comp_status));
3209 rval = QLA_FUNCTION_FAILED;
3210 } else if (le16_to_cpu(sts->scsi_status) &
3211 SS_RESPONSE_INFO_LEN_VALID) {
3212 if (le32_to_cpu(sts->rsp_data_len) < 4) {
3213 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1097,
3214 "Ignoring inconsistent data length -- not enough "
3215 "response info (%d).\n",
3216 le32_to_cpu(sts->rsp_data_len));
3217 } else if (sts->data[3]) {
3218 ql_dbg(ql_dbg_mbx, vha, 0x1098,
3219 "Failed to complete IOCB -- response (%x).\n",
3221 rval = QLA_FUNCTION_FAILED;
3225 /* Issue marker IOCB. */
3226 rval2 = qla2x00_marker(vha, req, rsp, fcport->loop_id, l,
3227 type == TCF_LUN_RESET ? MK_SYNC_ID_LUN: MK_SYNC_ID);
3228 if (rval2 != QLA_SUCCESS) {
3229 ql_dbg(ql_dbg_mbx, vha, 0x1099,
3230 "Failed to issue marker IOCB (%x).\n", rval2);
3232 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x109a,
3233 "Done %s.\n", __func__);
3236 dma_pool_free(ha->s_dma_pool, tsk, tsk_dma);
3242 qla24xx_abort_target(struct fc_port *fcport, uint64_t l, int tag)
3244 struct qla_hw_data *ha = fcport->vha->hw;
3246 if ((ql2xasynctmfenable) && IS_FWI2_CAPABLE(ha))
3247 return qla2x00_async_tm_cmd(fcport, TCF_TARGET_RESET, l, tag);
3249 return __qla24xx_issue_tmf("Target", TCF_TARGET_RESET, fcport, l, tag);
3253 qla24xx_lun_reset(struct fc_port *fcport, uint64_t l, int tag)
3255 struct qla_hw_data *ha = fcport->vha->hw;
3257 if ((ql2xasynctmfenable) && IS_FWI2_CAPABLE(ha))
3258 return qla2x00_async_tm_cmd(fcport, TCF_LUN_RESET, l, tag);
3260 return __qla24xx_issue_tmf("Lun", TCF_LUN_RESET, fcport, l, tag);
3264 qla2x00_system_error(scsi_qla_host_t *vha)
3268 mbx_cmd_t *mcp = &mc;
3269 struct qla_hw_data *ha = vha->hw;
3271 if (!IS_QLA23XX(ha) && !IS_FWI2_CAPABLE(ha))
3272 return QLA_FUNCTION_FAILED;
3274 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x109b,
3275 "Entered %s.\n", __func__);
3277 mcp->mb[0] = MBC_GEN_SYSTEM_ERROR;
3278 mcp->out_mb = MBX_0;
3282 rval = qla2x00_mailbox_command(vha, mcp);
3284 if (rval != QLA_SUCCESS) {
3285 ql_dbg(ql_dbg_mbx, vha, 0x109c, "Failed=%x.\n", rval);
3287 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x109d,
3288 "Done %s.\n", __func__);
3295 qla2x00_write_serdes_word(scsi_qla_host_t *vha, uint16_t addr, uint16_t data)
3299 mbx_cmd_t *mcp = &mc;
3301 if (!IS_QLA25XX(vha->hw) && !IS_QLA2031(vha->hw) &&
3302 !IS_QLA27XX(vha->hw))
3303 return QLA_FUNCTION_FAILED;
3305 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1182,
3306 "Entered %s.\n", __func__);
3308 mcp->mb[0] = MBC_WRITE_SERDES;
3310 if (IS_QLA2031(vha->hw))
3311 mcp->mb[2] = data & 0xff;
3316 mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
3318 mcp->tov = MBX_TOV_SECONDS;
3320 rval = qla2x00_mailbox_command(vha, mcp);
3322 if (rval != QLA_SUCCESS) {
3323 ql_dbg(ql_dbg_mbx, vha, 0x1183,
3324 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
3326 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1184,
3327 "Done %s.\n", __func__);
3334 qla2x00_read_serdes_word(scsi_qla_host_t *vha, uint16_t addr, uint16_t *data)
3338 mbx_cmd_t *mcp = &mc;
3340 if (!IS_QLA25XX(vha->hw) && !IS_QLA2031(vha->hw) &&
3341 !IS_QLA27XX(vha->hw))
3342 return QLA_FUNCTION_FAILED;
3344 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1185,
3345 "Entered %s.\n", __func__);
3347 mcp->mb[0] = MBC_READ_SERDES;
3350 mcp->out_mb = MBX_3|MBX_1|MBX_0;
3351 mcp->in_mb = MBX_1|MBX_0;
3352 mcp->tov = MBX_TOV_SECONDS;
3354 rval = qla2x00_mailbox_command(vha, mcp);
3356 if (IS_QLA2031(vha->hw))
3357 *data = mcp->mb[1] & 0xff;
3361 if (rval != QLA_SUCCESS) {
3362 ql_dbg(ql_dbg_mbx, vha, 0x1186,
3363 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
3365 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1187,
3366 "Done %s.\n", __func__);
3373 qla8044_write_serdes_word(scsi_qla_host_t *vha, uint32_t addr, uint32_t data)
3377 mbx_cmd_t *mcp = &mc;
3379 if (!IS_QLA8044(vha->hw))
3380 return QLA_FUNCTION_FAILED;
3382 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x11a0,
3383 "Entered %s.\n", __func__);
3385 mcp->mb[0] = MBC_SET_GET_ETH_SERDES_REG;
3386 mcp->mb[1] = HCS_WRITE_SERDES;
3387 mcp->mb[3] = LSW(addr);
3388 mcp->mb[4] = MSW(addr);
3389 mcp->mb[5] = LSW(data);
3390 mcp->mb[6] = MSW(data);
3391 mcp->out_mb = MBX_6|MBX_5|MBX_4|MBX_3|MBX_1|MBX_0;
3393 mcp->tov = MBX_TOV_SECONDS;
3395 rval = qla2x00_mailbox_command(vha, mcp);
3397 if (rval != QLA_SUCCESS) {
3398 ql_dbg(ql_dbg_mbx, vha, 0x11a1,
3399 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
3401 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1188,
3402 "Done %s.\n", __func__);
3409 qla8044_read_serdes_word(scsi_qla_host_t *vha, uint32_t addr, uint32_t *data)
3413 mbx_cmd_t *mcp = &mc;
3415 if (!IS_QLA8044(vha->hw))
3416 return QLA_FUNCTION_FAILED;
3418 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1189,
3419 "Entered %s.\n", __func__);
3421 mcp->mb[0] = MBC_SET_GET_ETH_SERDES_REG;
3422 mcp->mb[1] = HCS_READ_SERDES;
3423 mcp->mb[3] = LSW(addr);
3424 mcp->mb[4] = MSW(addr);
3425 mcp->out_mb = MBX_4|MBX_3|MBX_1|MBX_0;
3426 mcp->in_mb = MBX_2|MBX_1|MBX_0;
3427 mcp->tov = MBX_TOV_SECONDS;
3429 rval = qla2x00_mailbox_command(vha, mcp);
3431 *data = mcp->mb[2] << 16 | mcp->mb[1];
3433 if (rval != QLA_SUCCESS) {
3434 ql_dbg(ql_dbg_mbx, vha, 0x118a,
3435 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
3437 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x118b,
3438 "Done %s.\n", __func__);
3445 * qla2x00_set_serdes_params() -
3454 qla2x00_set_serdes_params(scsi_qla_host_t *vha, uint16_t sw_em_1g,
3455 uint16_t sw_em_2g, uint16_t sw_em_4g)
3459 mbx_cmd_t *mcp = &mc;
3461 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x109e,
3462 "Entered %s.\n", __func__);
3464 mcp->mb[0] = MBC_SERDES_PARAMS;
3466 mcp->mb[2] = sw_em_1g | BIT_15;
3467 mcp->mb[3] = sw_em_2g | BIT_15;
3468 mcp->mb[4] = sw_em_4g | BIT_15;
3469 mcp->out_mb = MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
3471 mcp->tov = MBX_TOV_SECONDS;
3473 rval = qla2x00_mailbox_command(vha, mcp);
3475 if (rval != QLA_SUCCESS) {
3477 ql_dbg(ql_dbg_mbx, vha, 0x109f,
3478 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
3481 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a0,
3482 "Done %s.\n", __func__);
3489 qla2x00_stop_firmware(scsi_qla_host_t *vha)
3493 mbx_cmd_t *mcp = &mc;
3495 if (!IS_FWI2_CAPABLE(vha->hw))
3496 return QLA_FUNCTION_FAILED;
3498 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a1,
3499 "Entered %s.\n", __func__);
3501 mcp->mb[0] = MBC_STOP_FIRMWARE;
3503 mcp->out_mb = MBX_1|MBX_0;
3507 rval = qla2x00_mailbox_command(vha, mcp);
3509 if (rval != QLA_SUCCESS) {
3510 ql_dbg(ql_dbg_mbx, vha, 0x10a2, "Failed=%x.\n", rval);
3511 if (mcp->mb[0] == MBS_INVALID_COMMAND)
3512 rval = QLA_INVALID_COMMAND;
3514 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a3,
3515 "Done %s.\n", __func__);
3522 qla2x00_enable_eft_trace(scsi_qla_host_t *vha, dma_addr_t eft_dma,
3527 mbx_cmd_t *mcp = &mc;
3529 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a4,
3530 "Entered %s.\n", __func__);
3532 if (!IS_FWI2_CAPABLE(vha->hw))
3533 return QLA_FUNCTION_FAILED;
3535 if (unlikely(pci_channel_offline(vha->hw->pdev)))
3536 return QLA_FUNCTION_FAILED;
3538 mcp->mb[0] = MBC_TRACE_CONTROL;
3539 mcp->mb[1] = TC_EFT_ENABLE;
3540 mcp->mb[2] = LSW(eft_dma);
3541 mcp->mb[3] = MSW(eft_dma);
3542 mcp->mb[4] = LSW(MSD(eft_dma));
3543 mcp->mb[5] = MSW(MSD(eft_dma));
3544 mcp->mb[6] = buffers;
3545 mcp->mb[7] = TC_AEN_DISABLE;
3546 mcp->out_mb = MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
3547 mcp->in_mb = MBX_1|MBX_0;
3548 mcp->tov = MBX_TOV_SECONDS;
3550 rval = qla2x00_mailbox_command(vha, mcp);
3551 if (rval != QLA_SUCCESS) {
3552 ql_dbg(ql_dbg_mbx, vha, 0x10a5,
3553 "Failed=%x mb[0]=%x mb[1]=%x.\n",
3554 rval, mcp->mb[0], mcp->mb[1]);
3556 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a6,
3557 "Done %s.\n", __func__);
3564 qla2x00_disable_eft_trace(scsi_qla_host_t *vha)
3568 mbx_cmd_t *mcp = &mc;
3570 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a7,
3571 "Entered %s.\n", __func__);
3573 if (!IS_FWI2_CAPABLE(vha->hw))
3574 return QLA_FUNCTION_FAILED;
3576 if (unlikely(pci_channel_offline(vha->hw->pdev)))
3577 return QLA_FUNCTION_FAILED;
3579 mcp->mb[0] = MBC_TRACE_CONTROL;
3580 mcp->mb[1] = TC_EFT_DISABLE;
3581 mcp->out_mb = MBX_1|MBX_0;
3582 mcp->in_mb = MBX_1|MBX_0;
3583 mcp->tov = MBX_TOV_SECONDS;
3585 rval = qla2x00_mailbox_command(vha, mcp);
3586 if (rval != QLA_SUCCESS) {
3587 ql_dbg(ql_dbg_mbx, vha, 0x10a8,
3588 "Failed=%x mb[0]=%x mb[1]=%x.\n",
3589 rval, mcp->mb[0], mcp->mb[1]);
3591 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a9,
3592 "Done %s.\n", __func__);
3599 qla2x00_enable_fce_trace(scsi_qla_host_t *vha, dma_addr_t fce_dma,
3600 uint16_t buffers, uint16_t *mb, uint32_t *dwords)
3604 mbx_cmd_t *mcp = &mc;
3606 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10aa,
3607 "Entered %s.\n", __func__);
3609 if (!IS_QLA25XX(vha->hw) && !IS_QLA81XX(vha->hw) &&
3610 !IS_QLA83XX(vha->hw) && !IS_QLA27XX(vha->hw))
3611 return QLA_FUNCTION_FAILED;
3613 if (unlikely(pci_channel_offline(vha->hw->pdev)))
3614 return QLA_FUNCTION_FAILED;
3616 mcp->mb[0] = MBC_TRACE_CONTROL;
3617 mcp->mb[1] = TC_FCE_ENABLE;
3618 mcp->mb[2] = LSW(fce_dma);
3619 mcp->mb[3] = MSW(fce_dma);
3620 mcp->mb[4] = LSW(MSD(fce_dma));
3621 mcp->mb[5] = MSW(MSD(fce_dma));
3622 mcp->mb[6] = buffers;
3623 mcp->mb[7] = TC_AEN_DISABLE;
3625 mcp->mb[9] = TC_FCE_DEFAULT_RX_SIZE;
3626 mcp->mb[10] = TC_FCE_DEFAULT_TX_SIZE;
3627 mcp->out_mb = MBX_10|MBX_9|MBX_8|MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|
3629 mcp->in_mb = MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
3630 mcp->tov = MBX_TOV_SECONDS;
3632 rval = qla2x00_mailbox_command(vha, mcp);
3633 if (rval != QLA_SUCCESS) {
3634 ql_dbg(ql_dbg_mbx, vha, 0x10ab,
3635 "Failed=%x mb[0]=%x mb[1]=%x.\n",
3636 rval, mcp->mb[0], mcp->mb[1]);
3638 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ac,
3639 "Done %s.\n", __func__);
3642 memcpy(mb, mcp->mb, 8 * sizeof(*mb));
3651 qla2x00_disable_fce_trace(scsi_qla_host_t *vha, uint64_t *wr, uint64_t *rd)
3655 mbx_cmd_t *mcp = &mc;
3657 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ad,
3658 "Entered %s.\n", __func__);
3660 if (!IS_FWI2_CAPABLE(vha->hw))
3661 return QLA_FUNCTION_FAILED;
3663 if (unlikely(pci_channel_offline(vha->hw->pdev)))
3664 return QLA_FUNCTION_FAILED;
3666 mcp->mb[0] = MBC_TRACE_CONTROL;
3667 mcp->mb[1] = TC_FCE_DISABLE;
3668 mcp->mb[2] = TC_FCE_DISABLE_TRACE;
3669 mcp->out_mb = MBX_2|MBX_1|MBX_0;
3670 mcp->in_mb = MBX_9|MBX_8|MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|
3672 mcp->tov = MBX_TOV_SECONDS;
3674 rval = qla2x00_mailbox_command(vha, mcp);
3675 if (rval != QLA_SUCCESS) {
3676 ql_dbg(ql_dbg_mbx, vha, 0x10ae,
3677 "Failed=%x mb[0]=%x mb[1]=%x.\n",
3678 rval, mcp->mb[0], mcp->mb[1]);
3680 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10af,
3681 "Done %s.\n", __func__);
3684 *wr = (uint64_t) mcp->mb[5] << 48 |
3685 (uint64_t) mcp->mb[4] << 32 |
3686 (uint64_t) mcp->mb[3] << 16 |
3687 (uint64_t) mcp->mb[2];
3689 *rd = (uint64_t) mcp->mb[9] << 48 |
3690 (uint64_t) mcp->mb[8] << 32 |
3691 (uint64_t) mcp->mb[7] << 16 |
3692 (uint64_t) mcp->mb[6];
3699 qla2x00_get_idma_speed(scsi_qla_host_t *vha, uint16_t loop_id,
3700 uint16_t *port_speed, uint16_t *mb)
3704 mbx_cmd_t *mcp = &mc;
3706 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b0,
3707 "Entered %s.\n", __func__);
3709 if (!IS_IIDMA_CAPABLE(vha->hw))
3710 return QLA_FUNCTION_FAILED;
3712 mcp->mb[0] = MBC_PORT_PARAMS;
3713 mcp->mb[1] = loop_id;
3714 mcp->mb[2] = mcp->mb[3] = 0;
3715 mcp->mb[9] = vha->vp_idx;
3716 mcp->out_mb = MBX_9|MBX_3|MBX_2|MBX_1|MBX_0;
3717 mcp->in_mb = MBX_3|MBX_1|MBX_0;
3718 mcp->tov = MBX_TOV_SECONDS;
3720 rval = qla2x00_mailbox_command(vha, mcp);
3722 /* Return mailbox statuses. */
3729 if (rval != QLA_SUCCESS) {
3730 ql_dbg(ql_dbg_mbx, vha, 0x10b1, "Failed=%x.\n", rval);
3732 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b2,
3733 "Done %s.\n", __func__);
3735 *port_speed = mcp->mb[3];
3742 qla2x00_set_idma_speed(scsi_qla_host_t *vha, uint16_t loop_id,
3743 uint16_t port_speed, uint16_t *mb)
3747 mbx_cmd_t *mcp = &mc;
3749 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b3,
3750 "Entered %s.\n", __func__);
3752 if (!IS_IIDMA_CAPABLE(vha->hw))
3753 return QLA_FUNCTION_FAILED;
3755 mcp->mb[0] = MBC_PORT_PARAMS;
3756 mcp->mb[1] = loop_id;
3758 mcp->mb[3] = port_speed & (BIT_5|BIT_4|BIT_3|BIT_2|BIT_1|BIT_0);
3759 mcp->mb[9] = vha->vp_idx;
3760 mcp->out_mb = MBX_9|MBX_3|MBX_2|MBX_1|MBX_0;
3761 mcp->in_mb = MBX_3|MBX_1|MBX_0;
3762 mcp->tov = MBX_TOV_SECONDS;
3764 rval = qla2x00_mailbox_command(vha, mcp);
3766 /* Return mailbox statuses. */
3773 if (rval != QLA_SUCCESS) {
3774 ql_dbg(ql_dbg_mbx, vha, 0x10b4,
3775 "Failed=%x.\n", rval);
3777 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b5,
3778 "Done %s.\n", __func__);
3785 qla24xx_report_id_acquisition(scsi_qla_host_t *vha,
3786 struct vp_rpt_id_entry_24xx *rptid_entry)
3788 struct qla_hw_data *ha = vha->hw;
3789 scsi_qla_host_t *vp = NULL;
3790 unsigned long flags;
3793 struct fc_port *fcport;
3795 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b6,
3796 "Entered %s.\n", __func__);
3798 if (rptid_entry->entry_status != 0)
3801 id.b.domain = rptid_entry->port_id[2];
3802 id.b.area = rptid_entry->port_id[1];
3803 id.b.al_pa = rptid_entry->port_id[0];
3805 ha->flags.n2n_ae = 0;
3807 if (rptid_entry->format == 0) {
3809 ql_dbg(ql_dbg_async, vha, 0x10b7,
3810 "Format 0 : Number of VPs setup %d, number of "
3811 "VPs acquired %d.\n", rptid_entry->vp_setup,
3812 rptid_entry->vp_acquired);
3813 ql_dbg(ql_dbg_async, vha, 0x10b8,
3814 "Primary port id %02x%02x%02x.\n",
3815 rptid_entry->port_id[2], rptid_entry->port_id[1],
3816 rptid_entry->port_id[0]);
3817 ha->current_topology = ISP_CFG_NL;
3818 qlt_update_host_map(vha, id);
3820 } else if (rptid_entry->format == 1) {
3822 ql_dbg(ql_dbg_async, vha, 0x10b9,
3823 "Format 1: VP[%d] enabled - status %d - with "
3824 "port id %02x%02x%02x.\n", rptid_entry->vp_idx,
3825 rptid_entry->vp_status,
3826 rptid_entry->port_id[2], rptid_entry->port_id[1],
3827 rptid_entry->port_id[0]);
3828 ql_dbg(ql_dbg_async, vha, 0x5075,
3829 "Format 1: Remote WWPN %8phC.\n",
3830 rptid_entry->u.f1.port_name);
3832 ql_dbg(ql_dbg_async, vha, 0x5075,
3833 "Format 1: WWPN %8phC.\n",
3836 switch (rptid_entry->u.f1.flags & TOPO_MASK) {
3838 ha->current_topology = ISP_CFG_N;
3839 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
3840 fcport = qla2x00_find_fcport_by_wwpn(vha,
3841 rptid_entry->u.f1.port_name, 1);
3842 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
3845 fcport->plogi_nack_done_deadline = jiffies + HZ;
3846 fcport->dm_login_expire = jiffies + 3*HZ;
3847 fcport->scan_state = QLA_FCPORT_FOUND;
3848 switch (fcport->disc_state) {
3850 set_bit(RELOGIN_NEEDED,
3853 case DSC_DELETE_PEND:
3856 qlt_schedule_sess_for_deletion(fcport);
3861 if (wwn_to_u64(vha->port_name) >
3862 wwn_to_u64(rptid_entry->u.f1.port_name)) {
3864 vha->d_id.b.al_pa = 1;
3865 ha->flags.n2n_bigger = 1;
3866 ha->flags.n2n_ae = 0;
3869 ql_dbg(ql_dbg_async, vha, 0x5075,
3870 "Format 1: assign local id %x remote id %x\n",
3871 vha->d_id.b24, id.b24);
3873 ql_dbg(ql_dbg_async, vha, 0x5075,
3874 "Format 1: Remote login - Waiting for WWPN %8phC.\n",
3875 rptid_entry->u.f1.port_name);
3876 ha->flags.n2n_bigger = 0;
3877 ha->flags.n2n_ae = 1;
3879 qla24xx_post_newsess_work(vha, &id,
3880 rptid_entry->u.f1.port_name,
3881 rptid_entry->u.f1.node_name,
3886 /* if our portname is higher then initiate N2N login */
3888 set_bit(N2N_LOGIN_NEEDED, &vha->dpc_flags);
3892 ha->current_topology = ISP_CFG_FL;
3895 ha->current_topology = ISP_CFG_F;
3901 ha->flags.gpsc_supported = 1;
3902 ha->current_topology = ISP_CFG_F;
3903 /* buffer to buffer credit flag */
3904 vha->flags.bbcr_enable = (rptid_entry->u.f1.bbcr & 0xf) != 0;
3906 if (rptid_entry->vp_idx == 0) {
3907 if (rptid_entry->vp_status == VP_STAT_COMPL) {
3908 /* FA-WWN is only for physical port */
3909 if (qla_ini_mode_enabled(vha) &&
3910 ha->flags.fawwpn_enabled &&
3911 (rptid_entry->u.f1.flags &
3913 memcpy(vha->port_name,
3914 rptid_entry->u.f1.port_name,
3918 qlt_update_host_map(vha, id);
3921 set_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags);
3922 set_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags);
3924 if (rptid_entry->vp_status != VP_STAT_COMPL &&
3925 rptid_entry->vp_status != VP_STAT_ID_CHG) {
3926 ql_dbg(ql_dbg_mbx, vha, 0x10ba,
3927 "Could not acquire ID for VP[%d].\n",
3928 rptid_entry->vp_idx);
3933 spin_lock_irqsave(&ha->vport_slock, flags);
3934 list_for_each_entry(vp, &ha->vp_list, list) {
3935 if (rptid_entry->vp_idx == vp->vp_idx) {
3940 spin_unlock_irqrestore(&ha->vport_slock, flags);
3945 qlt_update_host_map(vp, id);
3948 * Cannot configure here as we are still sitting on the
3949 * response queue. Handle it in dpc context.
3951 set_bit(VP_IDX_ACQUIRED, &vp->vp_flags);
3952 set_bit(REGISTER_FC4_NEEDED, &vp->dpc_flags);
3953 set_bit(REGISTER_FDMI_NEEDED, &vp->dpc_flags);
3955 set_bit(VP_DPC_NEEDED, &vha->dpc_flags);
3956 qla2xxx_wake_dpc(vha);
3957 } else if (rptid_entry->format == 2) {
3958 ql_dbg(ql_dbg_async, vha, 0x505f,
3959 "RIDA: format 2/N2N Primary port id %02x%02x%02x.\n",
3960 rptid_entry->port_id[2], rptid_entry->port_id[1],
3961 rptid_entry->port_id[0]);
3963 ql_dbg(ql_dbg_async, vha, 0x5075,
3964 "N2N: Remote WWPN %8phC.\n",
3965 rptid_entry->u.f2.port_name);
3967 /* N2N. direct connect */
3968 ha->current_topology = ISP_CFG_N;
3969 ha->flags.rida_fmt2 = 1;
3970 vha->d_id.b.domain = rptid_entry->port_id[2];
3971 vha->d_id.b.area = rptid_entry->port_id[1];
3972 vha->d_id.b.al_pa = rptid_entry->port_id[0];
3974 ha->flags.n2n_ae = 1;
3975 spin_lock_irqsave(&ha->vport_slock, flags);
3976 qlt_update_vp_map(vha, SET_AL_PA);
3977 spin_unlock_irqrestore(&ha->vport_slock, flags);
3979 list_for_each_entry(fcport, &vha->vp_fcports, list) {
3980 fcport->scan_state = QLA_FCPORT_SCAN;
3983 fcport = qla2x00_find_fcport_by_wwpn(vha,
3984 rptid_entry->u.f2.port_name, 1);
3987 fcport->login_retry = vha->hw->login_retry_count;
3988 fcport->plogi_nack_done_deadline = jiffies + HZ;
3989 fcport->scan_state = QLA_FCPORT_FOUND;
3995 * qla24xx_modify_vp_config
3996 * Change VP configuration for vha
3999 * vha = adapter block pointer.
4002 * qla2xxx local function return status code.
4008 qla24xx_modify_vp_config(scsi_qla_host_t *vha)
4011 struct vp_config_entry_24xx *vpmod;
4012 dma_addr_t vpmod_dma;
4013 struct qla_hw_data *ha = vha->hw;
4014 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
4016 /* This can be called by the parent */
4018 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10bb,
4019 "Entered %s.\n", __func__);
4021 vpmod = dma_pool_zalloc(ha->s_dma_pool, GFP_KERNEL, &vpmod_dma);
4023 ql_log(ql_log_warn, vha, 0x10bc,
4024 "Failed to allocate modify VP IOCB.\n");
4025 return QLA_MEMORY_ALLOC_FAILED;
4028 vpmod->entry_type = VP_CONFIG_IOCB_TYPE;
4029 vpmod->entry_count = 1;
4030 vpmod->command = VCT_COMMAND_MOD_ENABLE_VPS;
4031 vpmod->vp_count = 1;
4032 vpmod->vp_index1 = vha->vp_idx;
4033 vpmod->options_idx1 = BIT_3|BIT_4|BIT_5;
4035 qlt_modify_vp_config(vha, vpmod);
4037 memcpy(vpmod->node_name_idx1, vha->node_name, WWN_SIZE);
4038 memcpy(vpmod->port_name_idx1, vha->port_name, WWN_SIZE);
4039 vpmod->entry_count = 1;
4041 rval = qla2x00_issue_iocb(base_vha, vpmod, vpmod_dma, 0);
4042 if (rval != QLA_SUCCESS) {
4043 ql_dbg(ql_dbg_mbx, vha, 0x10bd,
4044 "Failed to issue VP config IOCB (%x).\n", rval);
4045 } else if (vpmod->comp_status != 0) {
4046 ql_dbg(ql_dbg_mbx, vha, 0x10be,
4047 "Failed to complete IOCB -- error status (%x).\n",
4048 vpmod->comp_status);
4049 rval = QLA_FUNCTION_FAILED;
4050 } else if (vpmod->comp_status != cpu_to_le16(CS_COMPLETE)) {
4051 ql_dbg(ql_dbg_mbx, vha, 0x10bf,
4052 "Failed to complete IOCB -- completion status (%x).\n",
4053 le16_to_cpu(vpmod->comp_status));
4054 rval = QLA_FUNCTION_FAILED;
4057 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10c0,
4058 "Done %s.\n", __func__);
4059 fc_vport_set_state(vha->fc_vport, FC_VPORT_INITIALIZING);
4061 dma_pool_free(ha->s_dma_pool, vpmod, vpmod_dma);
4067 * qla2x00_send_change_request
4068 * Receive or disable RSCN request from fabric controller
4071 * ha = adapter block pointer
4072 * format = registration format:
4074 * 1 - Fabric detected registration
4075 * 2 - N_port detected registration
4076 * 3 - Full registration
4077 * FF - clear registration
4078 * vp_idx = Virtual port index
4081 * qla2x00 local function return status code.
4088 qla2x00_send_change_request(scsi_qla_host_t *vha, uint16_t format,
4093 mbx_cmd_t *mcp = &mc;
4095 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10c7,
4096 "Entered %s.\n", __func__);
4098 mcp->mb[0] = MBC_SEND_CHANGE_REQUEST;
4099 mcp->mb[1] = format;
4100 mcp->mb[9] = vp_idx;
4101 mcp->out_mb = MBX_9|MBX_1|MBX_0;
4102 mcp->in_mb = MBX_0|MBX_1;
4103 mcp->tov = MBX_TOV_SECONDS;
4105 rval = qla2x00_mailbox_command(vha, mcp);
4107 if (rval == QLA_SUCCESS) {
4108 if (mcp->mb[0] != MBS_COMMAND_COMPLETE) {
4118 qla2x00_dump_ram(scsi_qla_host_t *vha, dma_addr_t req_dma, uint32_t addr,
4123 mbx_cmd_t *mcp = &mc;
4125 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1009,
4126 "Entered %s.\n", __func__);
4128 if (MSW(addr) || IS_FWI2_CAPABLE(vha->hw)) {
4129 mcp->mb[0] = MBC_DUMP_RISC_RAM_EXTENDED;
4130 mcp->mb[8] = MSW(addr);
4131 mcp->out_mb = MBX_8|MBX_0;
4133 mcp->mb[0] = MBC_DUMP_RISC_RAM;
4134 mcp->out_mb = MBX_0;
4136 mcp->mb[1] = LSW(addr);
4137 mcp->mb[2] = MSW(req_dma);
4138 mcp->mb[3] = LSW(req_dma);
4139 mcp->mb[6] = MSW(MSD(req_dma));
4140 mcp->mb[7] = LSW(MSD(req_dma));
4141 mcp->out_mb |= MBX_7|MBX_6|MBX_3|MBX_2|MBX_1;
4142 if (IS_FWI2_CAPABLE(vha->hw)) {
4143 mcp->mb[4] = MSW(size);
4144 mcp->mb[5] = LSW(size);
4145 mcp->out_mb |= MBX_5|MBX_4;
4147 mcp->mb[4] = LSW(size);
4148 mcp->out_mb |= MBX_4;
4152 mcp->tov = MBX_TOV_SECONDS;
4154 rval = qla2x00_mailbox_command(vha, mcp);
4156 if (rval != QLA_SUCCESS) {
4157 ql_dbg(ql_dbg_mbx, vha, 0x1008,
4158 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4160 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1007,
4161 "Done %s.\n", __func__);
4166 /* 84XX Support **************************************************************/
4168 struct cs84xx_mgmt_cmd {
4170 struct verify_chip_entry_84xx req;
4171 struct verify_chip_rsp_84xx rsp;
4176 qla84xx_verify_chip(struct scsi_qla_host *vha, uint16_t *status)
4179 struct cs84xx_mgmt_cmd *mn;
4182 unsigned long flags;
4183 struct qla_hw_data *ha = vha->hw;
4185 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10c8,
4186 "Entered %s.\n", __func__);
4188 mn = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &mn_dma);
4190 return QLA_MEMORY_ALLOC_FAILED;
4194 options = ha->cs84xx->fw_update ? VCO_FORCE_UPDATE : 0;
4195 /* Diagnostic firmware? */
4196 /* options |= MENLO_DIAG_FW; */
4197 /* We update the firmware with only one data sequence. */
4198 options |= VCO_END_OF_DATA;
4202 memset(mn, 0, sizeof(*mn));
4203 mn->p.req.entry_type = VERIFY_CHIP_IOCB_TYPE;
4204 mn->p.req.entry_count = 1;
4205 mn->p.req.options = cpu_to_le16(options);
4207 ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x111c,
4208 "Dump of Verify Request.\n");
4209 ql_dump_buffer(ql_dbg_mbx + ql_dbg_buffer, vha, 0x111e,
4210 (uint8_t *)mn, sizeof(*mn));
4212 rval = qla2x00_issue_iocb_timeout(vha, mn, mn_dma, 0, 120);
4213 if (rval != QLA_SUCCESS) {
4214 ql_dbg(ql_dbg_mbx, vha, 0x10cb,
4215 "Failed to issue verify IOCB (%x).\n", rval);
4219 ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1110,
4220 "Dump of Verify Response.\n");
4221 ql_dump_buffer(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1118,
4222 (uint8_t *)mn, sizeof(*mn));
4224 status[0] = le16_to_cpu(mn->p.rsp.comp_status);
4225 status[1] = status[0] == CS_VCS_CHIP_FAILURE ?
4226 le16_to_cpu(mn->p.rsp.failure_code) : 0;
4227 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ce,
4228 "cs=%x fc=%x.\n", status[0], status[1]);
4230 if (status[0] != CS_COMPLETE) {
4231 rval = QLA_FUNCTION_FAILED;
4232 if (!(options & VCO_DONT_UPDATE_FW)) {
4233 ql_dbg(ql_dbg_mbx, vha, 0x10cf,
4234 "Firmware update failed. Retrying "
4235 "without update firmware.\n");
4236 options |= VCO_DONT_UPDATE_FW;
4237 options &= ~VCO_FORCE_UPDATE;
4241 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d0,
4242 "Firmware updated to %x.\n",
4243 le32_to_cpu(mn->p.rsp.fw_ver));
4245 /* NOTE: we only update OP firmware. */
4246 spin_lock_irqsave(&ha->cs84xx->access_lock, flags);
4247 ha->cs84xx->op_fw_version =
4248 le32_to_cpu(mn->p.rsp.fw_ver);
4249 spin_unlock_irqrestore(&ha->cs84xx->access_lock,
4255 dma_pool_free(ha->s_dma_pool, mn, mn_dma);
4257 if (rval != QLA_SUCCESS) {
4258 ql_dbg(ql_dbg_mbx, vha, 0x10d1,
4259 "Failed=%x.\n", rval);
4261 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d2,
4262 "Done %s.\n", __func__);
4269 qla25xx_init_req_que(struct scsi_qla_host *vha, struct req_que *req)
4272 unsigned long flags;
4274 mbx_cmd_t *mcp = &mc;
4275 struct qla_hw_data *ha = vha->hw;
4277 if (!ha->flags.fw_started)
4280 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d3,
4281 "Entered %s.\n", __func__);
4283 if (IS_SHADOW_REG_CAPABLE(ha))
4284 req->options |= BIT_13;
4286 mcp->mb[0] = MBC_INITIALIZE_MULTIQ;
4287 mcp->mb[1] = req->options;
4288 mcp->mb[2] = MSW(LSD(req->dma));
4289 mcp->mb[3] = LSW(LSD(req->dma));
4290 mcp->mb[6] = MSW(MSD(req->dma));
4291 mcp->mb[7] = LSW(MSD(req->dma));
4292 mcp->mb[5] = req->length;
4294 mcp->mb[10] = req->rsp->id;
4295 mcp->mb[12] = req->qos;
4296 mcp->mb[11] = req->vp_idx;
4297 mcp->mb[13] = req->rid;
4298 if (IS_QLA83XX(ha) || IS_QLA27XX(ha))
4301 mcp->mb[4] = req->id;
4302 /* que in ptr index */
4304 /* que out ptr index */
4305 mcp->mb[9] = *req->out_ptr = 0;
4306 mcp->out_mb = MBX_14|MBX_13|MBX_12|MBX_11|MBX_10|MBX_9|MBX_8|MBX_7|
4307 MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
4309 mcp->flags = MBX_DMA_OUT;
4310 mcp->tov = MBX_TOV_SECONDS * 2;
4312 if (IS_QLA81XX(ha) || IS_QLA83XX(ha) || IS_QLA27XX(ha))
4313 mcp->in_mb |= MBX_1;
4314 if (IS_QLA83XX(ha) || IS_QLA27XX(ha)) {
4315 mcp->out_mb |= MBX_15;
4316 /* debug q create issue in SR-IOV */
4317 mcp->in_mb |= MBX_9 | MBX_8 | MBX_7;
4320 spin_lock_irqsave(&ha->hardware_lock, flags);
4321 if (!(req->options & BIT_0)) {
4322 WRT_REG_DWORD(req->req_q_in, 0);
4323 if (!IS_QLA83XX(ha) && !IS_QLA27XX(ha))
4324 WRT_REG_DWORD(req->req_q_out, 0);
4326 spin_unlock_irqrestore(&ha->hardware_lock, flags);
4328 rval = qla2x00_mailbox_command(vha, mcp);
4329 if (rval != QLA_SUCCESS) {
4330 ql_dbg(ql_dbg_mbx, vha, 0x10d4,
4331 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4333 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d5,
4334 "Done %s.\n", __func__);
4341 qla25xx_init_rsp_que(struct scsi_qla_host *vha, struct rsp_que *rsp)
4344 unsigned long flags;
4346 mbx_cmd_t *mcp = &mc;
4347 struct qla_hw_data *ha = vha->hw;
4349 if (!ha->flags.fw_started)
4352 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d6,
4353 "Entered %s.\n", __func__);
4355 if (IS_SHADOW_REG_CAPABLE(ha))
4356 rsp->options |= BIT_13;
4358 mcp->mb[0] = MBC_INITIALIZE_MULTIQ;
4359 mcp->mb[1] = rsp->options;
4360 mcp->mb[2] = MSW(LSD(rsp->dma));
4361 mcp->mb[3] = LSW(LSD(rsp->dma));
4362 mcp->mb[6] = MSW(MSD(rsp->dma));
4363 mcp->mb[7] = LSW(MSD(rsp->dma));
4364 mcp->mb[5] = rsp->length;
4365 mcp->mb[14] = rsp->msix->entry;
4366 mcp->mb[13] = rsp->rid;
4367 if (IS_QLA83XX(ha) || IS_QLA27XX(ha))
4370 mcp->mb[4] = rsp->id;
4371 /* que in ptr index */
4372 mcp->mb[8] = *rsp->in_ptr = 0;
4373 /* que out ptr index */
4375 mcp->out_mb = MBX_14|MBX_13|MBX_9|MBX_8|MBX_7
4376 |MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
4378 mcp->flags = MBX_DMA_OUT;
4379 mcp->tov = MBX_TOV_SECONDS * 2;
4381 if (IS_QLA81XX(ha)) {
4382 mcp->out_mb |= MBX_12|MBX_11|MBX_10;
4383 mcp->in_mb |= MBX_1;
4384 } else if (IS_QLA83XX(ha) || IS_QLA27XX(ha)) {
4385 mcp->out_mb |= MBX_15|MBX_12|MBX_11|MBX_10;
4386 mcp->in_mb |= MBX_1;
4387 /* debug q create issue in SR-IOV */
4388 mcp->in_mb |= MBX_9 | MBX_8 | MBX_7;
4391 spin_lock_irqsave(&ha->hardware_lock, flags);
4392 if (!(rsp->options & BIT_0)) {
4393 WRT_REG_DWORD(rsp->rsp_q_out, 0);
4394 if (!IS_QLA83XX(ha) && !IS_QLA27XX(ha))
4395 WRT_REG_DWORD(rsp->rsp_q_in, 0);
4398 spin_unlock_irqrestore(&ha->hardware_lock, flags);
4400 rval = qla2x00_mailbox_command(vha, mcp);
4401 if (rval != QLA_SUCCESS) {
4402 ql_dbg(ql_dbg_mbx, vha, 0x10d7,
4403 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4405 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d8,
4406 "Done %s.\n", __func__);
4413 qla81xx_idc_ack(scsi_qla_host_t *vha, uint16_t *mb)
4417 mbx_cmd_t *mcp = &mc;
4419 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d9,
4420 "Entered %s.\n", __func__);
4422 mcp->mb[0] = MBC_IDC_ACK;
4423 memcpy(&mcp->mb[1], mb, QLA_IDC_ACK_REGS * sizeof(uint16_t));
4424 mcp->out_mb = MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
4426 mcp->tov = MBX_TOV_SECONDS;
4428 rval = qla2x00_mailbox_command(vha, mcp);
4430 if (rval != QLA_SUCCESS) {
4431 ql_dbg(ql_dbg_mbx, vha, 0x10da,
4432 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4434 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10db,
4435 "Done %s.\n", __func__);
4442 qla81xx_fac_get_sector_size(scsi_qla_host_t *vha, uint32_t *sector_size)
4446 mbx_cmd_t *mcp = &mc;
4448 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10dc,
4449 "Entered %s.\n", __func__);
4451 if (!IS_QLA81XX(vha->hw) && !IS_QLA83XX(vha->hw) &&
4452 !IS_QLA27XX(vha->hw))
4453 return QLA_FUNCTION_FAILED;
4455 mcp->mb[0] = MBC_FLASH_ACCESS_CTRL;
4456 mcp->mb[1] = FAC_OPT_CMD_GET_SECTOR_SIZE;
4457 mcp->out_mb = MBX_1|MBX_0;
4458 mcp->in_mb = MBX_1|MBX_0;
4459 mcp->tov = MBX_TOV_SECONDS;
4461 rval = qla2x00_mailbox_command(vha, mcp);
4463 if (rval != QLA_SUCCESS) {
4464 ql_dbg(ql_dbg_mbx, vha, 0x10dd,
4465 "Failed=%x mb[0]=%x mb[1]=%x.\n",
4466 rval, mcp->mb[0], mcp->mb[1]);
4468 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10de,
4469 "Done %s.\n", __func__);
4470 *sector_size = mcp->mb[1];
4477 qla81xx_fac_do_write_enable(scsi_qla_host_t *vha, int enable)
4481 mbx_cmd_t *mcp = &mc;
4483 if (!IS_QLA81XX(vha->hw) && !IS_QLA83XX(vha->hw) &&
4484 !IS_QLA27XX(vha->hw))
4485 return QLA_FUNCTION_FAILED;
4487 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10df,
4488 "Entered %s.\n", __func__);
4490 mcp->mb[0] = MBC_FLASH_ACCESS_CTRL;
4491 mcp->mb[1] = enable ? FAC_OPT_CMD_WRITE_ENABLE :
4492 FAC_OPT_CMD_WRITE_PROTECT;
4493 mcp->out_mb = MBX_1|MBX_0;
4494 mcp->in_mb = MBX_1|MBX_0;
4495 mcp->tov = MBX_TOV_SECONDS;
4497 rval = qla2x00_mailbox_command(vha, mcp);
4499 if (rval != QLA_SUCCESS) {
4500 ql_dbg(ql_dbg_mbx, vha, 0x10e0,
4501 "Failed=%x mb[0]=%x mb[1]=%x.\n",
4502 rval, mcp->mb[0], mcp->mb[1]);
4504 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e1,
4505 "Done %s.\n", __func__);
4512 qla81xx_fac_erase_sector(scsi_qla_host_t *vha, uint32_t start, uint32_t finish)
4516 mbx_cmd_t *mcp = &mc;
4518 if (!IS_QLA81XX(vha->hw) && !IS_QLA83XX(vha->hw) &&
4519 !IS_QLA27XX(vha->hw))
4520 return QLA_FUNCTION_FAILED;
4522 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e2,
4523 "Entered %s.\n", __func__);
4525 mcp->mb[0] = MBC_FLASH_ACCESS_CTRL;
4526 mcp->mb[1] = FAC_OPT_CMD_ERASE_SECTOR;
4527 mcp->mb[2] = LSW(start);
4528 mcp->mb[3] = MSW(start);
4529 mcp->mb[4] = LSW(finish);
4530 mcp->mb[5] = MSW(finish);
4531 mcp->out_mb = MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
4532 mcp->in_mb = MBX_2|MBX_1|MBX_0;
4533 mcp->tov = MBX_TOV_SECONDS;
4535 rval = qla2x00_mailbox_command(vha, mcp);
4537 if (rval != QLA_SUCCESS) {
4538 ql_dbg(ql_dbg_mbx, vha, 0x10e3,
4539 "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x.\n",
4540 rval, mcp->mb[0], mcp->mb[1], mcp->mb[2]);
4542 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e4,
4543 "Done %s.\n", __func__);
4550 qla81xx_restart_mpi_firmware(scsi_qla_host_t *vha)
4554 mbx_cmd_t *mcp = &mc;
4556 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e5,
4557 "Entered %s.\n", __func__);
4559 mcp->mb[0] = MBC_RESTART_MPI_FW;
4560 mcp->out_mb = MBX_0;
4561 mcp->in_mb = MBX_0|MBX_1;
4562 mcp->tov = MBX_TOV_SECONDS;
4564 rval = qla2x00_mailbox_command(vha, mcp);
4566 if (rval != QLA_SUCCESS) {
4567 ql_dbg(ql_dbg_mbx, vha, 0x10e6,
4568 "Failed=%x mb[0]=%x mb[1]=%x.\n",
4569 rval, mcp->mb[0], mcp->mb[1]);
4571 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e7,
4572 "Done %s.\n", __func__);
4579 qla82xx_set_driver_version(scsi_qla_host_t *vha, char *version)
4583 mbx_cmd_t *mcp = &mc;
4587 struct qla_hw_data *ha = vha->hw;
4589 if (!IS_P3P_TYPE(ha))
4590 return QLA_FUNCTION_FAILED;
4592 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x117b,
4593 "Entered %s.\n", __func__);
4595 str = (void *)version;
4596 len = strlen(version);
4598 mcp->mb[0] = MBC_SET_RNID_PARAMS;
4599 mcp->mb[1] = RNID_TYPE_SET_VERSION << 8;
4600 mcp->out_mb = MBX_1|MBX_0;
4601 for (i = 4; i < 16 && len; i++, str++, len -= 2) {
4602 mcp->mb[i] = cpu_to_le16p(str);
4603 mcp->out_mb |= 1<<i;
4605 for (; i < 16; i++) {
4607 mcp->out_mb |= 1<<i;
4609 mcp->in_mb = MBX_1|MBX_0;
4610 mcp->tov = MBX_TOV_SECONDS;
4612 rval = qla2x00_mailbox_command(vha, mcp);
4614 if (rval != QLA_SUCCESS) {
4615 ql_dbg(ql_dbg_mbx, vha, 0x117c,
4616 "Failed=%x mb[0]=%x,%x.\n", rval, mcp->mb[0], mcp->mb[1]);
4618 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x117d,
4619 "Done %s.\n", __func__);
4626 qla25xx_set_driver_version(scsi_qla_host_t *vha, char *version)
4630 mbx_cmd_t *mcp = &mc;
4635 struct qla_hw_data *ha = vha->hw;
4637 if (!IS_FWI2_CAPABLE(ha) || IS_QLA24XX_TYPE(ha) || IS_QLA81XX(ha) ||
4639 return QLA_FUNCTION_FAILED;
4641 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x117e,
4642 "Entered %s.\n", __func__);
4644 str = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &str_dma);
4646 ql_log(ql_log_warn, vha, 0x117f,
4647 "Failed to allocate driver version param.\n");
4648 return QLA_MEMORY_ALLOC_FAILED;
4651 memcpy(str, "\x7\x3\x11\x0", 4);
4653 len = dwlen * 4 - 4;
4654 memset(str + 4, 0, len);
4655 if (len > strlen(version))
4656 len = strlen(version);
4657 memcpy(str + 4, version, len);
4659 mcp->mb[0] = MBC_SET_RNID_PARAMS;
4660 mcp->mb[1] = RNID_TYPE_SET_VERSION << 8 | dwlen;
4661 mcp->mb[2] = MSW(LSD(str_dma));
4662 mcp->mb[3] = LSW(LSD(str_dma));
4663 mcp->mb[6] = MSW(MSD(str_dma));
4664 mcp->mb[7] = LSW(MSD(str_dma));
4665 mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
4666 mcp->in_mb = MBX_1|MBX_0;
4667 mcp->tov = MBX_TOV_SECONDS;
4669 rval = qla2x00_mailbox_command(vha, mcp);
4671 if (rval != QLA_SUCCESS) {
4672 ql_dbg(ql_dbg_mbx, vha, 0x1180,
4673 "Failed=%x mb[0]=%x,%x.\n", rval, mcp->mb[0], mcp->mb[1]);
4675 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1181,
4676 "Done %s.\n", __func__);
4679 dma_pool_free(ha->s_dma_pool, str, str_dma);
4685 qla24xx_get_port_login_templ(scsi_qla_host_t *vha, dma_addr_t buf_dma,
4686 void *buf, uint16_t bufsiz)
4690 mbx_cmd_t *mcp = &mc;
4693 if (!IS_FWI2_CAPABLE(vha->hw))
4694 return QLA_FUNCTION_FAILED;
4696 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1159,
4697 "Entered %s.\n", __func__);
4699 mcp->mb[0] = MBC_GET_RNID_PARAMS;
4700 mcp->mb[1] = RNID_TYPE_PORT_LOGIN << 8;
4701 mcp->mb[2] = MSW(buf_dma);
4702 mcp->mb[3] = LSW(buf_dma);
4703 mcp->mb[6] = MSW(MSD(buf_dma));
4704 mcp->mb[7] = LSW(MSD(buf_dma));
4705 mcp->mb[8] = bufsiz/4;
4706 mcp->out_mb = MBX_8|MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
4707 mcp->in_mb = MBX_1|MBX_0;
4708 mcp->tov = MBX_TOV_SECONDS;
4710 rval = qla2x00_mailbox_command(vha, mcp);
4712 if (rval != QLA_SUCCESS) {
4713 ql_dbg(ql_dbg_mbx, vha, 0x115a,
4714 "Failed=%x mb[0]=%x,%x.\n", rval, mcp->mb[0], mcp->mb[1]);
4716 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x115b,
4717 "Done %s.\n", __func__);
4718 bp = (uint32_t *) buf;
4719 for (i = 0; i < (bufsiz-4)/4; i++, bp++)
4720 *bp = le32_to_cpu(*bp);
4727 qla2x00_read_asic_temperature(scsi_qla_host_t *vha, uint16_t *temp)
4731 mbx_cmd_t *mcp = &mc;
4733 if (!IS_FWI2_CAPABLE(vha->hw))
4734 return QLA_FUNCTION_FAILED;
4736 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1159,
4737 "Entered %s.\n", __func__);
4739 mcp->mb[0] = MBC_GET_RNID_PARAMS;
4740 mcp->mb[1] = RNID_TYPE_ASIC_TEMP << 8;
4741 mcp->out_mb = MBX_1|MBX_0;
4742 mcp->in_mb = MBX_1|MBX_0;
4743 mcp->tov = MBX_TOV_SECONDS;
4745 rval = qla2x00_mailbox_command(vha, mcp);
4748 if (rval != QLA_SUCCESS) {
4749 ql_dbg(ql_dbg_mbx, vha, 0x115a,
4750 "Failed=%x mb[0]=%x,%x.\n", rval, mcp->mb[0], mcp->mb[1]);
4752 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x115b,
4753 "Done %s.\n", __func__);
4760 qla2x00_read_sfp(scsi_qla_host_t *vha, dma_addr_t sfp_dma, uint8_t *sfp,
4761 uint16_t dev, uint16_t off, uint16_t len, uint16_t opt)
4765 mbx_cmd_t *mcp = &mc;
4766 struct qla_hw_data *ha = vha->hw;
4768 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e8,
4769 "Entered %s.\n", __func__);
4771 if (!IS_FWI2_CAPABLE(ha))
4772 return QLA_FUNCTION_FAILED;
4777 mcp->mb[0] = MBC_READ_SFP;
4779 mcp->mb[2] = MSW(sfp_dma);
4780 mcp->mb[3] = LSW(sfp_dma);
4781 mcp->mb[6] = MSW(MSD(sfp_dma));
4782 mcp->mb[7] = LSW(MSD(sfp_dma));
4786 mcp->out_mb = MBX_10|MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
4787 mcp->in_mb = MBX_1|MBX_0;
4788 mcp->tov = MBX_TOV_SECONDS;
4790 rval = qla2x00_mailbox_command(vha, mcp);
4795 if (rval != QLA_SUCCESS) {
4796 ql_dbg(ql_dbg_mbx, vha, 0x10e9,
4797 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4798 if (mcp->mb[0] == MBS_COMMAND_ERROR &&
4800 /* sfp is not there */
4801 rval = QLA_INTERFACE_ERROR;
4803 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ea,
4804 "Done %s.\n", __func__);
4811 qla2x00_write_sfp(scsi_qla_host_t *vha, dma_addr_t sfp_dma, uint8_t *sfp,
4812 uint16_t dev, uint16_t off, uint16_t len, uint16_t opt)
4816 mbx_cmd_t *mcp = &mc;
4817 struct qla_hw_data *ha = vha->hw;
4819 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10eb,
4820 "Entered %s.\n", __func__);
4822 if (!IS_FWI2_CAPABLE(ha))
4823 return QLA_FUNCTION_FAILED;
4831 mcp->mb[0] = MBC_WRITE_SFP;
4833 mcp->mb[2] = MSW(sfp_dma);
4834 mcp->mb[3] = LSW(sfp_dma);
4835 mcp->mb[6] = MSW(MSD(sfp_dma));
4836 mcp->mb[7] = LSW(MSD(sfp_dma));
4840 mcp->out_mb = MBX_10|MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
4841 mcp->in_mb = MBX_1|MBX_0;
4842 mcp->tov = MBX_TOV_SECONDS;
4844 rval = qla2x00_mailbox_command(vha, mcp);
4846 if (rval != QLA_SUCCESS) {
4847 ql_dbg(ql_dbg_mbx, vha, 0x10ec,
4848 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4850 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ed,
4851 "Done %s.\n", __func__);
4858 qla2x00_get_xgmac_stats(scsi_qla_host_t *vha, dma_addr_t stats_dma,
4859 uint16_t size_in_bytes, uint16_t *actual_size)
4863 mbx_cmd_t *mcp = &mc;
4865 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ee,
4866 "Entered %s.\n", __func__);
4868 if (!IS_CNA_CAPABLE(vha->hw))
4869 return QLA_FUNCTION_FAILED;
4871 mcp->mb[0] = MBC_GET_XGMAC_STATS;
4872 mcp->mb[2] = MSW(stats_dma);
4873 mcp->mb[3] = LSW(stats_dma);
4874 mcp->mb[6] = MSW(MSD(stats_dma));
4875 mcp->mb[7] = LSW(MSD(stats_dma));
4876 mcp->mb[8] = size_in_bytes >> 2;
4877 mcp->out_mb = MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_0;
4878 mcp->in_mb = MBX_2|MBX_1|MBX_0;
4879 mcp->tov = MBX_TOV_SECONDS;
4881 rval = qla2x00_mailbox_command(vha, mcp);
4883 if (rval != QLA_SUCCESS) {
4884 ql_dbg(ql_dbg_mbx, vha, 0x10ef,
4885 "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x.\n",
4886 rval, mcp->mb[0], mcp->mb[1], mcp->mb[2]);
4888 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f0,
4889 "Done %s.\n", __func__);
4892 *actual_size = mcp->mb[2] << 2;
4899 qla2x00_get_dcbx_params(scsi_qla_host_t *vha, dma_addr_t tlv_dma,
4904 mbx_cmd_t *mcp = &mc;
4906 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f1,
4907 "Entered %s.\n", __func__);
4909 if (!IS_CNA_CAPABLE(vha->hw))
4910 return QLA_FUNCTION_FAILED;
4912 mcp->mb[0] = MBC_GET_DCBX_PARAMS;
4914 mcp->mb[2] = MSW(tlv_dma);
4915 mcp->mb[3] = LSW(tlv_dma);
4916 mcp->mb[6] = MSW(MSD(tlv_dma));
4917 mcp->mb[7] = LSW(MSD(tlv_dma));
4919 mcp->out_mb = MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
4920 mcp->in_mb = MBX_2|MBX_1|MBX_0;
4921 mcp->tov = MBX_TOV_SECONDS;
4923 rval = qla2x00_mailbox_command(vha, mcp);
4925 if (rval != QLA_SUCCESS) {
4926 ql_dbg(ql_dbg_mbx, vha, 0x10f2,
4927 "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x.\n",
4928 rval, mcp->mb[0], mcp->mb[1], mcp->mb[2]);
4930 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f3,
4931 "Done %s.\n", __func__);
4938 qla2x00_read_ram_word(scsi_qla_host_t *vha, uint32_t risc_addr, uint32_t *data)
4942 mbx_cmd_t *mcp = &mc;
4944 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f4,
4945 "Entered %s.\n", __func__);
4947 if (!IS_FWI2_CAPABLE(vha->hw))
4948 return QLA_FUNCTION_FAILED;
4950 mcp->mb[0] = MBC_READ_RAM_EXTENDED;
4951 mcp->mb[1] = LSW(risc_addr);
4952 mcp->mb[8] = MSW(risc_addr);
4953 mcp->out_mb = MBX_8|MBX_1|MBX_0;
4954 mcp->in_mb = MBX_3|MBX_2|MBX_0;
4957 rval = qla2x00_mailbox_command(vha, mcp);
4958 if (rval != QLA_SUCCESS) {
4959 ql_dbg(ql_dbg_mbx, vha, 0x10f5,
4960 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4962 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f6,
4963 "Done %s.\n", __func__);
4964 *data = mcp->mb[3] << 16 | mcp->mb[2];
4971 qla2x00_loopback_test(scsi_qla_host_t *vha, struct msg_echo_lb *mreq,
4976 mbx_cmd_t *mcp = &mc;
4978 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f7,
4979 "Entered %s.\n", __func__);
4981 memset(mcp->mb, 0 , sizeof(mcp->mb));
4982 mcp->mb[0] = MBC_DIAGNOSTIC_LOOP_BACK;
4983 mcp->mb[1] = mreq->options | BIT_6; // BIT_6 specifies 64 bit addressing
4985 /* transfer count */
4986 mcp->mb[10] = LSW(mreq->transfer_size);
4987 mcp->mb[11] = MSW(mreq->transfer_size);
4989 /* send data address */
4990 mcp->mb[14] = LSW(mreq->send_dma);
4991 mcp->mb[15] = MSW(mreq->send_dma);
4992 mcp->mb[20] = LSW(MSD(mreq->send_dma));
4993 mcp->mb[21] = MSW(MSD(mreq->send_dma));
4995 /* receive data address */
4996 mcp->mb[16] = LSW(mreq->rcv_dma);
4997 mcp->mb[17] = MSW(mreq->rcv_dma);
4998 mcp->mb[6] = LSW(MSD(mreq->rcv_dma));
4999 mcp->mb[7] = MSW(MSD(mreq->rcv_dma));
5001 /* Iteration count */
5002 mcp->mb[18] = LSW(mreq->iteration_count);
5003 mcp->mb[19] = MSW(mreq->iteration_count);
5005 mcp->out_mb = MBX_21|MBX_20|MBX_19|MBX_18|MBX_17|MBX_16|MBX_15|
5006 MBX_14|MBX_13|MBX_12|MBX_11|MBX_10|MBX_7|MBX_6|MBX_1|MBX_0;
5007 if (IS_CNA_CAPABLE(vha->hw))
5008 mcp->out_mb |= MBX_2;
5009 mcp->in_mb = MBX_19|MBX_18|MBX_3|MBX_2|MBX_1|MBX_0;
5011 mcp->buf_size = mreq->transfer_size;
5012 mcp->tov = MBX_TOV_SECONDS;
5013 mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD;
5015 rval = qla2x00_mailbox_command(vha, mcp);
5017 if (rval != QLA_SUCCESS) {
5018 ql_dbg(ql_dbg_mbx, vha, 0x10f8,
5019 "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x mb[3]=%x mb[18]=%x "
5020 "mb[19]=%x.\n", rval, mcp->mb[0], mcp->mb[1], mcp->mb[2],
5021 mcp->mb[3], mcp->mb[18], mcp->mb[19]);
5023 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f9,
5024 "Done %s.\n", __func__);
5027 /* Copy mailbox information */
5028 memcpy( mresp, mcp->mb, 64);
5033 qla2x00_echo_test(scsi_qla_host_t *vha, struct msg_echo_lb *mreq,
5038 mbx_cmd_t *mcp = &mc;
5039 struct qla_hw_data *ha = vha->hw;
5041 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10fa,
5042 "Entered %s.\n", __func__);
5044 memset(mcp->mb, 0 , sizeof(mcp->mb));
5045 mcp->mb[0] = MBC_DIAGNOSTIC_ECHO;
5046 /* BIT_6 specifies 64bit address */
5047 mcp->mb[1] = mreq->options | BIT_15 | BIT_6;
5048 if (IS_CNA_CAPABLE(ha)) {
5049 mcp->mb[2] = vha->fcoe_fcf_idx;
5051 mcp->mb[16] = LSW(mreq->rcv_dma);
5052 mcp->mb[17] = MSW(mreq->rcv_dma);
5053 mcp->mb[6] = LSW(MSD(mreq->rcv_dma));
5054 mcp->mb[7] = MSW(MSD(mreq->rcv_dma));
5056 mcp->mb[10] = LSW(mreq->transfer_size);
5058 mcp->mb[14] = LSW(mreq->send_dma);
5059 mcp->mb[15] = MSW(mreq->send_dma);
5060 mcp->mb[20] = LSW(MSD(mreq->send_dma));
5061 mcp->mb[21] = MSW(MSD(mreq->send_dma));
5063 mcp->out_mb = MBX_21|MBX_20|MBX_17|MBX_16|MBX_15|
5064 MBX_14|MBX_10|MBX_7|MBX_6|MBX_1|MBX_0;
5065 if (IS_CNA_CAPABLE(ha))
5066 mcp->out_mb |= MBX_2;
5069 if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha) ||
5070 IS_CNA_CAPABLE(ha) || IS_QLA2031(ha))
5071 mcp->in_mb |= MBX_1;
5072 if (IS_CNA_CAPABLE(ha) || IS_QLA2031(ha))
5073 mcp->in_mb |= MBX_3;
5075 mcp->tov = MBX_TOV_SECONDS;
5076 mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD;
5077 mcp->buf_size = mreq->transfer_size;
5079 rval = qla2x00_mailbox_command(vha, mcp);
5081 if (rval != QLA_SUCCESS) {
5082 ql_dbg(ql_dbg_mbx, vha, 0x10fb,
5083 "Failed=%x mb[0]=%x mb[1]=%x.\n",
5084 rval, mcp->mb[0], mcp->mb[1]);
5086 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10fc,
5087 "Done %s.\n", __func__);
5090 /* Copy mailbox information */
5091 memcpy(mresp, mcp->mb, 64);
5096 qla84xx_reset_chip(scsi_qla_host_t *vha, uint16_t enable_diagnostic)
5100 mbx_cmd_t *mcp = &mc;
5102 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10fd,
5103 "Entered %s enable_diag=%d.\n", __func__, enable_diagnostic);
5105 mcp->mb[0] = MBC_ISP84XX_RESET;
5106 mcp->mb[1] = enable_diagnostic;
5107 mcp->out_mb = MBX_1|MBX_0;
5108 mcp->in_mb = MBX_1|MBX_0;
5109 mcp->tov = MBX_TOV_SECONDS;
5110 mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD;
5111 rval = qla2x00_mailbox_command(vha, mcp);
5113 if (rval != QLA_SUCCESS)
5114 ql_dbg(ql_dbg_mbx, vha, 0x10fe, "Failed=%x.\n", rval);
5116 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ff,
5117 "Done %s.\n", __func__);
5123 qla2x00_write_ram_word(scsi_qla_host_t *vha, uint32_t risc_addr, uint32_t data)
5127 mbx_cmd_t *mcp = &mc;
5129 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1100,
5130 "Entered %s.\n", __func__);
5132 if (!IS_FWI2_CAPABLE(vha->hw))
5133 return QLA_FUNCTION_FAILED;
5135 mcp->mb[0] = MBC_WRITE_RAM_WORD_EXTENDED;
5136 mcp->mb[1] = LSW(risc_addr);
5137 mcp->mb[2] = LSW(data);
5138 mcp->mb[3] = MSW(data);
5139 mcp->mb[8] = MSW(risc_addr);
5140 mcp->out_mb = MBX_8|MBX_3|MBX_2|MBX_1|MBX_0;
5144 rval = qla2x00_mailbox_command(vha, mcp);
5145 if (rval != QLA_SUCCESS) {
5146 ql_dbg(ql_dbg_mbx, vha, 0x1101,
5147 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
5149 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1102,
5150 "Done %s.\n", __func__);
5157 qla81xx_write_mpi_register(scsi_qla_host_t *vha, uint16_t *mb)
5160 uint32_t stat, timer;
5162 struct qla_hw_data *ha = vha->hw;
5163 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
5167 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1103,
5168 "Entered %s.\n", __func__);
5170 clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);
5172 /* Write the MBC data to the registers */
5173 WRT_REG_WORD(®->mailbox0, MBC_WRITE_MPI_REGISTER);
5174 WRT_REG_WORD(®->mailbox1, mb[0]);
5175 WRT_REG_WORD(®->mailbox2, mb[1]);
5176 WRT_REG_WORD(®->mailbox3, mb[2]);
5177 WRT_REG_WORD(®->mailbox4, mb[3]);
5179 WRT_REG_DWORD(®->hccr, HCCRX_SET_HOST_INT);
5181 /* Poll for MBC interrupt */
5182 for (timer = 6000000; timer; timer--) {
5183 /* Check for pending interrupts. */
5184 stat = RD_REG_DWORD(®->host_status);
5185 if (stat & HSRX_RISC_INT) {
5188 if (stat == 0x1 || stat == 0x2 ||
5189 stat == 0x10 || stat == 0x11) {
5190 set_bit(MBX_INTERRUPT,
5191 &ha->mbx_cmd_flags);
5192 mb0 = RD_REG_WORD(®->mailbox0);
5193 WRT_REG_DWORD(®->hccr,
5194 HCCRX_CLR_RISC_INT);
5195 RD_REG_DWORD(®->hccr);
5202 if (test_and_clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags))
5203 rval = mb0 & MBS_MASK;
5205 rval = QLA_FUNCTION_FAILED;
5207 if (rval != QLA_SUCCESS) {
5208 ql_dbg(ql_dbg_mbx, vha, 0x1104,
5209 "Failed=%x mb[0]=%x.\n", rval, mb[0]);
5211 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1105,
5212 "Done %s.\n", __func__);
5219 qla2x00_get_data_rate(scsi_qla_host_t *vha)
5223 mbx_cmd_t *mcp = &mc;
5224 struct qla_hw_data *ha = vha->hw;
5226 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1106,
5227 "Entered %s.\n", __func__);
5229 if (!IS_FWI2_CAPABLE(ha))
5230 return QLA_FUNCTION_FAILED;
5232 mcp->mb[0] = MBC_DATA_RATE;
5234 mcp->out_mb = MBX_1|MBX_0;
5235 mcp->in_mb = MBX_2|MBX_1|MBX_0;
5236 if (IS_QLA83XX(ha) || IS_QLA27XX(ha))
5237 mcp->in_mb |= MBX_3;
5238 mcp->tov = MBX_TOV_SECONDS;
5240 rval = qla2x00_mailbox_command(vha, mcp);
5241 if (rval != QLA_SUCCESS) {
5242 ql_dbg(ql_dbg_mbx, vha, 0x1107,
5243 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
5245 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1108,
5246 "Done %s.\n", __func__);
5247 if (mcp->mb[1] != 0x7)
5248 ha->link_data_rate = mcp->mb[1];
5255 qla81xx_get_port_config(scsi_qla_host_t *vha, uint16_t *mb)
5259 mbx_cmd_t *mcp = &mc;
5260 struct qla_hw_data *ha = vha->hw;
5262 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1109,
5263 "Entered %s.\n", __func__);
5265 if (!IS_QLA81XX(ha) && !IS_QLA83XX(ha) && !IS_QLA8044(ha) &&
5267 return QLA_FUNCTION_FAILED;
5268 mcp->mb[0] = MBC_GET_PORT_CONFIG;
5269 mcp->out_mb = MBX_0;
5270 mcp->in_mb = MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
5271 mcp->tov = MBX_TOV_SECONDS;
5274 rval = qla2x00_mailbox_command(vha, mcp);
5276 if (rval != QLA_SUCCESS) {
5277 ql_dbg(ql_dbg_mbx, vha, 0x110a,
5278 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
5280 /* Copy all bits to preserve original value */
5281 memcpy(mb, &mcp->mb[1], sizeof(uint16_t) * 4);
5283 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x110b,
5284 "Done %s.\n", __func__);
5290 qla81xx_set_port_config(scsi_qla_host_t *vha, uint16_t *mb)
5294 mbx_cmd_t *mcp = &mc;
5296 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x110c,
5297 "Entered %s.\n", __func__);
5299 mcp->mb[0] = MBC_SET_PORT_CONFIG;
5300 /* Copy all bits to preserve original setting */
5301 memcpy(&mcp->mb[1], mb, sizeof(uint16_t) * 4);
5302 mcp->out_mb = MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
5304 mcp->tov = MBX_TOV_SECONDS;
5306 rval = qla2x00_mailbox_command(vha, mcp);
5308 if (rval != QLA_SUCCESS) {
5309 ql_dbg(ql_dbg_mbx, vha, 0x110d,
5310 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
5312 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x110e,
5313 "Done %s.\n", __func__);
5320 qla24xx_set_fcp_prio(scsi_qla_host_t *vha, uint16_t loop_id, uint16_t priority,
5325 mbx_cmd_t *mcp = &mc;
5326 struct qla_hw_data *ha = vha->hw;
5328 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x110f,
5329 "Entered %s.\n", __func__);
5331 if (!IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha))
5332 return QLA_FUNCTION_FAILED;
5334 mcp->mb[0] = MBC_PORT_PARAMS;
5335 mcp->mb[1] = loop_id;
5336 if (ha->flags.fcp_prio_enabled)
5340 mcp->mb[4] = priority & 0xf;
5341 mcp->mb[9] = vha->vp_idx;
5342 mcp->out_mb = MBX_9|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
5343 mcp->in_mb = MBX_4|MBX_3|MBX_1|MBX_0;
5346 rval = qla2x00_mailbox_command(vha, mcp);
5354 if (rval != QLA_SUCCESS) {
5355 ql_dbg(ql_dbg_mbx, vha, 0x10cd, "Failed=%x.\n", rval);
5357 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10cc,
5358 "Done %s.\n", __func__);
5365 qla2x00_get_thermal_temp(scsi_qla_host_t *vha, uint16_t *temp)
5367 int rval = QLA_FUNCTION_FAILED;
5368 struct qla_hw_data *ha = vha->hw;
5371 if (!IS_FWI2_CAPABLE(ha) || IS_QLA24XX_TYPE(ha) || IS_QLA81XX(ha)) {
5372 ql_dbg(ql_dbg_mbx, vha, 0x1150,
5373 "Thermal not supported by this card.\n");
5377 if (IS_QLA25XX(ha)) {
5378 if (ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
5379 ha->pdev->subsystem_device == 0x0175) {
5380 rval = qla2x00_read_sfp(vha, 0, &byte,
5381 0x98, 0x1, 1, BIT_13|BIT_0);
5385 if (ha->pdev->subsystem_vendor == PCI_VENDOR_ID_HP &&
5386 ha->pdev->subsystem_device == 0x338e) {
5387 rval = qla2x00_read_sfp(vha, 0, &byte,
5388 0x98, 0x1, 1, BIT_15|BIT_14|BIT_0);
5392 ql_dbg(ql_dbg_mbx, vha, 0x10c9,
5393 "Thermal not supported by this card.\n");
5397 if (IS_QLA82XX(ha)) {
5398 *temp = qla82xx_read_temperature(vha);
5401 } else if (IS_QLA8044(ha)) {
5402 *temp = qla8044_read_temperature(vha);
5407 rval = qla2x00_read_asic_temperature(vha, temp);
5412 qla82xx_mbx_intr_enable(scsi_qla_host_t *vha)
5415 struct qla_hw_data *ha = vha->hw;
5417 mbx_cmd_t *mcp = &mc;
5419 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1017,
5420 "Entered %s.\n", __func__);
5422 if (!IS_FWI2_CAPABLE(ha))
5423 return QLA_FUNCTION_FAILED;
5425 memset(mcp, 0, sizeof(mbx_cmd_t));
5426 mcp->mb[0] = MBC_TOGGLE_INTERRUPT;
5429 mcp->out_mb = MBX_1|MBX_0;
5434 rval = qla2x00_mailbox_command(vha, mcp);
5435 if (rval != QLA_SUCCESS) {
5436 ql_dbg(ql_dbg_mbx, vha, 0x1016,
5437 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
5439 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x100e,
5440 "Done %s.\n", __func__);
5447 qla82xx_mbx_intr_disable(scsi_qla_host_t *vha)
5450 struct qla_hw_data *ha = vha->hw;
5452 mbx_cmd_t *mcp = &mc;
5454 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x100d,
5455 "Entered %s.\n", __func__);
5457 if (!IS_P3P_TYPE(ha))
5458 return QLA_FUNCTION_FAILED;
5460 memset(mcp, 0, sizeof(mbx_cmd_t));
5461 mcp->mb[0] = MBC_TOGGLE_INTERRUPT;
5464 mcp->out_mb = MBX_1|MBX_0;
5469 rval = qla2x00_mailbox_command(vha, mcp);
5470 if (rval != QLA_SUCCESS) {
5471 ql_dbg(ql_dbg_mbx, vha, 0x100c,
5472 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
5474 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x100b,
5475 "Done %s.\n", __func__);
5482 qla82xx_md_get_template_size(scsi_qla_host_t *vha)
5484 struct qla_hw_data *ha = vha->hw;
5486 mbx_cmd_t *mcp = &mc;
5487 int rval = QLA_FUNCTION_FAILED;
5489 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x111f,
5490 "Entered %s.\n", __func__);
5492 memset(mcp->mb, 0 , sizeof(mcp->mb));
5493 mcp->mb[0] = LSW(MBC_DIAGNOSTIC_MINIDUMP_TEMPLATE);
5494 mcp->mb[1] = MSW(MBC_DIAGNOSTIC_MINIDUMP_TEMPLATE);
5495 mcp->mb[2] = LSW(RQST_TMPLT_SIZE);
5496 mcp->mb[3] = MSW(RQST_TMPLT_SIZE);
5498 mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
5499 mcp->in_mb = MBX_14|MBX_13|MBX_12|MBX_11|MBX_10|MBX_9|MBX_8|
5500 MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
5502 mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD;
5503 mcp->tov = MBX_TOV_SECONDS;
5504 rval = qla2x00_mailbox_command(vha, mcp);
5506 /* Always copy back return mailbox values. */
5507 if (rval != QLA_SUCCESS) {
5508 ql_dbg(ql_dbg_mbx, vha, 0x1120,
5509 "mailbox command FAILED=0x%x, subcode=%x.\n",
5510 (mcp->mb[1] << 16) | mcp->mb[0],
5511 (mcp->mb[3] << 16) | mcp->mb[2]);
5513 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1121,
5514 "Done %s.\n", __func__);
5515 ha->md_template_size = ((mcp->mb[3] << 16) | mcp->mb[2]);
5516 if (!ha->md_template_size) {
5517 ql_dbg(ql_dbg_mbx, vha, 0x1122,
5518 "Null template size obtained.\n");
5519 rval = QLA_FUNCTION_FAILED;
5526 qla82xx_md_get_template(scsi_qla_host_t *vha)
5528 struct qla_hw_data *ha = vha->hw;
5530 mbx_cmd_t *mcp = &mc;
5531 int rval = QLA_FUNCTION_FAILED;
5533 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1123,
5534 "Entered %s.\n", __func__);
5536 ha->md_tmplt_hdr = dma_alloc_coherent(&ha->pdev->dev,
5537 ha->md_template_size, &ha->md_tmplt_hdr_dma, GFP_KERNEL);
5538 if (!ha->md_tmplt_hdr) {
5539 ql_log(ql_log_warn, vha, 0x1124,
5540 "Unable to allocate memory for Minidump template.\n");
5544 memset(mcp->mb, 0 , sizeof(mcp->mb));
5545 mcp->mb[0] = LSW(MBC_DIAGNOSTIC_MINIDUMP_TEMPLATE);
5546 mcp->mb[1] = MSW(MBC_DIAGNOSTIC_MINIDUMP_TEMPLATE);
5547 mcp->mb[2] = LSW(RQST_TMPLT);
5548 mcp->mb[3] = MSW(RQST_TMPLT);
5549 mcp->mb[4] = LSW(LSD(ha->md_tmplt_hdr_dma));
5550 mcp->mb[5] = MSW(LSD(ha->md_tmplt_hdr_dma));
5551 mcp->mb[6] = LSW(MSD(ha->md_tmplt_hdr_dma));
5552 mcp->mb[7] = MSW(MSD(ha->md_tmplt_hdr_dma));
5553 mcp->mb[8] = LSW(ha->md_template_size);
5554 mcp->mb[9] = MSW(ha->md_template_size);
5556 mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD;
5557 mcp->tov = MBX_TOV_SECONDS;
5558 mcp->out_mb = MBX_11|MBX_10|MBX_9|MBX_8|
5559 MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
5560 mcp->in_mb = MBX_3|MBX_2|MBX_1|MBX_0;
5561 rval = qla2x00_mailbox_command(vha, mcp);
5563 if (rval != QLA_SUCCESS) {
5564 ql_dbg(ql_dbg_mbx, vha, 0x1125,
5565 "mailbox command FAILED=0x%x, subcode=%x.\n",
5566 ((mcp->mb[1] << 16) | mcp->mb[0]),
5567 ((mcp->mb[3] << 16) | mcp->mb[2]));
5569 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1126,
5570 "Done %s.\n", __func__);
5575 qla8044_md_get_template(scsi_qla_host_t *vha)
5577 struct qla_hw_data *ha = vha->hw;
5579 mbx_cmd_t *mcp = &mc;
5580 int rval = QLA_FUNCTION_FAILED;
5581 int offset = 0, size = MINIDUMP_SIZE_36K;
5582 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0xb11f,
5583 "Entered %s.\n", __func__);
5585 ha->md_tmplt_hdr = dma_alloc_coherent(&ha->pdev->dev,
5586 ha->md_template_size, &ha->md_tmplt_hdr_dma, GFP_KERNEL);
5587 if (!ha->md_tmplt_hdr) {
5588 ql_log(ql_log_warn, vha, 0xb11b,
5589 "Unable to allocate memory for Minidump template.\n");
5593 memset(mcp->mb, 0 , sizeof(mcp->mb));
5594 while (offset < ha->md_template_size) {
5595 mcp->mb[0] = LSW(MBC_DIAGNOSTIC_MINIDUMP_TEMPLATE);
5596 mcp->mb[1] = MSW(MBC_DIAGNOSTIC_MINIDUMP_TEMPLATE);
5597 mcp->mb[2] = LSW(RQST_TMPLT);
5598 mcp->mb[3] = MSW(RQST_TMPLT);
5599 mcp->mb[4] = LSW(LSD(ha->md_tmplt_hdr_dma + offset));
5600 mcp->mb[5] = MSW(LSD(ha->md_tmplt_hdr_dma + offset));
5601 mcp->mb[6] = LSW(MSD(ha->md_tmplt_hdr_dma + offset));
5602 mcp->mb[7] = MSW(MSD(ha->md_tmplt_hdr_dma + offset));
5603 mcp->mb[8] = LSW(size);
5604 mcp->mb[9] = MSW(size);
5605 mcp->mb[10] = offset & 0x0000FFFF;
5606 mcp->mb[11] = offset & 0xFFFF0000;
5607 mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD;
5608 mcp->tov = MBX_TOV_SECONDS;
5609 mcp->out_mb = MBX_11|MBX_10|MBX_9|MBX_8|
5610 MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
5611 mcp->in_mb = MBX_3|MBX_2|MBX_1|MBX_0;
5612 rval = qla2x00_mailbox_command(vha, mcp);
5614 if (rval != QLA_SUCCESS) {
5615 ql_dbg(ql_dbg_mbx, vha, 0xb11c,
5616 "mailbox command FAILED=0x%x, subcode=%x.\n",
5617 ((mcp->mb[1] << 16) | mcp->mb[0]),
5618 ((mcp->mb[3] << 16) | mcp->mb[2]));
5621 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0xb11d,
5622 "Done %s.\n", __func__);
5623 offset = offset + size;
5629 qla81xx_set_led_config(scsi_qla_host_t *vha, uint16_t *led_cfg)
5632 struct qla_hw_data *ha = vha->hw;
5634 mbx_cmd_t *mcp = &mc;
5636 if (!IS_QLA81XX(ha) && !IS_QLA8031(ha))
5637 return QLA_FUNCTION_FAILED;
5639 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1133,
5640 "Entered %s.\n", __func__);
5642 memset(mcp, 0, sizeof(mbx_cmd_t));
5643 mcp->mb[0] = MBC_SET_LED_CONFIG;
5644 mcp->mb[1] = led_cfg[0];
5645 mcp->mb[2] = led_cfg[1];
5646 if (IS_QLA8031(ha)) {
5647 mcp->mb[3] = led_cfg[2];
5648 mcp->mb[4] = led_cfg[3];
5649 mcp->mb[5] = led_cfg[4];
5650 mcp->mb[6] = led_cfg[5];
5653 mcp->out_mb = MBX_2|MBX_1|MBX_0;
5655 mcp->out_mb |= MBX_6|MBX_5|MBX_4|MBX_3;
5660 rval = qla2x00_mailbox_command(vha, mcp);
5661 if (rval != QLA_SUCCESS) {
5662 ql_dbg(ql_dbg_mbx, vha, 0x1134,
5663 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
5665 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1135,
5666 "Done %s.\n", __func__);
5673 qla81xx_get_led_config(scsi_qla_host_t *vha, uint16_t *led_cfg)
5676 struct qla_hw_data *ha = vha->hw;
5678 mbx_cmd_t *mcp = &mc;
5680 if (!IS_QLA81XX(ha) && !IS_QLA8031(ha))
5681 return QLA_FUNCTION_FAILED;
5683 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1136,
5684 "Entered %s.\n", __func__);
5686 memset(mcp, 0, sizeof(mbx_cmd_t));
5687 mcp->mb[0] = MBC_GET_LED_CONFIG;
5689 mcp->out_mb = MBX_0;
5690 mcp->in_mb = MBX_2|MBX_1|MBX_0;
5692 mcp->in_mb |= MBX_6|MBX_5|MBX_4|MBX_3;
5696 rval = qla2x00_mailbox_command(vha, mcp);
5697 if (rval != QLA_SUCCESS) {
5698 ql_dbg(ql_dbg_mbx, vha, 0x1137,
5699 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
5701 led_cfg[0] = mcp->mb[1];
5702 led_cfg[1] = mcp->mb[2];
5703 if (IS_QLA8031(ha)) {
5704 led_cfg[2] = mcp->mb[3];
5705 led_cfg[3] = mcp->mb[4];
5706 led_cfg[4] = mcp->mb[5];
5707 led_cfg[5] = mcp->mb[6];
5709 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1138,
5710 "Done %s.\n", __func__);
5717 qla82xx_mbx_beacon_ctl(scsi_qla_host_t *vha, int enable)
5720 struct qla_hw_data *ha = vha->hw;
5722 mbx_cmd_t *mcp = &mc;
5724 if (!IS_P3P_TYPE(ha))
5725 return QLA_FUNCTION_FAILED;
5727 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1127,
5728 "Entered %s.\n", __func__);
5730 memset(mcp, 0, sizeof(mbx_cmd_t));
5731 mcp->mb[0] = MBC_SET_LED_CONFIG;
5737 mcp->out_mb = MBX_7|MBX_0;
5739 mcp->tov = MBX_TOV_SECONDS;
5742 rval = qla2x00_mailbox_command(vha, mcp);
5743 if (rval != QLA_SUCCESS) {
5744 ql_dbg(ql_dbg_mbx, vha, 0x1128,
5745 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
5747 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1129,
5748 "Done %s.\n", __func__);
5755 qla83xx_wr_reg(scsi_qla_host_t *vha, uint32_t reg, uint32_t data)
5758 struct qla_hw_data *ha = vha->hw;
5760 mbx_cmd_t *mcp = &mc;
5762 if (!IS_QLA83XX(ha) && !IS_QLA27XX(ha))
5763 return QLA_FUNCTION_FAILED;
5765 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1130,
5766 "Entered %s.\n", __func__);
5768 mcp->mb[0] = MBC_WRITE_REMOTE_REG;
5769 mcp->mb[1] = LSW(reg);
5770 mcp->mb[2] = MSW(reg);
5771 mcp->mb[3] = LSW(data);
5772 mcp->mb[4] = MSW(data);
5773 mcp->out_mb = MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
5775 mcp->in_mb = MBX_1|MBX_0;
5776 mcp->tov = MBX_TOV_SECONDS;
5778 rval = qla2x00_mailbox_command(vha, mcp);
5780 if (rval != QLA_SUCCESS) {
5781 ql_dbg(ql_dbg_mbx, vha, 0x1131,
5782 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
5784 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1132,
5785 "Done %s.\n", __func__);
5792 qla2x00_port_logout(scsi_qla_host_t *vha, struct fc_port *fcport)
5795 struct qla_hw_data *ha = vha->hw;
5797 mbx_cmd_t *mcp = &mc;
5799 if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
5800 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x113b,
5801 "Implicit LOGO Unsupported.\n");
5802 return QLA_FUNCTION_FAILED;
5806 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x113c,
5807 "Entering %s.\n", __func__);
5809 /* Perform Implicit LOGO. */
5810 mcp->mb[0] = MBC_PORT_LOGOUT;
5811 mcp->mb[1] = fcport->loop_id;
5812 mcp->mb[10] = BIT_15;
5813 mcp->out_mb = MBX_10|MBX_1|MBX_0;
5815 mcp->tov = MBX_TOV_SECONDS;
5817 rval = qla2x00_mailbox_command(vha, mcp);
5818 if (rval != QLA_SUCCESS)
5819 ql_dbg(ql_dbg_mbx, vha, 0x113d,
5820 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
5822 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x113e,
5823 "Done %s.\n", __func__);
5829 qla83xx_rd_reg(scsi_qla_host_t *vha, uint32_t reg, uint32_t *data)
5833 mbx_cmd_t *mcp = &mc;
5834 struct qla_hw_data *ha = vha->hw;
5835 unsigned long retry_max_time = jiffies + (2 * HZ);
5837 if (!IS_QLA83XX(ha) && !IS_QLA27XX(ha))
5838 return QLA_FUNCTION_FAILED;
5840 ql_dbg(ql_dbg_mbx, vha, 0x114b, "Entered %s.\n", __func__);
5843 mcp->mb[0] = MBC_READ_REMOTE_REG;
5844 mcp->mb[1] = LSW(reg);
5845 mcp->mb[2] = MSW(reg);
5846 mcp->out_mb = MBX_2|MBX_1|MBX_0;
5847 mcp->in_mb = MBX_4|MBX_3|MBX_1|MBX_0;
5848 mcp->tov = MBX_TOV_SECONDS;
5850 rval = qla2x00_mailbox_command(vha, mcp);
5852 if (rval != QLA_SUCCESS) {
5853 ql_dbg(ql_dbg_mbx, vha, 0x114c,
5854 "Failed=%x mb[0]=%x mb[1]=%x.\n",
5855 rval, mcp->mb[0], mcp->mb[1]);
5857 *data = (mcp->mb[3] | (mcp->mb[4] << 16));
5858 if (*data == QLA8XXX_BAD_VALUE) {
5860 * During soft-reset CAMRAM register reads might
5861 * return 0xbad0bad0. So retry for MAX of 2 sec
5862 * while reading camram registers.
5864 if (time_after(jiffies, retry_max_time)) {
5865 ql_dbg(ql_dbg_mbx, vha, 0x1141,
5866 "Failure to read CAMRAM register. "
5867 "data=0x%x.\n", *data);
5868 return QLA_FUNCTION_FAILED;
5873 ql_dbg(ql_dbg_mbx, vha, 0x1142, "Done %s.\n", __func__);
5880 qla83xx_restart_nic_firmware(scsi_qla_host_t *vha)
5884 mbx_cmd_t *mcp = &mc;
5885 struct qla_hw_data *ha = vha->hw;
5887 if (!IS_QLA83XX(ha) && !IS_QLA27XX(ha))
5888 return QLA_FUNCTION_FAILED;
5890 ql_dbg(ql_dbg_mbx, vha, 0x1143, "Entered %s.\n", __func__);
5892 mcp->mb[0] = MBC_RESTART_NIC_FIRMWARE;
5893 mcp->out_mb = MBX_0;
5894 mcp->in_mb = MBX_1|MBX_0;
5895 mcp->tov = MBX_TOV_SECONDS;
5897 rval = qla2x00_mailbox_command(vha, mcp);
5899 if (rval != QLA_SUCCESS) {
5900 ql_dbg(ql_dbg_mbx, vha, 0x1144,
5901 "Failed=%x mb[0]=%x mb[1]=%x.\n",
5902 rval, mcp->mb[0], mcp->mb[1]);
5903 ha->isp_ops->fw_dump(vha, 0);
5905 ql_dbg(ql_dbg_mbx, vha, 0x1145, "Done %s.\n", __func__);
5912 qla83xx_access_control(scsi_qla_host_t *vha, uint16_t options,
5913 uint32_t start_addr, uint32_t end_addr, uint16_t *sector_size)
5917 mbx_cmd_t *mcp = &mc;
5918 uint8_t subcode = (uint8_t)options;
5919 struct qla_hw_data *ha = vha->hw;
5921 if (!IS_QLA8031(ha))
5922 return QLA_FUNCTION_FAILED;
5924 ql_dbg(ql_dbg_mbx, vha, 0x1146, "Entered %s.\n", __func__);
5926 mcp->mb[0] = MBC_SET_ACCESS_CONTROL;
5927 mcp->mb[1] = options;
5928 mcp->out_mb = MBX_1|MBX_0;
5929 if (subcode & BIT_2) {
5930 mcp->mb[2] = LSW(start_addr);
5931 mcp->mb[3] = MSW(start_addr);
5932 mcp->mb[4] = LSW(end_addr);
5933 mcp->mb[5] = MSW(end_addr);
5934 mcp->out_mb |= MBX_5|MBX_4|MBX_3|MBX_2;
5936 mcp->in_mb = MBX_2|MBX_1|MBX_0;
5937 if (!(subcode & (BIT_2 | BIT_5)))
5938 mcp->in_mb |= MBX_4|MBX_3;
5939 mcp->tov = MBX_TOV_SECONDS;
5941 rval = qla2x00_mailbox_command(vha, mcp);
5943 if (rval != QLA_SUCCESS) {
5944 ql_dbg(ql_dbg_mbx, vha, 0x1147,
5945 "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x mb[3]=%x mb[4]=%x.\n",
5946 rval, mcp->mb[0], mcp->mb[1], mcp->mb[2], mcp->mb[3],
5948 ha->isp_ops->fw_dump(vha, 0);
5950 if (subcode & BIT_5)
5951 *sector_size = mcp->mb[1];
5952 else if (subcode & (BIT_6 | BIT_7)) {
5953 ql_dbg(ql_dbg_mbx, vha, 0x1148,
5954 "Driver-lock id=%x%x", mcp->mb[4], mcp->mb[3]);
5955 } else if (subcode & (BIT_3 | BIT_4)) {
5956 ql_dbg(ql_dbg_mbx, vha, 0x1149,
5957 "Flash-lock id=%x%x", mcp->mb[4], mcp->mb[3]);
5959 ql_dbg(ql_dbg_mbx, vha, 0x114a, "Done %s.\n", __func__);
5966 qla2x00_dump_mctp_data(scsi_qla_host_t *vha, dma_addr_t req_dma, uint32_t addr,
5971 mbx_cmd_t *mcp = &mc;
5973 if (!IS_MCTP_CAPABLE(vha->hw))
5974 return QLA_FUNCTION_FAILED;
5976 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x114f,
5977 "Entered %s.\n", __func__);
5979 mcp->mb[0] = MBC_DUMP_RISC_RAM_EXTENDED;
5980 mcp->mb[1] = LSW(addr);
5981 mcp->mb[2] = MSW(req_dma);
5982 mcp->mb[3] = LSW(req_dma);
5983 mcp->mb[4] = MSW(size);
5984 mcp->mb[5] = LSW(size);
5985 mcp->mb[6] = MSW(MSD(req_dma));
5986 mcp->mb[7] = LSW(MSD(req_dma));
5987 mcp->mb[8] = MSW(addr);
5988 /* Setting RAM ID to valid */
5989 /* For MCTP RAM ID is 0x40 */
5990 mcp->mb[10] = BIT_7 | 0x40;
5992 mcp->out_mb |= MBX_10|MBX_8|MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|
5996 mcp->tov = MBX_TOV_SECONDS;
5998 rval = qla2x00_mailbox_command(vha, mcp);
6000 if (rval != QLA_SUCCESS) {
6001 ql_dbg(ql_dbg_mbx, vha, 0x114e,
6002 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
6004 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x114d,
6005 "Done %s.\n", __func__);
6012 qla26xx_dport_diagnostics(scsi_qla_host_t *vha,
6013 void *dd_buf, uint size, uint options)
6017 mbx_cmd_t *mcp = &mc;
6020 if (!IS_QLA83XX(vha->hw) && !IS_QLA27XX(vha->hw))
6021 return QLA_FUNCTION_FAILED;
6023 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x119f,
6024 "Entered %s.\n", __func__);
6026 dd_dma = dma_map_single(&vha->hw->pdev->dev,
6027 dd_buf, size, DMA_FROM_DEVICE);
6028 if (dma_mapping_error(&vha->hw->pdev->dev, dd_dma)) {
6029 ql_log(ql_log_warn, vha, 0x1194, "Failed to map dma buffer.\n");
6030 return QLA_MEMORY_ALLOC_FAILED;
6033 memset(dd_buf, 0, size);
6035 mcp->mb[0] = MBC_DPORT_DIAGNOSTICS;
6036 mcp->mb[1] = options;
6037 mcp->mb[2] = MSW(LSD(dd_dma));
6038 mcp->mb[3] = LSW(LSD(dd_dma));
6039 mcp->mb[6] = MSW(MSD(dd_dma));
6040 mcp->mb[7] = LSW(MSD(dd_dma));
6042 mcp->out_mb = MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
6043 mcp->in_mb = MBX_3|MBX_2|MBX_1|MBX_0;
6044 mcp->buf_size = size;
6045 mcp->flags = MBX_DMA_IN;
6046 mcp->tov = MBX_TOV_SECONDS * 4;
6047 rval = qla2x00_mailbox_command(vha, mcp);
6049 if (rval != QLA_SUCCESS) {
6050 ql_dbg(ql_dbg_mbx, vha, 0x1195, "Failed=%x.\n", rval);
6052 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1196,
6053 "Done %s.\n", __func__);
6056 dma_unmap_single(&vha->hw->pdev->dev, dd_dma,
6057 size, DMA_FROM_DEVICE);
6062 static void qla2x00_async_mb_sp_done(void *s, int res)
6066 sp->u.iocb_cmd.u.mbx.rc = res;
6068 complete(&sp->u.iocb_cmd.u.mbx.comp);
6069 /* don't free sp here. Let the caller do the free */
6073 * This mailbox uses the iocb interface to send MB command.
6074 * This allows non-critial (non chip setup) command to go
6077 int qla24xx_send_mb_cmd(struct scsi_qla_host *vha, mbx_cmd_t *mcp)
6079 int rval = QLA_FUNCTION_FAILED;
6083 if (!vha->hw->flags.fw_started)
6086 sp = qla2x00_get_sp(vha, NULL, GFP_KERNEL);
6090 sp->type = SRB_MB_IOCB;
6091 sp->name = mb_to_str(mcp->mb[0]);
6093 c = &sp->u.iocb_cmd;
6094 c->timeout = qla2x00_async_iocb_timeout;
6095 init_completion(&c->u.mbx.comp);
6097 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
6099 memcpy(sp->u.iocb_cmd.u.mbx.out_mb, mcp->mb, SIZEOF_IOCB_MB_REG);
6101 sp->done = qla2x00_async_mb_sp_done;
6103 rval = qla2x00_start_sp(sp);
6104 if (rval != QLA_SUCCESS) {
6105 ql_dbg(ql_dbg_mbx, vha, 0x1018,
6106 "%s: %s Failed submission. %x.\n",
6107 __func__, sp->name, rval);
6111 ql_dbg(ql_dbg_mbx, vha, 0x113f, "MB:%s hndl %x submitted\n",
6112 sp->name, sp->handle);
6114 wait_for_completion(&c->u.mbx.comp);
6115 memcpy(mcp->mb, sp->u.iocb_cmd.u.mbx.in_mb, SIZEOF_IOCB_MB_REG);
6119 case QLA_FUNCTION_TIMEOUT:
6120 ql_dbg(ql_dbg_mbx, vha, 0x1140, "%s: %s Timeout. %x.\n",
6121 __func__, sp->name, rval);
6124 ql_dbg(ql_dbg_mbx, vha, 0x119d, "%s: %s done.\n",
6125 __func__, sp->name);
6128 ql_dbg(ql_dbg_mbx, vha, 0x119e, "%s: %s Failed. %x.\n",
6129 __func__, sp->name, rval);
6141 * NOTE: Do not call this routine from DPC thread
6143 int qla24xx_gpdb_wait(struct scsi_qla_host *vha, fc_port_t *fcport, u8 opt)
6145 int rval = QLA_FUNCTION_FAILED;
6147 struct port_database_24xx *pd;
6148 struct qla_hw_data *ha = vha->hw;
6151 if (!vha->hw->flags.fw_started)
6154 pd = dma_pool_zalloc(ha->s_dma_pool, GFP_KERNEL, &pd_dma);
6156 ql_log(ql_log_warn, vha, 0xd047,
6157 "Failed to allocate port database structure.\n");
6161 memset(&mc, 0, sizeof(mc));
6162 mc.mb[0] = MBC_GET_PORT_DATABASE;
6163 mc.mb[1] = cpu_to_le16(fcport->loop_id);
6164 mc.mb[2] = MSW(pd_dma);
6165 mc.mb[3] = LSW(pd_dma);
6166 mc.mb[6] = MSW(MSD(pd_dma));
6167 mc.mb[7] = LSW(MSD(pd_dma));
6168 mc.mb[9] = cpu_to_le16(vha->vp_idx);
6169 mc.mb[10] = cpu_to_le16((uint16_t)opt);
6171 rval = qla24xx_send_mb_cmd(vha, &mc);
6172 if (rval != QLA_SUCCESS) {
6173 ql_dbg(ql_dbg_mbx, vha, 0x1193,
6174 "%s: %8phC fail\n", __func__, fcport->port_name);
6178 rval = __qla24xx_parse_gpdb(vha, fcport, pd);
6180 ql_dbg(ql_dbg_mbx, vha, 0x1197, "%s: %8phC done\n",
6181 __func__, fcport->port_name);
6185 dma_pool_free(ha->s_dma_pool, pd, pd_dma);
6190 int __qla24xx_parse_gpdb(struct scsi_qla_host *vha, fc_port_t *fcport,
6191 struct port_database_24xx *pd)
6193 int rval = QLA_SUCCESS;
6195 u8 current_login_state, last_login_state;
6197 if (fcport->fc4f_nvme) {
6198 current_login_state = pd->current_login_state >> 4;
6199 last_login_state = pd->last_login_state >> 4;
6201 current_login_state = pd->current_login_state & 0xf;
6202 last_login_state = pd->last_login_state & 0xf;
6205 /* Check for logged in state. */
6206 if (current_login_state != PDS_PRLI_COMPLETE) {
6207 ql_dbg(ql_dbg_mbx, vha, 0x119a,
6208 "Unable to verify login-state (%x/%x) for loop_id %x.\n",
6209 current_login_state, last_login_state, fcport->loop_id);
6210 rval = QLA_FUNCTION_FAILED;
6214 if (fcport->loop_id == FC_NO_LOOP_ID ||
6215 (memcmp(fcport->port_name, (uint8_t *)&zero, 8) &&
6216 memcmp(fcport->port_name, pd->port_name, 8))) {
6217 /* We lost the device mid way. */
6218 rval = QLA_NOT_LOGGED_IN;
6222 /* Names are little-endian. */
6223 memcpy(fcport->node_name, pd->node_name, WWN_SIZE);
6224 memcpy(fcport->port_name, pd->port_name, WWN_SIZE);
6226 /* Get port_id of device. */
6227 fcport->d_id.b.domain = pd->port_id[0];
6228 fcport->d_id.b.area = pd->port_id[1];
6229 fcport->d_id.b.al_pa = pd->port_id[2];
6230 fcport->d_id.b.rsvd_1 = 0;
6232 if (fcport->fc4f_nvme) {
6233 fcport->nvme_prli_service_param =
6234 pd->prli_nvme_svc_param_word_3;
6235 fcport->port_type = FCT_NVME;
6237 /* If not target must be initiator or unknown type. */
6238 if ((pd->prli_svc_param_word_3[0] & BIT_4) == 0)
6239 fcport->port_type = FCT_INITIATOR;
6241 fcport->port_type = FCT_TARGET;
6243 /* Passback COS information. */
6244 fcport->supported_classes = (pd->flags & PDF_CLASS_2) ?
6245 FC_COS_CLASS2 : FC_COS_CLASS3;
6247 if (pd->prli_svc_param_word_3[0] & BIT_7) {
6248 fcport->flags |= FCF_CONF_COMP_SUPPORTED;
6249 fcport->conf_compl_supported = 1;
6257 * qla24xx_gidlist__wait
6258 * NOTE: don't call this routine from DPC thread.
6260 int qla24xx_gidlist_wait(struct scsi_qla_host *vha,
6261 void *id_list, dma_addr_t id_list_dma, uint16_t *entries)
6263 int rval = QLA_FUNCTION_FAILED;
6266 if (!vha->hw->flags.fw_started)
6269 memset(&mc, 0, sizeof(mc));
6270 mc.mb[0] = MBC_GET_ID_LIST;
6271 mc.mb[2] = MSW(id_list_dma);
6272 mc.mb[3] = LSW(id_list_dma);
6273 mc.mb[6] = MSW(MSD(id_list_dma));
6274 mc.mb[7] = LSW(MSD(id_list_dma));
6276 mc.mb[9] = cpu_to_le16(vha->vp_idx);
6278 rval = qla24xx_send_mb_cmd(vha, &mc);
6279 if (rval != QLA_SUCCESS) {
6280 ql_dbg(ql_dbg_mbx, vha, 0x119b,
6281 "%s: fail\n", __func__);
6283 *entries = mc.mb[1];
6284 ql_dbg(ql_dbg_mbx, vha, 0x119c,
6285 "%s: done\n", __func__);
6291 int qla27xx_set_zio_threshold(scsi_qla_host_t *vha, uint16_t value)
6295 mbx_cmd_t *mcp = &mc;
6297 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1200,
6298 "Entered %s\n", __func__);
6300 memset(mcp->mb, 0 , sizeof(mcp->mb));
6301 mcp->mb[0] = MBC_GET_SET_ZIO_THRESHOLD;
6302 mcp->mb[1] = cpu_to_le16(1);
6303 mcp->mb[2] = cpu_to_le16(value);
6304 mcp->out_mb = MBX_2 | MBX_1 | MBX_0;
6305 mcp->in_mb = MBX_2 | MBX_0;
6306 mcp->tov = MBX_TOV_SECONDS;
6309 rval = qla2x00_mailbox_command(vha, mcp);
6311 ql_dbg(ql_dbg_mbx, vha, 0x1201, "%s %x\n",
6312 (rval != QLA_SUCCESS) ? "Failed" : "Done", rval);
6317 int qla27xx_get_zio_threshold(scsi_qla_host_t *vha, uint16_t *value)
6321 mbx_cmd_t *mcp = &mc;
6323 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1203,
6324 "Entered %s\n", __func__);
6326 memset(mcp->mb, 0, sizeof(mcp->mb));
6327 mcp->mb[0] = MBC_GET_SET_ZIO_THRESHOLD;
6328 mcp->mb[1] = cpu_to_le16(0);
6329 mcp->out_mb = MBX_1 | MBX_0;
6330 mcp->in_mb = MBX_2 | MBX_0;
6331 mcp->tov = MBX_TOV_SECONDS;
6334 rval = qla2x00_mailbox_command(vha, mcp);
6335 if (rval == QLA_SUCCESS)
6338 ql_dbg(ql_dbg_mbx, vha, 0x1205, "%s %x\n",
6339 (rval != QLA_SUCCESS) ? "Failed" : "Done", rval);
6345 qla2x00_read_sfp_dev(struct scsi_qla_host *vha, char *buf, int count)
6347 struct qla_hw_data *ha = vha->hw;
6348 uint16_t iter, addr, offset;
6349 dma_addr_t phys_addr;
6353 memset(ha->sfp_data, 0, SFP_DEV_SIZE);
6355 phys_addr = ha->sfp_data_dma;
6356 sfp_data = ha->sfp_data;
6359 for (iter = 0; iter < SFP_DEV_SIZE / SFP_BLOCK_SIZE; iter++) {
6361 /* Skip to next device address. */
6366 rval = qla2x00_read_sfp(vha, phys_addr, sfp_data,
6367 addr, offset, SFP_BLOCK_SIZE, BIT_1);
6368 if (rval != QLA_SUCCESS) {
6369 ql_log(ql_log_warn, vha, 0x706d,
6370 "Unable to read SFP data (%x/%x/%x).\n", rval,
6376 if (buf && (c < count)) {
6379 if ((count - c) >= SFP_BLOCK_SIZE)
6380 sz = SFP_BLOCK_SIZE;
6384 memcpy(buf, sfp_data, sz);
6385 buf += SFP_BLOCK_SIZE;
6388 phys_addr += SFP_BLOCK_SIZE;
6389 sfp_data += SFP_BLOCK_SIZE;
6390 offset += SFP_BLOCK_SIZE;
6396 int qla24xx_res_count_wait(struct scsi_qla_host *vha,
6397 uint16_t *out_mb, int out_mb_sz)
6399 int rval = QLA_FUNCTION_FAILED;
6402 if (!vha->hw->flags.fw_started)
6405 memset(&mc, 0, sizeof(mc));
6406 mc.mb[0] = MBC_GET_RESOURCE_COUNTS;
6408 rval = qla24xx_send_mb_cmd(vha, &mc);
6409 if (rval != QLA_SUCCESS) {
6410 ql_dbg(ql_dbg_mbx, vha, 0xffff,
6411 "%s: fail\n", __func__);
6413 if (out_mb_sz <= SIZEOF_IOCB_MB_REG)
6414 memcpy(out_mb, mc.mb, out_mb_sz);
6416 memcpy(out_mb, mc.mb, SIZEOF_IOCB_MB_REG);
6418 ql_dbg(ql_dbg_mbx, vha, 0xffff,
6419 "%s: done\n", __func__);