1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
2 /* QLogic qed NIC Driver
3 * Copyright (c) 2015-2017 QLogic Corporation
4 * Copyright (c) 2019-2020 Marvell International Ltd.
7 #include <linux/types.h>
8 #include <asm/byteorder.h>
9 #include <linux/dma-mapping.h>
10 #include <linux/if_vlan.h>
11 #include <linux/kernel.h>
12 #include <linux/pci.h>
13 #include <linux/slab.h>
14 #include <linux/stddef.h>
15 #include <linux/workqueue.h>
17 #include <linux/bitops.h>
18 #include <linux/delay.h>
19 #include <linux/errno.h>
20 #include <linux/etherdevice.h>
22 #include <linux/list.h>
23 #include <linux/mutex.h>
24 #include <linux/spinlock.h>
25 #include <linux/string.h>
26 #include <linux/qed/qed_ll2_if.h>
29 #include "qed_dev_api.h"
36 #include "qed_reg_addr.h"
40 #define QED_LL2_RX_REGISTERED(ll2) ((ll2)->rx_queue.b_cb_registered)
41 #define QED_LL2_TX_REGISTERED(ll2) ((ll2)->tx_queue.b_cb_registered)
43 #define QED_LL2_TX_SIZE (256)
44 #define QED_LL2_RX_SIZE (4096)
46 struct qed_cb_ll2_info {
51 /* Lock protecting LL2 buffer lists in sleepless context */
53 struct list_head list;
55 const struct qed_ll2_cb_ops *cbs;
59 struct qed_ll2_buffer {
60 struct list_head list;
65 static void qed_ll2b_complete_tx_packet(void *cxt,
68 dma_addr_t first_frag_addr,
72 struct qed_hwfn *p_hwfn = cxt;
73 struct qed_dev *cdev = p_hwfn->cdev;
74 struct sk_buff *skb = cookie;
76 /* All we need to do is release the mapping */
77 dma_unmap_single(&p_hwfn->cdev->pdev->dev, first_frag_addr,
78 skb_headlen(skb), DMA_TO_DEVICE);
80 if (cdev->ll2->cbs && cdev->ll2->cbs->tx_cb)
81 cdev->ll2->cbs->tx_cb(cdev->ll2->cb_cookie, skb,
84 dev_kfree_skb_any(skb);
87 static int qed_ll2_alloc_buffer(struct qed_dev *cdev,
88 u8 **data, dma_addr_t *phys_addr)
90 size_t size = cdev->ll2->rx_size + NET_SKB_PAD +
91 SKB_DATA_ALIGN(sizeof(struct skb_shared_info));
93 *data = kmalloc(size, GFP_ATOMIC);
95 DP_INFO(cdev, "Failed to allocate LL2 buffer data\n");
99 *phys_addr = dma_map_single(&cdev->pdev->dev,
100 ((*data) + NET_SKB_PAD),
101 cdev->ll2->rx_size, DMA_FROM_DEVICE);
102 if (dma_mapping_error(&cdev->pdev->dev, *phys_addr)) {
103 DP_INFO(cdev, "Failed to map LL2 buffer data\n");
111 static int qed_ll2_dealloc_buffer(struct qed_dev *cdev,
112 struct qed_ll2_buffer *buffer)
114 spin_lock_bh(&cdev->ll2->lock);
116 dma_unmap_single(&cdev->pdev->dev, buffer->phys_addr,
117 cdev->ll2->rx_size, DMA_FROM_DEVICE);
119 list_del(&buffer->list);
122 if (!cdev->ll2->rx_cnt)
123 DP_INFO(cdev, "All LL2 entries were removed\n");
125 spin_unlock_bh(&cdev->ll2->lock);
130 static void qed_ll2_kill_buffers(struct qed_dev *cdev)
132 struct qed_ll2_buffer *buffer, *tmp_buffer;
134 list_for_each_entry_safe(buffer, tmp_buffer, &cdev->ll2->list, list)
135 qed_ll2_dealloc_buffer(cdev, buffer);
138 static void qed_ll2b_complete_rx_packet(void *cxt,
139 struct qed_ll2_comp_rx_data *data)
141 struct qed_hwfn *p_hwfn = cxt;
142 struct qed_ll2_buffer *buffer = data->cookie;
143 struct qed_dev *cdev = p_hwfn->cdev;
144 dma_addr_t new_phys_addr;
151 (NETIF_MSG_RX_STATUS | QED_MSG_STORAGE | NETIF_MSG_PKTDATA),
152 "Got an LL2 Rx completion: [Buffer at phys 0x%llx, offset 0x%02x] Length 0x%04x Parse_flags 0x%04x vlan 0x%04x Opaque data [0x%08x:0x%08x]\n",
153 (u64)data->rx_buf_addr,
154 data->u.placement_offset,
155 data->length.packet_length,
157 data->vlan, data->opaque_data_0, data->opaque_data_1);
159 if ((cdev->dp_module & NETIF_MSG_PKTDATA) && buffer->data) {
160 print_hex_dump(KERN_INFO, "",
161 DUMP_PREFIX_OFFSET, 16, 1,
162 buffer->data, data->length.packet_length, false);
165 /* Determine if data is valid */
166 if (data->length.packet_length < ETH_HLEN)
169 /* Allocate a replacement for buffer; Reuse upon failure */
171 rc = qed_ll2_alloc_buffer(p_hwfn->cdev, &new_data,
174 /* If need to reuse or there's no replacement buffer, repost this */
177 dma_unmap_single(&cdev->pdev->dev, buffer->phys_addr,
178 cdev->ll2->rx_size, DMA_FROM_DEVICE);
180 skb = build_skb(buffer->data, 0);
182 DP_INFO(cdev, "Failed to build SKB\n");
187 data->u.placement_offset += NET_SKB_PAD;
188 skb_reserve(skb, data->u.placement_offset);
189 skb_put(skb, data->length.packet_length);
190 skb_checksum_none_assert(skb);
192 /* Get parital ethernet information instead of eth_type_trans(),
193 * Since we don't have an associated net_device.
195 skb_reset_mac_header(skb);
196 skb->protocol = eth_hdr(skb)->h_proto;
198 /* Pass SKB onward */
199 if (cdev->ll2->cbs && cdev->ll2->cbs->rx_cb) {
201 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
203 cdev->ll2->cbs->rx_cb(cdev->ll2->cb_cookie, skb,
205 data->opaque_data_1);
207 DP_VERBOSE(p_hwfn, (NETIF_MSG_RX_STATUS | NETIF_MSG_PKTDATA |
208 QED_MSG_LL2 | QED_MSG_STORAGE),
209 "Dropping the packet\n");
214 /* Update Buffer information and update FW producer */
215 buffer->data = new_data;
216 buffer->phys_addr = new_phys_addr;
219 rc = qed_ll2_post_rx_buffer(p_hwfn, cdev->ll2->handle,
220 buffer->phys_addr, 0, buffer, 1);
222 qed_ll2_dealloc_buffer(cdev, buffer);
225 static struct qed_ll2_info *__qed_ll2_handle_sanity(struct qed_hwfn *p_hwfn,
226 u8 connection_handle,
230 struct qed_ll2_info *p_ll2_conn, *p_ret = NULL;
232 if (connection_handle >= QED_MAX_NUM_OF_LL2_CONNECTIONS)
235 if (!p_hwfn->p_ll2_info)
238 p_ll2_conn = &p_hwfn->p_ll2_info[connection_handle];
242 mutex_lock(&p_ll2_conn->mutex);
243 if (p_ll2_conn->b_active)
246 mutex_unlock(&p_ll2_conn->mutex);
254 static struct qed_ll2_info *qed_ll2_handle_sanity(struct qed_hwfn *p_hwfn,
255 u8 connection_handle)
257 return __qed_ll2_handle_sanity(p_hwfn, connection_handle, false, true);
260 static struct qed_ll2_info *qed_ll2_handle_sanity_lock(struct qed_hwfn *p_hwfn,
261 u8 connection_handle)
263 return __qed_ll2_handle_sanity(p_hwfn, connection_handle, true, true);
266 static struct qed_ll2_info *qed_ll2_handle_sanity_inactive(struct qed_hwfn
268 u8 connection_handle)
270 return __qed_ll2_handle_sanity(p_hwfn, connection_handle, false, false);
273 static void qed_ll2_txq_flush(struct qed_hwfn *p_hwfn, u8 connection_handle)
275 bool b_last_packet = false, b_last_frag = false;
276 struct qed_ll2_tx_packet *p_pkt = NULL;
277 struct qed_ll2_info *p_ll2_conn;
278 struct qed_ll2_tx_queue *p_tx;
279 unsigned long flags = 0;
282 p_ll2_conn = qed_ll2_handle_sanity_inactive(p_hwfn, connection_handle);
286 p_tx = &p_ll2_conn->tx_queue;
288 spin_lock_irqsave(&p_tx->lock, flags);
289 while (!list_empty(&p_tx->active_descq)) {
290 p_pkt = list_first_entry(&p_tx->active_descq,
291 struct qed_ll2_tx_packet, list_entry);
295 list_del(&p_pkt->list_entry);
296 b_last_packet = list_empty(&p_tx->active_descq);
297 list_add_tail(&p_pkt->list_entry, &p_tx->free_descq);
298 spin_unlock_irqrestore(&p_tx->lock, flags);
299 if (p_ll2_conn->input.conn_type == QED_LL2_TYPE_OOO) {
300 struct qed_ooo_buffer *p_buffer;
302 p_buffer = (struct qed_ooo_buffer *)p_pkt->cookie;
303 qed_ooo_put_free_buffer(p_hwfn, p_hwfn->p_ooo_info,
306 p_tx->cur_completing_packet = *p_pkt;
307 p_tx->cur_completing_bd_idx = 1;
309 p_tx->cur_completing_bd_idx == p_pkt->bd_used;
310 tx_frag = p_pkt->bds_set[0].tx_frag;
311 p_ll2_conn->cbs.tx_release_cb(p_ll2_conn->cbs.cookie,
318 spin_lock_irqsave(&p_tx->lock, flags);
320 spin_unlock_irqrestore(&p_tx->lock, flags);
323 static int qed_ll2_txq_completion(struct qed_hwfn *p_hwfn, void *p_cookie)
325 struct qed_ll2_info *p_ll2_conn = p_cookie;
326 struct qed_ll2_tx_queue *p_tx = &p_ll2_conn->tx_queue;
327 u16 new_idx = 0, num_bds = 0, num_bds_in_packet = 0;
328 struct qed_ll2_tx_packet *p_pkt;
329 bool b_last_frag = false;
336 spin_lock_irqsave(&p_tx->lock, flags);
337 if (p_tx->b_completing_packet) {
342 new_idx = le16_to_cpu(*p_tx->p_fw_cons);
343 num_bds = ((s16)new_idx - (s16)p_tx->bds_idx);
345 if (list_empty(&p_tx->active_descq))
348 p_pkt = list_first_entry(&p_tx->active_descq,
349 struct qed_ll2_tx_packet, list_entry);
353 p_tx->b_completing_packet = true;
354 p_tx->cur_completing_packet = *p_pkt;
355 num_bds_in_packet = p_pkt->bd_used;
356 list_del(&p_pkt->list_entry);
358 if (num_bds < num_bds_in_packet) {
360 "Rest of BDs does not cover whole packet\n");
364 num_bds -= num_bds_in_packet;
365 p_tx->bds_idx += num_bds_in_packet;
366 while (num_bds_in_packet--)
367 qed_chain_consume(&p_tx->txq_chain);
369 p_tx->cur_completing_bd_idx = 1;
370 b_last_frag = p_tx->cur_completing_bd_idx == p_pkt->bd_used;
371 list_add_tail(&p_pkt->list_entry, &p_tx->free_descq);
373 spin_unlock_irqrestore(&p_tx->lock, flags);
375 p_ll2_conn->cbs.tx_comp_cb(p_ll2_conn->cbs.cookie,
378 p_pkt->bds_set[0].tx_frag,
379 b_last_frag, !num_bds);
381 spin_lock_irqsave(&p_tx->lock, flags);
384 p_tx->b_completing_packet = false;
387 spin_unlock_irqrestore(&p_tx->lock, flags);
391 static void qed_ll2_rxq_parse_gsi(struct qed_hwfn *p_hwfn,
392 union core_rx_cqe_union *p_cqe,
393 struct qed_ll2_comp_rx_data *data)
395 data->parse_flags = le16_to_cpu(p_cqe->rx_cqe_gsi.parse_flags.flags);
396 data->length.data_length = le16_to_cpu(p_cqe->rx_cqe_gsi.data_length);
397 data->vlan = le16_to_cpu(p_cqe->rx_cqe_gsi.vlan);
398 data->opaque_data_0 = le32_to_cpu(p_cqe->rx_cqe_gsi.src_mac_addrhi);
399 data->opaque_data_1 = le16_to_cpu(p_cqe->rx_cqe_gsi.src_mac_addrlo);
400 data->u.data_length_error = p_cqe->rx_cqe_gsi.data_length_error;
401 data->qp_id = le16_to_cpu(p_cqe->rx_cqe_gsi.qp_id);
403 data->src_qp = le32_to_cpu(p_cqe->rx_cqe_gsi.src_qp);
406 static void qed_ll2_rxq_parse_reg(struct qed_hwfn *p_hwfn,
407 union core_rx_cqe_union *p_cqe,
408 struct qed_ll2_comp_rx_data *data)
410 data->parse_flags = le16_to_cpu(p_cqe->rx_cqe_fp.parse_flags.flags);
411 data->err_flags = le16_to_cpu(p_cqe->rx_cqe_fp.err_flags.flags);
412 data->length.packet_length =
413 le16_to_cpu(p_cqe->rx_cqe_fp.packet_length);
414 data->vlan = le16_to_cpu(p_cqe->rx_cqe_fp.vlan);
415 data->opaque_data_0 = le32_to_cpu(p_cqe->rx_cqe_fp.opaque_data.data[0]);
416 data->opaque_data_1 = le32_to_cpu(p_cqe->rx_cqe_fp.opaque_data.data[1]);
417 data->u.placement_offset = p_cqe->rx_cqe_fp.placement_offset;
421 qed_ll2_handle_slowpath(struct qed_hwfn *p_hwfn,
422 struct qed_ll2_info *p_ll2_conn,
423 union core_rx_cqe_union *p_cqe,
424 unsigned long *p_lock_flags)
426 struct qed_ll2_rx_queue *p_rx = &p_ll2_conn->rx_queue;
427 struct core_rx_slow_path_cqe *sp_cqe;
429 sp_cqe = &p_cqe->rx_cqe_sp;
430 if (sp_cqe->ramrod_cmd_id != CORE_RAMROD_RX_QUEUE_FLUSH) {
432 "LL2 - unexpected Rx CQE slowpath ramrod_cmd_id:%d\n",
433 sp_cqe->ramrod_cmd_id);
437 if (!p_ll2_conn->cbs.slowpath_cb) {
439 "LL2 - received RX_QUEUE_FLUSH but no callback was provided\n");
443 spin_unlock_irqrestore(&p_rx->lock, *p_lock_flags);
445 p_ll2_conn->cbs.slowpath_cb(p_ll2_conn->cbs.cookie,
447 le32_to_cpu(sp_cqe->opaque_data.data[0]),
448 le32_to_cpu(sp_cqe->opaque_data.data[1]));
450 spin_lock_irqsave(&p_rx->lock, *p_lock_flags);
456 qed_ll2_rxq_handle_completion(struct qed_hwfn *p_hwfn,
457 struct qed_ll2_info *p_ll2_conn,
458 union core_rx_cqe_union *p_cqe,
459 unsigned long *p_lock_flags, bool b_last_cqe)
461 struct qed_ll2_rx_queue *p_rx = &p_ll2_conn->rx_queue;
462 struct qed_ll2_rx_packet *p_pkt = NULL;
463 struct qed_ll2_comp_rx_data data;
465 if (!list_empty(&p_rx->active_descq))
466 p_pkt = list_first_entry(&p_rx->active_descq,
467 struct qed_ll2_rx_packet, list_entry);
470 "[%d] LL2 Rx completion but active_descq is empty\n",
471 p_ll2_conn->input.conn_type);
475 list_del(&p_pkt->list_entry);
477 if (p_cqe->rx_cqe_sp.type == CORE_RX_CQE_TYPE_REGULAR)
478 qed_ll2_rxq_parse_reg(p_hwfn, p_cqe, &data);
480 qed_ll2_rxq_parse_gsi(p_hwfn, p_cqe, &data);
481 if (qed_chain_consume(&p_rx->rxq_chain) != p_pkt->rxq_bd)
483 "Mismatch between active_descq and the LL2 Rx chain\n");
485 list_add_tail(&p_pkt->list_entry, &p_rx->free_descq);
487 data.connection_handle = p_ll2_conn->my_id;
488 data.cookie = p_pkt->cookie;
489 data.rx_buf_addr = p_pkt->rx_buf_addr;
490 data.b_last_packet = b_last_cqe;
492 spin_unlock_irqrestore(&p_rx->lock, *p_lock_flags);
493 p_ll2_conn->cbs.rx_comp_cb(p_ll2_conn->cbs.cookie, &data);
495 spin_lock_irqsave(&p_rx->lock, *p_lock_flags);
500 static int qed_ll2_rxq_completion(struct qed_hwfn *p_hwfn, void *cookie)
502 struct qed_ll2_info *p_ll2_conn = (struct qed_ll2_info *)cookie;
503 struct qed_ll2_rx_queue *p_rx = &p_ll2_conn->rx_queue;
504 union core_rx_cqe_union *cqe = NULL;
505 u16 cq_new_idx = 0, cq_old_idx = 0;
506 unsigned long flags = 0;
512 spin_lock_irqsave(&p_rx->lock, flags);
514 if (!QED_LL2_RX_REGISTERED(p_ll2_conn)) {
515 spin_unlock_irqrestore(&p_rx->lock, flags);
519 cq_new_idx = le16_to_cpu(*p_rx->p_fw_cons);
520 cq_old_idx = qed_chain_get_cons_idx(&p_rx->rcq_chain);
522 while (cq_new_idx != cq_old_idx) {
523 bool b_last_cqe = (cq_new_idx == cq_old_idx);
526 (union core_rx_cqe_union *)
527 qed_chain_consume(&p_rx->rcq_chain);
528 cq_old_idx = qed_chain_get_cons_idx(&p_rx->rcq_chain);
532 "LL2 [sw. cons %04x, fw. at %04x] - Got Packet of type %02x\n",
533 cq_old_idx, cq_new_idx, cqe->rx_cqe_sp.type);
535 switch (cqe->rx_cqe_sp.type) {
536 case CORE_RX_CQE_TYPE_SLOW_PATH:
537 rc = qed_ll2_handle_slowpath(p_hwfn, p_ll2_conn,
540 case CORE_RX_CQE_TYPE_GSI_OFFLOAD:
541 case CORE_RX_CQE_TYPE_REGULAR:
542 rc = qed_ll2_rxq_handle_completion(p_hwfn, p_ll2_conn,
551 spin_unlock_irqrestore(&p_rx->lock, flags);
555 static void qed_ll2_rxq_flush(struct qed_hwfn *p_hwfn, u8 connection_handle)
557 struct qed_ll2_info *p_ll2_conn = NULL;
558 struct qed_ll2_rx_packet *p_pkt = NULL;
559 struct qed_ll2_rx_queue *p_rx;
560 unsigned long flags = 0;
562 p_ll2_conn = qed_ll2_handle_sanity_inactive(p_hwfn, connection_handle);
566 p_rx = &p_ll2_conn->rx_queue;
568 spin_lock_irqsave(&p_rx->lock, flags);
569 while (!list_empty(&p_rx->active_descq)) {
570 p_pkt = list_first_entry(&p_rx->active_descq,
571 struct qed_ll2_rx_packet, list_entry);
574 list_move_tail(&p_pkt->list_entry, &p_rx->free_descq);
575 spin_unlock_irqrestore(&p_rx->lock, flags);
577 if (p_ll2_conn->input.conn_type == QED_LL2_TYPE_OOO) {
578 struct qed_ooo_buffer *p_buffer;
580 p_buffer = (struct qed_ooo_buffer *)p_pkt->cookie;
581 qed_ooo_put_free_buffer(p_hwfn, p_hwfn->p_ooo_info,
584 dma_addr_t rx_buf_addr = p_pkt->rx_buf_addr;
585 void *cookie = p_pkt->cookie;
588 b_last = list_empty(&p_rx->active_descq);
589 p_ll2_conn->cbs.rx_release_cb(p_ll2_conn->cbs.cookie,
592 rx_buf_addr, b_last);
594 spin_lock_irqsave(&p_rx->lock, flags);
596 spin_unlock_irqrestore(&p_rx->lock, flags);
600 qed_ll2_lb_rxq_handler_slowpath(struct qed_hwfn *p_hwfn,
601 struct core_rx_slow_path_cqe *p_cqe)
603 struct ooo_opaque *iscsi_ooo;
606 if (p_cqe->ramrod_cmd_id != CORE_RAMROD_RX_QUEUE_FLUSH)
609 iscsi_ooo = (struct ooo_opaque *)&p_cqe->opaque_data;
610 if (iscsi_ooo->ooo_opcode != TCP_EVENT_DELETE_ISLES)
613 /* Need to make a flush */
614 cid = le32_to_cpu(iscsi_ooo->cid);
615 qed_ooo_release_connection_isles(p_hwfn, p_hwfn->p_ooo_info, cid);
620 static int qed_ll2_lb_rxq_handler(struct qed_hwfn *p_hwfn,
621 struct qed_ll2_info *p_ll2_conn)
623 struct qed_ll2_rx_queue *p_rx = &p_ll2_conn->rx_queue;
624 u16 packet_length = 0, parse_flags = 0, vlan = 0;
625 struct qed_ll2_rx_packet *p_pkt = NULL;
626 u32 num_ooo_add_to_peninsula = 0, cid;
627 union core_rx_cqe_union *cqe = NULL;
628 u16 cq_new_idx = 0, cq_old_idx = 0;
629 struct qed_ooo_buffer *p_buffer;
630 struct ooo_opaque *iscsi_ooo;
631 u8 placement_offset = 0;
634 cq_new_idx = le16_to_cpu(*p_rx->p_fw_cons);
635 cq_old_idx = qed_chain_get_cons_idx(&p_rx->rcq_chain);
636 if (cq_new_idx == cq_old_idx)
639 while (cq_new_idx != cq_old_idx) {
640 struct core_rx_fast_path_cqe *p_cqe_fp;
642 cqe = qed_chain_consume(&p_rx->rcq_chain);
643 cq_old_idx = qed_chain_get_cons_idx(&p_rx->rcq_chain);
644 cqe_type = cqe->rx_cqe_sp.type;
646 if (cqe_type == CORE_RX_CQE_TYPE_SLOW_PATH)
647 if (qed_ll2_lb_rxq_handler_slowpath(p_hwfn,
651 if (cqe_type != CORE_RX_CQE_TYPE_REGULAR) {
653 "Got a non-regular LB LL2 completion [type 0x%02x]\n",
657 p_cqe_fp = &cqe->rx_cqe_fp;
659 placement_offset = p_cqe_fp->placement_offset;
660 parse_flags = le16_to_cpu(p_cqe_fp->parse_flags.flags);
661 packet_length = le16_to_cpu(p_cqe_fp->packet_length);
662 vlan = le16_to_cpu(p_cqe_fp->vlan);
663 iscsi_ooo = (struct ooo_opaque *)&p_cqe_fp->opaque_data;
664 qed_ooo_save_history_entry(p_hwfn, p_hwfn->p_ooo_info,
666 cid = le32_to_cpu(iscsi_ooo->cid);
668 /* Process delete isle first */
669 if (iscsi_ooo->drop_size)
670 qed_ooo_delete_isles(p_hwfn, p_hwfn->p_ooo_info, cid,
671 iscsi_ooo->drop_isle,
672 iscsi_ooo->drop_size);
674 if (iscsi_ooo->ooo_opcode == TCP_EVENT_NOP)
677 /* Now process create/add/join isles */
678 if (list_empty(&p_rx->active_descq)) {
680 "LL2 OOO RX chain has no submitted buffers\n"
685 p_pkt = list_first_entry(&p_rx->active_descq,
686 struct qed_ll2_rx_packet, list_entry);
688 if ((iscsi_ooo->ooo_opcode == TCP_EVENT_ADD_NEW_ISLE) ||
689 (iscsi_ooo->ooo_opcode == TCP_EVENT_ADD_ISLE_RIGHT) ||
690 (iscsi_ooo->ooo_opcode == TCP_EVENT_ADD_ISLE_LEFT) ||
691 (iscsi_ooo->ooo_opcode == TCP_EVENT_ADD_PEN) ||
692 (iscsi_ooo->ooo_opcode == TCP_EVENT_JOIN)) {
695 "LL2 OOO RX packet is not valid\n");
698 list_del(&p_pkt->list_entry);
699 p_buffer = (struct qed_ooo_buffer *)p_pkt->cookie;
700 p_buffer->packet_length = packet_length;
701 p_buffer->parse_flags = parse_flags;
702 p_buffer->vlan = vlan;
703 p_buffer->placement_offset = placement_offset;
704 qed_chain_consume(&p_rx->rxq_chain);
705 list_add_tail(&p_pkt->list_entry, &p_rx->free_descq);
707 switch (iscsi_ooo->ooo_opcode) {
708 case TCP_EVENT_ADD_NEW_ISLE:
709 qed_ooo_add_new_isle(p_hwfn,
715 case TCP_EVENT_ADD_ISLE_RIGHT:
716 qed_ooo_add_new_buffer(p_hwfn,
723 case TCP_EVENT_ADD_ISLE_LEFT:
724 qed_ooo_add_new_buffer(p_hwfn,
732 qed_ooo_add_new_buffer(p_hwfn,
735 iscsi_ooo->ooo_isle +
739 qed_ooo_join_isles(p_hwfn,
741 cid, iscsi_ooo->ooo_isle);
743 case TCP_EVENT_ADD_PEN:
744 num_ooo_add_to_peninsula++;
745 qed_ooo_put_ready_buffer(p_hwfn,
752 "Unexpected event (%d) TX OOO completion\n",
753 iscsi_ooo->ooo_opcode);
761 qed_ooo_submit_tx_buffers(struct qed_hwfn *p_hwfn,
762 struct qed_ll2_info *p_ll2_conn)
764 struct qed_ll2_tx_pkt_info tx_pkt;
765 struct qed_ooo_buffer *p_buffer;
767 dma_addr_t first_frag;
771 /* Submit Tx buffers here */
772 while ((p_buffer = qed_ooo_get_ready_buffer(p_hwfn,
773 p_hwfn->p_ooo_info))) {
777 first_frag = p_buffer->rx_buffer_phys_addr +
778 p_buffer->placement_offset;
779 SET_FIELD(bd_flags, CORE_TX_BD_DATA_FORCE_VLAN_MODE, 1);
780 SET_FIELD(bd_flags, CORE_TX_BD_DATA_L4_PROTOCOL, 1);
782 memset(&tx_pkt, 0, sizeof(tx_pkt));
783 tx_pkt.num_of_bds = 1;
784 tx_pkt.vlan = p_buffer->vlan;
785 tx_pkt.bd_flags = bd_flags;
786 tx_pkt.l4_hdr_offset_w = l4_hdr_offset_w;
787 switch (p_ll2_conn->tx_dest) {
788 case CORE_TX_DEST_NW:
789 tx_pkt.tx_dest = QED_LL2_TX_DEST_NW;
791 case CORE_TX_DEST_LB:
792 tx_pkt.tx_dest = QED_LL2_TX_DEST_LB;
794 case CORE_TX_DEST_DROP:
796 tx_pkt.tx_dest = QED_LL2_TX_DEST_DROP;
799 tx_pkt.first_frag = first_frag;
800 tx_pkt.first_frag_len = p_buffer->packet_length;
801 tx_pkt.cookie = p_buffer;
803 rc = qed_ll2_prepare_tx_packet(p_hwfn, p_ll2_conn->my_id,
806 qed_ooo_put_ready_buffer(p_hwfn, p_hwfn->p_ooo_info,
814 qed_ooo_submit_rx_buffers(struct qed_hwfn *p_hwfn,
815 struct qed_ll2_info *p_ll2_conn)
817 struct qed_ooo_buffer *p_buffer;
820 while ((p_buffer = qed_ooo_get_free_buffer(p_hwfn,
821 p_hwfn->p_ooo_info))) {
822 rc = qed_ll2_post_rx_buffer(p_hwfn,
824 p_buffer->rx_buffer_phys_addr,
827 qed_ooo_put_free_buffer(p_hwfn,
828 p_hwfn->p_ooo_info, p_buffer);
834 static int qed_ll2_lb_rxq_completion(struct qed_hwfn *p_hwfn, void *p_cookie)
836 struct qed_ll2_info *p_ll2_conn = (struct qed_ll2_info *)p_cookie;
842 if (!QED_LL2_RX_REGISTERED(p_ll2_conn))
845 rc = qed_ll2_lb_rxq_handler(p_hwfn, p_ll2_conn);
849 qed_ooo_submit_rx_buffers(p_hwfn, p_ll2_conn);
850 qed_ooo_submit_tx_buffers(p_hwfn, p_ll2_conn);
855 static int qed_ll2_lb_txq_completion(struct qed_hwfn *p_hwfn, void *p_cookie)
857 struct qed_ll2_info *p_ll2_conn = (struct qed_ll2_info *)p_cookie;
858 struct qed_ll2_tx_queue *p_tx = &p_ll2_conn->tx_queue;
859 struct qed_ll2_tx_packet *p_pkt = NULL;
860 struct qed_ooo_buffer *p_buffer;
861 bool b_dont_submit_rx = false;
862 u16 new_idx = 0, num_bds = 0;
868 if (!QED_LL2_TX_REGISTERED(p_ll2_conn))
871 new_idx = le16_to_cpu(*p_tx->p_fw_cons);
872 num_bds = ((s16)new_idx - (s16)p_tx->bds_idx);
878 if (list_empty(&p_tx->active_descq))
881 p_pkt = list_first_entry(&p_tx->active_descq,
882 struct qed_ll2_tx_packet, list_entry);
886 if (p_pkt->bd_used != 1) {
888 "Unexpectedly many BDs(%d) in TX OOO completion\n",
893 list_del(&p_pkt->list_entry);
897 qed_chain_consume(&p_tx->txq_chain);
899 p_buffer = (struct qed_ooo_buffer *)p_pkt->cookie;
900 list_add_tail(&p_pkt->list_entry, &p_tx->free_descq);
902 if (b_dont_submit_rx) {
903 qed_ooo_put_free_buffer(p_hwfn, p_hwfn->p_ooo_info,
908 rc = qed_ll2_post_rx_buffer(p_hwfn, p_ll2_conn->my_id,
909 p_buffer->rx_buffer_phys_addr, 0,
912 qed_ooo_put_free_buffer(p_hwfn,
913 p_hwfn->p_ooo_info, p_buffer);
914 b_dont_submit_rx = true;
918 qed_ooo_submit_tx_buffers(p_hwfn, p_ll2_conn);
923 static void qed_ll2_stop_ooo(struct qed_hwfn *p_hwfn)
925 u8 *handle = &p_hwfn->pf_params.iscsi_pf_params.ll2_ooo_queue_id;
927 DP_VERBOSE(p_hwfn, (QED_MSG_STORAGE | QED_MSG_LL2),
928 "Stopping LL2 OOO queue [%02x]\n", *handle);
930 qed_ll2_terminate_connection(p_hwfn, *handle);
931 qed_ll2_release_connection(p_hwfn, *handle);
932 *handle = QED_LL2_UNUSED_HANDLE;
935 static int qed_sp_ll2_rx_queue_start(struct qed_hwfn *p_hwfn,
936 struct qed_ll2_info *p_ll2_conn,
939 enum qed_ll2_conn_type conn_type = p_ll2_conn->input.conn_type;
940 struct qed_ll2_rx_queue *p_rx = &p_ll2_conn->rx_queue;
941 struct core_rx_start_ramrod_data *p_ramrod = NULL;
942 struct qed_spq_entry *p_ent = NULL;
943 struct qed_sp_init_data init_data;
948 memset(&init_data, 0, sizeof(init_data));
949 init_data.cid = p_ll2_conn->cid;
950 init_data.opaque_fid = p_hwfn->hw_info.opaque_fid;
951 init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
953 rc = qed_sp_init_request(p_hwfn, &p_ent,
954 CORE_RAMROD_RX_QUEUE_START,
955 PROTOCOLID_CORE, &init_data);
959 p_ramrod = &p_ent->ramrod.core_rx_queue_start;
960 memset(p_ramrod, 0, sizeof(*p_ramrod));
961 p_ramrod->sb_id = cpu_to_le16(qed_int_get_sp_sb_id(p_hwfn));
962 p_ramrod->sb_index = p_rx->rx_sb_index;
963 p_ramrod->complete_event_flg = 1;
965 p_ramrod->mtu = cpu_to_le16(p_ll2_conn->input.mtu);
966 DMA_REGPAIR_LE(p_ramrod->bd_base, p_rx->rxq_chain.p_phys_addr);
967 cqe_pbl_size = (u16)qed_chain_get_page_cnt(&p_rx->rcq_chain);
968 p_ramrod->num_of_pbl_pages = cpu_to_le16(cqe_pbl_size);
969 DMA_REGPAIR_LE(p_ramrod->cqe_pbl_addr,
970 qed_chain_get_pbl_phys(&p_rx->rcq_chain));
972 p_ramrod->drop_ttl0_flg = p_ll2_conn->input.rx_drop_ttl0_flg;
973 p_ramrod->inner_vlan_stripping_en =
974 p_ll2_conn->input.rx_vlan_removal_en;
976 if (test_bit(QED_MF_UFP_SPECIFIC, &p_hwfn->cdev->mf_bits) &&
977 p_ll2_conn->input.conn_type == QED_LL2_TYPE_FCOE)
978 p_ramrod->report_outer_vlan = 1;
979 p_ramrod->queue_id = p_ll2_conn->queue_id;
980 p_ramrod->main_func_queue = p_ll2_conn->main_func_queue ? 1 : 0;
982 if (test_bit(QED_MF_LL2_NON_UNICAST, &p_hwfn->cdev->mf_bits) &&
983 p_ramrod->main_func_queue && conn_type != QED_LL2_TYPE_ROCE &&
984 conn_type != QED_LL2_TYPE_IWARP) {
985 p_ramrod->mf_si_bcast_accept_all = 1;
986 p_ramrod->mf_si_mcast_accept_all = 1;
988 p_ramrod->mf_si_bcast_accept_all = 0;
989 p_ramrod->mf_si_mcast_accept_all = 0;
992 p_ramrod->action_on_error.error_type = action_on_error;
993 p_ramrod->gsi_offload_flag = p_ll2_conn->input.gsi_enable;
994 p_ramrod->zero_prod_flg = 1;
996 return qed_spq_post(p_hwfn, p_ent, NULL);
999 static int qed_sp_ll2_tx_queue_start(struct qed_hwfn *p_hwfn,
1000 struct qed_ll2_info *p_ll2_conn)
1002 enum qed_ll2_conn_type conn_type = p_ll2_conn->input.conn_type;
1003 struct qed_ll2_tx_queue *p_tx = &p_ll2_conn->tx_queue;
1004 struct core_tx_start_ramrod_data *p_ramrod = NULL;
1005 struct qed_spq_entry *p_ent = NULL;
1006 struct qed_sp_init_data init_data;
1007 u16 pq_id = 0, pbl_size;
1010 if (!QED_LL2_TX_REGISTERED(p_ll2_conn))
1013 if (p_ll2_conn->input.conn_type == QED_LL2_TYPE_OOO)
1014 p_ll2_conn->tx_stats_en = 0;
1016 p_ll2_conn->tx_stats_en = 1;
1019 memset(&init_data, 0, sizeof(init_data));
1020 init_data.cid = p_ll2_conn->cid;
1021 init_data.opaque_fid = p_hwfn->hw_info.opaque_fid;
1022 init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
1024 rc = qed_sp_init_request(p_hwfn, &p_ent,
1025 CORE_RAMROD_TX_QUEUE_START,
1026 PROTOCOLID_CORE, &init_data);
1030 p_ramrod = &p_ent->ramrod.core_tx_queue_start;
1032 p_ramrod->sb_id = cpu_to_le16(qed_int_get_sp_sb_id(p_hwfn));
1033 p_ramrod->sb_index = p_tx->tx_sb_index;
1034 p_ramrod->mtu = cpu_to_le16(p_ll2_conn->input.mtu);
1035 p_ramrod->stats_en = p_ll2_conn->tx_stats_en;
1036 p_ramrod->stats_id = p_ll2_conn->tx_stats_id;
1038 DMA_REGPAIR_LE(p_ramrod->pbl_base_addr,
1039 qed_chain_get_pbl_phys(&p_tx->txq_chain));
1040 pbl_size = qed_chain_get_page_cnt(&p_tx->txq_chain);
1041 p_ramrod->pbl_size = cpu_to_le16(pbl_size);
1043 switch (p_ll2_conn->input.tx_tc) {
1045 pq_id = qed_get_cm_pq_idx(p_hwfn, PQ_FLAGS_LB);
1048 pq_id = qed_get_cm_pq_idx(p_hwfn, PQ_FLAGS_OOO);
1051 pq_id = qed_get_cm_pq_idx(p_hwfn, PQ_FLAGS_OFLD);
1055 p_ramrod->qm_pq_id = cpu_to_le16(pq_id);
1057 switch (conn_type) {
1058 case QED_LL2_TYPE_FCOE:
1059 p_ramrod->conn_type = PROTOCOLID_FCOE;
1061 case QED_LL2_TYPE_ISCSI:
1062 p_ramrod->conn_type = PROTOCOLID_ISCSI;
1064 case QED_LL2_TYPE_ROCE:
1065 p_ramrod->conn_type = PROTOCOLID_ROCE;
1067 case QED_LL2_TYPE_IWARP:
1068 p_ramrod->conn_type = PROTOCOLID_IWARP;
1070 case QED_LL2_TYPE_OOO:
1071 if (p_hwfn->hw_info.personality == QED_PCI_ISCSI)
1072 p_ramrod->conn_type = PROTOCOLID_ISCSI;
1074 p_ramrod->conn_type = PROTOCOLID_IWARP;
1077 p_ramrod->conn_type = PROTOCOLID_ETH;
1078 DP_NOTICE(p_hwfn, "Unknown connection type: %d\n", conn_type);
1081 p_ramrod->gsi_offload_flag = p_ll2_conn->input.gsi_enable;
1083 rc = qed_spq_post(p_hwfn, p_ent, NULL);
1087 rc = qed_db_recovery_add(p_hwfn->cdev, p_tx->doorbell_addr,
1088 &p_tx->db_msg, DB_REC_WIDTH_32B,
1093 static int qed_sp_ll2_rx_queue_stop(struct qed_hwfn *p_hwfn,
1094 struct qed_ll2_info *p_ll2_conn)
1096 struct core_rx_stop_ramrod_data *p_ramrod = NULL;
1097 struct qed_spq_entry *p_ent = NULL;
1098 struct qed_sp_init_data init_data;
1102 memset(&init_data, 0, sizeof(init_data));
1103 init_data.cid = p_ll2_conn->cid;
1104 init_data.opaque_fid = p_hwfn->hw_info.opaque_fid;
1105 init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
1107 rc = qed_sp_init_request(p_hwfn, &p_ent,
1108 CORE_RAMROD_RX_QUEUE_STOP,
1109 PROTOCOLID_CORE, &init_data);
1113 p_ramrod = &p_ent->ramrod.core_rx_queue_stop;
1115 p_ramrod->complete_event_flg = 1;
1116 p_ramrod->queue_id = p_ll2_conn->queue_id;
1118 return qed_spq_post(p_hwfn, p_ent, NULL);
1121 static int qed_sp_ll2_tx_queue_stop(struct qed_hwfn *p_hwfn,
1122 struct qed_ll2_info *p_ll2_conn)
1124 struct qed_ll2_tx_queue *p_tx = &p_ll2_conn->tx_queue;
1125 struct qed_spq_entry *p_ent = NULL;
1126 struct qed_sp_init_data init_data;
1128 qed_db_recovery_del(p_hwfn->cdev, p_tx->doorbell_addr, &p_tx->db_msg);
1131 memset(&init_data, 0, sizeof(init_data));
1132 init_data.cid = p_ll2_conn->cid;
1133 init_data.opaque_fid = p_hwfn->hw_info.opaque_fid;
1134 init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
1136 rc = qed_sp_init_request(p_hwfn, &p_ent,
1137 CORE_RAMROD_TX_QUEUE_STOP,
1138 PROTOCOLID_CORE, &init_data);
1142 return qed_spq_post(p_hwfn, p_ent, NULL);
1146 qed_ll2_acquire_connection_rx(struct qed_hwfn *p_hwfn,
1147 struct qed_ll2_info *p_ll2_info)
1149 struct qed_chain_init_params params = {
1150 .intended_use = QED_CHAIN_USE_TO_CONSUME_PRODUCE,
1151 .cnt_type = QED_CHAIN_CNT_TYPE_U16,
1152 .num_elems = p_ll2_info->input.rx_num_desc,
1154 struct qed_dev *cdev = p_hwfn->cdev;
1155 struct qed_ll2_rx_packet *p_descq;
1159 if (!p_ll2_info->input.rx_num_desc)
1162 params.mode = QED_CHAIN_MODE_NEXT_PTR;
1163 params.elem_size = sizeof(struct core_rx_bd);
1165 rc = qed_chain_alloc(cdev, &p_ll2_info->rx_queue.rxq_chain, ¶ms);
1167 DP_NOTICE(p_hwfn, "Failed to allocate ll2 rxq chain\n");
1171 capacity = qed_chain_get_capacity(&p_ll2_info->rx_queue.rxq_chain);
1172 p_descq = kcalloc(capacity, sizeof(struct qed_ll2_rx_packet),
1176 DP_NOTICE(p_hwfn, "Failed to allocate ll2 Rx desc\n");
1179 p_ll2_info->rx_queue.descq_array = p_descq;
1181 params.mode = QED_CHAIN_MODE_PBL;
1182 params.elem_size = sizeof(struct core_rx_fast_path_cqe);
1184 rc = qed_chain_alloc(cdev, &p_ll2_info->rx_queue.rcq_chain, ¶ms);
1186 DP_NOTICE(p_hwfn, "Failed to allocate ll2 rcq chain\n");
1190 DP_VERBOSE(p_hwfn, QED_MSG_LL2,
1191 "Allocated LL2 Rxq [Type %08x] with 0x%08x buffers\n",
1192 p_ll2_info->input.conn_type, p_ll2_info->input.rx_num_desc);
1198 static int qed_ll2_acquire_connection_tx(struct qed_hwfn *p_hwfn,
1199 struct qed_ll2_info *p_ll2_info)
1201 struct qed_chain_init_params params = {
1202 .mode = QED_CHAIN_MODE_PBL,
1203 .intended_use = QED_CHAIN_USE_TO_CONSUME_PRODUCE,
1204 .cnt_type = QED_CHAIN_CNT_TYPE_U16,
1205 .num_elems = p_ll2_info->input.tx_num_desc,
1206 .elem_size = sizeof(struct core_tx_bd),
1208 struct qed_ll2_tx_packet *p_descq;
1213 if (!p_ll2_info->input.tx_num_desc)
1216 rc = qed_chain_alloc(p_hwfn->cdev, &p_ll2_info->tx_queue.txq_chain,
1221 capacity = qed_chain_get_capacity(&p_ll2_info->tx_queue.txq_chain);
1222 /* All bds_set elements are flexibily added. */
1223 desc_size = struct_size(p_descq, bds_set,
1224 p_ll2_info->input.tx_max_bds_per_packet);
1226 p_descq = kcalloc(capacity, desc_size, GFP_KERNEL);
1231 p_ll2_info->tx_queue.descq_mem = p_descq;
1233 DP_VERBOSE(p_hwfn, QED_MSG_LL2,
1234 "Allocated LL2 Txq [Type %08x] with 0x%08x buffers\n",
1235 p_ll2_info->input.conn_type, p_ll2_info->input.tx_num_desc);
1240 "Can't allocate memory for Tx LL2 with 0x%08x buffers\n",
1241 p_ll2_info->input.tx_num_desc);
1246 qed_ll2_acquire_connection_ooo(struct qed_hwfn *p_hwfn,
1247 struct qed_ll2_info *p_ll2_info, u16 mtu)
1249 struct qed_ooo_buffer *p_buf = NULL;
1254 if (p_ll2_info->input.conn_type != QED_LL2_TYPE_OOO)
1257 /* Correct number of requested OOO buffers if needed */
1258 if (!p_ll2_info->input.rx_num_ooo_buffers) {
1259 u16 num_desc = p_ll2_info->input.rx_num_desc;
1263 p_ll2_info->input.rx_num_ooo_buffers = num_desc * 2;
1266 for (buf_idx = 0; buf_idx < p_ll2_info->input.rx_num_ooo_buffers;
1268 p_buf = kzalloc(sizeof(*p_buf), GFP_KERNEL);
1274 p_buf->rx_buffer_size = mtu + 26 + ETH_CACHE_LINE_SIZE;
1275 p_buf->rx_buffer_size = (p_buf->rx_buffer_size +
1276 ETH_CACHE_LINE_SIZE - 1) &
1277 ~(ETH_CACHE_LINE_SIZE - 1);
1278 p_virt = dma_alloc_coherent(&p_hwfn->cdev->pdev->dev,
1279 p_buf->rx_buffer_size,
1280 &p_buf->rx_buffer_phys_addr,
1288 p_buf->rx_buffer_virt_addr = p_virt;
1289 qed_ooo_put_free_buffer(p_hwfn, p_hwfn->p_ooo_info, p_buf);
1292 DP_VERBOSE(p_hwfn, QED_MSG_LL2,
1293 "Allocated [%04x] LL2 OOO buffers [each of size 0x%08x]\n",
1294 p_ll2_info->input.rx_num_ooo_buffers, p_buf->rx_buffer_size);
1301 qed_ll2_set_cbs(struct qed_ll2_info *p_ll2_info, const struct qed_ll2_cbs *cbs)
1303 if (!cbs || (!cbs->rx_comp_cb ||
1304 !cbs->rx_release_cb ||
1305 !cbs->tx_comp_cb || !cbs->tx_release_cb || !cbs->cookie))
1308 p_ll2_info->cbs.rx_comp_cb = cbs->rx_comp_cb;
1309 p_ll2_info->cbs.rx_release_cb = cbs->rx_release_cb;
1310 p_ll2_info->cbs.tx_comp_cb = cbs->tx_comp_cb;
1311 p_ll2_info->cbs.tx_release_cb = cbs->tx_release_cb;
1312 p_ll2_info->cbs.slowpath_cb = cbs->slowpath_cb;
1313 p_ll2_info->cbs.cookie = cbs->cookie;
1318 static void _qed_ll2_calc_allowed_conns(struct qed_hwfn *p_hwfn,
1319 struct qed_ll2_acquire_data *data,
1320 u8 *start_idx, u8 *last_idx)
1322 /* LL2 queues handles will be split as follows:
1323 * First will be the legacy queues, and then the ctx based.
1325 if (data->input.rx_conn_type == QED_LL2_RX_TYPE_LEGACY) {
1326 *start_idx = QED_LL2_LEGACY_CONN_BASE_PF;
1327 *last_idx = *start_idx +
1328 QED_MAX_NUM_OF_LEGACY_LL2_CONNS_PF;
1330 /* QED_LL2_RX_TYPE_CTX */
1331 *start_idx = QED_LL2_CTX_CONN_BASE_PF;
1332 *last_idx = *start_idx +
1333 QED_MAX_NUM_OF_CTX_LL2_CONNS_PF;
1337 static enum core_error_handle
1338 qed_ll2_get_error_choice(enum qed_ll2_error_handle err)
1341 case QED_LL2_DROP_PACKET:
1342 return LL2_DROP_PACKET;
1343 case QED_LL2_DO_NOTHING:
1344 return LL2_DO_NOTHING;
1345 case QED_LL2_ASSERT:
1348 return LL2_DO_NOTHING;
1352 int qed_ll2_acquire_connection(void *cxt, struct qed_ll2_acquire_data *data)
1354 struct qed_hwfn *p_hwfn = cxt;
1355 qed_int_comp_cb_t comp_rx_cb, comp_tx_cb;
1356 struct qed_ll2_info *p_ll2_info = NULL;
1357 u8 i, first_idx, last_idx, *p_tx_max;
1360 if (!data->p_connection_handle || !p_hwfn->p_ll2_info)
1363 _qed_ll2_calc_allowed_conns(p_hwfn, data, &first_idx, &last_idx);
1365 /* Find a free connection to be used */
1366 for (i = first_idx; i < last_idx; i++) {
1367 mutex_lock(&p_hwfn->p_ll2_info[i].mutex);
1368 if (p_hwfn->p_ll2_info[i].b_active) {
1369 mutex_unlock(&p_hwfn->p_ll2_info[i].mutex);
1373 p_hwfn->p_ll2_info[i].b_active = true;
1374 p_ll2_info = &p_hwfn->p_ll2_info[i];
1375 mutex_unlock(&p_hwfn->p_ll2_info[i].mutex);
1381 memcpy(&p_ll2_info->input, &data->input, sizeof(p_ll2_info->input));
1383 switch (data->input.tx_dest) {
1384 case QED_LL2_TX_DEST_NW:
1385 p_ll2_info->tx_dest = CORE_TX_DEST_NW;
1387 case QED_LL2_TX_DEST_LB:
1388 p_ll2_info->tx_dest = CORE_TX_DEST_LB;
1390 case QED_LL2_TX_DEST_DROP:
1391 p_ll2_info->tx_dest = CORE_TX_DEST_DROP;
1397 if (data->input.conn_type == QED_LL2_TYPE_OOO ||
1398 data->input.secondary_queue)
1399 p_ll2_info->main_func_queue = false;
1401 p_ll2_info->main_func_queue = true;
1403 /* Correct maximum number of Tx BDs */
1404 p_tx_max = &p_ll2_info->input.tx_max_bds_per_packet;
1406 *p_tx_max = CORE_LL2_TX_MAX_BDS_PER_PACKET;
1408 *p_tx_max = min_t(u8, *p_tx_max,
1409 CORE_LL2_TX_MAX_BDS_PER_PACKET);
1411 rc = qed_ll2_set_cbs(p_ll2_info, data->cbs);
1413 DP_NOTICE(p_hwfn, "Invalid callback functions\n");
1414 goto q_allocate_fail;
1417 rc = qed_ll2_acquire_connection_rx(p_hwfn, p_ll2_info);
1419 goto q_allocate_fail;
1421 rc = qed_ll2_acquire_connection_tx(p_hwfn, p_ll2_info);
1423 goto q_allocate_fail;
1425 rc = qed_ll2_acquire_connection_ooo(p_hwfn, p_ll2_info,
1428 goto q_allocate_fail;
1430 /* Register callbacks for the Rx/Tx queues */
1431 if (data->input.conn_type == QED_LL2_TYPE_OOO) {
1432 comp_rx_cb = qed_ll2_lb_rxq_completion;
1433 comp_tx_cb = qed_ll2_lb_txq_completion;
1435 comp_rx_cb = qed_ll2_rxq_completion;
1436 comp_tx_cb = qed_ll2_txq_completion;
1439 if (data->input.rx_num_desc) {
1440 qed_int_register_cb(p_hwfn, comp_rx_cb,
1441 &p_hwfn->p_ll2_info[i],
1442 &p_ll2_info->rx_queue.rx_sb_index,
1443 &p_ll2_info->rx_queue.p_fw_cons);
1444 p_ll2_info->rx_queue.b_cb_registered = true;
1447 if (data->input.tx_num_desc) {
1448 qed_int_register_cb(p_hwfn,
1450 &p_hwfn->p_ll2_info[i],
1451 &p_ll2_info->tx_queue.tx_sb_index,
1452 &p_ll2_info->tx_queue.p_fw_cons);
1453 p_ll2_info->tx_queue.b_cb_registered = true;
1456 *data->p_connection_handle = i;
1460 qed_ll2_release_connection(p_hwfn, i);
1464 static int qed_ll2_establish_connection_rx(struct qed_hwfn *p_hwfn,
1465 struct qed_ll2_info *p_ll2_conn)
1467 enum qed_ll2_error_handle error_input;
1468 enum core_error_handle error_mode;
1469 u8 action_on_error = 0;
1472 if (!QED_LL2_RX_REGISTERED(p_ll2_conn))
1475 DIRECT_REG_WR(p_ll2_conn->rx_queue.set_prod_addr, 0x0);
1476 error_input = p_ll2_conn->input.ai_err_packet_too_big;
1477 error_mode = qed_ll2_get_error_choice(error_input);
1478 SET_FIELD(action_on_error,
1479 CORE_RX_ACTION_ON_ERROR_PACKET_TOO_BIG, error_mode);
1480 error_input = p_ll2_conn->input.ai_err_no_buf;
1481 error_mode = qed_ll2_get_error_choice(error_input);
1482 SET_FIELD(action_on_error, CORE_RX_ACTION_ON_ERROR_NO_BUFF, error_mode);
1484 rc = qed_sp_ll2_rx_queue_start(p_hwfn, p_ll2_conn, action_on_error);
1488 if (p_ll2_conn->rx_queue.ctx_based) {
1489 rc = qed_db_recovery_add(p_hwfn->cdev,
1490 p_ll2_conn->rx_queue.set_prod_addr,
1491 &p_ll2_conn->rx_queue.db_data,
1492 DB_REC_WIDTH_64B, DB_REC_KERNEL);
1499 qed_ll2_establish_connection_ooo(struct qed_hwfn *p_hwfn,
1500 struct qed_ll2_info *p_ll2_conn)
1502 if (p_ll2_conn->input.conn_type != QED_LL2_TYPE_OOO)
1505 qed_ooo_release_all_isles(p_hwfn, p_hwfn->p_ooo_info);
1506 qed_ooo_submit_rx_buffers(p_hwfn, p_ll2_conn);
1509 static inline u8 qed_ll2_handle_to_queue_id(struct qed_hwfn *p_hwfn,
1515 if (ll2_queue_type == QED_LL2_RX_TYPE_LEGACY)
1516 return p_hwfn->hw_info.resc_start[QED_LL2_RAM_QUEUE] + handle;
1518 /* QED_LL2_RX_TYPE_CTX
1519 * FW distinguishes between the legacy queues (ram based) and the
1520 * ctx based queues by the queue_id.
1521 * The first MAX_NUM_LL2_RX_RAM_QUEUES queues are legacy
1522 * and the queue ids above that are ctx base.
1524 qid = p_hwfn->hw_info.resc_start[QED_LL2_CTX_QUEUE] +
1525 MAX_NUM_LL2_RX_RAM_QUEUES;
1527 /* See comment on the acquire connection for how the ll2
1528 * queues handles are divided.
1530 qid += (handle - QED_MAX_NUM_OF_LEGACY_LL2_CONNS_PF);
1535 int qed_ll2_establish_connection(void *cxt, u8 connection_handle)
1537 struct e4_core_conn_context *p_cxt;
1538 struct qed_ll2_tx_packet *p_pkt;
1539 struct qed_ll2_info *p_ll2_conn;
1540 struct qed_hwfn *p_hwfn = cxt;
1541 struct qed_ll2_rx_queue *p_rx;
1542 struct qed_ll2_tx_queue *p_tx;
1543 struct qed_cxt_info cxt_info;
1544 struct qed_ptt *p_ptt;
1550 p_ptt = qed_ptt_acquire(p_hwfn);
1554 p_ll2_conn = qed_ll2_handle_sanity_lock(p_hwfn, connection_handle);
1560 p_rx = &p_ll2_conn->rx_queue;
1561 p_tx = &p_ll2_conn->tx_queue;
1563 qed_chain_reset(&p_rx->rxq_chain);
1564 qed_chain_reset(&p_rx->rcq_chain);
1565 INIT_LIST_HEAD(&p_rx->active_descq);
1566 INIT_LIST_HEAD(&p_rx->free_descq);
1567 INIT_LIST_HEAD(&p_rx->posting_descq);
1568 spin_lock_init(&p_rx->lock);
1569 capacity = qed_chain_get_capacity(&p_rx->rxq_chain);
1570 for (i = 0; i < capacity; i++)
1571 list_add_tail(&p_rx->descq_array[i].list_entry,
1573 *p_rx->p_fw_cons = 0;
1575 qed_chain_reset(&p_tx->txq_chain);
1576 INIT_LIST_HEAD(&p_tx->active_descq);
1577 INIT_LIST_HEAD(&p_tx->free_descq);
1578 INIT_LIST_HEAD(&p_tx->sending_descq);
1579 spin_lock_init(&p_tx->lock);
1580 capacity = qed_chain_get_capacity(&p_tx->txq_chain);
1581 /* All bds_set elements are flexibily added. */
1582 desc_size = struct_size(p_pkt, bds_set,
1583 p_ll2_conn->input.tx_max_bds_per_packet);
1585 for (i = 0; i < capacity; i++) {
1586 p_pkt = p_tx->descq_mem + desc_size * i;
1587 list_add_tail(&p_pkt->list_entry, &p_tx->free_descq);
1589 p_tx->cur_completing_bd_idx = 0;
1591 p_tx->b_completing_packet = false;
1592 p_tx->cur_send_packet = NULL;
1593 p_tx->cur_send_frag_num = 0;
1594 p_tx->cur_completing_frag_num = 0;
1595 *p_tx->p_fw_cons = 0;
1597 rc = qed_cxt_acquire_cid(p_hwfn, PROTOCOLID_CORE, &p_ll2_conn->cid);
1600 cxt_info.iid = p_ll2_conn->cid;
1601 rc = qed_cxt_get_cid_info(p_hwfn, &cxt_info);
1603 DP_NOTICE(p_hwfn, "Cannot find context info for cid=%d\n",
1608 p_cxt = cxt_info.p_cxt;
1610 memset(p_cxt, 0, sizeof(*p_cxt));
1612 qid = qed_ll2_handle_to_queue_id(p_hwfn, connection_handle,
1613 p_ll2_conn->input.rx_conn_type);
1614 p_ll2_conn->queue_id = qid;
1615 p_ll2_conn->tx_stats_id = qid;
1617 DP_VERBOSE(p_hwfn, QED_MSG_LL2,
1618 "Establishing ll2 queue. PF %d ctx_based=%d abs qid=%d\n",
1619 p_hwfn->rel_pf_id, p_ll2_conn->input.rx_conn_type, qid);
1621 if (p_ll2_conn->input.rx_conn_type == QED_LL2_RX_TYPE_LEGACY) {
1622 p_rx->set_prod_addr = p_hwfn->regview +
1623 GTT_BAR0_MAP_REG_TSDM_RAM + TSTORM_LL2_RX_PRODS_OFFSET(qid);
1625 /* QED_LL2_RX_TYPE_CTX - using doorbell */
1626 p_rx->ctx_based = 1;
1628 p_rx->set_prod_addr = p_hwfn->doorbells +
1629 p_hwfn->dpi_start_offset +
1630 DB_ADDR_SHIFT(DQ_PWM_OFFSET_TCM_LL2_PROD_UPDATE);
1632 /* prepare db data */
1633 p_rx->db_data.icid = cpu_to_le16((u16)p_ll2_conn->cid);
1634 SET_FIELD(p_rx->db_data.params,
1635 CORE_PWM_PROD_UPDATE_DATA_AGG_CMD, DB_AGG_CMD_SET);
1636 SET_FIELD(p_rx->db_data.params,
1637 CORE_PWM_PROD_UPDATE_DATA_RESERVED1, 0);
1640 p_tx->doorbell_addr = (u8 __iomem *)p_hwfn->doorbells +
1641 qed_db_addr(p_ll2_conn->cid,
1643 /* prepare db data */
1644 SET_FIELD(p_tx->db_msg.params, CORE_DB_DATA_DEST, DB_DEST_XCM);
1645 SET_FIELD(p_tx->db_msg.params, CORE_DB_DATA_AGG_CMD, DB_AGG_CMD_SET);
1646 SET_FIELD(p_tx->db_msg.params, CORE_DB_DATA_AGG_VAL_SEL,
1647 DQ_XCM_CORE_TX_BD_PROD_CMD);
1648 p_tx->db_msg.agg_flags = DQ_XCM_CORE_DQ_CF_CMD;
1650 rc = qed_ll2_establish_connection_rx(p_hwfn, p_ll2_conn);
1654 rc = qed_sp_ll2_tx_queue_start(p_hwfn, p_ll2_conn);
1658 if (!QED_IS_RDMA_PERSONALITY(p_hwfn))
1659 qed_wr(p_hwfn, p_ptt, PRS_REG_USE_LIGHT_L2, 1);
1661 qed_ll2_establish_connection_ooo(p_hwfn, p_ll2_conn);
1663 if (p_ll2_conn->input.conn_type == QED_LL2_TYPE_FCOE) {
1664 if (!test_bit(QED_MF_UFP_SPECIFIC, &p_hwfn->cdev->mf_bits))
1665 qed_llh_add_protocol_filter(p_hwfn->cdev, 0,
1666 QED_LLH_FILTER_ETHERTYPE,
1668 qed_llh_add_protocol_filter(p_hwfn->cdev, 0,
1669 QED_LLH_FILTER_ETHERTYPE,
1674 qed_ptt_release(p_hwfn, p_ptt);
1678 static void qed_ll2_post_rx_buffer_notify_fw(struct qed_hwfn *p_hwfn,
1679 struct qed_ll2_rx_queue *p_rx,
1680 struct qed_ll2_rx_packet *p_curp)
1682 struct qed_ll2_rx_packet *p_posting_packet = NULL;
1683 struct core_ll2_rx_prod rx_prod = { 0, 0 };
1684 bool b_notify_fw = false;
1685 u16 bd_prod, cq_prod;
1687 /* This handles the flushing of already posted buffers */
1688 while (!list_empty(&p_rx->posting_descq)) {
1689 p_posting_packet = list_first_entry(&p_rx->posting_descq,
1690 struct qed_ll2_rx_packet,
1692 list_move_tail(&p_posting_packet->list_entry,
1693 &p_rx->active_descq);
1697 /* This handles the supplied packet [if there is one] */
1699 list_add_tail(&p_curp->list_entry, &p_rx->active_descq);
1706 bd_prod = qed_chain_get_prod_idx(&p_rx->rxq_chain);
1707 cq_prod = qed_chain_get_prod_idx(&p_rx->rcq_chain);
1708 if (p_rx->ctx_based) {
1709 /* update producer by giving a doorbell */
1710 p_rx->db_data.prod.bd_prod = cpu_to_le16(bd_prod);
1711 p_rx->db_data.prod.cqe_prod = cpu_to_le16(cq_prod);
1712 /* Make sure chain element is updated before ringing the
1716 DIRECT_REG_WR64(p_rx->set_prod_addr,
1717 *((u64 *)&p_rx->db_data));
1719 rx_prod.bd_prod = cpu_to_le16(bd_prod);
1720 rx_prod.cqe_prod = cpu_to_le16(cq_prod);
1722 /* Make sure chain element is updated before ringing the
1727 DIRECT_REG_WR(p_rx->set_prod_addr, *((u32 *)&rx_prod));
1731 int qed_ll2_post_rx_buffer(void *cxt,
1732 u8 connection_handle,
1734 u16 buf_len, void *cookie, u8 notify_fw)
1736 struct qed_hwfn *p_hwfn = cxt;
1737 struct core_rx_bd_with_buff_len *p_curb = NULL;
1738 struct qed_ll2_rx_packet *p_curp = NULL;
1739 struct qed_ll2_info *p_ll2_conn;
1740 struct qed_ll2_rx_queue *p_rx;
1741 unsigned long flags;
1745 p_ll2_conn = qed_ll2_handle_sanity(p_hwfn, connection_handle);
1748 p_rx = &p_ll2_conn->rx_queue;
1749 if (!p_rx->set_prod_addr)
1752 spin_lock_irqsave(&p_rx->lock, flags);
1753 if (!list_empty(&p_rx->free_descq))
1754 p_curp = list_first_entry(&p_rx->free_descq,
1755 struct qed_ll2_rx_packet, list_entry);
1757 if (qed_chain_get_elem_left(&p_rx->rxq_chain) &&
1758 qed_chain_get_elem_left(&p_rx->rcq_chain)) {
1759 p_data = qed_chain_produce(&p_rx->rxq_chain);
1760 p_curb = (struct core_rx_bd_with_buff_len *)p_data;
1761 qed_chain_produce(&p_rx->rcq_chain);
1765 /* If we're lacking entires, let's try to flush buffers to FW */
1766 if (!p_curp || !p_curb) {
1772 /* We have an Rx packet we can fill */
1773 DMA_REGPAIR_LE(p_curb->addr, addr);
1774 p_curb->buff_length = cpu_to_le16(buf_len);
1775 p_curp->rx_buf_addr = addr;
1776 p_curp->cookie = cookie;
1777 p_curp->rxq_bd = p_curb;
1778 p_curp->buf_length = buf_len;
1779 list_del(&p_curp->list_entry);
1781 /* Check if we only want to enqueue this packet without informing FW */
1783 list_add_tail(&p_curp->list_entry, &p_rx->posting_descq);
1788 qed_ll2_post_rx_buffer_notify_fw(p_hwfn, p_rx, p_curp);
1790 spin_unlock_irqrestore(&p_rx->lock, flags);
1794 static void qed_ll2_prepare_tx_packet_set(struct qed_hwfn *p_hwfn,
1795 struct qed_ll2_tx_queue *p_tx,
1796 struct qed_ll2_tx_packet *p_curp,
1797 struct qed_ll2_tx_pkt_info *pkt,
1800 list_del(&p_curp->list_entry);
1801 p_curp->cookie = pkt->cookie;
1802 p_curp->bd_used = pkt->num_of_bds;
1803 p_curp->notify_fw = notify_fw;
1804 p_tx->cur_send_packet = p_curp;
1805 p_tx->cur_send_frag_num = 0;
1807 p_curp->bds_set[p_tx->cur_send_frag_num].tx_frag = pkt->first_frag;
1808 p_curp->bds_set[p_tx->cur_send_frag_num].frag_len = pkt->first_frag_len;
1809 p_tx->cur_send_frag_num++;
1813 qed_ll2_prepare_tx_packet_set_bd(struct qed_hwfn *p_hwfn,
1814 struct qed_ll2_info *p_ll2,
1815 struct qed_ll2_tx_packet *p_curp,
1816 struct qed_ll2_tx_pkt_info *pkt)
1818 struct qed_chain *p_tx_chain = &p_ll2->tx_queue.txq_chain;
1819 u16 prod_idx = qed_chain_get_prod_idx(p_tx_chain);
1820 struct core_tx_bd *start_bd = NULL;
1821 enum core_roce_flavor_type roce_flavor;
1822 enum core_tx_dest tx_dest;
1823 u16 bd_data = 0, frag_idx;
1826 roce_flavor = (pkt->qed_roce_flavor == QED_LL2_ROCE) ? CORE_ROCE
1829 switch (pkt->tx_dest) {
1830 case QED_LL2_TX_DEST_NW:
1831 tx_dest = CORE_TX_DEST_NW;
1833 case QED_LL2_TX_DEST_LB:
1834 tx_dest = CORE_TX_DEST_LB;
1836 case QED_LL2_TX_DEST_DROP:
1837 tx_dest = CORE_TX_DEST_DROP;
1840 tx_dest = CORE_TX_DEST_LB;
1844 start_bd = (struct core_tx_bd *)qed_chain_produce(p_tx_chain);
1845 if (QED_IS_IWARP_PERSONALITY(p_hwfn) &&
1846 p_ll2->input.conn_type == QED_LL2_TYPE_OOO) {
1847 start_bd->nw_vlan_or_lb_echo =
1848 cpu_to_le16(IWARP_LL2_IN_ORDER_TX_QUEUE);
1850 start_bd->nw_vlan_or_lb_echo = cpu_to_le16(pkt->vlan);
1851 if (test_bit(QED_MF_UFP_SPECIFIC, &p_hwfn->cdev->mf_bits) &&
1852 p_ll2->input.conn_type == QED_LL2_TYPE_FCOE)
1853 pkt->remove_stag = true;
1856 bitfield1 = le16_to_cpu(start_bd->bitfield1);
1857 SET_FIELD(bitfield1, CORE_TX_BD_L4_HDR_OFFSET_W, pkt->l4_hdr_offset_w);
1858 SET_FIELD(bitfield1, CORE_TX_BD_TX_DST, tx_dest);
1859 start_bd->bitfield1 = cpu_to_le16(bitfield1);
1861 bd_data |= pkt->bd_flags;
1862 SET_FIELD(bd_data, CORE_TX_BD_DATA_START_BD, 0x1);
1863 SET_FIELD(bd_data, CORE_TX_BD_DATA_NBDS, pkt->num_of_bds);
1864 SET_FIELD(bd_data, CORE_TX_BD_DATA_ROCE_FLAV, roce_flavor);
1865 SET_FIELD(bd_data, CORE_TX_BD_DATA_IP_CSUM, !!(pkt->enable_ip_cksum));
1866 SET_FIELD(bd_data, CORE_TX_BD_DATA_L4_CSUM, !!(pkt->enable_l4_cksum));
1867 SET_FIELD(bd_data, CORE_TX_BD_DATA_IP_LEN, !!(pkt->calc_ip_len));
1868 SET_FIELD(bd_data, CORE_TX_BD_DATA_DISABLE_STAG_INSERTION,
1869 !!(pkt->remove_stag));
1871 start_bd->bd_data.as_bitfield = cpu_to_le16(bd_data);
1872 DMA_REGPAIR_LE(start_bd->addr, pkt->first_frag);
1873 start_bd->nbytes = cpu_to_le16(pkt->first_frag_len);
1876 (NETIF_MSG_TX_QUEUED | QED_MSG_LL2),
1877 "LL2 [q 0x%02x cid 0x%08x type 0x%08x] Tx Producer at [0x%04x] - set with a %04x bytes %02x BDs buffer at %08x:%08x\n",
1880 p_ll2->input.conn_type,
1882 pkt->first_frag_len,
1884 le32_to_cpu(start_bd->addr.hi),
1885 le32_to_cpu(start_bd->addr.lo));
1887 if (p_ll2->tx_queue.cur_send_frag_num == pkt->num_of_bds)
1890 /* Need to provide the packet with additional BDs for frags */
1891 for (frag_idx = p_ll2->tx_queue.cur_send_frag_num;
1892 frag_idx < pkt->num_of_bds; frag_idx++) {
1893 struct core_tx_bd **p_bd = &p_curp->bds_set[frag_idx].txq_bd;
1895 *p_bd = (struct core_tx_bd *)qed_chain_produce(p_tx_chain);
1896 (*p_bd)->bd_data.as_bitfield = 0;
1897 (*p_bd)->bitfield1 = 0;
1898 p_curp->bds_set[frag_idx].tx_frag = 0;
1899 p_curp->bds_set[frag_idx].frag_len = 0;
1903 /* This should be called while the Txq spinlock is being held */
1904 static void qed_ll2_tx_packet_notify(struct qed_hwfn *p_hwfn,
1905 struct qed_ll2_info *p_ll2_conn)
1907 bool b_notify = p_ll2_conn->tx_queue.cur_send_packet->notify_fw;
1908 struct qed_ll2_tx_queue *p_tx = &p_ll2_conn->tx_queue;
1909 struct qed_ll2_tx_packet *p_pkt = NULL;
1912 /* If there are missing BDs, don't do anything now */
1913 if (p_ll2_conn->tx_queue.cur_send_frag_num !=
1914 p_ll2_conn->tx_queue.cur_send_packet->bd_used)
1917 /* Push the current packet to the list and clean after it */
1918 list_add_tail(&p_ll2_conn->tx_queue.cur_send_packet->list_entry,
1919 &p_ll2_conn->tx_queue.sending_descq);
1920 p_ll2_conn->tx_queue.cur_send_packet = NULL;
1921 p_ll2_conn->tx_queue.cur_send_frag_num = 0;
1923 /* Notify FW of packet only if requested to */
1927 bd_prod = qed_chain_get_prod_idx(&p_ll2_conn->tx_queue.txq_chain);
1929 while (!list_empty(&p_tx->sending_descq)) {
1930 p_pkt = list_first_entry(&p_tx->sending_descq,
1931 struct qed_ll2_tx_packet, list_entry);
1935 list_move_tail(&p_pkt->list_entry, &p_tx->active_descq);
1938 p_tx->db_msg.spq_prod = cpu_to_le16(bd_prod);
1940 /* Make sure the BDs data is updated before ringing the doorbell */
1943 DIRECT_REG_WR(p_tx->doorbell_addr, *((u32 *)&p_tx->db_msg));
1946 (NETIF_MSG_TX_QUEUED | QED_MSG_LL2),
1947 "LL2 [q 0x%02x cid 0x%08x type 0x%08x] Doorbelled [producer 0x%04x]\n",
1948 p_ll2_conn->queue_id,
1950 p_ll2_conn->input.conn_type, p_tx->db_msg.spq_prod);
1953 int qed_ll2_prepare_tx_packet(void *cxt,
1954 u8 connection_handle,
1955 struct qed_ll2_tx_pkt_info *pkt,
1958 struct qed_hwfn *p_hwfn = cxt;
1959 struct qed_ll2_tx_packet *p_curp = NULL;
1960 struct qed_ll2_info *p_ll2_conn = NULL;
1961 struct qed_ll2_tx_queue *p_tx;
1962 struct qed_chain *p_tx_chain;
1963 unsigned long flags;
1966 p_ll2_conn = qed_ll2_handle_sanity(p_hwfn, connection_handle);
1969 p_tx = &p_ll2_conn->tx_queue;
1970 p_tx_chain = &p_tx->txq_chain;
1972 if (pkt->num_of_bds > p_ll2_conn->input.tx_max_bds_per_packet)
1975 spin_lock_irqsave(&p_tx->lock, flags);
1976 if (p_tx->cur_send_packet) {
1981 /* Get entry, but only if we have tx elements for it */
1982 if (!list_empty(&p_tx->free_descq))
1983 p_curp = list_first_entry(&p_tx->free_descq,
1984 struct qed_ll2_tx_packet, list_entry);
1985 if (p_curp && qed_chain_get_elem_left(p_tx_chain) < pkt->num_of_bds)
1993 /* Prepare packet and BD, and perhaps send a doorbell to FW */
1994 qed_ll2_prepare_tx_packet_set(p_hwfn, p_tx, p_curp, pkt, notify_fw);
1996 qed_ll2_prepare_tx_packet_set_bd(p_hwfn, p_ll2_conn, p_curp, pkt);
1998 qed_ll2_tx_packet_notify(p_hwfn, p_ll2_conn);
2001 spin_unlock_irqrestore(&p_tx->lock, flags);
2005 int qed_ll2_set_fragment_of_tx_packet(void *cxt,
2006 u8 connection_handle,
2007 dma_addr_t addr, u16 nbytes)
2009 struct qed_ll2_tx_packet *p_cur_send_packet = NULL;
2010 struct qed_hwfn *p_hwfn = cxt;
2011 struct qed_ll2_info *p_ll2_conn = NULL;
2012 u16 cur_send_frag_num = 0;
2013 struct core_tx_bd *p_bd;
2014 unsigned long flags;
2016 p_ll2_conn = qed_ll2_handle_sanity(p_hwfn, connection_handle);
2020 if (!p_ll2_conn->tx_queue.cur_send_packet)
2023 p_cur_send_packet = p_ll2_conn->tx_queue.cur_send_packet;
2024 cur_send_frag_num = p_ll2_conn->tx_queue.cur_send_frag_num;
2026 if (cur_send_frag_num >= p_cur_send_packet->bd_used)
2029 /* Fill the BD information, and possibly notify FW */
2030 p_bd = p_cur_send_packet->bds_set[cur_send_frag_num].txq_bd;
2031 DMA_REGPAIR_LE(p_bd->addr, addr);
2032 p_bd->nbytes = cpu_to_le16(nbytes);
2033 p_cur_send_packet->bds_set[cur_send_frag_num].tx_frag = addr;
2034 p_cur_send_packet->bds_set[cur_send_frag_num].frag_len = nbytes;
2036 p_ll2_conn->tx_queue.cur_send_frag_num++;
2038 spin_lock_irqsave(&p_ll2_conn->tx_queue.lock, flags);
2039 qed_ll2_tx_packet_notify(p_hwfn, p_ll2_conn);
2040 spin_unlock_irqrestore(&p_ll2_conn->tx_queue.lock, flags);
2045 int qed_ll2_terminate_connection(void *cxt, u8 connection_handle)
2047 struct qed_hwfn *p_hwfn = cxt;
2048 struct qed_ll2_info *p_ll2_conn = NULL;
2050 struct qed_ptt *p_ptt;
2052 p_ptt = qed_ptt_acquire(p_hwfn);
2056 p_ll2_conn = qed_ll2_handle_sanity_lock(p_hwfn, connection_handle);
2062 /* Stop Tx & Rx of connection, if needed */
2063 if (QED_LL2_TX_REGISTERED(p_ll2_conn)) {
2064 p_ll2_conn->tx_queue.b_cb_registered = false;
2065 smp_wmb(); /* Make sure this is seen by ll2_lb_rxq_completion */
2066 rc = qed_sp_ll2_tx_queue_stop(p_hwfn, p_ll2_conn);
2070 qed_ll2_txq_flush(p_hwfn, connection_handle);
2071 qed_int_unregister_cb(p_hwfn, p_ll2_conn->tx_queue.tx_sb_index);
2074 if (QED_LL2_RX_REGISTERED(p_ll2_conn)) {
2075 p_ll2_conn->rx_queue.b_cb_registered = false;
2076 smp_wmb(); /* Make sure this is seen by ll2_lb_rxq_completion */
2078 if (p_ll2_conn->rx_queue.ctx_based)
2079 qed_db_recovery_del(p_hwfn->cdev,
2080 p_ll2_conn->rx_queue.set_prod_addr,
2081 &p_ll2_conn->rx_queue.db_data);
2083 rc = qed_sp_ll2_rx_queue_stop(p_hwfn, p_ll2_conn);
2087 qed_ll2_rxq_flush(p_hwfn, connection_handle);
2088 qed_int_unregister_cb(p_hwfn, p_ll2_conn->rx_queue.rx_sb_index);
2091 if (p_ll2_conn->input.conn_type == QED_LL2_TYPE_OOO)
2092 qed_ooo_release_all_isles(p_hwfn, p_hwfn->p_ooo_info);
2094 if (p_ll2_conn->input.conn_type == QED_LL2_TYPE_FCOE) {
2095 if (!test_bit(QED_MF_UFP_SPECIFIC, &p_hwfn->cdev->mf_bits))
2096 qed_llh_remove_protocol_filter(p_hwfn->cdev, 0,
2097 QED_LLH_FILTER_ETHERTYPE,
2099 qed_llh_remove_protocol_filter(p_hwfn->cdev, 0,
2100 QED_LLH_FILTER_ETHERTYPE,
2105 qed_ptt_release(p_hwfn, p_ptt);
2109 static void qed_ll2_release_connection_ooo(struct qed_hwfn *p_hwfn,
2110 struct qed_ll2_info *p_ll2_conn)
2112 struct qed_ooo_buffer *p_buffer;
2114 if (p_ll2_conn->input.conn_type != QED_LL2_TYPE_OOO)
2117 qed_ooo_release_all_isles(p_hwfn, p_hwfn->p_ooo_info);
2118 while ((p_buffer = qed_ooo_get_free_buffer(p_hwfn,
2119 p_hwfn->p_ooo_info))) {
2120 dma_free_coherent(&p_hwfn->cdev->pdev->dev,
2121 p_buffer->rx_buffer_size,
2122 p_buffer->rx_buffer_virt_addr,
2123 p_buffer->rx_buffer_phys_addr);
2128 void qed_ll2_release_connection(void *cxt, u8 connection_handle)
2130 struct qed_hwfn *p_hwfn = cxt;
2131 struct qed_ll2_info *p_ll2_conn = NULL;
2133 p_ll2_conn = qed_ll2_handle_sanity(p_hwfn, connection_handle);
2137 kfree(p_ll2_conn->tx_queue.descq_mem);
2138 qed_chain_free(p_hwfn->cdev, &p_ll2_conn->tx_queue.txq_chain);
2140 kfree(p_ll2_conn->rx_queue.descq_array);
2141 qed_chain_free(p_hwfn->cdev, &p_ll2_conn->rx_queue.rxq_chain);
2142 qed_chain_free(p_hwfn->cdev, &p_ll2_conn->rx_queue.rcq_chain);
2144 qed_cxt_release_cid(p_hwfn, p_ll2_conn->cid);
2146 qed_ll2_release_connection_ooo(p_hwfn, p_ll2_conn);
2148 mutex_lock(&p_ll2_conn->mutex);
2149 p_ll2_conn->b_active = false;
2150 mutex_unlock(&p_ll2_conn->mutex);
2153 int qed_ll2_alloc(struct qed_hwfn *p_hwfn)
2155 struct qed_ll2_info *p_ll2_connections;
2158 /* Allocate LL2's set struct */
2159 p_ll2_connections = kcalloc(QED_MAX_NUM_OF_LL2_CONNECTIONS,
2160 sizeof(struct qed_ll2_info), GFP_KERNEL);
2161 if (!p_ll2_connections) {
2162 DP_NOTICE(p_hwfn, "Failed to allocate `struct qed_ll2'\n");
2166 for (i = 0; i < QED_MAX_NUM_OF_LL2_CONNECTIONS; i++)
2167 p_ll2_connections[i].my_id = i;
2169 p_hwfn->p_ll2_info = p_ll2_connections;
2173 void qed_ll2_setup(struct qed_hwfn *p_hwfn)
2177 for (i = 0; i < QED_MAX_NUM_OF_LL2_CONNECTIONS; i++)
2178 mutex_init(&p_hwfn->p_ll2_info[i].mutex);
2181 void qed_ll2_free(struct qed_hwfn *p_hwfn)
2183 if (!p_hwfn->p_ll2_info)
2186 kfree(p_hwfn->p_ll2_info);
2187 p_hwfn->p_ll2_info = NULL;
2190 static void _qed_ll2_get_port_stats(struct qed_hwfn *p_hwfn,
2191 struct qed_ptt *p_ptt,
2192 struct qed_ll2_stats *p_stats)
2194 struct core_ll2_port_stats port_stats;
2196 memset(&port_stats, 0, sizeof(port_stats));
2197 qed_memcpy_from(p_hwfn, p_ptt, &port_stats,
2198 BAR0_MAP_REG_TSDM_RAM +
2199 TSTORM_LL2_PORT_STAT_OFFSET(MFW_PORT(p_hwfn)),
2200 sizeof(port_stats));
2202 p_stats->gsi_invalid_hdr += HILO_64_REGPAIR(port_stats.gsi_invalid_hdr);
2203 p_stats->gsi_invalid_pkt_length +=
2204 HILO_64_REGPAIR(port_stats.gsi_invalid_pkt_length);
2205 p_stats->gsi_unsupported_pkt_typ +=
2206 HILO_64_REGPAIR(port_stats.gsi_unsupported_pkt_typ);
2207 p_stats->gsi_crcchksm_error +=
2208 HILO_64_REGPAIR(port_stats.gsi_crcchksm_error);
2211 static void _qed_ll2_get_tstats(struct qed_hwfn *p_hwfn,
2212 struct qed_ptt *p_ptt,
2213 struct qed_ll2_info *p_ll2_conn,
2214 struct qed_ll2_stats *p_stats)
2216 struct core_ll2_tstorm_per_queue_stat tstats;
2217 u8 qid = p_ll2_conn->queue_id;
2220 memset(&tstats, 0, sizeof(tstats));
2221 tstats_addr = BAR0_MAP_REG_TSDM_RAM +
2222 CORE_LL2_TSTORM_PER_QUEUE_STAT_OFFSET(qid);
2223 qed_memcpy_from(p_hwfn, p_ptt, &tstats, tstats_addr, sizeof(tstats));
2225 p_stats->packet_too_big_discard +=
2226 HILO_64_REGPAIR(tstats.packet_too_big_discard);
2227 p_stats->no_buff_discard += HILO_64_REGPAIR(tstats.no_buff_discard);
2230 static void _qed_ll2_get_ustats(struct qed_hwfn *p_hwfn,
2231 struct qed_ptt *p_ptt,
2232 struct qed_ll2_info *p_ll2_conn,
2233 struct qed_ll2_stats *p_stats)
2235 struct core_ll2_ustorm_per_queue_stat ustats;
2236 u8 qid = p_ll2_conn->queue_id;
2239 memset(&ustats, 0, sizeof(ustats));
2240 ustats_addr = BAR0_MAP_REG_USDM_RAM +
2241 CORE_LL2_USTORM_PER_QUEUE_STAT_OFFSET(qid);
2242 qed_memcpy_from(p_hwfn, p_ptt, &ustats, ustats_addr, sizeof(ustats));
2244 p_stats->rcv_ucast_bytes += HILO_64_REGPAIR(ustats.rcv_ucast_bytes);
2245 p_stats->rcv_mcast_bytes += HILO_64_REGPAIR(ustats.rcv_mcast_bytes);
2246 p_stats->rcv_bcast_bytes += HILO_64_REGPAIR(ustats.rcv_bcast_bytes);
2247 p_stats->rcv_ucast_pkts += HILO_64_REGPAIR(ustats.rcv_ucast_pkts);
2248 p_stats->rcv_mcast_pkts += HILO_64_REGPAIR(ustats.rcv_mcast_pkts);
2249 p_stats->rcv_bcast_pkts += HILO_64_REGPAIR(ustats.rcv_bcast_pkts);
2252 static void _qed_ll2_get_pstats(struct qed_hwfn *p_hwfn,
2253 struct qed_ptt *p_ptt,
2254 struct qed_ll2_info *p_ll2_conn,
2255 struct qed_ll2_stats *p_stats)
2257 struct core_ll2_pstorm_per_queue_stat pstats;
2258 u8 stats_id = p_ll2_conn->tx_stats_id;
2261 memset(&pstats, 0, sizeof(pstats));
2262 pstats_addr = BAR0_MAP_REG_PSDM_RAM +
2263 CORE_LL2_PSTORM_PER_QUEUE_STAT_OFFSET(stats_id);
2264 qed_memcpy_from(p_hwfn, p_ptt, &pstats, pstats_addr, sizeof(pstats));
2266 p_stats->sent_ucast_bytes += HILO_64_REGPAIR(pstats.sent_ucast_bytes);
2267 p_stats->sent_mcast_bytes += HILO_64_REGPAIR(pstats.sent_mcast_bytes);
2268 p_stats->sent_bcast_bytes += HILO_64_REGPAIR(pstats.sent_bcast_bytes);
2269 p_stats->sent_ucast_pkts += HILO_64_REGPAIR(pstats.sent_ucast_pkts);
2270 p_stats->sent_mcast_pkts += HILO_64_REGPAIR(pstats.sent_mcast_pkts);
2271 p_stats->sent_bcast_pkts += HILO_64_REGPAIR(pstats.sent_bcast_pkts);
2274 static int __qed_ll2_get_stats(void *cxt, u8 connection_handle,
2275 struct qed_ll2_stats *p_stats)
2277 struct qed_hwfn *p_hwfn = cxt;
2278 struct qed_ll2_info *p_ll2_conn = NULL;
2279 struct qed_ptt *p_ptt;
2281 if ((connection_handle >= QED_MAX_NUM_OF_LL2_CONNECTIONS) ||
2282 !p_hwfn->p_ll2_info)
2285 p_ll2_conn = &p_hwfn->p_ll2_info[connection_handle];
2287 p_ptt = qed_ptt_acquire(p_hwfn);
2289 DP_ERR(p_hwfn, "Failed to acquire ptt\n");
2293 if (p_ll2_conn->input.gsi_enable)
2294 _qed_ll2_get_port_stats(p_hwfn, p_ptt, p_stats);
2296 _qed_ll2_get_tstats(p_hwfn, p_ptt, p_ll2_conn, p_stats);
2298 _qed_ll2_get_ustats(p_hwfn, p_ptt, p_ll2_conn, p_stats);
2300 if (p_ll2_conn->tx_stats_en)
2301 _qed_ll2_get_pstats(p_hwfn, p_ptt, p_ll2_conn, p_stats);
2303 qed_ptt_release(p_hwfn, p_ptt);
2308 int qed_ll2_get_stats(void *cxt,
2309 u8 connection_handle, struct qed_ll2_stats *p_stats)
2311 memset(p_stats, 0, sizeof(*p_stats));
2312 return __qed_ll2_get_stats(cxt, connection_handle, p_stats);
2315 static void qed_ll2b_release_rx_packet(void *cxt,
2316 u8 connection_handle,
2318 dma_addr_t rx_buf_addr,
2321 struct qed_hwfn *p_hwfn = cxt;
2323 qed_ll2_dealloc_buffer(p_hwfn->cdev, cookie);
2326 static void qed_ll2_register_cb_ops(struct qed_dev *cdev,
2327 const struct qed_ll2_cb_ops *ops,
2330 cdev->ll2->cbs = ops;
2331 cdev->ll2->cb_cookie = cookie;
2334 static struct qed_ll2_cbs ll2_cbs = {
2335 .rx_comp_cb = &qed_ll2b_complete_rx_packet,
2336 .rx_release_cb = &qed_ll2b_release_rx_packet,
2337 .tx_comp_cb = &qed_ll2b_complete_tx_packet,
2338 .tx_release_cb = &qed_ll2b_complete_tx_packet,
2341 static void qed_ll2_set_conn_data(struct qed_hwfn *p_hwfn,
2342 struct qed_ll2_acquire_data *data,
2343 struct qed_ll2_params *params,
2344 enum qed_ll2_conn_type conn_type,
2345 u8 *handle, bool lb)
2347 memset(data, 0, sizeof(*data));
2349 data->input.conn_type = conn_type;
2350 data->input.mtu = params->mtu;
2351 data->input.rx_num_desc = QED_LL2_RX_SIZE;
2352 data->input.rx_drop_ttl0_flg = params->drop_ttl0_packets;
2353 data->input.rx_vlan_removal_en = params->rx_vlan_stripping;
2354 data->input.tx_num_desc = QED_LL2_TX_SIZE;
2355 data->p_connection_handle = handle;
2356 data->cbs = &ll2_cbs;
2357 ll2_cbs.cookie = p_hwfn;
2360 data->input.tx_tc = PKT_LB_TC;
2361 data->input.tx_dest = QED_LL2_TX_DEST_LB;
2363 data->input.tx_tc = 0;
2364 data->input.tx_dest = QED_LL2_TX_DEST_NW;
2368 static int qed_ll2_start_ooo(struct qed_hwfn *p_hwfn,
2369 struct qed_ll2_params *params)
2371 u8 *handle = &p_hwfn->pf_params.iscsi_pf_params.ll2_ooo_queue_id;
2372 struct qed_ll2_acquire_data data;
2375 qed_ll2_set_conn_data(p_hwfn, &data, params,
2376 QED_LL2_TYPE_OOO, handle, true);
2378 rc = qed_ll2_acquire_connection(p_hwfn, &data);
2380 DP_INFO(p_hwfn, "Failed to acquire LL2 OOO connection\n");
2384 rc = qed_ll2_establish_connection(p_hwfn, *handle);
2386 DP_INFO(p_hwfn, "Failed to establish LL2 OOO connection\n");
2393 qed_ll2_release_connection(p_hwfn, *handle);
2395 *handle = QED_LL2_UNUSED_HANDLE;
2399 static bool qed_ll2_is_storage_eng1(struct qed_dev *cdev)
2401 return (QED_IS_FCOE_PERSONALITY(QED_LEADING_HWFN(cdev)) ||
2402 QED_IS_ISCSI_PERSONALITY(QED_LEADING_HWFN(cdev))) &&
2403 (QED_AFFIN_HWFN(cdev) != QED_LEADING_HWFN(cdev));
2406 static int __qed_ll2_stop(struct qed_hwfn *p_hwfn)
2408 struct qed_dev *cdev = p_hwfn->cdev;
2411 rc = qed_ll2_terminate_connection(p_hwfn, cdev->ll2->handle);
2413 DP_INFO(cdev, "Failed to terminate LL2 connection\n");
2415 qed_ll2_release_connection(p_hwfn, cdev->ll2->handle);
2420 static int qed_ll2_stop(struct qed_dev *cdev)
2422 bool b_is_storage_eng1 = qed_ll2_is_storage_eng1(cdev);
2423 struct qed_hwfn *p_hwfn = QED_AFFIN_HWFN(cdev);
2424 int rc = 0, rc2 = 0;
2426 if (cdev->ll2->handle == QED_LL2_UNUSED_HANDLE)
2429 qed_llh_remove_mac_filter(cdev, 0, cdev->ll2_mac_address);
2430 eth_zero_addr(cdev->ll2_mac_address);
2432 if (QED_IS_ISCSI_PERSONALITY(p_hwfn))
2433 qed_ll2_stop_ooo(p_hwfn);
2435 /* In CMT mode, LL2 is always started on engine 0 for a storage PF */
2436 if (b_is_storage_eng1) {
2437 rc2 = __qed_ll2_stop(QED_LEADING_HWFN(cdev));
2439 DP_NOTICE(QED_LEADING_HWFN(cdev),
2440 "Failed to stop LL2 on engine 0\n");
2443 rc = __qed_ll2_stop(p_hwfn);
2445 DP_NOTICE(p_hwfn, "Failed to stop LL2\n");
2447 qed_ll2_kill_buffers(cdev);
2449 cdev->ll2->handle = QED_LL2_UNUSED_HANDLE;
2454 static int __qed_ll2_start(struct qed_hwfn *p_hwfn,
2455 struct qed_ll2_params *params)
2457 struct qed_ll2_buffer *buffer, *tmp_buffer;
2458 struct qed_dev *cdev = p_hwfn->cdev;
2459 enum qed_ll2_conn_type conn_type;
2460 struct qed_ll2_acquire_data data;
2463 switch (p_hwfn->hw_info.personality) {
2465 conn_type = QED_LL2_TYPE_FCOE;
2468 conn_type = QED_LL2_TYPE_ISCSI;
2470 case QED_PCI_ETH_ROCE:
2471 conn_type = QED_LL2_TYPE_ROCE;
2475 conn_type = QED_LL2_TYPE_TEST;
2478 qed_ll2_set_conn_data(p_hwfn, &data, params, conn_type,
2479 &cdev->ll2->handle, false);
2481 rc = qed_ll2_acquire_connection(p_hwfn, &data);
2483 DP_INFO(p_hwfn, "Failed to acquire LL2 connection\n");
2487 rc = qed_ll2_establish_connection(p_hwfn, cdev->ll2->handle);
2489 DP_INFO(p_hwfn, "Failed to establish LL2 connection\n");
2493 /* Post all Rx buffers to FW */
2494 spin_lock_bh(&cdev->ll2->lock);
2495 rx_cnt = cdev->ll2->rx_cnt;
2496 list_for_each_entry_safe(buffer, tmp_buffer, &cdev->ll2->list, list) {
2497 rc = qed_ll2_post_rx_buffer(p_hwfn,
2499 buffer->phys_addr, 0, buffer, 1);
2502 "Failed to post an Rx buffer; Deleting it\n");
2503 dma_unmap_single(&cdev->pdev->dev, buffer->phys_addr,
2504 cdev->ll2->rx_size, DMA_FROM_DEVICE);
2505 kfree(buffer->data);
2506 list_del(&buffer->list);
2512 spin_unlock_bh(&cdev->ll2->lock);
2514 if (rx_cnt == cdev->ll2->rx_cnt) {
2515 DP_NOTICE(p_hwfn, "Failed passing even a single Rx buffer\n");
2516 goto terminate_conn;
2518 cdev->ll2->rx_cnt = rx_cnt;
2523 qed_ll2_terminate_connection(p_hwfn, cdev->ll2->handle);
2525 qed_ll2_release_connection(p_hwfn, cdev->ll2->handle);
2529 static int qed_ll2_start(struct qed_dev *cdev, struct qed_ll2_params *params)
2531 bool b_is_storage_eng1 = qed_ll2_is_storage_eng1(cdev);
2532 struct qed_hwfn *p_hwfn = QED_AFFIN_HWFN(cdev);
2533 struct qed_ll2_buffer *buffer;
2534 int rx_num_desc, i, rc;
2536 if (!is_valid_ether_addr(params->ll2_mac_address)) {
2537 DP_NOTICE(cdev, "Invalid Ethernet address\n");
2541 WARN_ON(!cdev->ll2->cbs);
2543 /* Initialize LL2 locks & lists */
2544 INIT_LIST_HEAD(&cdev->ll2->list);
2545 spin_lock_init(&cdev->ll2->lock);
2547 cdev->ll2->rx_size = PRM_DMA_PAD_BYTES_NUM + ETH_HLEN +
2548 L1_CACHE_BYTES + params->mtu;
2550 /* Allocate memory for LL2.
2551 * In CMT mode, in case of a storage PF which is affintized to engine 1,
2552 * LL2 is started also on engine 0 and thus we need twofold buffers.
2554 rx_num_desc = QED_LL2_RX_SIZE * (b_is_storage_eng1 ? 2 : 1);
2555 DP_INFO(cdev, "Allocating %d LL2 buffers of size %08x bytes\n",
2556 rx_num_desc, cdev->ll2->rx_size);
2557 for (i = 0; i < rx_num_desc; i++) {
2558 buffer = kzalloc(sizeof(*buffer), GFP_KERNEL);
2560 DP_INFO(cdev, "Failed to allocate LL2 buffers\n");
2565 rc = qed_ll2_alloc_buffer(cdev, (u8 **)&buffer->data,
2566 &buffer->phys_addr);
2572 list_add_tail(&buffer->list, &cdev->ll2->list);
2575 rc = __qed_ll2_start(p_hwfn, params);
2577 DP_NOTICE(cdev, "Failed to start LL2\n");
2581 /* In CMT mode, always need to start LL2 on engine 0 for a storage PF,
2582 * since broadcast/mutlicast packets are routed to engine 0.
2584 if (b_is_storage_eng1) {
2585 rc = __qed_ll2_start(QED_LEADING_HWFN(cdev), params);
2587 DP_NOTICE(QED_LEADING_HWFN(cdev),
2588 "Failed to start LL2 on engine 0\n");
2593 if (QED_IS_ISCSI_PERSONALITY(p_hwfn)) {
2594 DP_VERBOSE(cdev, QED_MSG_STORAGE, "Starting OOO LL2 queue\n");
2595 rc = qed_ll2_start_ooo(p_hwfn, params);
2597 DP_NOTICE(cdev, "Failed to start OOO LL2\n");
2602 rc = qed_llh_add_mac_filter(cdev, 0, params->ll2_mac_address);
2604 DP_NOTICE(cdev, "Failed to add an LLH filter\n");
2608 ether_addr_copy(cdev->ll2_mac_address, params->ll2_mac_address);
2613 if (QED_IS_ISCSI_PERSONALITY(p_hwfn))
2614 qed_ll2_stop_ooo(p_hwfn);
2616 if (b_is_storage_eng1)
2617 __qed_ll2_stop(QED_LEADING_HWFN(cdev));
2619 __qed_ll2_stop(p_hwfn);
2621 qed_ll2_kill_buffers(cdev);
2622 cdev->ll2->handle = QED_LL2_UNUSED_HANDLE;
2626 static int qed_ll2_start_xmit(struct qed_dev *cdev, struct sk_buff *skb,
2627 unsigned long xmit_flags)
2629 struct qed_hwfn *p_hwfn = QED_AFFIN_HWFN(cdev);
2630 struct qed_ll2_tx_pkt_info pkt;
2631 const skb_frag_t *frag;
2632 u8 flags = 0, nr_frags;
2633 int rc = -EINVAL, i;
2637 if (unlikely(skb->ip_summed != CHECKSUM_NONE)) {
2638 DP_INFO(cdev, "Cannot transmit a checksummed packet\n");
2642 /* Cache number of fragments from SKB since SKB may be freed by
2643 * the completion routine after calling qed_ll2_prepare_tx_packet()
2645 nr_frags = skb_shinfo(skb)->nr_frags;
2647 if (1 + nr_frags > CORE_LL2_TX_MAX_BDS_PER_PACKET) {
2648 DP_ERR(cdev, "Cannot transmit a packet with %d fragments\n",
2653 mapping = dma_map_single(&cdev->pdev->dev, skb->data,
2654 skb->len, DMA_TO_DEVICE);
2655 if (unlikely(dma_mapping_error(&cdev->pdev->dev, mapping))) {
2656 DP_NOTICE(cdev, "SKB mapping failed\n");
2660 /* Request HW to calculate IP csum */
2661 if (!((vlan_get_protocol(skb) == htons(ETH_P_IPV6)) &&
2662 ipv6_hdr(skb)->nexthdr == NEXTHDR_IPV6))
2663 flags |= BIT(CORE_TX_BD_DATA_IP_CSUM_SHIFT);
2665 if (skb_vlan_tag_present(skb)) {
2666 vlan = skb_vlan_tag_get(skb);
2667 flags |= BIT(CORE_TX_BD_DATA_VLAN_INSERTION_SHIFT);
2670 memset(&pkt, 0, sizeof(pkt));
2671 pkt.num_of_bds = 1 + nr_frags;
2673 pkt.bd_flags = flags;
2674 pkt.tx_dest = QED_LL2_TX_DEST_NW;
2675 pkt.first_frag = mapping;
2676 pkt.first_frag_len = skb->len;
2678 if (test_bit(QED_MF_UFP_SPECIFIC, &cdev->mf_bits) &&
2679 test_bit(QED_LL2_XMIT_FLAGS_FIP_DISCOVERY, &xmit_flags))
2680 pkt.remove_stag = true;
2682 /* qed_ll2_prepare_tx_packet() may actually send the packet if
2683 * there are no fragments in the skb and subsequently the completion
2684 * routine may run and free the SKB, so no dereferencing the SKB
2685 * beyond this point unless skb has any fragments.
2687 rc = qed_ll2_prepare_tx_packet(p_hwfn, cdev->ll2->handle,
2692 for (i = 0; i < nr_frags; i++) {
2693 frag = &skb_shinfo(skb)->frags[i];
2695 mapping = skb_frag_dma_map(&cdev->pdev->dev, frag, 0,
2696 skb_frag_size(frag), DMA_TO_DEVICE);
2698 if (unlikely(dma_mapping_error(&cdev->pdev->dev, mapping))) {
2700 "Unable to map frag - dropping packet\n");
2705 rc = qed_ll2_set_fragment_of_tx_packet(p_hwfn,
2708 skb_frag_size(frag));
2710 /* if failed not much to do here, partial packet has been posted
2711 * we can't free memory, will need to wait for completion
2720 dma_unmap_single(&cdev->pdev->dev, mapping, skb->len, DMA_TO_DEVICE);
2725 static int qed_ll2_stats(struct qed_dev *cdev, struct qed_ll2_stats *stats)
2727 bool b_is_storage_eng1 = qed_ll2_is_storage_eng1(cdev);
2728 struct qed_hwfn *p_hwfn = QED_AFFIN_HWFN(cdev);
2734 rc = qed_ll2_get_stats(p_hwfn, cdev->ll2->handle, stats);
2736 DP_NOTICE(p_hwfn, "Failed to get LL2 stats\n");
2740 /* In CMT mode, LL2 is always started on engine 0 for a storage PF */
2741 if (b_is_storage_eng1) {
2742 rc = __qed_ll2_get_stats(QED_LEADING_HWFN(cdev),
2743 cdev->ll2->handle, stats);
2745 DP_NOTICE(QED_LEADING_HWFN(cdev),
2746 "Failed to get LL2 stats on engine 0\n");
2754 const struct qed_ll2_ops qed_ll2_ops_pass = {
2755 .start = &qed_ll2_start,
2756 .stop = &qed_ll2_stop,
2757 .start_xmit = &qed_ll2_start_xmit,
2758 .register_cb_ops = &qed_ll2_register_cb_ops,
2759 .get_stats = &qed_ll2_stats,
2762 int qed_ll2_alloc_if(struct qed_dev *cdev)
2764 cdev->ll2 = kzalloc(sizeof(*cdev->ll2), GFP_KERNEL);
2765 return cdev->ll2 ? 0 : -ENOMEM;
2768 void qed_ll2_dealloc_if(struct qed_dev *cdev)