2 * Copyright (C) 2009-2010, Lars-Peter Clausen <lars@metafoo.de>
3 * JZ4740 platform devices
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the
7 * Free Software Foundation; either version 2 of the License, or (at your
8 * option) any later version.
10 * You should have received a copy of the GNU General Public License along
11 * with this program; if not, write to the Free Software Foundation, Inc.,
12 * 675 Mass Ave, Cambridge, MA 02139, USA.
16 #include <linux/clk.h>
17 #include <linux/device.h>
18 #include <linux/kernel.h>
19 #include <linux/platform_device.h>
20 #include <linux/resource.h>
22 #include <linux/dma-mapping.h>
24 #include <linux/usb/musb.h>
26 #include <asm/mach-jz4740/platform.h>
27 #include <asm/mach-jz4740/base.h>
28 #include <asm/mach-jz4740/irq.h>
30 #include <linux/serial_core.h>
31 #include <linux/serial_8250.h>
35 /* USB Device Controller */
36 struct platform_device jz4740_udc_xceiv_device = {
37 .name = "usb_phy_generic",
41 static struct resource jz4740_udc_resources[] = {
43 .start = JZ4740_UDC_BASE_ADDR,
44 .end = JZ4740_UDC_BASE_ADDR + 0x10000 - 1,
45 .flags = IORESOURCE_MEM,
48 .start = JZ4740_IRQ_UDC,
49 .end = JZ4740_IRQ_UDC,
50 .flags = IORESOURCE_IRQ,
55 struct platform_device jz4740_udc_device = {
56 .name = "musb-jz4740",
59 .dma_mask = &jz4740_udc_device.dev.coherent_dma_mask,
60 .coherent_dma_mask = DMA_BIT_MASK(32),
62 .num_resources = ARRAY_SIZE(jz4740_udc_resources),
63 .resource = jz4740_udc_resources,
66 /* MMC/SD controller */
67 static struct resource jz4740_mmc_resources[] = {
69 .start = JZ4740_MSC_BASE_ADDR,
70 .end = JZ4740_MSC_BASE_ADDR + 0x1000 - 1,
71 .flags = IORESOURCE_MEM,
74 .start = JZ4740_IRQ_MSC,
75 .end = JZ4740_IRQ_MSC,
76 .flags = IORESOURCE_IRQ,
80 struct platform_device jz4740_mmc_device = {
84 .dma_mask = &jz4740_mmc_device.dev.coherent_dma_mask,
85 .coherent_dma_mask = DMA_BIT_MASK(32),
87 .num_resources = ARRAY_SIZE(jz4740_mmc_resources),
88 .resource = jz4740_mmc_resources,
92 static struct resource jz4740_i2c_resources[] = {
94 .start = JZ4740_I2C_BASE_ADDR,
95 .end = JZ4740_I2C_BASE_ADDR + 0x1000 - 1,
96 .flags = IORESOURCE_MEM,
99 .start = JZ4740_IRQ_I2C,
100 .end = JZ4740_IRQ_I2C,
101 .flags = IORESOURCE_IRQ,
105 struct platform_device jz4740_i2c_device = {
106 .name = "jz4740-i2c",
108 .num_resources = ARRAY_SIZE(jz4740_i2c_resources),
109 .resource = jz4740_i2c_resources,
112 /* NAND controller */
113 static struct resource jz4740_nand_resources[] = {
116 .start = JZ4740_EMC_BASE_ADDR,
117 .end = JZ4740_EMC_BASE_ADDR + 0x1000 - 1,
118 .flags = IORESOURCE_MEM,
123 .end = 0x180C0000 - 1,
124 .flags = IORESOURCE_MEM,
129 .end = 0x140C0000 - 1,
130 .flags = IORESOURCE_MEM,
135 .end = 0x0C0C0000 - 1,
136 .flags = IORESOURCE_MEM,
141 .end = 0x080C0000 - 1,
142 .flags = IORESOURCE_MEM,
146 struct platform_device jz4740_nand_device = {
147 .name = "jz4740-nand",
148 .num_resources = ARRAY_SIZE(jz4740_nand_resources),
149 .resource = jz4740_nand_resources,
153 static struct resource jz4740_framebuffer_resources[] = {
155 .start = JZ4740_LCD_BASE_ADDR,
156 .end = JZ4740_LCD_BASE_ADDR + 0x1000 - 1,
157 .flags = IORESOURCE_MEM,
161 struct platform_device jz4740_framebuffer_device = {
164 .num_resources = ARRAY_SIZE(jz4740_framebuffer_resources),
165 .resource = jz4740_framebuffer_resources,
167 .dma_mask = &jz4740_framebuffer_device.dev.coherent_dma_mask,
168 .coherent_dma_mask = DMA_BIT_MASK(32),
173 static struct resource jz4740_i2s_resources[] = {
175 .start = JZ4740_AIC_BASE_ADDR,
176 .end = JZ4740_AIC_BASE_ADDR + 0x38 - 1,
177 .flags = IORESOURCE_MEM,
181 struct platform_device jz4740_i2s_device = {
182 .name = "jz4740-i2s",
184 .num_resources = ARRAY_SIZE(jz4740_i2s_resources),
185 .resource = jz4740_i2s_resources,
189 struct platform_device jz4740_pcm_device = {
190 .name = "jz4740-pcm-audio",
195 static struct resource jz4740_codec_resources[] = {
197 .start = JZ4740_AIC_BASE_ADDR + 0x80,
198 .end = JZ4740_AIC_BASE_ADDR + 0x88 - 1,
199 .flags = IORESOURCE_MEM,
203 struct platform_device jz4740_codec_device = {
204 .name = "jz4740-codec",
206 .num_resources = ARRAY_SIZE(jz4740_codec_resources),
207 .resource = jz4740_codec_resources,
211 static struct resource jz4740_adc_resources[] = {
213 .start = JZ4740_SADC_BASE_ADDR,
214 .end = JZ4740_SADC_BASE_ADDR + 0x30,
215 .flags = IORESOURCE_MEM,
218 .start = JZ4740_IRQ_SADC,
219 .end = JZ4740_IRQ_SADC,
220 .flags = IORESOURCE_IRQ,
223 .start = JZ4740_IRQ_ADC_BASE,
224 .end = JZ4740_IRQ_ADC_BASE,
225 .flags = IORESOURCE_IRQ,
229 struct platform_device jz4740_adc_device = {
230 .name = "jz4740-adc",
232 .num_resources = ARRAY_SIZE(jz4740_adc_resources),
233 .resource = jz4740_adc_resources,
237 struct platform_device jz4740_pwm_device = {
238 .name = "jz4740-pwm",
243 static struct resource jz4740_dma_resources[] = {
245 .start = JZ4740_DMAC_BASE_ADDR,
246 .end = JZ4740_DMAC_BASE_ADDR + 0x400 - 1,
247 .flags = IORESOURCE_MEM,
250 .start = JZ4740_IRQ_DMAC,
251 .end = JZ4740_IRQ_DMAC,
252 .flags = IORESOURCE_IRQ,
256 struct platform_device jz4740_dma_device = {
257 .name = "jz4740-dma",
259 .num_resources = ARRAY_SIZE(jz4740_dma_resources),
260 .resource = jz4740_dma_resources,