2 * cros_ec_lpc - LPC access to the Chrome OS Embedded Controller
4 * Copyright (C) 2012-2015 Google, Inc
6 * This software is licensed under the terms of the GNU General Public
7 * License version 2, as published by the Free Software Foundation, and
8 * may be copied, distributed, and modified under those terms.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * This driver uses the Chrome OS EC byte-level message-based protocol for
16 * communicating the keyboard state (which keys are pressed) from a keyboard EC
17 * to the AP over some bus (such as i2c, lpc, spi). The EC does debouncing,
18 * but everything else (including deghosting) is done here. The main
19 * motivation for this is to keep the EC firmware as simple as possible, since
20 * it cannot be easily upgraded and EC flash/IRAM space is relatively
24 #include <linux/acpi.h>
25 #include <linux/dmi.h>
26 #include <linux/delay.h>
28 #include <linux/mfd/cros_ec.h>
29 #include <linux/mfd/cros_ec_commands.h>
30 #include <linux/mfd/cros_ec_lpc_reg.h>
31 #include <linux/module.h>
32 #include <linux/platform_device.h>
33 #include <linux/printk.h>
35 #define DRV_NAME "cros_ec_lpcs"
36 #define ACPI_DRV_NAME "GOOG0004"
38 static int ec_response_timed_out(void)
40 unsigned long one_second = jiffies + HZ;
43 usleep_range(200, 300);
45 if (!(cros_ec_lpc_read_bytes(EC_LPC_ADDR_HOST_CMD, 1, &data) &
46 EC_LPC_STATUS_BUSY_MASK))
48 usleep_range(100, 200);
49 } while (time_before(jiffies, one_second));
54 static int cros_ec_pkt_xfer_lpc(struct cros_ec_device *ec,
55 struct cros_ec_command *msg)
57 struct ec_host_response response;
62 ret = cros_ec_prepare_tx(ec, msg);
65 cros_ec_lpc_write_bytes(EC_LPC_ADDR_HOST_PACKET, ret, ec->dout);
68 sum = EC_COMMAND_PROTOCOL_3;
69 cros_ec_lpc_write_bytes(EC_LPC_ADDR_HOST_CMD, 1, &sum);
71 if (ec_response_timed_out()) {
72 dev_warn(ec->dev, "EC responsed timed out\n");
78 msg->result = cros_ec_lpc_read_bytes(EC_LPC_ADDR_HOST_DATA, 1, &sum);
79 ret = cros_ec_check_result(ec, msg);
83 /* Read back response */
84 dout = (u8 *)&response;
85 sum = cros_ec_lpc_read_bytes(EC_LPC_ADDR_HOST_PACKET, sizeof(response),
88 msg->result = response.result;
90 if (response.data_len > msg->insize) {
92 "packet too long (%d bytes, expected %d)",
93 response.data_len, msg->insize);
98 /* Read response and process checksum */
99 sum += cros_ec_lpc_read_bytes(EC_LPC_ADDR_HOST_PACKET +
100 sizeof(response), response.data_len,
105 "bad packet checksum %02x\n",
111 /* Return actual amount of data received */
112 ret = response.data_len;
117 static int cros_ec_cmd_xfer_lpc(struct cros_ec_device *ec,
118 struct cros_ec_command *msg)
120 struct ec_lpc_host_args args;
124 if (msg->outsize > EC_PROTO2_MAX_PARAM_SIZE ||
125 msg->insize > EC_PROTO2_MAX_PARAM_SIZE) {
127 "invalid buffer sizes (out %d, in %d)\n",
128 msg->outsize, msg->insize);
132 /* Now actually send the command to the EC and get the result */
133 args.flags = EC_HOST_ARGS_FLAG_FROM_HOST;
134 args.command_version = msg->version;
135 args.data_size = msg->outsize;
137 /* Initialize checksum */
138 sum = msg->command + args.flags + args.command_version + args.data_size;
140 /* Copy data and update checksum */
141 sum += cros_ec_lpc_write_bytes(EC_LPC_ADDR_HOST_PARAM, msg->outsize,
144 /* Finalize checksum and write args */
146 cros_ec_lpc_write_bytes(EC_LPC_ADDR_HOST_ARGS, sizeof(args),
151 cros_ec_lpc_write_bytes(EC_LPC_ADDR_HOST_CMD, 1, &sum);
153 if (ec_response_timed_out()) {
154 dev_warn(ec->dev, "EC responsed timed out\n");
160 msg->result = cros_ec_lpc_read_bytes(EC_LPC_ADDR_HOST_DATA, 1, &sum);
161 ret = cros_ec_check_result(ec, msg);
166 cros_ec_lpc_read_bytes(EC_LPC_ADDR_HOST_ARGS, sizeof(args),
169 if (args.data_size > msg->insize) {
171 "packet too long (%d bytes, expected %d)",
172 args.data_size, msg->insize);
177 /* Start calculating response checksum */
178 sum = msg->command + args.flags + args.command_version + args.data_size;
180 /* Read response and update checksum */
181 sum += cros_ec_lpc_read_bytes(EC_LPC_ADDR_HOST_PARAM, args.data_size,
184 /* Verify checksum */
185 if (args.checksum != sum) {
187 "bad packet checksum, expected %02x, got %02x\n",
193 /* Return actual amount of data received */
194 ret = args.data_size;
199 /* Returns num bytes read, or negative on error. Doesn't need locking. */
200 static int cros_ec_lpc_readmem(struct cros_ec_device *ec, unsigned int offset,
201 unsigned int bytes, void *dest)
207 if (offset >= EC_MEMMAP_SIZE - bytes)
212 cros_ec_lpc_read_bytes(EC_LPC_ADDR_MEMMAP + offset, bytes, s);
217 for (; i < EC_MEMMAP_SIZE; i++, s++) {
218 cros_ec_lpc_read_bytes(EC_LPC_ADDR_MEMMAP + i, 1, s);
227 static void cros_ec_lpc_acpi_notify(acpi_handle device, u32 value, void *data)
229 struct cros_ec_device *ec_dev = data;
231 if (ec_dev->mkbp_event_supported &&
232 cros_ec_get_next_event(ec_dev, NULL) > 0)
233 blocking_notifier_call_chain(&ec_dev->event_notifier, 0,
237 static int cros_ec_lpc_probe(struct platform_device *pdev)
239 struct device *dev = &pdev->dev;
240 struct acpi_device *adev;
242 struct cros_ec_device *ec_dev;
246 if (!devm_request_region(dev, EC_LPC_ADDR_MEMMAP, EC_MEMMAP_SIZE,
248 dev_err(dev, "couldn't reserve memmap region\n");
252 cros_ec_lpc_read_bytes(EC_LPC_ADDR_MEMMAP + EC_MEMMAP_ID, 2, buf);
253 if (buf[0] != 'E' || buf[1] != 'C') {
254 dev_err(dev, "EC ID not detected\n");
258 if (!devm_request_region(dev, EC_HOST_CMD_REGION0,
259 EC_HOST_CMD_REGION_SIZE, dev_name(dev))) {
260 dev_err(dev, "couldn't reserve region0\n");
263 if (!devm_request_region(dev, EC_HOST_CMD_REGION1,
264 EC_HOST_CMD_REGION_SIZE, dev_name(dev))) {
265 dev_err(dev, "couldn't reserve region1\n");
269 ec_dev = devm_kzalloc(dev, sizeof(*ec_dev), GFP_KERNEL);
273 platform_set_drvdata(pdev, ec_dev);
275 ec_dev->phys_name = dev_name(dev);
276 ec_dev->cmd_xfer = cros_ec_cmd_xfer_lpc;
277 ec_dev->pkt_xfer = cros_ec_pkt_xfer_lpc;
278 ec_dev->cmd_readmem = cros_ec_lpc_readmem;
279 ec_dev->din_size = sizeof(struct ec_host_response) +
280 sizeof(struct ec_response_get_protocol_info);
281 ec_dev->dout_size = sizeof(struct ec_host_request);
283 ret = cros_ec_register(ec_dev);
285 dev_err(dev, "couldn't register ec_dev (%d)\n", ret);
290 * Connect a notify handler to process MKBP messages if we have a
291 * companion ACPI device.
293 adev = ACPI_COMPANION(dev);
295 status = acpi_install_notify_handler(adev->handle,
297 cros_ec_lpc_acpi_notify,
299 if (ACPI_FAILURE(status))
300 dev_warn(dev, "Failed to register notifier %08x\n",
307 static int cros_ec_lpc_remove(struct platform_device *pdev)
309 struct cros_ec_device *ec_dev;
310 struct acpi_device *adev;
312 adev = ACPI_COMPANION(&pdev->dev);
314 acpi_remove_notify_handler(adev->handle, ACPI_ALL_NOTIFY,
315 cros_ec_lpc_acpi_notify);
317 ec_dev = platform_get_drvdata(pdev);
318 cros_ec_remove(ec_dev);
323 static const struct acpi_device_id cros_ec_lpc_acpi_device_ids[] = {
324 { ACPI_DRV_NAME, 0 },
327 MODULE_DEVICE_TABLE(acpi, cros_ec_lpc_acpi_device_ids);
329 static const struct dmi_system_id cros_ec_lpc_dmi_table[] __initconst = {
332 * Today all Chromebooks/boxes ship with Google_* as version and
333 * coreboot as bios vendor. No other systems with this
334 * combination are known to date.
337 DMI_MATCH(DMI_BIOS_VENDOR, "coreboot"),
338 DMI_MATCH(DMI_BIOS_VERSION, "Google_"),
342 /* x86-link, the Chromebook Pixel. */
344 DMI_MATCH(DMI_SYS_VENDOR, "GOOGLE"),
345 DMI_MATCH(DMI_PRODUCT_NAME, "Link"),
349 /* x86-samus, the Chromebook Pixel 2. */
351 DMI_MATCH(DMI_SYS_VENDOR, "GOOGLE"),
352 DMI_MATCH(DMI_PRODUCT_NAME, "Samus"),
356 /* x86-peppy, the Acer C720 Chromebook. */
358 DMI_MATCH(DMI_SYS_VENDOR, "Acer"),
359 DMI_MATCH(DMI_PRODUCT_NAME, "Peppy"),
364 MODULE_DEVICE_TABLE(dmi, cros_ec_lpc_dmi_table);
366 #ifdef CONFIG_PM_SLEEP
367 static int cros_ec_lpc_suspend(struct device *dev)
369 struct cros_ec_device *ec_dev = dev_get_drvdata(dev);
371 return cros_ec_suspend(ec_dev);
374 static int cros_ec_lpc_resume(struct device *dev)
376 struct cros_ec_device *ec_dev = dev_get_drvdata(dev);
378 return cros_ec_resume(ec_dev);
382 const struct dev_pm_ops cros_ec_lpc_pm_ops = {
383 SET_LATE_SYSTEM_SLEEP_PM_OPS(cros_ec_lpc_suspend, cros_ec_lpc_resume)
386 static struct platform_driver cros_ec_lpc_driver = {
389 .acpi_match_table = cros_ec_lpc_acpi_device_ids,
390 .pm = &cros_ec_lpc_pm_ops,
392 .probe = cros_ec_lpc_probe,
393 .remove = cros_ec_lpc_remove,
396 static int __init cros_ec_lpc_init(void)
400 if (!dmi_check_system(cros_ec_lpc_dmi_table)) {
401 pr_err(DRV_NAME ": unsupported system.\n");
405 cros_ec_lpc_reg_init();
407 /* Register the driver */
408 ret = platform_driver_register(&cros_ec_lpc_driver);
410 pr_err(DRV_NAME ": can't register driver: %d\n", ret);
411 cros_ec_lpc_reg_destroy();
418 static void __exit cros_ec_lpc_exit(void)
420 platform_driver_unregister(&cros_ec_lpc_driver);
421 cros_ec_lpc_reg_destroy();
424 module_init(cros_ec_lpc_init);
425 module_exit(cros_ec_lpc_exit);
427 MODULE_LICENSE("GPL");
428 MODULE_DESCRIPTION("ChromeOS EC LPC driver");