2 * ppi.c Analog Devices Parallel Peripheral Interface driver
4 * Copyright (c) 2011 Analog Devices Inc.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 #include <linux/module.h>
21 #include <linux/slab.h>
22 #include <linux/platform_device.h>
24 #include <asm/bfin_ppi.h>
25 #include <asm/blackfin.h>
26 #include <asm/cacheflush.h>
28 #include <asm/portmux.h>
30 #include <media/blackfin/ppi.h>
32 static int ppi_attach_irq(struct ppi_if *ppi, irq_handler_t handler);
33 static void ppi_detach_irq(struct ppi_if *ppi);
34 static int ppi_start(struct ppi_if *ppi);
35 static int ppi_stop(struct ppi_if *ppi);
36 static int ppi_set_params(struct ppi_if *ppi, struct ppi_params *params);
37 static void ppi_update_addr(struct ppi_if *ppi, unsigned long addr);
39 static const struct ppi_ops ppi_ops = {
40 .attach_irq = ppi_attach_irq,
41 .detach_irq = ppi_detach_irq,
44 .set_params = ppi_set_params,
45 .update_addr = ppi_update_addr,
48 static irqreturn_t ppi_irq_err(int irq, void *dev_id)
50 struct ppi_if *ppi = dev_id;
51 const struct ppi_info *info = ppi->info;
56 struct bfin_ppi_regs *reg = info->base;
57 unsigned short status;
59 /* register on bf561 is cleared when read
62 status = bfin_read16(®->status);
65 bfin_write16(®->status, 0xff00);
70 struct bfin_eppi_regs *reg = info->base;
71 unsigned short status;
73 status = bfin_read16(®->status);
76 bfin_write16(®->status, 0xffff);
81 struct bfin_eppi3_regs *reg = info->base;
84 stat = bfin_read32(®->stat);
87 bfin_write32(®->stat, 0xc0ff);
97 static int ppi_attach_irq(struct ppi_if *ppi, irq_handler_t handler)
99 const struct ppi_info *info = ppi->info;
102 ret = request_dma(info->dma_ch, "PPI_DMA");
105 pr_err("Unable to allocate DMA channel for PPI\n");
108 set_dma_callback(info->dma_ch, handler, ppi);
111 ret = request_irq(info->irq_err, ppi_irq_err, 0, "PPI ERROR", ppi);
113 pr_err("Unable to allocate IRQ for PPI\n");
114 free_dma(info->dma_ch);
120 static void ppi_detach_irq(struct ppi_if *ppi)
122 const struct ppi_info *info = ppi->info;
125 free_irq(info->irq_err, ppi);
126 free_dma(info->dma_ch);
129 static int ppi_start(struct ppi_if *ppi)
131 const struct ppi_info *info = ppi->info;
134 enable_dma(info->dma_ch);
137 ppi->ppi_control |= PORT_EN;
138 switch (info->type) {
141 struct bfin_ppi_regs *reg = info->base;
142 bfin_write16(®->control, ppi->ppi_control);
147 struct bfin_eppi_regs *reg = info->base;
148 bfin_write32(®->control, ppi->ppi_control);
153 struct bfin_eppi3_regs *reg = info->base;
154 bfin_write32(®->ctl, ppi->ppi_control);
165 static int ppi_stop(struct ppi_if *ppi)
167 const struct ppi_info *info = ppi->info;
170 ppi->ppi_control &= ~PORT_EN;
171 switch (info->type) {
174 struct bfin_ppi_regs *reg = info->base;
175 bfin_write16(®->control, ppi->ppi_control);
180 struct bfin_eppi_regs *reg = info->base;
181 bfin_write32(®->control, ppi->ppi_control);
186 struct bfin_eppi3_regs *reg = info->base;
187 bfin_write32(®->ctl, ppi->ppi_control);
195 clear_dma_irqstat(info->dma_ch);
196 disable_dma(info->dma_ch);
202 static int ppi_set_params(struct ppi_if *ppi, struct ppi_params *params)
204 const struct ppi_info *info = ppi->info;
206 int dma_config, bytes_per_line;
207 int hcount, hdelay, samples_per_line;
209 #ifdef CONFIG_PINCTRL
210 static const char * const pin_state[] = {"8bit", "16bit", "24bit"};
211 struct pinctrl *pctrl;
212 struct pinctrl_state *pstate;
214 if (params->dlen > 24 || params->dlen <= 0)
216 pctrl = devm_pinctrl_get(ppi->dev);
218 return PTR_ERR(pctrl);
219 pstate = pinctrl_lookup_state(pctrl,
220 pin_state[(params->dlen + 7) / 8 - 1]);
221 if (pinctrl_select_state(pctrl, pstate))
225 bytes_per_line = params->width * params->bpp / 8;
226 /* convert parameters unit from pixels to samples */
227 hcount = params->width * params->bpp / params->dlen;
228 hdelay = params->hdelay * params->bpp / params->dlen;
229 samples_per_line = params->line * params->bpp / params->dlen;
230 if (params->int_mask == 0xFFFFFFFF)
231 ppi->err_int = false;
235 dma_config = (DMA_FLOW_STOP | RESTART | DMA2D | DI_EN_Y);
236 ppi->ppi_control = params->ppi_control & ~PORT_EN;
237 if (!(ppi->ppi_control & PORT_DIR))
239 switch (info->type) {
242 struct bfin_ppi_regs *reg = info->base;
244 if (params->ppi_control & DMA32)
247 bfin_write16(®->control, ppi->ppi_control);
248 bfin_write16(®->count, samples_per_line - 1);
249 bfin_write16(®->frame, params->frame);
254 struct bfin_eppi_regs *reg = info->base;
256 if ((params->ppi_control & PACK_EN)
257 || (params->ppi_control & 0x38000) > DLEN_16)
260 bfin_write32(®->control, ppi->ppi_control);
261 bfin_write16(®->line, samples_per_line);
262 bfin_write16(®->frame, params->frame);
263 bfin_write16(®->hdelay, hdelay);
264 bfin_write16(®->vdelay, params->vdelay);
265 bfin_write16(®->hcount, hcount);
266 bfin_write16(®->vcount, params->height);
271 struct bfin_eppi3_regs *reg = info->base;
273 if ((params->ppi_control & PACK_EN)
274 || (params->ppi_control & 0x70000) > DLEN_16)
277 bfin_write32(®->ctl, ppi->ppi_control);
278 bfin_write32(®->line, samples_per_line);
279 bfin_write32(®->frame, params->frame);
280 bfin_write32(®->hdly, hdelay);
281 bfin_write32(®->vdly, params->vdelay);
282 bfin_write32(®->hcnt, hcount);
283 bfin_write32(®->vcnt, params->height);
284 if (params->int_mask)
285 bfin_write32(®->imsk, params->int_mask & 0xFF);
286 if (ppi->ppi_control & PORT_DIR) {
287 u32 hsync_width, vsync_width, vsync_period;
289 hsync_width = params->hsync
290 * params->bpp / params->dlen;
291 vsync_width = params->vsync * samples_per_line;
292 vsync_period = samples_per_line * params->frame;
293 bfin_write32(®->fs1_wlhb, hsync_width);
294 bfin_write32(®->fs1_paspl, samples_per_line);
295 bfin_write32(®->fs2_wlvb, vsync_width);
296 bfin_write32(®->fs2_palpf, vsync_period);
305 dma_config |= WDSIZE_32 | PSIZE_32;
306 set_dma_x_count(info->dma_ch, bytes_per_line >> 2);
307 set_dma_x_modify(info->dma_ch, 4);
308 set_dma_y_modify(info->dma_ch, 4);
310 dma_config |= WDSIZE_16 | PSIZE_16;
311 set_dma_x_count(info->dma_ch, bytes_per_line >> 1);
312 set_dma_x_modify(info->dma_ch, 2);
313 set_dma_y_modify(info->dma_ch, 2);
315 set_dma_y_count(info->dma_ch, params->height);
316 set_dma_config(info->dma_ch, dma_config);
322 static void ppi_update_addr(struct ppi_if *ppi, unsigned long addr)
324 set_dma_start_addr(ppi->info->dma_ch, addr);
327 struct ppi_if *ppi_create_instance(struct platform_device *pdev,
328 const struct ppi_info *info)
332 if (!info || !info->pin_req)
335 #ifndef CONFIG_PINCTRL
336 if (peripheral_request_list(info->pin_req, KBUILD_MODNAME)) {
337 dev_err(&pdev->dev, "request peripheral failed\n");
342 ppi = kzalloc(sizeof(*ppi), GFP_KERNEL);
344 peripheral_free_list(info->pin_req);
345 dev_err(&pdev->dev, "unable to allocate memory for ppi handle\n");
350 ppi->dev = &pdev->dev;
352 pr_info("ppi probe success\n");
355 EXPORT_SYMBOL(ppi_create_instance);
357 void ppi_delete_instance(struct ppi_if *ppi)
359 peripheral_free_list(ppi->info->pin_req);
362 EXPORT_SYMBOL(ppi_delete_instance);
364 MODULE_DESCRIPTION("Analog Devices PPI driver");
365 MODULE_AUTHOR("Scott Jiang <Scott.Jiang.Linux@gmail.com>");
366 MODULE_LICENSE("GPL v2");