1 // SPDX-License-Identifier: GPL-2.0+
3 * Core PHY library, taken from phy.c
5 #include <linux/export.h>
10 * phy_speed_to_str - Return a string representing the PHY link speed
12 * @speed: Speed of the link
14 const char *phy_speed_to_str(int speed)
16 BUILD_BUG_ON_MSG(__ETHTOOL_LINK_MODE_MASK_NBITS != 102,
17 "Enum ethtool_link_mode_bit_indices and phylib are out of sync. "
18 "If a speed or mode has been added please update phy_speed_to_str "
19 "and the PHY settings array.\n");
57 return "Unsupported (update phy-core.c)";
60 EXPORT_SYMBOL_GPL(phy_speed_to_str);
63 * phy_duplex_to_str - Return string describing the duplex
65 * @duplex: Duplex setting to describe
67 const char *phy_duplex_to_str(unsigned int duplex)
69 if (duplex == DUPLEX_HALF)
71 if (duplex == DUPLEX_FULL)
73 if (duplex == DUPLEX_UNKNOWN)
75 return "Unsupported (update phy-core.c)";
77 EXPORT_SYMBOL_GPL(phy_duplex_to_str);
80 * phy_rate_matching_to_str - Return a string describing the rate matching
82 * @rate_matching: Type of rate matching to describe
84 const char *phy_rate_matching_to_str(int rate_matching)
86 switch (rate_matching) {
89 case RATE_MATCH_PAUSE:
93 case RATE_MATCH_OPEN_LOOP:
96 return "Unsupported (update phy-core.c)";
98 EXPORT_SYMBOL_GPL(phy_rate_matching_to_str);
101 * phy_interface_num_ports - Return the number of links that can be carried by
102 * a given MAC-PHY physical link. Returns 0 if this is
103 * unknown, the number of links else.
105 * @interface: The interface mode we want to get the number of ports
107 int phy_interface_num_ports(phy_interface_t interface)
110 case PHY_INTERFACE_MODE_NA:
112 case PHY_INTERFACE_MODE_INTERNAL:
113 case PHY_INTERFACE_MODE_MII:
114 case PHY_INTERFACE_MODE_GMII:
115 case PHY_INTERFACE_MODE_TBI:
116 case PHY_INTERFACE_MODE_REVMII:
117 case PHY_INTERFACE_MODE_RMII:
118 case PHY_INTERFACE_MODE_REVRMII:
119 case PHY_INTERFACE_MODE_RGMII:
120 case PHY_INTERFACE_MODE_RGMII_ID:
121 case PHY_INTERFACE_MODE_RGMII_RXID:
122 case PHY_INTERFACE_MODE_RGMII_TXID:
123 case PHY_INTERFACE_MODE_RTBI:
124 case PHY_INTERFACE_MODE_XGMII:
125 case PHY_INTERFACE_MODE_XLGMII:
126 case PHY_INTERFACE_MODE_MOCA:
127 case PHY_INTERFACE_MODE_TRGMII:
128 case PHY_INTERFACE_MODE_USXGMII:
129 case PHY_INTERFACE_MODE_SGMII:
130 case PHY_INTERFACE_MODE_SMII:
131 case PHY_INTERFACE_MODE_1000BASEX:
132 case PHY_INTERFACE_MODE_2500BASEX:
133 case PHY_INTERFACE_MODE_5GBASER:
134 case PHY_INTERFACE_MODE_10GBASER:
135 case PHY_INTERFACE_MODE_25GBASER:
136 case PHY_INTERFACE_MODE_10GKR:
137 case PHY_INTERFACE_MODE_100BASEX:
138 case PHY_INTERFACE_MODE_RXAUI:
139 case PHY_INTERFACE_MODE_XAUI:
140 case PHY_INTERFACE_MODE_1000BASEKX:
142 case PHY_INTERFACE_MODE_QSGMII:
143 case PHY_INTERFACE_MODE_QUSGMII:
145 case PHY_INTERFACE_MODE_PSGMII:
147 case PHY_INTERFACE_MODE_MAX:
148 WARN_ONCE(1, "PHY_INTERFACE_MODE_MAX isn't a valid interface mode");
153 EXPORT_SYMBOL_GPL(phy_interface_num_ports);
155 /* A mapping of all SUPPORTED settings to speed/duplex. This table
156 * must be grouped by speed and sorted in descending match priority
157 * - iow, descending speed.
160 #define PHY_SETTING(s, d, b) { .speed = SPEED_ ## s, .duplex = DUPLEX_ ## d, \
161 .bit = ETHTOOL_LINK_MODE_ ## b ## _BIT}
163 static const struct phy_setting settings[] = {
165 PHY_SETTING( 800000, FULL, 800000baseCR8_Full ),
166 PHY_SETTING( 800000, FULL, 800000baseKR8_Full ),
167 PHY_SETTING( 800000, FULL, 800000baseDR8_Full ),
168 PHY_SETTING( 800000, FULL, 800000baseDR8_2_Full ),
169 PHY_SETTING( 800000, FULL, 800000baseSR8_Full ),
170 PHY_SETTING( 800000, FULL, 800000baseVR8_Full ),
172 PHY_SETTING( 400000, FULL, 400000baseCR8_Full ),
173 PHY_SETTING( 400000, FULL, 400000baseKR8_Full ),
174 PHY_SETTING( 400000, FULL, 400000baseLR8_ER8_FR8_Full ),
175 PHY_SETTING( 400000, FULL, 400000baseDR8_Full ),
176 PHY_SETTING( 400000, FULL, 400000baseSR8_Full ),
177 PHY_SETTING( 400000, FULL, 400000baseCR4_Full ),
178 PHY_SETTING( 400000, FULL, 400000baseKR4_Full ),
179 PHY_SETTING( 400000, FULL, 400000baseLR4_ER4_FR4_Full ),
180 PHY_SETTING( 400000, FULL, 400000baseDR4_Full ),
181 PHY_SETTING( 400000, FULL, 400000baseSR4_Full ),
183 PHY_SETTING( 200000, FULL, 200000baseCR4_Full ),
184 PHY_SETTING( 200000, FULL, 200000baseKR4_Full ),
185 PHY_SETTING( 200000, FULL, 200000baseLR4_ER4_FR4_Full ),
186 PHY_SETTING( 200000, FULL, 200000baseDR4_Full ),
187 PHY_SETTING( 200000, FULL, 200000baseSR4_Full ),
188 PHY_SETTING( 200000, FULL, 200000baseCR2_Full ),
189 PHY_SETTING( 200000, FULL, 200000baseKR2_Full ),
190 PHY_SETTING( 200000, FULL, 200000baseLR2_ER2_FR2_Full ),
191 PHY_SETTING( 200000, FULL, 200000baseDR2_Full ),
192 PHY_SETTING( 200000, FULL, 200000baseSR2_Full ),
194 PHY_SETTING( 100000, FULL, 100000baseCR4_Full ),
195 PHY_SETTING( 100000, FULL, 100000baseKR4_Full ),
196 PHY_SETTING( 100000, FULL, 100000baseLR4_ER4_Full ),
197 PHY_SETTING( 100000, FULL, 100000baseSR4_Full ),
198 PHY_SETTING( 100000, FULL, 100000baseCR2_Full ),
199 PHY_SETTING( 100000, FULL, 100000baseKR2_Full ),
200 PHY_SETTING( 100000, FULL, 100000baseLR2_ER2_FR2_Full ),
201 PHY_SETTING( 100000, FULL, 100000baseDR2_Full ),
202 PHY_SETTING( 100000, FULL, 100000baseSR2_Full ),
203 PHY_SETTING( 100000, FULL, 100000baseCR_Full ),
204 PHY_SETTING( 100000, FULL, 100000baseKR_Full ),
205 PHY_SETTING( 100000, FULL, 100000baseLR_ER_FR_Full ),
206 PHY_SETTING( 100000, FULL, 100000baseDR_Full ),
207 PHY_SETTING( 100000, FULL, 100000baseSR_Full ),
209 PHY_SETTING( 56000, FULL, 56000baseCR4_Full ),
210 PHY_SETTING( 56000, FULL, 56000baseKR4_Full ),
211 PHY_SETTING( 56000, FULL, 56000baseLR4_Full ),
212 PHY_SETTING( 56000, FULL, 56000baseSR4_Full ),
214 PHY_SETTING( 50000, FULL, 50000baseCR2_Full ),
215 PHY_SETTING( 50000, FULL, 50000baseKR2_Full ),
216 PHY_SETTING( 50000, FULL, 50000baseSR2_Full ),
217 PHY_SETTING( 50000, FULL, 50000baseCR_Full ),
218 PHY_SETTING( 50000, FULL, 50000baseKR_Full ),
219 PHY_SETTING( 50000, FULL, 50000baseLR_ER_FR_Full ),
220 PHY_SETTING( 50000, FULL, 50000baseDR_Full ),
221 PHY_SETTING( 50000, FULL, 50000baseSR_Full ),
223 PHY_SETTING( 40000, FULL, 40000baseCR4_Full ),
224 PHY_SETTING( 40000, FULL, 40000baseKR4_Full ),
225 PHY_SETTING( 40000, FULL, 40000baseLR4_Full ),
226 PHY_SETTING( 40000, FULL, 40000baseSR4_Full ),
228 PHY_SETTING( 25000, FULL, 25000baseCR_Full ),
229 PHY_SETTING( 25000, FULL, 25000baseKR_Full ),
230 PHY_SETTING( 25000, FULL, 25000baseSR_Full ),
232 PHY_SETTING( 20000, FULL, 20000baseKR2_Full ),
233 PHY_SETTING( 20000, FULL, 20000baseMLD2_Full ),
235 PHY_SETTING( 10000, FULL, 10000baseCR_Full ),
236 PHY_SETTING( 10000, FULL, 10000baseER_Full ),
237 PHY_SETTING( 10000, FULL, 10000baseKR_Full ),
238 PHY_SETTING( 10000, FULL, 10000baseKX4_Full ),
239 PHY_SETTING( 10000, FULL, 10000baseLR_Full ),
240 PHY_SETTING( 10000, FULL, 10000baseLRM_Full ),
241 PHY_SETTING( 10000, FULL, 10000baseR_FEC ),
242 PHY_SETTING( 10000, FULL, 10000baseSR_Full ),
243 PHY_SETTING( 10000, FULL, 10000baseT_Full ),
245 PHY_SETTING( 5000, FULL, 5000baseT_Full ),
247 PHY_SETTING( 2500, FULL, 2500baseT_Full ),
248 PHY_SETTING( 2500, FULL, 2500baseX_Full ),
250 PHY_SETTING( 1000, FULL, 1000baseT_Full ),
251 PHY_SETTING( 1000, HALF, 1000baseT_Half ),
252 PHY_SETTING( 1000, FULL, 1000baseT1_Full ),
253 PHY_SETTING( 1000, FULL, 1000baseX_Full ),
254 PHY_SETTING( 1000, FULL, 1000baseKX_Full ),
256 PHY_SETTING( 100, FULL, 100baseT_Full ),
257 PHY_SETTING( 100, FULL, 100baseT1_Full ),
258 PHY_SETTING( 100, HALF, 100baseT_Half ),
259 PHY_SETTING( 100, HALF, 100baseFX_Half ),
260 PHY_SETTING( 100, FULL, 100baseFX_Full ),
262 PHY_SETTING( 10, FULL, 10baseT_Full ),
263 PHY_SETTING( 10, HALF, 10baseT_Half ),
264 PHY_SETTING( 10, FULL, 10baseT1L_Full ),
265 PHY_SETTING( 10, FULL, 10baseT1S_Full ),
266 PHY_SETTING( 10, HALF, 10baseT1S_Half ),
267 PHY_SETTING( 10, HALF, 10baseT1S_P2MP_Half ),
272 * phy_lookup_setting - lookup a PHY setting
273 * @speed: speed to match
274 * @duplex: duplex to match
275 * @mask: allowed link modes
276 * @exact: an exact match is required
278 * Search the settings array for a setting that matches the speed and
279 * duplex, and which is supported.
281 * If @exact is unset, either an exact match or %NULL for no match will
284 * If @exact is set, an exact match, the fastest supported setting at
285 * or below the specified speed, the slowest supported setting, or if
286 * they all fail, %NULL will be returned.
288 const struct phy_setting *
289 phy_lookup_setting(int speed, int duplex, const unsigned long *mask, bool exact)
291 const struct phy_setting *p, *match = NULL, *last = NULL;
294 for (i = 0, p = settings; i < ARRAY_SIZE(settings); i++, p++) {
295 if (p->bit < __ETHTOOL_LINK_MODE_MASK_NBITS &&
296 test_bit(p->bit, mask)) {
298 if (p->speed == speed && p->duplex == duplex) {
299 /* Exact match for speed and duplex */
303 if (!match && p->speed <= speed)
307 if (p->speed < speed)
313 if (!match && !exact)
318 EXPORT_SYMBOL_GPL(phy_lookup_setting);
320 size_t phy_speeds(unsigned int *speeds, size_t size,
326 for (i = 0, count = 0; i < ARRAY_SIZE(settings) && count < size; i++)
327 if (settings[i].bit < __ETHTOOL_LINK_MODE_MASK_NBITS &&
328 test_bit(settings[i].bit, mask) &&
329 (count == 0 || speeds[count - 1] != settings[i].speed))
330 speeds[count++] = settings[i].speed;
335 static void __set_linkmode_max_speed(u32 max_speed, unsigned long *addr)
337 const struct phy_setting *p;
340 for (i = 0, p = settings; i < ARRAY_SIZE(settings); i++, p++) {
341 if (p->speed > max_speed)
342 linkmode_clear_bit(p->bit, addr);
348 static void __set_phy_supported(struct phy_device *phydev, u32 max_speed)
350 __set_linkmode_max_speed(max_speed, phydev->supported);
354 * phy_set_max_speed - Set the maximum speed the PHY should support
356 * @phydev: The phy_device struct
357 * @max_speed: Maximum speed
359 * The PHY might be more capable than the MAC. For example a Fast Ethernet
360 * is connected to a 1G PHY. This function allows the MAC to indicate its
361 * maximum speed, and so limit what the PHY will advertise.
363 void phy_set_max_speed(struct phy_device *phydev, u32 max_speed)
365 __set_phy_supported(phydev, max_speed);
367 phy_advertise_supported(phydev);
369 EXPORT_SYMBOL(phy_set_max_speed);
371 void of_set_phy_supported(struct phy_device *phydev)
373 struct device_node *node = phydev->mdio.dev.of_node;
376 if (!IS_ENABLED(CONFIG_OF_MDIO))
382 if (!of_property_read_u32(node, "max-speed", &max_speed))
383 __set_phy_supported(phydev, max_speed);
386 void of_set_phy_eee_broken(struct phy_device *phydev)
388 struct device_node *node = phydev->mdio.dev.of_node;
391 if (!IS_ENABLED(CONFIG_OF_MDIO))
397 if (of_property_read_bool(node, "eee-broken-100tx"))
398 broken |= MDIO_EEE_100TX;
399 if (of_property_read_bool(node, "eee-broken-1000t"))
400 broken |= MDIO_EEE_1000T;
401 if (of_property_read_bool(node, "eee-broken-10gt"))
402 broken |= MDIO_EEE_10GT;
403 if (of_property_read_bool(node, "eee-broken-1000kx"))
404 broken |= MDIO_EEE_1000KX;
405 if (of_property_read_bool(node, "eee-broken-10gkx4"))
406 broken |= MDIO_EEE_10GKX4;
407 if (of_property_read_bool(node, "eee-broken-10gkr"))
408 broken |= MDIO_EEE_10GKR;
410 phydev->eee_broken_modes = broken;
414 * phy_resolve_aneg_pause - Determine pause autoneg results
416 * @phydev: The phy_device struct
418 * Once autoneg has completed the local pause settings can be
419 * resolved. Determine if pause and asymmetric pause should be used
423 void phy_resolve_aneg_pause(struct phy_device *phydev)
425 if (phydev->duplex == DUPLEX_FULL) {
426 phydev->pause = linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT,
427 phydev->lp_advertising);
428 phydev->asym_pause = linkmode_test_bit(
429 ETHTOOL_LINK_MODE_Asym_Pause_BIT,
430 phydev->lp_advertising);
433 EXPORT_SYMBOL_GPL(phy_resolve_aneg_pause);
436 * phy_resolve_aneg_linkmode - resolve the advertisements into PHY settings
437 * @phydev: The phy_device struct
439 * Resolve our and the link partner advertisements into their corresponding
440 * speed and duplex. If full duplex was negotiated, extract the pause mode
441 * from the link partner mask.
443 void phy_resolve_aneg_linkmode(struct phy_device *phydev)
445 __ETHTOOL_DECLARE_LINK_MODE_MASK(common);
448 linkmode_and(common, phydev->lp_advertising, phydev->advertising);
450 for (i = 0; i < ARRAY_SIZE(settings); i++)
451 if (test_bit(settings[i].bit, common)) {
452 phydev->speed = settings[i].speed;
453 phydev->duplex = settings[i].duplex;
457 phy_resolve_aneg_pause(phydev);
459 EXPORT_SYMBOL_GPL(phy_resolve_aneg_linkmode);
462 * phy_check_downshift - check whether downshift occurred
463 * @phydev: The phy_device struct
465 * Check whether a downshift to a lower speed occurred. If this should be the
466 * case warn the user.
467 * Prerequisite for detecting downshift is that PHY driver implements the
468 * read_status callback and sets phydev->speed to the actual link speed.
470 void phy_check_downshift(struct phy_device *phydev)
472 __ETHTOOL_DECLARE_LINK_MODE_MASK(common);
473 int i, speed = SPEED_UNKNOWN;
475 phydev->downshifted_rate = 0;
477 if (phydev->autoneg == AUTONEG_DISABLE ||
478 phydev->speed == SPEED_UNKNOWN)
481 linkmode_and(common, phydev->lp_advertising, phydev->advertising);
483 for (i = 0; i < ARRAY_SIZE(settings); i++)
484 if (test_bit(settings[i].bit, common)) {
485 speed = settings[i].speed;
489 if (speed == SPEED_UNKNOWN || phydev->speed >= speed)
492 phydev_warn(phydev, "Downshift occurred from negotiated speed %s to actual speed %s, check cabling!\n",
493 phy_speed_to_str(speed), phy_speed_to_str(phydev->speed));
495 phydev->downshifted_rate = 1;
497 EXPORT_SYMBOL_GPL(phy_check_downshift);
499 static int phy_resolve_min_speed(struct phy_device *phydev, bool fdx_only)
501 __ETHTOOL_DECLARE_LINK_MODE_MASK(common);
502 int i = ARRAY_SIZE(settings);
504 linkmode_and(common, phydev->lp_advertising, phydev->advertising);
507 if (test_bit(settings[i].bit, common)) {
508 if (fdx_only && settings[i].duplex != DUPLEX_FULL)
510 return settings[i].speed;
514 return SPEED_UNKNOWN;
517 int phy_speed_down_core(struct phy_device *phydev)
519 int min_common_speed = phy_resolve_min_speed(phydev, true);
521 if (min_common_speed == SPEED_UNKNOWN)
524 __set_linkmode_max_speed(min_common_speed, phydev->advertising);
529 static void mmd_phy_indirect(struct mii_bus *bus, int phy_addr, int devad,
532 /* Write the desired MMD Devad */
533 __mdiobus_write(bus, phy_addr, MII_MMD_CTRL, devad);
535 /* Write the desired MMD register address */
536 __mdiobus_write(bus, phy_addr, MII_MMD_DATA, regnum);
538 /* Select the Function : DATA with no post increment */
539 __mdiobus_write(bus, phy_addr, MII_MMD_CTRL,
540 devad | MII_MMD_CTRL_NOINCR);
543 static int mmd_phy_read(struct mii_bus *bus, int phy_addr, bool is_c45,
544 int devad, u32 regnum)
547 return __mdiobus_c45_read(bus, phy_addr, devad, regnum);
549 mmd_phy_indirect(bus, phy_addr, devad, regnum);
550 /* Read the content of the MMD's selected register */
551 return __mdiobus_read(bus, phy_addr, MII_MMD_DATA);
554 static int mmd_phy_write(struct mii_bus *bus, int phy_addr, bool is_c45,
555 int devad, u32 regnum, u16 val)
558 return __mdiobus_c45_write(bus, phy_addr, devad, regnum, val);
560 mmd_phy_indirect(bus, phy_addr, devad, regnum);
561 /* Write the data into MMD's selected register */
562 return __mdiobus_write(bus, phy_addr, MII_MMD_DATA, val);
566 * __phy_read_mmd - Convenience function for reading a register
567 * from an MMD on a given PHY.
568 * @phydev: The phy_device struct
569 * @devad: The MMD to read from (0..31)
570 * @regnum: The register on the MMD to read (0..65535)
572 * Same rules as for __phy_read();
574 int __phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum)
576 if (regnum > (u16)~0 || devad > 32)
579 if (phydev->drv && phydev->drv->read_mmd)
580 return phydev->drv->read_mmd(phydev, devad, regnum);
582 return mmd_phy_read(phydev->mdio.bus, phydev->mdio.addr,
583 phydev->is_c45, devad, regnum);
585 EXPORT_SYMBOL(__phy_read_mmd);
588 * phy_read_mmd - Convenience function for reading a register
589 * from an MMD on a given PHY.
590 * @phydev: The phy_device struct
591 * @devad: The MMD to read from
592 * @regnum: The register on the MMD to read
594 * Same rules as for phy_read();
596 int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum)
600 phy_lock_mdio_bus(phydev);
601 ret = __phy_read_mmd(phydev, devad, regnum);
602 phy_unlock_mdio_bus(phydev);
606 EXPORT_SYMBOL(phy_read_mmd);
609 * __phy_write_mmd - Convenience function for writing a register
610 * on an MMD on a given PHY.
611 * @phydev: The phy_device struct
612 * @devad: The MMD to read from
613 * @regnum: The register on the MMD to read
614 * @val: value to write to @regnum
616 * Same rules as for __phy_write();
618 int __phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val)
620 if (regnum > (u16)~0 || devad > 32)
623 if (phydev->drv && phydev->drv->write_mmd)
624 return phydev->drv->write_mmd(phydev, devad, regnum, val);
626 return mmd_phy_write(phydev->mdio.bus, phydev->mdio.addr,
627 phydev->is_c45, devad, regnum, val);
629 EXPORT_SYMBOL(__phy_write_mmd);
632 * phy_write_mmd - Convenience function for writing a register
633 * on an MMD on a given PHY.
634 * @phydev: The phy_device struct
635 * @devad: The MMD to read from
636 * @regnum: The register on the MMD to read
637 * @val: value to write to @regnum
639 * Same rules as for phy_write();
641 int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val)
645 phy_lock_mdio_bus(phydev);
646 ret = __phy_write_mmd(phydev, devad, regnum, val);
647 phy_unlock_mdio_bus(phydev);
651 EXPORT_SYMBOL(phy_write_mmd);
654 * __phy_package_read_mmd - read MMD reg relative to PHY package base addr
655 * @phydev: The phy_device struct
656 * @addr_offset: The offset to be added to PHY package base_addr
657 * @devad: The MMD to read from
658 * @regnum: The register on the MMD to read
660 * Convenience helper for reading a register of an MMD on a given PHY
661 * using the PHY package base address. The base address is added to
662 * the addr_offset value.
664 * Same calling rules as for __phy_read();
666 * NOTE: It's assumed that the entire PHY package is either C22 or C45.
668 int __phy_package_read_mmd(struct phy_device *phydev,
669 unsigned int addr_offset, int devad,
672 int addr = phy_package_address(phydev, addr_offset);
677 if (regnum > (u16)~0 || devad > 32)
680 return mmd_phy_read(phydev->mdio.bus, addr, phydev->is_c45, devad,
683 EXPORT_SYMBOL(__phy_package_read_mmd);
686 * phy_package_read_mmd - read MMD reg relative to PHY package base addr
687 * @phydev: The phy_device struct
688 * @addr_offset: The offset to be added to PHY package base_addr
689 * @devad: The MMD to read from
690 * @regnum: The register on the MMD to read
692 * Convenience helper for reading a register of an MMD on a given PHY
693 * using the PHY package base address. The base address is added to
694 * the addr_offset value.
696 * Same calling rules as for phy_read();
698 * NOTE: It's assumed that the entire PHY package is either C22 or C45.
700 int phy_package_read_mmd(struct phy_device *phydev,
701 unsigned int addr_offset, int devad,
704 int addr = phy_package_address(phydev, addr_offset);
710 if (regnum > (u16)~0 || devad > 32)
713 phy_lock_mdio_bus(phydev);
714 val = mmd_phy_read(phydev->mdio.bus, addr, phydev->is_c45, devad,
716 phy_unlock_mdio_bus(phydev);
720 EXPORT_SYMBOL(phy_package_read_mmd);
723 * __phy_package_write_mmd - write MMD reg relative to PHY package base addr
724 * @phydev: The phy_device struct
725 * @addr_offset: The offset to be added to PHY package base_addr
726 * @devad: The MMD to write to
727 * @regnum: The register on the MMD to write
728 * @val: value to write to @regnum
730 * Convenience helper for writing a register of an MMD on a given PHY
731 * using the PHY package base address. The base address is added to
732 * the addr_offset value.
734 * Same calling rules as for __phy_write();
736 * NOTE: It's assumed that the entire PHY package is either C22 or C45.
738 int __phy_package_write_mmd(struct phy_device *phydev,
739 unsigned int addr_offset, int devad,
742 int addr = phy_package_address(phydev, addr_offset);
747 if (regnum > (u16)~0 || devad > 32)
750 return mmd_phy_write(phydev->mdio.bus, addr, phydev->is_c45, devad,
753 EXPORT_SYMBOL(__phy_package_write_mmd);
756 * phy_package_write_mmd - write MMD reg relative to PHY package base addr
757 * @phydev: The phy_device struct
758 * @addr_offset: The offset to be added to PHY package base_addr
759 * @devad: The MMD to write to
760 * @regnum: The register on the MMD to write
761 * @val: value to write to @regnum
763 * Convenience helper for writing a register of an MMD on a given PHY
764 * using the PHY package base address. The base address is added to
765 * the addr_offset value.
767 * Same calling rules as for phy_write();
769 * NOTE: It's assumed that the entire PHY package is either C22 or C45.
771 int phy_package_write_mmd(struct phy_device *phydev,
772 unsigned int addr_offset, int devad,
775 int addr = phy_package_address(phydev, addr_offset);
781 if (regnum > (u16)~0 || devad > 32)
784 phy_lock_mdio_bus(phydev);
785 ret = mmd_phy_write(phydev->mdio.bus, addr, phydev->is_c45, devad,
787 phy_unlock_mdio_bus(phydev);
791 EXPORT_SYMBOL(phy_package_write_mmd);
794 * phy_modify_changed - Function for modifying a PHY register
795 * @phydev: the phy_device struct
796 * @regnum: register number to modify
797 * @mask: bit mask of bits to clear
798 * @set: new value of bits set in mask to write to @regnum
800 * NOTE: MUST NOT be called from interrupt context,
801 * because the bus read/write functions may wait for an interrupt
802 * to conclude the operation.
804 * Returns negative errno, 0 if there was no change, and 1 in case of change
806 int phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask, u16 set)
810 phy_lock_mdio_bus(phydev);
811 ret = __phy_modify_changed(phydev, regnum, mask, set);
812 phy_unlock_mdio_bus(phydev);
816 EXPORT_SYMBOL_GPL(phy_modify_changed);
819 * __phy_modify - Convenience function for modifying a PHY register
820 * @phydev: the phy_device struct
821 * @regnum: register number to modify
822 * @mask: bit mask of bits to clear
823 * @set: new value of bits set in mask to write to @regnum
825 * NOTE: MUST NOT be called from interrupt context,
826 * because the bus read/write functions may wait for an interrupt
827 * to conclude the operation.
829 int __phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set)
833 ret = __phy_modify_changed(phydev, regnum, mask, set);
835 return ret < 0 ? ret : 0;
837 EXPORT_SYMBOL_GPL(__phy_modify);
840 * phy_modify - Convenience function for modifying a given PHY register
841 * @phydev: the phy_device struct
842 * @regnum: register number to write
843 * @mask: bit mask of bits to clear
844 * @set: new value of bits set in mask to write to @regnum
846 * NOTE: MUST NOT be called from interrupt context,
847 * because the bus read/write functions may wait for an interrupt
848 * to conclude the operation.
850 int phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set)
854 phy_lock_mdio_bus(phydev);
855 ret = __phy_modify(phydev, regnum, mask, set);
856 phy_unlock_mdio_bus(phydev);
860 EXPORT_SYMBOL_GPL(phy_modify);
863 * __phy_modify_mmd_changed - Function for modifying a register on MMD
864 * @phydev: the phy_device struct
865 * @devad: the MMD containing register to modify
866 * @regnum: register number to modify
867 * @mask: bit mask of bits to clear
868 * @set: new value of bits set in mask to write to @regnum
870 * Unlocked helper function which allows a MMD register to be modified as
871 * new register value = (old register value & ~mask) | set
873 * Returns negative errno, 0 if there was no change, and 1 in case of change
875 int __phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum,
880 ret = __phy_read_mmd(phydev, devad, regnum);
884 new = (ret & ~mask) | set;
888 ret = __phy_write_mmd(phydev, devad, regnum, new);
890 return ret < 0 ? ret : 1;
892 EXPORT_SYMBOL_GPL(__phy_modify_mmd_changed);
895 * phy_modify_mmd_changed - Function for modifying a register on MMD
896 * @phydev: the phy_device struct
897 * @devad: the MMD containing register to modify
898 * @regnum: register number to modify
899 * @mask: bit mask of bits to clear
900 * @set: new value of bits set in mask to write to @regnum
902 * NOTE: MUST NOT be called from interrupt context,
903 * because the bus read/write functions may wait for an interrupt
904 * to conclude the operation.
906 * Returns negative errno, 0 if there was no change, and 1 in case of change
908 int phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum,
913 phy_lock_mdio_bus(phydev);
914 ret = __phy_modify_mmd_changed(phydev, devad, regnum, mask, set);
915 phy_unlock_mdio_bus(phydev);
919 EXPORT_SYMBOL_GPL(phy_modify_mmd_changed);
922 * __phy_modify_mmd - Convenience function for modifying a register on MMD
923 * @phydev: the phy_device struct
924 * @devad: the MMD containing register to modify
925 * @regnum: register number to modify
926 * @mask: bit mask of bits to clear
927 * @set: new value of bits set in mask to write to @regnum
929 * NOTE: MUST NOT be called from interrupt context,
930 * because the bus read/write functions may wait for an interrupt
931 * to conclude the operation.
933 int __phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum,
938 ret = __phy_modify_mmd_changed(phydev, devad, regnum, mask, set);
940 return ret < 0 ? ret : 0;
942 EXPORT_SYMBOL_GPL(__phy_modify_mmd);
945 * phy_modify_mmd - Convenience function for modifying a register on MMD
946 * @phydev: the phy_device struct
947 * @devad: the MMD containing register to modify
948 * @regnum: register number to modify
949 * @mask: bit mask of bits to clear
950 * @set: new value of bits set in mask to write to @regnum
952 * NOTE: MUST NOT be called from interrupt context,
953 * because the bus read/write functions may wait for an interrupt
954 * to conclude the operation.
956 int phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum,
961 phy_lock_mdio_bus(phydev);
962 ret = __phy_modify_mmd(phydev, devad, regnum, mask, set);
963 phy_unlock_mdio_bus(phydev);
967 EXPORT_SYMBOL_GPL(phy_modify_mmd);
969 static int __phy_read_page(struct phy_device *phydev)
971 if (WARN_ONCE(!phydev->drv->read_page, "read_page callback not available, PHY driver not loaded?\n"))
974 return phydev->drv->read_page(phydev);
977 static int __phy_write_page(struct phy_device *phydev, int page)
979 if (WARN_ONCE(!phydev->drv->write_page, "write_page callback not available, PHY driver not loaded?\n"))
982 return phydev->drv->write_page(phydev, page);
986 * phy_save_page() - take the bus lock and save the current page
987 * @phydev: a pointer to a &struct phy_device
989 * Take the MDIO bus lock, and return the current page number. On error,
990 * returns a negative errno. phy_restore_page() must always be called
991 * after this, irrespective of success or failure of this call.
993 int phy_save_page(struct phy_device *phydev)
995 phy_lock_mdio_bus(phydev);
996 return __phy_read_page(phydev);
998 EXPORT_SYMBOL_GPL(phy_save_page);
1001 * phy_select_page() - take the bus lock, save the current page, and set a page
1002 * @phydev: a pointer to a &struct phy_device
1003 * @page: desired page
1005 * Take the MDIO bus lock to protect against concurrent access, save the
1006 * current PHY page, and set the current page. On error, returns a
1007 * negative errno, otherwise returns the previous page number.
1008 * phy_restore_page() must always be called after this, irrespective
1009 * of success or failure of this call.
1011 int phy_select_page(struct phy_device *phydev, int page)
1015 oldpage = ret = phy_save_page(phydev);
1019 if (oldpage != page) {
1020 ret = __phy_write_page(phydev, page);
1027 EXPORT_SYMBOL_GPL(phy_select_page);
1030 * phy_restore_page() - restore the page register and release the bus lock
1031 * @phydev: a pointer to a &struct phy_device
1032 * @oldpage: the old page, return value from phy_save_page() or phy_select_page()
1033 * @ret: operation's return code
1035 * Release the MDIO bus lock, restoring @oldpage if it is a valid page.
1036 * This function propagates the earliest error code from the group of
1040 * @oldpage if it was a negative value, otherwise
1041 * @ret if it was a negative errno value, otherwise
1042 * phy_write_page()'s negative value if it were in error, otherwise
1045 int phy_restore_page(struct phy_device *phydev, int oldpage, int ret)
1050 r = __phy_write_page(phydev, oldpage);
1052 /* Propagate the operation return code if the page write
1055 if (ret >= 0 && r < 0)
1058 /* Propagate the phy page selection error code */
1062 phy_unlock_mdio_bus(phydev);
1066 EXPORT_SYMBOL_GPL(phy_restore_page);
1069 * phy_read_paged() - Convenience function for reading a paged register
1070 * @phydev: a pointer to a &struct phy_device
1071 * @page: the page for the phy
1072 * @regnum: register number
1074 * Same rules as for phy_read().
1076 int phy_read_paged(struct phy_device *phydev, int page, u32 regnum)
1078 int ret = 0, oldpage;
1080 oldpage = phy_select_page(phydev, page);
1082 ret = __phy_read(phydev, regnum);
1084 return phy_restore_page(phydev, oldpage, ret);
1086 EXPORT_SYMBOL(phy_read_paged);
1089 * phy_write_paged() - Convenience function for writing a paged register
1090 * @phydev: a pointer to a &struct phy_device
1091 * @page: the page for the phy
1092 * @regnum: register number
1093 * @val: value to write
1095 * Same rules as for phy_write().
1097 int phy_write_paged(struct phy_device *phydev, int page, u32 regnum, u16 val)
1099 int ret = 0, oldpage;
1101 oldpage = phy_select_page(phydev, page);
1103 ret = __phy_write(phydev, regnum, val);
1105 return phy_restore_page(phydev, oldpage, ret);
1107 EXPORT_SYMBOL(phy_write_paged);
1110 * phy_modify_paged_changed() - Function for modifying a paged register
1111 * @phydev: a pointer to a &struct phy_device
1112 * @page: the page for the phy
1113 * @regnum: register number
1114 * @mask: bit mask of bits to clear
1115 * @set: bit mask of bits to set
1117 * Returns negative errno, 0 if there was no change, and 1 in case of change
1119 int phy_modify_paged_changed(struct phy_device *phydev, int page, u32 regnum,
1122 int ret = 0, oldpage;
1124 oldpage = phy_select_page(phydev, page);
1126 ret = __phy_modify_changed(phydev, regnum, mask, set);
1128 return phy_restore_page(phydev, oldpage, ret);
1130 EXPORT_SYMBOL(phy_modify_paged_changed);
1133 * phy_modify_paged() - Convenience function for modifying a paged register
1134 * @phydev: a pointer to a &struct phy_device
1135 * @page: the page for the phy
1136 * @regnum: register number
1137 * @mask: bit mask of bits to clear
1138 * @set: bit mask of bits to set
1140 * Same rules as for phy_read() and phy_write().
1142 int phy_modify_paged(struct phy_device *phydev, int page, u32 regnum,
1145 int ret = phy_modify_paged_changed(phydev, page, regnum, mask, set);
1147 return ret < 0 ? ret : 0;
1149 EXPORT_SYMBOL(phy_modify_paged);